Datasheet TDA5345HT Datasheet (Philips)

Page 1
INTEGRATED CIRCUITS
DATA SHEET
TDA5345HT
5V spindle & VCM driver combo
Preliminary specification
1999June10
Page 2
Philips Semiconductors Preliminary specification

FEATURES

Single chip voice coil and spindle motor drivers:
Complementary outputs (Nmos & Pmos): No step-up converter needed
On-chip isolation switch to allow synchronous rectification at power-down
Suited for ramp load operation
Register based architecture: on-chip serial interface
Temperature shut down protection
Linear 3.3V regulator using one external NPN transistor
Power monitor circuitrymonitoring the 5V supply
1 axis shock sensor amplifier
Switched capacitor regulator (-3V) using 2 external capacitors and 2 external shottky diodes
All main internal functions can be independently put in Sleep mode
Small low profile package: TQFP64 (1.2mm high).

Spindle motor driver:

High efficiency drivers: 1.5Ω Max
0.62 Amp capability, full wave (bipolar) drive
Internal current mirrors to measure the motor curren
Controlled fly-back pulse slopes, programmable through the serial interface
Active fly-back pulse limitation, using the Power MOS instead of diodes
Internal digital timing to control the commutations by back-EMF sensing (Start-up & running)
Internal speed loop combining FLL and PLL
Start-up current control by an internal 6-bit DAC (shared with the VCM loop).

Voice coil motor (VCM) driver:

High efficiency drivers: 1.5Ω Max (without the external sense resistor); 0.4 Amp capability
External sense resistor to accurately control the VCM current
True AB Class linear amplifier with no crossover distortion
Internal 12-bit DAC to control the VCM transconductance input voltage
Internal 6-bit DAC to cancel the VCM loop offsets
Active fly-back pulse limitation, using the Power transistors instead of diodes
3-step programmable retract function activated by either the serial port or the power monitor circuitry
Back-EMF amplifier to monitor the actuator speed when ramp loading.

Power Monitor:

Monitors the 5V power supply
Power fault output (battery too low); threshold=4.2V
Power on Reset output; threshold=4.1V (Vdd5)
Threshold accuracy:+/-3%.
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Philips Semiconductors Preliminary specification

GENERAL DESCRIPTION

The TDA5345HT is a combination of a voice coil motor and a spindle motor driver, designed for 5V high performance portable small form factor hard disk drives. Communications with the micro-controller take place through a 16-bit 3-wire uni-directional serial port. Power dissipation is a major concern in portable drives, therefore each main function can be individually put in sleep mode when it is not used, to save as much power as possible. The serial port and the power monitor are the only functions which remain always active.
The TDA5345HT integrates a spindle driver and the commutation logic that drives a three-phase brushless, sensorless DC motor in full wave mode. Commutations are generated from the internal back-EMF sensing circuitry from start-up to the running mode. An internal speed loop combining FLL and PLL technics makes sure that the spindle reaches the right speed, programmed through the serial port. The 6-bit DAC is used to limit the Start-up current by limiting the voltage on the speed loop filter. To reduce acoustical noise and current noise on both power supply and ground, the fly-back pulse leading edge slew-rate is controlled. 4 different slope values are programmable. To prevent internal parasitic effects, positive and negative fly-back pulses are clamped by the output power transistors themselves: lower NMOS transistors are turned ON to limit the negative fly-back pulses just below ground while upper PMOS limit the positive fly-backs just above the power supply. This active limitation is still active at power down during the VCM retract. In this way, an efficient back-EMF rectification is obtained (no diodes losses).
The VCM driver is a linear transconductance amplifier; it is a true AB class with a 8mA quiescent current. It means that there is absolutely no crossover distortion. An external compensation network is used to set the loop bandwidth and ensure the loop stability. With common VCM characteristics, the bandwidth can go up to 40kHz. To prevent internal parasitic effects, positive and negative fly-back pulses are clamped by the output power transistors themselves. An on-chip 12-bit DAC is used to generate the VCM amplifier input voltage. This a signed converter, with an output range of [1.25V;1.75V] when the low gain is selected and an output range of [0.5V;2.5V] when the high gain is selected. The all VCM transconductance works then around a 1.5V reference (available on one pin). It is possible to add an external notch filter between the 12-bit DAC output and the VCM loop intput. An other 6-bit DAC is used to cancel the Vcm loop offsets. An additional Vcm back-EMF amplifier is provided to monitor the actuator speed when ramp loading. A ramp unload circuitry is included as well. It can be activated through the serial bus (SoftRetract) or automatically initiated in case of temperature shut down or at power-down. The ramp unload sequence is made of 3 steps : brake, slow retract and then full power. The retract steps duration is set by means of internal programmable counters, clocked by the spindle back-EMF. In case of power down, this sequence is followed by a spindle brake. The three spindle lower power NMOS are switched fully ON together.
The linear 3.3V DC-DC converter is designed to drive an external power NPN that will supply the 3.3V chips. It can be enabled or disabled by hardware, using the external Reg3v3On pin.
The switched capacitor -3V regulator is designed to supply a very clean negative voltage to the PreAmp IC in the drive.
The shock sensor amplifier is intended to be connected to an external 1 axis shock sensor. The window comparator threshold is programmable through the serial bus.
An internal circuitry provides either an analog or a digital information about the junction temperature. These two informations can be selected through the serial bus. When the analog output is selected, the voltage is proportional to the internal chip temperature. When the digital output is selected, it indicates that the temperature exceeds 145°C. An internal thermal shut down mode is initiated when the temperature is higher than 160°C: the 3 spindle outputs are disabled while the vcm is immediately retracted.
The power monitor circuitry monitors the 5V power supply. The Power On Reset PORN output is driven low when the 5V supply is below 4.1V. This threshold can be changed by an external resistor divider. Once the power supplies is above its threshold, the Power On Reset output goes high after a delay that is set by an external capacitor. A second output, called Power Fault (active HIGH), indicates that the 5V power supply is below 4.2V when high. There is no delay between the supply crossing the threshold and the PowerFault output change.
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Philips Semiconductors Preliminary specification
SpinCompens
SpinSpeedFilter
MechClock
CLOCK
SpinDigOut
SEN_N
SDATA SCLK
BrakePower RetReset
RegSense
RegNPNBase
Reg3v3PwrUp
PowerFault
PorN PorCap
Por5Adj
Fig.1
Speed Loop
(FLL/PLL)
(digital)
commutation
manager
(digital)
Serial
interface
(digital)
3.3V
Regulator
reference generator
Power On Reset
Thermal
monitor
TempMux
Charge Pumps
Start-Up
current
limiter
6-bit
DAC
12-bit
DAC
3-step
Retract
& spindle
brake
Shock sensor
amplifier
Bemf Comp
SpinCenterTap
SpinMotA
Spindle drivers
SpinMotB
SpinMotC
Power stage
VcmCompensIn
+
+
VcmDacOut
VcmInput
VcmCompensOut
Vcm
VcmMinus AB class drivers
VcmPlus
Power stage
VcmBemf
Vcm back-EMF Amplifier
OpAmpInM OpAmpOut
Vcm
Current sense
Amplifier
Negative
supply
VcmSenseInM
VcmSenseInP
Neg3V PumpNeg3V
regulator
ShockInput
ShockFiltOut
ShockCompOutShockFiltOut

GENERAL BLOCK DIAGRAM

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Philips Semiconductors Preliminary specification

PINNING (GREY ROWS MEANS NEW PINS))

SYMBOL PIN # DESCRIPTION I/O
SpinVddA 1 spindle MotA half bridge power supply I SpinRectBemf 2 spindle “Clamp”: rectified Bemf O SpinMotA 3 spindle power output: A O VcmVddM 4 VCM- half bridge power supply SUPPLY SpinGndAB 5 spindle MotA & MotB half bridges ground GROUND VcmMinus 6 VCM inverted power output (VCM-) O n.c.1 7 not connected ; connect it to ground GROUND SpinMotB 8 spindle power output: B O VcmGndPow 9 VCM H-bridge ground GROUND SpinVddBC 10 spindle MotC & MotB half bridges power supply I VcmPlus 11 VCM non-inverted power output O n.c.2 12 not connected; connect it to ground GROUND SpinMotC 13 spindle power output: C O VcmVddP 14 VCM+ half bridge power supply SUPPLY SpinGndC 15 spindle MotC half bridge ground GROUND GNDAna1 16 analog ground GROUND
VcmCompensOut 17 VCM error amplifier output O
VcmRef 18 VCM loop reference voltage (1.5V) O VcmCompensIn 19 VCM error amplifier inverted input I VcmInput 20 VCM loop input I VcmVdd5Div2 21 internal Vdd5/2 reference voltage for the VCM I/O VcmSenseInM 22 VCM sense amplifier inverted input I VcmSenseInP 23 VCM sense amplifier non-inverted input I Vdd5Ana1 24 analog power supply SUPPLY PorN 25 power On Reset output O PorCap 26 external capacitor used to set the Power On Reset delay O BdGap 27 internal band-gap reference voltage (for production trimming) I Por5Adj 28 5V power on reset threshold adjustment I VcmBemf 29 VCM Back-Emf amplifier output O OpAmpInM 30 VCM Back Emf Operational Amplifier inverted input I OpAmpOut 31 VCM Back Emf Operational Amplifier output O GNDAna2 32 analog ground GROUND RefCurRes 33 external 33k resistor O Reg3v3PwrUp 34 hardware enable / disable for the 3.3V regulator (at Power Up) I PumpNeg3V 35 -3V regulator pump capacitor O Neg3V 36 -3V regulator output sense pin I PowerFault 37 battery low warning O CLOCK 38 digital timing clock I SDATA 39 serial port Data line I Vdd5Dig 40 digital power supply SUPPLY
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Philips Semiconductors Preliminary specification
SYMBOL PIN # DESCRIPTION I/O
SCLK 41 serial port Clock I SEN_N 42 serial port ENABLE line: active low I SpinMechClock 43 spindle rotation speed (1 pulse / revolution) O SpinDigOut 44 spindle back-EMF comparator output or commutation clock O RetReset 45 external capacitor used to reset the retract sequence state machine I RegNPNBase 46 3v3 DC-DC converter output (drives an external NPN) O RegSense 47 3v3 DC-DC converter input I GndDig 48 digital ground GROUND VcmDacOut 49 12-bit VCM DAC output O ShockRef 50 shock sensor reference voltage O ShockFiltOut 51 shock sensor RC low pass filter output O ShockCompOut 52 shock sensor comparator output O ShockCom 53 shock sensor input common mode I ShockAmpOut 54 shock sensor amplifier output O ShockInput 55 shock sensor input I Vdd5Ana2 56 analog power supply SUPPLY TempMux 57 internal thermal monitor circuitry voltage output O SpinSpeedFilter 58 external FLL/PLL speed loop filter O SpinCompens 59 spindle current loop compensation capacitor O BrakePower 60 external capacitor to supply the spindle brake at power down I SpinCenterTap 61 spindle centre tap connection I RetPmosDrain 62 retract Pmos transistor drain connection O IsoSwSo 63 spindle power outputs supply SUPPLY GNDAna3 64 analog ground GROUND
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Philips Semiconductors Preliminary specification
GNDANA3
ISOSWSO
PMRETDRAIN
SPINCENTERTAP
BRAKEPOWER
SPINCOMPENS
SPINSPEEDFILTER
TEMPMUX
VDD5ANA2
SHOCKINPUT
SHOCKAMPOUT
SHOCKCOM
SHOCKCOMPOUT
SHOCKFILTOUT
SHOCKREF
VCMDACOUT
646362616059585756555453525150
49
SPINVDDA
SPINRECTBEMF
SPINMOTA VCMVDDM
SPINGNDAB
VCMMINUS
n.c.1
SPINMOTB
VCMGNDPOW
SPINVDDBC
VCMPLUS
n.c.2
SPINMOTC
VCMVDDP
SPINGNDC
GNDANA1
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16
171819202122232425262728293031
VCMREF
VCMINPUT
VCMCOMPENSIN
VCMCOMPENSOUT
TDA5345HT
VCMVDD5DIV2
VCMSENSELNP
VCMSENSELNM
PORN
VDD5ANA1
PORCAP
BDCAP
POR5ADJ
VCMBEMF
OPAMPLNM
OPAMPOUT
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
32
FCK121
GNDANA2
GNDDIG REGSENSE REGNPNBASE RETRESET SPINDIGOUT SPINMECHCLOCK SEN_N SCLK VDD5DIG SDATA CLOCK POWERFAULT NEG3V PUMPNEG3V REG3v3PWRUP REFCURRES
Fig.3 Pin configuration
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Philips Semiconductors Preliminary specification
Vdd5
Current mirror
I
spindle
530
R
SpinLoopGain
I
spindle
530
PorN
25
OTA
+
On/Off
On/Off
1
On/Off
1
530
530
63
IsoSwSo
SpinRectBemf
2
1
SpinVddA
3
SpinGndAB
5
10
SpinVddBC
8
VDD
SpinMotA
SpinMotB
58
SpinSpeedFilter
voltage limiter
(ext.)
(ext.)
SpinDigOut
FLL/PLL CHARGE PUMPS
6-bit DAC
33
RefCurRes
59
SpinCompens
44
On/Off
On/Off
1
On/Off
+
Fig.4 Spindle section diagram.
530
(ext.)
SpinMotC
13
SpinGndC
15
61
SpinCenterTap
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Philips Semiconductors Preliminary specification
(ext.)
1719
SpinRectBemf
VcmCompenIn
20
VcmInput
49
6-bit DAC
(current)
12-bit
VcmCompensOut
+ 2.5
-2.5
2
VcmVddP
4
6
9
VcmGnd
11
VcmVddM
VcmMinus
(ext.)
14
VCM
VcmPlus
R
sense
VcmDacOut
DAC
(voltage)
VcmRef
18
Fig.5 VCM section diagram.
1999June10 9
1
1.5V
1
26K
VcmVdd5Div2
(ext.)
VDD
26K
21
22
VcmSenseInM
3
23
VcmSenseInP
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Philips Semiconductors Preliminary specification
FUNCTIONAL DESCRIPTION Serial interface
The serial interface is a uni-directional port for writing data to the internal registers of TDA5345HT. Each write is composed of 16 bits. For data transfer SEN_N is brought low, serial data is presented at SDATA pin, and a serial clock is applied to the SCLK pin. After the SEN_N pin goes low, the first 16 pulses applied to the SCLK pin shifts the data presented at the SDATA pin into an internal shift register on the rising edge of each clock. An internal counter prevents more than 16 bits from being shifted into the register. The data in the shift register is latched when SEN_N goes high. If less than 16 clock pulses are provided before SEN_N goes high, the data transfer is aborted.
All transfers are shifted into the serial port MSB first. The first 4 bits of the transfer determine the internal register to be accessed. The other 12 bits contain the programming data. During sleep modes, the serial port remains active and register programming data is retained.
SEN_N
Address
Receive data
T
st
T
su
T
hd
SCLK
12
456789
3
10
11
12
13 14 15 16
SDATA A3 A2 A1 A0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Write to TDA5345HT
Fig.6 Serial port timing information.
Table 1 Address of registers
A3 A2 A1 A0 REG. DESCRIPTION
00000clock dividers programmation, spindle mode control 00011start-up,comdelim & watch-dog delays 00102blank delay, bandgap adjust, 3-step retract param (begin) 001133-step retract parameters (end) 01004fly-back slope, shock sensor threshold & sleep control bits 01015speed factor (MSBs), PLL control and 6-bit DAC 01106speed factor(LSBs) 01117Vcm 12-bit DAC (low gain) 10008Vcm 12-bit DAC (high gain) 1 0 0 1 9 shock sensor threshold
T
ex
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Philips Semiconductors Preliminary specification
Table 2 Serial Interface REGISTERS floorplan
BIT\
REG
0 RegNeg
1 StartUp
2 Blank
3 T_Full
4 FlyBack
5 Speed
6 Speed
7 Dac12a
8 Dac12b
9 Shock
11109876543210
Clk2
Delay3
Delay3
Power2
Slope1
bit14
bit11
bit11
bit11
RegNeg
[0]
StartUp
Delay2
Delay2
Power1
FlyBack
Slope0
Dac12a
Dac12b
Thresh2
Clk1
[1]
Blank
T_Full
Speed
bit13
Speed
bit10
bit10
bit10
[0]
RegNeg
Clk0
[0]
StartUp
Delay1
Blank
Delay1
T_Full
Power0
Shock
Thresh1
Speed
bit12
Speed
bit9
Dac12a
bit9
Dac12b
bit9
Presc
Factor1
[0]
StartUp
Delay0
Blank
Delay0
T_Slow
Ret5
Shock
Thresh0
PllCur1PllCur0Dac6
Speed
bit8
Dac12a
bit8
Dac12b
bit8
Presc
Factor0
[0]
ComDe
Lim3
DigOut
Mux
[1]
T_Slow
Ret4
Vcm
Retract
[0]
Speed
bit7
Dac12a
bit7
Dac12b
bit7
BiasCT
ComDe
Lim2
BdGap
Adj2
T_Slow
Ret3 Vcm
Sleep
ToVCM
Speed
bit6
Dac12a
bit6
Dac12b
bit6
[0]
[0]
[1]
[0]
Run/ Stop
[0]
ComDe
Lim1
BdGap
Adj1
[0]
T_Slow
Ret2
Dac12
Sleep
[1]
Dac6
bit5
Speed
bit5
Dac12a
bit5
Dac12b
bit5
Pll
Enable
[0]
ComDe
Lim0
BdGAp
Adj0
[0]
T_Slow
Ret1
RegNeg
Sleep
[1]
Dac6
bit4
Speed
bit4
Dac12a
bit4
Dac12b
bit4
Manual
[0]
Watch
Dog3
VcmRet
SoftRis
T_Slow
Ret0
Shock
Sleep
[1]
Dac6
bit3
Speed
bit3
Dac12a
bit3
Dac12b
bit3
Man
Com2
Watch
Dog2
Vretract2Vretract1Vretract
T_Vcm Brake2
Spin
Sleep
[1]
Dac6
bit2
Speed
bit2
Dac12a
bit
Dac12b
bit2
Man
Com1
Watch
Dog1
T_Vcm Brake1
Reg3v3
Enable
[0]
Dac6
bit1
Speed
bit1
Dac12a
bit1
Dac12b
bit1
Man
Com0
Watch
Dog0
0
T_Vcm Brake0
Temp
Select
[0]
Dac6
bit0
Speed
bit0
Dac12a
bit0
Dac12b
bit0
Note:
1.[1] (or [0]) means that the bit is set to 1 (or 0) when PorN is low => default value at power up.
2.Use register 7 (Dac12a) for low VCM loop gain and register 8 (Dac12b) for high gain.

Control bits:

REGISTER#0: Bits [11,9] (RegNegClk[2,0]):The Negative supply (-3V) regulator needs a 500kHz clock. A programmable divider
genreates this frequency from the external clock ([15-33] Mhz). Programmation is on 3 bits.
Bits [8,7] (PrescFactor[1,0]):used to select the prescaler division factor (see next section: “commutation control”). Bit 6 (BiasCT):used to bias the spindle centre tap at Vdd5/2 when the spindle outputs are disabled (Run/Stop = 0). The
back-EMF comparator remains operational when BiasCT = 1, to check if the spindle is running for instance. Bit 5 (Run/Stop):after the power supply is turned on and PorN is high, the motor will start spinning when Run/Stop is
set to ‘1’. The spindle power output starts from state code 0 (see table 3). The motor will stop when this bit is set to ‘0’. The 3 spindle power outputs are then switched off. No brake is applied.
bit 4 (PllEnable):enables the PLL to improve the speed accuracy. Bit 3 (Manual):selects the manual commutation mode (Run/Stop bit also needs to be high). When getting out of the
manual mode (=> Manual = ‘0’) and keeping the Run/Stop bit high, the internal commutation block will start from the last state programmed in manual mode.
Bits [2,0] (ManCom[2,0]):control the commutation in manual mode when Run/Stop = 1 & Manual = 1.
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Philips Semiconductors Preliminary specification
Table 3 Spindle power output states according to ManCom0, ManCom1, ManCom2 bit values.
MANCOM[2] MANCOM[1] MANCOM[0] SPINMOT A SPINMOT B SPINMOT C STATE CODE
0 0 0 low high float 0 0 0 1 low float high 1 0 1 1 float low high 2 1 1 1 high low float 3 1 1 0 high float low 4 1 0 0 float high low 5 1 0 1 low low low 6 (brake) 0 1 0 high low high 7 (tripolar)
REGISTER#1
bit [11,8] (StartUp[3,0]):programmable delay used to detect if the spindle is standing still at start-up. bit [7,4] (ComDeLim[3,0]):Used to set a default value for the spindle commutation delay. bit [3,0] (WatchDog[3;0]):programmable delay used to detect if the spindle is running backward at star-up.
REGISTER#2
bit [11,8] (BlankDelay[3,0]):programmable delay used to blank the first edge of the spindle inductive fly-backs. bit 7 (DigOutMux):SpinDigOut pin is the commutation clock when DigOutMux = ‘1’ else back-EMF comparator output. bit [6,4] (BdGapAdj[2,0]):used to adjust the internal BandGap reference voltage to improve several parameters. bit 3 (VcmRetSoftRising):Enables the digital soft rising slope on the “full power retract” step. bit [2,0] (Vretract[2;0]):used to program the VcmMinus output voltage during the “soft retract” step.
REGISTER#3
bit [11,9] (T_FullPower[2,0]):used to program how much time the full power retract step is applied. bit [8,3] (T_SlowRetract[5,0]):used to program how much time the slow retract step is applied. bit [2,0] (T_VcmBrake[2,0]):used to program how much time the VCM brake step is applied.
R
EGISTER#4
bit [11,10] (FlyBackSlope[1,0]):used to program the fly-back pulse leading edge slew rate. bit [9,8] (ShockThresh[1,0]):set the shock sensor threshold value. bit 7 (VcmRetract):activates a VCM retract when VcmRetract = ‘1’. bit 6 (VcmSleep):puts the VCM section (except the VCM sense amplifier and the VCM 12-bit DAC) in sleep mode when
VcmSleep = ‘1’.
bit 5 (DAC12Sleep):puts the VCM 12-bit DAC & the VCM sense amplifier in sleep mode when Dac12Sleep = ‘1’. bit 4 (RegNegSleep):puts the -3V regulator in sleep mode whenRegNegSleep = ‘1’. bit 3 (ShockSleep):puts the Shock sensor section in sleep mode when ShockSleep = ‘1’. bit 2 (SpinSleep):puts the Spindle section in sleep mode when SpinSleep = ‘1’ ; SpinMotA, B, C are floating then. bit 1 (Reg3v3Enable):Enables the internal 3.3V regulator when bit 1= ‘1’.
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Philips Semiconductors Preliminary specification
bit 0 (TempSelect):selects whether the TempMux pin is a digital output (temperature-high warning) when TempSelect = ‘0’ or an analog output (temperature monitor) when TempSelect = ‘1’.
REGISTER#5
bit [11,9] (Speed[14,12]):division factor used to set the spindle speed controlled by onboard FLL/PLL (2 MSBs only). bit [8,7] (PllCur[0,1]):Programmable current for the PLL charge pump. bit 6 (Dac6ToVcm):6-bit DAC is connected to the VCM section when Dac6ToVcm = ‘1’, else connected to the spindle. bit [5,0] (Dac6[5,0]):6-bit word converted to a current by the 6-bit DAC.
REGISTER#6 bit [11,0] (Speed[11,0]):division factor used to set the spindle speed controlled by onboard FLL/PLL (12 LSBs only).
REGISTER#7 bit [11,0] (Dac12a[11,0]):12-bit word sent to the VCM 12-bit DAC. Low gain selected for the VCM loop.
REGISTER#8 bit [11,0] (Dac12b[11,0]):12-bit word sent to the VCM 12-bit DAC. High gain selected for the VCM loop. REGISTER#9
bit [10] (Shock thresh[23):set the shnock sensor threshold value.
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Philips Semiconductors Preliminary specification

Commutation control

DELAYS The spindle block contains both the low-side and high-side drivers configured as a H bridge for a three phase DC
brushless, sensorless motor. In each of the six possible states, two outputs are active, one sourcing current and one sinking current. The third output presents a high impedance to the motor which enables measurement of the BEMF in the corresponding motor coil. The back-EMF comparator output (available on pin SpinDigOut) is processed by the commutation logic circuit to calculate the correct time for the next commutation, which will change the output state.
The commutation block measures then the time between 2 consecutive zero-crossings and determines the actual commutation time and the next motor coils state. All the following situations must be taken into account: => Start up, No start, Backwards spin, Run and Manual commutation.
The commutation logic keeps the motor spinning by commutating the motor each time a zero-crossing is detected. The delay between the zero-crossing and the actual output driver change is either internally calculated or programmable via the serial port (useful at start-up: no delay has been measured!).
The internal commutation clock can be monitored on pin SpinDigOut (44). The falling edges are the relevant informations: they are caused by the zero-crossings. If preferred, SpinDigOut can be set to become the back-EMF comparator output, to check if the spindle is already spinning at power up for instance. If the spindle outputs are floating, don’t forget to bias them, using the “BiasCT” bit, before considering the BemfCompOut value. Fig.6 and Fig.7 show typical motor commutation timing diagrams.
State Code
SpinMotA
SpinMotB
SpinMotC
Commutation Clock
BemfCompOut
0
L
H
F
Zero-crossing
1
L
F
HH
234
F
LL
Fig.7 Input commutations to output drivers
HH
F
F
L
5
F
H
L
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Philips Semiconductors Preliminary specification
SpinMotA
SpinMotB
SpinMotC
ZOOM
Blank1
WatchDog
Blank2
StartUp
Commutation
delay
CENTER TAP
Commutation
Zc
1
fly-back pulse
The digital control block ignores any crossing while theBlank1 timer is counting. This means that the zero-crossing caused by the fly-back pulse leading edge (ZC1) is not seen by the commutation block.
TheWatchDog timer makes sure that the motor is running forward. If the motor is going backwards, the BEMF voltage will be inverted and the second crossing (ZC2) of the inductive pulse will not occur until the actual BEMF zero crossing. Therefore, if the WatchDog timer expires before a zero-crossing occurs, the motor is assumed to be turning backwards. The commutation is advanced one step to correct this condition. The second inductive zero-cross (ZC2) must occur within the WatchDog time. Therefore, the WatchDog must be set to a time that is greater than the fly-back pulse duration measured when the motor is standing still.
Zc
2
false zero crossings
Zc
3
Fig.8 A typical motor commutation diagram
true zero crossing
Commutation
TheBlank2 timer starts counting as soon as the second zero-cross (ZC2) occurs. After the second inductive zero-crossing all extra zero-crossings are ignored during the Blank2 time. This allows the coil voltage to ring slightly without causing a commutation advance.To make the chip smaller, Blank1 and Blank2 have the same value: Blank.
If the motor is not spinning, no BEMF zero-crossing will occur. TheStartUp timer detects this if it expires before the true zero-crossing (ZC3) has occurred. It will advance the commutation one step if this happens.
The Commutation Delay Limiter (ComDeLim) allows to control the maximum commutation delay time. This commutation delay time is equal to half the measured delay between 2 zero crossings(∆Zc
1999June10 15
measured
). ComDeLim value should be
Page 16
Philips Semiconductors Preliminary specification
programmed to be the IfZc IfZc
measured measured
is lower than ComDeLim, the next commutation delay will beZc is higher than ComDeLim, the next commutation delay will be ComDeLim value divided by 2.
maximum allowable delay value
.
measured
divided by 2.
ComDeLim can be limited to guarantee a faster lock after the motor has gone out of lock. The clock used in the commutation control block is obtained by dividing the master clock of the chip (CLOCK: pin #38)
by a clock divider (PRESCALER). This internal clock is named ClockOutPrescaler. All the delays described above (Blank, WatchDog and StartUp) are generated by a down-counter (called TIMER1). The time between two zero-crossings is measured by a second counter called TIMER2. The commutation delay and the ComDeLim are derived from TIMER2. Both counters are clocked on ClockOutPrescaler clock, which is programmable through the serial interface, using bit 7 & 8 of register #0: (ClockOutPrescaler should be chosen as typically 1MHz)
Table 4 Clock configurations
PRESCFACTOR1
(BIT 8, REG#0)
0 0 CLOCK/4 0 1 CLOCK/8 1 0 CLOCK/16 1 1 CLOCK/32
TIMER1
PRESCFACTOR0
(BIT 7, REG#0)
CLOCKOUTPRESCALER
Timer 1 isused to generate Blank, WatchDog andStartUp delays: It loads one of these programmed values and counts down till it reaches zero. All LSB bits are internally set to ‘1’: bits [2:0] for Blank, bits [8:0] for WatchDog, bits [13:0] for StartUp.
WatchDogStartUp
Blank
Fig.9 Timer 1 configuration.
Calculations: The actual delay will be: Delay = (Value * Step) + min, where:
Value = the decimal value programmed in the considered register Step size = 2 Min = (2
maximum = (2
LSB
/
ClockOutPrescaler
LSB
-1) /
ClockOutPrescaler
(MSB+1)
-1) /
(bits from 0 to (LSB-1) are internally set to 1)
ClockOutPrescaler
01234567891011121314151617
1999June10 16
Page 17
Philips Semiconductors Preliminary specification
Table 5 Numeral application with CLOCK = 16 MHz
DELAYS
CLOCKOUTPRESCALER=
CLOCK/4 = 4 MHZ
CLOCKOUTPRESCALER=
CLOCK/8 = 2 MHZ
CLOCKOUTPRESCALER=
CLOCK/16 = 1 MHZ
CLOCKOUTPRESCALER= CLOCK/32
= 0.5 MHZ
MIN STEP MAX MIN STEP MAX MIN STEP MAX MIN STEP MAX
Blank 3µs4µs63µs7µs8µs 127µs 15µs 16µs 255µs31µs32µs511µs
WatchDog 127µs 128µs 2.05ms255µs 256µs 4.0ms
StartUp 4.1ms 65.5ms65.5ms 8.2ms 8.2ms 131ms
511µs 512µs 8.2ms1023µs1024µs16.4ms
16.4ms 16.4ms 262ms32.8ms32.8ms524ms
TIMER2 TIMER2 is used to measure the delay between two zero-crossings and also to set the maximum commutation delay
through comdelim delay:
01234567891011
ComDeLim
Explanation: COMDELIM is the maximum value that can be reached by TIMER 2. So, this is the maximum delay
between 2 zero-crossings
Calculations: Delay between 2 zero-crossings (Zc):
step size = 2 min = (2 maximum = (2
. The maximum commutation delay is then
LSB
/
ClockOutPrescaler
LSB
-1) /
(MSB+1)
ClockOutPrescaler
- 1) /
ClockOutPrescaler
Fig.10 Timer 2 configuration.
half this value!
(bits from 0 to (LSB-1) are internally set to 1)
Maximum commutation delay:
step size = 2 maximum = (2
(LSB-1)
(MSB)
/
ClockOutPrescaler
- 1) /
ClockOutPrescaler
Table 6 Numeral application with CLOCK = 16MHz
DELAYS
CLOCKOUTPRESCALER=
CLOCK/4 = 4 MHZ
CLOCKOUTPRESCALER=
CLOCK/8 = 2 MHZ
MIN STEP MAX MIN STEP MAX MIN STEP MAX MIN STEP MAX
Z
C
ComDeLim 31µs32µs 511ms 63µs64µs 1.02ms
63µs64µs 1.02ms127µs 128µs 2.05µs 255µs 256µs 4.1ms 511µs 512µs 8.2ms
1999June10 17
CLOCKOUTPRESCALER=
CLOCK/16 = 1MHZ
127µs 128µs 2.05ms255µs 256µs 4.1ms
CLOCKOUTPRESCALER=
CLOCK/32 = 0.5MHZ
Page 18
Philips Semiconductors Preliminary specification

Spindle current loop

The spindle current I
is sensed by internal current mirrors and copied to an internal resistor R
Spin
SpinLoopGain
. The current loop input is controlled by the internal FLL/PLL speed loop. The transconductance is defined by the following formula (see Fig.3) :
I
G
A()V()⁄[]
Spin
--------------------------------------------­V
Spin
SpinSpeedFilter
530
-----------------------------------­R
SpinLoopGain
530
-----------------­1700
312mAV====
(1)
The spindle current loop bandwidth is given by the following formula : (gm means transconductance : di/dv)
R
SpinLoopGain
× gm
-----------------------------------­530
2π⋅ C×
NMOS
SpinCompens
are : gm
×
= 50µA/V & gm
OTA
NMOS
65.510
NMOS
6–
×==
I
Spin
-----------------------------------­C
SpinCompens
= 2.62 x Sqrt(I
Spin
(2)
)A/V
BW
SpinCurLoop
where the typical values for gm BW
SpinCurLoop
should be kept <= 20kHz, whatever the current. Take care of the fact that the higher the current, the higher
gm
OTA
--------------------------------------------------------------------------------------------
and gm
OTA
the BandWidth => the bandwidth is maximum at Start-Up. To make sure that the OTA output is 0V when Run/Stop bit = ‘0’, a 30mV (typ.) offset is introduced inside the OTA. By
this way, we make sure that SpinCompens external capacitor is kept discharged until the next start-up.

Spindle FLL/PLL speed loop :

An internal speed loop is provided, intended to work with12 polesspindle motors. It is mainly composed of a Frequency Locked Loop. A Phase Locked Loop can be associated when bit 9 in register #5 (PllOn/Off) is ‘1’. The typical FLL charge pump current is 500µA while the typical PLL charge pump current is given in table 7 :
Table 7 PLL charge pump typical current (PllCur[1,0] are bits 8 & 7 in register #5):
PLLCUR[1,0] PLL CH. PUMP CURRENT
00 0.25µA 01 0.5µA 10 0.75µA
11 1µA
A 15-bit division factor (Speed[14,0]) is used to set the required speed split in bits [11,9] in register #5 and bits [11,0] in register #6:
The Speed[14,0] division factor can be calculated by :
Speed140,[]
5
×=
--­3
CLOCK
------------------------------------------------------------­SpindleSpeedrpm()
(3)
Where CLOCK is between 10MHz and 33MHz. When the spindle is not running (Run/Stop = ‘0’) the FLL charge pump discharge current is active so that the external
filter is discharged before the next start-up. When the spindle is running (Run/Stop = ‘1’), the speed can be continuously monitored on pin SpinMechClock (1 pulse per revolution / 50% duty cycle waveform).

SPINDLE / VCM 6-bit current DAC:

An internal 6-bit current DAC is used to limit the spindle start-up current (bit 6 in register #5 : Dac6ToVcm = ‘0’) or to cancel the VCM loop offset ( Dac6ToVcm = ‘1’).
1999June10 18
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Philips Semiconductors Preliminary specification
When the 6-bit DAC is used for the spindle, the LSB current is set externally, by means of a 33k resistor (to have a very good absolute accuracy). The Spindle Current limit is then set by 31 steps of 20mA. Please note that only the positive codes of the 6-bit DAC can be used, so only (25 - 1) = 31 steps can be defined.
Table 8 Spindle Start-up current limit according to the spindle 6-bit DAC code :
INPUT CODE SPINDLE START-UP CURRENT
000000 0mA 000001 20mA
011111 620mA
When the 6-bit DAC is used for the VCM section, the LSB current is set by an internal resitor to have a good matching with the 2 internal resistors used to set the VCM loop Gain. The VCM current offset is set by steps of :
I
VCMOffsetLSB()
1.613103–⋅
------------------------------­R
Sense
Table 9 VCM current offset according to the spindle 6-bit DAC code (assuming that R
A()=
= 1, 1LSB = 1.613mA) :
Sense
(4)
INPUT CODE VCM OFFSET CURRENT
011111 +50mA 000000 0µA 1111111 -1.613mA 100001 -50mA 100000 -50mA

VCM driver

The VCM is a linear, AB class type with both low-side and high-side drivers configured as a H-bridge. The zero-current reference voltage for the VCM loop is internally set at Vdd5/2=2.5V. The sense resistor R
enables the VCM current
sense
to be measured through the sense amplifier. The gain of the sense amplifier is internally set to typically 3. The output VcmSenseOut is given by the following equation:
VcmSenseOut 3 VcmSenseInPVcmSenseInM–()VcmRef+×=
(5)
Figure 14 presents the VCM sense amplifier.
VcmRef
18
I
VCM
3R
R = 10 k
23
VcmSenseInP
R
+
Rsense
VcmSenseInM
22
R
Fig.11 VCM sense amplifier
1999June10 19
-
3R
Page 20
Philips Semiconductors Preliminary specification
The error amplifier compares the VcmDacOut(49) input command and the VcmSenseOut(18) sense amplifier output signal to generate the control voltage of the power drivers.
I
VcmSenseInP
VcmSenseInM
VCM
23
+
SENSE
22
AMPLIFIER
G=3
-
R
in
sense
R
VcmDacOutVcmRef–
-----------------------------------------------------------------
R
VcmCompensIn
Fig.12 VCM transconductance gain schematic.
VcmSenseOutVcmRef–
-------------------------------------------------------------------------
FB
R
FB
VcmRef
18
19
+
ERROR
AMP
-
3R
× I
==
----------------------------------------------
VcmCompensOut
R
in
×
sense
VCM
R
FB
17
VcmInput
to the power
drivers
20
(6)
Finally, the transconductance gain of the VCM loop is given by the following equation:
G
A()V()⁄[]
VCM
I
----------------------------------------------------------------­VcmDacOutVcmRef–
VCM
R
---------­R
FB
in
×
--------------------------­3R
×
1
sense
0.4
===
----------------­R
sense
(7)

VCM 12-bit resistive ladder DAC:

The VCM loop input voltage is provided by an internal signed 12-bit resistive ladder DAC. The output voltage is a linear function of the input code written in register #7 (low gain) or register #8 (high gain), bits [11:0] :
Table 10Dac12 output voltage versus the input code (1 LSB=125µV) when writing in register #7 :
INPUT CODE DAC12 VOLTAGE
(7FF) (000)
(FFF)
(800)
H H
H
H
1.732V-1LSB
1.482V
1.482V-1LSB
1.232V
Table 11Dac12 output voltage versus the input code (1 LSB = 500µV) when writing in register #8 :
INPUT CODE DAC12 VOLTAGE
(7FF)
(000)
(FFF)
(800)
H H
H
H
2.482V-1LSB
1.482V
1.482V-1LSB
0.482V
Warning : at power up, the 12-bit DAC needs to be programmed so that it is in a defined state. VCM back-EMF amplifier
To prevent any actuator crash on the disk when a ramp load is used, an internal VCM back-EMF amplifier is build to monitor the actuator speed. Indeed, the VCM back-EMF is a picture of the actuator speed. The voltage across the VCM motor is divided in several contributions:
1999June10 20
Page 21
Philips Semiconductors Preliminary specification
Act+
L
dI
----------------
VCM
dt
VCM
e++=
+
I
I
VCM
If the VCM current I
Figure 14 presents the VCM back-EMF amplifier as it is implemented in the TDA5345HT:
VcmMinus
VCM
Act-
V
VCM
can be considered as constant, the back-EMF becomes:
VCM
Act+
V
VCM
R2
(6)
(ext.)
(30)
<=>
VCM
R
VCMIVCM
eV
(ext.)
R
VCM
Fig.13 VCM motor model
×()L
VCM
R
VCMIVCM
 
VCM
×()–=
×
R1
OpAmpOut
(ext.)
Rsense
OpAmpInM
(31)
2RR
VCM
back-EMF
e
+
R = 10 k
Act-
(8)
(9)
I
(ext.)
VCM
(22)
VcmSenseInM
VCM
VcmPlus
(11)
Fig.14 VCM back-EMF amplifier
The first operational amplifier output voltage (OpAmpOut) is:
OpAmpOut VcmSenseInM
The VCM back-EMF amplifier output voltage (VcmBemf) is:
VcmBemf 2 VcmPlusOpAmpOut–()× VcmRef+=

VcmBemf 2 VcmPlus VcmSenseInM
–× VcmRef+=

VcmBemf
R
(29)
2R
(18)
R1

–=
R
--------

R2
R1
R
-------­R2
VcmRef=1.482V
××
SenseIVCM
××〈〉–
SenseIVCM
(10)
(11)
(12)
1999June10 21
Page 22
Philips Semiconductors Preliminary specification
R1

+–
R
--------

R2
××
SenseIVCM
(13)
Where:
VcmBemf 2 V( cmPlusVcmSenseInM)

× VcmRef+=

V
VCM
VcmPlusVcmSenseInM–()–=
(14)
and if you set:
R1
R
× R
--------
Sense
R2
=
VCM
(15)
you get:
VcmBemf 2– V
VcmBemf 2– e×= VcmRef+
VCMRVCMIVCM
×()×= VcmRef+
(16)
(17)

VCM ramp unload sequence :

The VCM ramp unload sequence can be ordered by either the serial interface or by internal emergency procedures: power down or temperature shut down.It will not start if VcmSleep bit is ‘1’, because the actuator is supposed to be on the ramp already.
Three different states are programmable : first a VCM brake, second a VCM slow retract and then a VCM full power retract.
In all cases, the spindle isolation switch is cut off. If the power transistors are still supplied, the VCM current will come from the power supply, through the isolation switch parasitic diode. If the power transistors are no more supplied, the VCM current will come from the spindle itself. It is used as a generator, thanks to its back-EMF.
When the sequence is initiated by a Power down detection, PorN signal will not go up until the end of the sequence. Figure 14 shows the link created between the spindle and the VCM power structures to transfer the spindle energy to
the actuator :
1999June10 22
Page 23
Philips Semiconductors Preliminary specification
63
62
(ext.)
Isolation switch, used in reverse mode
VDD=5V
(ext.)
1
PA
MotA
NA
(ext.)
Fig.15 Power transistors structure during a retract phase
During the VCM brake, VCM power transistors N- & N+ are switched fully On while transistors P- & P+ are switched off. During the soft retract step, N- transistor is switched off while the retract PMOS brings some current to the VCM. The control loop is drawn in figure 14 (the voltage on VcmMinus is regulated).
SpinRectBemf
2
PB
NB
5
10
PC
MotB
NC
15
(ext.)
PA (resp. PB, PC) is switched On
NA (resp. NB, NC) is switched On
Retract PMOS
4
Off
MotC
P-
Off
N-
GND=0V
The back-EMF is synchronously rectified by the spindle power transistors:
when MotA (resp. MotB, MotC) is aboveSpinRectBemf
when MotA (resp. MotB, MotC) is belowGND
Vcm-
Vcm+
9
VCM
Rsense
14
Off
P+
On
N+
(ext.)
VcmMinus
(6)
Fig.16 VCM retract circuitry
Rsense
(ext.)
RetPmosDrain
(62)
Programmable
VCM
voltage divider
(11)
On
1999June10 23
VcmPlus
SpinRectBemf
Internal voltage reference => 125 mV in slow retract => 250mV in full power.
(2)
Retract PMOS
retract amplifier
Page 24
Philips Semiconductors Preliminary specification
Table 12VcmMinus voltage during the slow retract step versus Vretract[2:0] programming (bits [2:0] in register #2):
VRETRACT[2:0] VCMMINUS VOLTAGE
111 1V
... ...
001 250mV 000 125mV
In full power mode, VcmMinus voltage is limited to 2.8V. When the spindle back-EMF is used as a supply (power down) the voltage will not be so high. The loop is working in saturation mode and the retract PMOS is fully saturated.
It is possible to have a kind of “soft rising” slope on VcmMinus voltage when switching from the slow retract state (VcmMinus voltage is small) to the full power state (VcmMinus voltage is high). An internal digital counter generates some steps (250mV high) from V
VcmMinus
During all the VCM ramp unload sequence, a programmable state machine is activated, clocked by the spindle back-EMF on SpinMotA.
(SlowRetract) to V
VcmMinus
(FullPower) when VcmRetSoftRis = ‘1’ (bit 3, reg #2).
If T
is the spindle back-EMF period, the steps duration will vary according to the following table:
bEMF
Table 13Brake duration versus the T_VcmBrake[2:0] programming (bits [2:0] in register #3):
T_VCMBRAKE[2:0] BRAKE DURATION
111 7*(2*T
... ...
010 2*(2*T 001 1*(2*T 000 0
bEMF
bEMF bEMF
) +T
) +T ) +T
bEMF
bEMF bEMF
Table 14Slow retract duration versus the T_SlowRet[5:0] programming (bits [8:3] in register #3):
T_SLOWRET[5:0] SLOW RET. DURATION
111111 63*T
... ...
000010 2*T 000001 1*T 000000 0
bEMF+TbEMF
bEMF+TbEMF bEMF+TbEMF
Table 15Full Power retract duration versus the T_FullPower[2:0] programming (bits [11:9] in register #3):
T_FULLPOW[2:0] FULL POWER DURATION
111 7*(32*T
... ...
010 2*(32*T 001 1*(32*T 000 0
bEMF
bEMF bEMF
) +T
) +T ) +T
bEMF
bEMF bEMF
* Include typical waveform
1999June10 24
Page 25
Philips Semiconductors Preliminary specification
VCM+
SOFT RISING
VCM-
BRAKE
SOFT RETRACT
FULL POWER
BRAKE DELAY
FCK135
Fig.17 The states for the VCM retract

Spindle brake after retract sequence :

In case of power down, an emergency procedure is initiated by the PorN signal : the spindle back-EMF is synchronously rectified to supply the VCM ramp unload function. At the end of the full power step, a spindle short-circuit brake is activated (SpinMotA, SpinMotB & SpinMotC are together short-circuited to ground). It is supplied by an external reservoir capacitor connected to pin BrakePower (60).
Shock sensor amplifier:
A complete circuitry is included on-chip to control an external shock sensor. Figure 14 shows a typical application diagram:
1999June10 25
Page 26
Philips Semiconductors Preliminary specification
Shock Sensor
C
sensor
(55)
Cgain
R
HPF
ShockAmpOut
Amplifier x20
-
(54)
+
-
2
+
3
ShockInput
1
+
-
Amplifier x16.3
(50)
ShockRef
Fig.18 Shock sensor control circuitry
The first amplifier gain is given by : G = C 220µV/G on the 1st stage output.
2V
gain/Csensor
. It has to be set so that the sensor voltage sensitivity becomes
(ext.)
(53)
ShockFiltOut
R
380k
20k
ShockCom
C
com
Window comparator
(51)
C
4
programmable threshold
ShockCompOut
(52)
The 2nd amplifier stage gain is internally set to 16.3. The 3rd amplifier stage gain is internally set to 20. The external capacitor C pass filter pole. The internal RC low pass filter pole is 8kHz typical. The window of the comparator input (ShockCompInP) is programmable through the serial interface. The values are given in the following table:
Table 16Window comparator threshold versus ShockThresh[1:0] (bits [9,8] in register #4):

Temperature monitor:

The TDA5345HT includes an analog circuitry that monitors the junction temperature. Figure 25 shows its diagram:
and R
com
SHOCKTHRESH[1:0] WINDOW
have to be chosen so that : C
HPF
000 74mV 227µV 001 148mV 454µV 010 222mV 681µV 011 296mV 908µV
100 370mV 1.135mV 101 444mV 1.362mV 110 518mV 1.589mV
111 592mV 1.816mV
com
x20k = C
gainxRHPF
. This time constant makes the input high
2ND STAGE INPUT
SENSITIVITY
1999June10 26
Page 27
Philips Semiconductors Preliminary specification
junction thermometer
V
160_Deg
Temp shut
Voltage Converter
V
145_Deg
Fig.19 Temperature monitor circuitry
The device is protected against over-temperature by the temperature shutdown circuit. When the temperature of the chip exceeds 160°C, the device is automatically set to a VCM retract and a spindle disable mode. It remains in this mode until the temperature goes below 160°C- 30°C= 130°C (30°C is an internal hysteresis).
During normal operation, the signal TempMux provides either a voltage that is function of the chip temperature when TempSelect = ‘1’ or a digital warning when TempSelect = ‘0’.
When the analog information is selected, the equation of the voltage versus the temperature is:
V
TempMux
2.954 7.55103–⋅
 
Temperature°C()×–=
1
0
TempMux
55
TempSelect (bit 0, reg#3)
(18)
When the digital information is selected, you get a temperature warning on pin TempMux (57). If the internal temperature over passes 145°C, TempMux = ‘1’ and remains high until the temperature comes below 130°C (see Fig.19).
V
TempMux
Fig.20 V
IT IS STRONGLY ADVISED TO USE THE TempMux INFORMATION (analog or digital) TO GENERATE EMERGENCY PROCEDURES INSTEAD OF WAITING FOR THE TEMPERATURE SHUT DOWN MODE TO TRIGGER. The temperature shut down has to considered as an ultimate self-protection.
(V)
Vdd5
0
TempMux
0
behaviour versus temperature (TempSelect = ‘1’)
130
145
TEMPERATURE (°C)
1999June10 27
Page 28
Philips Semiconductors Preliminary specification

Power on reset

The Power On Reset circuit monitors the voltage level of +5V supply voltage (pin named VddAna1). The PorN output (pin #25) is set HIGH when the +5V supply voltage arise above a specified voltage threshold plus an
hysteresis. This LOW to HIGH transition is delayed by a time TC that is determined by the external PorCap capacitor (connected to pin #26).
This PorN output remains HIGH until +5V supply drops below its voltage threshold. PorN output immediately becomes LOW. A brake after retract is initiated and the digital section is reset while PorN remains LOW.
The C reference voltage V
The T
capacitor is charged by a constant current I
PorCap
. The TC time is set then by the following equation:
PorRef
C
T
C
PorCap
time value only depends on the external C
C
VDD
V
hysteresis
1 V
POR_N
V
PorRef
× C
------------------­I
PorCap
PorCap
× C
PorCap
capacitor value.
PorCap
T
c
. The voltage on PorCap pin is compared to the POR circuit
1.23V
------------------­210
PorCap
6–
615103⋅×===
(19)
threshold
t
T
c
t
Fig.21 Power on reset timing
The value of the +5V supply threshold voltage can be adjusted by adding an external resistor divider on the Por5Adj(28) . Internally, pin is designed as it is described in figure 20.
Por5Adj
(24)
VddAna1
(28)
R
H5
R
L5
(32)
GndAna2
to the POR circuit
Fig.22 Por5vAdj pin
It is advised to connect external capacitors on pins Por5Adj to filter the power supplies noise. See figure 21.
1999June10 28
Page 29
Philips Semiconductors Preliminary specification
Supply
t
Por5Adj signal with a capacitor
V
PorN
5V
Fig.23 Glitch detector timing
The PorN output can also be driven by the retract sequence manager: If there is a power supply failure at the sequence start-up or during the sequence, PorN will be kept low during all the
programmed sequence, what ever the supply is restored or not.
0V
Vref=1.23V
Tc
Vdd5
4.1V
PorN
Tc
t
t
VCM-
FCK136
Fig.23
Caution !!
It is not allowed to wake the VCM up ( VcmSleep=‘0’’) if the spindle is not on speed, because a retract sequence would start on a power supply failure without any clock (generated from the spindle back-EMF). PorN would be maintained low by the retract manager, waiting for clock pulses.
1999June10 29
Page 30
Philips Semiconductors Preliminary specification

3.3V linear regulator:

The Tda5345HT includes an analog amplifier suited to drive an external NPN that will supply the 3.3V digital chips used in the applicationtogether with the internal digital outputs (pins SpinDigOut (44), SpinMechClock (43), PowerFault (37), ShockCompOut (52), TempMux (57)). The external pin Reg3v3PwrUp is used to enable (Reg3v3Pwr = 5V) or disable the regulator (Reg3v3Pwr = 0V). When Reg3v3Pwr = 0V, it is possible however to wake the regulator up through the Reg3v3Enable bit (bit number 1 in register #4).
It has been designed to minimise the external components count. Figure 25 shows the regulator diagram:
Reg3v3Enable
(from serial interface)
Enable
1.23V
internal BandGap voltage reference

Negative supply regulator (-3V) :

800
2 k
1.24 k
Reg3v3PwrUp
(34)
(46)
RegNPNBase
RegSense
(47)
TempMux
SpinDigOut PowerFault SpinMechClock
ShockCompOut
Vdd5
2SC4210 or similar NPN
3.26V
Fig.25 3.3V linear regulator
decoupling cap
To 3.3V ICs
5µF
A capacitor-based negative supply regulator is also provided. Due to process limitations, 2 external shottky diodes need to be added to the 2 external capacitors to make it work.
Figure 25 shows the regulator diagram:
1999June10 30
Page 31
Philips Semiconductors Preliminary specification
CLOCK
Programmable
divider
500 kHz
Switch
manager
Vdd5
PumpNeg3V
Neg3V
(36)
(35)
Load
3 bits
Band Gap
1.23V
RegNegClk[2,0]
Fig.26 -3V switched cap. regulator
Depending on the external CLOCK value, the programmable CLOCK divider has to be programmed according to the following table :
Table 17Division factor to program in order to get 500kHz for the -3V switched cap. regulator :
CLOCK REGNEGCLK[2:0] DIVISION FACTOR
10MHz 000 20
12.5MHz 001 22 15MHz 010 30
16.5MHz 011 32 20MHz 100 40 25MHz 101 50 30MHz 110 60 33MHz 111 66
Adjustable bandgap :
An internal regulated voltage source (called BandGap) delivers a very accurate voltage to many different circuitry inside the IC. This voltage (1.23V) is almost independant of power supply, temperature and process spread. However, there is still a +/- 3% spread on this voltage. To come to about +/- 0.5%, it is possible to adjust this voltage from an external micro controller with a very accurate voltage source and an ADC. The following table gives the voltage added or substracted to the BandGap voltage according to the code written in register 2, bit 4 to 6.
1999June10 31
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Philips Semiconductors Preliminary specification
Table 18BandGap :
BDGAPADJ[2,0] VOLTAGE ADJUSTMENT
011 -27.6mV 010 -18.4mV 001 -9.2mV 000 0mV 111 9.2mV 110 18.4mV 101 27.6mV 100 0mV
1999June10 32
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Philips Semiconductors Preliminary specification

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply voltage V
DD5A/D
Voice coil motor driver I
out
R
DSon
Spindle motor driver I
out_StartUp
I
out_Brake
R
DSon
+5V supply voltage 4.5 5.0 5.5 V
maximum VCM output current 400 mA VCM power MOS total on
resistance
Tj=140°C V
= 4.5V
DD5
−−1.5
maximum spindle output current start-up - 620 mA spindle output current Brake - - 1.5 A spindle power MOS total on
resistance
Tj=140°C V
= 4.5V
DD5
- - 1.5

ORDERING INFORMATION

PACKAGE
TYPE NUMBER
NAME DESCRIPTION VERSION
TDA5345HT TQFP64 plastic low profile quad flat package; 64 leads;
SOT 357BB6
body10x10x1.2mm
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DD5A/D
V
DD5A/D
V
PeakVCM
+5V supplies indefinite time period - 0.3 5.5 V +5V supplies see note1 -0.3 7 V VCM drive output voltage Inductance connected to
0.5 V
+ 0.5 V
DD5
VCM+ and VCM-
I
PeakVCM
VCM drive output peak
peak < 0.5 s 1.0 A
current
V
PeakSpin
spindle drive output voltage Inductance connected to
-0.5 V
+ 0.5 V
DD5
SpinMotA, B & C.
I
PeakSpin
spindle drive output peak
peak < 0.5s 2.0 A
current
V
i
P
tot
T
stor
T
j(max)
other pins I < 1mA -0.5 V
+ 0.5 V
DD5
total Power dissipation 1.1 W IC storage temperature 55 +125 °C junction temperature +140 °C
Note to the limiting values:
1.Stress beyond these levels may cause permanent damage to the device. This is a stress rating only and functional operation of the device under this condition is not implied.
1999June10 33
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Philips Semiconductors Preliminary specification

RECOMMANDED OPERATING CONDITIONS

SYMBOL PARAMETER MIN MAX UNIT
V
DDN
T
AMB
T
JUNC

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices.
ESD according to MIL STD 883C - method 3015 (HBM 1 500, 100pF) 3 pulses (+) and 3 pulses (-) on each pin versus ground - Class 1: 0 to 1 999 V

THERMAL RESISTANCE

SYMBOL PARAMETER VALUE UNIT
R
th j-a
supply voltage 4.5 5.5 V operating ambient temperature 0 85 °C junctiontemperature 0 140 °C
from junction to ambient in free air (TQFP64, SOT 357BB6) 50 °C/W
This is obtained in a PCB tailored to heat dissipation : pin number 16, 32, 48, 64 have to be connected to a good ground layer to improve the IC heat dissipation.
1999June10 34
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Philips Semiconductors Preliminary specification
ELECTRICAL CHARACTERISTICS (Condition: V

1. Supply current

1-1 Analog and power supply (pin 4, 14, 63, 24, 56together) when there is no current in spindle & VCM motors
= 4.5-5.5V; T
DD5
= 0-85°C; unless otherwise specified); GBD means Guaranted by Design.
AMB
SYMBOL PARAMETER CONDITIONS MIN.
I
Sleep
I
Sleep1
I
Sleep2
I
Sleep3
I
Sleep4
I
Sleep5
sleep current all Sleep bits = ‘1’ 1.1 mA sleep mode 1 current only Spindle is active 8.8 mA sleep mode 2 current only ShockSen is active 2.7 mA sleep mode 3 current only -3V reg is active 8 mA sleep mode 4 current only DAC12 is active 4.4 mA sleep mode 5 current only DAC12 & VCM are
TYP.
MAX.
9mA
active
I
Supply
supply current all sections are active 25.5 mA
1-2 digital supply (Vdd5Dig)
SYMBOL PARAMETER CONDITIONS MIN.
I
Sleep
I
Supply
sleep current spinSleep bits = ‘1’ 56 µA/MHz supply current spinSleep bits = ‘0’ 78 µA/MHz
TYP.
MAX.

2. DIGITAL section

2-1 Inputs / Outputs (3.3V regulator ENABLED !)
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
IH
V
IL
V
OH
V
OL
t
r/f
I
IN
high level input voltage 2.0 V low level input voltage 0.8 V high level output voltage (I low level output voltage (I
= 100µA) V
OUT
= 100µA) 0.4 V
OUT
-0.5 V
3v3
rise/Fall time C = 20pF, GbD 20 ns input leakage current +/- 1 µA
Unit
Unit
2-2 16-bit serial interface
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT.
f
SCLK
δ
SCLK
tr
SCLK
tf
SCLK
t
START
serial Clock GbD 33 MHz serial Clock duty cycle GbD 30 50 70 % serial Clock rise time GbD 10 ns serial Clock fall time GbD 10 ns chip Select to first Active
GbD T
/2 ns
SCLK
clock edge
t
SU
data to clock setup time GbD 8 ns
1999June10 35
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Philips Semiconductors Preliminary specification
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT.
t
HD
t
FINISH
t
WAIT

3. Spindle circuits

3-1 Spindle driver: (assuming that Resistor @ pin RefCurRes is exactly 33k)
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT.
R
DSon
I
StartMax
I
StartStep
I
StartRes
I
RUN
SR
1
SR
2
SR
3
SR
4
ACC
R_FB
V
fbmax
V
fbmin
I
BP
clock to data hold time GbD 2 ns last active clock to chip
GbD T
/2 ns
SCLK
select inactive on write time between successive
serial port accesses
total FET resistance I
GbD 5 CLOCK
cycles
= 620 mA 1.5
SPIN
maximum start-up current DAC6[5,0] = “011111” 620 mA start-up current step 20 mA start-up current resolution 5 5 bits running current continuous 300 mA fly-backs slew rate control FlyBackSlope[0,1] = “00” 19 26.5 34 mV/µs fly-backs slew rate control FlyBackSlope[0,1] = “01” 48 59 70 mV/µs fly-backs slew rate control FlyBackSlope[0,1] = “10” 105 124 143 mV/µs fly-backs slew rate control FlyBackSlope[01] = “11” 222 256 290 mV/µs relative accuracy on the 6
-20 +20 %
fly-backs slew-rate max voltage on spinmotx positive fly-back, I
<100mA
Vdd5+
0.05
Vdd5+
0.2
Vdd5+
0.35 min voltage on spinmotx neg. fly-back, I <100mA -0.35V -0.2V -0.05V V brake power leakage PorN = “0”, GbD 5 250 nA
V
3-2 Spindle current loop (assuming that Resistor @ pin RefCurRes is exactly 33k)
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
ACC
StCur
spindle start-up current
I
> 400mA -6 +6 %
StUp
accuracy
ACCR
StCur
current relative accuracy
I
> 400mA -5 + 5 %
StUp
between each phase
gm
OTA
OTA transconductance GbD 35 50 65 µA/V
3-3 Spindle Fll Charge Pump (assuming that Resistor @ pin RefCurRes is exactly 33k)
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
ch/disch
SYM
Cur
charge/discharge current 465 500 535 µA charge/discharge currents
0.98 1.02
symetry
t
r/f
rise/Fall time GbD 1 2 ns
1999June10 36
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Philips Semiconductors Preliminary specification
3-4 Spindle Pll Charge Pump (assuming that Resistor @ pin RefCurRes is exactly 33k)
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
ch/disch00
I
ch/disch01
I
ch/disch10
I
ch/disch11
SYM
Cur
3-5 back-EMF comparator
charge/discharge current PllCur[1,0] = “00” 0.212 0.25 0.287 µA charge/discharge current PllCur[1,0] = “01” 0.425 0.5 0.575 µA charge/discharge current PllCur[1,0] = “10” 0.612 0.72 0.828 µA charge/discharge current PllCur[1,0] = “11” 0.808 0.95 1.09 µA chargedischarge currents
0.93 1.07
symetry rise/Fall time GbD 1 2 ns
SYMBOL PARAMETER CONDITIONS MIN.
V V V
OSen OSdis CT
comparator offset start up mode 1 8 15 mV comparator offset running mode -5 0 5 mV center tap bias voltage biasCt = ‘1’ or PorN = ‘0’ SpinRect
TYP.
Bemf/2
MAX.

4. VCM circuits 4-1 VCM driver

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R
DSon
I
OS
I
Max+400
I
Max-400
I
Max+100
I
Max-100
total FET resistance (I output offset current DAC12 = “00000000000”
maximum positive current high Gain, without offset 384 400 416 mA maximum negative currenthigh Gain, without offset -416 -400 -384 mA maximum positive current low Gain, without offset 92.5 98.5 102.5 mA maximum negative currentlow Gain, without offset -102.5 -98.5 -92.5 mA
Lin transconductance linearity 3 different sections
= 400mA) 1.5
VCM
-10 +10 mA
& R
Sense
= 1
-3 +3 %
measured
I
QUIES
V
VcmVdd5Div2
G
PD
quiescent current 2 legs of the H-bridge 3.4 15 mA reference voltage accuracyRef = Vdd5/2 -3 +3 % power driver gain 4.8 4.95 5.1 V/V
DISTO crossover distortion GbD 0 V
V
fbmax
fbmin
max voltage on Vcm+ or
positive fly-back, I<100mA Vdd5+
Vcm­min voltage on Vcm+/- negative fly-back,
0.1
Vdd5+
0.2
Vdd5+
0.3
-0.3 -0.2 -0.1 V
I<100mA
V
RetRefSR
V
RetRefFP
V
RetLim
R
RetTot
retract circutry ref voltage slow retract mode 110 125 140 mV retract circutry ref voltage full power retract mode 220 250 280 mV retract voltage limitation full power retract mode 2.45 2.8 3.14 V total mos resistance in
retract mode
spinRectBemf >= 2.5V GbD
3.5
Unit
V
V
1999June10 37
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Philips Semiconductors Preliminary specification
4-2 VCM current control
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITS
GBW error amplifier bandwidth @ unity Gain, GbD 4 5.5 MHz V
VcmRef
V
ClampOutL
V
ClampOutL
4-3 VCM current sense amplifier
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
ComMod
BW bandwidth GbD 260 530 kHz R
FB
PSRR power supply rejection
CMRR common mode rejection
Vcm loop ref. voltage generated by DAC-12 1.402 1.482 1.562 V error amp out clamping Vdd5 = 5V 1.2 1.3 1.4 V error amp out clamping Vdd5 = 5V 3.6 3.7 3.8 V
input voltage range -0.3 V
DD5
+0.3
feed back resistor 2.5 3.145 3.9 k
@ 1kHz, GbD 60 dB
ratio
@ 1kHz, GbD 60 dB
ratio
V
4-4 VCM back-EMF amplifier
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
ComMod
input voltage range both OpAmps -0.3 V
DD5
+0.3
V
OL
V
OH
minimum output voltage both OpAmps, GbD 100 mV maximum output voltage both OpAmps, GbD V
DD5
-0.1
PSRR power supply rejection
ratio
CMRR common mode rejection
ratio
both OpAmps, @ 1kHz, GbD
both OpAmps, @ 1kHz, GbD
60 dB
60 dB
GBW unity-gain bandwidth 0.77 1.6 MHz
1rst stage input offset -5 +5 mV
G
BEMF2
V
OS2
2nd stage amplifier gain 1.96 2 2.04 2nd stage output offset -20 +20 mV
4-5 VCM DAC12
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
RESO t
SET
Vref
HighHG
Vref
HighLG
Vref
Middle
Vref
LowLG
12
resolution 12 12 Bits settling time to within 0.5LSB 2.0 µs output voltage @ code 7FFcode written to register #8 2.382 2.482 2.582 V output voltage @ code 7FFcode written to register #7 1.652 1.732 1.852 V output voltage @ code 000 1.422 1.482 1.542 V
code written to register #7 1.192 1.232 1.272 V
V
V
1999June10 38
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Philips Semiconductors Preliminary specification
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
ClampOutL
INL
12
DNL
12
4-6 VCM offset current using DAC 6
output voltage @ code 800code written to register #8 0.462 0.482 0.502 V integral non-linearity -5 +5 LSB differential non-linearity -0.5 +0.5 LSB
SYMBOL PARAMETER CONDITIONS MIN.
RESO
t
SetFull
t
SetLSB
I
OffFullPos
I
OffFullNeg
INL
6
DNL
6
6
resolution 6 6 Bits settling time, full range GbD 2.0 µs settling time, 1LSB GbD 1.0 µs full scale positive current 45 50 55 mA full scale negative current -55 -50 -45 mA integral non-linearity -1 +1 LSB differential non-linearity -0.5 +0.5 LSB

5. Others features 5-1 Power-On-Reset circuit:

SYMBOL PARAMETER CONDITIONS MIN.
V
T5
threshold voltage level for the 5V supply.
V
H5
R
L5
5V detection hysteresis 80 110 140 mV resistor between Por5Adj
and GND
RATIO i
CPOR
V
OP
V
OL
R
PU
t
RES
5v
por5Adj resistors ratio Ratio5 = RL5 / (RL5 + RH5) 0.3 por cap current charge 2.4 µA minimum operating voltageGbD 0.5 V low level output voltage IL = 1mA 0.5 V pull up resistor between Vdd5 & PorN 14 20 26 k response time 0.5 1 µs
TYP.
TYP.
MAX.
MAX. UNIT
Unit
3.98 4.1 4.22 V
54 k
5-2 Low voltage monitor circuit:
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
FAULT
V
Hfault
t
RES
fault detect voltage 4.08 4.2 4.32 V fault detection hysteresis 70 100 130 mV response time 0.5 1 µs
1999June10 39
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Philips Semiconductors Preliminary specification
5-3 Thermal monitor
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
OLT
V
OHT
V
ONT
K
TEMP
T
Warn
T
Why
T
Shut
T
Shy
5-4 Shock Sensor
output voltage at low temp T output voltage at high tempT
= 0°C, TempSel = 1 2.954 V
JUNC JUNC
= 150°C,
1.896 V
TempSel =1
output voltage at 25°CT
= 25°C, TempSel
JUNC
2.769 V
=1 temperature coefficient -7.55 mV/ thermal warning threshold tempSel = 0 145 °C thermal warning hysteresistempSel = 0 15 °C temperature Shutdown 160 °C thermal Shutdown
30 °C
hysteresis
SYMBOL PARAMETER CONDITIONS MIN.
I
leak
S Fc V V V V V V V V
in
RC T1 T2 T3 T4 T5 T6 T7 T8
shockinput leakage current@ Vref = 2V, GbD 5 nA input sensitivity @ 1kHz, GbD 35 µV RC filter cut-off frequency 6 8 10 kHz 2nd stage input window shockThreh[2,0] = “000” 122 227 306 µV 2nd stage input window shockThreh[2,0] = “001” 386 454 522 µV 2nd stage input window shockThreh[2,0] = “010” 612 681 750 µV 2nd stage input window shockThreh[2,0] = “011” 816 908 1000 µV 2nd stage input window shockThreh[2,0] = “100” 1021 1135 1248 µV 2nd stage input window shockThreh[2,0] = “101” 1226 1362 1498 µV 2nd stage input window shockThreh[2,0] = “110” 1430 1589 1747 µV 2nd stage input window shockThreh[2,0] = “111” 1634 1816 1998 µV
5-5 3.3 V DC-DC linear converter
SYMBOL PARAMETER CONDITIONS MIN.
I
SOURCE
I
SINK
C
DEC
V
O
source current 5 mA sink current 250 µA external decoupling cap 4.7 µF output voltage I
LOAD
constant
& NPN VBE <= 0.7V
V
O_4v1
output voltage same asVO +Vdd5 = 4.1V 3.05 3.2 3.45 V
TYP.
TYP.
MAX.
MAX.
Unit
Unit
3.15 3.3 3.45 V
BW control loopband width GbD 600 kHz
Note:
1.External NPN: 2SC4210 for instance
1999June10 40
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Philips Semiconductors Preliminary specification
5-5 -3 V switched capacitor regulator
SYMBOL PARAMETER CONDITIONS MIN.
I
OUT_max
V
OUT
V
OUT_4v1
maximum output current 100 mA output voltage shottky diodes Vf<= 0.4V -2.88 -3.0 -3.12 V output voltage shottky diodes Vf<= 0.4V,
tsw < 100ps & Vdd5 = 4.1V
R
O
output ripple Iout between 20 and
100mA + Note 1
Note:
1.C
>= 9.4µF , C
LOAD
PUMP
= 4.7µF
TYP.
MAX.
Unit
-2.7 V
30 mV
1999June10 41
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Philips Semiconductors Preliminary specification
+5V
(4) (14) (63) (40) (24) (56)
VcmVddM VcmVddP
IsoSwSo Vdd5Ana1Vdd5Ana2
Vdd5Dig
C2
R3
MR preamp
C6
R6
R5
R1
R2
C2
VCM
C4
R4
C1
C3
C5
(53)
ShockCom
(54)
ShockAmpOut
(51)
ShockFiltOut
(55)
ShockInput
(50)
ShockRef
(31)
OpAmpOut
(30)
OpAmpInM
(18)
VcmRef
(21)
VcmVdd5Div2
(11)
VcmPlus
(62)
RetPmDrain
(6)
VcmMinus
(23)
VcmSenseInP
(22)
VcmSenseInM
(17)
VcmCompensOut
(19)
VcmCompensIn
(20)
VcmInput
(49)
VcmDacOut
(45)
RetReset
(36)
Neg3V
(35)
PumpNeg3V
(33)
RefCurRes
(12)
NC1
(7)
NC2
SpinGndAB
SpinGndC GNDAna2GNDAna1
Reg3v3PwrUp(34)
RegNPNBase
RegSense
SpinMotA SpinMotB
SpinCenterTap
SpinMotC
SpinRectBemf
SpinVddA
SpinVddBC
BrakePower
SpinSpeedFilter
SpinCompens
BdGap
VcmBemf
TempMux
CLOCK
SCLK
SDATA SEN_N
SpinDigOut
SpinMechClock
ShockCompOut
PowerFault
PorN
PorCap
Por5Adj
VcmGndPow
GNDAna3
GndDig
(46) (47)
(3) (8)
(61) (13)
(2) (1) (10)
(60) (58) (59)
(27)
(29) (57)
(38) (41)
(39)
(42) (44) (43)
(52) (37) (25)
(26) (28)
(9)
C9
C11
T1
C14
Spindle
C13
C12
R7
Analog to dig. conv
ASIC
C7
3v3
C10
C8
(5)
Fig.27

TYPICAL APPLICATION SCHEMATIC

1999June10 42
(15)
(32)(16)
GND
(64)
(48)
Page 43
Philips Semiconductors Preliminary specification
TDA5345HT5 V spindle & VCM driver combo
NOTES
1999 June 10
43
Page 44
Philips Semiconductors Preliminary specification
TDA5345HT5 V spindle & VCM driver combo

Data sheet status

Data sheet status
Objective specification
Preliminary specification
Product specification
Product status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1999
All rights reserved. Printed in U.S.A.
Date of release: 09-99
Document order number: 9397 750 06404
 
1999 June 10
44
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