Datasheet STW12NK90Z Specification

N-channel 900V - 0.72Ω - 11A - TO-247

Zener-protected SuperMESH™ Power MOSFET

General features

Typ e V

STW12NK90Z 900V <0.88Ω 11A 230W

■ Extremely high dv/dt capability

■ 100% avalanche tested

■ Gate charge minimized

■ Very low intrinsic capacitances

■ Very good manufacturing repeatibility

DSS

Description

The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Such series complements ST full range of high
voltage MOSFETs including revolutionary
MDmesh™ products.

R

DS(on)

I

p

D

W

STW12NK90Z

TO-247

Internal schematic diagram

Applications

■ Switching application

Order codes

Part number Marking Package Packaging

STW12NK90Z W12NK90Z TO-247 Tube

October 2006 Rev 5 1/14

www.st.com

14

Contents STW12NK90Z

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Protection features of gate-to-source zener diodes . . . . . . . . . . . . . . . . . . 4

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2/14

STW12NK90Z Electrical ratings

1 Electrical ratings

Table 1. Absolute maximum ratings

Symbol Parameter Value Unit

I

V

V

DM

P

I

I

DS

GS

D

D

(1)

tot

Drain-source voltage (VGS = 0) 900 V

Gate- source voltage ± 30 V

Drain current (continuous) at TC = 25°C 11 A

Drain current (continuous) at TC = 100°C 7 A

Drain current (pulsed) 44 A

Total dissipation at TC = 25°C 230 W

Derating Factor 1.85 W/°C

V

ESD(G-S)

(2)

E

AS

T

stg

T

j

1. Pulse width limited by safe operating area.

2. ISD ≤11A, di/dt ≤200A/µs, VDD ≤ V

Gate source ESD(HBM-C=100pF, R=1.5KΩ) 6000 V

Single pulse avalanche energy 4.5 mJ

Storage temperature

-55 to 150 °C

Max. operating junction temperature

, Tj ≤ T

(BR)DSS

JMAX.

Table 2. Thermal data

Rthj-case Thermal resistance junction-case max 0.54 °C/W

Rthj-amb Thermal resistance junction-ambient max 50 °C/W

T

J

Maximum lead temperature for soldering purpose 300 °C

Table 3. Avalanche characteristics

Symbol Parameter Max value Unit

I

AR

E

Avalanche current, repetitive or not-repetitive
(pulse width limited by T

max)

j

Single pulse avalanche energy

AS

(starting T

= 25 °C, ID = IAR, VDD = 50 V)

j

11 A

500 mJ

Table 4. Gate-source zener diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

BV

Gate-source breakdown

GSO

voltage

Igs=± 1mA (open drain) 30 V

3/14

Electrical ratings STW12NK90Z

1.1 Protection features of gate-to-source zener diodes

The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.

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STW12NK90Z Electrical characteristics

2 Electrical characteristics

(T

=25°C unless otherwise specified)

CASE

Table 5. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)DSS

I

DSS

I

GSS

V

GS(th)

R

DS(on)

Drain-source
breakdown voltage

Zero gate voltage
drain current (V

GS

Gate-body leakage
current (V

DS

= 0)

= 0)

ID = 1mA, VGS =0 900 V

V

= max rating

DS

VDS = max rating,

= 125°C

T

C

1

50

VGS = ± 20V ±10 µA

Gate threshold voltage VDS = VGS, ID = 100µA 3 3.75 4.5 V

Static drain-source on
resistance

V

= 10V, ID = 5.5A 0.72 0.88 Ω

GS

Table 6. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

Forward

(1)

g

fs

C

C

C

C

oss eq

t

d(on)

t

t

d(off)

t

Q
Q
Q

1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.

2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as C
increases from 0 to 80% V

transconductance

Input capacitance

iss

Output capacitance

oss

Reverse transfer

rss

capacitance

Equivalent output

(2)

capacitance

Turn-on delay time
Rise time

r

Turn-off delay time
Fall time

f

Total gate charge

g

Gate-source charge

gs

Gate-drain charge

gd

DSS

.

= 15V, ID=5.5A 11 S

V

DS

= 25V, f = 1MHz,

V

DS

= 0

V

GS

= 0V, VDS = 0V

V

GS

to 800V

= 450V, ID = 5A

V

DD

RG=4.7Ω VGS = 10V
(see Figure 13)

VDD = 720V, ID = 10A,
VGS = 10V, RG=4.7Ω
(see Figure 14)

3500

280

58

117 pF

31
20
88
55

113

152 nC
19
60

when VDS

oss

µA
µA

pF
pF
pF

ns
ns
ns
ns

nC
nC

5/14

Electrical characteristics STW12NK90Z

Table 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

SD

I

SDM

V

SD

t

Q

I

RRM

t

Q

I

RRM

1. Pulse width limited by safe operating area.

2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %

Source-drain current
Source-drain current

(1)

(pulsed)

(2)

Forward on voltage ISD = 11A, VGS = 0 1.6 V

Reverse recovery time

rr

Reverse recovery charge

rr

Reverse recovery current

Reverse recovery time

rr

Reverse recovery charge

rr

Reverse recovery current

ISD = 10A, di/dt = 100A/µs,
VDD = 50V, Tj = 25°C
(see Figure 15)

= 10A, di/dt = 100A/µs,

I

SD

= 50V, Tj = 150°C

V

DD

(see Figure 15)

728

7.8

21.6

964

11
23

11
44

A
A

ns

µC

A

ns

µC

A

6/14

STW12NK90Z Electrical characteristics

2.1 Electrical characteristics (curves)

Figure 1. Safe operating area Figure 2. Thermal impedance

Figure 3. Output characterisics Figure 4. Transfer characteristics

Figure 5. Transconductance Figure 6. Static drain-source on resistance

7/14

Electrical characteristics STW12NK90Z

Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations

Figure 9. Normalized gate threshold voltage

vs temperature

Figure 11. Source-drain diode forward

characteristics

Figure 10. Normalized on resistance vs

temperature

Figure 12. Normalized breakdown voltage vs

temperature

8/14

STW12NK90Z Test circuit

3 Test circuit

Figure 13. Switching times test circuit for

resistive load

Figure 15. Test circuit for inductive load

switching and diode recovery times

Figure 14. Gate charge test circuit

Figure 16. Unclamped Inductive load test

circuit

9/14

Test circuit STW12NK90Z

Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform

10/14

STW12NK90Z Package mechanical data

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com

11/14

Package mechanical data STW12NK90Z

TO-247 MECHANICAL DATA

DIM.

A 4.85 5.15 0.19 0.20

A1 2.20 2 .60 0.086 0.102

b 1. 0 1.40 0.039 0.055

b1 2.0 2.40 0.079 0.094

b2 3.0 3.40 0.118 0.134

c 0.40 0.80 0 .015 0.03

D 19.85 20.15 0.781 0.793

E 15.45 15.75 0.608 0.620

e5.45 0.214

L 14.20 14.80 0.560 0.582

L1 3.70 4.30 0.14 0.17

L2 18 .50 0.728

øP 3.55 3.65 0 .140 0.143

øR 4.50 5.50 0.177 0.216

S5.50 0.216

MIN. TYP MAX. MIN. TYP. MAX.

mm. inch

12/14

STW12NK90Z Revision history

5 Revision history

Table 8. Revision history

Date Revision Changes

21-Jun-2004 4 Complete version

17-Oct-2006 5 New template, no content change

13/14

STW12NK90Z

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