Page 1
STW12NB60
N-CHANNEL 600V - 0.5Ω - 12A TO-2 47
PowerMesh™II MOSFET
TYPE V
DSS
STW12NB60 600V < 0.6
■ TYPICAL R
■ EXTREMELY HIGH dv /d t C APABILITY
■ 100% AVALANCHE TESTED
■ VERY LOW INTRINSIC CAPAC ITANCES
■ GATE CHARGE MINIMIZED
(on) = 0.5Ω
DS
R
DS(on)
I
D
Ω
12 A
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding
performances. The new patent pending strip layout
coupled with the Company’s proprieraty edge termination structure, gives the lowest RDS(on) per area,
exceptional avalanche and dv/dt capabilities and
unrivalled gate charge and switching characteristics.
APPLICATIONS
■ SWITCH MODE POWER SUPPLI ES ( SMPS)
■ DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
3
2
1
TO-247
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
dv/dt(1) Peak Diode Recovery voltage slope 4 V/ns
T
stg
T
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
600 V
600 V
Gate- source Voltage ±30 V
Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C
(●)
Drain Current (pulsed) 48 A
Total Dissipation at TC = 25°C
12 A
7.56 A
190 W
Derating Factor 1.52 W/°C
Storage Temperature –65 to 150 °C
Max. Operating Junction Temperature 150 °C
j
(1)ISD ≤12A, di/dt ≤100A/µs , VDD ≤ V
(BR)DSS
, Tj ≤ T
JMAX.
1/8May 2001
Page 2
STW12NB60
THERMA L D ATA
Rthj-case Thermal Resistance Junction-case Max 0.658 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
T
l
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
AS
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
Maximum Lead Temperature For Soldering Purpose 300 °C
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
Drain-source
= 25 °C, ID = IAR, VDD = 50 V)
j
ID = 250 µA, VGS = 0 600 V
12 A
450 mJ
Breakdown Voltage
= Max Rating
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
V
DS
V
= Max Rating, TC = 125 °C
DS
V
= ±30V ±100 nA
GS
1µA
50 µA
ON
(1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
= VGS, ID = 250 µA
DS
VGS = 10V, ID = 5.5A
234V
0.5 0.60
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
fs
C
iss
C
oss
C
rss
Forward Transconductance VDS > I
Input Capacitance
Output Capacitance 285 pF
Reverse Transfer
Capacitance
ID= 5.5A
V
DS
D(on)
x R
DS(on)max,
= 25V, f = 1 MHz, VGS = 0
9S
2200 pF
30 pF
Ω
2/8
Page 3
STW12NB60
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Q
Q
Q
t
r
g
gs
gd
Turn-on Delay Time
Rise Time
Total Gate Charge
Gate-Source Charge 17 nC
Gate-Drain Charge 23 nC
SWITCHING OFF
Symbol Param eter Test Conditions Min. Typ. Max. Unit
t
r(Voff)
t
f
t
c
Off-voltage Rise Time
Fall Time 15 ns
Cross-over Time 32 ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD (1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pul se duration = 30 0 µs, duty cycle 1.5 %.
2. Pulse width l i m i t ed by safe ope rat i ng area.
(2)
Source-drain Current 12 A
Source-drain Current (pulsed) 48 A
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charg e 6.5 µC
Reverse Recovery Curren t 20.5 A
VDD = 300V, ID = 5.5 A
RG= 4.7Ω, VGS = 10V
(see test circuit, Figure 3)
V
= 480V, ID = 11 A,
DD
VGS = 10V, RG=4.7
V
= 480V, ID = 11 A,
DD
RG= 4.7Ω, V
GS
Ω
= 10V
(see test circuit, Figure 5)
ISD = 12 A, VGS = 0
I
= 11 A, di/dt = 100 A/µs,
SD
VDD = 100V, Tj = 150°C
(see test circuit, Figure 5)
27 ns
12 ns
54 70 nC
20 ns
1.6 V
600 ns
Safe Operating Area Thermal Impedance
3/8
Page 4
STW12NB60
Transfer CharacteristicsOutput Characteristics
Transconductance
Gate Charge vs Gate-source Voltage
Static Drain-source On Resistance
Capacitance Variations
4/8
Page 5
Source-drain Diode Forward Characteristics
STW12NB60
Normalized On Resistance vs Temperatur eNormalized Gate Thereshold Voltage vs Temp.
5/8
Page 6
STW12NB60
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
6/8
Page 7
TO-247 MECHANICAL DATA
STW12NB60
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.7 5.3 0.185 0.209
D 2.2 2.6 0.087 0.102
E 0.4 0.8 0.016 0.031
F 1 1.4 0.039 0.055
F3 2 2.4 0.079 0.094
F4 3 3.4 0.118 0.134
G 10.9 0.429
H 15.3 15.9 0.602 0.626
L 19.7 20.3 0.776 0.779
L3 14.2 14.8 0.559 0.582
L4 34.6 1.362
L5 5.5 0.217
M 2 3 0.079 0.118
mm inch
P025P
7/8
Page 8
STW12NB60
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such informa tion n or for an y infring ement of patent s or other rig hts of third part ies which may resu lt from its use . No l i cen se i s
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical compo nents in life support devices or systems without express written approval of STMicroelectronics.
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -
The ST logo is a trademark of STMicroelectronics
© 2000 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
http://www.st.com
8/8
Loading...