Datasheet STP9NK50Z Datasheet (SGS Thomson Microelectronics)

STP9NK50Z - STP9NK50ZFP

STB9NK50Z

N-CHANNEL 500V - 0.72Ω - 7.2A TO-220/ TO-220F P/D2PAK

Zener-Protected SuperMESH™ Power MOSFET

TYPE V

STP9NK50Z
STP9NK50ZFP
STB9NK50Z

■ TYPICAL R

■ EXTREMELY HIGH dv /d t CAPABILITY

■ 100% AVALANCHE TESTED

■ GATE CHARGE MINIMIZED

■ VERY LOW INTRINSIC CAPAC ITANCES

■ VERY GOOD MANUFACTURING

500 V
500 V
500 V

(on) = 0.72 Ω

DS

DSS

R

DS(on)

< 0.85 Ω
< 0.85 Ω
< 0.85 Ω

I

D

7.2 A

7.2 A

7.2 A

Pw

110 W

30 W

110 W

REPEATIBILITY

DESCRIPTION

The SuperMESH™ series is obtained through an
extreme optimization of ST ’s well established strip­based PowerMESH™ layout. In addition to pushing
on-resistance significantly down, special care is tak­en to ensure a very good dv/dt capability for the
most demanding applications. Such series c om pl e­ments ST full range of high voltage MOSFE Ts in­cluding revolutionary MDmesh™ products.

TO-220 TO-220FP

3

1

D2PAK

INTERNAL SCHEMATIC DIAGRAM

3

2

1

APPLICATIONS

■ HIGH CURRENT, HIGH SPEED SWITCHING

■ IDEAL FOR OFF - L IN E POWE R SU PPLIE S,

ADAPTORS AND PFC

■ LIGHTING

ORDERING INFORMATION

SALES TYPE MARKING PACKAGE PACKAGING

STP9NK50Z P9NK50Z TO-220 TUBE

STP9NK50ZFP P9NK50ZFP TO-220FP TUBE
STB9NK50ZT4 B9NK50Z

2

D

PAK

TAPE & REEL

1/12June 2002

STP9NK50Z - STP9NK50ZFP - S TB9N K50Z

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

STP9NK50Z
STB9NK50Z

V

I

DM

P

V

DGR

V

I
I

TOT

DS

GS
D
D

Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
Gate- source Voltage ± 30 V

Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C

(l)

Drain Current (pulsed) 28.8 28.8 (*) A
Total Dissipation at TC = 25°C

7.2 7.2 (*) A

4.5 4.5 (*) A

110 30 W

Derating Factor 0.88 0.24 W/°C

V

ESD(G-S)

Gate source ESD(HBM-C=100pF, R=1.5KΩ) 3500 V

dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns

V

ISO

T

j

T

stg

(l) Pulse wi dth limited by saf e operating area
(1) I

≤7.2A, di/dt ≤200A/ µs, VDD ≤ V

SD

(*) Limited only by maximum temperature allowed

Insulation Withstand Voltage (DC) - 2500 V
Operating Junction Temperature

Storage Temperature

, Tj ≤ T

(BR)DSS

JMAX.

-55 to 150

-55 to 150

STP9NK50ZFP

500 V
500 V

°C
°C

THERMA L D ATA

TO-220

2

D

PAK

Rthj-case Thermal Resistance Junction-case Max 1.14 4.2 °C/W

Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W

T

l

Maximum Lead Temperature For Soldering Purpose

TO-220FP

300 °C

AVALANCHE CHARACTERISTICS

Symbol Parameter Max Value Unit

I

AR

E

AS

Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T

max)

j

Single Pulse Avalanche Energy
(starting T

= 25 °C, ID = IAR, VDD = 50 V)

j

7.2 A

190 mJ

GATE-SOURCE ZENER DIODE

Symbol Parameter Test Conditions Min. Typ. Max. Unit

BV

GSO

Gate-Source Breakdown

Igs=± 1mA (Open Drain) 30 V

Voltage

PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES

The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to souce. In this respect the Zener voltage is appropriate to achieve an efficient and cost­effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage
of external components.

2/12

STP9NK50Z - STP9NK50ZFP - STB9NK50Z

ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)

ON/OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

(BR)DSS

Drain-source
Breakdown Voltage

I

I

V

R

DSS

GSS

GS(th)
DS(on)

Zero Gate Voltage
Drain Current (V

GS

= 0)

Gate-body Leakage
Current (V

DS

= 0)
Gate Threshold Voltage
Static Drain-source On

Resistance

DYNAMIC

Symbol Parameter Test Conditions Min. Typ. Max. Unit

g

(1) Forward Transconductance VDS = 15 V, ID= 3.6 A 5.3 S

fs

C

oss eq.

C

iss

C

oss

C

rss

Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance

(3) Equivalent Output

Capacitance

SWITCHING ON

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t

d(on)

Q
Q
Q

t

r

g
gs
gd

Turn-on Delay Time
Rise Time

Total Gate Charge
Gate-Source Charge
Gate-Drain Charge

ID = 1 mA, VGS = 0 500 V

V

= Max Rating

DS

VDS = Max Rating, TC = 125 °C

V

= ± 20V ±10 µA

GS

V

= VGS, ID = 100µA

DS

3 3.75 4.5 V

1

50

VGS = 10V, ID = 3.6 A 0.72 0.85 Ω

= 25V, f = 1 MHz, VGS = 0 910

V

DS

125

30

VGS = 0V, VDS = 0V to 400V 75 pF

VDD = 250 V, ID = 3.6 A
RG= 4.7Ω VGS = 10 V

17
20

(Resistive Load see, Figure 3)

= 400V, ID = 7.2 A,

V

DD

VGS = 10V

32

6

18

µA
µA

pF
pF
pF

ns
ns

nC
nC
nC

SWITCHING OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t

d(off)

Turn-off Delay Time

t

f

Fall Time

VDD = 250 V, ID = 3.6 A
RG=4.7Ω VGS = 10 V

45
22

(Resistive Load see, Figure 3)

t

r(Voff)

t

t

Off-voltage Rise Time

f

c

Fall Time
Cross-over Time

= 400V, ID = 7.2 A,

V

DD

RG=4.7Ω, V

GS

= 10V

(Inductive Load see, Figure 5)

15
13
30

SOURCE DRAIN DIODE

Symbol Parameter Test Conditions Min. Typ. Max. Unit

I

SD

I

SDM

VSD (1)

t

rr

Q

rr

I

RRM

Note: 1. Pulsed: Pu l se duration = 300 µs, duty cycle 1. 5 %.

2. Pulse width li mited by safe operating area .

3. C

Source-drain Current

(2)

Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time

Reverse Recovery Charge
Reverse Recovery Current

is defined as a constant equivalent capacitance giving the same charging time as C

oss eq.

V

.

DSS

ISD = 7.2 A, VGS = 0
I

SD

V
(see test circuit, Figure 5)

= 7.2 A, di/dt = 100A/µs

= 40 V, Tj = 150°C

DD

238

1.5

12.6

when VDS increase s fr om 0 to 80%

oss

7.2

28.8

1.6 V

ns
ns

ns
ns
ns

A
A

ns

µC

A

3/12

STP9NK50Z - STP9NK50ZFP - S TB9N K50Z

Safe Operating Area For TO-220/D2PAK Thermal Impedance For TO-220/D2PAK

Thermal Impedance For TO-220FPSafe Operating Area For TO-220FP

Output Characteristics

4/12

Transfer Characteristics

STP9NK50Z - STP9NK50ZFP - STB9NK50Z

Transconductance Static Drain-source On Resistance

Gate Charge vs Gate-source Voltage

Capacitance Variations

Normalized On Resistance vs Temperatur eNormalized Gate Threshold Volta ge vs Temp.

5/12

STP9NK50Z - STP9NK50ZFP - S TB9N K50Z

Source-drain Diode Forwa rd Ch ara c te ristics

Maximum Avalanche Energy vs Temperature

Normalized BVDSS vs Temperature

6/12

STP9NK50Z - STP9NK50ZFP - STB9NK50Z

Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit

Fig. 3: Switching Times Test Circuit For

Resistive Load

Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times

Fig. 4: Gate Charge test Circuit

7/12

STP9NK50Z - STP9NK50ZFP - S TB9N K50Z

E

TO-220 MECHANICAL DATA

DIM.

A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107

D1 1.27 0.050

E 0.49 0.70 0.019 0.027

F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067

G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154

DIA. 3.75 3.85 0.147 0.151

MIN. TYP. MAX. MIN. TYP. MAX.

mm inch

A

C

D

8/12

L5

Dia.

L7

D1

L6

L2

L9

F1

G1

F

H2

G

F2

L4

P011C

STP9NK50Z - STP9NK50ZFP - STB9NK50Z

TO-220FP MECHANICAL DATA

DIM.

A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106

D 2.5 2.75 0.098 0.108

E 0.45 0.7 0.017 0.027

F 0.75 1 0.030 0.039
F1 1.15 1.5 0.045 0.067
F2 1.15 1.5 0.045 0.067

G 4.95 5.2 0.195 0.204

G1 2.4 2.7 0.094 0.106

H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 .0385 0.417
L5 2.9 3.6 0.114 0.141
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366

Ø 3 3.2 0.118 0.126

MIN. TYP MAX. MIN. TYP. MAX.

mm. inch

E

A

D

B

L3

L6

L7

¯

F1

F

G1

H

G

F2

123

L2

L5

L4

9/12

STP9NK50Z - STP9NK50ZFP - S TB9N K50Z

2

D

PAK MECH ANICAL DATA

DIM.

MIN. TYP MAX. MIN. TYP. MAX.

A 4.4 4.6 0.173 0.181
A1 2.49 2.69 0.098 0.106
A2 0.03 0.23 0.001 0.009

B 0.7 0.93 0.027 0.036
B2 1.14 1.7 0.044 0.067

C 0.45 0.6 0.017 0.023

C2 1.23 1.36 0.048 0.053

D 8.95 9.35 0.352 0.368

D1 8 0.315

E 10 10.4 0.393
E1 8.5 0.334

G 4.88 5.28 0.192 0.208

L 15 15.85 0.590 0.625
L2 1.27 1.4 0.050 0.055
L3 1.4 1.75 0.055 0.068

mm. inch

M 2.4 3.2 0.094 0.126

R 0.4 0.015

V2 0º8º

3

10/12

1

STP9NK50Z - STP9NK50ZFP - STB9NK50Z

D2PAK FOOTPRINT

TAPE AND REEL SHIPMENT (suffix ”T4”)*

TUBE SHIPMENT (no suffix)*

REEL MECHANICAL DATA

DIM.

A 330 12.992

B 1.5 0.059
C 12.8 13.2 0.504 0.520
D 20.2 0795
G 24.4 26.4 0.960 1.039
N 100 3.937

T 30.4 1.197

mm inch

MIN. MAX. MIN. MAX.

TAPE MECHANICAL DATA

DIM.

A0 10.5 10.7 0.413 0.421
B0 15.7 15.9 0.618 0.626

D 1.5 1.6 0.059 0.063

D1 1.59 1.61 0.062 0.063

E 1.65 1.85 0.065 0.073

F 11.4 11.6 0.449 0.456
K0 4.8 5.0 0.189 0.197
P0 3.9 4.1 0.153 0.161
P1 11.9 12.1 0.468 0.476
P2 1.9 2.1 0.075 0.082

R 50 1.574

T 0.25 0.35 0.0098 0.0137

W 23.7 24.3 0.933 0.956

* on sales type

mm inch

MIN. MAX. MIN . MAX.

BASE QTY BULK QTY

1000 1000

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STP9NK50Z - STP9NK50ZFP - S TB9N K50Z

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its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
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