Datasheet STP9NB50FP, STP9NB50 Datasheet (SGS Thomson Microelectronics)

Page 1
STP9NB50
STP9NB50FP
N-CHANNEL 500V - 0.75
TYPE V
STP9NB50 500 V < 0.85 8.6 A STP9NB50FP 500 V < 0.85 4.9 A
TYPICAL R
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
VERY LOW INTRINSIC CAPACITANCES
GATE CHARGE MINIMIZED
DSS
(on) = 0.75
DESCRIPTION
Using the latest high voltage MESH OVERLAY process, STMicroelectronics has designed an ad­vanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled withthe Company’s proprieraty edgetermi­nation structure, gives the lowest R exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteris­tics.
R
DS(on)
DS(on)
I
D
per area,
- 8.6 A TO-220/TO-220FP PowerMeshMOSFET
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
TO-220FP
3
2
1
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING
SWITH MODE POWER SUPPLIES (SMPS)
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES ANDMOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
STP9NB50 STP9NB50FP
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
dv/dt (1) Peak Diode Recovery voltage slope 4.5 4.5 V/ns
V
ISO
T
stg
T
()Pulse width limitedby safe operating area
Drain-source Voltage (VGS=0) Drain-gate Voltage (RGS=20kΩ) Gate- source Voltage ±30 V Drain Current (continuos) at TC=25°C Drain Current (continuos) at TC= 100°C
()
Drain Current (pulsed) 34.4 34.4 A TotalDissipation at TC=25°C Derating Factor 1 0.32 W/°C
Insulation Withstand Voltage (DC) - 2000 V Storage Temperature –65 to 150 °C Max. Operating Junction Temperature 150 °C
j
(1)ISD<9A, di/dt<200A/µ,VDD<V
8.6 4.9 A
5.4 3.1 A
125 40 W
500 V 500 V
,TJ<T
(BR)DSS
JMAX
1/9May 2000
Page 2
STP9NB50/FP
THERMAL DATA
TO-220 TO-220FP
Rthj-case Thermal Resistance Junction-case Max 1 3.13 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W
Rthc-sink Thermal Resistance Case-sink Typ 0.5 °C/W
T
l
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
AS
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
Maximum Lead Temperature For Soldering Purpose 300 °C
Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by T
max)
j
Single Pulse Avalanche Energy (starting T
Drain-source Breakdown Voltage
Zero Gate Voltage Drain Current (V
Gate-body Leakage Current (V
=25°C, ID=IAR,VDD=50V)
j
I
= 250 µA, VGS=0
D
= Max Rating
V
DS
=0)
DS
GS
=0)
V
= Max Rating, TC= 125 °C
DS
= ±30V
V
GS
500 V
8.6 A
520 mJ
1 µA
50 µA
±100 nA
ON (1)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
I
D(on)
Gate Threshold Voltage Static Drain-source On
Resistance
On State Drain Current
V
DS=VGS,ID
= 10V, ID= 4.3 A
V
GS
V
DS>ID(on)xRDS(on)max,
= 250 µA
VGS=10V
345V
0.75 0.85
8.6 A
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
g
(1)
fs
C
iss
C
oss
C
rss
Forward Transconductance Input Capacitance
Output Capacitance 175 pF Reverse Transfer
Capacitance
DS>ID(on)xRDS(on)max,
ID= 4.3 A
V
= 25V, f = 1 MHz, VGS=0
DS
5.7 S
1250 pF
20 pF
2/9
Page 3
STP9NB50/FP
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
t
r
Q
Q
gs
Q
gd
Turn-on Delay Time Rise Time
TotalGate Charge
g
Gate-Source Charge 10.6 nC Gate-Drain Charge 13.7 nC
SWITCHING OFF
Symbol Parameter TestConditions Min. Typ. Max. Unit
t
r(Voff)
t
t
f
c
Off-voltage Rise Time Fall Time 11 ns Cross-over Time 20 ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Source-drain Current 8.6 A
(2)
Source-drain Current (pulsed) 34.4 A
(1)
Forward On Voltage Reverse Recovery Time Reverse Recovery Charge 3.5 µC Reverse Recovery Current 16.5 A
V
= 250 V,ID= 4.3 A
DD
= 4.7VGS=10V
R
G
(see test circuit, Figure 3)
V
= 400V, ID= 8.6 A,
DD
= 10V
V
GS
V
= 400V, ID= 8.6 A,
DD
=4.7Ω, VGS= 10V
R
G
(see test circuit, Figure 5)
ISD= 8.6 A, VGS=0 I
= 8.6 A, di/dt = 100A/µs,
SD
= 100V, Tj= 150°C
V
DD
(see test circuit, Figure 5)
19 ns 11 ns 32 45 nC
11.5 ns
1.6 V
420 ns
Safe Operating Area Safe OperatingArea for TO-220FP
3/9
Page 4
STP9NB50/FP
Thermal Impedence for TO-220
Output Characteristics
Thermal Impedence for TO-220FP
Transfer Characteristics
Transconductance
4/9
Static Drain-source On Resistance
Page 5
STP9NB50/FP
Gate Charge vs Gate-source Voltage
Normalized Gate Threshold Voltage vs Temp.
Capacitance Variations
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/9
Page 6
STP9NB50/FP
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test CircuitFor
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
6/9
Page 7
TO-220 MECHANICAL DATA
STP9NB50/FP
DIM.
A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
MIN. TYP. MAX. MIN. TYP. MAX.
A
C
mm inch
E
D
L5
L7
Dia.
D1
L6
L2
L9
L4
F2
F1
G1
H2
G
F
P011C
7/9
Page 8
TO-220FP MECHANICAL DATA
STP9NB50/FP
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027
F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 0.385 0.417 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
A
mm inch
E
D
B
L3
L6
L7
¯
H
L2
F1
F
G1
G
F2
123
L4
8/9
Page 9
STP9NB50/FP
Information furnished is believed to beaccurate and reliable. However, STMicroelectronics assumes no responsibility for theconsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patentor patent rights of STMicroelectronics. Specification mentioned in this publication are subject tochange without notice. Thispublication supersedes and replaces allinformation previously supplied. STMicroelectronics products are not authorized foruse as critical components in life support devices or systems without express written approval ofSTMicroelectronics.
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