Datasheet STL35NF10 Datasheet (SGS Thomson Microelectronics)

STL35NF10

N-CHANNEL 100V - 0.025Ω - 35A PowerFLAT™

LOW GATE CHARGE STripFET™ MOSFET

PRELIMINARY DATA

TYPE V

STL35NF10 100 V < 0.030 Ω 35 A

■ TYPICAL R

■ IMPROVED DIE-TO-FOOTPRINT RATIO

■ VERY LOW PROFILE PACKAGE

(on) = 0.025Ω

DS

DSS

R

DS(on)

I

D

DESCRIPTION

This Power MOSFET is t he second generation of

STMicroelectronics unique “STripFET™” technolo­gy. The resulting transistor shows extremely low on­resistance and minimal gate charge. The new Pow­erFLAT™ package allows a significant reduction in
board space without compromising performance.

APPLICATIONS

■ HIGH EFFICIENCY ISOLATED DC/DC

CONVETERS

PowerFLA T™(6x5)

(Chip Scale Package)

INTERNAL SCHEMATIC DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

DS

V

DGR

V

GS

I

D

I

DM

P

TOT

E

AS

T

stg

T

j

(●) Pulse width limited by safe operating area

August 2001

Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
Gate- source Voltage ± 20 V

Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C

(●)

Drain Current (pulsed) 140 A
Total Dissipation at TC = 25°C
Derating Factor 0.64 W/°C

(1)

Single Pulse Avalanche Energy 135 mJ
Storage Temperature –65 to 150 °C
Max. Operating Junction Temperature –55 to 150 °C

100 V
100 V

35
22

80 W

(1) Start i ng Tj = 25°C, ID = 35A, VDD = 50V

A
A

1/6

STL35NF10

THERMA L D ATA

Rthj-case Thermal Resistance Junction-case Max 1.56 °C/W

Rthj-amb Thermal Resistance Junction-ambient Max 50 °C/W

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

(BR)DSS

Drain-source
Breakdown Voltage

ON

I

I

GSS

(1)

DSS

Zero Gate Voltage
Drain Current (V

GS

Gate-body Leakage
Current (V

DS

= 0)

= 0)

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

GS(th)

R

DS(on)

Gate Threshold Voltage
Static Drain-source On

Resistance

ID = 250 µA, VGS = 0 100 V

V

= Max Rating

DS

V

= Max Rating, TC = 125 °C

DS

V

= ± 20V ±100 nA

GS

V

= VGS, ID = 250µA

DS

VGS = 10 V, ID = 17.5 A

2 2.8 4 V

0.025 0.030 Ω

1µA

10 µA

DYNAMIC

Symbol Parameter Test Conditions Min. Typ. Max. Unit

(1) Forward Transconductance VDS =20 V, ID= 15 A 18 S

g

fs

C

iss

C

oss

C

rss

Input Capacitance
Output Capacitance 265 pF
Reverse Transfer

Capacitance

V

= 25 V, f = 1 MHz, VGS = 0

DS

1780 pF

162 pF

2/6

STL35NF10

ELECTRICAL CHARACTERISTICS (CONTINUED)

SWITCHING ON

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

t

d(on)

Q
Q
Q

t

r

g
gs
gd

Turn-on Delay Time
Rise Time 63 ns
Total Gate Charge

Gate-Source Charge
Gate-Drain Charge

SWITCHING OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t

d(off)

t

f

Turn-off-Delay Time
Fall Time

SOURCE DRAIN DIODE

Symbol Parameter Test Conditions Min. Typ. Max. Unit

I

SD

I

SDM

VSD (2)

t

rr

Q

rr

I

RRM

Note: 1. Pulsed: Pu l se duration = 300 µs, duty c yc l e 1.5 %.

2. Pulse width li mited by safe operating area.

Source-drain Current 35 A

(1)

Source-drain Current (pulsed) 140 A
Forward On Voltage
Reverse Recovery Time

Reverse Recovery Charge
Reverse Recovery Current

= 50 V, ID = 17.5 A

DD

RG= 4.7Ω VGS = 10V
(see test circuit, Figure 1)

VDD = 80 V, ID = 35 A,
V

= 10 V

GS

(see test circuit, Figure 2)

VDD = 50 V, ID = 17.5 A,
RG=4.7Ω, V

GS

= 10 V

(see test circuit, Figure 1)

ISD = 18 A, VGS = 0
ISD = 35 A, di/dt = 100A/µs,

V

= 25 V, Tj = 150°C

DD

(see test circuit, Figure 3)

28 ns

60

80 nC
10
23

84
28

1.2 V

114
456

8

nC
nC

ns
ns

ns

nC

A

3/6

STL35NF10

Resistive Load

Fig. 3: Test Circuit For Diode Recovery Behaviour

Fig. 2: Gate Charge test CircuitFig. 1: Switching Times Test Circuit For

4/6

PowerFLAT™( 6x5) MECHANICAL DATA

STL35NF10

DIM.

MIN. TYP MAX. MIN. TYP. MAX.

A 0.80 1.00 0.031 0.039

A1 0.08 0.003

b 0.36 0.48 0.014 0.018

D 4.89 0.191

D2 3.95 4.05 0.154 0.158

E 6.00 0.235

E2 2.95 3.05 0.115 0.119

e 1.27 0.049
L 0.65 0.85 0.025 0.033

mm. inch

5/6

STL35NF10

6/6

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granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
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