STMicroelectronis unique "Single Feature Size™"
strip-based process. The resulting transistor
shows extremely high packing density for low onresistance, rugged avalanche characteristics and
less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
■ HIGH CURRENT, HIGH SWITCHING SPEED
■ MOTOR CONTROL, AUDIO AMPLIFIERS
■ DC-DC & DC-AC CONVERTERS
■ SOLENOID AND RELAY DRIVERS
3
1
D2PAK
TO-263
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
2
PAK
I
TO-262
3
2
1
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
DS
V
DGR
V
GS
(
I
•)
D
I
D
(
I
••)
DM
P
tot
dv/dt
E
AS
T
stg
T
j
(•)Current Limited by Package
(
Pulse wi dth limited by safe operating ar ea.
••)
.
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
75V
75V
Gate- source Voltage± 16V
Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C
80A
80A
Drain Current (pulsed)320A
Total Dissipation at TC = 25°C
300W
Derating Factor2W/°C
(1)
Peak Diode Recovery voltage slope12V/ns
(2)
Single Pulse Avalanche Energy930mJ
Storage Temperature
Max. Operating Junction Temperature
≤80A, di/dt ≤960A/ µ s , VDD ≤ V
(1) I
SD
(2) Starting Tj = 25 oC, ID = 40A, VDD= 40V
-55 to 175°C
(BR)DSS
, Tj ≤ T
JMAX
1/11November 2001
Page 2
STB80NF75L/-1/ STP80NF75L
THERMA L D ATA
Rthj-case
Rthj-amb
T
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Maximum Lead Temperature For Soldering Purpose
l
Max
Max
Typ
0.5
62.5
300
°C/W
°C/W
°C
ELECTRICAL CHARACTERISTICS (T
= 25 °C unless otherwise specified)
case
OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
= 250 µA, VGS = 0
D
V
= Max Rating
DS
V
= Max Rating TC = 125°C
DS
V
= ± 16V
GS
75V
1
10
±100nA
ON
V
(BR)DSS
I
DSS
I
GSS
(*)
Drain-source
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
Resistance
= VGS I
DS
= 5 VID = 40 A
V
GS
V
= 10 VID = 40 A
GS
= 250 µA
D
11.62.5V
0.01
0.008
0.013
0.010
DYNAMIC
SymbolParameterTest ConditionsMin.Typ.Max.Unit
(*)
g
fs
C
iss
C
oss
C
rss
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
= 25 V ID= 40 A
DS
= 25V, f = 1 MHz, VGS = 0
V
DS
50S
5000
835
360
µA
µA
Ω
Ω
pF
pF
pF
2/11
Page 3
STB80NF75L/-1/ STP80NF75L
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
SymbolParameterTest ConditionsMin.Typ.Max.Unit
= 37 V ID = 40 A
t
d(on)
Turn-on Delay Time
t
r
Rise Time
V
DD
R
= 4.7 Ω VGS = 4.5 V
G
(Resistive Load, Figure 3)
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
= 60 V ID= 80 A VGS= 5V
V
DD
SWITCHING OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
= 37V ID = 40 A
t
d(off)
Turn-off Delay Time
t
f
Fall Time
V
DD
R
= 4.7Ω, V
G
GS
= 4.5 V
(Resistive Load, Figure 3)
SOURCE DRAIN DIODE
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
(*)
Pulsed: P ul se duration = 300 µs, duty cycle 1. 5 %.
(
•)Pulse width limited by safe operating ar ea.
Source-drain Current
(•)
Source-drain Current (pulsed)
(*)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
= 80A VGS = 0
SD
= 80 Adi/dt = 100A/µs
I
SD
V
= 25 VTj = 150°C
DD
(see test circuit, Figure 5)
30
145
110
20
55
130
90
105
340
9
140nC
80
320
1.5V
ns
ns
nC
nC
ns
ns
A
A
ns
nC
A
Thermal ImpedanceSaf e Operating Ar ea
3/11
Page 4
STB80NF75L/-1/ STP80NF75L
Output CharacteristicsTransfer Characteristics
TransconductanceStatic Drain-source On Resistance
Gate Charge vs Gate-source VoltageCapacitance Variations
4/11
Page 5
STB80NF75L/-1/ STP80NF75L
Normalized Gate Threshold Voltage vs TemperatureNormalized on Resistance vs Temperature
Source-drain Diode Forward CharacteristicsNormalized Breakdown Voltage vs Temperature.
..
5/11
Page 6
STB80NF75L/-1/ STP80NF75L
Fig. 1: Unclamped Inductive Load Test CircuitFig. 1: Unclamped Inductive Load Test CircuitFig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive
Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or otherwise under any patent or patent right s of STMicroelectronics. Specifications menti oned in this p ublication are subje ct
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as criti cal component s in l i fe support devi ces or systems without express written appr oval of STMicroe l ectronics.
The ST logo is registered trademark of STMicroelectronics
2001 STMi croelectronics - All Rights Reserved
All other na m es are the property of their respective owners.
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http:// www.st.com
11/11
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