Datasheet SP5748KG, SP5748MP1S, SP5748MP1T, SP5748 Datasheet (MITEL)

FEATURES

● Complete 2.4 GHz single chip system
(for faster device refer to to SP5768)

● Optimised for low phase noise, with comparison
frequencies up to 4 MHz

● No RF prescaler

● Selectable reference division ratio

● Reference frequency output

● Selectable charge pump current

● Integrated loop amplifier

● Two switching ports

● Low power replacement for SP5658 and 5668

● Downwards software compatible with SP5658

● ESD protection, (Normal ESD handling

procedures should be observed)

ORDERING INFORMATION

SP5748/KG/MP1S (Tubes)
SP5748/KG/MP1T (Tape and Reel)

The SP5748 is a single chip frequency synthesiser
designed for tuning systems up to 2.4 GHz and is
optimized for low phase noise with comparison
frequencies up to 4 MHz. It is designed to be downwards
software compatible with the SP5658.

The RF programmable divider contains a front end dual
modulus 16/17 functioning over the full operating range
and allows for coarse tuning in the upconverter
application and fine tuning in the downconverter.

Comparison frequencies are obtained either from a
crystal controlled on-chip oscillator or from an external
source. a buffered reference frequency output is also
available to drive a second SP5748.

The device also contains 2 switching ports.

MP14

Figure1 Pin connections - top view

14

SPOT REF.

CHARGE PUMP

CRYSTAL CAP

CRYSTAL

ENABLE

DATA

CLOCK

PORT P1/OC

DRIVE
V

EE

RF INPUT
RF INPUT
V

CC

REF
PORT P0/OP

APPLICATIONS

● TV, VCR and Cable tuning systems

● Communications systems

SP5748

2.4GHz Very Low Phase Noise PLL

Advance Information

DS4875 - 1.3 November 1998

2

SP5748 Advance Information

Figure 2 SP5748 block diagram

ELECTRICAL CHARACTERISTICS

These characteristics are guaranteed by either production test or design. They apply within the specified

ambient temperature and supply voltage unless otherwise stated.

T

AMB

= -40°C to 80°C, V

CC

= +4·5V to +5·5V

Characteristic Pin Value Units Conditions

Min Typ Max

Supply current 10 13 mA

RF input frequency range 11,12 80 2400 MHz

RF input voltage 11,12 30 300 mV rms

RF input impedance 11,12 See Figure 3

Data, clock & enable 5,6,4

input high voltage 3 Vcc V
input low voltage 0 0.7 V
input current -10 10 µA All input conditions
hysterysis 0.8 V

PP

PORT P1/OC

RF INPUT

16/17

13 BIT

COUNT

4 BIT

COUNT

REFERENCE

DIVIDER

REF

CRYSTAL

PUMP

DRIVE

17 BIT LATCH 6 BIT LATCH

DATA

CLOCK

ENABLE

DATA

INTERFACE

3 BIT

LATCH & PORT/

TEST MODE
INTERFACE

PORT P0/OP

3

SP5748 Advance Information

ELECTRICAL CHARACTERISTICS (continued)

These characteristics are guaranteed by either production test or design. They apply within the specified

ambient temperature and supply voltage unless otherwise stated.

T

AMB

= -40°C to 80°C, V

CC

=+ 4·5V to +5·5V

Characteristic Pin Value Units Conditions

Min Typ Max

Clock rate 6 500 kHz

Bus timing - 5,6,4 See Figure4

data set up 300 ns
data hold 600 ns
enable set up 300 ns
enable hold 600 ns

clock to enable 300 ns

Charge pump output 1 See Figure 5,
current Vpin1 = 2V

Charge pump output 1 +-3 +-10 nA Vpin1=2V
leakage

Charge pump drive 14 0.5 mA Vpin 14=0.7V
output current

Crystal frequency 2,3 2 20 MHz See Figure 6 for application
Recommended crystal 10 200 Ω 4 MHz parallel resonant

crystal. series resistance

Oscillator temperature TBC ppm/oC
stability

Oscillator supply voltage TBC ppm/V
stability

External reference input 2 2 20 MHz Sinewave coupled through
frequency TBA nF blocking capacitor

External reference drive 2 0.2 0.5 V

pp

Sinewave coupled through

level TBA nF blocking capacitor

Buffered reference 9 AC coupled
frequency output *
output amplitude 0.35 Vpp 2-20MHz
output impedance TBC Ω

4

SP5748 Advance Information

ELECTRICAL CHARACTERISTICS

These characteristics are guaranteed by either production test or design. They apply within the specified

ambient temperature and supply voltage unless otherwise stated.

T

AMB

= -40°C to 80°C, V

CC

= +4·5V to +5·5V

Characteristic Pin Value Units Conditions

Min Typ Max

Comparison frequency 4 MHz

Equivalent phase noise at -148 dBc/Hz @10 kHz, SSB, with 2 MHz
phase detector comparison from 4 MHz crystal

reference

RF division ratio 240 131071

Reference division ratio see figure (7)

Output ports P0-P1# 7, 8

sink current 2 mA Vport = 0.7V
leakage current 10 µA Vport = Vcc

* Reference output disabled by connecting to Vcc if not required

’ Output ports high impedance on power up, with data, clock and enable at logic 0

5

SP5748 Advance Information

The RF signal is fed to an internal preamplifier, which
provides gain and reverse isolation from the divider
signals. The output of the preamplifier is fed to the 17 bit
fully programmable counter, which is of MN+A
architecture. The M counter is 13 bit and the A counter
4
The output of the programmable counter is fed to the
phase comparator where it is compared in both phase
and frequency domain with the comparison frequency.
This frequency is derived either from the on board
crystal controlled oscillator or from an external
reference source. In both cases the reference
frequency is divided down to the comparison frequency
by the reference divider which is programmable into1 of
16 ratios as descried in Figure 7.

The output of the phase detector feeds the charge pump
and loop amplifier section, which when used with an
external high voltage transistor and loop filter integrates
the current pulses into the varactor line voltage. The
charge pump current setting is described in Figure 5,
A buffered crystal reference frequency suitable for
driving further synthesisers is available from pin 9. If not
required this output can be disabled by connecting to
Vcc

The programmable divider output divided by 2, Fpd/2
and comparison frequency, Fcomp can be switched to
ports P0 and P1 respectively by switching the device
into test mode. The test modes are described in Figure

8.

ABSOLUTE MAXIMUM RATINGS

All voltages are referred to VEE at 0V

Characteristic Pin Min Typ Max Units Conditions

Supply voltage, Vcc 10 -0.3 7 V
RF input voltage 11,12 2.5 V

p-p

Differential across pins
11 and 12

RF input DC offset 11,12 -0.3 Vcc+0.3 V
Port voltage 7,8 -0.3 Vcc+0.3 V
Charge pump DC offset 1 -0.3 Vcc+0.3 V
Varactor drive DC offset 14 -0.3 Vcc+0.3 V
Crystal DC offset 2,3 -0.3 Vcc+0.3 V
Buffered ref output 9 -0.3 Vcc+0.3 V
Data, clock & enable 5,6,4 -0.3 Vcc+0.3 V

DC offset
Storage temperature -55 +125 °C
Junction temperature +150 °C
MP14 thermal resistance,

chip to ambient 81 °C/W

chip to case 27 °C/W
Power consumption at TBC mW All ports off

Vcc=5.5V
ESD protection 2 kV Mil-std 883B latest revision

method 3015 cat.1.

Functional description

The SP5748 contains all the elements necessary, with
the exception of a frequency reference, loop filter and
external high voltage transistor, to control a varicap
tuned local oscillator, so forming a complete PLL
frequency synthesised source. The device allows for
operation with a high comparison frequency and is
fabricated in high speed logic, which enables the
generation of a loop with excellent phase noise
performance, even with high comparison frequencies.

The package and pin allocation is shown in Figure 1 and
the block diagram in Figure 2.

The SP5748 is controlled by a standard 3-wire bus
comprising data, clock and enable inputs. The
programming word contains 26 bits, two of which are
used for port selection, 17 to set the programmable
divider ratio, four bits to select the reference division
ratio, bits RD & R0-R2, see Figure 7, two bits to set
charge pump current, bit C0 and C1, see Figure 5, and
the remaining bit to access test modes, bit T0, see
Figure 8. The programming format is shown in Figure 4.

The clock input is disabled by an enable low signal, data
is therefore only loaded into the internal shift registers
during an enable high and is clocked into the controlling
buffers by an enable high to low transition. This load is
also synchronised with the programmable divider so
giving smooth fine tuning.

6

SP5748 Advance Information

-j1

DATA

CLOCK

ENABLE

Frequency data

P1

P0 T0 C1

C0

R2 R1 R0 RD MSB LSB

2

25

2

0

2

24

2

23

2

22

2

21

2

20

2

19

2

18

2

17

2

16

TIMING DIAGRAM

TBC

2^16 to 2^0 : Programmable divider ratio control bits

R2,R1,R0 : Reference divider control bits

RD : Reference divider mode select

P1,P0 : Port control bits

C1,C0 : Charge pump current select

T0 : Test mode enable

Figure 4 Data format

C1 C0 Current (in mA)

0 0 0.2
0 1 0.9
10 .1
1 1 .45

Figure 5 Charge pump current

Figure 3 RF input impedance

2

1

3

4

+j0.2

+j0.5

+j1

+j2

+j5

-j5

-j2

-j0.5

-j0.2

0

S11 : Zo = 50Ω
Normalised to 50Ω

Frequency Markers at 500MHz,
1GHz, 1.5GHz and 2.4GHz

7

SP5748 Advance Information

2

3

SP5748

Figure 6 Crystal oscillator application

RD R2 R1 R0 RATIO

00002
00014
00108
001116
010032
010164
0110128
0111256

10003
10015
101010
101120
110040
110180
1110160
1111320

Figure 7 Reference division ratio

P1 P0 T0 FUNCTIONAL DESCRIPTION

X X 0 Normal operation
0 0 1 Charge pump sink
0 1 1 Charge pump source
1 0 1 Charge pump disable
1 1 1 Port P1 = Fcomp, P0 = Fpd/1

X = don't care

Figure 8 Test modes

8

SP5748 Advance Information

300

30

10

1000 2400

FREQUENCY

(MHz)

OPERATING

WINDOW

VIN

(mV RMS

INT

O 50

Ω)

80

CONTROL

MICRO

15nF

68pF

+30V

+5V

22k

16k 47k

+12V

2n2BCW31

1n
1n

10n

P1

TUNER

OSCILLATOR

OUTPUT

SP5748

13k3

P0

CLOCK

DATA

ENABLE

Optional application utilising
on–board crystal controlled
oscillator

1

12

2
3
4
5
6
7

11
10
9
8

13

14

4MHz

18pF

2

3

39pF

REFERENCE

VCO

VCO

10nF

50 - 900MHz

38.9MHz

1650-2700MHz

2

3

10

3

SP5748

SP5748

1.6GHz

Figure 9 Typical input sensitivity

Figure 10 Example of double conversion from VHF/UHF frequencies to TV IF

Figure 11 Typical application SP5748

1650 -2400MHz

9

SP5748 Advance Information

LOOP BANDWIDTH

The majority of applications for which the SP5748 is
intended require a loop filter bandwidth of between
2kHz and10kHz.

Typically the VCO phase noise will be specified at both
1kHz and10kHz offset. It is common practice to arrange
the loop filter bandwidth such that the 1kHz figure lies
within the loop bandwidth. Thus the phase noise
depends on the synthesiser comparator noise floor,
rather than the VCO.

The 10kHz offset figure should depend on the VCO
providing the loop is designed correctly, and is not
underdamped.

REFERENCE SOURCE

The SP5748 offers optimal LO phase noise
performance when operated with a large step size. This
is due to the fact that the LO phase noise within the loop
bandwidth is:

phase comparator LO frequency
noise floor + 20 log

10

phase comparator frequency

Assuming the phase comparator noise floor is flat
irrespective of sampling frequency, this means that the
best performance will be achieved when the overall LO
to phase comparator division ratio is a minimum.

There are two ways of achieving a higher phase
comparator sampling frequency:–

A) Reduce the division ratio between the reference

source and the phase comparator
B) use a higher reference source frequency.
Approach B) may be preferred for best performance

since it is possible that the noise floor of the reference
oscillator may degrade the phase comparator
performance if the reference division ratio is very small.

APPLICATION NOTES

A generic set of application notes AN168 for designing
withsynthesisers such as the SP5748 has been written.
This covers aspects such as loop filter design and
decoupling. Thisapplication note is also featured in the
Media Data Book, or refer to the Mitel Semiconductor
Internet Site http://www.Mitelsemi.com. A generic test/
demo board has been produced which can be used for
the SP5748. A circuit diagram is shown in Figure 12.

The board can be used for the following purposes:

(A) Measuring RF sensitivity performance.
(B) Indicating port function.
(C) Synthesising the voltage controlled oscillator.
(D) Testing of external reference.
(E) Measurement of phase noise performance.

( )

10

SP5748 Advance Information

Figure 12 Evaluation Board

CP1XTAL CAP2XTAL

3

ENA4DATA5P1

7

P0

8

REF OUT

9

VCC

10

RF Input

11

RF Input

12

VEE

13

Drive Output

14

CLK

6

IC1

SP5748

C2

2n2F

C3

NF

R7

13K3

T1

BCW31

R8

22K

12345

J1

POWER CONNECTOR

C5 1nF

C4

1nF

VCC

C1

18pF

X1

4MHz

LED1

HLMPK-150

LED2

HLMPK-150

R1

4K7R44K7

VCC

R9

1K

R10

0R

C14

4n7F

C16

4u7F

C10

100pF

C7

100nF

C9

100nF

1

2

J2 VARACTOR

+5V

+22V

+8V

C8

4u7F

C15

100pF

C13

100pF

C12

100pF

C11

1nF

RF2 EXT REF

C6

10nF

RF1RF INPUT

1

2

4

3

S1

SW DIP-2

1 2

W

R6

POT2

RF3 COMP O/P

C17

10nF

1

2

J4

PORT OUTPUTS

Data

3

Enable

4

GND

5

Clock

6

J5

3 WIRE BUS

8V

8V

+8V

1

RF OUT

2

GND

7

VT

8

POS_2000

POS_2000

1 2

LK1

LK

C18

39pF

C19

100pF

R11

16R

R12

16R

C20

1nF

C21

1nF

R13

16R

1 2

LK2 LK

8V

POS-2000 TUNING RANGE = 1370MHz - 2000MHz

LK2 TO BE FITTED FOR NORMAL OPERATION

R14

68R

11

SP5748 Advance Information

Top view

Bottom view

Figure 13

12

SP5748 Advance Information

Figure 14 Input/Output interface cicruits

V

REF

500 500

RF INPUTS

V

CC

CHARGE

PUMP

DRIVE

PORT

CRYSTAL

RF

inputs

Loop amplifier

Disable, Enable, Data and Clock inputs

Reference oscillator

Output Ports

200

V

CC

V

CC

Reference output

V

CC

REF

1.2mA

CRYSTAL

BIAS

25K

CAP

M Mitel (design) and ST-BUS are registered trademarks of MITEL Corporation
Mitel Semiconductor is an ISO 9001 Registered Company
Copyright 1999 MITEL Corporation
All Rights Reserved
Printed in CANADA

TECHNICAL DOCUMENTATION - NOT FOR RESALE

World Headquarters - Canada

Tel: [phone]

Fax: [phone]

North America Asia/Pacific Europe, Middle East,

Tel: [phone] Tel: [phone] and Africa (EMEA)

Fax: [phone] Fax: [phone] Tel: [phone]

Fax: [phone]

http://www.mitelsemi.com

Information relating to products and services furnished herein by Mitel Corporation or its subsidiaries (collectively “Mitel”) is believed to be reliable. However, Mitel assumes no
liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of
patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or
service conveys any license, either express or implied, under patents or other intellectual property rights owned by Mitel or licensed from third parties by Mitel, whatsoever.
Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Mitel, or non-Mitel furnished goods or services may infringe patents or
other intellectual property rights owned by Mitel.

This publication is issued to provide information only and (unless agreed by Mitel in writing) may not be used, applied or reproduced for any purpose nor form part of any order or
contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this
publication are subject to change by Mitel without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or
service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific
piece of equipment. It is the user’s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or
data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in
any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Mitel’s
conditions of sale which are available on request.