Datasheet RFL2N05, RFL2N06 Datasheet (Intersil)

January 1998

Semiconductor

RFL2N05,

RFL2N06

2A, 50V and 60V, 0.95 Ohm,

N-Channel Power MOSFETs

Features

• 2A, 50V and 60V

•r

DS(ON)

• SOA is Power-Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Majority Carrier Device

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

= 0.95Ω

Components to PC Boards”

Ordering Information

PART NUMBER PACKAGE BRAND

RFL2N05 TO-205AF RFL2N05
RFL2N05 TO-205AF RFL2N05

NOTE: When ordering, include the entire part number.

Description

These are N-Channel enhancement mode silicon gate
power field effect transistors designed for applications such
as switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA09378.

Symbol

D

G

S

Packaging

JEDEC TO-205AF

DRAIN
(CASE)

SOURCE

GATE

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright

© Harris Corporation 1997

5-1

File Number 1497.2

RFL2N05, RFL2N06

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

RFL2N05 RLF2N06 UNITS

Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (RGS = 1MΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . .V

DSS

DGR

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain Current, RMS Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

GS

D

DM

D

50 60 V
50 60 V

±20 ±20 V

22A

10 10 A

8.33 8.33 W

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.0667 0.0667 W/oC

Operating and Storage Temperature Range . . . . . . . . . . . . . . . . . . . TJ, T

STG

-55 to 150 -55 to 150

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . .T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maxim um Ratings” ma y cause permanent damage to the device . This is a stress only rating and oper ation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

300
260

300
260

o

C

o

C

o

C

NOTE:

1. TJ= 25oC to 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV

DSSID

= 250µA, VGS = 0

RFL2N05 50 - - V

RFL2N06 60 - - V
Gate to Threshold Voltage V
Zero-Gate Voltage Drain Current I

GS(TH)VGS

DSS

= VDS, ID = 250µA, (Figure 8) 2 - 4 V

VDS = 0.8 x Rated BV

DSS

,

--1µA

TC = 25oC
T

= 125oC--25µA

C

Gate to Source Leakage Current I
Drain to Source On Voltage (Note 2) V

GSSVGS

DS(ON)ID

= ±20V, VDS = 0 - - ±100 nA

= 1A, VGS = 10V - - 0.95 V
ID = 2A, VGS = 10V - - 2.0 V
ID = 4A, VGS = 15V - - 4.8 V

Drain to Source On Resistance (Note 2) r

DS(ON)ID

Forward Transconductance (Note 2) g
Turn-On Delay Time t

d(ON)ID

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Input Capacitance C
Output Capacitance C
Reverse-Transfer Capacitance C
Thermal Resistance Junction to Case R

fs

r

f

ISS
OSS
RSS

JC

θ

= 1A, VGS = 10V, (Figures 6, 7) - - 0.95 Ω

ID = 1A, VDS = 10V, (Figure 10) 400 - - S

≈ 1A, V

VGS = 10V, (Figures 11, 12, 13)

= 30V, RGS= 50Ω,

DD

- 6 15 ns

-1430ns

-1630ns

-3050ns

VGS = 0V, VDS = 25V,
f = 1MHz, (Figure 9)

- - 200 pF

- - 85 pF

- - 30 pF

--15

o

C/W

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage (Note 2) V
Diode Reverse Recovery Time t

NOTE:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

ISD = 1A - - 1.4 V

SD

ISD = 2A, dISD/dt = 50A/µs - 100 - ns

rr

5-2

RFL2N05, RFL2N06

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0.0
0 25 50 75 100 150

TC, CASE TEMPERATURE (oC)

Unless Otherwise Specified

FIGURE 1. NORMALIZED POWER DISSIPATION vs

CASE TEMPERATURE

10.00
OPERATION IN THIS AREA

LIMITED BY r

1.00

0.10

, DRAIN CURRENT (A)

D

I

0.01
1

V

DS

DS(ON)

10 100 1000

, DRAIN TO SOURCE VOLTAGE (V)

RFL2N06

RFL2N05

TJ= MAX RATED

125

2.5

2.0

1.5

1.0

, DRAIN CURRENT (A)

D

I

0.5

0

25 50 75 100 125 150

T

, CASE TEMPERATURE (oC)

C

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

10

250µs PULSE TEST
DUTY CYCLE ≤ 2%
TC = 25oC

8

6

4

, DRAIN CURRENT (A)

D

I

2

0

0

12 34 567

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 20V

V

= 10V

GS

V

= 9V

GS

= 8V

V

GS

VGS = 7V
V

= 6V

GS

VGS = 5V

FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. SATURATION CHARACTERISTICS

4

VDS= 10V
250µs PULSE TEST

3

2

, DRAIN CURRENT (A)

1

D

I

0

024 6810

V

, GATE TO SOURCE VOLTAGE (V)

GS

-40oC

o

25

C

o

C

125

, DRAIN TO SOURCE ON

DS(ON)

r

VGS = 10V
250µs PULSE TEST

1.4

1.2

1.0

0.8

0.6

RESISTANCE (Ω)

0.4

0.2

0

012345

ID, DRAIN CURRENT (A)

FIGURE 5. TRANSFER CHARACTERISTICS FIGURE 6. DRAIN TO SOURCE ON RESIST ANCE vs DRAIN

CURRENT

5-3

125oC

o

C

25

o

-40

C

RFL2N05, RFL2N06

Typical Performance Curves

2.0
ID= 1A

Unless Otherwise Specified (Continued)

VGS = 10V

1.5

1.0

ON RESISTANCE

0.5

NORMALIZED DRAIN TO SOURCE

0

-50 0 50 100 150 200
, JUNCTION TEMPERATURE (oC)

T

J

FIGURE 7. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

f = 1MHz

240

200

F)

P

160

120

80

C, CAPACITANCE (

40

0

0 1020 3040 5060 70

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 0V, f = 1MHz
C

= CGS + C

ISS

C

RSS

C

OSS

C

ISS

C

OSS

C

RSS

= C

GD

≈ CDS + C

GD

GS

1.5
VGS = V

DS

ID = 250µA

1.0

0.5

NORMALIZED GATE

THRESHOLD VOLTAGE (V)

0

50 0 50 100 150

, JUNCTION TEMPERATURE (oC)

T

J

FIGURE 8. NORMALIZED GATE THRESHOLD V OLTA GE vs

JUNCTION TEMPERATURE

VDS = 10V

1200

80µsPULSE TEST

1000

800

600

400

200

, FORWARD TRANSCONDUCTANCE (S)

fs

g

0

0 0.5 1 1.5 2 2.5 3

ID, DRAIN CURRENT (A)

-40oC

25oC

125

o

C

FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 10. FORWARD TRANSCONDUCTANCE vs DRAIN

CURRENT

80

45

30

, VOLTS (V)

DS

V

15

0

BV

DSS

VDD= V

DSS

0.75V

0.50V

0.25 V

I

G(REF)

20 80

I

G(ACT)

GATE

TO

SOURCE

VOLTAGE

RL = 15

I

= 0.095mA

G(REF)

V

= 10V

GS
DSS
DSS

DSS

DRAIN TO SOURCE

0.75V

0.50V

0.25V

VOLTAGE

t, TIME (µs)

DSS
DSS

DSS

VDD= V

I

G(REF)

I

DSS

G(ACT)

10

8

6

4

2

0

, VOLTS (V)

GS

V

NOTE: Refer to Harris Application Notes AN7254 and AN7260.

FIGURE 11. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT

5-4

Test Circuits and Waveforms

RFL2N05, RFL2N06

R

G

V

GS

FIGURE 12. SWITCHING TIME TEST CIRCUIT

t

ON

t

d(ON)

t

R

L

+

V

DD

-

DUT

V

DS

0

V

GS

0

90%

10%

r

10%

50%

PULSE WIDTH

t

d(OFF)

90%

t

OFF

50%

t

f

90%

10%

FIGURE 13. RESISTIVE SWITCHING WAVEFORMS

5-5