Datasheet RFK70N06 Datasheet (Intersil)

RFK70N06

Data Sheet September 1998

70A, 60V, 0.014 Ohm, N-Channel Power
MOSFET

The RFK70N06 N-Channel powerMOSFETismanufactured
using the MegaFET process. This process, which uses
feature sizes approaching those of LSI integrated circuits
gives optimum utilization of silicon, resulting in outstanding
performance. They are designed for use in applications such
as switching regulators, switching converters, motor drivers,
relay drivers and emitter switches for bipolar transistors.
These transistors can be operated directly from integrated
circuits.

Formerly developmental type TA49007.

Ordering Information

PART NUMBER PACKAGE BRAND

RFK70N06 TO-204AE RFK70N06

NOTE: When ordering, use the entire part number.

File Number

Features

• 70A, 60V

•r

• Temperature Compensating PSPICE Model

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

• 175

= 0.014Ω

DS(ON)

o

C Operating Temperature

Symbol

D

G

S

4331.1

Packaging

DRAIN
(FLANGE)

TO-204AE

SOURCE (PIN 2)

GATE (PIN 1)

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

RFK70N06

Absolute Maximum Ratings T

= 25oC Unless Otherwise Specified

C

RFK70N06 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (RGS= 20kΩ ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

DSS

DGR

DM

GS

AS

D

Refer to Peak Current Curve

D

Linear Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, T

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

60 V
60 V
70

±20 V

Refer to UIS Curve

150

1.0

-55 to 175

260

A

W

W/oC

o

C

o

C

NOTE:

1. TJ= 25oC to 150oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate to Source Threshold Voltage V

GS(TH)VGS

Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I
Drain to Source On Resistance (Note 2) r

DS(ON)ID

Turn-On Time t
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Turn-Off Time t
Total Gate Charge Q

g(TOT)VGS

Gate Charge at 10V Q
Threshold Gate Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R

DSSID

DSS

GSS

ON

r

f

OFF

g(10)VGS

g(TH)VGS

ISS

OSS

RSS

θJC
θJA

= 250µA, VGS = 0V 60 - - V

= VDS, ID = 250µA 2-4V
VDS = Rated BV
VDS = 0.8 x Rated BV

, VGS = 0V - - 1 µA

DSS

, VGS = 0V, TC = 150oC- - 25 µA

DSS

VGS = ±20V - - ±100 nA

= 70A, VGS = 10V (Figure 10) - - 0.014 Ω

VDD = 30V, I
VGS = 10V, RG = 2.5Ω
(Figures 14, 17, 18)

≈ 70A, R

D

= 0.43Ω,

L

- - 125 ns

-12- ns

-50- ns

-40- ns

-15- ns

- - 125 ns
= 0V to 20V VDD = 48V, I
= 0V to 10V - 100 115 nC
= 0V to 2V - 5.5 6.5 nC

RL = 0.68Ω,
I

G(REF)

(Figures 19, 20)

VDS = 25V, VGS = 0V, f = 1MHz
(Figure 13)

D

= 1.0mA

≈ 70A,

- 185 215 nC

- 3000 - pF

- 900 - pF

- 300 - pF

- - 1.0oC/W

--80oC/W

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage V
Reverse Recovery Time t

NOTES:

2. Pulse test: pulse width ≤ 300ms, duty cycle ≤ 2%.

3. Repetitive rating: pulse width is limited by maximum junction temperature. See Transient Thermal Temperature curve (Figure 3).

2

ISD = 70A - - 1.5 V

SD

ISD = 70A, dISD/dt = 100A/µs - - 125 ns

rr

Typical Performance Curves

RFK70N06

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

125

0 25 50 75 100 175

150

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

2

DUTY CYCLE - DESCENDING ORDER

0.5

1

0.2

0.1

0.05

0.02

0.01

0.1

, NORMALIZED TRANSIENT

THERMAL IMPEDANCE

JC

θ

Z

0.01

-5

10

SINGLE PULSE

-4

10

-3

10

t, RECTANGULAR PULSE DURATION (s)

80

70

60

50

40

30

, DRAIN CURRENT (A)

20

D

I

10

0

25

50

75 100 125 175

TC, CASE TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

P

DM

t

1

t

JC

1/t2

x R

2

JC

θ

NOTES:
DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-2

10

-1

10

θ

0

10

+ T

150

C

1

10

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

500

100

10

, DRAIN CURRENT (A)

D

I

OPERATION IN THIS
AREA MAY BE
LIMITED BY r

1

1

VDS, DRAIN TO SOURCE VOLTAGE (V)

DS(ON)

TJ = MAX RATED
T

= 25oC

C

100µs

1ms

10ms

100ms

DC

10 100

1000

VGS = 10V

, PEAK CURRENT (A)

100

DM

I

TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION

50

-5

10

-4

10

TC = 25oC

FOR TEMPERATURES
ABOVE 25
CURRENT AS FOLLOWS:

-3

10

-2

10

t, PULSE WIDTH (s)

I = I

o

25

-1

10

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY

3

C DERATE PEAK

150 - T

C

125

0

10

1

10

RFK70N06

Typical Performance Curves

300

100

, AVALANCHE CURRENT (A)

AS

I

10

0.01

If R = 0
tAV = (L)(IAS)/(1.3*RATED BV

If R ≠ 0

= (L/R) ln [(IAS*R)/(1.3*RATED BV

t

AV

STARTING TJ = 150oC

0.1

tAV, TIME IN AVALANCHE (ms)

STARTING TJ = 25oC

(Continued)

- VDD)

DSS

DSS-VDD

1

) +1]

NOTE: Refer to Intersil Application Notes AN9321 and AN9322.

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY

200

DUTY CYCLE = 0.5% MAX
PULSE DURATION = 250µs

160

120

25oC

-55oC

VDD= 15V

175oC

200

160

VGS = 20V

120

VGS = 10V

80

, DRAIN CURRENT (A)

D

I

40

0

10

012345

VDS, DRAIN TO SOURCE VOLTAGE (V)

PULSE DURATION = 250µs
T

C

VGS = 8V

VGS = 7V

= 25oC

VGS = 6V

VGS = 5V

VGS = 4.5V

FIGURE 7. SATURATION CHARACTERISTICS

50

40

30

ID = 140A

ID = 70A

ID = 35A

TC = 25oC

80

40

, DRAIN TO SOURCE CURRENT (A)

DS(ON)

I

0

0468102

VGS, GATE TO SOURCE VOLTAGE (V)

20

, DRAIN TO SOURCE

ON RESISTANCE (mΩ)

10

DS(ON)

r

0

ID = 17.5A

4

PULSE DURATION = 250µs, VDD= 15V

675

, GATE TO SOURCE VOLTAGE (V)

V

GS

FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

2.5

250µs PULSE TEST

= 10V, ID = 70A

V

GS

2

1.5

1

ON RESISTANCE

0.5

NORMALIZED DRAIN TO SOURCE

0

-80 -40 0 40 80 120 200
TJ, JUNCTION TEMPERATURE (oC)

160

2

VGS = VDS, ID = 250µA

1.5

1

NORMALIZED GATE

0.5

THRESHOLD VOLTAGE

0

-80 -40 0 40 80 120 200
TJ, JUNCTION TEMPERATURE (oC)

8910

160

FIGURE 10. NORMALIZED DRAIN TOSOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

4

FIGURE 11. NORMALIZED GATETHRESHOLD VOLTAGE vs

JUNCTION TEMPERATURE

RFK70N06

Typical Performance Curves

2

ID = 250µA

1.5

1

0.5

BREAKDOWN VOLTAGE

NORMALIZED DRAIN TO SOURCE

0

-80

-40 0 40 80 120
, JUNCTION TEMPERATURE (oC)

T

J

(Continued)

160 200

FIGURE 12. NORMALIZED DRAIN TOSOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

60

VDD = BV

45

DSS

5000

4000

C

ISS

3000

2000

C, CAPACITANCE (pF)

1000

0

0 5 10 15 20

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

C

C

OSS

RSS

VGS = 0V, f = 1MHz
C

= CGS + C
C
C

ISS
RSS
OSS

= C

≈ CDS + C

GD

GD

GS

FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

VDD = BV

DSS

10.0

7.5

25

RL = 0.86Ω
I

= 2.2mA

30

15

, DRAIN TO SOURCE VOLTAGE (V)

DS

V

G(REF)

VGS = 10V

PLATEAU VOLTAGES IN
DESCENDING ORDER:

V

= BV

DD

VDD = 0.75 BV
VDD = 0.50 BV

0

I

G REF()

--------------------- -

20

I

G ACT()

VDD = 0.25 BV

DSS

t, TIME (µs)

DSS
DSS
DSS

80

I

G REF()

--------------------- -

I

GACT()

5.0

2.5

0

, GATE TO SOURCE VOLTAGE (V)

GS

V

NOTE: Refer to Intersil Application Notes AN7254 and AN7260.

FIGURE 14. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT

5

RFK70N06

Test Circuits and Waveforms

V

DS

BV

DSS

L

VARY t

TO OBTAIN

P

REQUIRED PEAK I

V

GS

AS

R

G

+

V

DD

-

DUT

0V

P

I

AS

0.01Ω

0

t

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

t

P

I

AS

t

AV

V

DS

V

DD

t

ON

t

DS

GS

10%

d(ON)

90%

50%

t

10%

r

PULSE WIDTH

V

DS

V

R

DUT

L

+

V

DD

-

0

V

0

V

GS

R

GS

V

GS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

V

I

G(REF)

DS

R

L

V

GS

+

V

DD

-

DUT

V

DD

VGS= 2V

0

Q

g(TOT)

V

DS

Q

g(10)

V

GS

Q

g(TH)

VGS = 10V

t

d(OFF)

90%

t

OFF

50%

t

f

10%

VGS= 20V

90%

I

G(REF)

0

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

6

PSPICE Electrical Model

.SUBCKT RFK70N06 2 1 3 ; rev 1/16/97

CA 12 8 5.56e-9
CB 15 14 5.30e-9
CIN 6 8 2.63e-9

DBODY 7 5 DBDMOD
DBREAK 5 11 DBKMOD
DPLCAP 10 5 DPLCAPMOD

RFK70N06

DPLCAP

10

RDRAIN

5

DBREAK

RLDRAIN

LDRAIN

2

DRAIN

EBREAK 11 7 17 18 65.18
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTO 20 6 18 8 1

IT 8 17 1

GATE

1

LDRAIN 2 5 1e-9
LGATE 1 9 11.45e-9
LSOURCE 3 7 4.60e-9

MOS1 16 6 8 8 MOSMOD M = 0.99
MOS2 16 21 8 8 MOSMOD M = 0.01

RBREAK 17 18 RBKMOD 1
RDRAIN 5 16 RDSMOD 4.66e-3
RLDRAIN 2 5 10
RGATE 9 20 1.21
RLGATE 1 9 114.5
RIN 6 8 1e9
RSOURCE 8 7 RDSMOD 3.92e-3
RLSOURCE 3 7 46
RVTO 18 19 RVTOMOD 1

S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD

RLGATE

LGATE

9

RGATE

-

6

ESG

8

+

EVTO

20

+

18

8

S1A

12

S1B

CA CB

6

-

RIN

13814

13

13

+

6

EGS

8

--

S2A

S2B

-

VTO

15

CIN

EDS

7

IT

DBODY

RLSOURCE

LSOURCE

18

RVTO

19

VBAT

+

3

SOURCE

11

17

+

17

18

-

RBREAK

16

+

21

MOS1

14

+

5
8

EBREAK

MOS2

RSOURCE

8

VBAT 8 19 DC 1
VTO 21 6 0.605

.MODEL DBDMOD D (IS = 7.91e-12 RS = 3.87e-3 TRS1 = 2.71e-3 TRS2 = 2.50e-7 CJO = 4.84e-9 TT = 4.51e-8)
.MODEL DBKMOD D (RS = 3.9e-2 TRS1 =1.05e-4 TRS2 = 3.11e-5)
.MODEL DPLCAPMOD D (CJO = 4.8e-9 IS = 1e-30 N = 10)
.MODEL MOSMOD NMOS (VTO = 3.46 KP = 47 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL RBKMOD RES (TC1 = 8.46e-4 TC2 = -8.48e-7)
.MODEL RDSMOD RES (TC1 = 2.23e-3 TC2 = 6.56e-6)
.MODEL RVTOMOD RES (TC1 = -3.29e-3 TC2 = 3.49e-7)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -8.35 VOFF= -6.35)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -6.35 VOFF= -8.35)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.0 VOFF= 3.0)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 3.0 VOFF= -2.0)

.ENDS

NOTE: For furtherdiscussion of the PSPICE model, consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temper-
ature Options; written by William J. Hepp and C. Frank Wheatley.

7

RFK70N06

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by description only. Intersil Corporationreserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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