
RFK25N18, RFK25N20
October 1998 File Number 1500.3Data Sheet
25A, 180V and 200V, 0.150 Ohm,
N-Channel Power MOSFETs
These are N-Channel enhancement mode silicon gate
power field effect transistors designed for applications such
as switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA09594.
Ordering Information
PART NUMBER PACKAGE BRAND
RFK25N18 TO-204AE RFK25N18
RFK25N20 TO-204AE RFK25N20
NOTE: When ordering, use the entire part number.
Packaging
JEDEC TO-204AE
DRAIN
(FLANGE)
Features
• 25A, 180V and 200V
•r
DS(ON)
= 0.150Ω
Symbol
D
G
S
GATE (PIN 1)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
SOURCE (PIN 2)
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999

RFK25N18, RFK25N20
Absolute Maximum Ratings T
= 25oC, Unless Otherwise Specified
C
RFK25N18 RFK25N20 UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . V
DGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
DS
D
DM
GS
D
180 200 V
180 200 V
25 25 A
60 60 A
±20 ±20 V
150 150 W
Linear Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 1.2 W/oC
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T
STG
-55 to 150 -55 to 150
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
260 260
o
C
o
C
NOTE:
1. TJ= 25oC to 125oC.
Electrical Specifications T
= 25oC, Unless Otherwise Specified
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
DSSID
= 250µA, VGS = 0
RFK25N18 180 - - V
RFK25N20 200 - - V
Gate Threshold Voltage V
GS(TH)VGS
Zero Gate Voltage Drain Current I
Gate to Source Leakage Current I
Drain to Source On Resistance (Note 2) r
Drain to Source On Voltage (Note 2) V
Turn On Delay Time t
DS(ON)ID
DS(ON)ID
d(ON)ID
Rise Time t
Turn-Off Delay Time t
d(OFF)
Fall Time t
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Thermal Resistance Junction to Case R
DSS
GSS
r
f
ISS
OSS
RSS
JC
θ
= VDS, ID = 250µA 2-4V
VDS= Rated BV
VDS= 0.8 x Rated BV
, VGS = 0V - - 1 µA
DSS
DSS,VGS
= 0V, TC= 125oC- - 25 µA
VGS = ±20V, VDS = 0V - - ±100 nA
= 25A, VGS = 10V (Figures 6, 7) - - 0.150 Ω
= 25A, VGS = 10V - - 3.75 V
≈ 12.5A, V
RL= 8 ,
(Figures 10, 11, 12)
= 100V, RG= 50 , VGS = 10V
DD
-4080ns
- 150 225 ns
- 300 400 ns
- 120 200 ns
VGS = 0V, VDS = 25V
f = 1MHz
(Figure 9)
- - 3500 pF
- - 900 pF
- - 400 pF
- - 0.83oC/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage (Note 2) V
Diode Reverse Recovery Time t
NOTES:
2. Pulse test: pulse width ≤ 300µs Duty Cycle ≤ 2%.
3. Repetitive rating: pulse width is limited by maximum junction temperature.
2
ISD = 12.5A - - 1.4 V
SD
ISD= 4A, dISD/dt = 100A/µs - 300 - ns
rr

RFK25N18, RFK25N20
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 50 100 150
TC, CASE TEMPERATURE (oC)
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
100
10
I
D(MAX)
CONTINUOUS
TC = 25oC
TJ = MAX RATED
30
25
20
15
10
, DRAIN CURRENT (A)
D
I
5
0
25 50 75 100 125 150
TC, CASE TEMPERATURE (oC)
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
PULSE DURATION = 80µs
60
DUTY CYCLE ≤ 2%
= 25oC
T
C
50
40
VGS = 10V
VGS = 20V
VGS = 8V
VGS = 7V
OPERATION IN THIS AREA
MAY BE LIMITED BY r
1
, DRAIN CURRENT (A)
D
I
0.1
1 10 100 1000
DS(ON)
VDS, DRAIN TO SOURCE (V)
30
20
DRAIN CURRENT (A)
D,
I
10
034567
21
V
DRAIN TO SOURCE VOLTAGE (V)
DS,
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. SATURATION CHARACTERISTICS
VDS= 10V
PULSE DURATION = 80µs
35
DUTY CYCLE ≤ 2%
25
15
125oC
DRAIN TO SOURCE CURRENT (A)
5
DS(ON),
I
0246810
25oC
V
GATE TO SOURCE VOLTAGE (V)
GS,
-40oC
0.16
0.14
0.12
0.10
0.08
0.06
DRAIN TO SOURCE ON
RESISTANCE (Ω)
0.04
DS(ON),
r
0.02
0
01020304050
125oC
25
-40
VGS= 10V
PULSE DURATION = 80µs
ID,DRAIN CURRENT (A)
o
C
o
C
VGS = 6V
VGS = 5V
V
= 4V
GS
FIGURE 5. TRANSFER CHARACTERISTICS FIGURE 6. DRAIN TO SOURCE ON RESISTANCE vs DRAIN
CURRENT
3

RFK25N18, RFK25N20
Typical Performance Curves
3
= 25A
I
D
VGS = 10V
PULSE DURATION = 80µs
2
1
ON RESISTANCE
NORMALIZED DRAIN TO SOURCE
0
-50 0 50 100 150
T
JUNCTION TEMPERATURE (oC)
J,
Unless Otherwise Specified (Continued)
FIGURE 7. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
VGS = 0V, f = 1MHz
= CGS + C
C
3000
C
ISS
2000
1000
C, CAPACITANCE (pF)
0
01020304050
V
DRAIN TO SOURCE VOLTAGE (V)
DS,
C
C
OSS
RSS
C
C
ISS
RSS
OSS
= C
GD
≈ CDS + C
FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
GD
GD
1.3
ID= 250µA
VGS = V
NORMALIZED GATE
1.2
1.1
1.0
0.9
0.8
THRESHOLD VOLTAGE (V)
0.7
-50
DS
0 50 100 150
JUNCTION TEMPERATURE (oC)
T
J,
FIGURE 8. NORMALIZED GATETHRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
200
150
100
50
, DRAIN TO SOURCE VOLTAGE (V)
DS
V
VDD= BV
0
DSS
0.75BV
0.50BV
0.25BV
DRAIN TO SOURCE VOLTA GE
I
G(REF)
20 80
I
G(ACT)
GATE
SOURCE
VOLTAGE
RL = 8Ω
I
= 2mA
G(REF)
VGS = 10V
DSS
DSS
DSS
t, TIME (µs)
0.75BV
0.50BV
0.25BV
V
DSS
DSS
DSS
DD
= BV
I
I
DSS
G(REF)
G(ACT)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 10. NORMALIZED SWITCHING WAVEFORMSFOR
CONSTANT GATE CURRENT
10
8
6
4
2
0
, GATE TO SOURCE VOLTAGE (V)
GS
V
4

Test Circuits and Waveforms
RFK25N18, RFK25N20
t
ON
t
d(ON)
t
R
L
+
V
R
G
DUT
V
GS
DD
-
V
DS
0
V
GS
10%
0
r
90%
10%
50%
PULSE WIDTH
t
d(OFF)
FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT FIGURE 12. RESISTIVE SWITCHING WAVEFORMS
V
DS
12V
BATTERY
0
0.2µF
I
g(REF)
CURRENT
REGULATOR
50kΩ
0.3µF
G
IG CURRENT
SAMPLING
RESISTOR RESISTOR
SAME TYPE
AS DUT
D
DUT
S
CURRENT
I
D
SAMPLING
(ISOLATED
SUPPLY)
V
DS
V
DD
Q
g(TOT)
Q
gd
Q
gs
V
DS
0
I
g(REF)
0
V
90%
GS
t
OFF
50%
t
f
90%
10%
FIGURE 13. GATE CHARGE TEST CIRCUIT FIGURE 14. GATE CHARGE WAVEFORMS
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporationreserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
5
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029