Datasheet RF1S40N10SM, RFG40N10, RFP40N10 Datasheet (Intersil)

RFG40N10, RFP40N10, RF1S40N10SM

Data Sheet July 1999 File Number

40A, 100V, 0.040 Ohm, N-Channel Power
MOSFETs

These are N-Channel power MOSFETs manufacturedusing
the MegaFET process. This process, which uses feature
sizes approaching those of LSI integrated circuits gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, relay drivers and emitter switches for bipolar
transistors. These transistors can be operated directly from
integrated circuits.

Formerly developmental type TA9846

Ordering Information

PART NUMBER PACKAGE BRAND

RFG40N10 TO-247 RFG40N10
RFP40N10 TO-220AB RFP40N10
RF1S40N10SM TO-263AB F1S40N10

NOTE: When ordering, use theentire part number .Add the suffix, 9A,
to obtain the TO-263ABvariant intape and reel, i.e.RF1S40N10SM9A.

Features

• 40A, 100V

•r

DS(ON)

= 0.040Ω

• UIS Rating Curve

• SOA is Power Dissipation Limited

o

C Operating Temperature

• 175

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”

Symbol

D

G

S

2431.3

Packaging

DRAIN

(FLANGE)

JEDEC STYLE TO-247 JEDEC TO-220AB

SOURCE

DRAIN

GATE

JEDEC TO-263AB

GATE
SOURCE

DRAIN

(FLANGE)

DRAIN

(FLANGE)

SOURCE

DRAIN

GATE

4-450

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

RFG40N10, RFP40N10, RF1S40N10SM

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

RFG40N10, RFP40N10,

RF1S40N10SM UNITS

Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (RGS= 1MΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . V

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

DSS

DGR

GS

100 V
100 V
±20 V

Drain Current

Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Drain Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

D

DM

AS

D

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, see Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

40

100

Figures 4, 12, 13

160

1.07

-55 to 175

300
260

A
A

W

W/oC

o

C

o

C

o

C

NOTES:

1. TJ = 25oC to 150oC.

2. Repetitive Rating: pulse width limited by maximum junction temperature.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate Threshold Voltage V

GS(TH)VGS

Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I
Drain to Source On Resistance r

DS(ON)ID

Turn-On Time t
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Turn-Off Time t
Total Gate Charge Q

g(TOT)VGS

Gate Charge at 10V Q
Threshold Gate Charge Q
Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R

DSSID

DSS

GSS

ON

r

f

OFF

g(10)

g(TH)

θJC

θJA

= 250µA, VGS = 0V (Figure 9) 100 - - V

= VDS, ID = 250µA (Figure 8) 2 - 4 V

VDS = 80V,
VGS = 0V

TC = 25oC--1µA
TC = 150oC--50µA

VGS = ±20V - - ±100 nA

= 40A, VGS = 10V (Figure 7) - - 0.040 Ω

VDD = 50V, ID = 20A,
RL = 2.5Ω, VGS = 10V, RGS = 4.2 Ω
(Figure 11)

- - 80 ns

-17- ns

-30- ns

-42- ns

-20- ns

- - 100 ns

= 0V to 20V VDD = 80V,
VGS = 0V to 10V - - 150 nC
VGS = 0V to 2V - - 7.5 nC

ID = 40A,
RL = 2.0Ω
(Figures 11)

TO-247 - - 30
TO-220AB and TO-263AB - - 62

- - 300 nC

- - 0.94

o
o
o

C/W
C/W
C/W

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage V
Reverse Recovery Time t

4-451

SD

rr

ISD = 40A - - 1.5 V
ISD = 40A, dISD/dt = 100A/µs - - 200 ns

RFG40N10, RFP40N10, RF1S40N10SM

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 175

TC, CASE TEMPERATURE (oC)

Unless Otherwise Specified

125

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

100

10

V

DSS(MAX)

= 100V

TC = 25oC
SINGLE PULSE

T

= MAX RATED

J

DC OPERATION

150

40

32

24

16

, DRAIN CURRENT (A)

D

I

8

0

25 50 75 100 125 150

TC, CASE TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

100

STARTING T

J

STARTING T

J

= 150

10

= 25

o

C

o

C

175

1

, DRAIN CURRENT (A)

D

I

0.1
1 10 100

OPERATION IN THIS
AREA MAY BE
LIMITED BY r

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

DS(ON)

IF R = 0
t

= (L) (IAS) / (1.3 RATED BV

AV

AVALANCHE CURRENT (A)

IF R ≠ 0

AS,

I

t

= (L/R) LN [(IAS*R) / (1.3 RATED BV

AV

1

0.01 0.1 1 10
TIME IN AVALANCHE (ms)

t

AV,

DSS

- VDD)

- VDD) + 1]

DSS

FIGURE 3. FORWARD BIAS SAFE OPERATING AREA NOTE: Refer to Intersil application notes AN9321 and AN9322.

FIGURE 4. UNCLAMPED INDUCTIVE SWITCHING

CAPABILITY

100

80

60

40

, DRAIN CURRENT (A)

D

I

20

0

0246810

GS

V

V

= 10V

DS,

= 7V

GS

V

DRAIN TO SOURCE VOLTAGE (V)

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
TC = 25oC

VGS = 6V

VGS = 5V

VGS = 4V

100

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

= 15V

V

80

DD

60

40

DRAIN CURRENT (A)

D,

20

I

0

0246810

VGS, GATE TO SOURCE VOLTAGE (V)

-55

25

175

o

C

o

C

o

C

FIGURE 5. SATURATION CHARACTERISTICS FIGURE 6. TRANSFER CHARACTERISTICS

4-452

RFG40N10, RFP40N10, RF1S40N10SM

Typical Performance Curves

2.5

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

= 10V, ID = 40A

V

GS

2.0

1.5

1.0

ON RESISTANCE

0.5

NORMALIZED DRAIN TO SOURCE

0

-50 0 50 100 150 200
TJ,JUNCTION TEMPERATURE (oC)

Unless Otherwise Specified (Continued)

FIGURE 7. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

2.0
ID = 250µA

1.5

1.50
VGS = V

DS

ID = 250µA

1.25

1.00

0.75

0.50

NORMALIZED GATE

THRESHOLD VOLTAGE

0.25

0

-50 0 50 100 150 200
TJ,JUNCTION TEMPERATURE (oC)

FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs

JUNCTION TEMPERATURE

6000

5000

4000

VGS = 0V, f = 1MHz
C

= CGS + C
C
C

ISS
RSS
OSS

= C

GD

≈ CDS + C

GD

GD

1.0

0.5

BREAKDOWN VOLTAGE

NORMALIZED DRAIN TO SOURCE

0

-50 0 50 100 150 200
TJ,JUNCTION TEMPERATURE (oC)

FIGURE 9. NORMALIZED DRAIN TOSOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

100

75

50

25

DRAIN TO SOURCE VOLTAGE (V)

DS,

V

0

VDD = BV

20

I

g(REF)

I

g(ACT)

DSS

0.75 BV

0.50 BV

0.25 BV

NOTE: Refer to Intersil Application Notes AN7254 and AN7260.

FIGURE 11. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT

DSS
DSS
DSS

RL = 2.5Ω
I

= 2.25mA

g(REF)

V

= 10V

GS

t, TIME (µs)

3000

2000

C, CAPACITANCE (pF)

1000

0

0 5 10 15 20 25

C

ISS

C

OSS

C

RSS

VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

10

0.75 BV

0.50 BV

0.25 BV

VDD = BV

DSS
DSS
DSS

DSS

I

g(REF)

80

I

g(ACT)

7.5

5.0

2.5

0

GATE TO SOURCE VOLTAGE (V)

GS,

V

4-453

RFG40N10, RFP40N10, RF1S40N10SM

Test Circuits and Waveforms

V

DS

BV

DSS

L

VARY t

TO OBTAIN

P

REQUIRED PEAK I

V

GS

AS

R

G

+

V

DD

-

DUT

0V

P

I

AS

0.01Ω

0

t

FIGURE 12. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 13. UNCLAMPED ENERGY WAVEFORMS

t

P

I

AS

t

AV

V

DS

V

DD

t

ON

t

d(ON)

t

R

L

+

V

DD

-

R

GS

V

GS

DUT

V

DS

0

V

GS

10%

0

r

90%

10%

50%

PULSE WIDTH

FIGURE 14. SWITCHING TIME TEST CIRCUIT FIGURE 15. RESISTIVE SWITCHING WAVEFORMS

V

I

g(REF)

DS

R

L

V

GS

+

V

DD

-

DUT

V

DD

VGS= 2V

0

Q

g(TOT)

V

DS

Q

g(10)

V

GS

Q

g(TH)

VGS = 10V

t

d(OFF)

90%

t

OFF

50%

t

f

10%

VGS= 20V

90%

I

g(REF)

0

FIGURE 16. GATE CHARGE TEST CIRCUIT FIGURE 17. GATE CHARGE WAVEFORMS

4-454

RFG40N10, RFP40N10, RF1S40N10SM

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.inter sil.com

Sales Office Headquarters

NORTH AMERICA

Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: [phone]
FAX: [phone]

4-455

EUROPE

Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: [phone]
FAX: [phone]

ASIA

Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: [phone]
FAX: [phone]