Datasheet RFD8P06E, RFD8P06ESM, RFP8P06E Datasheet (Intersil)

RFD8P06E, RFD8P06ESM, RFP8P06E

Data Sheet July 1999

8A, 60V, 0.300 Ohm, P-Channel Power
MOSFETs

These are P-Channel power MOSFETs manufacturedusing
the MegaFET process. This process, which uses feature
sizes approaching those of LSI integrated circuits gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, relay drivers and emitter switches for bipolar
transistors. These transistors can be operated directly from
integrated circuits.

The RFD8P06E,RFD8P06ESM and RFP8P06E incorporate
ESD protection and are designed to withstand 2kV (Human
Body Model) of ESD.

Formerly developmental type TA49044.

Ordering Information

PART NUMBER PACKAGE BRAND

RFP8P06E TO-220AB RFP8P06E
RFD8P06ESM TO-252AA D8P06E
RFD8P06E TO-251AA D8P06E

NOTE: Whenordering, use the entirepart number.Addthesuffix9A
to obtain the TO-252AA variant in tape and reel, i.e.
RFD8P06ESM9A.

File Number

Features

• 8A, 60V

DS(ON)

= 0.300Ω

®

Model

•r

• Temperature Compensating PSPICE

• 2kV ESD Protected

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

o

C Operating Temperature

• 175

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”

Symbol

D

G

S

3937.5

Packaging

DRAIN (FLANGE)

JEDEC TO-220AB JEDEC TO-251AA

SOURCE

DRAIN

4-117

GATE

JEDEC TO-252AA

DRAIN (FLANGE)

GATE

SOURCE

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

DRAIN (FLANGE)

PSPICE® is a registered trademark of MicroSim Corporation.

| Copyright © Intersil Corporation 1999.

SOURCE

DRAIN

GATE

RFD8P06E, RFD8P06ESM, RFP8P06E

Absolute Maximum Ratings T

= 25oC

C

RFD8P06E, RFD8P06ESM, RFP8P06E UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (RGS = 20KΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DSS

DGR

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Single Pulse Avalanche Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Linear Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

GS

DM

AS

D

Refer to Peak Current Curve

D

-60 V

-60 V

±20 V

8

Refer to UIS Curve

48

0.32

A
A

W

W/oC

Electrostatic Discharge Rating MIL-STD-883, Category B(2) . . . . . . . . . . . . . . . . . . . .ESD 2 kV

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

STG

-55 to 175

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

300
260

o

C

o

C

o

C

NOTE:

1. TJ= 25oC to 150oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate Threshold Voltage V

GS(TH)VGS

Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I
Drain to Source On Resistance (Note 3) r

DS(ON)ID

Turn-On Time t
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Turn-Off Time t
Total Gate Charge Q

g(TOT)VGS

Gate Charge at 5V Q
Threshold Gate Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R

DSSID

DSS

GSS

ON

r

f

OFF

g(-10)VGS
g(TH)VGS

ISS
OSS
RSS

θJC

θJA

= 250µA, VGS = 0V -60 - - V

= VDS, ID = 250µA -2.0 - -4.0 V
VDS = Rated BV
VDS = 0.8 x Rated BV

, VGS = 0V - - -1.0 µA

DSS

, TC = 150oC - - -25 µA

DSS

VGS = ±20V - - ±10 µA

= 8A, VGS = -10V - - 0.300 Ω

VDD = -30V, I
RL = 3.75Ω, VGS = -10V, RG = 2.5Ω
(Figure 13)

D

≈ 8A,

- - 70 ns

-15-ns

-30-ns

-40-ns

-25-ns

- - 100 ns
= 0 to -20V VDD = -48V, ID = 8A,
= 0 to -10V - 15 18 nC
= 0 to -2V - 1.15 1.5 nC

RL = 6Ω
I

g(REF)

= -1.45mA

VDS = -25V, VGS = 0V,
f = 1MHz

-3036nC

- 600 - pF

- 160 - pF

-35-pF

Figure 12 - - 3.125oC/W
TO-220 - - 62
TO-251, TO-252 - - 100

o

C/W

o

C/W

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage V
Diode Reverse Recovery Time t

SD

rr

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).

4-118

ISD = -8A - - -1.5 V
ISD = -8A, dISD/dt = -100A/µs - - 125 ns

RFD8P06E, RFD8P06ESM, RFP8P06E

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 125 150 175

TC, CASE TEMPERATURE (oC)

Unless Otherwise Specified

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

1

0.5

-10

-8

-6

-4

, DRAIN CURRENT (A)

D

I

-2

0

25 50 75 100 125 150 175

TC, CASE TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

0.2

0.1

0.1

THERMAL IMPEDANCE

0.01

0.05

0.02

0.01
SINGLE PULSE

-5

10

-4

10

-3

10

, NORMALIZED

θJC

Z

FIGURE 3. NORMALIZED TRANSIENT THERMAL IMPEDANCE

-100
TC = 25oC, TJ = MAX RATED

-10

-1

, DRAIN CURRENT (A)

D

I

-0.1

OPERATION IN THIS
AREA MAY BE
LIMITED BY r

-1 -10 -100

DS(ON)

, DRAIN TO SOURCE VOLTAGE (V)

V

DS

-2

t1, RECTANGULAR PULSE DURATION (s)

100µs

1ms

10ms

100ms

DC

10

2

-10

, PEAK CURRENT (A)

DM

-10

I

-5
10

VGS = -20V

VGS = -10V

TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION

-6

10

P

DM

t

1

t

NOTES:
DUTY FACTOR: D = t
PEAK TJ = PDM x Z

-1

10

FOR TEMPERATURES ABOVE 25oC
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:

-5

-4

10

10

t, PULSE WIDTH (s)

II

-3

0

10

=

10

2

1/t2

x R

θJC

175 T

–

--------------------- -

150

-1

10

+ T

C

C

TC = 25oC

0

10

θJC




25



-2

1

10

1

10

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY

4-119

RFD8P06E, RFD8P06ESM, RFP8P06E

Typical Performance Curves

-30

-10

STARTING TJ = 150oC

, AVALANCHE CURRENT (A)

If R = 0

= (L) (IAS) / (1.3RATED BV

t

AS

AV

I

If R ≠ 0
t

= (L/R) ln [(IAS*R) / (1.3 RATED BV

AV

-1

0.01 0.1 1 10
tAV, TIME IN AVALANCHE (ms)

DSS

Unless Otherwise Specified (Continued)

STARTING TJ = 25oC

- VDD)

- VDD) + 1]

DSS

-20

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

= 25oC

T

C

-15

-10

, DRAIN CURRENT (A)

-5

D

I

0

0 -1.5 -3.0 -4.5 -6.0 -7.5

VGS = -20V

VGS = -4.5V

VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING FIGURE 7. SATURATION CHARACTERISTICS

-20

-15

-10

, DRAIN TO SOURCE CURRENT (A)

Ds(ON)

I

= -15V

V

DD

PULSE DURATION = 250µs
DUTY CYCLE = 0.5% MAX

-5

0

0

-2 -4 -6 -8 -10
VGS, GATE TO SOURCE VOLTAGE (V)

-55oC

25oC

175oC

2.5

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V

= -10V, ID = 8A

GS

2.0

1.5

1.0

ON RESISTANCE

0.5

NORMALIZED DRAIN TO SOURCE

0

-80 -40 0 40 80 120 160 200
, JUNCTION TEMPERATURE (oC)

T

J

VGS = -10V

VGS = -8V

VGS = -7V

VGS = -6V

VGS = -5V

FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

2.0
VGS = VDS, ID = 250µA

1.5

1.0

NORMALIZED GATE

0.5

THRESHOLD VOLTAGE

0

-80 -40 0 40 80 160120 200
TJ, JUNCTION TEMPERATURE (oC)

FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs

TEMPERATURE

4-120

RESISTANCE vs JUNCTION TEMPERATURE

2.0
ID = 250µA

1.5

1.0

0.5

BREAKDOWN VOLTAGE

NORMALIZED DRAIN TO SOURCE

0

-80 -40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE (oC)

FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs TEMPERATURE

RFD8P06E, RFD8P06ESM, RFP8P06E

Typical Performance Curves

1000

VGS = 0V, f = 1MHz

800

C

ISS

Unless Otherwise Specified (Continued)

VGS = 0V, f = 1MHz

= CGS + C

C
C
C

ISS
RSS
OSS

= C

≈ C

GD

DS

+ C

GD

GS

600

400

C

C

OSS

RSS

C, CAPACITANCE (pF)

200

0

0

-5 -10 -15 -20 -25
VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

Test Circuits and Waveforms

V

DS

L

-60

-45

VDD = BV

DSS

VDD = BV

DSS

-10.0

-7.5

RL = 1.2Ω

-30

-15

, DRAIN TO SOURCE VOLTAGE (V)

DS

V

0

20

I

G(REF)

I

G(ACT)

G(REF)

0.75 BV

0.50 BV

0.25 BV
V

GS

0.75 BV

DSS

0.50 BV

DSS

0.25 BV

DSS

= -10V

t, TIME (µs)

DSS
DSS
DSS

80

I

G(REF)

I

G(ACT)

-5.0

-2.5

0.0

I

= 1.45mA

NOTE: Refer to Intersil Application Notes AN7254 and AN7260.

FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR

CONSTANT GATE CURRENT

t

AV

0

, GATE TO SOURCE VOLTAGE (V)

GS

V

VARY tP TO OBTAIN
REQUIRED PEAK I

0V

t

P

-V

GS

AS

R

G

DUT

I

AS

0.01Ω

-

V

DD

+

V

DD

I

AS

t

P

BV

DSS

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

t

ON

t

d(ON)

t

r

10%

90%

50%

PULSE WIDTH

0V

R

L

V

DS

V

GS

R

GS

-V

GS

-

+

DUT

0

V

DS

0

10%

V

GS

t

d(OFF)

V

DS

t

OFF

50%

90%

90%

t

f

10%

FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS

4-121

RFD8P06E, RFD8P06ESM, RFP8P06E

Test Circuits and Waveforms

V

DS

V

GS

I

g(REF)

FIGURE 18. GATE CHARGE TEST CIRCUIT

(Continued)

R

L

DUT

V

Q

GS

g(TH)

Q

g(-10)

Q

g(TOT)

0

VGS= -2V

-V

­V

DD

+

V

0

I

g(REF)

DD

DS

VGS= -10V

VGS= -20V

FIGURE 19. GATE CHARGE WAVEFORMS

4-122

RFD8P06E, RFD8P06ESM, RFP8P06E

PSPICE Electrical Model

.SUBCKT RFP8P06E 2 1 3 REV 6/23/94

CA 12 8 7.24e-10
CB 15 14 8.04e-10
CIN 6 8 6.00e-10

DBODY 5 7 DBDMOD
DBREAK 7 11 DBKMOD
DESD1 91 9 DESD1MOD
DESD2 91 7 DESD2MOD
DPLCAP 10 6 DPLCAPMOD

EBREAK 5 11 17 18 -79.2
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 5 10 6 8 1
EVTO 20 6 8 18 1

IT 8 17 1

LDRAIN 2 5 1e-10
LGATE 1 9 2.92e-9
LSOURCE 3 7 2.92e-9

MOS1 16 6 8 8 MOSMOD M=0.99
MOS2 16 21 8 8 MOSMOD M=0.01

RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 95.2e-3
RGATE 9 20 3.95
RIN 6 8 1e9
RSCL1 5 51 RSCLMOD 1e6
RSCL2 5 50 1e3
RSOURCE 8 7 RDSMOD 143.6e-3
RVTO 18 19 RVTOMOD 1

GATE

1

LGATE

+

-

7

RBREAK

IT

LDRAIN

DBODY

LSOURCE

SOURCE

1817

RVTO

19

-

VBAT

+

2

DRAIN

3

6

CB

5

RSCL1

5

ESCL

51

RDRAIN
16
+

MOS1

14

+

5
8

-

EBREAK

8

MOS2

DBREAK

RSOURCE

21

17
18

11

10

DPLCAP

RSCL2

-

6

ESG

8

+

RGATE

9

91

EVTO

+

-

18

8

20

DESD1

DESD2

S1A S2A

12 15

CA

RIN CIN

13

8

13

+

-

VTO

-

14
13

S2BS1B

6

EDSEGS

8

S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD

VBAT 8 19 DC 1
VTO 21 6 -0.804

ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/22,9))}

.MODEL DBDMOD D (IS=4.15e-15 RS=5.54e-2 TRS1=-1.32e-3 TRS2=-2.48e-6 CJO=6.06e-10 TT=7.50e-8)
.MODEL DBKMOD D (RS=4.66e-1 TRS1=1.58e-3 TRS2=-7.49e-6)
.MODEL DESD1MOD D (BV=20.2 TBV1=-1.25e-3 TBV2=5.79e-7 RS=36 NBV=50 IBV=7e-6)
.MODEL DESD2MOD D (BV=25.4 TBV1=-8.3e-4 TBV2=8.9e-7 NBV=50 IBV=7e-6)
.MODEL DPLCAPMOD D (CJO=2.49e-10 IS=1e-30 N=10)
.MODEL MOSMOD PMOS (VTO=-3.824 KP=5.163 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL RBKMOD RES (TC1=9.48e-4 TC2=-1.42e-7)
.MODEL RDSMOD RES (TC1=5.40e-3 TC2=1.25e-5)
.MODEL RSCLMOD RES (TC1=1.75e-3 TC2=3.90e-6)
.MODEL RVTOMOD RES (TC1=-3.55e-3 TC2=-3.43e-6)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=5.10 VOFF=3.10)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=3.10 VOFF=5.10)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.1 VOFF=-2.9)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.9 VOFF=2.1)

.ENDS
NOTE: Forfurther discussion of the PSPICE model consult A New PSPICE Sub-Circuit for the PowerMOSFETFeaturingGlobalTemperature Options;
written by William J. Hepp and C. Frank Wheatley.

4-123

RFD8P06E, RFD8P06ESM, RFP8P06E

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However ,no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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4-124

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