
RFD4N06L, RFD4N06LSM
Data Sheet June 1999
4A, 60V, 0.600 Ohm, Logic Level,
N-Channel Power MOSFETs
The RFD4N06L, RFD4N06LSM are N-Channel enhancement
mode silicon gate power field effect transistors specifically
designed for use with logic lev el (5 volt) driving sources in
applications such as programmable controllers, automotiv e
switching, and solenoid drivers. This performance is
accomplished through a special gate oxide design which
provides full rated conduction at gate biases in the 3-5 volt
range, thereby f acilitating true on-off pow er control from logic
circuit supply voltages.
Formerly developmental type TA09520.
Ordering Information
PART NUMBER PACKAGE BRAND
RFD4N06L TO-251AA RFD4N06L
RFD4N06LSM TO-252AA RFD4N06LSM
NOTE: When ordering, use the entire part number.
File Number
Features
• 4A, 60V
DS(ON)
= 0.600Ω
•r
• Design Optimized for 5 Volt Gate Drive
• Can be Driven Directly From Q-MOS, N-MOS,
or TTL Circuits
• SOA is Power Dissipation Limited
o
C Rated Junction Temperature
• 175
• Logic Level Gate
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
2837.1
Packaging
(FLANGE)
DRAIN
G
S
JEDEC TO-251AA JEDEC TO-252AA
SOURCE
DRAIN
GATE
GATE
SOURCE
DRAIN
(FLANGE)
6-189
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999

RFD4N06L, RFD4N06LSM
Absolute Maximum Ratings T
= 25oC, Unless Otherwise Specified
C
RFD4N06L
RFD4N06LSM UNITS
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
DS
DGR
GS
D
DM
D
Derated above 25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ,T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
60 V
60 V
±10V
4A
10 A
30
0.20
-55 to 175
300
260
W
W/oC
o
C
o
C
o
C
NOTE:
1. TJ= 25oC to 150oC.
Electrical Specifications T
= 25oC, Unless Otherwise Specified
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
Gate to Threshold Voltage V
Zero Gate Voltage Drain Current I
DSSID
GS(TH)VGS
DSS
= 1mA, VGS = 0V 60 - - V
= VDS, ID = 250µA 1 - 2.5 V
TC = 25oC, VDS = 50V, VGS = 0V - - 1 µA
TC = 125oC, VDS = 50V, VGS = 0V - - 50 µA
Gate to Source Leakage Current I
Drain to Source On Voltage (Note 2) V
GSS
DS(ON)ID
VGS = 10V, VDS = 0V - - 100 nA
= 1A, VGS = 5V - - 0.8 V
ID = 2A, VGS = 5V - - 2.0 V
ID = 4A, VGS = 7.5V - - 4.0 V
Drain to Source On Resistance (Note 2) r
Forward Transconductance (Note 2) V
Turn-On Delay Time t
DS(ON)ID
(plateau)
d(ON)VDD
Rise Time t
Turn-Off Delay Time t
d(OFF)
Fall Time t
Total Gate Charge
Q
g(TOT)VGS
(Gate to Source + Gate to Drain)
Gate Charge at 5V Q
Threshold Gate Charge Q
Thermal Resistance Junction to Case R
r
f
g(5)
g(TH)VGS
θJC
= 1A, VGS = 5V - - 0.600 Ω
VDS = 15V, ID = 4A - - 4.5 V
= 30V, ID = 1A, RGS = 6.25Ω,
VGS = 5V
- - 20 ns
- - 130 ns
- - 40 ns
- - 160 ns
= 0-10V VDD = 48V,
--8nC
ID = 2A,
VGS = 0-5V - - 5 nC
RL = 24Ω
= 0-1V - - 1 nC
--5oC/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage (Note 2) V
Reverse Recovery Time t
NOTES:
2. Pulsed: pulse duration = 300µs max, duty cycle = 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature.
6-190
ISD = 1A - - 1.4 V
SD
ISD = 2A, dISD/dt = 100A/µs - 150 - ns
rr

RFD4N06L, RFD4N06LSM
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 125 150
TC, CASE TEMPERATURE (oC)
Unless Otherwise Specified
FIGURE 1. NORMALIZEDPOWER DISSIPATION vs CASE
TEMPERATURE
10
TJ = MAX RATED
= 25oC
T
C
5
4
3
2
, DRAIN CURRENT (A)
D
I
1
0
25 50 75 100 125 150
T
, CASE TEMPERATURE (oC)
C
FIGURE 2. MAXIMUMCONTINUOUSDRAINCURRENT vs
CASE TEMPERATURE
PULSE DURATION = 80µs
12
T
= 25oC
C
10
VGS = 10V
VGS = 7.5V
8
1.0
OPERATION IN THIS AREA
LIMITED BY r
, DRAIN CURRENT (A)
D
I
0.1
1
VDS, DRAIN TO SOURCE VOLTAGE (V)
DS(ON)
10
100
6
4
, DRAIN CURRENT (A)
D
I
2
0
01234567
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. SATURATION CHARACTERISTICS
8
VDS = 10V
7
PULSE DURATION = 80µs
DUTY CYCLE ≤ 2%
6
5
4
3
2
TC = 125oC
, DRAIN TO SOURCE CURRENT (A)
1
DS(ON)
I
0
123456
TC = -40oC
VGS, GATE TO SOURCE VOLTAGE (V)
TC = -40oC
TC = 25oC
TC = 125oC
1.6
VGS = 5V
PULSE DURATION = 80µs
1.4
1.2
1.0
0.8
0.6
, DRAIN TO SOURCE
ON RESISTANCE(Ω)
0.4
DS(ON)
r
0.2
0
0246810
TC = 125oC
TC = 25oC
TC = -40oC
ID, DRAIN CURRENT (A)
VGS = 5V
4.5V
4V
3.5V
3V
2.5V
2V
FIGURE 5. TRANSFER CHARACTERISTICS FIGURE 6. DRAIN TOSOURCE ON RESISTANCE vs DRAIN
CURRENT
6-191

RFD4N06L, RFD4N06LSM
Typical Performance Curves
2
VGS = 5V, ID = 2A
1.5
1
0.5
NORMALIZED DRAIN TO
SOURCE ON RESISTANCE
0
-50 0 50 100
, JUNCTION TEMPERATURE (oC)
T
J
Unless Otherwise Specified (Continued)
150
FIGURE 7. NORMALIZEDDRAINTO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
400
300
200
C, CAPACITANCE (pF)
100
0
01020304050
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
VGS = 0V, f = 1MHz
C
= CGS + C
ISS
C
= C
RSS
OSS
≈ C
GD
+ C
DS
C
ISS
C
OSS
C
RSS
C
FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
GD
GD
200
2
VGS = VDS, ID = 250µA
1.5
1
NORMALIZED GATE
0.5
THRESHOLD VOLTAGE
0
-50 0 50 100
, JUNCTION TEMPERATURE (oC)
T
J
150
FIGURE 8. NORMALIZEDGATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
60
45
30
15
, DRAIN TO SOURCE VOLTAGE (V)
DS
V
0
VDD = BV
I
20
I
DRAIN SOURCE VOLTAGE
G(REF)
G(ACT)
RL = 4Ω
= 0.5mA
I
G(REF)
V
GS
GATE SOURCE
VOLTAGE
DSS
0.75BV
0.50BV
0.25BV
t, TIME (µs)
= 5V
DSS
DSS
DSS
VDD = BV
80
DSS
I
G(REF)
I
G(ACT)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 10. NORMALIZEDSWITCHINGWAVEFORMSFOR
CONSTANT GATE CURRENT
10
8
6
4
2
0
200
, GATE TO SOURCE VOLTAGE (V)
GS
V
Test Circuits and Waveforms
R
G
V
GS
FIGURE 11. SWITCHING TIME TEST CIRCUIT FIGURE 12. RESISTIVE SWITCHING WAVEFORMS
6-192
t
ON
t
d(ON)
t
R
L
+
V
DD
-
DUT
V
DS
90%
0
V
GS
10%
0
r
10%
50%
PULSE WIDTH
t
d(OFF)
90%
t
OFF
50%
t
f
90%
10%

RFD4N06L, RFD4N06LSM
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Intersil semiconductor products are sold by description only.IntersilCorporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. Howev er, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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6-193
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