Datasheet NTMS4404N Datasheet (ON Semiconductor)

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NTMS4404N
Power MOSFET
30 V, 12 A, Single N−Channel, SO−8
Features
Efficiency
Miniature SO−8 Surface Mount Package Saving Board Space
I
Specified at Elevated Temperature
DSS
Diode Exhibits High Speed, Soft Recovery
Applications
Power Management for Battery Power Products
Portable Products
Computers, Printers, PCMCIA Cards
Cell Phones, Cordless Telephones
DS(on)
for Higher
(BR)DSS
30 V
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TYP
R
DS(on)
9.7 m @ 10 V
15.5 m @ 4.5 V
N−Channel
D
ID MAXV
12 A
MAXIMUM RATINGS (T
Parameter
Drain−to−Source Voltage V Gate−to−Source Voltage V Continuous Drain
Current (Note 1) State
Power Dissipation (Note 1)
Continuous Drain Current (Note 2) State
Power Dissipation (Note 2)
Pulsed Drain Current tp = 10 s, DC = 2 % I Operating Junction and Storage Temperature TJ,
Source Current (Body Diode) I Single Pulse Drain−to−Source Avalanche
Energy (VDD = 20 V, VGS = 5 V, IPK = 7.25 A, L = 19 mH, R
Lead Temperature for Soldering Purposes (1/8” from case for 10 s)
= 25 )
G
= 25°C unless otherwise stated)
J
Symbol Value Unit
DSS
GS
Steady
tp 10 s TA = 25°C 12
Steady
TA = 25°C TA = 70°C 7.6
Steady State
tp 10 s 2.5
TA = 25°C TA = 70°C 5.6 TA = 25°C P
T
P
E
I
D
D
I
D
D
DM
STG
S
AS
T
L
30 V
20 V
9.6
1.56
7.0
0.83 W
50 A
−55 to 150
6.0 A
500 mJ
260 °C
A
W
A
°C
THERMAL RESISTANCE RATINGS
Parameter Symbol Max Unit
Junction−to−Ambient – Steady State (Note 1) R Junction−to−Ambient – t = 1 0 s (Note 1) R Junction−to−Ambient – Steady State (Note 2) R
1. Surface−mounted on FR4 board using 1 in sq. pad size (Cu area = 1.127 in sq. [1 oz] including traces)
2. Surface−mounted on FR4 board using the minimum recommended pad size (Cu area = 0.412 in sq.)
JA
JA
JA
80 50
150
°C/W
G
S
MARKING DIAGRAM/
PIN ASSIGNMENT
18
E4404N
1
SO−8 CASE 751 STYLE 12
Source Source Source
Gate
E4404N= Device Code L = Assembly Location Y = Year WW = Work Week
LYWW
Top View
Drain Drain Drain Drain
ORDERING INFORMATION
Device Package Shipping
NTMS4404NR2 SO−8 2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
Semiconductor Components Industries, LLC, 2003
November, 2003 − Rev. 1
1 Publication Order Number:
NTMS4404N/D
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NTMS4404N
()
GS
,,
DS
V
GS
V
DS
I
D
V
GS
V
DS
I
D
V
GS
d
ISD/dt
100 A/s
ELECTRICAL CHARACTERISTICS (T
Parameter
= 25°C unless otherwise specified)
J
Symbol Test Condition Min Typ Max Units
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V Drain−to−Source Breakdown Voltage
V
Temperature Coefficient Zero Gate Voltage Drain Current I
Gate−to−Source Leakage Current I
(BR)DSS
(BR)DSS
T
J
DSS
GSS
/
VGS = 0 V, ID = 250 A 30 V
VGS = 0 V, VDS = 30 V
VDS = 0 V, VGS = 20 V 100 nA
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage Gate Threshold Temperature Coefficient V Drain−to−Source On Resistance R
V
GS(TH)
GS(TH)/TJ
DS(on)
VGS = VDS, ID = 250 A 1.0 2.2 3.0 V
VGS = 10 V, ID = 12 A 9.7 11.5
VGS = 4.5 V, ID = 6.0 A 15.5 17.5
Forward Transconductance g
FS
VDS = 15 V, ID = 12 A 17.5 S
CHARGES AND CAPACITANCES
Input Capacitance Output Capacitance C Reverse Transfer Capacitance C Total Gate Charge Q Threshold Gate Charge Q Gate−to−Source Charge Q Gate−to−Drain Charge Q
C
ISS OSS RSS
G(TOT)
G(TH)
GS GD
V
= 0 V, f = 1 MHz, V
GS
VGS = 10 V, VDS = 24 V, ID = 12 A
SWITCHING CHARACTERISTICS, VGS = 10 V (Note 4)
Turn−On Delay Time Rise Time tr Turn−Off Delay Time t Fall Time t
t
d(ON)
d(OFF)
f
V
= 10 V, VD = 24 V, ID = 12 A,
= 10 V,
RG = 2.5
SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 4)
Turn−On Delay Time Rise Time tr Turn−Off Delay Time t Fall Time t
t
d(ON)
d(OFF)
f
V
= 4.5 V, VD = 24 V, ID = 6.0 A,
= 4.5 V,
RG = 2.5
DRAIN−SOURCE DIODE CHARACTERISTICS (Note 4)
Forward Diode Voltage
Reverse Recovery Time t Charge Time t Discharge Time tb Reverse Recovery Charge Q
V
SD
RR
a
RR
VGS = 0 V, IS = 6.0 A
VGS = 0 V, d
0 V,
ISD/dt
I
= 6.0 A
S
NOTES:
3. Pulse Test: pulse width  300 s, duty cycle 2%.
4. Switching characteristics are independent of operating junction temperatures.
TJ = 25°C 1.0
TJ = 100°C 5.0
= 24 V
DS
= 24 V,
= 24 V,
= 12 A,
= 6.0 A,
TJ = 25°C 0.80 1.1
TJ = 125°C 0.65
= 100 A/s,
,
25 mV/°C
A
−5.0 mV/°C m
1975 2500
pF 575 750 180 300
50 70
nC
2.4
7.5 16
15 25
ns 25 50 35 55 15 30
20
ns 80 25 15
V
40 55
ns 23 17
0.05 C
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NTMS4404N
TYPICAL PERFORMANCE CURVES
24
VGS = 10 V to 4.2 V
20
16
12
8
DRAIN CURRENT (AMPS)
4
D,
I
0
0
V
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
Figure 1. On−Region Characteristics
0.05
0.04
0.03
0.02
24
4 V
TJ = 25°C
3.8 V
VDS 10 V
20
16
12
3.6 V
TJ = 25°C
8
3.4 V
3.2 V
3.0 V
DRAIN CURRENT (AMPS)
D,
I
4
TJ = 100°C
TJ = −55°C
0
4
62
8
10
23
4
5
6
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
ID = 12 A T
= 25°C
J
0.025
0.02
0.015
0.01
TJ = 25°C
VGS = 4.5 V
VGS = 10 V
0.01
DRAIN−TO−SOURCE RESISTANCE ()
0
210
DS(on),
R
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
798
46
35
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1.6 ID = 12 A
V
= 10 V
1.4
GS
0.005
DRAIN−TO−SOURCE RESISTANCE ()
0
DS(on),
R
68
10 12
14
ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
10000
VGS = 0 V
TJ = 150°C
1000
1.2
1
DRAIN−TO−SOURCE
0.8
DS(on),
R
RESISTANCE (NORMALIZED)
0.6
−50 0−25 25
Figure 5. On−Resistance Variation with
75
50 150
TJ, JUNCTION TEMPERATURE (°C)
Temperature
125100 5
, LEAKAGE (A)
100
DSS
I
10
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 6. Drain−to−Source Leakage Current
TJ = 100°C
10 20
15
vs. Voltage
16 18 20
25
22
24
30
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NTMS4404N
TYPICAL PERFORMANCE CURVES
5000
4000
3000
2000
VDS = 0 V
C
iss
C
rss
VGS = 0 V
TJ = 25°C
C
iss
C, CAPACITANCE (pF)
1000
0
15 20 25
V
V
DS
GS
C
oss
C
rss
3010 0 5 105
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
100
VDD = 24 V I
= 12 A
D
= 10 V
V
GS
t
d(off)
t
f
t
r
15
QT
V
DS
10
5
Q
GS
Q
GD
, GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
V
0
0
10 20 40
, TOTAL GATE CHARGE (nC)
Q
G
30
Figure 8. Gate−T o−Source and
Drain−To−Source Voltage vs. Total Charge
12
VGS = 0 V
10
T
= 25°C
J
8
V
ID = 12 A T
= 25°C
J
V
30
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
20
GS
10
0
50
t, TIME (ns)
10
1
1 10 100
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
100
10
VGS = 10 V
1
SINGLE PULSE
= 25°C
T
C
0.1
, DRAIN CURRENT (AMPS)
D
I
0.01
0.1 V
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
Figure 11. Maximum Rated Forward Biased
t
d(on)
6
4
, SOURCE CURRENT (AMPS)
2
S
I
0
10 ms
1 ms
dc
R
LIMIT
DS(on)
THERMAL LIMIT PACKAGE LIMIT
1
Safe Operating Area
0.70.5
V
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
SD
0.80.6
Figure 10. Diode Forward Voltage vs. Current
100 s
10
100
0.9
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1000
DUTY CYCLE
NTMS4404N
MOUNTED TO MINIMUM RECOMMENDED FOOTPRINT
100
10
THERMAL RESISTANCE
1
Rthja(t), EFFECTIVE TRANSIENT
0.1
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
1E−05 1E−04 1E−03 1E−02 1E−01
t, TIME (seconds)
Figure 12. Thermal Response − Various Duty Cycles
P
(pk)
t
1
t
2
DUTY CYCLE, D = t1/t
2
1E+00 1E+01 1E+02
R
(t) = r(t) R
θ
JA
θ
JA
D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T
− TA = P
J(pk)
(pk)
1
R
(t)
θ
JA
1E+03
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−Y−
−Z−
NTMS4404N
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AA
NOTES:
−X− A
58
B
1
S
0.25 (0.010)
4
M
M
Y
K
G
C
SEATING PLANE
0.10 (0.004)
H
D
0.25 (0.010) Z
M
Y
SXS
N
X 45
M
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07.
MILLIMETERS
DIMAMIN MAX MIN MAX
4.80 5.00 0.189 0.197
B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010
J
J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8

N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244
STYLE 12:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
INCHES
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