• Optimized Gate Charge to Minimize Switching Losses
• Optimized for 5 V, 12 V Gate Drives
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
• CPU Power Delivery
• DC−DC Converters
MAXIMUM RATINGS (T
Drain−to−Source VoltageV
Gate−to−Source VoltageV
Continuous Drain
Current R
(Note 1)
Power Dissipation
(Note 1)
R
q
JA
Continuous Drain
Current R
(Note 1)
Power Dissipation
≤ 10 s (Note 1)
R
q
JA
Continuous Drain
Current R
(Note 2)
Power Dissipation
R
(Note 2)
q
JA
Continuous Drain
Current R
(Note 1)
Power Dissipation
(Note 1)
R
q
JC
Pulsed Drain
Current
Current Limited by PackageTA = 25°CI
Operating Junction and Storage
Temperature
Source Current (Body Diode)I
Drain to Source DV/DTdV/d
Single Pulse Drain−to−Source Avalanche
Energy (T
= 26 Apk, L = 0.1 mH, RG = 25 W)
I
L
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
to Minimize Conduction Losses
DS(on)
= 25°C unless otherwise stated)
J
ParameterSymbolValueUnit
DSS
GS
TA = 25°C
q
JA
≤ 10 s
q
JA
Steady
State
q
JA
q
JC
TA = 25°C, tp = 10 ms
= 25°C, VDD = 24 V, VGS = 10 V,
J
TA = 100°C10.5
TA = 25°CP
TA = 25°C
TA = 100°C15.9
TA = 25°CP
TA = 25°C
TA = 100°C6.2
TA = 25°CP
TC = 25°C
TC =100°C30
TC = 25°CP
I
I
I
I
I
DM
Dmax
TJ,
T
STG
E
AS
T
D
D
D
D
D
D
D
D
S
t
L
30V
±20V
16.7
2.70W
25.2
6.16W
9.7
0.92W
48
23.2W
210A
100A
−55 to
+150
21A
6.0V/ns
34mJ
260°C
A
A
A
A
°C
http://onsemi.com
V
(BR)DSS
30 V
G (4)
R
MAXID MAX
DS(ON)
5.6 mW @ 10 V
8.5 mW @ 4.5 V
D (5,6)
S (1,2,3)
N−CHANNEL MOSFET
48 A
MARKING
DIAGRAM
D
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A= Assembly Location
Y= Year
W= Work Week
ZZ= Lot Traceability
S
4955N
S
AYWZZ
S
G
D
ORDERING INFORMATION
DevicePackageShipping
NTMFS4955NT1GSO−8 FL
(Pb−Free)
NTMFS4955NT3GSO−8 FL
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size.
R
q
JC
R
q
JA
R
q
JA
R
q
JA
5.4
46.3
136.2
20.3
°C/W
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise specified)
J
ParameterSymbolTest ConditionMinTypMaxUnit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
(transient)
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain CurrentI
Gate−to−Source Leakage CurrentI
V
(BR)DSS
V
(BR)DSSt
V
(BR)DSS
T
DSS
GSS
VGS = 0 V, ID = 250 mA
VGS = 0 V, I
T
= 25°C, t
case
/
J
VGS = 0 V,
V
= 24 V
DS
VDS = 0 V, VGS = ±20 V±100nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Threshold Temperature CoefficientV
Drain−to−Source On ResistanceR
V
GS(TH)
GS(TH)/TJ
DS(on)
VGS = VDS, ID = 250 mA
VGS = 10 V
VGS = 4.5 V
Forward Transconductanceg
FS
VDS = 1.5 V, ID = 15 A52S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
Output CapacitanceC
Reverse Transfer CapacitanceC
Capacitance RatioC
Total Gate ChargeQ
Threshold Gate ChargeQ
Gate−to−Source ChargeQ
Gate−to−Drain ChargeQ
Total Gate ChargeQ
C
ISS
OSS
RSS
RSS
C
ISS
G(TOT)
G(TH)
GS
GD
G(TOT)
VGS = 0 V, f = 1 MHz, VDS = 15 V
/
VGS = 0 V, VDS = 15 V, f = 1 MHz0.110.22
VGS = 4.5 V, VDS = 15 V; ID = 30 A
VGS = 10 V, VDS = 15 V; ID = 30 A21.5nC
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Timet
Turn−Off Delay Timet
Fall Timet
t
d(ON)
r
d(OFF)
f
VGS = 4.5 V, VDS = 15 V,
= 15 A, RG = 3.0 W
I
D
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
30V
D(aval)
transient
= 11.0 A,
= 100 ns
34V
TJ = 25°C1.0
TJ = 125°C10
1.21.72.2V
ID = 30 A4.55.6
ID = 15 A4.5
ID = 30 A6.88.5
ID = 15 A6.7
21
mV/°C
mA
3.9mV/°C
mW
1264
483
pF
143
10.8
2.0
3.8
nC
4.2
9.5
32.7
16.4
ns
6.2
http://onsemi.com
2
Page 3
NTMFS4955N
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise specified)
J
ParameterUnitMaxTypMinTest ConditionSymbol
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Timet
Turn−Off Delay Timet
Fall Timet
t
d(ON)
r
d(OFF)
f
VGS = 10 V, VDS = 15 V,
= 15 A, RG = 3.0 W
I
D
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
VGS = 0 V,
IS = 30 A
Reverse Recovery Timet
Charge Timet
Discharge Timet
Reverse Recovery ChargeQ
RR
a
b
RR
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
PACKAGE PARASITIC VALUES
Source Inductance
Drain InductanceL
Gate InductanceL
Gate ResistanceR
L
S
D
G
G
TA = 25°C
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
7.4
27.5
20.3
4.1
TJ = 25°C0.861.1
TJ = 125°C0.75
25.8
12.4
13.4
13.6nC
1.00nH
0.005nH
1.84nH
1.02.2
ns
V
ns
W
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3
Page 4
NTMFS4955N
TYPICAL CHARACTERISTICS
120
10 V
110
100
90
80
70
60
50
40
, DRAIN CURRENT (A)
30
D
I
20
10
0
4.5 V
VDS, DRAIN−TO−SOURCE VOLTAGE (V)VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region CharacteristicsFigure 2. Transfer Characteristics
0.020
0.018
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
, DRAIN−TO−SOURCE RESISTANCE (W)
0
DS(on)
R
Figure 3. On−Resistance vs. V
TJ = 25°C
ID = 30 A
VGS (V)ID, DRAIN CURRENT (A)
4.0 V
3.5 V
3.0 V
VGS = 2.5 V
543210
981076543
GS
120
110
100
90
80
VDS = 10 V
70
60
50
40
, DRAIN CURRENT (A)
30
D
I
20
10
0
0.011
0.010
0.009
0.008
0.007
0.006
0.005
0.004
, DRAIN−TO−SOURCE RESISTANCE (W)
0.003
DS(on)
R
T = 25°C
Figure 4. On−Resistance vs. Drain Current and
TJ = −55°C
TJ = 25°C
VGS = 4.5 V
VGS = 10 V
Gate Voltage
TJ = 125°C
110409080
54321
120100706050302010
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
, DRAIN−TO−SOURCE
0.9
0.8
DS(on)
R
RESISTANCE (NORMALIZED)
0.7
0.6
ID = 30 A
= 10 V
V
GS
TJ, JUNCTION TEMPERATURE (°C)VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
10,000
1,000
, LEAKAGE (nA)
100
DSS
I
150
1251007550250−25−50
10
http://onsemi.com
4
TJ = 150°C
TJ = 125°C
TJ = 85°C
VGS = 0 V
30252015105
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
Page 5
NTMFS4955N
TYPICAL CHARACTERISTICS
1600
1400
1200
1000
800
600
400
C, CAPACITANCE (pF)
200
0
1000
100
11
C
iss
TJ = 25°C
= 0 V
V
GS
10
9
QT
8
7
6
C
oss
5
QgsQgd
4
3
C
rss
302520151050
2
, GATE−TO−SOURCE VOLTAGE (V)
1
GS
0
V
8101620
VDS, DRAIN−TO−SOURCE VOLTAGE (V)Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance VariationFigure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
30
VGS = 0 V
VGS = 10 V
= 15 V
V
DD
I
= 15 A
D
t
d(off)
t
f
t
r
25
20
15
TJ = 25°C
VGS = 10 V
= 15 V
V
DD
I
= 30 A
D
221814126420
t, TIME (ns)
10
1
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
1000
0 V < VGS < 10 V
Single Pulse
100
T
C
= 25°C
10
1
R
, DRAIN CURRENT (A)
D
I
0.1
Limit
DS(on)
Thermal Limit
Package Limit
0.01
VDS, DRAIN−TO−SOURCE VOLTAGE (V)TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
vs. Gate Resistance
Safe Operating Area
t
d(on)
10 ms
100 ms
1 ms
10 ms
dc
10
, SOURCE CURRENT (A)
S
I
5
0
100101
40
36
32
28
24
20
16
12
8
, SINGLE PULSE DRAIN−TO−
AS
4
E
SOURCE AVALANCHE ENERGY (mJ)
0
1001010.10.01
TJ = 125°C
TJ = 25°C
0.90.81.00.70.60.50.40.3
V
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
Figure 10. Diode Forward Voltage vs. Current
ID = 26 A
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
150125100755025
http://onsemi.com
5
Page 6
NTMFS4955N
TYPICAL CHARACTERISTICS
100
D = 0.5
0.2
10
0.1
0.05
0.02
1
r(t)
(°C/W)
0.01
0.1
SINGLE PULSE
0.01
0.0000010.000010.00010.0010.010.11101001000
t, TIME (s)
Figure 13. Thermal Response
http://onsemi.com
6
Page 7
0.10 C
0.10 C
C
0.05 c
PIN 5
(EXPOSED PAD)
D
2
D1
1234
TOP VIEW
SIDE VIEW
b
8X
A0.10B
L
14
E2
G
D2
BOTTOM VIEW
2 X
e/2
0.20 C
A
E1
E
2
A
DETAIL A
K
M
L1
NTMFS4955N
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE H
B
2 X
0.20 C
4 X
q
c
3 X
e
A1
C
SEATING
PLANE
DETAIL A
SOLDERING FOOTPRINT*
3X4X
1.270
0.965
1.330
2X
0.495
3.200
2X
1.530
4.560
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
MILLIMETERS
A0.901.00
b0.330.41
c0.230.28
D5.15 BSC
E6.15 BSC
e1.27 BSC
G0.510.61
K1.201.35
L0.510.61
M3.003.40
q0 −−−
_
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
0.750
2X
0.905
DIM MINNOM
A10.00−−−
D14.704.90
D23.804.00
E15.705.90
E23.453.65
L10.050.17
STYLE 1:
PIN 1. SOURCE
4X
1.000
4.530
0.475
MAX
1.10
0.05
0.51
0.33
5.10
4.20
6.10
3.85
0.71
1.50
0.71
0.20
3.80
12
_
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867Toll Free USA/Canada
Email: orderlit@onsemi.com
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Europe, Middle East and Africa Technical Support:
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTMFS4955N/D
7
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