Page 1
INTEGRATED CIRCUITS
74F595
8-bit shift register with output laches
(3-State)
Product specification
IC15 Data Handbook
1990 Apr 18
Page 2
Philips Semiconductors Product specification
74F5958-bit shift register with output latches (3-State)
FEA TURES
•Low noise, now switching feedthrough current
•Controlled output edge rates
•High impedance PNP base inputs for reduced loading
(20µA in High and Low states)
•8-bit serial-in, parallel-out shift register with storage
•3-state outputs
•Shift register has direct clear
•Guaranteed shift frequency-DC to 100MHz
DESCRIPTION
The 74F595 contains an 8-bit serial-in, parallel-out shift register that
feeds an 8-bit D-type storage register. The storage register has
parallel 3-State outputs. Separate clocks are provided for both the
shift register and the storage register. The shift register has a direct
overriding clear, serial input and serial output pins for cascading.
Both the shift register and storage register clocks are positive
edge-triggered. If the user wishes to connect both clocks together,
the shift register state will always be one clock pulse ahead of the
storage register.
This device uses patented circuitry to control system noise and
internal ground bounce. This is done by eliminating switching
feedthrough current and controlling both Low-to-High and
High-to-Low slew rates.
PIN CONFIGURATION
1
Q1
2
Q2
3
Q3
4
Q4
5
Q5
6
Q6
Q7
TYPE TYPICAL f
MAX
74F595 130MHz 65mA
16
V
CC
Q0
15
DS
14
OE
13
STCP
12
SHCP
11
SHR
107
98GND QS
SF01096
TYPICAL SUPPL Y CURRENT
(TOTAL)
ORDERING INFORMATION
COMMERCIAL RANGE
DESCRIPTION
16-pin plastic DIP N74F595N SOT38-4
16-pin plastic SO N74F595D SOT109-1
VCC = 5V ±10%,
= 0°C to +70°C
T
amb
PKG DWG #
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
Ds Serial data input 1.0/0.033 20µA/20µA
SHCP Shift register clock pulse input (active rising edge) 1.0/0.033 20µA/20µA
STCP Storage register clock pulse input (active rising edge) 1.0/0.033 20µA/20µA
SHR Shift register reset input (active Low) 1.0/0.033 20µA/20µA
OE Output Enable input (active Low) 1.0/0.033 20µA/20µA
Qs Serial expansion output 50/33 1.0mA/20mA
Q0–Q7 Data outputs 150/40 3.0mA/24mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
1990 Apr 18 853–1096 99392
2
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Philips Semiconductors Product specification
MODES
Shift
Store
Store, then Shift
74F5958-bit shift register with output latches (3-State)
LOGIC SYMBOL
13
OE
12
STCP
11
SHCP
10
SHR
Q0 Q1 Q2 Q3
15 1 2 3
VCC= Pin 16
GND = Pin 8
14
Ds
Q4 Q5 Q67Q7
456
Qs
SF01097
9
IEC/IEEE SYMBOL (IEEE/IEC)
13
12
10
11
14
EN3
C2
SRG8
R
C1/
1D
3
2D
3
2D
15
1
2
3
4
5
6
7
9
SF01098
MODE SELECT – FUNCTION TABLE
INPUTS
INTERNAL SHIFT
REGISTERS
OE SHR SHCP STCP Dn O0 O1–O7 Q0–Q7 Q0–Q7 QS
H H ↑ ↑ X O0 O1–O7 Q0–Q7 Z Q7 No Change
H L X ↑ X L0 L Q0–Q7 Z L
L L X ↑ X L0 L Q0–Q7 Q0–Q7 L
H H ↑ ↑ ds Ds o0–o6 Q0–Q7 Z o6
L H ↑ ↑ ds Ds o0–o6 Q0–Q7 Q0–Q7 o6
H H ↑ ↑ X O0 O1–O7 o0–o7 Z Q7
L H ↑ ↑ X O0 O1–O7 o0–o7 o0–o7 Q7
H H ↑ ↑ ds Ds o0–o6 o0–o7* Z o6
L H ↑ ↑ ds Ds o0–o6 o0–o7* o0–o* o6
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance
dn (on)=Lower case letters indicate the state of the referenced input (or output) one setup time prior to the Low-to-High clock transition
↑ = Low-to-High clock transition
= Not a Low-to-High clock transition
↑
* = When clocking both SHCP and STCP simultaneously the Shift Register state will always be one clock pulse ahead of the Storage
Register
INTERNAL STORAGE
REGISTER
OUTPUTS
OPERATING
Clear shift
register, hold latch
1990 Apr 18
3
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Philips Semiconductors Product specification
74F5958-bit shift register with output latches (3-State)
LOGIC DIAGRAM
13
OE
12
STCP
11
SHCP
10
SHR
14
Ds
D
CP
CLR
Q
Q
R
S
Q
CP
15
Q0
S
R
CP
CLR
S
R
CP
CLR
S
R
CP
CLR
S
R
CP
CLR
S
R
CP
CLR
1
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
CP
S
CP
S
CP
S
CP
S
CP
S
Q1RQ
2
Q2RQ
3
Q3RQ
4
Q4RQ
5
Q5RQ
VCC = Pin 16
GND = Pin 8
1990 Apr 18
S
R
CP
CLR
S
R
CP
CLR
6
7
9
SF01099
Q6RQ
Q7
Qs
Q
Q
Q
Q
CP
S
RQ
CP
S
4
Page 5
Philips Semiconductors Product specification
I
Current applied to output in Low output state
SYMBOL
PARAMETER
UNIT
IOHHigh-level output current
IOLLow-level output current
74F5958-bit shift register with output latches (3-State)
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
V
I
IN
V
OUT
T
T
CC
IN
OUT
amb
stg
Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
Input current –30 to +5 mA
Voltage applied to output in High output state –0.5 to +V
pp
p
Operating free-air temperature range 0 to +70 °C
Storage temperature range –65 to +150 °C
RECOMMENDED OPERATING CONDITIONS
V
V
V
I
T
CC
IH
IL
IK
amb
Supply voltage 4.5 5.0 5.5 V
High-level input voltage 2.0 V
Low-level input voltage 0.8 V
Input clamp current –18 mA
p
p
Operating free-air temperature range 0 70 °C
PARAMETER RATING UNIT
CC
p
Qs 40 mA
Q0–Q7 48 mA
LIMITS
MIN NOM MAX
Qs –1 mA
Q0–Q7 –3 mA
Qs 20 mA
Q0–Q7 24 mA
V
1990 Apr 18
5
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Philips Semiconductors Product specification
NO TAG
Qs
I
1mA
VOHHigh-level output voltage
V
MAX
Q0–Q7
I
3mA
Qs
I
20mA
VOLLow-level output voltage
V
MAX
Q0–Q7
I
24mA
74F5958-bit shift register with output latches (3-State)
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
SYMBOL PARAMETER TEST CONDITIONS
MIN
TYP
NO TAG
MAX
UNIT
V
I
I
I
IH
I
IL
I
OZH
I
OZL
I
OS
I
CC
=–
VCC = MIN,
p
IL
V
=
IH
=MIN
VCC = MIN,
p
IK
Input clamp voltage VCC = MIN, II = I
IL
V
IH
=
= MIN,
OH
,
=–
OH
=
OL
,
=
OL
IK
±10%V
±5%V
±10%V
±5%V
±10%V
±5%V
±10%V
±5%V
CC
CC
CC
CC
Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA
High-level input current VCC = MAX, VI = 2.7V 20 µA
Low-level input current VCC = MAX, VI = 0.5V –20 mA
Off-state output current,
High level of voltage applied
Off-state output current,
Low level of voltage applied
Short-circuit output current
Supply current (total)
NO TAG
Q0–Q7
only
Q0–Q7
only
I
CCH
I
CCL
I
CCZ
VCC = MAX, VO = 2.7V 50 µA
VCC = MAX, VO = 0.5V –50 µA
VCC = MAX –60 –150 mA
VCC = MAX
2.5 V
CC
2.7 3.4 V
2.4 V
CC
2.7 3.3 V
CC
0.30 0.50 V
0.30 0.50 V
CC
0.35 0.50 V
0.35 0.50 V
–0.73 –1.2 V
55 80 mA
70 100 mA
65 95 mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
3. Not more than one output should be shorted at a time. For testing I
= 5V, T
CC
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
amb
= 25°C.
, the use of high-speed test apparatus and/or sample-and-hold
OS
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
tests should be performed last.
OS
1990 Apr 18
6
Page 7
Philips Semiconductors Product specification
74F5958-bit shift register with output latches (3-State)
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL PARAMETER
f
MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Maximum clock frequency–SHCP to Qs
Propagation delay
SHCP to Qs
Propagation delay
STCP to Q0–Q7
Propagation delay
SHR to Qs
Output Enable time
OE to Q0–Q7
Output Disable time
OE to Q0–Q7
TEST
CONDITION
Waveform
NO TAG
Waveform
NO TAG
Waveform
NO TAG
Waveform
NO TAG
Waveform 5
Waveform 6
Waveform 5
Waveform 6
VCC = +5V
T
= +25°C
amb
C
= 50pF, RL = 500Ω
L
MIN TYP MAX MIN MAX
115 135 90 MHz
6.0
2.5
5.5
3.0
8.0
4.5
8.0
5.0
10.5
7.5
10.0
8.0
3.5 5.5 8.0 3.0 8.5 ns
3.5
3.0
2.0
4.0
5.5
5.5
4.0
6.0
9.0
8.5
7.0
9.0
VCC = +5V ± 10%
T
= 0°C to +70°C
amb
C
= 50pF, RL = 500Ω
L
5.0
2.5
4.5
3.0
2.5
2.5
1.5
3.0
12.5
7.5
13.0
8.5
10.5
10.5
8.5
10.5
UNIT
ns
ns
ns
ns
AC SETUP REQUIREMENTS
SYMBOL PARAMETER
ts(H)
ts(L)
th(H)
th(L)
ts(L)
ts(H)
tW(H)
tW(L)
tW(H)
tW(L)
Setup time, High or Low
Ds to SHCP
Hold time, High or Low
Ds to SHCP
Setup time, Low
SHR to STCP
Setup time, High
SHCP to STCP
SHCP Pulse width,
High or Low
STCP Pulse width,
High or Low
tW(L) SHR Pulse width, Low
t
REC
Recovery time,
SHR to SHCP
TEST
CONDITION
Waveform 3
Waveform 3
Waveform 3 4.5 5.0 ns
Waveform 4 4.5 5.0 ns
Waveform
NO TAG
Waveform
NO TAG
Waveform
NO TAG
Waveform
NO TAG
VCC = +5V
T
= +25°C
amb
C
= 50pF, RL = 500Ω
L
MIN TYP MAX MIN MAX
2.0
2.0
0
0
3.5
4.0
4.0
3.0
3.0 3.0 ns
3.0 3.0 ns
AC WAVEFORMS
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
LIMITS
T
C
VCC = +5V ± 10%
= 0°C to +70°C
amb
= 50pF, RL = 500Ω
L
2.5
2.5
0
0
4.0
4.0
4.0
3.5
UNIT
ns
ns
ns
ns
1990 Apr 18
7
Page 8
Philips Semiconductors Product specification
74F5958-bit shift register with output latches (3-State)
1/f
MAX
SHCP,
STCP
QS, Q0–Q7
V
M
tw(H)
t
PHL
tw(L)
V
M
V
M
t
PLH
V
M
SF01100
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Widths, and Maximum Clock Frequency
SHR
SHCP
Qs
V
M
t
PHL
tw(L)
V
M
t
REC
V
M
V
M
SF01101
Waveform 2. Master Reset Pulse Width, Master Reset to
Output Delay, and Master Reset to Clock Recovery T ime
Ds
SHCP
V
V
M
M
ts(H) ts(L)
th(H)=0 th(L)=0
V
M
V
M
Waveform 3. Data Setup and Hold Times
V
V
M
M
SF01102
SHR
SHCP
STCP
V
M
ts(H) ts(L)
V
M
V
M
Waveform 4. Setup and Hold Times
V
M
SF01103
1990 Apr 18
8
Page 9
Philips Semiconductors Product specification
74F5958-bit shift register with output latches (3-State)
AC WAVEFORMS (Continued)
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
OE
Q0–Q7
V
t
PZH
M
V
V
M
t
PHZ
M
VOH -0.3V
SF01104
Waveform 5. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
TEST CIRCUIT AND WAVEFORMS
V
CC
R
V
PULSE
GENERATOR
IN
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST SWITCH
t
PLZ
t
PZL
closed
closed
All other open
V
D.U.T.
R
T
OUT
L
C
R
L
L
7.0V
0V
NEGATIVE
PULSE
POSITIVE
PULSE
OE
Q0–Q7
V
t
PZL
M
V
V
M
t
PLZ
M
VOL +0.3V
SF01105
Waveform 6. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
90%
10%
t
w
V
M
10%
)
V
90%
M
t
THL (tf
t
TLH (tr
)
t
t
t
w
TLH (tr
THL (tf
10%
)
)
90%
V
M
V
M
90%
10%
AMP (V)
0V
AMP (V)
0V
Input Pulse Definition
DEFINITIONS:
= Load resistor;
R
L
C
= Load capacitance includes jig and probe capacitance;
L
R
= Termination resistance should be equal to Z
T
1990 Apr 18
see AC electrical characteristics for value.
see AC electrical characteristics for value.
pulse generators.
OUT
of
family
74F
9
INPUT PULSE REQUIREMENTS
V
amplitude
3.0V
M
1.5V
rep. rate
1MHz 500ns
t
w
t
TLHtTHL
2.5ns 2.5ns
SF00777
Page 10
Philips Semiconductors Product specification
8-bit shift register with output latches (3-State)
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
74F595
1990 Apr 18
10
Page 11
Philips Semiconductors Product specification
8-bit shift register with output latches (3-State)
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74F595
1990 Apr 18
11
Page 12
Philips Semiconductors Product specification
8-bit shift register with output latches (3-State)
NOTES
74F595
1990 Apr 18
12
Page 13
Philips Semiconductors Product specification
8-bit shift register with output latches (3-State)
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
74F595
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 10-98
Document order number: 9397-750-05143
yyyy mmm dd
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