Datasheet N74F597N, N74F597D Datasheet (Philips)

INTEGRATED CIRCUITS

74F597

8-bit shift register with input storage registers

Product specification IC15 Data Handbook

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1991 Sep 13

Philips Semiconductors Product specification

74F5978-bit shift register with input storage registers

FEA TURES

•High impedance PNP base inputs for reduced loading

(20µA in High and Low states)

•8-bit parallel storage register

•3-State output buffers

•Shift register has asynchronous direct overriding reset

•Shift load SHLD is functional when SHCP is Low and locked out

when SHCP is High

•Guaranteed shift frequency DC to 105MHz

DESCRIPTION

The 74F597 consists of an 8-bit storage register feeding a parallel-in/serial-in, serial-out 8-bit shift register. The storage register and shift register have separate positive edge triggered clocks. The shift register has asynchronous reset and when SHCP is Low, it has asynchronous load.

The shift register load function has been modified to load when both SHLD

and SHCP are Low. When SHCP is High the shift register load operation is not performed. Data will be properly shifted on the rising edge of SHCP when SHLD

is High.

PIN CONFIGURATION

1

D1

2

D2

3

D3

4

D4

5

D5

6

D6 D7

GND

TYPE TYPICAL f

MAX

74F597 135MHz 42mA

16

V

CC

D0

15

D

14

S

SHLD

13

STCP

12

SHCP

11

SHRST

107

98

Q

S

SF00366

TYPICAL SUPPL Y CURRENT

(TOTAL)

ORDERING INFORMATION

COMMERCIAL RANGE

DESCRIPTION

16-pin plastic DIP N74F597N SOT38-4

16-pin plastic SO N74F597D SOT109-1

VCC = 5V ±10%,

T

= 0°C to +70°C

amb

PKG DWG #

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS DESCRIPTION

Ds Serial data input 1.0/0.033 20µA/20µA

D0–D7 Parallel data inputs 1.0/0.033 20µA/20µA

SHCP Shift register clock pulse input 1.0/0.033 20µA/20µA STCP Storage register clock pulse input 1.0/0.033 20µA/20µA SHLD Shift register load input (active Low) 1.0/0.033 20µA/20µA

SHRST Shift register reset input (active Low) 1.0/0.033 20µA/20µA

Qs Serial data output 50/33 1.0mA/20mA

NOTE:

One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.

74F (U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

1991 Sep 13 853–1556 03964

2

Philips Semiconductors Product specification

OPERATING MODES

74F5978-bit shift register with input storage registers

LOGIC SYMBOL

14

Ds 10 11 12 13

VCC= Pin 16 GND = Pin 8

SHRST SHCP

STCP SHLD

15 1 2 3

D0 D1 D2 D3

Qs

14

456

D4 D5 D67D7

SF01107

IEC/IEEE SYMBOL (IEEE/IEC)

10 11 13 12

14 15

1 2

3 4

5 6

7

SRG8

R

C3/ 

C2

C1

3D 1D

FUNCTION TABLE

INPUTS

STCP SHCP SHLD SHRST

↑ X X X Data loaded to storage registers ↑ L L H Data loaded from inputs to shift register ↑ L L H Data transferred from storage registers to shift registers

X L L L Invalid logic, state of shift register indeterminate when signals removed X X H L Shift register cleared X ↑ H H Shift register clocked, Qn=Qn–1, Q0=Ds ↑ H X H Hold

H = High voltage level L = Low voltage level X = Don’t care ↑ = Low-to-High clock transition

= Not a Low-to-High clock transition

↑

2D

9

SF01108

1991 Sep 13

3

Philips Semiconductors Product specification

74F5978-bit shift register with input storage registers

LOGIC DIAGRAM

10

SHRST

11

SHCP

13

SHLD

12

STCP

14

Ds

15

D0

1D

C2 2D

S

C1

1

D1

2

D2

3

D3

4

D4

5

D5

1D

C1

1D

C1

1D

C1

1D

C1

1D

C1

R

S

R

S

R

S

R

S

R

S

R

C2

C2 2D

2D

VCC = Pin 16 GND = Pin 8

1991 Sep 13

6

D6

7

D7

1D

C1

1D

C1

C2

S

R

C2 2D

S

R

2D

9

Qs

SF01109

4

Philips Semiconductors Product specification

SYMBOL

PARAMETER

UNIT

NO TAG

VOHHigh-level output voltage

V

MAX

I

1mA

VOLLow-level output voltage

CC

,

IL

,

ICCSupply current (total)

V

MAX

74F5978-bit shift register with input storage registers

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.)

SYMBOL

V V I

IN

V I

OUT

T T

CC IN

OUT

amb stg

Supply voltage –0.5 to +7.0 V Input voltage –0.5 to +7.0 V Input current –30 to +5 mA Voltage applied to output in High output state –0.5 to +V Current applied to output in Low output state 40 mA Operating free-air temperature range 0 to +70 °C Storage temperature range –65 to +150 °C

RECOMMENDED OPERATING CONDITIONS

V V V I I I T

CC IH

IL IK OH OL

amb

Supply voltage 4.5 5.0 5.5 V High-level input voltage 2.0 V Low-level input voltage 0.8 V Input clamp current –18 mA High-level output current –1 mA Low-level output current 20 mA Operating free-air temperature range 0 +70 °C

PARAMETER RATING UNIT

CC

V

LIMITS

MIN NOM MAX

DC ELECTRICAL CHARACTERISTICS

(Over recommended operating free-air temperature range unless otherwise noted.)

LIMITS

SYMBOL PARAMETER TEST CONDITIONS

VCC = MIN,

=

,

p

V

IK

I

IH

I

IL

I

OS

Input clamp voltage VCC = MIN, II = I Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA High-level input current VCC = MAX, VI = 2.7V 20 µA Low-level input current VCC = MAX, VI = 0.5V –20 µA Short-circuit output current

pp

NO TAG

I

CCH

I

CCL

IL

V

= MIN

IH

VCC = MIN, VIL = MAX,

VIH = MIN, I

VCC = MAX –60 –150 mA

=

CC

OH

OL

= –

= MAX

IK

±10%V

±5%V

±10%V

±5%V

CC

MIN

2.5 V

CC

2.7 3.4 V

CC

TYP

NO TAG

MAX

0.30 0.50 V

–0.73 –1.2 V

43 65 mA 41 60 mA

NOTES:

1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.

2. All typical values are at V

3. Not more than one output should be shorted at a time. For testing I

= 5V, T

CC

techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting

amb

= 25°C.

, the use of high-speed test apparatus and/or sample-and-hold

OS

of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, I

tests should be performed last.

OS

UNIT

1991 Sep 13

5

Philips Semiconductors Product specification

74F5978-bit shift register with input storage registers

AC ELECTRICAL CHARACTERISTICS

LIMITS

SYMBOL PARAMETER

f

MAX

t

PLH

t

PHL

t

PLH

t

PHL

t

PLH

t

PHL

t

PHL

Maximum clock frequency

Propagation delay SHCP to Qs

Propagation delay SHLD to Qs

Propagation delay STCP to Qs

Propagation delay SHRST to Qs

TEST

CONDITION

Waveform

NO TAG

Waveform

NO TAG

Waveform

NO TAG

Waveform

NO TAG

Waveform

NO TAG

VCC = +5V

T

= +25°C

amb

C

= 50pF, RL = 500Ω

L

MIN TYP MAX MIN MAX

120 135 105 MHz

7.0

6.0

8.0

6.0

7.5

8.0

8.5

7.5

9.5

7.5

9.5

11.0

10.0

12.0

10.0

11.5

12.0

2.5 5.5 9.0 2.5 9.5 ns

VCC = +5V ± 10%

T

= 0°C to +70°C

amb

C

= 50pF, RL = 500Ω

L

6.0

5.5

7.0

5.5

6.5

7.5

12.5

10.5

13.5

11.0

13.0

UNIT

ns

AC SETUP REQUIREMENTS

SYMBOL PARAMETER

ts(H) ts(L)

th(H) th(L)

ts(H) ts(L)

th(H) t

(L)

h

ts(H)

th(L)

ts(H)

tW(H) tW(L)

tW(L) SHRST Pulse width, Low

tW(L) SHLD Pulse width, Low

t

REC

Setup time, High or Low Dn to STCP

Hold time, High or Low Dn to STCP

Setup time, High or Low Ds to SHCP

Hold time, High or Low Ds to SHCP

Setup time, High STCP to SHLD↑

Hold time, Low STCP to SHLD↑ (hold mode)

Setup time, High SHLD

to SHCP↑

SHCP Pulse width High or Low

STCP Pulse width High or Low

Recovery time, SHRST to SHCP

LIMITS

TEST

CONDITION

VCC = +5V

T

= +25°C

amb

C

= 50pF, RL = 500Ω

L

VCC = +5V ± 10%

T

= 0°C to +70°C

amb

C

= 50pF, RL = 500Ω

L

UNIT

MIN TYP MAX MIN MAX

Waveform

NO TAG

Waveform

NO TAG

Waveform

NO TAG

Waveform

NO TAG

1.0

1.5

2.0

1.0

1.5

2.0

1.5

2.0

3.0

1.0

2.0

2.5

Waveform 4 8.5 9.0 ns

Waveform

NO TAG

Waveform

NO TAG

Waveform

NO TAG

Waveform

NO TAG

Waveform

NO TAG

Waveform

NO TAG

Waveform

NO TAG

0.0 0.0 ns

6.0 6.5 ns

4.5

5.5

4.5

5.0

4.5

4.5 4.5 ns

2.0 2.5 ns

ns

1991 Sep 13

6

Philips Semiconductors Product specification

74F5978-bit shift register with input storage registers

TYPICAL TIMING DIAGRAM

SHRST

SHLD

SHCP

STCP

Ds

D0

D1

D2

D3

D4

D5

D6

D7

Qs

Don’t care

SF01110

1991 Sep 13

7

Philips Semiconductors Product specification

74F5978-bit shift register with input storage registers

AC WAVEFORMS

For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance.

1/f

STCP, SHCP, SHLD SHRST

QS

V

M

tw(H)

t

PHL

Waveform 1. Propagation Delay, Clock Input to Output,

Clock Pulse Widths, and Maximum Clock Frequency, Shift

Register Reset and Load Inputs to Serial Data Output

MAX

V

M

tw(L)

t

PLH

V

M

V

M

SF00371

SHRST

SHCP

Qs

V

M

t

PHL

V

M

t

rec

V

M

V

M

SF01112

Waveform 2. Propagation Delay, Shift Register Reset and Load

Inputs to Serial Data Output, Shift Register Reset and Load

Inputs to Shift Register Clock Pulse Input Recovery Time

Dn, Ds

SHCP,

SHLD

SHCP,

STCP,

SHLD

V

M

ts(H) ts(L) th(L)th(H)

V

M

V

M

V

M

Waveform 3. Setup and Hold Times

TEST CIRCUIT AND WAVEFORMS

V

CC

V

PULSE

GENERATOR

IN

R

T

Test Circuit for Totem-Pole Outputs

DEFINITIONS:

R

= Load resistor;

L

see AC ELECTRICAL CHARACTERISTICS for value.

C

= Load capacitance includes jig and probe capacitance;

L

see AC ELECTRICAL CHARACTERISTICS for value.

= Termination resistance should be equal to Z

R

T

pulse generators.

D.U.T.

V

OUT

C

V

M

SF01113

STCP

SHLD

SHCP

,

V

M

V

ts(H) th(L)

V

M

V

M

SF01114

Waveform 4. Setup and Hold Time

t

NEGATIVE PULSE

R

L

POSITIVE PULSE

90%

10%

V

M

10%

t

THL (tf

t

TLH (tr

90%

V

M

w

V

M

10%

)

t

w

t

TLH (tr

t

THL (tf

)

90%

V

M

90%

10%

AMP (V)

0V

AMP (V)

0V

Input Pulse Definition

INPUT PULSE REQUIREMENTS

V

amplitude

3.0V 1.5V

rep. rate

M

1MHz 500ns

t

w

t

TLHtTHL

2.5ns 2.5ns

OUT

of

family

74F

1991 Sep 13

SF00006

8

Philips Semiconductors Product specification

8-bit shift register with input storage registers

DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4

74F597

1991 Sep 13

9

Philips Semiconductors Product specification

8-bit shift register with input storage registers

SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

74F597

1991 Sep 13

10

Philips Semiconductors Product specification

8-bit shift register with input storage registers

NOTES

74F597

1991 Sep 13

11

Philips Semiconductors Product specification

8-bit shift register with input storage registers

Data sheet status

Objective specification

Preliminary specification

Product specification

Product status

Development

Qualification

Production

Definition

This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product.

This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.

[1]

74F597

[1] Please consult the most recently issued datasheet before initiating or completing a design.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can

reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.

Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381

 Copyright Philips Electronics North America Corporation 1998

print code Date of release: 10-98 Document order number: 9397-750-05144

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yyyy mmm dd

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