Datasheet N74F27D, N74F27N Datasheet (Philips)

Page 1
INTEGRATED CIRCUITS
74F27
Triple 3-input NOR gate
Product specification IC15 Data Handbook
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1991 Feb 05
Page 2
74F27Triple 3-input NOR gate
FEA TURE
Industrial temperature range available (–40°C to +85°C)
TYPE
74F27 3.0ns 6.5mA
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
PIN CONFIGURATION
D0a
1
D0b
2
D1a
3
D1b
4
D1c
5
1
Q
6
GND
14 13 12 11 10
9 87
SF00033
V D0c Q
D2c D2b D2a Q2
CC
0
ORDERING INFORMA TION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%, T
= 0°C to +70°C
amb
VCC = 5V ±10%, T
INDUSTRIAL RANGE
= –40°C to +85°C
amb
PKG DWG #
14-pin plastic DIP N74F27N I74F27N SOT27-1
14-pin plastic SO N74F27D I74F27D SOT108-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS DESCRIPTION
74F (U.L.)
HIGH/LOW
Dna, Dnb, Dnc Data inputs 1.0/1.0 20µA/0.6mA
Qn Data output 50/33 1.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
LOAD VALUE
HIGH/LOW
LOGIC DIAGRAM
VCC = Pin 14 GND = Pin 7
D0a D0b D0c
D1a D1b
D1c
D2a D2b D2c
FUNCTION TABLE
1 2
13
3 4 5
9 10 11
12
6
8
SF00034
Q0
Dna Dnb Dnc Qn
L L L H X X H L
Q1
X H X L
H X X L
NOTES:
H = High voltage level
Q2
L = Low voltage level
INPUTS OUTPUT
February 5, 1991 853 0049 01638
2
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Philips Semiconductors Product specification
T
Operating free air temperature range
74F27Triple 3-input NOR gate
LOGIC SYMBOL
1 2 13 3 4 5 9 10
D0a D0b D0c D1b D1c D2a D2bD1a
VCC = Pin 14 GND = Pin 7
11
D2c
Q0 Q1 Q2
12 6 8
SF00035
IEC/IEEE SYMBOL
ABSOLUTE MAXIMUM RA TINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
amb
T
stg
Supply voltage –0.5 to +7.0 V Input voltage –0.5 to +7.0 V
Input current –30 to +5 mA Voltage applied to output in high output state –0.5 to V Current applied to output in low output state 40 mA
p
p
Storage temperature range –65 to +150 °C
PARAMETER RATING UNIT
Commercial range 0 to +70 °C
Industrial range –40 to +85 °C
1 2
13
3
4
5
9
10
11
1
SF00036
CC
12
6
8
V
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER LIMITS UNIT
V
CC
V
IH
V
IL
I
Ik
I
OH
I
OL
T
amb
February 5, 1991
Supply voltage 4.5 5.0 5.5 V High–level input voltage 2.0 V Low–level input voltage 0.8 V Input clamp current –18 mA High–level output current –1 mA Low–level output current 20 mA Operating free air temperature range Commercial range 0 +70 °C
MIN NOM MAX
Industrial range –40 +85 °C
3
Page 4
Philips Semiconductors Product specification
74F27Triple 3-input NOR gate
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
V
OH
High-level output voltage VCC = MIN, VIL = MAX ±10%V
PARAMETER TEST CONDITIONS
VIH = MIN, IOH = MAX ±5%V
V
OL
V
IK
I
I
I
IH
I
IL
I
OS
I
CC
Low-level output voltage VCC = MIN, VIL = MAX ±10%V
VIH = MIN, I
Input clamp voltage VCC = MIN, II = I
= MAX ±5%V
Ol
IK
Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA High–level input current VCC = MAX, VI = 2.7V 20 µA Low–level input current VCC = MAX, VI = 0.5V -0.6 mA Short-circuit output current Supply current (total) I
3
VCC = MAX -60 -150 mA
CCHVCC
I
CCLVCC
= MAX VIN = GND 4.0 5.5 mA = MAX VIN = 4.5V 8.5 12.0 mA
NOTES:
1 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2 All typical values are at V 3 Not more than one output should be shorted at a time. For testing I
= 5V, T
CC
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
amb
= 25°C.
, the use of high-speed test apparatus and/or sample-and-hold
OS
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, I
tests should be performed last.
OS
1
MIN TYP
CC
CC
CC
CC
LIMITS UNIT
2
MAX
2.5 V
2.7 3.4 V
0.30 0.50 V
0.30 0.50 V
-0.73 -1.2 V
AC ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
t
PLH
t
PHL
Propagation delay Dna, Dnb, Dnc to Qn
TEST
CONDITION
Waveform 1
LIMITS
VCC = +5.0V
T
= +25°C
amb
C
= 50pF, RL = 500
L
VCC = +5.0V ± 10%
T
= 0°C to +70°C
amb
C
= 50pF, RL = 500
L
VCC = +5.0V ± 10%
T
= –40°C to +85°C
amb
C
= 50pF, RL = 500
L
MIN TYP MAX MIN MAX MIN MAX
2.0
1.0
3.5
2.5
5.0
4.5
1.5
1.0
5.5
4.5
1.0
1.0
7.0
5.5
UNIT
ns
February 5, 1991
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Philips Semiconductors Product specification
74F27Triple 3-input NOR gate
AC WAVEFORMS
Dna, Dnb, Dnc
Qn
Waveform 1. Propagation delay for inverting outputs
NOTE:
For all waveforms, V
= 1.5V.
M
TEST CIRCUIT AND WAVEFORMS
V
CC
V
PULSE
GENERATOR
IN
R
T
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
= Load resistor;
R
L
see AC ELECTRICAL CHARACTERISTICS for value.
C
= Load capacitance includes jig and probe capacitance;
L
see AC ELECTRICAL CHARACTERISTICS for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
D.U.T.
V
OUT
C
V
M
t
PHL
NEGATIVE PULSE
R
L
L
POSITIVE PULSE
V
M
t
PLH
90%
10%
V
M
SF00037
t
w
V
M
10%
)
V
90%
M
t
THL (tf
t
TLH (tr
)
t
t
w
TLH (tr
t
THL (tf
10%
)
)
90%
V
M
V
M
90%
10%
AMP (V)
0V
AMP (V)
0V
V
M
Input Pulse Definition
INPUT PULSE REQUIREMENTS
V
amplitude
3.0V 1.5V
rep. rate
M
1MHz 500ns
t
w
t
TLHtTHL
2.5ns 2.5ns
OUT
of
family
74F
February 5, 1991
SF00006
5
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Philips Semiconductors Product specification
74F27Triple 3-input NOR gate
DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1
1991 Feb 05
6
Page 7
Philips Semiconductors Product specification
74F27Triple 3-input NOR gate
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
1991 Feb 05
7
Page 8
Philips Semiconductors Product specification
74F27Triple 3-input NOR gate
Data sheet status
Data sheet status
Objective specification
Preliminary specification
Product specification
Product status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 10-98 Document order number: 9397-750-05059
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