Page 1
INTEGRATED CIRCUITS
74F269
8-bit bidirectional binary counter
Product specification 1996 Jan 05
IC15 Data Handbook
Page 2
Philips Semiconductors Product specification
74F2698–bit bidirectional binary counter
FEA TURES
•Synchronous counting and loading
•Built-in look-ahead carry capability
•Count frequency 115MHz typ
•Supply current 95mA typ
DESCRIPTION
The 74F269 is a fully synchronous 8-stage Up/Down Counter
featuring a preset capability for programmable operation, carry
look-ahead for easy cascading and a U/D
direction of counting. All state changes, whether in counting or
parallel loading, are initiated by the rising edge of the clock.
TYPE
TYPICAL f
MAX
74F269 115MHz 95mA
input to control the
TYPICAL
SUPPLY CURRENT
(TOTAL)
PIN CONFIGURATION
1U/D
2
Q0
3
Q1
4
Q2
5
Q3
6
Q4
7
GND
8
Q5
9
Q6
10
Q7
11
CP
CEP CET
24
PE
23
P0
22
P1
21
P2
20
P3
19
V
18
P4
17
P5
16
P6
15
P7
TC
14
1312
SF00834
ORDERING INFORMA TION
DESCRIPTION
24-Pin Plastic Slim DIP (300mil) N74F269N SOT222-1
24-Pin Plastic SOL N74F269D SOT137-1
24-Pin Plastic SSOP type II N74F269DB SOT340-1
COMMERCIAL RANGE
VCC = 5V ±10%, T
= 0°C to +70°C
amb
CC
PKG DWG #
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74F(U.L.)
HIGH/LOW
P0 - P7 Parallel Data inputs 1.0/1.0 20µA/0.6mA
PE Parallel Enable input (active Low) 1.0/1.0 20µA/0.6mA
U/D Up/Down count control input 1.0/1.0 20µA/0.6mA
CEP Count Enable Parallel input (active Low) 1.0/1.0 20µA/0.6mA
CET Count Enable Trickle input (active Low) 1.0/1.0 20µA/0.6mA
CP Clock input 1.0/1.0 20µA/0.6mA
TC Terminal Count output (active Low) 50/33 1.0mA/20mA
Q0 - Q7 Flip-flop outputs 50/33 1.0mA/20mA
NOTE:
One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOAD VALUE
HIGH/LOW
1996 Jan 05 853–0056 16186
2
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Philips Semiconductors Product specification
OPERATING MODE
Parallel load
Hold (do nothing)
74F2698–bit bidirectional binary counter
LOGIC SYMBOL
23 22 21 20 18 17 16 15
P0 P1 P2 P3 P4 P5 P6 P7
24
PE
1
U/D
12
CEP
13
CET
11
CP
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
=Pin 19
V
CC
GND=Pin 7
APPLICATION
CP
U/D
PE
TC
234568910
SF00835
LOGIC SYMBOL (IEEE/IEC)
24
1
12
13
11
23
14
22
21
20
18
17
16
15
CTR DIV 256
M1[LOAD]
M2[COUNT]
M3[UP]
M4[DOWN]
&
G5
EN6
2, 3, 5, 6 +/C7
2, 4, 5, 6–
[1]
1, 7D
[2]
[4]
[8]
[16]
[32]
[64]
[128]
3, 5, 6 CT=256
4, 5, 8 CT=0
2
3
4
5
6
8
9
10
14
SF00836
P0 P1 P2 P3 P4 P5 P6
PE
U/D
CP
CEP
CET
Q0Q1 Q2 Q3 Q4 Q5 Q6 Q7
P7
TC
P0 P1 P2 P3 P4 P5 P6 P7
PE
U/D
CP
CEP
CET
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
TC
P0 P1 P2 P3 P4 P5 P6 P7
PE
U/D
CP
CEP
CET
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
TC
Figure 1. Synchronous Multistage Counting Scheme
MODE SELECT FUNCTION TABLE
INPUTS OUTPUTS
CP U/D CEP CET PE P
↑
↑
↑
↑
↑
↑
X X X l l L (a)
X X X l h H (a)
h l l h X Count Up (a) Count Up
l l l h X Count Down (a) Count Down
X h l h X q
X X h h X q
n
H = High voltage level
h = High voltage level one setup prior to the Low-to-High clock transition
L = Low voltage level
l = Low voltage level one setup time prior to the Low-to-High clock transition
q = Lower case letters indicate the state of the referenced output prior to the Low-to-High clock transition
X = Don’t care
↑ = Low-to-High clock transition
(a)= TC
is Low when CET is Low and the counter is at Terminal Count. Terminal Count Up is with all Qn outputs High and Terminal Count
Down is with all Qn outputs Low.
Q
n
n
n
TC
(a)
H
P0 P1 P2 P3 P4 P5 P6 P7
PE
U/D
CP
CEP
CET
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Most significant 8-bit counterLeast significant 8-bit counter
TC
SF00851
1996 Jan 05
3
Page 4
Philips Semiconductors Product specification
74F2698–bit bidirectional binary counter
LOGIC DIAGRAM
2
23
P0
P1
P2
P3
P4
DETAIL A
22
DETAIL A
21
DETAIL A
20
DETAIL A
18
DETAIL A
Q0
3
Q1
4
Q2
5
Q3
6
Q4
8
17
P5
P6
P7
PE
CP
U/D
CEP
CET
Pn
DETAIL A
16
DETAIL A
15
DETAIL A
24
11
1
12
13
TOGGLE
DETAIL A
Q
D
QCP
Q5
9
Q6
10
Q7
14
TC
V
=Pin 19
CC
GND=Pin 7
1996 Jan 05
PE CP
SF00837
4
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Philips Semiconductors Product specification
SYMBOL
PARAMETER
UNIT
NO TAG
VOHHigh-level output voltage
V
VOLLow-level output voltage
V
ICCSupply current (total)
CC
74F2698–bit bidirectional binary counter
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
V
I
IN
V
I
OUT
T
T
CC
IN
OUT
amb
stg
Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
Input current –30 to +5 mA
Voltage applied to output in High output state –0.5 to V
Current applied to output in Low output state 40 mA
Operating free-air temperature range 0 to +70 °C
Storage temperature –65 to +150 °C
RECOMMENDED OPERATING CONDITIONS
V
V
V
I
I
I
T
CC
IH
IL
IK
OH
OL
amb
Supply voltage 4.5 5.0 5.5 V
High-level input voltage 2.0 V
Low-level input voltage 0.8 V
Input clamp current –18 mA
High-level output current –1 mA
Low-level output current 20 mA
Operating free-air temperature range 0 70 °C
PARAMETER RATING UNIT
CC
V
LIMITS
MIN NOM MAX
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL PARAMETER TEST CONDITIONS
V
IK
I
I
I
IH
I
IL
I
OS
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
3. Not more than one output should be shorted at a time. For testing I
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
1996 Jan 05
LIMITS
UNIT
p
p
VCC = MIN, VIL = MAX ±10%V
VIH = MIN, IOH = MAX ±5%V
VCC = MIN, VIL = MAX ±10%V
VIH = MIN, IOL = MAX ±5%V
Input clamp voltage VCC = MIN, II = I
MIN
CC
CC
CC
CC
IK
2.5
2.7 3.4
TYP
NO TAG
MAX
0.30 0.50
0.30 0.50
–0.73 –1.2 V
Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA
High-level input current VCC = MAX, VI = 2.7V 20 µA
Low-level input current VCC = MAX, VI = 0.5V –0.6 mA
Short-circuit output current
pp
= 5V, T
CC
NO TAG
= 25°C.
amb
tests should be performed last.
OS
VCC = MAX –60 –150 mA
I
CCH
VCC =
MAX
I
CCL
PE=CET=CEP=U/D=GND,
Pn=4.5V, CP=↑
PE=CET=CEP=U/D=GND,
Pn=GND, CP=↑
, the use of high-speed test apparatus and/or sample-and-hold
OS
93 120 mA
98 125 mA
5
Page 6
Philips Semiconductors Product specification
74F2698–bit bidirectional binary counter
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
SYMBOL PARAMETER TEST CONDITIONS
f
MAX
t
PLH
t
pPHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Maximum clock frequency Waveform 1 100 115 85 MHz
Propagation delay
Waveform 1 3.0
CP to Qn (Load, PE = Low)
Propagation delay
Waveform 1 3.0
CP to Qn (Count, PE = High)
Propagation delay
CP to TC
Propagation delay
CET to TC
Propagation delay
U/D to TC
Waveform 1
Waveform 2
Waveform 3
= +25°C
amb
VCC = +5V
CL = 50pF, RL = 500Ω
MIN TYP MAX MIN MAX
4.0
4.5
4.5
5.0
3.5
3.0
4.5
4.5
6.0
6.5
6.0
7.0
6.5
6.5
6.0
6.5
7.0
7.0
8.5
8.5
9.0
10.0
9.5
9.5
9.0
9.0
9.0
9.5
T
= 0°C to +70°C
amb
VCC = +5V ± 10%
CL = 50pF, RL = 500Ω
3.0
4.0
3.0
4.0
4.0
5.0
3.0
3.0
4.0
4.0
9.0
9.0
10.0
10.5
10.5
10.0
10.0
10.0
10.0
10.0
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC SETUP REQUIREMENTS
SYMBOL PARAMETER TEST CONDITIONS
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
Setup time, High or Low
Pn to CP
Hold time, High or Low
Pn to CP
Setup time, High or Low
PE to CP
Hold time, High or Low
PE to CP
Setup time, High or Low
CEP or CET to CP
Hold time, High or Low
CEP or CET to CP
Setup time, High or Low
U/D to CP
Hold time, High or Low
U/D to CP
CP Pulse width
High or Low
Waveform 4
Waveform 4
Waveform 4
Waveform 4
Waveform 5
Waveform 5
Waveform 6
Waveform 6
Waveform 1
LIMITS
T
= +25°C
amb
V
= +5V
CC
CL = 50pF, RL = 500Ω
T
= 0°C to +70°C
amb
V
= +5V ± 10%
CC
CL = 50pF, RL = 500Ω
MIN TYP MIN MAX
3.5
3.5
1.0
1.0
5.5
6.5
0
0
6.0
8.0
0
0
8.0
6.5
0
0
4.0
4.5
2.5
2.5
0
1.0
5.5
6.5
0
0
5.0
6.5
0
0
6.5
6.5
0
0
4.0
5.0
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1996 Jan 05
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Page 7
Philips Semiconductors Product specification
74F2698–bit bidirectional binary counter
TIMING DIAGRAM
PE
P0
P1
P2
P3
P4
P5
P6
P7
CP
U/D
CEP AND CET
SEQUENCE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
TC
253 254 255 0 1 2 2 1 0 255 254 253
COUNT UP COUNT DOWNINHIBITLOAD
SF00838B
1996 Jan 05
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Page 8
Philips Semiconductors Product specification
74F2698–bit bidirectional binary counter
AC WAVEFORMS
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
1/f
MAX
CP
Q
TC
V
M
tW(H)
t
PLH
n
t
PHL
V
M
tW(L)
V
M
V
M
t
t
PHL
PLH
V
M
V
M
V
M
SF00791A
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
CET
TC
V
M
t
PHL
V
V
M
t
PLH
M
Waveform 2. Propagation Delay,
CET
Input to Terminal Count Output
V
M
SF00792
U/D
V
M
t
PHL
TC
V
V
M
t
PLH
M
V
M
SF00793
Waveform 3. Propagation Delay, Up/Down Count Control Input
to Terminal Count Output
CET
CEP
CP
Q
n
V
V
M
M
th(L) th(H)
V
M
V
M
ts(H)ts(L)
COUNT NO CHANGE
V
M
V
M
SF00842
Waveform 5. Count Enables Setup and Hold Times
Pn
PE
V
V
M
V
M
t
s
V
M
t
h
M
VMV
M
ts(L) ts(H)th = 0 th = 0
CP
V
M
V
M
SF00844
Waveform 4. Parallel Data and Parallel Enable
Setup and Hold Times
U/D
CP
V
Q
n
V
ts(L)
M
h
V
M
M
V
V
M
M
ts(H)t
V
M
COUNT UPCOUNT DOWN
SF00839
Waveform 6. Up/Down Count Control Setup and Hold Times
t
h
1996 Jan 05
8
Page 9
Philips Semiconductors Product specification
74F2698–bit bidirectional binary counter
TEST CIRCUIT AND WAVEFORMS
V
CC
PULSE
GENERATOR
V
IN
R
T
D.U.T.
V
OUT
R
C
L
L
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
= Load resistor;
R
L
see AC ELECTRICAL CHARACTERISTICS for value.
= Load capacitance includes jig and probe capacitance;
C
L
see AC ELECTRICAL CHARACTERISTICS for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
OUT
of
NEGATIVE
PULSE
POSITIVE
PULSE
family
74F
90%
10%
amplitude
t
w
V
M
10%
)
V
90%
M
t
THL (tf
t
TLH (tr
)
t
TLH (tr
t
THL (tf
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
V
rep. rate
M
3.0V
1.5V
1MHz 500ns
10%
)
)
90%
t
w
V
M
V
M
90%
10%
t
TLHtTHL
2.5ns 2.5ns
AMP (V)
0V
AMP (V)
0V
SF00006
1996 Jan 05
9
Page 10
Philips Semiconductors Product specification
74F2698–bit bidirectional binary counter
DIP24: plastic dual in-line package; 24 leads (300 mil) SOT222-1
1996 Jan 05
10
Page 11
Philips Semiconductors Product specification
74F2698–bit bidirectional binary counter
SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
1996 Jan 05
11
Page 12
Philips Semiconductors Product specification
74F2698–bit bidirectional binary counter
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1
1996 Jan 05
12
Page 13
Philips Semiconductors Product specification
74F2698–bit bidirectional binary counter
NOTES
1996 Jan 05
13
Page 14
Philips Semiconductors Product specification
74F2698-bit bidirectional binary counter
DEFINITIONS
Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
Copyright Philips Electronics North America Corporation 1996
All rights reserved. Printed in U.S.A.
(print code) Date of release: July 1994
Document order number: 9397-750-051 12
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