Datasheet N74F259N, N74F259D Datasheet (Philips)

Page 1
INTEGRATED CIRCUITS
74F259
Latch
Product specification IC15 Data Handbook
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1989 Apr 11
Page 2
74F259Latch
FEA TURES
Combines demultiplexer and 8-bit latch
Serial-to-parallel capability
Output from each storage bit available
Random (addressable) data entry
Easily expandable
Common reset input
Useful as 1-of-8 active-High decoder
DESCRIPTION
The 74F259 addressable latch has four distinct modes of operation which are selectable by controlling the Master Reset (MR Enable (E
) inputs (see Function Table). In the addressable latch mode, data at the Data inputs is written into the addressed latches. The addressed latches will follow the Data input with all unaddressed latches remaining in their previous states. In the store mode, all latches remain in their previous states and are unaffected by the Data or Address inputs. To eliminate the possibility of entering erroneous data in the latches, the enable should be held High (inactive) while the address lines are changing. In the 1-of-8 decoding or demultiplexing mode (MR
=E=Low), addressed outputs will follow the level of the Data input, with all other outputs Low. In the Master Reset mode, all outputs are Low and unaffected by the Address and Data inputs.
) and
PIN CONFIGURATION
1
A0
2
A1
3
A2
4
Q0
5
Q1
6
Q2 Q3
GND
TYPE TYPICAL
PROPAGATION
DELAY
74F259 7.5ns 31mA
16
V
CC
15
MR
14
E
13
D
12
Q7
11
Q6
107
Q5
98
Q4
SF00823
TYPICAL SUPPL Y
CURRENT (TOTAL)
ORDERING INFORMATION
ORDER CODE
DESCRIPTION COMMERCIAL RANGE
VCC = 5V ±10%,
T
= 0°C to +70°C
amb
16-pin plastic DIP N74F259N SOT38-4
16-pin plastic SO N74F259D SOT109-1
PKG DWG #
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION 74F (U.L.)
HIGH/LOW
D Data input 1.0/1.0 20µA/0.6mA
A0, A1, A2 Address inputs 1.0/1.0 20µA/0.6mA
E Enable input (active Low) 1.0/1.0 20µA/0.6mA
MR Master Reset inputs (active Low) 1.0/1.0 20µA/0.6mA
Q0 – Q7 Data outputs 50/33 1.0mA/20mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOAD VALUE
HIGH/LOW
1989 Apr 11 853–0362 06316
2
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Philips Semiconductors Product specification
OPERATING MODE
Demulti lex
H)
74F259Latch
LOGIC SYMBOL
E
14
MR
15
VCC = Pin 16 GND = Pin 8
13 3
1
DA3
A02A1
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
45679101112
SF00824
IEC/IEEE SYMBOL
1 2
3 14 13 15
0
2
G8 Z9 Z10
9, 10D 10m 0
9, 10D 10m 1
9, 10D 10m 2
9, 10D 10m 3
9, 10D 10m 4 9, 10D 10m 5
9, 10D 10m 6R
9, 10D 10m 7
8M
0 7
R
R
R
R
R
R
R
4
5
6
7
9
10
11
12
SF00825
FUNCTION TABLE
INPUTS OUTPUTS
MR E D A0 A1 A2 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
L H X X X L L L L L L L L L Master Reset L L d L L L Q=d L L L L L L L L L d H L L L Q=d L L L L L L L L d L H L L L Q=d L L L L L
L L d H H H L L L L L L L Q=d H H X X X X q0 q1 q2 q3 q4 q5 q6 q7 Store (do nothing) H L d L L L Q=d q1 q2 q3 q4 q5 q6 q7 H L d H L L q0 Q=d q2 q3 q4 q5 q6 q7 H L d L H L q0 q1 Q=d q3 q4 q5 q6 q7
H L d H H H q0 q1 q2 q3 q4 q5 q6 Q=d
H = High voltage level L = Low voltage level X = Don’t care d = High or Low data one setup time prior to the Low-to-High Enable transition q = Lower case letters indicate the state of the referenced output established during the last cycle in which it was addressed or cleared.
p (active-High decoder when D=
Addressable Latch
1989 Apr 11
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Philips Semiconductors Product specification
74F259Latch
LOGIC DIAGRAM
12
Q7
11
Q6
MR
10
Q5
9
Q4
7
Q3
6
Q2
13
D
14
E
15
5
Q1
VCC = Pin 16 GND = Pin 8
1989 Apr 11
3
A2
2
A1
1
A0
4
SF00826
Q0
4
Page 5
Philips Semiconductors Product specification
74F259Latch
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL PARAMETER RATING UNIT
V
V
I
V
OUT
I
OUT
T
amb
T
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
V V
I I
T
Supply voltage
CC
Input voltage –0.5 to +7.0 V
IN
Input current
IN
Voltage applied to output in High output state Current applied to output in Low output state
–0.5 to +7.0 V
–30 to +5 mA
–0.5 to V
40 mA Operating free-air temperature range 0 to +70 Storage temperature range –65 to +150
stg
PARAMETER
LIMITS UNIT
MIN NOM MAX
CC
IH IL
I
IK
OH
OL
amb
Supply voltage High-level input voltage 2.0 V
Low-level input voltage 0.8 V Input clamp current –18 mA High-level output current –1 mA Low-level output current 20 mA Operating free-air temperature range 0 70
4.5 5.0 5.5 V
CC
V
°C °C
°C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
V
V
V
I
I
I
OS
I
CC
High-level output voltage VCC = MIN, VIL = MAX, ±10%V
OH
Low-level output voltage VCC = MIN, VIL = MAX, ±10%V
OL
Input clamp voltage VCC = MIN, II = I
IK
I
Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA
I
High-level input current VCC = MAX, VI = 2.7V 20 µA
IH
Low-level input current VCC = MAX, VI = 0.5V –0.6 mA
IL
Short-circuit output current Supply current (total) I
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applic able type.
2. All typical values are at V
3. To reduce the ef fect of external noise during test.
4. Not more than one output should be shorted at a time. For testing I techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, I
PARAMETER TEST LIMITS UNIT
1
MIN TYP2MAX
2.5 V
CC
2.7 3.4 V
CC
CC
CC
0.35 0.50 V
0.35 0.50 V
–0.73 –1.2 V
37 75 mA
3
= 5V, T
CC
OS
= 25°C.
amb
tests should be performed last.
CONDITIONS
VIH = MIN, IOL = MAX ±5%V
VIH = MIN, IOL = MAX ±5%V
IK
VCC = MAX –60 –150 mA
CCHVCC
I
CCL
= MAX 24 46 mA
, the use of High-speed test apparatus and/or sample-and-hold
OS
1989 Apr 11
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Philips Semiconductors Product specification
74F259Latch
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
= +25°C T
amb
SYMBOL PARAMETER TEST VCC = +5V VCC = +5V ± 10% UNIT
CONDITION CL = 50pF, RL = 500 CL = 50pF, RL = 500
MIN TYP MAX MIN MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PHL
Propagation delay D to Qn
Propagation delay E to Qn
Propagation delay An to Qn
Propagation delay MR to Qn
Waveform
NO TAG
Waveform
NO TAG
Waveform
NO TAG
Waveform
NO TAG
4.0
3.0
4.5
3.0
5.0
4.0
7.0
5.0
8.0
5.0
10.0
8.5
9.0
7.0
10.5
7.0
14.0
9.5
5.0 7.0 9.0 4.5 10.0 ns
AC SETUP REQUIREMENTS
LIMITS
T
= +25°C T
SYMBOL PARAMETER TEST VCC = +5.0V
CONDITION CL = 50pF, RL = 500 CL= 50pF, RL = 500
ts(H)
ts(L)
th(H)
th(L) ts(H)
ts(L)
th(H)
th(L)
Setup time, High or Low D to E
Hold time, High or Low D to E
Setup time, High or Low
1
An to E Hold time, High or Low
2
An to E
Waveform
NO TAG
Waveform
NO TAG
Waveform
NO TAG
Waveform
NO TAG
tw(L) E Pulse width, Low Waveform
NO TAG
tw(L) MR Pulse width, Low W aveform
NO TAG
NOTES:
1. The Address to Enable setup time is the time before the High-to-Low Enable transition that the Address must be stable so that the correct latch is addressed and the other latches are not affected.
2. The Address to Enable hold time is the time before the Low-to-High Enable transition that the Address must be stable so that the correct latch is addressed and the other latches are not affected.
amb
MIN TYP MAX MIN MAX
3.0
6.5 0
0
2.0
2.0 0
0
7.5 8.0 ns
3.0 3.0 ns
= 0°C to +70°C
amb
4.0
2.5
4.5
3.0
5.0
4.0
= 0°C to +70°C
amb
10.0
7.5
12.0
8.0
14.5
10.0
VCC = +5.0V ± 10%
3.0
7.0 0
0
2.0
2.0 0
0
ns
ns
ns
UNIT
ns
ns
ns
ns
1989 Apr 11
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Philips Semiconductors Product specification
74F259Latch
AC WAVEFORMS
For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance.
D
tW(L)
E
V
M
t
PHL
Q
n
V
M
V
M
Waveform 1. Propagation Delay,
Enable Input to Output, Enable Pulse Width
t
PHL
tW(L)
V
M
MR
Qn
V
M
Waveform 3. Master Reset Pulse Width and
Master Reset to Output Delay
V
An
V
M
t
PLH
V
M
SF00827
V
M
SF00812
Qn
Waveform 2. Propagation Delay Address to Output
D
E
Qn
M
t
PHL
V
M
V
V
M
M
V
M
Q=D Q=D
V
M
t
PLH
V
M
SF00811
V
V
M
M
ts(L) th(L)ts(H) th(H)
V
M
SF00828
Waveform 4. Data Setup and Hold Times
V
M
An
E
V
t
s
M
Address Stable
Waveform 5. Address Setup and Hold Times
V
t
V
M
h
M
SF00814
1989 Apr 11
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Philips Semiconductors Product specification
74F259Latch
TEST CIRCUIT AND WAVEFORMS
V
CC
PULSE
GENERATOR
V
IN
R
T
D.U.T.
V
OUT
R
C
L
L
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
= Load resistor;
R
L
see AC ELECTRICAL CHARACTERISTICS for value.
C
= Load capacitance includes jig and probe capacitance;
L
see AC ELECTRICAL CHARACTERISTICS for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
OUT
of
NEGATIVE PULSE
POSITIVE PULSE
family
74F
90%
10%
amplitude
t
w
V
M
10%
)
t
THL (tf
)
t
TLH (tr
90%
V
M
t
TLH (tr
t
THL (tf
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
V
rep. rate
M
3.0V 1.5V
1MHz 500ns
10%
)
)
90%
t
w
V
M
V
M
90%
10%
t
TLHtTHL
2.5ns 2.5ns
AMP (V)
0V
AMP (V)
0V
SF00006
1989 Apr 11
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Philips Semiconductors Product specification
74F259Latch
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
1989 Apr 11
9
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Philips Semiconductors Product specification
74F259Latch
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
1989 Apr 11
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Philips Semiconductors Product specification
74F259Latch
NOTES
1989 Apr 11
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Philips Semiconductors Product specification
74F259Latch
Data sheet status
Data sheet status
Objective specification
Preliminary specification
Product specification
Product status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 10-98 Document order number: 9397-750-05109
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yyyy mmm dd
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