The MP2106 is a 1.5A, 800KHz synchronous
buck converter designed for low voltage
applications requiring high efficiency. It is
capable of providing output voltages as low as
0.9V, and integrates top and bottom switches to
minimize power loss and component count. The
800KHz switching frequency reduces the size
of filtering components, further reducing the
solution size.
The MP2106 includes cycle-by-cycle current
limiting and under voltage lockout. The internal
power switches, combined with the tiny 10-pin
MSOP and QFN packages, provide a solution
requiring a minimum of surface area.
EVALUATION BOARD REFERENCE
Board Number Dimensions
EV2106DQ/DK-00A 2.5”X x 2.0”Y x 0.5”Z
TM
1.5A, 15V, 800KHz
Synchronous Buck Converter
FEATURES
• 1.5A Output Current
• Synchronous Rectification
• Internal 210m and 255m Power Switches
• Input Range of 2.6V to 15V
• >90% Efficiency
• Zero Current Shutdown Mode
• Under Voltage Lockout Protection
• Soft-Start Operation
• Thermal Shutdown
• Internal Current Limit (Source & Sink)
• Tiny 10-Pin MSOP or QFN Package
APPLICATIONS
• DC/DC Regulation from Wall Adapters
• Portable Entertainment Systems
• Set Top Boxes
• Digital Video Cameras, DECT
• Networking Equipment
• Wireless Modems
TYPICAL APPLICATION
INPUT
2.6V to 15V
R4
OFF ON
C5C3
10nF
C1
3.3nF
R3
VINBST
5
RUN
1
SS
COMP
MP2106
C6
10nF
3
“MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic
Power Systems, Inc.
2) The device is not guaranteed to function outside of its
operating conditions.
3) Measured on approximately 1” square of 1 oz copper.
SGND
10
PGND
9
LX
8
VIN
7
BST
6
MP2106_PD02-QFN10
–40°C to +85°C
θ
JA
θJC
ELECTRICAL CHARACTERISTICS
VIN = 5.0V, TA = +25°C, unless otherwise noted.
Parameter Symbol Condition Min Typ Max Units
Input Voltage Range VIN 2.6 15 V
Input Under Voltage Lockout 2.2 V
Input Under Voltage Lockout
Hysteresis
Shutdown Supply Current V
Operating Supply Current V
VREF Voltage V
RUN Input Low Voltage VIL 0.4 V
RUN Input High Voltage VHL 1.5 V
RUN Hysteresis 100 mV
RUN Input Bias Current 1 µA
Oscillator
Switching Frequency fSW 700 800 900 KHz
Maximum Duty Cycle D
Minimum On Time tON 200 ns
Parameter Symbol Condition Min Typ Max Units
Error Amplifier
Voltage Gain A
Transconductance GEA 300 µA/V
COMP Maximum Output Current ±30 µA
FB Regulation Voltage VFB 875 895 915 mV
FB Input Bias Current IFB VFB = 0.895V –100 nA
Soft-Start
Soft-Start Current ISS 2 µA
Output Switch On-Resistance
Switch On Resistance
Synchronous Rectifier On Resistance
Switch Current Limit (Source) 2.5 A
Synchronous Rectifier Current Limit
(Sink)
Thermal Shutdown 160
VEA
400 V/V
VIN = 5V 255 m
V
= 3V 315 m
IN
VIN = 5V 210 m
V
= 3V 255 m
IN
350 mA
°C
PIN FUNCTIONS
Pin # Name Description
Soft-Start Input. Place a capacitor from SS to SGND to set the soft-start period. The MP2106
1 SS
2 FB
3 COMP
4 VREF
5 RUN
6 BST
7 VIN
8 LX
9 PGND
10 SGND Signal Ground.
sources 2µA from SS to the soft-start capacitor at startup. As the SS voltage rises, the
feedback threshold voltage increases to limit inrush current during startup.
Feedback Input. FB is the inverting input of the internal error amplifier. Connect a resistive
voltage divider from the output voltage to FB to set the output voltage value.
Compensation Node. COMP is the output of the error amplifier. Connect a series RC network
to compensate the regulation control loop.
Internal 2.4V Regulator Bypass. Connect a 10nF capacitor between VREF and SGND to
bypass the internal regulator. Do not apply any load to VREF.
On/Off Control Input. Drive RUN high to turn on the MP2106; low to turn it off. For automatic
startup, connect RUN to VIN via a pullup resistor.
Power Switch Boost. BST powers the gate of the high-side N-Channel power MOSFET switch.
Connect a 10nF or greater capacitor between BST and LX.
Internal Power Input. VIN supplies the power to the MP2106 through the internal LDO
regulator. Bypass VIN to PGND with a 10µF or greater capacitor. Connect VIN to the input
source voltage.
Output Switching Node. LX is the source of the high-side N-Channel switch and the drain of the
low-side N-Channel switch. Connect the output LC filter between LX and the output.
Power Ground. PGND is the source of the N-Channel MOSFET synchronous rectifier. Connect
PGND to SGND as close to the MP2106 as possible.
The MP2106 measures the output voltage
through an external resistive voltage divider and
compares that voltage to the internal 0.9V
reference in order to generate the error voltage
at COMP. The current-mode regulator uses the
voltage at COMP and compares it to the
inductor current to regulate the output voltage.
The use of current-mode regulation improves
transient response and improves control loop
stability.
At the beginning of each cycle, the high-side
N-Channel MOSFET is turned on, forcing the
inductor current to rise. The current at the drain
of the high-side MOSFET is internally
measured and converted to a voltage by the
current sense amplifier.
That voltage is compared to the error voltage at
COMP. When the inductor current rises
sufficiently, the PWM comparator turns off the
high-side switch and turns on the low-side
switch, forcing the inductor current to decrease.
The average inductor current is controlled by
the voltage at COMP, which in turn is controlled
by the output voltage. Thus the output voltage
controls the inductor current to satisfy the load.
Since the high-side N-Channel MOSFET
requires voltages above V
to drive its gate, a
IN
bootstrap capacitor from LX to BST is required
to drive the high-side MOSFET gate. When LX
is driven low (through the low-side MOSFET),
the BST capacitor is internally charged. The
voltage at BST is applied to the high-side
MOSFET gate to turn it on, and maintains that
voltage until the high-side MOSFET is turned
off and the low-side MOSFET is turned on, and
the cycle repeats. Connect a 10nF or greater
capacitor from BST to SW to drive the high-side
MOSFET gate.
APPLICATION INFORMATION
INPUT
2.6V to 15V
5
RUN
1
SS
3
C5
10nF
C4
OPEN
Figure 2—Typical Application Circuit
Internal Low-Dropout Regulator
The internal power to the MP2106 is supplied
from the input voltage (VIN) through an internal
2.4V low-dropout linear regulator, whose output
is VREF. Bypass VREF to SGND with a 10nF
or greater capacitor for proper operation. The
internal regulator can not supply more current
than is required to operate the MP2106.
Therefore, do not apply any external load to
VREF.
C3
3.3nF
C6
10nF
C7
10nF
67
VINBST
MP2106
PGNDSGNDVREF
8
LX
2
FBCOMP
9104
OUTPUT
1.8V / 1.5A
MP2106_TAC_F02
Soft-Start
The MP2106 includes a soft-start timer that
slowly ramps the output voltage at startup to
prevent excessive current at the input.
When power is applied to the MP2106, and
RUN is asserted, a 2µA internal current source
charges the external capacitor at SS. As the
capacitor charges, the voltage at SS rises. The
MP2106 internally limits the feedback threshold
voltage at FB to that of the voltage at SS. This
forces the output voltage to rise at the same
rate as the voltage at SS, forcing the output
voltage to ramp linearly from 0V to the desired
regulation voltage during soft-start.
The soft-start period is determined by the
equation:
5C45.0t
SS
Where C5
(in nF) is the soft-start capacitor from
SS to GND, and t
SS
×=
(in ms) is the soft-start
period. Determine the capacitor required for a
given soft-start period by the equation:
t22.25C×=
SS
Use values between 10nF and 22nF for C5 to
set the soft-start period (between 4ms and
10ms).
Setting the Output Voltage (see Figure 2)
Set the output voltage by selecting the resistive
voltage divider ratio. The voltage divider drops
the output voltage to the 0.895V feedback
voltage. Use 10k for the low-side resistor of
the voltage divider. Determine the high-side
resistor by the equation:
V
⎛
OUT
⎜
2R
⎜
⎝
Where R2 is the high-side resistor, V
⎞
⎟
1R1
×
−=
⎟
V895.0
⎠
is the
OUT
output voltage and R1 is the low-side resistor.
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous, and so a capacitor is required to
supply the AC current to the step-down
converter while maintaining the DC input
voltage. A low ESR capacitor is required to
keep the noise at the IC to a minimum. Ceramic
capacitors are preferred, but tantalum or low
ESR electrolytic capacitors may also suffice.
The capacitor can be electrolytic, tantalum or
ceramic. Because it absorbs the input switching
current it must have an adequate ripple current
rating. Use a capacitor with RMS current rating
greater than 1/2 of the DC load current.
For stable operation, place the input capacitor
as close to the IC as possible. A smaller high
quality 0.1µF ceramic capacitor may be placed
closer to the IC with the larger capacitor placed
further away. If using this technique, it is
recommended that the larger capacitor be a
tantalum or electrolytic type. All ceramic
capacitors should be placed close to the
MP2106. For most applications, a 10µF ceramic
capacitor will work.
Selecting the Output Capacitor
The output capacitor (C2) is required to
maintain the DC output voltage. Low ESR
capacitors are preferred to keep the output
voltage ripple to a minimum. The characteristics
of the output capacitor also affect the stability of
the regulation control system. Ceramic,
tantalum, or low ESR electrolytic capacitors are
recommended.
The output voltage ripple is:
RIPPLE
OUT
×
=
⎛
V
OUT
V
⎞
⎜
⎟
⎟
IN
⎠
+×
R
ESR
⎜
⎝
is the input voltage,
IN
is the switching
SW
SW
⎛
⎜
−×
1
⎜
Lf
⎝
is the output voltage ripple, fSW is
RIPPLE
1
⎞
⎟
⎟
××
2Cf8
⎠
V
V
SW
Where V
the switching frequency, V
R
is the equivalent series resistance of the
ESR
output capacitors and f
frequency.
Choose an output capacitor to satisfy the output
ripple requirements of the design. A 22µF
ceramic capacitor is suitable for most
applications.
Selecting the Inductor
The inductor is required to supply constant
current to the output load while being driven by
the switched input voltage. A larger value
inductor results in less ripple current that will
result in lower output ripple voltage. However,
the larger value inductor is likely to have a
larger physical size and higher series
resistance. Choose an inductor that does not
saturate under the worst-case load conditions.
A good rule for determining the inductance is to
allow the peak-to-peak ripple current to be
approximately 30% to 40% of the maximum
load current. Make sure that the peak inductor
current (the load current plus half the peak-topeak inductor ripple current) is below 2.5A to
prevent loss of regulation due to the current
limit.
Calculate the required inductance value by the
equation:
()
VVV
−×
OUTINOUT
L
=
SWIN
IfV
∆××
Where I is the peak-to-peak inductor ripple
current. It is recommended to choose I to be
30%~40% of the maximum load current.
Compensation
The system stability is controlled through the
COMP pin. COMP is the output of the internal
transconductance error amplifier. A series
capacitor-resistor combination sets a pole-zero
combination to control the characteristics of the
control system.
The DC loop gain is:
A×××
Where V
⎛
⎜
=
VDC
⎜
⎝
is the feedback voltage, A
FB
⎞
V
FB
⎟
⎟
V
OUT
⎠
RGA
LOADCSVEA
is the
VEA
transconductance error amplifier voltage gain,
G
is the current sense transconductance
CS
(roughly the output current divided by the
voltage at COMP) and R
is the load
LOAD
resistance:
V
OUT
I
OUT
Where I
R=
LOAD
is the output load current.
OUT
The system has 2 poles of importance, one is
due to the compensation capacitor (C3), and
the other is due to the load resistance and the
output capacitor (C2), where:
f
=
1P
P1 is the first pole, and G
EA
VEA
is the error amplifier
EA
3CA2
××π
G
transconductance (300µA/V) and
f
=
2P
1
LOAD
2CR2
××π
The system has one zero of importance, due to
the compensation capacitor (C3) and the
compensation resistor (R3). The zero is:
f
=
1Z
1
3C3R2
××π
If large value capacitors with relatively high
equivalent-series-resistance (ESR) are used,
the zero due to the capacitance and ESR of the
output capacitor can be compensated by a third
pole set by R3 and C4. The pole is:
f
=
3P
1
4C3R2
××π
The system crossover frequency (the frequency
where the loop gain drops to 1, or 0dB, is
important. Set the crossover frequency to below
one tenth of the switching frequency to insure
stable operation. Lower crossover frequencies
result in slower response and worse transient
load recovery. Higher crossover frequencies
degrade the phase and/or gain margins and
can result in instability.
Table 1—Compensation Values for Typical
Output Voltage/Capacitor Combinations
V
OUT
1.8V 22µF Ceramic 6.8k 3.3nF None
2.5V 22µF Ceramic 9.1k 2.2nF None
3.3V 22µF Ceramic 12k 1.8nF None
47µF Tantalum
1.8V
(300m)
47µF Tantalum
2.5V
(300m)
47µF Tantalum
3.3V
(300m)
C2 R3 C3 C4
13k 2nF 1nF
18k 1.2nF 750pF
24k 1nF 560pF
Choosing the Compensation Components
The values of the compensation components
given in Table 1 yield a stable control loop for
the given output voltage and capacitor. To
optimize the compensation components for
conditions not listed in Table 1, use the
following procedure.
Choose the compensation resistor to set the
desired crossover frequency. Determine the
value by the following equation:
fV2C2
×××π
COUT
VGG
FBCSEA
Where f
3R
=
is the desired crossover frequency
C
××
(preferably 33KHz).
Choose the compensation capacitor to set the
zero below one fourth of the crossover
frequency. Determine the value by the following
equation:
3C
>
2
××π
f3R
C
Determine if the second compensation
capacitor, C4 is required. It is required if the
ESR zero of the output capacitor happens at
less than half of the switching frequency. Or:
1fR2C
>×××π
SWESR
If this is the case, then add the second
compensation capacitor.
External Boost Diode
For input voltages less than or equal to 5V, it is
recommended that an external boost diode be
added. This will help improve the regulator
efficiency. The diode can be a low cost diode
such as an IN4148 or BAT54.
5V
BOOST
DIODE
10nF
MP2106_F03
MP2106
BST
LX
6
8
Figure 3—External Boost Diode
This diode is also recommended for high duty
V
cycle operation (when
output voltage (V
OUT
>65%) and high
V
IN
>12V) applications.
OUT
However, do not exceed the absolute maximum
voltage for these pins.
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.