The MP1593 is a step-down regulator with an internal Power MOSFET. It achieves 3A ofcontinuous output current over a wide inputsupply range with excellent load and line regulation.
Current mode operation provides fast transientresponse and eases loop stabilization.
Fault condition protection includescycle-by-cycle current limiting and thermal shutdown.An adjustable soft-start reduces the stress onthe input sourceat startup. In shutdownmode theregulator draws 20µA ofsupply current.
The MP1593 requires a minimum number of readily available external components, providing a compact solution.
EVALUATION BOARD REFERENCE
Board Number Dimensions
EV1593DN-00A 2.1”X x 1.3”Y x 0.4”Z
FEATURES
3A Output Current Programmable Soft-Start 100mΩ Internal Power MOSFET Switch Stable with Low ESR Output Ceramic
Capacitors
Up to 95% Efficiency 20μA Shutdown Mode Fixed 385kHz Frequency Thermal Shutdown Cycle-by-Cycle Over Current Protection Wide 4.75V to 28V Operating Input Range Output Adjustable from 1.22V Under-Voltage LockoutAvailable in 8-Pin SOIC Package
APPLICATIONS
Distributed Power Systems Battery Chargers Pre-Regulator for Linear Regulators Flat Panel TVs Set-Top Boxes Cigarette Lighter Powered Devices DVD/PVR Devices
All MPSparts are lead-free and adhere tothe RoHSdirective. For MPS green status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “TheFuture ofAnalog ICTechnology” are registered trademarks ofMonolithic Power Systems, Inc.
Lead Temperature....................................260C
Storage Temperature ..............-65°C to +150C
Recommended Operating Conditions
Input Voltage VIN............................4.75V to 28V
Operating Junct. Temp (T
...............-0.5V to VIN + 0.3V
SW
..........VSW – 0.3V to VSW + 6V
BS
= +25°C)
A
)........-40C to+125C
J
-40C to +85C
SS
8
EN
7
COMP
6
FB
5
Thermal Resistance
(4)
θ
JA
θJC
SOIC8E (Exposed Pad)..........50......10...C/W
Notes:
1) Exceeding these ratings may damage the device.
2)The maximum allowable power dissipation is a function of themaximum junction temperature Tambient thermal resistance θ
. The maximum allowable continuous power dissipation at
T
A
any ambient temperature is calculated by P(MAX)-TA)/θJA. Exceeding the maximum allowable powerdissipation will cause excessive die temperature, and theregulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanentdamage.
3)The device is not guaranteed to function outside of its operating conditions.
4 GND Ground. Note: Connect the exposed pad to Pin 4.
5 FB
6 COMP
7 EN
8 SS
High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel MOSFET switch. Connect a 10nF or greater capacitor from SW to BS to power the high-side switch.
Power Input. IN supplies power to the IC. Drive IN with a 4.75V to 28V power source. Bypass IN
to GND with a suitably large capacitor to eliminate noise on the input to the IC. SeeInput Capacitor.
Power Switching Output. SW is the switching node that supplies power to the output. Connectthe output LC filter from SW to the output load. Note that a capacitor is required from SW toBSto power the high-side switch.
Feedback Input. FB senses the output voltage and regulates it. Drive FB with a resistive voltage
divider from the output voltage to ground. The feedback threshold is 1.222V. See Setting theOutput Voltage.
Compensation Node. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to GND. In some cases, an additional capacitor from COMP to GND is
required. See Compensation.
Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator; low to turn it off. An Under-Voltage Lockout (UVLO) function can be implemented bythe addition of a resistor divider from V
to GND. For complete low current shutdown the ENpin
IN
voltage needs to be less than 1.5V. For automatic startup leave EN disconnected.
Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND to set the soft-start period. A 0.1μF capacitor sets the soft-start period to 10ms. To disable the soft-start feature, leave SS disconnected.
The MP1593 is acurrent-modestep-downregulator. It regulates input voltages from 4.75V to28V down to an output voltage aslow as 1.22V,andis ableto supply up to 3A ofcontinuous loadcurrent.
The MP1593 uses current-mode control toregulate the output voltage. Theoutputvoltageis measured at FB through a resistive voltagedividerand amplified through the internalerroramplifier.The output current of the transconductance error amplifier is presented atCOMP where a network compensates the regulation control system. The voltage at COMPis compared to the internally measured switchcurrent to control the output voltage.
6
COMP
8
SS
The converter uses an internal N-Channel MOSFET switch to step-down the input voltage to the regulated output voltage. Since theMOSFET requires a gate voltage greater than the input voltage, a boost capacitor connectedbetween SW and BS drives the gate. Thecapacitor is internally charged when SW is low.
An internal 10Ω switch from SW to GND is usedto insure that SW is pulled to GND when it islow to fully charge the BS capacitor.
The output voltage is set using a resistive voltage divider from the output voltage to the FB pin. The voltage divider divides the output voltage down to the feedback voltage by the ratio:
2R
VV
OUTFB
Where V
is the feedback voltage and V
FB
the output voltage.
Thus the output voltage is:
OUT
22.1V
R2 can be as high as 100kΩ, but a typical valueis 10kΩ. Using that value, R1 is determined by:
OUT
For a 3.3V output voltage, R2 is 10kΩ and R1 is 17kΩ.
Inductor
The inductor is required to supply constant current to the output load while being driven by the switched input voltage. A larger valueinductor will result in less ripple current that will result in lower output ripple voltage. However,larger value inductors will have larger physicalsize, higher series resistance and/or lower saturation current. A good standard for determining the inductance to use is to allow the inductor peak-to-peak ripple current to be approximately 30% of the maximum switchcurrent limit. Also, make sure that the peak inductor current is below the maximum switchcurrent limit. The inductance value can be calculated by:
2R1R
is
OUT
2R1R
2R
)k)(22.1V(18.81R
Choose an inductor that will not saturate under the maximum inductor peak current. The peak inductor current can be calculated by:
V
OUT
V
IN
V
II
LOADLP
OUT
S
1
Lf2
Where I
is the load current.
LOAD
Table 1 lists a number of suitable inductors from various manufacturers. The choice ofwhich inductor to use mainly depends on the price vs. size requirements and any EMIrequirement.
The output rectifier diode supplies current to theinductor when the high-side switch is off. Use aSchottky diode to reduce losses due to diodeforward voltage and recovery times.
Choose a diode whose maximum reverse voltage rating is greater than the maximum input voltage, and whose current rating is greater than the maximum load current. Table 2lists example Schottky diodes and manufacturers.
Table 2—Diode Selection Guide
Diode
SK33 30V, 3A Diodes Inc.
SK34 40V, 3A Diodes Inc.
B330 30V, 3A Diodes Inc.
B340 40V, 3A Diodes Inc.
MBRS330 30V, 3A On Semiconductor
MBRS340 40V, 3A On Semiconductor
oltage/Current
Rating
Manufacture
Input Capacitor
The input current to the step-down converter is discontinuous, therefore a capacitor is requiredto supply the AC current to the step-down converter while maintaining the DC inputvoltage. Use low ESR capacitors for the bestperformance. Ceramic capacitors are preferred, but tantalum or low-ESR electrolytic capacitorswill also suffice.
Since the input capacitor (C1) absorbs the inputswitching current it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated by:
V
OUT
V
IN
= 2V
IN
OUT
,
V
OUT
II
LOAD1C
1
V
IN
The worst-case condition occurs at Vwhere:
The input capacitor canbe electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, a small, high quality ceramiccapacitor (i.e. 0.1μF) should be placed as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge toprevent excessive voltage ripple at the input.The input voltage ripple caused by the capacitance can be estimated by:
OUT
V
1
IN
I
LOAD
V
IN
S
V
1Cf
V
OUT
V
IN
Output Capacitor
The output capacitor is required to maintain theDC output voltage. Ceramic, tantalum or low ESR electrolytic capacitors are recommended.
Low ESR capacitors are preferred to keep theoutput voltage ripple low. The output voltage ripple can be estimated by:
OUT
1
Lf
V
V
OUT
S
V
OUT
V
IN
R
ESR
1
2Cf8
S
Where L is the inductor value, C2 is the outputcapacitance value and R
is the equivalent
ESR
series resistance (ESR) value of the output capacitor.
In the case of ceramic capacitors, theimpedance at the switching frequency is dominated by the capacitance, which is the main cause of the output voltage ripple. For simplification, the output voltage ripple can be estimated by:
ΔV
OUT
V
OUT
2
S
1
2CLf8
V
OUT
V
IN
In the case of tantalum or electrolytic capacitors, the ESR dominates the impedance at theswitching frequency. For simplification, theoutput ripple can be approximated to:
I
LOAD
I
1C
2
For simplification, choose the input capacitorwhose RMS current rating is greater than half ofthe maximum load current.
V
OUT
OUT
Lf
S
ΔV
The characteristics of the output capacitor alsoaffect the stability of the regulation system. TheMP1593 can be optimized for a wide range of
The MP1593 employs current mode control foreasy compensation and fast transient response.The system stability and transient response arecontrolled through the COMP pin. COMP is the output of the internal transconductance error amplifier. A series capacitor-resistor combination sets a pole-zero combination tocontrol the characteristics of the control system.
The DC gain of the voltage feedback loop is given by:
V
AGRA
VEACSLOADVDC
Where AG
is the current sense transconductance and
CS
R
is the load resistor value.
LOAD
is the error amplifier voltage gain,
VEA
V
FB
OUT
The system has two poles of importance. One is due to the compensation capacitor (C3) andthe output resistor of error amplifier, while theother is dueto the output capacitor and the load resistor. These poles are located at:
G
Where G
f
1P
f
2P
is the error amplifier
EA
EA
1
A3C2
R2C2
VEA
LOAD
transconductance.
In this case (as shown in Figure 3), a third poleset by the compensation capacitor (C6) and the compensation resistor (R3) is used tocompensate the effectof the ESR zero on theloop gain. This pole is located at:
f
3P
1
3R6C2
The goal of compensation design is to shape the converter transfer function to get a desired loop gain. The system crossover frequency (where the feedback loop has unity gain) is important.
Lower crossover frequencies result in slowerline and load transient responses,while highercrossover frequencies could cause system instability. A good standard is to set thecrossover frequency to approximately one-tenth of the switching frequency. The switching frequency for the MP1593 is 385KHz, so thedesired crossover frequency is around 38KHz.
Table 3 lists the typical values of compensationcomponents for some standard output voltages with various output capacitors and inductors.The values of the compensation components have been optimized for fast transientresponses and good stability at given conditions.
The system has one zero of importance, due to the compensation capacitor (C3) and thecompensation resistor (R3). This zero is located at:
f
1Z
1
3R3C2
The system may have another zero of importance, if the output capacitor has a largecapacitance and/or a high ESR value. The zero, due to the ESR and capacitance of the outputcapacitor, is located at:
To optimize the compensation components for conditions not listed inTable 3, the followingprocedure can be used.
1. Choose the compensation resistor (R3) to set the desiredcrossover frequency. Determine R3by the following equation:
V
f2C2
Where f
3R
is the desired crossover frequency
C
GG
CSEA
OUT
C
V
FB
(which typically has a value no higher than38KHz).
2. Choose the compensation capacitor (C3) toachieve the desired phase margin. For applications with typical inductor values, settingthe compensation zero, f
, below one forth of
Z1
the crossover frequency provides sufficient phase margin.
Determine C3 bythe following equation:
3C
4
f3R2
C
Where R3 is the compensation resistor value.
3. Determine if the second compensationcapacitor (C6) is required. It is required if the ESR zeroofthe output capacitor is located at less than half of the 385kHz switching frequency,orthe following relationship is valid:
ESR
f
S
2
is
ESR
is the
S
1
R2C2
Where C2 is the outputcapacitance value, Rthe ESR value of the output capacitor and fswitching frequency. Ifthisis the case,then add the second compensationcapacitor (C6) to setthe polef
at the locationof theESR zero.
P3
Determine C6 by the equation:
R2C
6C
Where C2 is the outputcapacitance value, R
3R
ESR
is
ESR
the ESR value ofthe outputcapacitor and R3 isthe compensation resistor.
PCB Layout Guide
PCB layout is very important to achieve stableoperation. It is highly recommended to duplicate EVB layout for optimum performance.
If change is necessary, please follow theseguidelines and take Figure2 and 3forreferences.
1) Keep the path of switching current shortand minimize the loop area formed by Inputcap, high-side MOSFET and low-side MOSFET/schottky diode.
2) Keep the connection of low-sideMOSFET/schottky diode between SW pin and input power ground as short and wide as possible.
3) Bypass ceramic capacitors are suggested to be put close to the V
and VCC Pin.
IN
4) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close tothe chip as possible.
5) Route SW away from sensitive analog areas such as FB.
6) Connect IN, SW, and especially GND respectively to a large copper area to cool the chip to improve thermal performanceand long-term reliability. For single layer, do not solder exposed pad of the IC.
C4
C5
R4
8SSBS
1
7
EN
IN2
C3R3C6
6
5FB
COMP
SW
GND
3
4
R1
R2
SGND
L1
C1
PGND
D1
C2
TOP Layer
SGND
Vout
Feeback
5FB
GND4
R1R2
C6C3
R3
SGND
SGND
C5
C4
R4
8SSBS
1
7EN
IN2
6
COMP
SW3
L1
C1
PGND
D1
C2
Figure 3―PCB Layout (Single Layer)
External Bootstrap Diode
An external bootstrap diode may enhance theefficiency of the regulator, the applicableconditions of external BST diode are:
V
Duty cycle is high: D=
=5V or 3.3V; and
OUT
V
OUT
>65%
V
IN
In these cases, an external BST diode is recommended from the output of the voltage regulator to BST pin, as shown in Fig.4
External BST Diode
BST
MP1593
SW
IN4148
C
BST
L
C
OUT
5V or 3.3V
Figure 4—Add Optional External Bootstrap
Diode to Enhance Efficiency
The recommended external BST diode is IN4148, and the BST cap is 0.1~1µF.
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONSOR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
0.138(3.51)
RECOMMENDED LAND PATTERN
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
NOTICE:The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed uponwhen integrating MPS products into any application. MPS will not assume anylegal responsibility for any said applications.