Datasheet KS86C4104, KS86P4104, KS86P4004, KS86C4004 Datasheet (Samsung)

KS86C4004/P4004/C4104/P4104 PRODUCT OVERVIEW

1 PRODUCT OVERVIEW

SAM87RI PRODUCT FAMILY

Samsung's SAM87Ri family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide
range of integrated peripherals, and various mask-programmable ROM sizes.

A address/data bus architecture and a large number of bit-configurable I/O ports provide a flexible programming
environment for applications with varied memory and I/O requirements. Timer/counters with selectable operating
modes are included to support real-time operations.

KS86C4004/C4104 MICROCONTROLLER

The KS86C4004/C4104 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process. It is
built around the powerful SAM87Ri CPU core. The KS86C4004/C4104 is a versatile microcontroller, with its A/D
converter and a zero-crossing detection capability it can be used in a wide range of general purpose applications.

Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register
space, the size of the internal register file was logically expanded. The KS86C4004/C4104 has 4-Kbytes of
program memory on-chip (ROM) and 208-bytes of general purpose register area RAM.

Using the SAM87Ri design approach, the following peripherals were integrated with the SAM87Ri core:
— Four configurable I/O ports (KS86C4004: 22 pins, KS86C4104: 16 pins)

— Six interrupt sources with one vector and one interrupt level
— Two 8-bit timer/counter with various operating modes
— Analog to digital converter (KS86C4004: 8-bit, 8-channel, KS86C4104: 10-bit, 5-channel)
— One zero cross detection module

The KS86C4004/C4104 microcontroller is ideal for use in a wide range of electronic applications requiring simple
timer/counter, PWM, ADC, ZCD and capture functions. KS86C4004 is available in a 30-pin SDIP and a 32-pin
SOP package. KS86C4104 is available in a 24-pin SDIP and a 24-pin SOP package.

OTP

The KS86P4004/P4104 is an OTP (one time programmable) version of the KS86C4004/C4104 microcontroller.
The KS86P4004/P4104 has on-chip 4-Kbyte one-time programmable EEPROM instead of masked ROM. The
KS86P4004/P4104 is fully compatible with the KS86C4004/C4104, in function, in D.C. electrical characteristics
and in pin configuration.

1-1

PRODUCT OVERVIEW KS86C4004/P4004/C4104/P4104

FEATURES

CPU

• SAM87Ri CPU core

Memory

• 4-Kbyte internal program memory (ROM)

• 208-byte general purpose register area (RAM)

Instruction Set

• 41 instructions

• IDLE and STOP instructions added for
power-down modes.

Instruction Execution Time

• 600 ns at 10 MHz f

OSC

(minimum)

Interrupts

• 6 interrupt sources with one vector and one level
interrupt structure

Oscillation Frequency

• 1 MHz to 10 MHz external crystal oscillator

• Maximum 10 MHz CPU clock

• 4 MHz RC oscillator

General I/O

• Four I/O ports (22 pins for KS86C4004,
16 pins for KS86C4104)

• Bit programmable ports

Timer/Counter

• One 8-bit basic timer for watchdog function

• One 8-bit timer/counter with three operating
modes (10-bit PWM 1ch)

• One 8-bit timer/counter for the zero-crossing
detection circuit

Zero-Crossing Detection Circuit

• Zero-crossing detection circuit that generates a
digital signal in synchronism with an AC signal
input

Buzzer Frequency Range

• 200 Hz to 20 kHz signal can be generated

Operating Temperature Range

• – 40°C to + 85°C

Operating Voltage Range

• 2.7 V to 5.5 V

OTP Interface Protocol Spec

• Serial OTP

Package Types

• 30-pin SDIP, 32-pin SOP for KS86C4004/P4004

• 24-pin SDIP, 24-pin SOP for KS86C4104/P4104

A/D Converter

• Eight analog input pins

• 8-bit conversion resolution (KS86C4004)

• 10-bit conversion resolution (KS86C4104)

1-2

KS86C4004/P4004/C4104/P4104 PRODUCT OVERVIEW

BLOCK DIAGRAM

P1.0-P1.3

P0.0-P0.7

/ZCD,BUZ,T0,CLO

X

X

OUT

T0(PWM)

P1.1/BUZ

ADC0

-ADC7

P1.0/

ZCD

BASIC

PORT 0

PORT 1

TIMER

IN

OSC

TIMER 0

I/O PORT I/O and

INTERRUPT CONTROL

PORT 2

P2.0-P2.3
/INT0-INT1
/ADC6-ADC7

TIMER 1

SAM87RI CPU

ADC

ZCD

4-KB ROM

REGISTER FILE

Figure 1-1. Block Diagram

PORT 3

208-BYTE

P3.0-P3.5
/ADC0-ADC5

1-3

PRODUCT OVERVIEW KS86C4004/P4004/C4104/P4104

PIN ASSIGNMENTS

V

SS

X

X

OUT

TEST

P0.1
P0.0

RESET

P3.5/ADC5
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0

AV

SS

AV

ref

IN

1
2
3
4
5
6
7

KS86C4004

8
9
10
11
12
13
14
15

30-SDIP

(Top View)

30
29
28
27
26
25
24
23
22
21
20
19
18
17
16

VDD
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0 / ZCD
P1.1 / BUZ
P1.2 / T0(PWM)
P1.3 / CLO
P2.0 / INT0
P2.1 / INT1
P2.2 / ADC6
P2.3 / ADC7

Figure 1-2. Pin Assignment Diagram (30-Pin SDIP Package)

1-4

KS86C4004/P4004/C4104/P4104 PRODUCT OVERVIEW

V

SS

X

X

OUT

TEST

P0.1
P0.0

RESET

NC
P3.5/ADC5
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0

AV

SS

AV

ref

IN

1
2
3
4
5

KS86C4004

6
7
8

(Top View)

9
10
11
12
13
14
15
16

32-SOP

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

V

DD

P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
NC
P1.0 / ZCD
P1.1 / BUZ
P1.2 / T0(PWM)
P1.3 / CLO
P2.0 / INT0
P2.1 / INT1
P2.2 / ADC6
P2.3 / ADC7

Figure 1-3. Pin Assignment Diagram (32-Pin SOP Package)

1-5

PRODUCT OVERVIEW KS86C4004/P4004/C4104/P4104

V

SS

X

X

OUT

TEST

P0.1
P0.0

RESET

P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0

IN

1
2
3
4
5

KS86C4104

6
7
8
9
10
11
12

24-SDIP

(Top View)

24
23
22
21
20
19
18
17
16
15
14
13

VDD
P0.2
P0.3
P0.4
P0.5
P0.6
P1.0 / ZCD
P1.1 / BUZ
P1.2 / T0(PWM)
P2.0 / INT0
AV

ref

AV

SS

Figure 1-4. Pin Assignment Diagram (24-Pin SDIP Package)

1-6

KS86C4004/P4004/C4104/P4104 PRODUCT OVERVIEW

V

SS

X

X

OUT

TEST

P0.1

P0.0

RESET

P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0

IN

1
2
3
4
5

KS86C4104

6
7

(Top View)

8
9
10
11
12

24-SOP

24
23
22
21
20
19
18
17
16
15
14
13

VDD
P0.2
P0.3
P0.4
P0.5
P0.6
P1.0 / ZCD
P1.1 / BUZ
P1.2 / T0(PWM)
P2.0 / INT0
AV

ref

AV

SS

Figure 1-5. Pin Assignment Diagram (24-Pin SOP Package)

1-7

PRODUCT OVERVIEW KS86C4004/P4004/C4104/P4104

PIN DESCRIPTIONS

Table 1-1. KS86C4004/C4104 Pin Descriptions

Pin

Names

P0.0-P0.7 I/O

Pin

Type

Pin

Description

Bit-programmable I/O port for normal input or

Circuit

Type

E-2

Share

Pins

push-pull, open-drain output. Pull-up resistors are
assignable by software.

P1.0-P1.3 I/O Bit-programmable I/O port for Schmitt trigger

input or push-pull output. Pull-up resistors are
assignable by software. Port 1 pins can also be
used as alternative functions.

P2.0-P2.3 I/O Bit-programmable I/O port for Schmitt trigger

input or push-pull, open drain output. Pull up

F
D
D
D

E

E-1

ZCD

BUZ

T0(PWM)

CLO

INT0–INT1

ADC6–ADC7
resistors are assignable by software. Port 2 can
also be used as external interrupt, A/D input.

P3.0-P3.5 I/O Bit-programmable I/O port for Schmitt trigger

F ADC0–ADC5
input or push-pull output. Pull-up resistors are
assignable by software. Port 3 pins can also be
used as A/D converter input.

XIN, X

OUT

–

Crystal/ceramic, or RC oscillator signal for

– –
system clock.

INT0–INT1 I External interrupt input. E P2.0–P2.1

RESET

TEST I Test signal input pin (for factory use only: must be

I System RESET signal input pin. B –

– –
connected to VSS)

V

DD, VSS

AV

REF,

AV

SS

– Voltage input pin and ground – –
– A/D converter reference voltage input and ground – –

ZCD I Zero crossing detector input F P1.0
BUZ O 200 Hz–20 kHz frequency output for buzzer sound D P1.1
T0 I/O Timer 0 capture input or 10-bit PWM output D P1.2
CLO O System clock output port D P1.3
ADC0–ADC7 I A/D converter input F

E-1

P3.0–P3.5
P2.2–P2.3

NOTE: Port 0.7, P1.3, P2.1–P2.3 and P3.5 is not available in KS86C4104/P4104 .

1-8

KS86C4004/P4004/C4104/P4104 PRODUCT OVERVIEW

PIN CIRCUITS

V

DD

V

DD

P-CHANNEL

IN

N-CHANNEL

Figure 1-6. Pin Circuit Type A

V

DD

PULL-UP
RESISTOR

IN

DATA

OUTPUT
DISABLE

RESISTOR

ENABLE

OUTPUT

DISABLE

Figure 1-8. Pin Circuit Type C

V

DD

DATA

CIRCUIT

TYPE C

P-CHANNEL

OUT

N-CHANNEL

PULL-UP
RESISTOR

P-CHANNEL

IN/OUT

Figure 1-7. Pin Circuit Type B

DATA

Figure 1-9. Pin Circuit Type D

1-9

PRODUCT OVERVIEW KS86C4004/P4004/C4104/P4104

PNE

DATA

OUTPUT
DISABLE

INPUT

PNE

V

V

DD

DD

P-CH

N-CH

Figure 1-10. Pin Circuit Type E

V

DD

V

DD

PULL-UP
RESISTOR

PULL-UP
RESISTOR

PULL-UP
ENABLE

IN/OUT

PNE

DATA

OUTPUT
DISABLE

INPUT

V

V

DD

DD

PULL-UP
RESISTOR

P-CH

PULL-UP
ENABLE

N-CH

Figure 1-10. Pin Circuit Type E-2

V

DD

PULL-UP
RESISTOR

IN/OUT

DATA

OUTPUT
DISABLE

DIGITAL INPUT

ANALOG INPUT

Figure 1-11. Pin Circuit Type E-1

1-10

P-CH

N-CH

PULL-UP
ENABLE

IN/OUT

PULL-UP

ENABLE

DATA

OUTPUT

DISABLE

DIGITAL

INPUT

ANALOG

INPUT

V

DD

CIRCUIT

TYPE C

Figure 1-12. Pin Circuit Type F

IN/OUT

KS86C4004/P4004/C4104/P4104 ELECTRICAL DATA

13 ELECTRICAL DATA

OVERVIEW

In this section, the following KS86C4004/C4104 electrical characteristics are presented in tables and graphs:
— Absolute maximum ratings

— D.C. electrical characteristics
— A.C. electrical characteristics
— Oscillator characteristics
— Oscillation stabilization time
— Operating Voltage Range
— Schmitt trigger input characteristics
— Data retention supply voltage in Stop mode
— Stop mode release timing when initiated by a RESET
— A/D converter electrical characteristics
— Zero-crossing detector
— Zero Crossing Waveform Diagram

13-1

ELECTRICAL DATA KS86C4004/P4004/C4104/P4104

Table 13-1. Absolute Maximum Ratings

(TA = 25°C)

Parameter Symbol Conditions Rating Unit

Supply voltage
Input voltage
Output voltage
Output current

V

DD

V

V

O

I

OH

All input ports

I

All output ports
One I/O pin active – 18 mA

– – 0.3 to + 6.5 V

– 0.3 to V

DD

+ 0.3

– 0.3 to VDD + 0.3

V
V

high All I/O pins active – 60
Output current

I

OL

One I/O pin active + 30 mA

low Total pin current for ports 1, 2, 3 + 100

Total pin current for ports 0 + 200

Operating

T

A

– – 40 to + 85

°

C

temperature
Storage

T

STG

– – 65 to + 150

°

C

temperature

Table 13-2. DC Electrical Characteristics

(T

= – 40°C to + 85°C, VDD = 2.7 V to 5.5 V)

A

Parameter Symbol Conditions Min Typ Max Unit

Input high
voltage

Input low
voltage

Output high
voltage

Output low
voltage

V

V
V

V

V
V

V

Ports 1,2,3, and

IH1

RESET

IH2 Port 0

X

IH3

Ports 1,2,3, and

IL1

RESET

IL2 Port 0

X

IL3

IOH = – 1 mA

OH

ports 0, 1, 2, 3

V

OL1IOL

port 0

V

OL2IOL

and X

IN

and X

IN

= 15 mA

= 4 mA

OUT

OUT

VDD= 2.7 to 5.5 V 0.8 V

0.7 V

VDD –0.1

VDD= 2.7 to 5.5 V

VDD= 4.5 to 5.5 V V

DD

VDD= 4.5 to 5.5 V

VDD= 4.5 to 5.5 V

DD

DD

– –

–

V

DD

0.2 V

0.3 V

DD

DD

0.1

– 1.0

– – V

– 0.4 2.0 V

0.4 2.0

port 1,2,3

V

V

13-2

KS86C4004/P4004/C4104/P4104 ELECTRICAL DATA

Table 13-2. DC Electrical Characteristics (Continued)

(T

= – 40°C to + 85°C, VDD = 2.7 V to 5.5 V)

A

Parameter Symbol Conditions Min Typ Max Unit

Input high leakage

I

LIH1

All inputs except I

LIH2VIN

= V

DD

– – 1 µA

current

Input low leakage
current

Output high

I

LIH2

I

LIL1

I

LIL2

I

LOH

X

, X

IN

OUT

All inputs except
I

and RESET

LIL2

XIN, X

OUT

All outputs

VIN = V
V

= 0 V

IN

V

= 0 V

IN

V

OUT

= V

DD

DD

20

– – – 1 µA

– 20

– – 2 µA

leakage current
Output low

I

LOL

All outputs

V

OUT

= 0 V

– – – 2 µA

leakage current
Pull-up resistors

R

V

P

= 0 V

IN

V

DD

= 5 V

30 47 70

kΩ

Ports 0–3

V

Supply current

I

DD1

Run mode

= 3 V

DD

V

= 5 V ± 10%

DD

30 280 350

–

7.5 15 mA

10 MHz CPU clock

I

DD2

8 MHz CPU clock
Idle mode

V

= 3 V ± 10%

DD

VDD = 5 V ± 10%

3 6
2 5

10 MHz CPU clock
8 MHz CPU clock

I

DD3

NOTE: D.C. electrical values for Supply current (I

resisters, output port drive current, ZCD and ADC.

Stop mode

DD1

V

= 3 V ± 10%

DD

V

= 5 V ± 10%

DD

V

= 3 V ± 10%

DD

to I

) do not include current drawn through internal pull-up

DD3

0.7 2.5

0.1 5 µA

13-3

ELECTRICAL DATA KS86C4004/P4004/C4104/P4104

Table 13-3. AC Electrical Characteristics

(T

= –20°C to + 85°C, V

A

= 2.7 V to 5.5 V)

DD

Parameter Symbol Conditions Min Typ Max Unit

t

Interrupt input
high, low width

input
low width
ZCD noise filter

INTH

t

INTL

t

RSL

–

,

Port 2
V

= 5V ± 10%

DD

Input
V

= 5V ± 10%

DD

1

t

CPU

– 200 – ns

– 1 – µs

t

NF1L

t

RSL

NOTE: The unit t

0.2 V

means one CPU clock period.

CPU

0.8 V

DD

DD

t

NF1H

t

NF2

Figure 13-1. Input Timing Measurement Points

13-4

KS86C4004/P4004/C4104/P4104 ELECTRICAL DATA

Table 13-4. Oscillator Characteristics

(TA = – 40°C to + 85°C)

Oscillator Clock Circuit Test Condition Min Typ Max Unit

Main crystal or
ceramic

C1

C2

X

X

IN

OUT

V

= 4.5 to 5.5 V

DD

V

= 2.7 to 4.5 V

DD

1
1

–
–

10

MHz

8

External clock

RC oscillator

V

= 4.5 to 5.5 V

X

X

IN

OUT

DD

V

= 2.7 to 4.5 V

DD

VDD = 4.75 to 5.25 V

X

IN

R

X

OUT

R = 8.2K

1
1

– 4

(P1.3/
CLO)

–
–

10

8

–

Table 13-5. Oscillation Stabilization Time

(TA = – 40°C to + 85°C, VDD = 2.7 V to 5.5 V)

Oscillator Test Condition Min Typ Max Unit

f

Main crystal
Main ceramic

> 1.0 MHz

OSC

Oscillation stabilization occurs when VDD is equal

– – 20 ms
– – 10

to the minimum oscillator voltage range.

External clock

XIN input high and low width (tXH, tXL)

25 – 500 ns

(main system)
Oscillator

stabilization
wait time

NOTES:

1. f

2. The duration of the oscillator stabilization wait time,
in the basic timer control register, BTCON.

is the oscillator frequency.

OSC

t

when released by a reset

WAIT

t

when released by an interrupt

WAIT

(1)

(2)

t

, when it is released by an interrupt is determined by the settings

WAIT

–

216/f

OSC

– – –

– ms

13-5

ELECTRICAL DATA KS86C4004/P4004/C4104/P4104

CPU CLOCK

10 MHz

8 MHz

4 MHz

3 MHz

2 MHz

1 MHz

2 3 4 5 6 71 2.7 5.5

SUPPLY VOLTAGE (V)

Figure 13-2. Operating Voltage Range

V

out

V

DD

A = 0.2 V
B = 0.4 V
C = 0.6 V
D = 0.8 V

V

SS

A B C D

0.3 V

DD

0.7 V

DD

V

in

Figure 13-3. Schmitt Trigger Input Characteristics Diagram

DD
DD

DD
DD

13-6

KS86C4004/P4004/C4104/P4104 ELECTRICAL DATA

Table 13-6. Data Retention Supply Voltage in Stop Mode

(TA = – 40°C to + 85°C, V

= 2.7 V to 5.5V)

DD

Parameter Symbol Conditions Min Typ Max Unit

Data retention

V

DDDR

Stop mode 2.0 – 5.5 V

supply voltage
Data retention

I

DDDR

Stop mode; V

DDDR

= 2.0 V

– 0.1 5 µA

supply current

NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.

V

DD

RESET

EXECUTION OF

STOP

INTERNAL

RESET

∼∼∼

∼

∼∼∼

∼

STOP MODE
DATA RETENTION

MODE

V

DDDR

0.2 V

DD

0.8 V

IDLE MODE
(BASIC TIMER
ACTIVE)

NORMAL
OPERATING
MODE

DD

t

WAIT

NOTE: tWAIT is the same as 4096 x 16 x 1/f

OSC

Figure 13-4. Stop Mode Release Timing When Initiated by a RESET

13-7

ELECTRICAL DATA KS86C4004/P4004/C4104/P4104

Table 13-7. A/D Converter Electrical Characteristics (KS86C4004)

(TA = – 40°C to + 85°C, VDD = 2.7 V to 5.5 V, VSS = 0 V) KS86C4004: 8-bit ADC

Parameter Symbol Test Conditions Min Typ Max Unit

Total accuracy

VDD = 5.12 V

– –

± 2

LSB

Integral linearity
error

Differential
linearity error

Offset error of
top

Offset error of
bottom

Conversion

(1)

time
Analog input

voltage
Analog input

impedance
ADC reference

voltage
ADC reference

ground
Analog input

current

ILE CPU clock = 10 MHz

AV

= 5.12 V

REF

DLE

AVSS = 0 V

EOT – 1

EOB – 1

t

AV

AV

I

CON

V

IAN

R

ADIN

AN

REF

SS

fcpu = 10 MHz 5 – –

–

AV

SS

– 2 – –

– 2.5 –

V

SS

– – 10

AV

REF

–

= VDD = 5 V

conversion time = 5 µs

–

–

± 1.5

± 1

± 2

± 2

µs

–

AV

REF

V

MΩ

V

DD

–

VSS + 0.3

V

V

µA

ADC block
current

(2)

I

ADC

AV

= VDD = 5 V

REF

conversion time = 5 µs
AV

= VDD = 3 V

REF

– 1 3 mA

0.5 1.5

conversion time = 5 µs
AV

= VDD = 5 V

REF

– 100 500 nA

Power down mode

NOTES:

1. “Conversion time” is the time required from the moment a conversion operation starts until it ends.

2. I

13-8

is operating current during A/D conversion.

ADC

KS86C4004/P4004/C4104/P4104 ELECTRICAL DATA

Table 13-8. A/D Converter Electrical Characteristics (KS86C4104)

(TA = – 40°C to + 85°C, VDD = 2.7 V to 5.5 V, VSS = 0 V) KS86C4104: 10-bit ADC

Parameter Symbol Test Conditions Min Typ Max Unit

Resolution – 10 – bit
Total accuracy

VDD = 5.12 V

– –

± 3

LSB

Integral linearity
error

Differential
linearity error

Offset error of
top

Offset error of
bottom

Conversion time

(1)

Analog input
voltage

Analog input
impedance

Analog
reference
voltage

Analog ground
Analog input

current

ILE CPU clock = 10 MHz

AV

= 5.12 V

REF

DLE

AVSS = 0 V

EOT

EOB

AV

AV

I

t

CON

V

R

ADIN

IAN

AN

REF

SS

10-bit conversion
50 x 4/ f

AV

REF

(3)

OSC

= VDD = 5 V

–

– 2 – –

– 2.5 –

–

conversion time = 20 µs

–

–

± 1 ± 3

± 0.5 ± 2

20 – –

AV

V

SS

SS

–

–

VSS + 0.3

– – 10

AV

± 2

± 1

V

REF

DD

µs

V

MΩ

V

V

µA

Analog block
current

(2)

I

ADC

AV

= VDD = 5 V

REF

conversion time = 20 µs
AV

= VDD = 3 V

REF

1 3 mA

0.5 1.5 mA

conversion time = 20 µs
AV

= VDD = 5 V

REF

100 500 nA

when power down mode

NOTES:

1. "Conversion time" is the time required from the moment a conversion operation starts until it ends.

2. I

3. f

is operating current during A/D conversion.

ADC

is the main oscillator clock.

OSC

13-9

ELECTRICAL DATA KS86C4004/P4004/C4104/P4104

Table 13-9. Zero Crossing Detector

(TA = – 40°C to + 85°C, VDD = 4.5 V to 5.5 V, V

SS

= 0 V)

Parameter Symbol Test Conditions Min Typ Max Unit

Zero-crossing
detection input

V

ZC

AC connection

1.0 – 3.0 Vp-p

c = 0.1 µF

voltage
Zero-crossing

detection accuracy

V

AZC

fZC = 60 Hz
(sine wave)

– –

± 150

VDD = 5 V
f

= 10 MHz

OSC

Zero-crossing
detection input

f

ZC

– 40 – 200 Hz

frequency

1/f

ZC

mV

13-10

AC Input

ZCINT

V

AZC

Figure 13-5. Zero Crossing Waveform Diagram

V

AZ(P-P)

KS86C4004/P4004/C4104/P4104 ELECTRICAL DATA

70

V

= 5.5 V

DD

60

V

= 5.0 V

DD

I

OL

(mA)

50

V

DD

= 4.5 V

40

30

20

10

0

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
V

(V)

OL

Figure 13-6. IOL vs. VOL (P0, TA = 25 °°C)

13-11

ELECTRICAL DATA KS86C4004/P4004/C4104/P4104

50

V

= 5.5 V

DD

I

OL

(mA)

40

V

DD

V

DD

= 4.5 V

= 5.0 V

30

20

10

0

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
V

(V)

OL

Figure 13-7. IOL vs. VOL (P1–P3, TA = 25 °°C)

13-12

KS86C4004/P4004/C4104/P4104 ELECTRICAL DATA

36

−

32

−

28

−

24

−

20

−

I

OH

(mA)

16

−

V

= 5.5 V

DD

12

−

V

= 5.0 V

V

DD

DD

= 4.5 V

8

−

4

−

0

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VOH (V)

Figure 13-8. IOH vs. VOH (P0, TA = 25 °°C)

13-13

ELECTRICAL DATA KS86C4004/P4004/C4104/P4104

24

−

20

−

I

OH

(mA)

16

−

12

−

V

= 5.5 V

DD

DD

V

DD

= 4.5 V

= 5.0 V

8

−

4

−

V

0

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VOH (V)

Figure 13-9. IOH vs. VOH (P1–P3, TA = 25 °°C)

13-14

KS86C4004/P4004/C4104/P4104 MECHANICAL DATA

14 MECHANICAL DATA

OVERVIEW

The KS86C4004/C4104 is available in a 30-pin SDIP package (Samsung: 30-SDIP-400) and a 32-pin SOP
package (32-SOP-450A), a 24-pin SDIP package (24-SDIP-300) and a 24-pin SOP package (24-SOP-375).
Package dimensions are shown in Figures 14-1, 14-2, 14-3, and 14-4.

#30 #16

30-SDIP-400

8.94 ± 0.2

#1 #15

27.88 MAX

27.48 ± 0.2

0.56

± 0.1

(1.30)

: Dimensions are in millimeters.

NOTE

1.12 ± 0.1

1.778

10.16

0.51MIN 3.81 ± 0.2

5.08MAX

3.30 ± 0.3

+0.1

0.25

0-15 °

– 0.05

Figure 14-1. 30-Pin SDIP Package Dimensions

14-1

MECHANICAL DATA KS86C4004/P4004/C4104/P4104

#32 #17

32-SOP-450A

12.00 ± 0.3

#1 #16

19.90

± 0.2

(0.43) 0.40 ± 0.1

Dimensions are in millimeters.

NOTE:

1.27

2.00 ± 0.2

0.0MIN

0~8°

± 0.2

8.34

+0.10

0.20

- 0.05

2.40MAX

0.10 MAX

11.43

± 0.2

0.78

14-2

Figure 14-2. 32-SOP-450A Package Dimensions

KS86C4004/P4004/C4104/P4104 MECHANICAL DATA

#24 #13

± 0.2

24-SDIP-300

6.40

#1 #12

23.35 MAX

22.95

± 0.2

0.46

± 0.1

(1.69)

: Dimensions are in millimeters.

NOTE

0.89

± 0.1

1.778

7.62

3.25 ± 0.2

0.51MIN

3.30 ± 0.3 5.08MAX

+0.1

0.25

0-15

– 0.05

°

Figure 14-3. 24-SDIP-300 Package Dimensions

14-3

MECHANICAL DATA KS86C4004/P4004/C4104/P4104

#24 #13

10.30 ± 0.3

#1 #12

(0.69) 0.38

: Dimensions are in millimeters.

NOTE

24-SOP-375

15.74 MAX

15.34

± 0.2

± 0.1

1.27

0.15

± 0.2

2.30

0.05MIN

7.50 ± 0.2

+0.10

- 0.05

2.70MAX

0.10 MAX

0-8°

9.53

0.85±0.20

14-4

Figure 14-4. 24-SOP-375 Package Dimensions

KS86C4004/P4004/C4104/P4104 KS86P4004/P4104 OTP

15 KS86P4004/P4104 OTP

OVERVIEW

The KS86P4004/P4104 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the

KS86C4004/C4104 microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is
accessed by serial data format.

The KS86P4004/P4104 is fully compatible with the KS86C4004/C4104 , both in function and in pin configuration.
Because of its simple programming requirements, the KS86P4004/P4104 is ideal for use as an evaluation chip
for the KS86C4004/C4104 .

VSS/V

SS

X

X

OUT

VPP/TEST

P0.1
P0.0

RESETRESET/

P3.5/ADC5
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0

AV

SS

AV

NOTE: The bolds indicate an OTP pin name.

ref

IN

1
2
3
4
5
6
7

KS86P4004

8
9
10
11
12
13
14
15

30-SDIP

(Top View)

30
29
28
27
26
25
24
23
22
21
20
19
18
17
16

V

DD/VDD

P0.2/SCLK
P0.3/SDAT
P0.4
P0.5
P0.6
P0.7
P1.0/ZCD
P1.1/BUZ
P1.2/T0(PWM)
P1.3/CLO
P2.0/INT0
P2.1/INT1
P2.2/ADC6
P2.3/ADC7

Figure 15-1. Pin Assignment Diagram (30-Pin SDIP Package)

15-1

KS86P4004/P4104 OTP KS86C4004/P4004/C4104/P4104

VSS/V

SS

X

X

OUT

VPP/TEST

P0.1
P0.0

RESETRESET/

NC
P3.5/ADC5
P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0

AV

SS

AV

NOTE: The bolds indicate an OTP pin name.

ref

IN

1
2
3
4
5

KS86P4004

6
7
8
9
10
11
12
13
14
15
16

32-SOP

(Top View)

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

V

DD/VDD

P0.2/SCLK
P0.3/SDAT
P0.4
P0.5
P0.6
P0.7
NC
P1.0/ZCD
P1.1/BUZ
P1.2/T0(PWM)
P1.3/CLO
P2.0/INT0
P2.1/INT1
P2.2/ADC6
P2.3/ADC7

Figure 15-2. Pin Assignment Diagram (32-Pin SOP Package)

15-2

KS86C4004/P4004/C4104/P4104 KS86P4004/P4104 OTP

VSS/V

SS

X

X

OUT

VPP/TEST

P0.1
P0.0

RESETRESET/

P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0

NOTE: The bolds indicate an OTP pin name.

IN

1
2
3
4
5

KS86P4104

6
7
8
9
10
11
12

24-SDIP

(Top View)

24
23
22
21
20
19
18
17
16
15
14
13

V

DD/VDD

P0.2/SCLK
P0.3/SDAT
P0.4
P0.5
P0.6
P1.0/ZCD
P1.1/BUZ
P1.2/T0(PWM)
P2.0/INT0
AV

ref

AV

SS

Figure 15-3. Pin Assignment Diagram (24-Pin SDIP Package)

15-3

KS86P4004/P4104 OTP KS86C4004/P4004/C4104/P4104

VSS/V

SS

X

X

OUT

VPP/TEST

P0.1

P0.0

RESETRESET/

P3.4/ADC4
P3.3/ADC3
P3.2/ADC2
P3.1/ADC1
P3.0/ADC0

NOTE: The bolds indicate an OTP pin name.

IN

1
2
3
4
5

KS86P4104

6
7

(Top View)

8
9
10
11
12

24-SOP

24
23
22
21
20
19
18
17
16
15
14
13

V

DD/VDD

P0.2/SCLK
P0.3/SDAT
P0.4
P0.5
P0.6
P1.0/ZCD
P1.1/BUZ
P1.2/T0(PWM)
P2.0/INT0
AV

ref

AV

SS

Figure 15-4. Pin Assignment Diagram (24-Pin SOP Package)

15-4

KS86C4004/P4004/C4104/P4104 KS86P4004/P4104 OTP

Table 15-1. Descriptions of Pins Used to Read/Write the EPROM

Main Chip During Programming

Pin Name Pin Name Pin No. I/O Function

P0.3 SDAT KS86P4004: 28 (30)

KS86P4104: 22 (22)

I/O Serial data pin (output when reading, Input

when writing) Input and push-pull output
port can be assigned

P0.2 SCLK KS86P4004: 29 (31)

I/O Serial clock pin (input only pin)

KS86P4104: 23 (23)

V

TEST

RESET RESET

VDD/V

SS

(TEST)

PP

VDD/V

KS86P4004: 30 (32) / 1

SS

4 I

Power supply pin for EPROM cell writing (indicates
that OTP enters into the writing mode). When 12.5
V is applied, OTP is in writing mode and when 5 V
is applied, OTP is in reading mode. (Option)

7 I Chip Initialization

I Logic power supply pin.

KS86P4104: 24 (24) / 1

NOTE: ( ) means the SOP OTP pin number.

Table 15-2. Comparison of KS86P4004/P4104 and KS86C4004/C4104 Features

Characteristic KS86P4004/P4104 KS86C4004/C4104

Program Memory 4-Kbyte EPROM 4-Kbyte mask ROM
Operating Voltage (VDD)

OTP Programming Mode

VDD = 5 V, V

2.7 V to 5.5 V 2.7 V to 5.5 V
(TEST) = 12.5 V

PP

Pin Configuration 30 SDIP/32 SOP/24 SDIP/24 SOP
EPROM Programmability User Program 1 time Programmed at the factory

OPERATING MODE CHARACTERISTICS

When 12.5 V is supplied to the V

(TEST) pin of the KS86P4004/P4104, the EPROM programming mode is

PP
entered. The operating mode (read, write, or read protection) is selected according to the input signals to the pins
listed in Table 15-3 below.

Table 15-3. Operating Mode Selection Criteria

V

DD

VPP

(TEST)

REG/MEM

ADDRESS

(A15-A0)

R/W MODE

5 V 5 V 0 0000H 1 EPROM read

12.5 V 0 0000H 0 EPROM program

12.5 V 0 0000H 1 EPROM verify

12.5 V 1 0E3FH 0 EPROM read protection

NOTE: "0" means Low level; "1" means High level.

15-5

KS86P4004/P4104 OTP KS86C4004/P4004/C4104/P4104

NOTES

15-6