The KS57C2916 single-chip CMOS microcontroller has been designed for high performance using Samsung's
newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers).
With an up-to-704-dot LCD direct drive capability, and flexible 8-bit timer/counter, the KS57C2916 offers an
excellent design solution for a mid-end LCD game.
Up to 8 pins of the 80-pin QFP package can be dedicated to I/O. Six vectored interrupts provide fast response to
internal and external events. In addition, the KS57C2916's advanced CMOS technology provides for low power
consumption.
OTP
The KS57C2916 microcontroller is also available in OTP (One Time Programmable) version, KS57P2916.
KS57P2916 microcontroller has an on-chip 16K-byte one-time-programable EPROM instead of masked ROM.
The KS57P2916 is comparable to KS57C2916, both in function and in pin configuration.
1-1
Page 2
PRODUCT OVERVIEW KS57C2916/P2916 MICROCONTROLLER
FEATURES
Memory
•256 × 4-bit RAM (excluding LCD display RAM)
•16,384 × 8-bit ROM
8 I/O Pins
•I/O: 8 pins
LCD Controller/Driver
•44 segments and 16 common terminals
(8, 12 and 16 common selectable)
•Internal resistor circuit for LCD bias
•Voltage doubler
•All dot can be switched on/off
8-bit Basic Timer
•4 interval timer functions
•Watch-dog timer
8-bit Timer/Counter
•Programmable 8-bit timer
•Arbitrary clock output (TCLO0)
•Inverted clock output (TCLO0)
Memory-Mapped I/O Structure
•Data memory bank 15
Power-Down Modes
•Idle mode (only CPU clock stops)
•Stop mode (main system oscillation stops)
•Sub system clock stop mode
Oscillation Sources
•Crystal, ceramic, or RC for main system clock
•Crystal oscillator for subsystem clock
•Main system clock frequency: 4.19 MHz
(typical)
•Subsystem clock frequency: 32.768 kHz
•CPU clock divider circuit (by 4, 8, or 64)
Instruction Execution Times
•0.95, 1.91, 15.3 µs at 4.19 MHz (main)
•122 µs at 32.768 kHz (subsystem)
Operating Temperature
•– 40 °C to 85 °C
Watch Timer
•Time interval generation: 0.5 s, 3.9 ms
at 32768 Hz
1-bit and 4-bit read/write and test are possible.
Individual pins are software configurable as input or
output.
Individual pins are software configurable as open-
DescriptionCircuit
Type
E-111
NumberShare Pin
TCLO0/K0
10
9
8
TCLO0/K1
CLO/BUZ/K2
BUZ/K3
drain or push-pull output.
Individual pull-up resistors are software assignable;
pull-up resistors are automatically disabled for
output pins.
P1.0
P1.1
P1.2
P1.3
INT0, INT1I/OExternal interrupts. The triggering edge for INT0
I/OSame as port 0.E-17
7, 6P1.0, P1.1
INT0
6
5
4
INT1
INT2
INT4
and INT1 is selectable.
INT2I/OQuasi-interrupt with detection of rising or falling
5P1.2
edges
INT4I/OExternal interrupt with detection of rising or falling
4P1.3
edges.
BUZI/O2 kHz, 4 kHz, 8 kHz or 16 kHz frequency output for
8P0.3/K3
buzzer sound.
BUZ
I/OInverted BUZ signal9P0.2/CLO/K2
CLOI/OClock output9P0.2/BUZ/K2
TCLO0
I/OInverted Timer/counter 0 clock output10P0.1/K1
TCLO0I/OTimer/counter 0 clock output11P0.0/K0
COM0–COM15OLCD common signal outputH-639–24–
SEG0–SEG43OLCD segment signal outputH-640–80,
1–3
–
1-5
Page 6
PRODUCT OVERVIEW KS57C2916/P2916 MICROCONTROLLER
Table 1-1. KS57C2916 Pin Descriptions (Continued)
Pin NamePin
Type
DescriptionCircuit
Type
Number Share Pin
K0–K3I/OExternal interrupt (triggering edge is selectable)E-111–8P0.0–P0.3
V
DD
V
SS
RESET
–Power supply–12–
–Ground–13–
IReset input (active low)B19–
CA, CB–Capacitor terminal for voltage doubling–20, 21–
VCL0–LCD power supply input–22–
BIASODoubling voltage level output–23–
X
in, Xout
–Crystal, ceramic or RC oscillator pins for system
–15, 14–
clock
XT
in, XTout
TESTI
NOTE: Pull-up resistors for all I/O ports are automatically disabled if they are configured to output mode.
–Crystal oscillator pins for subsystem clock–17, 18–
Test input (must be connected to VSS)
–16–
1-6
Page 7
KS57C2916/P2916 MICROCONTROLLERPRODUCT OVERVIEW
PIN CIRCUIT DIAGRAMS
V
VDD
PNE
VDD
DD
PULL-UP
RESISTOR
P-CHANNEL
IN
N-CHANNEL
Figure 1-3. Pin Circuit Type A
V
DD
DATA
OUTPUT
DISABLE
V
LC0
V
LC1
P-CH
N-CH
SCHMITT TRIGGER
RESISTOR
ENABLE
Figure 1-5. Pin Circuit Type E-1
I/O
PULL-UP
RESISTOR
IN
SCHMITT TRIGGER
Figure 1-4. Pin Circuit Type B
V
LC2
SEG/COM DATA
V
LC3
V
LC4
V
SS
Figure 1-6. Pin Circuit Type H-6
OUT
1-7
Page 8
PRODUCT OVERVIEWKS57C2916/P2916 MICROCONTROLLER
NOTES
1-8
Page 9
KS57C2916/P2916 MICROCONTROLLERELECTRICAL DATA
13ELECTRICAL DATA
OVERVIEW
In this section, information on KS57C2916 electrical characteristics is presented as tables and graphics.
The information is arranged in the following order:
Standard Electrical Characteristics
— Absolute maximum ratings
— D.C. electrical characteristics
— Main system clock oscillator characteristics
— Subsystem clock oscillator characteristics
— I/O capacitance
— A.C. electrical characteristics
— Operating voltage range
Miscellaneous Timing Waveforms
— A.C timing measurement point
— Clock timing measurement at X
— Clock timing measurement at XT
— TCL timing
— Input timing for RESET
— Input timing for external interrupts
— Serial data transfer timing
Stop Mode Characteristics and Timing Waveforms
— RAM data retention supply voltage in stop mode
— Stop mode release timing when initiated by RESET
— Stop mode release timing when initiated by an interrupt request
in
in
13-1
Page 10
ELECTRICAL DATAKS57C2916/P2916 MICROCONTROLLER
Table 13-1. Absolute Maximum Ratings
(TA = 25 °C)
ParameterSymbolConditionsRatingUnits
Supply Voltage
Input Voltage
Output Voltage
Output Current High
V
V
I
DD
V
O
OH
–– 0.3 to + 4.5V
Ports 0, 1– 0.3 to VDD + 0.3V
I
–– 0.3 to VDD + 0.3V
One I/O pin active– 15mA
All I/O pins active– 30
Output Current Low
I
OL
One I/O pin active+ 30 (Peak value)mA
(note)
+ 15
Total for pins 0, 1+ 100 (Peak value)
(note)
+ 60
Operating Temperature
Storage Temperature
T
A
T
stg
–– 40 to + 85
–– 65 to + 150
°
C
°
C
NOTE: The values for Output Current Low ( IOL ) are calculated as Peak Value × Duty .
1.Current in the following circuits are not included; on-chip pull-up resistors, internal LCD voltage dividing resistors,
voltage doubler, and output port drive currents.
2.Data includes power consumption for subsystem clock oscillation.
3.When the system clock control register, SCMOD, is set to 1001B, main system clock oscillation stops and the
subsystem clock is used.
13-4
Page 13
KS57C2916/P2916 MICROCONTROLLERELECTRICAL DATA
Table 13-3. Main System Clock Oscillator Characteristics
(TA = – 40 °C to + 85 °C, VDD = 2.2 V to 3.4 V)
OscillatorClock
Configuration
Ceramic
XinXout
Oscillator
C1C2
Crystal
XinXout
Oscillator
C1C2
External
XinXout
Clock
ParameterTest ConditionMinTypMaxUnits
Oscillation frequency
(1)
Stabilization time
(2)
Stabilization occurs
–0.4–4.19MHz
––4ms
when VDD is equal to
the minimum
oscillator voltage
range; VDD = 3.0 V
Oscillation frequency
(1)
Stabilization time
(2)
Xin input frequency
VDD = 3.0 V
(1)
–0.4–4.19MHz
––10ms
–0.4–4.19MHz
Xin input high and low
–83.3–1250ns
level width (tXH, tXL)
RC
XinXout
Frequency
VDD = 3 V
0.4–1.5MHz
Oscillator
R
NOTES:
1.Oscillation frequency and X
2.Stabilization time is the interval required for oscillator stabilization after a power-on occurs, or when stop mode is
terminated.
input frequency data are for oscillator characteristics only.
2.Stabilization time is the interval required for oscillating stabilization after a power-on occurs.
input frequency data are for oscillator characteristics only.
in
XTL
, t
XTH
)
–5–15µs
13-6
Page 15
KS57C2916/P2916 MICROCONTROLLERELECTRICAL DATA
Table 13-6. Input/Output Capacitance
(TA = 25 °C, V
DD
=0 V )
ParameterSymbolConditionMinTypMaxUnits
C
C
IN
OUT
f = 1 MHz; Unmeasured pins
are returned to V
SS
––15pF
––15pF
Input
Capacitance
Output
Capacitance
I/O Capacitance
C
IO
––15pF
Table 13-7. Voltage Doubler Output
(TA = -40 °C to + 85 °C, V
=2.2 V to 3.4 V)
DD
ParameterSymbolConditionMinTypMaxUnits
Voltage Doubler
Vbias
= 2.2 V to 3.4 V
DD
–
2 V
DD
–V
V
Output
Table 13-8. A.C. Electrical Characteristics
(TA = – 40 °C to + 85 °C, V
= 2.2 V to 3.4 V)
DD
ParameterSymbolConditionsMinTypMaxUnits
Instruction Cycle
(note)
Time
t
CY
V
= 2.2 V to 3.4 V
DD
0.95–64µs
With subsystem clock (fxt)114122125
Interrupt Input
High, Low Width
RESET Input Low
f
INTH,
f
INTL
t
RSL
INT0–INT2, INT4
10––
K0–K3
Input10––
Width
NOTE: Unless otherwise specified, Instruction Cycle Time condition values assume a main system clock ( fx ) source.
13-7
Page 16
ELECTRICAL DATAKS57C2916/P2916 MICROCONTROLLER
CPU CLOCK
1.05 MHz4.2 MHz
15.6 kHz
1234567
2.2V
SUPPLY VOLTAGE (V)
CPU CLOCK = 1/n x oscillator frequency (n = 4, 8, 64)
Main OSC frequency (Divided by 4)
Figure 13-1. Standard Operating Voltage Range
Table 13-9. RAM Data Retention Supply Voltage in Stop Mode
(TA = – 40 °C to + 85 °C)
ParameterSymbolConditionsMinTypMaxUnit
Data retention supply voltage
Data retention supply current
Release signal set time
Oscillator stabilization wait
(1)
time
NOTES:
1.During oscillator stabilization wait time, all CPU operations must be stopped to avoid instability during oscillator
start-up.
2.Use the basic timer mode register (BMOD) interval timer to delay execution of CPU instructions during the wait time.
V
DDDR
I
DDDR
t
SREL
t
WAIT
–2.2–3.4V
V
DDDR
= 2.2 V
–0––µs
Released by RESET–
Released by interrupt–
–0.110µA
17
2
/ fx
(2)
–ms
–
13-8
Page 17
KS57C2916/P2916 MICROCONTROLLERELECTRICAL DATA
TIMING WAVEFORMS
V
RESET
DD
INTERNAL
OPERATION
~
~
~
~
EXECUTION OF
STOP INSTRUCTION
STOP MODE
DATA RETENTION MODE
V
DDDR
t
SREL
Figure 13-2. Stop Mode Release Timing When Initiated by RESET
IDLE MODE
~
~
STOP MODE
RESET
IDLE MODE
t
WAIT
NORMAL MODE
NORMAL MODE
~
V
DD
EXECUTION OF
STOP INSTRUCTION
POWER-DOWN MODE TERMINATING SIGNAL
(INTERRUPT REQUEST)
~
DATA RETENTION MODE
Figure 13-3. Stop Mode Release Timing When Initiated by Interrupt Request
V
DDDR
t
SREL
t
WAIT
13-9
Page 18
ELECTRICAL DATAKS57C2916/P2916 MICROCONTROLLER
0.8 V
0.2 V
DD
DD
MEASUREMENT
POINTS
0.8 V
0.2 V
DD
DD
Figure 13-4. A.C. Timing Measurement Points (Except for Xin and XTin)
1 / f
x
t
XL
X
in
t
XH
VDD -0.5 V
0.4 V
XT
Figure 13-5. Clock Timing Measurement at X
1 / f
xt
t
XTL
in
t
XTH
Figure 13-6. Clock Timing Measurement at XT
in
VDD - 0.5 V
0.4 V
in
13-10
Page 19
KS57C2916/P2916 MICROCONTROLLERELECTRICAL DATA
t
RSL
RESET
0.2 V
DD
Figure 13-7. Input Timing for RESET Signal
INT0, 1, 2, 4, K0 to K3
t
INTL
0.8 V
0.2 V
DD
DD
t
INTH
Figure 13-8. Input Timing for External Interrupts
13-11
Page 20
ELECTRICAL DATAKS57C2916/P2916 MICROCONTROLLER
NOTES
13-12
Page 21
KS57C2916/P2916 MICROCONTROLLERELECTRICAL DATA
CHARACTERISTIC CURVES
NOTE
The characteristic values shown in the following graphs are based on actual test measurements.
They do not, however, represent guaranteed operating values.
(TA = 25 °C, fx = 4.2 MHz)
5.0
4.5
I
, CPU Clock = fx/4
4.0
3.5
3.0
(mA)
DD1
DD2
, I
DD1
I
2.5
2.0
1.5
1.0
0.5
I
, CPU Clock = fx/64
DD1
I
DD2
0
2.74.04.56.0
VDD (V)
Figure 13-11. I
DD1
, I
DD2
VS. V
DD
13-13
Page 22
ELECTRICAL DATAKS57C2916/P2916 MICROCONTROLLER
(TA = 25 °C, fx = 32.768 kHz)
50
45
40
35
30
(µA)
25
DD3, 4, 5
20
I
15
10
5
0
2.0
2.5
3.03.54.0
Figure 13-12. I
DD3
VDD (V)
, I
DD4
I
DD3
I
DD4
I
DD5
4.55.05.56.06.5
, I
VS. V
DD5
DD
13-14
Page 23
KS57C2916/P2916 MICROCONTROLLERELECTRICAL DATA
(TA = 25 °C, CPU CLOCK = fx/4)
4.5
4.0
3.5
VDD = 6.0 V
3.0
2.5
(mA)
1
DD
2.0
I
1.5
1.0
0.5
0
0.5
1.01. 52.0
2.53.03.54. 04.5
VDD = 4.5 V
Main System Clock Frequency (MHz)
Figure 13-13. I
VS. Main System Clock Frequency
DD1
(TA = 25 °C)
1.6
1.4
VDD = 6.0 V
1.2
1.0
(mA)
2
0.8
DD
I
0.6
0.4
0.2
0
0.5
1.01.52.0
2.53. 03.54.04.5
VDD = 4.5 V
Mai n System Clock Frequency (MHz)
Figure 13-13. I
VS. Main System Clock Frequency
DD2
13-15
Page 24
ELECTRICAL DATAKS57C2916/P2916 MICROCONTROLLER
(TA = 25 °C, Ports 0, 2, 3, 4, 5, 6, 7)
–25.0
–22.5
–20.0
–17.5
–15.0
(mA)
–12.5
OH
I
–10.0
–7.5
–5.0
–2.5
VDD = 4.5 V
0
0.5
1.01.52.0
2.53.03.54.04.55.0
VDD = 6.0 V
5.56.0
VOH (V)
Figure 13–15. IOH VS. VOH (P0, 2, 3, 4, 5, 6, 7)
13-16
Page 25
KS57C2916/P2916 MICROCONTROLLERELECTRICAL DATA
(TA = 25 °C, Ports 8, 9)
–25.0
–22.5
–20.0
–17.5
–15.0
(mA)
–12.5
OH
I
–10.0
–7.5
–5.0
–2.5
VDD = 4.5 V
0
0.5
1.01.52.0
2.53.03.54.04.55.0
VDD = 6.0 V
5.56.0
VOH (V)
Figure 13–16. IOH VS. VOH (P8, 9)
13-17
Page 26
ELECTRICAL DATAKS57C2916/P2916 MICROCONTROLLER
(TA = 25 °C, Ports 0, 2, 3, 4, 5, 6, 7)
55.0
50.0
45.0
40.0
VDD = 6.0 V
35.0
(mA)
30.0
OL
I
25.0
20.0
15.0
10.0
5.0
VDD = 4.5 V
0
0.5
1.01.52.0
2.53.03.54.04.55.0
5.56.0
VOL (V)
Figure 13–17. IOL VS. VOL (P0, 2, 3, 4, 5, 6, 7)
13-18
Page 27
KS57C2916/P2916 MICROCONTROLLERELECTRICAL DATA
(TA = 25 °C, Ports 8, 9)
55.0
50.0
45.0
40.0
VDD = 6.0 V
35.0
(mA)
30.0
OL
I
25.0
20.0
15.0
10.0
5.0
VDD = 4.5 V
0
0.5
1.01.52.0
2.53.03.54.04.55.0
5.56.0
VOL (V)
Figure 13–18. IOL VS. VOL (P8, 9)
13-19
Page 28
ELECTRICAL DATAKS57C2916/P2916 MICROCONTROLLER
NOTES
13-20
Page 29
KS57C2916/P2916 MICROCONTROLLERMECHANICAL DATA
14MECHANICAL DATA
OVERVIEW
This section contains the following information about the device package:
— Package dimensions in millimetersD
— Pad diagram
— Pad/pin coordinate data table
14-1
Page 30
MECHANICAL DATAKS57C2916/P2916 MICROCONTROLLER
NOTES
14-2
Page 31
KS57C2916/P2916 MICROCONTROLLERMECHANICAL DATA
14.00 TYP
20.00 TYP
100 QFP
(Top View)
0.65 TYP0.30 ± 0.1
A
C
D
B
+ 0.1
0.15
– 0.05
E
Package
100-QFP-1420A
100-QFP-1420C
NOTE
Item
: Typical dimensions are in millimeters.
A
25.00 ± 0.3
23.20 ± 0.3
Figure 14-1. 100-QFP Package Dimensions
BCDE
19.00 ± 0.3
17.20 ± 0.3
2.45 MAX
3.00 MAX
+ 0.1
0.15
– 0.05
0.15 ± 0.1
1.20 ± 0.2
0.80 ± 0.2
14-3
Page 32
KS57C2916/P2916 MICROCONTROLLERKS57P2916 OTP
15KS57P2916 OTP
OVERVIEW
The KS57P2916 single-chip CMOS microcontroller is the OTP (One Time Programmable)version of the
KS57C2916 microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is accessed by
serial data format.
The KS57P2916 is fully compatible with the KS57C2916, both in function and in pin configuration. Because of its
simple programming requirements, the KS57P2916 is ideal for use as an evaluation chip for the KS57C2916.
Table 15-1. Descriptions of Pins Used to Read/Write the EPROM
Main ChipDuring Programming
Pin NamePin NamePin No.I/OFunction
P0.1SDAT10I/OSerial data pin. Output port when reading and
input port when writing. Can be assigned as a
Input/push-pull output port.
P0.0SCLK11I/OSerial clock pin. Input only pin.
TEST
VPP(TEST)
16IPower supply pin for EPROM cell writing
(indicates that OTP enters into the writing
mode). When 12.5 V is applied, OTP is in
writing mode and when 5 V is applied, OTP is in
reading mode. (Option)
RESETRESET
VDD/V
SS
VDD/V
SS
19IChip initialization
12/13ILogic power supply pin. VDD should be tied to
+5 V during programming.
Table 15-2. Comparison of KS57P2916 and KS57C2916 Features
CharacteristicKS57P2916KS57C2916
Program Memory16 Kbyte EPROM16 Kbyte mask ROM
Operating Voltage (VDD)
OTP Programming Mode
2.2 V to 3.4 V2.2 V to 3.4 V
VDD = 5 V, VPP(TEST)=12.5V
Pin Configuration80 QFP80 QFP
EPROM ProgrammabilityUser Program 1 timeProgrammed at the factory
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the VPP(TEST) pin of the KS57P2916, the EPROM programming mode is entered.
The operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in
1.Data includes power consumption for subsystem clock oscillation.
2.When the system clock control register, SCMOD, is set to 1001B, main system clock oscillation stops and the
subsystem clock is used.
3.Current in the following circuits are not included; on-chip pull-up resistors, internal LCD voltage dividing resistors,
voltage doubler, and output port drive currents.
CPU CLOCK
1.05 MHz4.2 MHz
15.6 kHz
1234567
2.2V
SUPPLY VOLTAGE (V)
CPU CLOCK = 1/n x oscillator frequency (n = 4, 8, 64)
Main OSC frequency (Divided by 4)
Figure 15-2. Standard Operating Voltage Range
15-4
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