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however, for possible errors or omissions, or for any consequences resultin
from the use of the information contained herein.
reserves the right to make changes in its products or product
Samsun
specifications with the intent to improve function or desi
without notice and is not required to update this documentation to reflect such
es.
chan
This publication does not convey to a purchaser of semiconductor devices
described herein any license under the patent ri
makes no warranty, representation, or guarantee regarding the
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suitability of its products for any particular purpose, nor does Samsun
assume any liability arising out of the application or use of any product or
circuit and specifically disclaims any liability, includin
consequence or incidental dama
*Typical* parameters can and do vary in different applications. All operatin
parameters, inc luding *Typicals,* must be validated for each customer
application by the customer*s technical experts.
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hts of Samsung or others.
without limitation any
ical implant into the body, for other
product for any such
OUTLINE OF PRODUCT -------------
•
FUNCTIONS -----------------------------
•
FEATURES -------------------------------
•
OPTION CODE --------------------------
•
ORDERING INFORMATION ---------
•
BLOCK DIAGRAM ---------------------
•
PIN CONFIGURATION ----------------
•
ABSOLUTE MAXIMUM RATING --
•
ELECTRICAL CHARACTERISTICS -
•
TIMING DIAGRAM ----------------------
•
MEMORY STRUCTURE ------- --------
•
SCREEN STRUCTURE ---------------
•
BLANK MODE --------------------------
•
SCROLL/HALF-TONE FUNCTION -
•
BOX DRAWING FUNCTION ---------
•
APPLICATION CIRCUIT --------------
•
PACKAGE DIMENSIONS ------------
•
3
3
3
3
3
4
4
6
7
8
9
15
15
16
17
18
20
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KS5520-XX ON SCREEN DISPLAY PROCESSOR
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1. OUTLINE OF PRODUCT
The KS5520 is a single chip VLSI device which performs
the on screen displa
video composite si
It can choose total 256 characters and displa
360 characters in a screen.
It can also select various built-in functions such as
character color select, inverse, etc. These functions are
compatible with all video s
SECAM.
function with sync seperation of
nal and AFC is proposed.
up to
stems including NTSC, PAL,
24 - SDIP - 300
24 - SOP - 375
2. FUNCTIONS
• On screen displa
• Sync separator and sync detector
• AFC
3. FEATURES
á
• Screen structure : 360 ( 30 columns
• Character structure : 12 á 18 dots
• Character types : 256 kinds of color characters
• Display position : 62 horizontal position
64 vertical position
• Character size : 4 á 4 times of normal in both vertical and horizontal directions
• Blinking : controllable in character unit, blinking time also controllable
• Blanking : controllable in line units, blanking mode change possible
Blank color fill possible in character units (8 colors)
• Background coloring : 8 colors
• Character coloring : coloring of characters possible in blank mode
• Inverse character display : controllable in character units
• Synchronous ways : automatic selection of internal or external synchronization via MICOM control
Serial clock input. When CSB pin is low, then 16-bit serial
data is inputted b
controlling micom. Built-in pull-up resistor.
Auto clear pin. If low, then all circuit is reset.
Built-in pull-up resistor.
4
OSCIN
I
LC oscillation pin. Standard fre
uency is 9MHz &
the horizontal start position and the horizontal size are controlled
5
6
OSCOUT
CSB
O
the clock of oscillation block.
b
I
While pin 6 is low, serial data input is active.
Built - in pull-up resistor
7
8
9
SIN
LPF
CLAMPIN
I
I
I
Serial data input pin. Built-in pull-up resistor
LPF
ets rid of the color signal in a video input signal.
Clamp input pin of composite video si
nal of 2Vpp
10
11
12
13
14
15
16
17
18
19
AGND
PD OUT
VCO IN
C NOD1
C NOD2
R CNTR
AVDD
CVIN
SCCR
CVOUT
-
O
Analo
Phase detect output of analo
round
PLL. Loop filter is formed by PD
OUT and VCO IN.
I
O
O
O
-
I
I
O
VCO input pin of PLL
Capacitor node 1 of PLL VCO
Capacitor node 2 of PLL VCO
Resistor node of PLL VCO
5V Analo
V
DD
Composite video input pin
When SECAM mode, color si
Composite video output pin
nal is mixed in the character level.
VID-97-D001
98-05-14
5
Page 6
KS5520-XX ON SCREEN DISPLAY PROCESSOR
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6.2 PIN DESCRIPTION
Continued
Pin No. SymbolI/OFunction
20
21
22
23
24
SYD
XTIN
XTOUT
CSYNC
DVDD
O
I
O
O
-
H-sync detect output pin. If sync exists, then high if not, low
X-tal input / output pin
NTSC : 14.31818 MHz, PAL : 17.734475MHz
When external, C-s
then internal C-s
DD
5V Di
ital V
nc separator output is out, when internal,
nc is outputted.
7. ABSOLUTE MAXIMUM RATINGS
CharacteristicsSymbolValueUnit
Suppl
Voltage
Input Voltage
Power Dissipation
Operating Temperature
Storage Temperature
DD
V
IN
V
D
P
Topr
Tst
Ta = 25
SS
V
3.0 ~ 7.0
þ
- 0.3
- 20 ~ + 70
- 40 ~ + 125
V
IN
200
þ
V
DD
+ 0.3
V
V
mW
VID-97-D001
98-05-14
6
Page 7
KS5520-XX ON SCREEN DISPLAY PROCESSOR
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8. ELECTRICAL CHARACTERISTICS
CharacteristicsSymbolUnit
DD
Operatin
Operatin
Input Hi
Input Low Volta
Output Hi
Voltage
Current
h Voltage
e
h Voltage (2
m
drive)
Output Low Voltage (2m drive)
Pin8 LPF Voltage
Pin9 Clamp Voltage
Pin15 R_CNTR Voltage
Pin17 Clamp Voltage
Buffer Gain
LC Oscillation Frequency
Hsync Duty
V
Icc
IH
V
IL
V
OH
V
OL
V
Vp8
Vp9
Vp15
Vp17
Vp19G
Fosc
Fh_duty
Ta = 25, AV
DD
= DV
MinTypMax
4.75
20
0.8V
0.7V
2.15
1.25
2.35
0.60
1.80
8.0
250
DD
-
DD
-
5.00
40
-
-
-
-
2.35
1.45
2.50
0.80
2.00
9.0
550
DD
= 5V
5.25
0.2V
0.3V
2.55
1.65
2.65
1.00
2.20
10.0
850
60
V
mA
-
DD
-
DD
V
V
V
V
V
V
V
V
V
MHz
nS
Hsync Frequency
X-tal Oscillation Frequency
Sync Separation Voltage
Blueback Sync Tip Level
Blueback Pedestal Level
Blueback Color Burst Level High
Blueback Color Burst Level Low
Blueback Color Level High
Blueback Color Level Low
Blueback Blank Level High
Blueback Blank Level Low
Blueback Character Level High
Blank Color Off Level
Box White Level
Box Black Level
H_fre
Fp22
Vse
Vbst
Vbpd
Vcbh
Vcbl
Vbch
Vbcl
Vblkh
Vblk1
Vchh
Vbcof
Vbwl
Vbbl
15.5
14.1
0.10
0.50
1.10
1.40
0.80
2.30
1.30
1.40
1.10
2.40
1.10
2.20
1.10
15.7
14.3
0.25
0.80
1.40
1.70
1.10
2.60
1.60
1.70
1.40
2.70
1.40
2.50
1.40
15.9
14.5
0.40
1.10
1.70
2.00
1.40
2.90
1.90
2.00
1.70
3.00
1.70
2.80
1.70
KHz
MHz
V
V
V
V
V
V
V
V
V
V
V
V
V
HalfTone Level
VCO Input Voltage
AFC Freerun Frequency
AFC Lock Range High
AFC Lock Range Low
Note 1 : Specifications are subj ect to change without notice.
Vhalf
Vvco
Ffr
Falh
Fall
VID-97-D001
98-05-14
1.80
2.30
15.5
200
-
2.10
2.50
15.7
300
-
2.40
2.70
15.9
400
-500
V
V
KHz
Hz
Hz
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Page 8
KS5520-XX ON SCREEN DISPLAY PROCESSOR
9. TIMING DIAGRAM
SCK
CSB
SIN
CSB
SCK
SIN
Address
(16Bits)
Tword
Tsetcsb
Twsck
Tsetsin
Data N (16Bits)
Twtw
Twsck
Tholdsin
Data N+1
(16Bits)
Twcsb
Tholdcsb
ITEM
SCK Width
CSB Width
CSB Setup Time
CSB Hold Tim e
SIN Setup Time
SIN Hold Time
1 Word Write Time
Word To Word Time
SYMBOL
Twsck
Twcsb
Tsetcsb
Tholdcsb
Tsetsin
Tholdsin
Tword
Twtw
VID-97-D001
98-05-14
MIN
200
1
200
2
200
200
10
1
LIMITS
TYP
-
-
-
-
-
-
-
-
MAX
-
-
-
-
-
-
-
-
UNIT
nsec
usec
nsec
usec
nsec
nsec
usec
usec
8
Page 9
KS5520-XX ON SCREEN DISPLAY PROCESSOR
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10. MEMORY STRUCTURE
It consists of 360*16 bits SRAM, 256 font ROM and 5 mode control register.
0
1
2
3
.
.
.
.
.
.
357
358
359
360
361
362
363
364
DAF
Box_
Inv
*
(Note)
Box_
Inv
0
0
0
0
0
DAE
Box
1
* (No
Box
1
0
Blank_
Ext_
fsc
RAM_
Erase
0
Fll2
DAD
Box
0
te)
Box
0
Half_
Tone
Level
Disp_
On
0
Fll1
DAC
R
R
Blink
1
Scroll_
Time
P626/
P628
All_
Blank
Fll0
DAB
G
* (Note)
G
Blink
0
Scroll_
On
Inlace
/Non-
DSP
B
Flh3
DAA
B
B
Blink_
Time
Inter
-nal
Secam
DSP
A
Flh2
DA9
Invert
*
(Note)
Invert
HZ
21
VZ
21
NTSC/
PAL
DSP
9
Flh1
DA8
Blink
*
(Note)
Blink
HZ
20
VZ
20
Blk
1
DSP
8
Flh0
DA7
C7
C7
HZ
11
VZ
11
Blk
0
DSP
7
Fcl3
DA6
C6
Character
C6
HZ
10
VZ
10
Blk
Col
DSP
6
Fcl2
DA5
C5
Code
C5
HP
5
VP
5
C_
Level
DSP
5
Fcl1
DA4
C4
(ROM
C4
HP
4
VP
4
R_
Lev1
DSP
4
Fcl0
DA3
C3
Address)
C3
HP
3
VP
3
R_
Lev0
DSP
3
Fch3
DA2
C2
C2
HP
2
VP
2
R_
Cntr2
DSP
2
Fch2
DA1
C1
C1
HP
1
VP
1
R_
Cntr1
DSP
1
Fch1
DA0
C0
C0
HP
0
VP
0
R_
Cntr0
DSP
0
Fch0
* (Note) : same as above.
< Raster Color Level Control > (Control Register 362 (16AH
DA4(Lev 1)
0
0
1
1
DA3(Lev 0)
0
1
0
1
Raster Color Level `H`
2.6V
2.2V
2.2V
2.0V
VID-97-D001
98-05-14
Raster Color Level `L`
1.6V
1.4V
1.4V
1.3V
Remark
Level 0
Level 1
Level 1
Level 2
9
Page 10
KS5520-XX ON SCREEN DISPLAY PROCESSOR
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CONTROL REGISTER
1) Register 360 (168H)
DA0 ~
DAD
0
1
2
3
4
5
6
7
Register
HP0
HP1
HP2
HP3
HP4
HP5
HZ10
HZ11
State
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ContentSs
Functions
5
HS = Tc * ^ 4 * ê ( HPn * 2 ) + N
Tc : osc. period ( 1/9