Datasheet ISP1107W, ISP1107DH, ISP1107, ISP1106W, ISP1105 Datasheet (Philips)

...
Page 1
ISP1105/1106/1107
Advanced Universal Serial Bus transceivers
Rev. 06 — 30 November 2001 Product data

1. General description

The ISP1105/1106/1107 range of Universal Serial Bus (USB) transceivers are fully compliant with the portable electronics devices such as mobile phones, digital still cameras, Personal Digital Assistants (PDA) and Information Appliances (IA).
They allow USB Application Specific ICs (ASICs) and Programmable Logic Devices (PLDs) with power supply voltages from 1.65 V to 3.6 V to interface with the physical layer of the Universal Serial Bus. They have an integrated 5 V to 3.3 V voltage regulator for direct powering via the USB supply V
The ISP1105/1106/1107 range can be used as a USB device transceiver or a USB host transceiver. They can transmit and receive serial data at both full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s) data rates.
ISP1105 allows single/differential input modes selectable by a MODE input and it is available in HBCC16 package. ISP1106 allows only differential input mode and is available in both TSSOP16 and HBCC16 packages. ISP1107 allows only single-ended input mode and is available in both TSSOP16 and HBCC16 packages.
Universal Serial Bus Specification Rev. 1.1
.
BUS
. They are ideal for

2. Features

Complies with
Integrated bypassable 5 V to 3.3 V voltage regulator for powering via USB V
V
Used as a USB device transceiver or a USB host transceiver
Supports full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s) serial data rates
Stable RCV output during SE0 condition
Two single-ended receivers with hysteresis
Low-power operation
Supports an I/O voltage range from 1.65 V to 3.6 V
4 kV on-chip ESD protection
Full industrial operating temperature range 40 to +85 °C
Available in small TSSOP16 (except ISP1105) and HBCC16 packages.
disconnection indication through VP and VM
BUS
Universal Serial Bus Specification Rev. 1.1
BUS
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Philips Semiconductors

3. Applications

Portable electronic devices, such as:
Mobile phone
Digital still camera
Personal Digital Assistant (PDA)
Information Appliance (IA).

4. Ordering information

Table 1: Ordering information
Type number Package
Name Description Version
ISP1105W ISP1106W ISP1107W
ISP1106DH ISP1107DH
[1]
HBCC16 plastic, heatsink bottom chip carrier; 16 terminals; body 3 × 3 × 0.65 mm SOT639-2
TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
ISP1105/1106/1107
Advanced USB transceivers
[1] The ground terminal of ISP1105W is connected to the exposed diepad (heatsink).

4.1 Ordering options

Table 2: Selection guide
Product Package(s) Description
ISP1105 HBCC16 Supports both single-ended and differential input modes ISP1106 TSSOP16 or HBCC16 Supports only the differential input mode ISP1107 TSSOP16 or HBCC16 Supports only the single-ended input mode
[1] Refer to Table 5 and Table 6. [2] Refer to Table 6. [3] Refer to Table 5.
[2]
[3]
[1]
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Philips Semiconductors

5. Functional diagram

V
CC(I/O)
SOFTCON
SPEED
VMO/FSE0
VPO/VO
MODE
SUSPND
OE
RCV
VP
ISP1105/1106/1107
Advanced USB transceivers
3.3 V
VOLTAGE
REGULATOR
(3) (3) (4)
LEVEL
SHIFTER
ISP1105 ISP1106 ISP1107
V V
V
pu(3.3)
D+ D
CC(5.0) reg(3.3)
33
33
(1)
(1)
(1%)
(1%)
1.5 k
(2)
VM
MBL301
GND
(1) Use a 39 resistor (1%) for a USB v2.0 compliant output impedance range. (2) Connect to D for low-speed operation. (3) Pin function depends on device type see Section 7.2. (4) Only for ISP1105.
Fig 1. Functional diagram (combined ISP1105, ISP1106 and ISP1107).
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Product data Rev. 06 — 30 November 2001 3 of 24
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Philips Semiconductors

6. Pinning information

6.1 Pinning

ISP1105/1106/1107
Advanced USB transceivers
SUSPND
VM
VP
RCV
OE
Bottom view
5
4
3
2
1
CC(I/O)
V
MODE
ISP1105W
GND (exposed diepad)
141516
pu(3.3)
V
SOFTCON
SPEED
876
CC(5.0)
V
9
10
11
12
13
D
D+
VPO/VO
VMO/FSE0
V
reg(3.3)
MBL303
SUSPND
VM
VP
RCV
OE
Bottom view
5
4
3
2
1
CC(I/O)
V
GND
ISP1106W ISP1107W
pu(3.3)
V
SOFTCON
SPEED
876
*
141516
CC(5.0)
V
9
10
11
12
13
D
D+ VPO/VO*
VMO/FSE0
V
reg(3.3)
MBL304
The asterisk (*) denotes that the signal names VO and FSE0 apply to the ISP1107W.
Fig 2. Pinning diagram HBCC16 (ISP1105). Fig 3. Pinning diagram HBCC16 (ISP1106 and
ISP1107).
*
V
16
V
15 14
VMO/FSE0*
13
VPO/VO
12
D+
11
D
10
SPEED
9
V
CC(5.0) reg(3.3)
*
CC(I/O)
V
pu(3.3)
SOFTCON
OE
RCV
VP
VM
SUSPND
GND
1 2 3 4
ISP1106DH ISP1107DH
5 6 7 8
MBL302
*
The asterisk (*) denotes that the signal names VO and FSE0 apply to the ISP1107DH.
Fig 4. Pinning diagram TSSOP16 (ISP1106 and ISP1107).
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Philips Semiconductors
ISP1105/1106/1107
Advanced USB transceivers

6.2 Pin description

Table 3: Pin description
CC(I/O)
[1]
Pin Type Description ISP1105
HBCC16
ISP1106/7 HBCC16
ISP1106/7 TSSOP16
active LOW); enables the transceiver to transmit data on the USB bus
); driven LOW when input SUSPND is HIGH; the
V
CC(I/O)
output state of RCV is preserved and stable during an SE0 condition
to V
); for external detection of single-ended zero
CC(I/O)
(SE0), error conditions, speed of connected device; driven HIGH when no supply voltage is connected to V V
reg(3.3)
to V
); for external detection of single-ended zero
CC(I/O)
(SE0), error conditions, speed of connected device; driven HIGH when no supply voltage is connected to V V
reg(3.3)
HIGH level enables low-power state while the USB bus is inactive and drives output RCV to a LOW level
level enables the differential input mode (VPO, VMO) whereas a LOW level enables a single-ended input mode (VO, FSE0). see Table 5 and Table 6
[2]
6 8 - ground supply
779- supply voltage for digital I/O pins (1.65 to 3.6 V). When
V
is not connected, the (D+, D) pins are in
CC(I/O)
three-state. This supply pin is totally independent of V
CC(5.0)
and V
and must never exceed the V
reg(3.3)
voltage.
adjusts the slew rate of differential data outputs D+ and D according to the transmission speed:
LOW: low-speed (1.5 Mbit/s) HIGH: full-speed (12 Mbit/s)
low-speed mode connect to pin V
full-speed mode connect to pin V
via a 1.5 kresistor
pu(3.3)
via a 1.5 k resistor
pu(3.3)
Schmitt trigger); see Table 5 and Table 6
Schmitt trigger); see Table 5 and Table 6
CC(I/O)
CC(I/O)
CC(I/O)
CC(5.0)
CC(5.0)
); a
); a HIGH
reg(3.3)
CC(I/O)
,
CC(I/O)
,
CC(I/O)
and
and
Symbol
OE113I input for output enable (CMOS level with respect to V
RCV224Odifferentialdatareceiveroutput(CMOSlevel with respect to
VP335Osingle-ended D+ receiver output (CMOS level with respect
VM446Osingle-ended D receiver output (CMOS level with respect
SUSPND 557I suspend input (CMOS level with respect to V
MODE 6 I mode input (CMOS level with respect to V
GND ­V
SPEED 8 8 10 I speed selection input (CMOS levelwith respect to V
D 9 9 11 AI/O negative USB data bus connection (analog, differential); for
D+ 10 10 12 AI/O positive USB data bus connection (analog, differential); for
VPO/VO 11 11 13 I driver data input (CMOS level with respect to V
VMO/FSE0 12 12 14 I driver data input (CMOS level with respect to V
,
);
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Philips Semiconductors
ISP1105/1106/1107
Advanced USB transceivers
Table 3: Pin description
Symbol
[1]
Pin Type Description ISP1105
HBCC16
V
reg(3.3)
13 13 15 - Internalregulator option: regulated supply voltage output
…continued
ISP1106/7 HBCC16
ISP1106/7 TSSOP16
(3.0 to 3.6 V) during 5 V operation; a decoupling capacitor of at least 0.1 µF is required
Regulator bypass option: used as a supply voltage input for 3.3 V operation. (3.3 V ±10%)
V
CC(5.0)
14 14 16 - Internal regulator option: supply voltage input
(4.0 to 5.5 V); can be connected directly to USB supply V
BUS
V
pu(3.3)
Regulator bypass option: connect to V
15 15 1 - pull-up supply voltage (3.3 V ±10%); connect an external
reg(3.3)
1.5 k resistor on D+ (full-speed) or D (low-speed); pin function is controlled by input SOFTCON:
SOFTCON = LOW — V
floating (high impedance);
pu(3.3)
ensures zero pull-up current SOFTCON = HIGH — V
to V
reg(3.3)
= 3.3 V;internally connected
pu(3.3)
SOFTCON 16 16 2 I software controlled USB connection input; a HIGH level
applies 3.3 V to pin V
, which is connected to an
pu(3.3)
external 1.5 k pull-up resistor; this allows USB connect/disconnect signalling to be controlled by software
[1] Symbol names with an overscore (e.g. NAME) indicate active LOW signals. [2] Down bonded to the exposed diepad.

7. Functional description

7.1 Function selection

Table 4: Function table
SUSPND OE (D+, D) RCV VP/VM Function
L L driving &
receiving L H receiving H L driving inactive
H H high-Z
[1] Signal levels on (D+, D−) are determined by other USB devices and external pull-up/down resistors. [2] In ‘suspend’ mode (SUSPND = HIGH) the differential receiver is inactive and output RCV is always
LOW. Out-of-suspend (‘K’) signalling is detected via the single-ended receivers VP and VM.
[3] During suspend, the slew-rate control circuit of low-speed operation is disabled. The (D+, D−) lines
are still driven to their intended states, without slew-rate control. This is permitted because driving during suspend is used to signal remote wake-up by driving a ‘K’ signal (one transition from idle to ‘K’ state) for a period of 1 to 15 ms.
[1]
[1]
inactive
active active normal driving
(differential receiver active)
active active receiving
[2]
active driving during ‘suspend’
(differential receiver inactive)
[2]
active low-power state
[3]
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Philips Semiconductors

7.2 Operating functions

Table 5: Driving function using single-ended input data interface (OE = L) [for
ISP1105/1106/1107
Advanced USB transceivers
ISP1107 and ISP1105 (MODE = L)]
FSE0 VO Data
L L differential logic 0
L H differential logic 1 H L SE0 H H SE0
Table 6: Driving function using differential input data interface (
and ISP1105 (MODE = H)]
VMO VPO Data
L L SE0
L H differential logic 1 H L differential logic 0 H H illegal state
Table 7: Receiving function (
(D+, D) RCV VP
differential logic 0 L L H differential logic 1 H H L
SE0 RCV*
[1] VP = VM = H indicates the sharing mode (V [2] RCV* denotes the signal level on output RCV just before SE0 state occurs. This level is stable during
the SE0 period.
OE=H)
[2]
CC(5.0)/Vreg(3.3)
is disconnected).
OE = L) [for ISP1106
[1]
LL
7.3 Power supply configurations
The ISP1105/1106/1107 can be used with different power supply configurations, which can be changed dynamically. An overview is given in Table 9.
VM
[1]
Normal mode — Both V For 5 V operation, V
CC(5.0)
CC(I/O)
and V
CC(5.0)
or (V
CC(5.0)
and V
) are connected.
reg(3.3)
is connected to a 5 V source (4.0 to 5.5 V). The internal voltage regulator then produces 3.3 V for the USB connections. For 3.3 V operation, both V
CC(5.0)
and V
are connected to a 3.3 V source (3.0 to 3.6 V). V
reg(3.3)
CC(I/O)
is independently connected to a voltage source (1.65 V to 3.6 V), depending on the supply voltage of the external circuit.
Disable mode — V
is not connected, V
CC(I/O)
CC(5.0)
or (V
CC(5.0)
and V
reg(3.3)
) are connected. In this mode, the internal circuits of the ISP1105/1106/1107 ensure that the (D+, D) pins are in three-state and the power consumption drops to the low-power (suspended) state level. Some hysteresis is built into the detection of V
Sharing mode — V
CC(I/O)
lost.
is connected, (V
CC(I/O)
CC(5.0)
and V
) are not connected. In
reg(3.3)
this mode, the (D+,D−) pins are made three-state and the ISP1105/1106/1107 allows external signals of up to 3.6 V to share the (D+, D) lines. The internal circuits of the ISP1105/1106/1107 ensure that virtually no current (maximum 10 µA) is drawn via the (D+, D) lines. The power consumption through pin V
9397 750 08872
Product data Rev. 06 — 30 November 2001 7 of 24
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
CC(I/O)
drops to the
Page 8
Philips Semiconductors
low-power (suspended) state level. Both the VP and VM pins are driven HIGH to indicate this mode. Pin RCV is made LOW. Some hysteresis is built into the detection of V
Table 8: Pin states in Disable or Sharing mode
Pins Disable mode state Sharing mode state
V
CC(5.0)/Vreg(3.3)
V
CC(I/O)
V
pu(3.3)
(D+, D−) high impedance high impedance (VP, VM) invalid RCV invalid Inputs (VO/VPO, FSE0/VMO,
SPEED, MODE SOFTCON)
[1] High impedance or driven LOW. [2] ISP1105 only.
reg(3.3)
lost.
[2]
, SUSPND,OE,
ISP1105/1106/1107
Advanced USB transceivers
5 V input / 3.3 V output
3.3 V input / 3.3 V input not present 1.65 V to 3.6 V input
high impedance (off) high impedance (off)
[1] [1]
high impedance high impedance
not present
H
L
Table 9: Power supply configuration overview
V
CC(5.0)
V
reg(3.3)
or
V
CC(I/O)
Configuration Special characteristics
connected connected Normal mode ­connected not connected Disable mode (D+, D−) and V
pu(3.3)
impedance; VP, VM, RCV:
[1]
invalid
not connected connected Sharing mode (D+, D−) and V
pu(3.3)
impedance; VP, VM driven HIGH; RCV driven LOW
[1] High impedance or driven LOW.

7.4 Power supply input options

The ISP1105/1106/1107 range has two power supply input options: Internal regulator — V
used to supply the internal circuitry with 3.3 V (nominal). The V
3.3 V output reference. Regulator bypass — V
internal regulator is bypassed and the internal circuitry is supplied directly from the V
power supply. The voltage range is 3.0 to 3.6 V to comply with the USB
reg(3.3)
specification.
is connected to 4.0 to 5.5 V. The internal regulator is
CC(5.0)
reg(3.3)
CC(5.0)
and V
are connected to the same supply. The
reg(3.3)
high
high
pin becomes a
The supply voltage range for each input option is specified in Table 10.
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Philips Semiconductors
ISP1105/1106/1107
Advanced USB transceivers
Table 10: Power supply input options
Input option V Internal
regulator
Regulator bypass
CC(5.0)
supply input for internal regulator (4.0 to 5.5 V)
connected to V
reg(3.3)
with maximum voltage drop of 0.3 V
V
reg(3.3)
voltage reference output (3.3 V, 300µA)
supply input (3.0 V to 3.6 V)
V
CC(I/O)
supply input for digital I/O pins (1.65 V to 3.6 V)
supply input for digital I/O pins (1.65 V to 3.6 V)
(2.7 to 3.6 V)

8. Limiting values

Table 11: Absolute maximum ratings
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
CC(5.0)
V
CC(I/O)
V
reg(3.3)
V
I
I
latchup
V
esd
T
stg
supply voltage 0.5 +6.0 V I/O supply voltage 0.5 +4.6 V regulated supply voltage 0.5 +4.6 V DC input voltage 0.5 V
CC(I/O)
+ 0.5 V latch-up current VI=−1.8 to 5.4 V - 100 mA electrostatic discharge voltage
[1]
ILI<1µA
pins D+,D−,V
, GND
V
reg(3.3)
CC(5.0)
,
- ±4000 V
other pins - ±2000 V
storage temperature 40 +125 °C
[1] Equivalent to discharging a 100 pF capacitor via a 1.5 k resistor (Human Body Model). Refer to
EIA/JESD22-A114-A
.
EIA/JEDEC Standard specification
Table 12: Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
CC(5.0)
supply voltage (Internal
5 V operation 4.0 5.0 5.5 V
regulator option)
V
reg(3.3)
supply voltage (Regulator
3.3 V operation 3.0 3.3 3.6 V
bypass option)
V
CC(I/O)
V
I
V
I(AI/O)
I/O supply voltage 1.65 - 3.6 V input voltage 0 - V input voltage on analog I/O
0 - 3.6 V
CC(I/O)
V
pins (D+/D)
T
amb
operating ambient temperature 40 - +85 °C
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Philips Semiconductors
ISP1105/1106/1107
Advanced USB transceivers

9. Static characteristics

Table 13: Static characteristics: supply pins
VCC= 4.0 to 5.5 V or V combinations; T
=−40 to+85°C; unless otherwise specified.
amb
Symbol Parameter Conditions Min Typ Max Unit
V
reg(3.3)
regulated supply voltage output
I
CC
I
CC(I/O)
I
CC(idle)
operating supply current full-speed transmitting and receiving
operating I/O supply current full-speedtransmittingand receiving
supply current during full-speed idle and SE0
I
CC(I/O)(static)
I
CC(susp)
I
CC(dis)
I
CC(I/O)(sharing)
static I/O supply current full-speed idle, SE0 or suspend - - 20 µA suspend supply current SUSPND = HIGH disable mode supply current V sharing mode I/O supply
current
I
Dx(sharing)
sharing mode load current on pins D+ and D
V
th(reg3.3)
regulated supply voltage detection threshold
V
hys(reg3.3)
regulated supply voltage detection hysteresis
V
th(I/Osup)
I/O supply voltage detection threshold
V
hys(I/Osup)
I/O supply voltage detection hysteresis
= 3.0 to 3.6 V; V
reg(3.3)
= 1.65 to 3.6 V; V
CC(I/O)
Internal regulator option;
300 µA
I
load
at 12 Mbit/s; C
= 50 pF on D+/D
L
= 0 V; see Table 10 for valid voltage level
GND
[1]
[2]
3.0
3.3 3.6 V
-48
-12
[3]
[3]
at 12 Mbit/s full-speed idle: VD+> 2.7 V,
< 0.3 V; SE0: VD+< 0.3 V,
V
D
< 0.3 V
V
D
not connected
CC(I/O)
V
or V
CC(5.0)
V
or V
CC(5.0)
SOFTCON = LOW; V
1.65 V V
2.7 V V
CC(I/O)
reg(3.3)
not connected - - 20 µA
reg(3.3)
not connected;
reg(3.3)
V
= 3.6 V
Dx
reg(3.3)
3.6 V
;
[4]
- - 500 µA
[4]
--20µA
[4]
--20µA
--10µA
supply lost - - 0.8 V
[5]
supply present 2.4
V
V
= 1.8 V - 0.45 - V
CC(I/O)
= 2.7 to 3.6 V
reg(3.3)
--V
supply lost - - 0.5 V supply present 1.4 - - V
V
= 3.3 V - 0.45 - V
reg(3.3)
mA
mA
[1] I [2] In ‘suspend’ mode, the minimum voltage is 2.7 V. [3] Characterized only, not tested in production. [4] Excluding any load current and V [5] When V
9397 750 08872
Product data Rev. 06 — 30 November 2001 10 of 24
includes the pull-up resistor current via pin V
load
pu(3.3)/Vsw
< 2.7 V, the minimum value for V
CC(I/O)
.
pu(3.3)
source current to the 1.5 k and 15 kpull-up and pull-down resistors (200 µA typ.).
th(reg3.3)(present)
is 2.0 V.
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
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Philips Semiconductors
ISP1105/1106/1107
Advanced USB transceivers
Table 14: Static characteristics: digital pins
V
Symbol Parameter Conditions Min Typ Max Unit
V
Input levels
V V
Output levels
V
V
Leakage current
I
Example 1: V
Input levels
V V
Output levels
V
V
Example 2: V
Input levels
V V
Output levels
V
V
Example 3: V
Input levels
V V
Output levels
V
V
Capacitance
C
= 1.65 to 3.6 V; V
CC(I/O)
= 1.65 to 3.6 V
CC(I/O)
IL IH
OL
OH
LI
IL IH
OL
OH
IL IH
OL
OH
IL IH
OL
OH
IN
=0V; T
GND
LOW-level input voltage - - 0.3V HIGH-level input voltage 0.6V
LOW-level output voltage
HIGH-level output voltage
=−40 to+85°C; unless otherwise specified.
amb
CC(I/O)
= 100 µA - - 0.15 V
I
OL
= 2 mA - - 0.4 V
I
OL
= 100 µAV
I
OH
= 2 mA V
I
OH
CC(I/O) CC(I/O)
CC(I/O)
-- V
0.15 - - V
0.4 - - V
input leakage current - - ±1 µA
= 1.8 V ± 0.15 V
CC(I/O)
LOW-level input voltage - - 0.5 V HIGH-level input voltage 1.2 - - V
= 100 µA - - 0.15 V
I
LOW-level output voltage
HIGH-level output voltage
= 2.5 V ± 0.2 V
CC(I/O)
OL
= 2 mA - - 0.4 V
I
OL
= 100 µA 1.5 - - V
I
OH
= 2 mA 1.25 - - V
I
OH
LOW-level input voltage - - 0.7 V HIGH-level input voltage 1.7 - - V
= 100 µA - - 0.15 V
I
LOW-level output voltage
HIGH-level output voltage
= 3.3 V ± 0.3 V
CC(I/O)
OL
= 2 mA - - 0.4 V
I
OL
= 100 µA 2.15 - - V
I
OH
= 2 mA 1.9 - - V
I
OH
LOW-level input voltage - - 0.9 V HIGH-level input voltage 2.15 - - V
= 100 µA - - 0.15 V
I
LOW-level output voltage
HIGH-level output voltage
OL
= 2 mA - - 0.4 V
I
OL
= 100 µA 2.85 - - V
I
OH
= 2 mA 2.6 - - V
I
OH
input capacitance pin to GND - - 10 pF
V
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Philips Semiconductors
ISP1105/1106/1107
Advanced USB transceivers
Table 15: Static characteristics: analog I/O pins (D+, D)
VCC= 4.0 to 5.5 V or V
Symbol Parameter Conditions Min Typ Max Unit
Input levels
Differential receiver
V
DI
V
CM
differential input sensitivity |V differential common mode
voltage
Single-ended receiver
V
IL
V
IH
V
hys
LOW-level input voltage - - 0.8 V HIGH-level input voltage 2.0 - - V hysteresis voltage 0.4 - 0.7 V
Output levels
V
OL
V
OH
LOW-level output voltage RL= 1.5 k to +3.6 V - - 0.3 V HIGH-level output voltage RL=15kΩ to GND 2.8
Leakage current
I
LZ
OFF-state leakage current - - ±1 µA
Capacitance
C
IN
transceiver capacitance pin to GND - - 20 pF
Resistance
Z Z
DRV DRV2
driver output impedance steady-state drive driver output impedance for
USB 2.0
Z
INP
R
SW
input impedance 10 - - M internal switch resistance at
pin V
pu(3.3)
Termination
[4]
V
TERM
termination voltage for upstream port pull-up (R
= 3.0 to 3.6 V; V
reg(3.3)
GND
I(D+)
=0V; T
V
=−40 to+85°C; unless otherwise specified.
amb
| 0.2 - - V
I(D)
includes VDI range 0.8 - 2.5 V
steady-state drive
[1]
[2]
34 39 44
[3]
40.5 45 49.5
- 3.6 V
--10
[5]
PU
3.0
)
- 3.6 V
[1] V
OH(min)=Vreg(3.3)
[2] Includes external resistors of 33 Ω±1% on both D+ and D. [3] Includes external resistors of 39 Ω±1% on both D+ and D. This range complies with [4] This voltage is available at pins V [5] In ‘suspend’ mode the minimum voltage is 2.7 V.
9397 750 08872
Product data Rev. 06 — 30 November 2001 12 of 24
0.2 V.
reg(3.3)
and V
pu(3.3)
Universal Serial Bus Specification Rev. 2.0
.
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
.
Page 13
Philips Semiconductors

10. Dynamic characteristics

ISP1105/1106/1107
Advanced USB transceivers
Table 16: Dynamic characteristics: analog I/O pins (D+, D)
VCC= 4.0 to 5.5 V or V combinations; T
=−40 to+85°C; unless otherwise specified.
amb
= 3.0 to 3.6 V; V
reg(3.3)
= 1.65 to 3.6 V; V
CC(I/O)
[1]
= 0 V; see Table 10 for valid voltage level
GND
Symbol Parameter Conditions Min Typ Max Unit
Driver characteristics
Full-speed mode (SPEED = HIGH)
t
FR
rise time CL= 50 to 125 pF;
10 to 90% of |V
OH
VOL|;
4 - 20 ns
see Figure 5
t
FF
fall time CL= 50 to 125 pF;
90 to 10% of |V
OH
4 - 20 ns
VOL|;
see Figure 5
FRFM differential rise/fall time
FR/tFF
)
V
CRS
matching (t output signal crossover
voltage
excluding the first transition from Idle state
excluding the first transition from Idle state; see Figure 8
90 - 111.1 %
[2]
1.3 - 2.0 V
Low-speed mode (SPEED = LOW)
t
LR
rise time CL= 50 to 600 pF;
10 to 90% of |V
OH
VOL|;
75 - 300 ns
see Figure 5
t
LF
fall time CL= 50 to 600 pF;
90 to 10% of |V
OH
VOL|;
75 - 300 ns
see Figure 5
LRFM differential rise/fall time
V
CRS
matching (t output signal crossover
LR/tLF
)
voltage
excluding the first transition from Idle state
excluding the first transition from idle state; see Figure 8
80 - 125 %
[2]
1.3 - 2.0 V
Driver timing
Full-speed mode (SPEED = HIGH)
t
PLH(drv)
t
PHL(drv)
driver propagation delay LOW-to-HIGH; see Figure 8 --18ns (VO/VPO, FSE0/VMO to
HIGH-to-LOW; see Figure 8 --18ns
D+,D)
t
PHZ
t
PLZ
t
PZH
t
PZL
driver disable delay HIGH-to-OFF; see Figure 6 --15ns (OE to D+,D) LOW-to-OFF; seeFigure 6 --15ns driver enable delay OFF-to-HIGH; see Figure 6 --15ns (OE to D+,D) OFF-to-LOW; see Figure 6 --15ns
Low-speed mode (SPEED = LOW)
Not specified: low-speed delay timings are dominated by the slow rise/fall times t
and tLF.
LR
9397 750 08872
Product data Rev. 06 — 30 November 2001 13 of 24
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Page 14
Philips Semiconductors
ISP1105/1106/1107
Advanced USB transceivers
Table 16: Dynamic characteristics: analog I/O pins (D+, D)
VCC= 4.0 to 5.5 V or V combinations; T
=−40 to+85°C; unless otherwise specified.
amb
= 3.0 to 3.6 V; V
reg(3.3)
= 1.65 to 3.6 V; V
CC(I/O)
[1]
…continued
GND
= 0 V; see Table 10 for valid voltage level
Symbol Parameter Conditions Min Typ Max Unit
Receiver timings (full-speed and low-speed mode)
Differential receiver
t
PLH(rcv)
t
PHL(rcv)
propagation delay LOW-to-HIGH; see Figure 7 --15ns (D+,D to RCV) HIGH-to-LOW; see Figure 7 --15ns
Single-ended receiver
t
PLH(se)
t
PHL(se)
[1] Test circuit: see Figure 11. [2] Characterized only, not tested. Limits guaranteed by design.
V
OH
V
OL
propagation delay LOW-to-HIGH; see Figure 7 --18ns (D+,D to VP, VM) HIGH-to-LOW; see Figure 7 --18ns
1.65 V
0.9 V
t
PHZ
t
PLZ
V
0.3 V
OH
V
+0.3 V
OL
MGS966
tFR, t
10%
logic input
90%
tFF, t
10%
LF
V
MGS963
V
LR
90%
0 V
OH
differential
data lines
OL
0.9 V
t t
V
PZH PZL
CRS
Fig 5. Rise and fall times. Fig 6. Timing of OE to D+, D.
2.0 V
differential
data lines
0.8 V
V
OH
logic output
V
OL
V
CRS
t
PLH(rcv)
t
PLH(se)
0.9 V
V
CRS
t
PHL(rcv)
t
PHL(se)
0.9 V
MGS965
1.65 V
0 V
V
OH
V
logic input
differential
data lines
OL
0.9 V
t
PLH(drv)
V
CRS
0.9 V
t
PHL(drv)
V
CRS
Fig 7. Timing of D+, D to RCV, VP, VM. Fig 8. Timing of VO/VPO, FSE0/VMO to D+, D.
MGS964
9397 750 08872
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Product data Rev. 06 — 30 November 2001 14 of 24
Page 15
Philips Semiconductors

11. Test information

D.U.T.
33
ISP1105/1106/1107
Advanced USB transceivers
test point
(1)
500
50 pF
V = 0 V for t V=V
reg(/3.3)
PZH
for t
, t
PHZ
, t
PZL
PLZ
(1) Complies with USB 1.1. For USB 2.0 a resistor of 39 must be used.
Fig 9. Load for enable and disable times.
test point
D.U.T.
25 pF
MGS968
Fig 10. Load for VM, VP and RCV.
V
pu(3.3)
(1)
D.U.T.
1.5 k
D+/D
33
test point
(2)
C
L
V
MBL142
15 k
MGS967
Load capacitance:
CL= 50 pF or 125 pF (full-speed mode, minimum or maximum timing)
CL= 50 pF or 600 pF (low-speed mode, minimum or maximum timing) (1) Full-speed mode: connected to D+, low-speed mode: connected to D. (2) Complies with USB 1.1. For USB 2.0 a resistor of 39 must be used.
Fig 11. Load for D+, D.
9397 750 08872
Product data Rev. 06 — 30 November 2001 15 of 24
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Page 16
Philips Semiconductors

12. Package outline

ISP1105/1106/1107
Advanced USB transceivers
HBCC16: plastic thermal enhanced bottom chip carrier; 16 terminals; body 3 x 3 x 0.65 mm
terminal 1 index area
e
4
D
e
1
D
h
e
59
B
A
E
y
1
e
E
e
h
2
detail X
C
b
f
b
2
v
M
w
M
b
1
b
2
v
M
w
M
C
y
w
v
ACCB
M M
v
w
ACCB
ACCB
M M

SOT639-2

ACCB
1/2 e
4
113
1/2 e
DIMENSIONS (mm are the original dimensions)
A
max.
0.8
A
0.10
0.05
1bA2
0.7
0.6
0.33
0.33
0.27
0.27
IEC JEDEC JEITA
UNIT
mm
OUTLINE VERSION
SOT639-2 MO-217
Fig 12. HBCC16 package outline.
16
3
e
3
0 2.5 5 mm
b
0.38
0.32
D
2
3.1
2.9
b
1
X
E
D
h
3.1
1.45
2.9
1.35
REFERENCES
scale
E
1.45
1.35
e
e
2.5
e
2
3
2.45
h
0.5
1
2.5
A
2
A
e
4
2.45
EUROPEAN
PROJECTION
A
1
0.23
0.17
f
0.08
yy
0.1 0.05 0.2
ISSUE DATE
01-11-13
1
we
v
9397 750 08872
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data Rev. 06 — 30 November 2001 16 of 24
Page 17
Philips Semiconductors
ISP1105/1106/1107
Advanced USB transceivers
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
D
c
y
Z
16
pin 1 index
9
A
2
18
w M
b
e
p
A
1
E
H
E
L
detail X

SOT403-1

A
X
v M
A
Q
(A )
3
A
θ
L
p
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT A1A2A3b
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
A
max.
0.15
mm
1.10
OUTLINE VERSION
SOT403-1 MO-153
0.05
0.95
0.25
0.80
IEC JEDEC EIAJ
p
0.30
0.19
(1)E(2) (1)
cD
0.2
5.1
0.1
4.9
REFERENCES
eHELLpQZywv θ
4.5
4.3
0.65
6.6
6.2
0.75
0.50
0.4
0.3
EUROPEAN
PROJECTION
0.13 0.10.21.0
0.40
0.06
ISSUE DATE
95-04-04 99-12-27
o
8
o
0
Fig 13. TSSOP16 package outline.
9397 750 08872
Product data Rev. 06 — 30 November 2001 17 of 24
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Page 18
Philips Semiconductors

13. Packaging

The ISP1105/1106/1107W (HBCC16 package) is delivered on a Type A carrier tape, see Figure 14. The tape dimensions are given in Table 17.
The reel diameter is 330 mm. The reel is made of polystyrene (PS) and is not designed for use in a baking process.
The cumulative tolerance of 10 successive sprocket holes is ±0.02 mm. The camber must not exceed 1 mm in 100 mm.
ISP1105/1106/1107
Advanced USB transceivers
Type A
4
Type B
4
P1
A0
direction of feed
A0
P1
direction of feed
K0
K0
MLC338
dth
W
B0
W
elongated sprocked hole
B0
Fig 14. Carrier tape dimensions.
Table 17: Type A carrier tape dimensions for ISP1105/1106/1107W
Dimension Value Unit
A
0
B
0
K
0
P
1
3.3 mm
3.3 mm
1.1 mm
8.0 mm
W 12.0 ±0.3 mm
9397 750 08872
Product data Rev. 06 — 30 November 2001 18 of 24
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Page 19
Philips Semiconductors

14. Soldering

14.1 Introduction to soldering surface mount packages

This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our
Packages
There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended.
14.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method.
ISP1105/1106/1107
Advanced USB transceivers
Data Handbook IC26; Integrated Circuit
(document order number 9398 652 90011).
Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 220 °C for thick/large packages, and below 235 °C small/thin packages.

14.3 Wave soldering

Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems.
To overcome these problems the double-wave soldering method was specifically developed.
If wave soldering is used the following conditions must be observed for optimal results:
Use a double-wave soldering method comprising a turbulent wave with high
upward pressure followed by a smooth laminar wave.
For packages with leads on two sides and a pitch (e):
larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be
parallel to the transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the
transport direction of the printed-circuit board.
The footprint must incorporate solder thieves at the downstream end.
For packages with leads on four sides, the footprint must be placed at a 45° angle
to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners.
9397 750 08872
Product data Rev. 06 — 30 November 2001 19 of 24
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Page 20
Philips Semiconductors
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.

14.4 Manual soldering

Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C.
When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.

14.5 Package related soldering information

Table 18: Suitability of surface mount IC packages for wave and reflow soldering
Package Soldering method
BGA, HBGA, LFBGA, SQFP, TFBGA not suitable suitable HBCC, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, HVQFN, SMS PLCC LQFP, QFP, TQFP not recommended SSOP, TSSOP, VSO not recommended
ISP1105/1106/1107
Advanced USB transceivers
methods
Wave Reflow
not suitable
[3]
, SO, SOJ suitable suitable
[2]
[3][4] [5]
suitable
suitable suitable
[1]
[1] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the
maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the
Circuit Packages; Section: Packing Methods
[2] These packages are not suitablefor wave soldering as a solder joint between the printed-circuit board
and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
[3] If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave
direction. The package footprint must incorporate solder thieves downstream and at the side corners.
[4] Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger
than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
[5] Wave soldering is only suitable forSSOP and TSSOP packages with a pitch (e) equaltoor larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
9397 750 08872
Product data Rev. 06 — 30 November 2001 20 of 24
.
Data Handbook IC26; Integrated
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Page 21
Philips Semiconductors

15. Additional soldering information

15.1 (H)BCC packages: footprint

The surface material of the terminals on the resin protrusion consists of a 4-layer metal structure (Au, Pd, Ni and Pd). The Au + Pd layer (0.1 µm min.) ensures solderability, the Ni layer (5 µm min.) prevents diffusion, and the Pd layer on top (0.5 µm min.) ensures effective wire bonding.
Terminal PCB land Solder resist mask Stencil mask
Normal
b
1
b
1
0.05
ISP1105/1106/1107
Advanced USB transceivers
All dimensions in mm
0.05
Solder land
Solder resist
Corner
Cavity
b
b
2
b
2
E
h
D
h
b
b
2
b
2
E
h
D
h
0.05
0.05
0.05
0.05
0.05
0.1
(4×)
0.05
0.05
0.3 (8×)
Cavity: exposed diepad, either functioning as heatsink or as ground connection; only for HBCC packages.
Fig 15. (H)BCC footprint and solder resist mask dimensions.
15.2 (H)BCC packages: reflow soldering profile
The conditions for reflow soldering of (H)BCC packages are as follows:
For exact dimensions see package outline drawing (SOT639-2)
0.05
Stencil print thickness:
0.1 to 0.12 mm
Solder stencil
004aaa123
Preheating time: minimum 90 s at T = 145 to 155 °C
Soldering time: minimum 90 s (BCC) or minimum 100 s (HBCC) at T > 183 °C
Peak temperature:
Ambient temperature: T
amb(max)
– Device surface temperature: T
9397 750 08872
Product data Rev. 06 — 30 November 2001 21 of 24
= 260 °C
case(max)
= 255 °C.
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Page 22
Philips Semiconductors
ISP1105/1106/1107
Advanced USB transceivers

16. Revision history

Table 19: Revision history
Rev Date CPCN Description
06 20011130 - Product data; sixth version. Supersedes ISP1105_1106_1107-05 of 3 Sept 2001 (9397
750 08643). Modifications:
Changed the HBCC16 package version from SOT639-1 to SOT639-2 in:
Table 1 “Ordering information” on page 2.Section 12 “Package outline” on page 16.Figure 15 “(H)BCC footprint and solder resist mask dimensions.” on page 21.
Section 7.4 “Power supply input options”: Removed the last sentence “The internal
regulator is not used in single-ended mode and is shutdown.” from the Internal regulator definition.
05 20010903 - Product data; fifth version. Supersedes ISP1105_1106_1107-04 of 2 Aug 2001 (9397
750 08643). Modifications:
Replaced front-page logo with new USB basic-speed logo.
04 20010802 - Preliminary data; fourth version. Supersedes ISP1105_1106_1107-03 of 4 July 2001
(9397 750 08515). Modifications:
Section 1 “General description”: removed backward compatibility with PDIUSBP11A.
Section 2 “Features”:
Removed backward compatibility with PDIUSBP11A.Added ‘on-chip’ for the ESD protection.Changed the I/O voltage range from ‘1.8 V, 2.5 V or 3.3 V’ into ‘1.65 V to 3.6 V’.
Section 6.2 “Pin description”: changed the description for pin V
Section 7.3 “Power supply configurations”: changed V
3.3 V’ into ‘1.65 to 3.6 V’ in the description of Normal mode, in Table 8 and in Table 10.
range from ‘1.8 V, 2.5 V or
CC(I/O)
Table 13 “Static characteristics: supply pins”: removed table note for I
USB On-The-Go specification
.
Table 14 “Static characteristics: digital pins”: changed the commonly supported types of
into examples.
V
CC(I/O)
Section 15.1 “(H)BCC packages: footprint”: added paragraph on terminal composition.
Section 15.2 “(H)BCC packages: reflow soldering profile”: changed peak temperature
from 220 °C ±5 °C to 260 °C (ambient) and 255 °C (device surface).
03 20010704 - Preliminary data; third version. Supersedes ISP1107-02 of 5 February 2001
(9397 750 07879). Modification:
ISP1107, ISP1106 and ISP1105 combined into one datasheet.
02 20010205 - Objective specification; second version. Supersedes ISP1107-01 of 23 February 2000
(9397 750 06899). ISP1107 stand-alone datasheet only.
01 20000223 - Objective specification; initial version. ISP1107 stand-alone datasheet only.
CC(I/O)
.
referencing the
CC
9397 750 08872
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Page 23
Philips Semiconductors

17. Data sheet status

ISP1105/1106/1107
Advanced USB transceivers
Data sheet status
Objective data Development This datasheet contains datafrom the objectivespecification forproduct development.Philips Semiconductors
Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a
Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to
[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[1]
Product status
18. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warrantythat such applications will be suitable for the specified use without further testing or modification.
[2]
Definition
reserves the right to change the specification in any manner without notice.
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product.
make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.

19. Disclaimers

Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations orwarranties that these products are free frompatent, copyright, ormask work right infringement, unless otherwise specified.
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com. Fax: +31 40 27 24825
9397 750 08872
Product data Rev. 06 — 30 November 2001 23 of 24
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Page 24
Philips Semiconductors
Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4.1 Ordering options. . . . . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Functional description . . . . . . . . . . . . . . . . . . . 6
7.1 Function selection. . . . . . . . . . . . . . . . . . . . . . . 6
7.2 Operating functions. . . . . . . . . . . . . . . . . . . . . . 7
7.3 Power supply configurations. . . . . . . . . . . . . . . 7
7.4 Power supply input options. . . . . . . . . . . . . . . . 8
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9
9 Static characteristics. . . . . . . . . . . . . . . . . . . . 10
10 Dynamic characteristics . . . . . . . . . . . . . . . . . 13
11 Test information. . . . . . . . . . . . . . . . . . . . . . . . 15
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16
13 Packaging. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
14 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
14.1 Introduction to soldering surface mount
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
14.2 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 19
14.3 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 19
14.4 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 20
14.5 Package related soldering information . . . . . . 20
15 Additional soldering information . . . . . . . . . . 21
15.1 (H)BCC packages: footprint . . . . . . . . . . . . . . 21
15.2 (H)BCC packages: reflow soldering profile. . . 21
16 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 22
17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 23
18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
19 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
ISP1105/1106/1107
Advanced USB transceivers
© Koninklijke Philips Electronics N.V. 2001. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Date of release: 30 November 2001 Document order number: 9397 750 08872
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