Datasheet HV6008PG Datasheet (Supertex)

Page 1
32-Channel 256 Gray-Shade High Voltage Driver
Ordering Information
Package Option
Device 64-Lead 3-Sided Plastic Gullwing Die
HV62208 HV62208PG HV62208X
HV62208
Features
HVCMOS® technology ❏ 5V CMOS inputs Up to 80V output voltage PWM gray shade conversion Capable of 256 levels of gray shading Balanced shift clock complies with RS-422 8MHz shift and count clock frequency 16MHz data throughput rate 8 bit data bus 32 outputs per device BLANK function
Absolute Maximum Ratings
Supply voltage, V Supply voltage, V Supply voltage, V Logic input levels -0.5 to VDD + 0.5V Continuous total power dissipation 1.2W Operating temperature range -40°C to +85°C Storage temperature range -65°C to +150°C
Notes: All voltages are referenced to GND. Maximum V For operation above 25°C ambient derate linearly to 85°C at 20mW/°C.
PP
DD
PP
NN
to VNN voltage is 90V.
-0.5V to +7.5V
-15V to 0V
General Description
Not recommended for new designs. Please use HV632 instead.
The HV622 is a 32-channel gray-shade column driver IC de­signed for driving electrofluorescent displays. Using Supertex’s unique HVCMOS shading by PWM conversion.
The shift clock is a balanced clock with electrical characteristics complying with EIA RS-422 standard. Input data, in groups of eight, is latched into a set of data latches on both edges of the shift clock. The data shifted in the first data latch corresponds to
1, the second data latch corresponds to HV
HV
OUT
These data are compared to the contents of the master binary counter which counts on both edges of the count clock. Each time the master counter begins to decrement from 1111 1111, the data in the data latches are compared with the contents of the counter; if they match, the corresponding outputs will go high. The master counter counts down to 0000 0001 and then starts to count up again. The outputs that are at high will stay at high until the contents of the counter match the data in the data latches again. Therefore, the higher the binary data in the data latches, the longer the outputs will stay at high. Thus, different high voltage pulse widths are produced. When the counter reaches its 1111 1111 count while counting up, the device is ready for the next operation cycle. A data value of 0000 0000 produces no pulse; the output stays low.
The BLANK input signal will reset the master counter to all ones (1111 1111) and set all high voltage outputs to low.
®
technology, it is capable of 256 levels of gray
2, and so on.
OUT
02/96/022
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
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Page 2
Electrical Characteristics
(Over recommended conditions of VDD = 5V, VPP = 70V, VNN = -10V, TA = 25°C unless otherwise noted)
Low-Voltage DC Characteristics (Digital)
Symbol Parameter Min Max Units Conditions
V
DD
I
DD
I
DDQ
I
IH
I
IL
I
OH
I
OL
Low-Voltage DC Characteristics (Analog)
Symbol Parameter Min Max Units Conditions
V
DD
I
DD
I
DDQ
Low-voltage digital supply voltage 4.5 5.5 V VDD supply current 25 mA fSC = 8MHz, fCC = 8MHz Quiescent VDD supply current 100 µA All VIN = GND, Count Clock = V High-level input current 10 µAVIN = V
DD
Low-level input current -10 µAVIL = GND High-level output current -1.0 mA Low-level ouptut current 1.0 mA
Low-voltage analog supply voltage 4.5 5.5 V VDD supply current 100 µAfSC = 8MHz, fCC = 8MHz Quiescent VDD supply current 100 µA All VIN = GND, Count Clock = V
HV62208
DD
DD
High-Voltage DC Characteristics
Symbol Parameter Min Max Units Conditions
I
PPQ
I
OUT(p)
I
OUT(n)
Quiescent VPP supply current 100 µA All HV P-channel output current -4.0 mA N-channel output current 4.0 mA
low or high
OUT
AC Characteristics
Symbol Parameter Min Max Units Conditions
f
SC
f
CC
f
DIN
t
CW
t
CSS
t
CSH
t
SCC
t
DSS
t
DSH
t
DW
t
LCW
t
CCW
t
CCC
t
LCD
t
CCD
t
BLW
t
BLD
t
CDD
Shift clock frequency 8.0 MHz Count clock frequency 8.0 MHz Data In frequency 16 MHz Chip select pulse width 80 ns Chip select to shift clock set-up time 15 ns Chip select to shift clock hold time 45 ns Shift clock cycle time 125 ns Data to shift clock set-up time 10 ns Data to shift clock hold time 52 ns Data In pulse width 62 ns Load count pulse width 75 ns Count clock pulse width 62.5 ns Count clock cycle time 125 ns Load count to count clock delay 100 ns Count clock to HV
turn-on/turn-off 600 ns CL = 15pF
OUT
BLANK pulse width 700 ns BLANK to HV
delay 500 ns CL = 15pF
OUT
Count clock delay between count down and 500 ns count up cycles
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Page 3
Recommended Operating Conditions
Symbol Parameter Min Max Units Conditions
V
DD
V
PP
V
NN
V
IL
V
IH
f
SC
f
CC
T
A
Logic supply voltage 4.5 5.5 V Positive high-voltage supply 12 70 V Negative high-voltage supply -8 -10 V Low-level input voltage 0 1 V High-level input voltage VDD–1 V
DD
V Shift clock frequency 8 MHz Count clock frequency 8 MHz Operating temperature -40 +85 °C
Pin Definitions
Pin # Name I/O Function
27-30 D1 – D8 I Inputs for binary-format parallel data 36-29 (D8 is the most significant bit)
34 Shift Clock I Triggers data on both edges 35 Shift Clock I Triggers data on both edges 31 Count Clock I Input to the counter 24 CSI I Chip select input to enable the device to accept data 25 CSO O Chip select output to enable the next device 33 Load Count I Input to initiate the counting 26 Blank I Input to reset the counter and HV
4-19 HV
OUT1
– HV
32 O High-voltage outputs
OUT
46-61 23,43 V 41 V
40 V 22,44 V
PP
(Analog) Low-voltage analog supply voltage
DD
(Digital) Low-voltage digital supply voltage
DD
NN
Positive high-voltage supply
Negative high-voltage supply 20-21 GND (Digital) Digital ground 42 GND (Analog) Analog ground
OUT
HV62208
Input and Output Equivalent Circuits
V
V
DD
Input
GND
Logic Inputs
DD
GND
Logic Data Output
3
Data Out
V
PP
V
NN
High Voltage Output
HV
OUT
Page 4
Functional Block Diagram
HV62208
8 Bit
Data In
>
Latch 1
>
Latch 2
>
Latch 3
>
Latch 32
>
>
>
Data
Data
Data
Data
Logic
V
L/T
L/T
L/T
L/T
Count
Clock
PP
V
NN
8
8
8
8
8
>
Comparator
& Latch 1
8
Comparator
& Latch 2
8
Comparator
& Latch 3
8
≈≈
Comparator
& Latch 32
8
8 Bit
Counter
>
>
>
Logic
Logic
Logic
Logic
>
V
PP
HV
1
OUT
2
HV
OUT
3
HV
OUT
32
HV
OUT
V
NN
+
Shift
Clock
Shift Clock
Timing Diagrams
CSI
Shift
Clock
CSO
LC
1234 16
CSOCSI
Load
Count
VALID DATA
Blank
L/T = Level Translator
1234
VALID DATA
16
Count
Clock
HV
OUT
4
11
11
252 253 254 255255 254 253 252
252 253 254 255255 254 253 252
Page 5
Timing Diagrams
t
CW
DATA
SC1
t
t
CSH
DSH
50%
DATA SET 2
50% 50%
CSI
Shift
Clock
Data
1–8
Load
Count
Count
Clock
t
CSS
50%
t
DSS
50%
SET 1
LOADING LAST DEVICE NEXT LOADING CYCLE
t
SCC
SC2 SC16 SC1 SCN
DATA SET 3
t
DW
t
LCW
DATA
SET 31
DATA
SET 32
DATA SET 1
DATA SET 2
t
LCD
t
CCW
50%50% 50% 50%
t
CCC
DATA
SET 2N -1
50%
DATA
SET 2N
HV62208
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
HV
OUT
BLANK
HV
OUT
Count
Clock
t
t
BLD
255 254
BLW
90%
3 3221
t
CCD
90%
10% 10%
50%50%
t
CCD
t
CDD
50% 50%
1
90%
V
PP
V
NN
V
IH
V
IL
V
PP
V
NN
V
IH
V
IL
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Page 6
HV62208
Pin Configurations
Pin Function
1 N/C 2 N/C 3 N/C 4HV 5HV 6HV 7HV 8HV 9HV
10 HV
11 H V 12 HV 13 HV 14 HV 15 HV 16 HV 17 HV 18 HV 19 HV
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
32 20 GND (Digital) 21 GND (Digital) 22 V
NN
23 V
PP
24 CSI 25 CSO 26 Blank 27 D1 28 D2 29 D3 30 D4 31 Count Clock 32 N/C
Pin Function
33 Load Count 34 Shift Clock 35 Shift Clock 36 D5 37 D6 38 D7 39 D8 40 V 41 V 42 GND (Analog) 43 V 44 V 45 N/C 46 HV 47 HV 48 HV 49 HV 50 HV 51 HV 52 HV 53 HV 54 HV 55 HV 56 HV 57 HV 58 HV 59 HV 60 HV 61 HV 62 N/C 63 N/C 64 N/C
(Digital)
DD
(Analog)
DD
PP
NN
1
OUT
2
OUT
3
OUT
4
OUT
5
OUT
6
OUT
7
OUT
8
OUT
9
OUT
10
OUT
11
OUT
12
OUT
13
OUT
14
OUT
15
OUT
16
OUT
Package Outline
1
Index
24
25
top view
3-sided Plastic 64-pin Gullwing Package
40
64
41
©2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
02/06//02
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
6
www.supertex.com
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