Page 1
HA13614FH
Combo (Spindle & VCM) Driver
ADE-207-246D (Z)
Preliminary
5th Edition
October 1998
Description
This COMBO driver for HDD application consists of sensorless spindle driver and BTL type VCM driver.
“PWM soft switching function” for low power dissipation and less commutation acoustic noise at the same
time is implemented by using the IPIC* process.
Note: I ntelligent P ower IC
Features
• PWM soft switching drive
• Small surface mount package: FP-48T
• Low thermal resistance: 30°C/W with 4 layer multi glass-epoxy board
• Low output on resistance
Spindle 1.2 Ω Typ
VCM 1.4 Ω Typ
• TTL compatible input level (with 3.3 V logic interface)
• High precision reference voltage output (for 3.3 V power supply)
Functions
• 16 bit serial port
• 2.0 A Max/3-phase spindle motor driver with PWM soft switch function
• 1.5 A Max BTL VCM driver with low crossover distortion
• PWMDAC for VCM drive current control
• Power off brake function for spindle motor
• Auto retract with constant output voltage
• Booster
• Internal Protector (OTSD, LVI)
• Precision power monitor
• OP amplifier
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HA13614FH
Pin Arrangement
OP1OUT
OP1IN(−)
OP2IN(+)
Vss
OP2OUT
PC
TABGND
VCMPS
VCMN
Rs
VCMIN
VCMP
VCMSLC
POR
LVI1
DELAY
DACOUT
VREF
BC2
VIPWMH
Vpsv
VBST
48 47 46 45 44 43 42 41 40 39 3738
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
BC1
RETSET
RETPOW
TABGND
TABGND
VIPWML
12VGOOD
U
BRKDLY
DATA
SEENAB
V
RNF
SCLK
CLK
BRK
LVI2
36
COMM
35
PHASE
34
SPNCTL
33
UFLT
32
NFLT
31
VpsIN
30
VpsOUT
29
FLTOUT
28
Vpss
27
W
26
ISENSE
25
CT
TABGND
(Top View)
2
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HA13614FH
Pin Description
Pin No. Pin Name Function
1 OP1OUT Output of OP amp. 1
2 OP1IN(–) Inverted input of OP amp. 1
3 OP2IN(+) Non-inverted input of OP amp. 2
4 Vss Power supply for +5 V
5 OP2OUT Output of OP amp. 2
6 PC External time costant connection terminal for phase compensation of VCM
driver
7 VCMPS Current sensing terminal for VCM driver
8 VCMN Output of VCM driver (Inverted output of VCMP)
9 Rs Current sensing terminal for VCM driver (differential input for VCMPS)
10 VCMIN Input of VCM driver (differential input for VREF)
11 VCMP Output of VCM driver (inverted output of VCMN)
12 VCMSLC External capacitor connection terminal for stabilizing internal reference
voltage of VCM driver
13 RETPOW Power supply terminal of retract driver
14 RETSET Output voltage set up terminal of retract driver
15 BC1 External capacitor connection terminal for pumping of booster
16 BC2
17 Vpsv +12 V power supply for VCM driver
18 VBST Output of booster circuit
19 BRKDLY Time constance set up terminal of delayed brake
20 U U-phase output of spindle motor driver
21 V V-phase output of spindle motor driver
22 RNF Current sensing terminal for spindle motor driver
23 BRK External capacitor connection terminal for power off brake
24 LVI2 Resistor connection terminal for set up the threshold of +3.3 V power monitor
25 CT Center tap connection terminal for spindle motor
26 ISENSE Input of PWM comparator
27 W W-phase output of spindle motor driver
28 Vpss +12 V power supply for spindle motor driver
29 FLTOUT PWMDAC output for current control of spindle motor driver
30 VpsOUT Output of power supply switch
31 VpsIN Input of power supply switch (+12 V)
32 NFLT Output of pre-filter for B-EMF sensing (capacitor connection terminal)
33 UFLT
3
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HA13614FH
Pin Description (cont)
Pin No. Pin Name Function
34 SPNCTL PWMDAC input for current control of spindle motor driver
35 PHASE Toggle signal output for zero-crossing timing of B-EMF
36 COMM Commutation signal input for spindle motor driver during synchronous driving
37 CLK Master clock input of commutation logic circuit
38 SCLK Clock input of serial port for data strobe
39 SEENAB Enable signal input of serial port
40 DATA Data signal input of serial port
41 12VGOOD Output of power monitor for +12 V power supply (open drain)
42 VIPWML PWMDAC input for current control of VCM driver
43 VIPWMH
44 VREF Output of internal reference voltage
45 DACOUT PWMDAC output for current control of VCM driver
46 DELAY Capacitor connection terminal for set up the power on reset time
47 LVI1 Resistor connection terminal for set up the threshold of +12 V power monitor
48 POR Output of power on reset signal
TAB GND Ground of this IC
4
Page 5
Block Diagram
C113
37
C101
UFLT
33
NFLT
FLTOUT
C1
SCLK
DATA
32
36COMM
35PHASE
SPN
GAIN
34
29
1.4V ref.
2
1OP1OUT
3OP2IN(+)
5OP2OUT
10VCMIN
VREF
44
VIPWMH
43
VIPWML
42
DACOUT
45
38
40
39
C102
SPNCTL
(TESTOUT)
C103
OP1IN(−)
C104
SEENAB
1
128
B-EMF
Amps
Input
OP Amp.1
+
−
Serial
input
RESET
Vss (+5V)
Vss
4
CLKCLK
filter
PWM
decoder
STANDBY
(+12V)
C112 C116
23
BRK
BRAKE
POR
OTSD
CLK
EXTCOM
Selector
Commutation
B-EMF
PWMOUT
MASK
TEST
OP Amp.2
+
−
Vref(=5.3V)
SPNENAB
EXTCOM
BRAKE
VCMENAB
SOFTSW
TEST
SPNGAIN
Vps
BIAS
LVI1 LVI2
47
R101 R107
R102 R108
R109
Brake
control
logic
19
BRKDLY
Current
control
(PWM)
VCMENAB
Vps Vss
Vss
24
Vps (+12V)
C111
VpsIN31VpsOUT
V
BST
+
VCM
driver
−
POW DWN
Power
monitor2
Power
monitor1
DELAY
Vdd
(+3.3V)
C117
30
V
V
BST
Retract
driver
P
N
OTSD
POR
delay
CLK
46
BC1 BC2
C105
28
BST
Spindle
driver
Booster
15 16TAB
Vpss
U
V
W
VCMSLC
VCMP
VCMN
VCMPS
C106
PC
V
Rs
BST
HA13614FH
C114
CT
25
U
20
V
21
W
27
RNF
22
ISENSE
26
Vpsv
17
RETPOW
13
RETSET
14
12
11
6
R104 C108
8
7
9
41
12VGOOD
(Open Drain)
POR
(L: RESET)
48
VBST
18
C115
C109
R
NF
C110
R106
R105
Vss (+5V)
Vss (+5V)
C107
R
S
R
R103
L
R110
5
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HA13614FH
Serial Port
Construction
SEENAB
SCLK
DATA
Note: When POR = Low, internal RESET signal becomes High and when RESET = High,
all bit of serial port are set up default value as shown in table 2.
Serial
RESET *
port
D0 to D15
to each block
Figure 1 Construction of Serial Port
Table 1 Truth Table of Internal RESET Signal
Input Output Note
POR RESET
Low High 1
Open Low 1
Note: 1. When +5 V or +3.3 V power supply goes to Low, then POR = Low.
POR output is able to construct the wired logic with external signal.
Input Data
MSB LSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Figure 2 Input Data
The serial port is required the 16 bits data (D0 to D15). When the data length is less than 16 bits, the
internal register will not be up dated. And when the data length is more than 16 bits, this register will take
later 16 bits and ignore the faster bit.
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HA13614FH
Bit Assingnment
Table 2 Bit Assingnment of Serial Port
Bit Symbol 1 (= High) 0 (= Low) Default Note
D0 STANDBY Active Stand by 0 1
D1 VCMENAB VCM enable VCM disable 0 1
D2 SPNENAB Spindle enable Spindle disable 0 1
D3 BRAKE Brake enable Brake disable 0 1
D4 SENSEN B-EMF sense enable B-EMF sense disable 0 2
D5 VARCNT Variable count Normal count 0 2
D6 EXTCOM External commutation Internal commutation 0 2
D7 SRCTL1 High slew rate Low slew rate 0 3
D8 SRCTL2 Commutation time select (See table 4) 0 4
D9 SRCTL3 0 4
D10 OFFTIME1 Off time select of PWM drive (See table 5) 0 5
D11 OFFTIME2 0 5
D12 SPNGAIN High gain Low gain 0 6
D13 RETRACT Retract Not retract 0 1
D14 TEST1 For testing 0 7
D15 TEST2 0 7
Note: 1. The priority of operation for each bit is as shown in table 3.
2. This bit is using for start up of spindle motor. Please refer to the application note explained
about start up of spindle motor.
3. The slew rate during every commutation of spindle motor is selectable by using this bit. Please
select the suitable value of this bit for your motor.
4. This bit is used for setting up the commutation time (refer to figure 9) of spindle motor as shown
in table 4.
5. This bit is used for setting up the off time at PWM driving of spindle motor as shown in table 5.
6. The gain of current control for spindle motor is selectable by using this bit. Please select the
suitable value of this bit for your motor.
7. This bit will be used in fabrication test. Please set up D15 = “0” normally.
SPNCTL terminal (pin 35) is using for output terminal in the case of “1” for testing. Then please
do not input signal into pin 35 from outside.
7
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HA13614FH
Table 3 Truth Table
Input Driver Output
OTSD 12VG OOD
Enable Low ×*
Disable Low ЧЧЧЧЧBraking Cut off On Cut off
Disable High Low ××××Braking Cut off Cut off Cut off
Disable High High 0 0 0 0 Cut off Cut off Cut off On
Disable High High 0 1 0 0 Braking Cut off Cut off On
Disable High High 1 × 0 0 On Cut off Cut off On
Disable High High 0 0 0 1 Cut off On Cut off O n
Disable High High 0 1 0 1 Braking On Cut off On
Disable High High 1 × 0 1 On On Cut off O n
Disable High High 0 0 1 × Cut off Cut off On On
Disable High High 0 1 1 × Braking Cut off On On
Disable High High 1 × 1 × On Cut off On On
1
*
Note: 1. The 12VGOOD terminal is open drain output type. The 12VGOOD signal output is determined by
the power monitor output for 12 V power supply, POR output and OTSD signal as shown in the
table below.
STAND BY SPNENAB BRAKE RETRACT VCMENAB Spindle
2
××××Braking Cut off On Cut off
Driver
VCM
Driver
Retract
Driver
Power
Switch
12 V Supply POR OTSD 12VGOOD
Cut off ××Low
× Low × Low
××Enable Low
Normal High Disable High
2. The symbol “×” means “Don’t care”.
Table 4 Commutation Time
SRCTL2 SRCTL3 Commutation Time (s)
0 0 24 × (128 / fclk)
0 1 16 × (128 / fclk)
1 0 12 × (128 / fclk)
1 1 No slew rate control
Note: The “fclk” is the frequency on pin “CLK”. (Recommendation: 20 MHz)
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HA13614FH
Table 5 OFF Time at PWM Drive
OFFTIME1 OFFTIME2 OFF Time (s)
001 × (32 / fclk) + (4 / fclk)
012 × (32 / fclk) + (4 / fclk)
103 × (32 / fclk) + (4 / fclk)
114 × (32 / fclk) + (4 / fclk)
Data Input Timing
SEENAB
SCLK
DATA
CLK
Note:
Data input timing (Latch point, Up date point) is
determined by CLK as shown above, and t1
requires two or more clock pulse.
Vth (= 2.4V Typ)
t0 t2
Vth
Vth
D11D12D13D14D15
D10 D9
Figure 3 Input Timing of Serial Port
t3
t4
D8 D7 D6 D5 D4 D3 D2 D1 D0
t0: ≥ 20ns
t2: ≥ 40ns
t3: ≥ 40ns
t4: ≥ 40ns
Up date point
Latch point
t1
9
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HA13614FH
Timing Chart
Power on Reset (1)
Vsd
Vpss, Vss
and Vdd
Vhys
t
POR
12VGOOD
1.0V
Max
0
Note: 1.2.Please refer to external components table about how to determine the threshold voltage
Vsd and delay time t
Operation for Vss.
*2
por
t
por
*2
.
Figure 4 Operation of the Power Monitor (1)
Power on Reset (2)
Vpss, Vss
or Vdd
POR
12VGOOD
Spindle
Driver
VCM
Driver
ON
OFF
ON
OFF
t
por
t
por
<1µs <1µs
t
Retract
Driver
Note: This retract driver requires the electrical power from B-EMF of spindle motor.
Figure 5 Operation of the Power Monitor (2)
10
Retract
Page 11
Power on Reset (3)
Vss
Vps
HA13614FH
POR
12VGOOD
Spindle
Driver
VCM
Driver
Retract
Driver
ON
OFF
ON
OFF
ON
OFF
t
por
t
por
Figure 6 Operation of the Power Monitor (3)
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HA13614FH
Power Off Retract & Brake
Vps
GND
Vpss
GND
POR
GND
ON
Power
SW
OFF
U
GND
V, W
GND
VCMP
GND
VCMN
GND
Note: Please see the External Component table about setting delay time t
Normal
operation
Normal
operation
Retract off
VCM on
Retract off
VCM on
t
BRKDLY
Cut off
Vretout
Vretsat
Braking
*
Figure 7 Operation of Power Off Retract & Brake
BRKDLY
t
.
12
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Start-up of the Spindle motor
• Not using external commutation mode
SPNENAB
HA13614FH
EXTCOM
COMM
PHASE
IU
IV
IW
• Using external commutation mode
SPNENAB
EXTCOM
COMM
0
0
0
Low
Synchronous driving*
B-EMF sensing driving
PHASE
IU
IV
IW
Note: “Synchronous driving” is defined as the period after changing SPNENAB = L to H until
0
0
0
Synchronous driving*
the first positive edge of the PHASE signal.
B-EMF sensing driving
Figure 8 Start-up of the Spindle Motor
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HA13614FH
Commutation Timing of the Spindle motor
UVW
B-EMF
PHASE
(EXTCOM=0)
*1
PHASE
(EXTCOM=1)
OUTPUT
IU
tspndly
*2
PWM PWM
tsrctl
commutation
time
B-EMF
PWM
*3
CT
Vpss
Vpss/2
GND
0
Note: 1.
14
In the case of external commutation mode (EXTCOM=1), the signal PHASE will toggle at every BEMF zero-crossing, and selected the internal commutation mode (EXTCOM=0), the PHASE will
have the same period as B-EMF of the spindle motor.
2.
This is delay time by pre-LPF of the B-EMF amplifier. This delay time can be adjust by the value
of external filter capacitor C101, C102. To get the maximum driving efficiency of the spindle
motor, these capacitor value should be chosen as equation (17) in the “External components”
section.
3.
The slew rate of every commutation timing is controllable by changing the SRCTL1, SRCTL2 and
SRCTL3 in the serial port.
Figure 9 Commutation Timing of the Spindle motor
Page 15
Application
MPU
R2
C1
Vss
(+5V)
to MPU
C116
R109
C112
C101
C102
C103
R3
C2
C105
Vss
R110
C3
C104
C113R103
BRKDLY
19
23
BRK
UFLT
33
NFLT
32
29
FLTOUT
41
12VGOOD
PHASE
35
34
SPNCTL
36
COMM
CLK
37
SCLK
38
DATA
40
SEENAB
39
VIPWMH
43
VIPWML
42
OP2IN(+)
3
OP2OUT
5
VCMIN
10
DACOUT
45
VREF
44
OP1IN(−)
2
OP1OUT
1
Vss
4
POR
48
DELAY
46
C111
31
VpsIN
VpsOUT
RETPOW
VCMSLC
RETSET
HA13614FH
TAB
Vpss
CT
RNF
ISENSE
Vpsv
VCMP
VCMPS
PC
VCMN
Rs
LVI1
LVI2
BC1
BC2
VBST
HA13614FH
Vps
(+12V)
30
28
C114
25
U
20
V
21
W
27
22
RNF
26
13
C110
17
12
14
11
47
24
15
16
18
7
6
8
9
C115
R104
C107
R106
R105
C108
C109
R
S
C106
R
L
R107
R108 C117
R101
R102
Vdd
(+3.3V)
15
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HA13614FH
External Components
Recommendation
Parts No.
R101 — Set up threshold of power monitor for Vps 1
R102 —
R103 ≥ 5.6 kΩ Pull up for POR terminal
R104 — Gain dumping for VCM driver 5
R105 — Set up output voltage of retract driver for pin VCMP 6
R106 —
R107 — Set up threshold of power monitor for Vdd 1
R108 —
R109 — Set up time constance of delayed brake 12
R110 ≥ 5.6 kΩ Pull up for 12VGOOD terminal
R2 — Filter constant of LPF 3
R3 —
Rnf 0.33 Ω Current sensing for spindle motor 7
R
S
C101, C102 — Pre-filter of B-EMF amplifier 10
C103 — Filter of PWMDAC for current control of spindle motor 9
C104 0.1 µF Filter of internal reference output
C105 0.1 µF Set up delay time of POR signal 8
C106 0.22 µF Boost up of power supply
C107 2.2 µF Stabilizing boost up voltage
C108 — Gain dumping for VCM driver 5
C109 0. 1 µF Stabilizing reference voltage of VCM driver
C110 0.1 µF By passing of power supply
C111 0.1 µF
C112 — Keeping brake function 12
C113 0.1 µF By passing of power supply
C114 0.1 µF
C115 — Stabilizing output voltage of retract driver for pin VCMP 11
C116 — Set up time constance of delayed brake 12
C117 0.1 µF Stabilizing LVI2 terminal
C1 — Filter constant of LPF 3
C2 —
C3 —
Value Purpose Note
0.47 Ω Current sensing for VCM 4
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HA13614FH
Notes: 1. The operation threshold voltage of Vps or Vdd is determined by resistor R101, R102 or R107,
R108 as follows.
POR
(for Vdd)
12VGOOD
(for Vps)
• for Vps
Recovery
voltage
Vdwn Vup
Vup(Vps) = (Vsd1 + Vhys3) ⋅ 1 + [V]
R101
R102
Vps
(1)
Cut off
voltage
Vdwn(Vps) = Vsd1 ⋅ 1 + [V]
R101
R102
(2)
where, Vsd1 : Operating voltage of the power monitor [V] (refer to Electrical Charasteristics)
Vhys3: Hysteresis voltage of the power monitor [V] (refer to Electrical Charasteristics)
• for Vdd
Recovery
voltage
Cut off
voltage
Vup(Vdd) = (Vsd1 + Vhys4) ⋅ 1 + [V]
Vdwn(Vdd) = Vsd1 ⋅ 1 + [V]
R107
R108
R107
R108
(1)’
(2)’
where, Vhys4: Hysteresis voltage of the power monitor [V] (refer to Electrical Charasteristics)
2. The relation between PWMDAC input VIPWMH, VIPWML for VCM driver current control and VCM
driver input (VCMIN – VREF) is determined by following equation. (refer to below figure)
VCMIN − VREF = ⋅ (64 ⋅ DPWMH + DPWML) − 3.2
6.4
6500
(3)
where, VREF : Internal reference voltage [V] (refer to Electrical Charasteristics)
DPWMH : Duty of input signal on terminal VIPWMH [%]
DPWML : Duty of input signal on terminal VIPWML [%]
VREF
VIPWMH
VIPWML
R1L
DACOUT
R1H R2C2R3
R1=R1L//R1H//R0
=740Ω
R0
VREF
5.3V
C1
OP2IN(+) OPAmp.2
C3
GND
OP2OUT
VCMIN
+
−
R4
R5/R4=0.604
R5
5.3V
VREF
to VCM driver
VCMIN
5.3±3.2V
3. The 3rd order LPF at next stage of PWMDAC is characterized by internal OP amp. and capacitor
C1, C2, C3 and resistor R2, R3. These components value are determined by following equations.
C1 = [F]
1
2 ⋅ π ⋅ fc ⋅ R1
(4)
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HA13614FH
C3 = 220 ⋅ 10
C2 = ⋅ C3⋅ [F]
R2 = ⋅ [Ω]
R3 = R2 [Ω]
R5
k = = 0.604
R4
−12
1
4 ⋅ k + 1 − 8 ⋅ k + 1
2
[F]
2
k
k
4 ⋅ k + 1 − 8 ⋅ k + 1
2
2 ⋅ π ⋅ fc ⋅ C3
(5)
(6)
(7)
(8)
(9)
where, fc : Cut off frequency of 3rd order LPF [Hz]
R1 : Output resistance of PWMDAC [Ω] (refer to Electrical Characteristics)
4. The driving current of VCM Ivcm is determined by following equation.
Ivcm = ⋅ Gvcm [A]
Vvcmin − VREF
R
S
(10)
where, Vvcmin : Input voltage on terminal VCMIN (pin 10) [V]
Gvcm : Transfer function of VCM driver [dB] (refer to Electrical Characteristics)
5. Capacitor C108 and resistor R104 are useful to dump the gain peaking of VCM driver. These
components also determine the gain band width of VCM driver BW1 which should be chosen less
than 10 kHz, as follows.
R104 = [kΩ]
12π ⋅ BW1 ⋅ Lvcm
R
S
(11)
C108 = ⋅ [F]
where, R
Lvcm
R
S
L
+ R
1
R104
L
: Coil resistance of VCM [Ω]
(12)
Lvcm : Coil inductance of VCM [H]
6. Retract current Iret is determined by following equation.
0.7 × 1 + − Vretsat
Iret = [A]
R105
R106
R
S
+ R
L
(13)
Vretsat : Output saturation voltage of retract driver [V]
(refer to Electrical Characteristics)
7. The relation between duty of input signal on terminal SPCNTL (pin 34) and output current of
spindle motor driver Ispn is as follows.
Ispn = ⋅ duty [A]
Vref − Voff1
Rnf
(14)
Vref : Reference voltage of current control amplifier [V]
Vref = Vref2 (@SPNGAIN = 1)
Vref = Vref3 (@SPNGAIN = 0)
Voff1 : Offset voltage of current control amplifier [V]
(refer to Electrical Characteristics)
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HA13614FH
8. The delay time of the power monitor for start up is as follows.
tpor = 140 ⋅ C105 [ms]
9. The cut off frequency fcpwm of the filter for current control input of the spindle motor is as
follows.
fcpwm = [Hz]
1
2π × 20k ⋅ C103
10.To get the maximum driving efficiency for spindle motor, the capacitor C101, C102 should be
chosen as following equation.
C101 = 0.8 ⋅ C102
(15)
(16)
(17-1)
C102 = ⋅ [F]
tan(π/6)
2π ⋅ 13k
1
fbemf
(17-2)
fbemf : Back EMF frequency at standard rotation speed of the spindle motor [Hz]
where, please set the value of C101, C102 so that C101 < C102 can be kept including the
accuracy of the absolute value to assure the stability of motor starting and speed lock state.
11.To stabilize output voltage od retract driver, the capacitor C115 should be chosen as following
equation. Please chose same values for C115.
−6
C115 =
12.Time t
BRKDLY
3 ⋅ 10
2π ⋅ (R105 // R106)
[F]
(18)
of the delayed brake of V, W phase for retract is determined by resistor R109 and
capacitor C112, C116 as following equation.
BRKDLY
1 +
C116
C112
C116 ⋅ R109
= −⋅ ln 1 −
t
Vthb
V
BRK0
⋅ 1 +
C116
C112
[s]
(19)
where, Vthb : Threshold voltage that output MOS transistor of spindle motor driver is
operated.
V
= Vpss – 0.7 [V]
BRK0
Vpss : +12 V power supply for spindle motor driver
and, please select capacitor C112 and C116 that the ratio of C112/C116 is more than 3 times,
because the last voltage of BRK and BRKDLY terminals falls if the value of C116 is big for C112,
and effect of brake goes down.
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HA13614FH
Absolute Maximum Ratings
Item Symbol Rating Unit Note
Power supply Vss 6.0 V 1
Vpss 15 V 2
Vpsv 15 V 2
Spindle current Ispn 2.0 A 3
VCM current Ivcm 1.5 A 3
Input voltage Vin –0.33 to Vss +1.0 V 4
Power dissipation P
T
Junction temperature Tj 150 °C6
Storage temperature Tstg –55 to +125 °C
Notes: 1. Operating voltage range is 4.25 V to 5.5 V. If power supply voltage exceed this operating range
in actual application, the reliability of this IC can not be guaranteed.
2. Operating voltage range is 10.2 V to 13.8 V.
3. ASO (Area of Safety Operation) of each output transistor is shown in figure 10.
Operating locus must be within the ASO.
4. Applied to CLK, COMM, SPNCTL, VIPWMH, VIPWML, SCLK, DATA and SEENAB.
5. Thermal resistance θj-a ≤ 30°C/W (Using 4 layer glass epoxy board)
6. Operating junction temperature range is 0°C to +125°C.
5.0 W 5
10
2.0
1.0
IDS (A)
0.10
11015100
for Spindle motor driver for VCM driver
t = 1 ms
t = 10 ms
t = 100 ms
VDS (V)
Figure 10 ASO of Output Transistor
10
t = 1 ms
1.5
1.0
IDS (A)
0.10
110
VDS (V)
t = 10 ms
t = 100 ms
15
100
20
Page 21
HA13614FH
Electrical Characteristics (Ta = 25°C, Vss = 5 V, Vpss = Vpsv = 12 V)
Item Symbol Min Typ Max Unit Test Conditions
Supply current Iss0 — 2.0 3.4 mA Stand by,
fclk=20MHz
Iss1 — 3. 2 4.2 mA fclk=20MHz
Ips0 — 1.6 2.4 mA Stand by Vpss & Vpsv 1
Ips1 — 42 56 mA
Power
switch
Logic
input
Logic
output1
Logic
output2
Output on
resistance
Output
leacage
current
Input low
current
Input high
current
Input low
voltage
Input high
voltage
Clock
frequency
Output high
voltage
Output low
voltage
Output
leakage
current
Output low
voltage
Ron0 — 0.2 0.3 Ω VpsIN
Icer0 — — ±10 µA VpsOUT=15V,
VpsIN=0V,
Vss=0V,
Vpss=Vpsv=0V
Iil1 — — ±10 µA Vil=0V CLK,
Iih1 — — ±10 µA Vih1=5V SCLK ,
Vil1 — — 0.8 V SEENAB,
Vih1 2.0 — — V VIPWML,
fclk 19 — 21 MHz
Voh1 4.6 — — V Ioh=1mA PHASE
Vol1 — — 0.4 V Iol=2mA
Icer1 — — ±10 µA Vo=5.5V POR,
Vol2 — — 0.4 V Iol=2mA
Applicable
Pins Note
Vss
VpsOUT
COMM,
DATA,
VIPWMH,
SPNCTL
5
12VGOOD
21
Page 22
HA13614FH
Electrical Characteristics (Ta = 25°C, Vss = 5 V, Vpss = Vpsv = 12 V) (cont)
Applicable
Item Symbol Min Typ Max Unit Test Conditions
Spindle
motor
driver
B-EMF
amp.
Output on
resistance
On resistance
during braking
Output
leakage
current
Output clamp
diode forward
voltage
Output MOS
operating
threshold
voltage
Leakage
current on
brake terminal
Input filter &
current control
amp.
Current
control amp.
offset voltage
Input offset
voltage
Input
hysteresis
voltage
Ron1 — 1.2 1.5 Ω Io≤1.5A U, V, W 2
Ron2 — — 3.0 Ω Io=0.4A,
BRK=3V
Icer3 — — ±2 mA Vo=15V
Vf — 0.9 1.2 V If=0.5A
Vthb — 2 — V Ron=(Ron/2)×10
Icer4——0.6µA Vpsv=GND,
Vo=8V
Vref2 — 49 0 ±10% mV SPNGAIN=1,
SPNCTL=Vss
Vref3 — 25 0 ±10% mV SPNGAIN=0,
SPNCTL=Vss
Voff1 — –10 ±20 mV SPNCTL=GND
Voff2 — — ±20 mV Synchronous drive U, V, W,
Voff3 — — ±20 mV B-EMF sens drive
Vhys1 70 90 11 0 mVp-p Synchronous drive
Vhys2 35 45 55 mVp-p B-EMF sens drive
Pins Note
BRK,
BRKDLY
ISENSE,
FLTOUT
UFLT,
NFLT
22
Page 23
HA13614FH
Electrical Characteristics (Ta = 25°C, Vss = 5 V, Vpss = Vpsv = 12 V) (cont)
Applicable
Item Symbol Min Typ Max Unit Test Conditions
VCM
driver
PWM
DAC
Retract
driver
Output on
resistance
Output
leakage
current
Output
quiescent
voltage
Transfer gain Gvcm — –18 — dB VCMPS, Rs 4
Gain band
width
Input
resistance
Input
minimum
pulse width
Output
resistance
Output voltage Vo1 — 0.4 ±10% V VIPWMH=High,
Output offset
voltage
Gain ratio Rat — 64 ±2% — Rat=VIPWMH/
Reference
voltage
Retract driver
output voltage
VCMN output
saturation
voltage
Ron2 — 1.4 1.8 Ω Io≤1.0A VCMP,
Icer5 — — ±2 mA Vo=15V
Vq — Vpsv/2 ±5% V RS=0.47Ω, RL=10Ω,
L=2mH,
R104=1.6MΩ,
C108=120pF
BW1 — 10 — kHz
Rin — 60 ±30% kΩ VCMIN
Tpwm 50 — — ns VIPWMH,
R1 — 740 ±30% Ω FLTOUT
VIPWML=High
Vo2 — 0.4 ±10 % V VIPWMH=Low,
VIPWML=Low
Voff4 — — ±10 mV
VIPWML
Vref — 5.3 ±5 % V Io=±1mA VREF
Vretout — 1.0 ±8% V Vpss=6.0V,
R105=13k Ω,
R106=33k Ω,
RL=10 Ω, RS=0.47 Ω
Vretsat 0 . 1 0. 2 0.4 V VCMN
Pins Note
VCMN
VIPWML
VCMPS, Rs 3
VCMP
2
23
Page 24
HA13614FH
Electrical Characteristics (Ta = 25°C, Vss = 5 V, Vpss = Vpsv = 12 V) (cont)
Applicable
Item Symbol Min Typ Max Unit Test Conditions
Power
monitor
OP
amp.1
OTSD Operating
Operating
voltage
Hysteresis Vhys3 — 60 — mV LVI1
Cut off voltage Vsd2 4.1 — — V Vss
Recovery
voltage
POR delay
time
Output
resistance
Output
maximum
current
Output voltage
deviation
Input bias
current
Gain band
width
temperature
Hysteresis Thys — 25 — °C
Vsd1 — 1.415 ±3% V LVI1, LVI2
Vhys4 — 30 — mV LVI2
Vrec — — 4. 4 V
tpor 10 14 2 0 ms C105=0.1µF POR
Rout2 — — 10 Ω Shorted between
OP1OUT and
OP1IN(–)
Iomax1 — — ±1mA
Vdev — 1.415 ±3% V
IB1 — — ±10 nA OP1IN(–)
BW2 — 1.0 — MHz OP1OUT
Tsd 125 150 — °C4
Note: 1. Specified by sum of supply current to Vpss and Vpsv terminal.
2. Specified by sum of saturation voltage and lower saturation voltage.
3. Specified by differential voltage on both side of R
at shorting between DACOUT and OP2IN(+),
S
and between OP2OUT and VCMIN, respectively.
4. Guaranteed by design.
5. The 12VGOOD terminal is open drain output type.
Pins Note
OP1OUT
24
Page 25
Package Dimensions
17.2 ± 0.2
36
37
17.2 ± 0.2
48
1
2.425
4.85
14
25
12
13
24
HA13614FH
Unit: mm
0.65
4.85
2.425
0.30 ± 0.08
0.06
0.27 ±
0.825
2.925 2.925
0.10
Dimension including the plating thickness
Base material dimension
0.13
2.7
0.10 ±0.07
M
3.05 Max
0.17 ± 0.05
0.15 ± 0.04
2.925
Hitachi Code
JEDEC
EIAJ
Weight
0.825
0.8 ± 0.3
(reference value)
1.6
2.925
FP-48T
1.2 g
0° − 8°
25
Page 26
Cautions
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Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
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received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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