Datasheet HA13566AF Datasheet (HIT)

Page 1
HA13566AF
Combo (Spindle & VCM) Driver
ADE-207-250 (Z)
1st Edition
December 1997
Description
The HA13566AF is combination of Spindle and VCM Driver designed for HDD and have following functions and features.
1.0 A max/3-phase spindle motor driver
400 mA max VCM driver
100 mA max retract driver
11 bit serial interface
9 bit DAC for VCM control
Commutation logic for sensor-less motor
Center tap pull-up driver for half wave driver
Soft switching matrix
Charge pump
Booster
Power monitor
OTSD
Features
Low output saturation voltage
Spindle driver 1.0 V typ (@0.8 A)
0.2 V typ (@0.1 A)
VCM driver 1.0 V typ (@400 mA)
Soft switching drive
Minimum surface mount package body size 7 × 7 mm
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HA13566AF
Pin Arrangement
LVI1
RETOUT
RETPOW
SPNCOMP
VREF2
CDELAY
R VCMN VCMP
CT
W
R
NF
PCOMP
18
19
20
21
S
22 23 24
TAB
25
V
26 27 28
123
U
VCMIN
TAB
TAB
CC2
V
(Top view)
16 15
17
TAB
456
VB
BC1
14 13 12 11
10
9 8 7
BC2
DACOUT POWGOOD CHAGPMP DATA
CLK SERENAB
COMM PHASE
2
Page 3
Block Diagram
HA13566AF
V
CC2
3
C101
PHASE
COMM
CHAGPMP
VREF2 (1.25 V)
R1
SPNCOMP
R2
C2
C105
C106
VB
VCMIN
DACOUT
CLK
(10MHz Max)
DATA
SERENAB
C1
12
16
17
14
10
11
B - EMF
Amps
7
8
Commutation
logic
EXTCOM
Center
tap
pull-up
HALF
Charge
pump
5 6
4
SPNENAB
Booster
FBOOST
2
DAC
(9 bit)
Serial port
(11 bit)
9
1.25 V V
CC2
LVI
Soft
switching
matrix
Current
control
RETRACT
POWGOOD
V
CC2
2
SPNENAB BRAKE HALF EXTCOM SOFTSW RETRACT FBOOST
VCMENAB
POR
delay
SOFTSW
BRAKE
V
CC
VCM
Driver
P
N
Spindle
driver
Retract
U
V
W
V
CC2
D0
VCMP
VCMN
1
26
25
24
27
28 18
19
23
22
21
CT
R
NF
C102
PCOMP
RETPOW
C108
RETOUT
R101
R
C103
R103
C104
R104
RS
D1
D2
D3
S
20 15
CDELAY
LVI1
C107
POWGOOD
3
13
TAB
Page 4
HA13566AF
Serial Port
Construction
SERENAB
CLK
DATA
Data construction
Input Data Construction
Serial
port
A0
D0 to D9
Decoder
Figure 1 Serial Port
MD0 to MD9
Mode Control Register
A0 = 1
DD0 to DD9
Input Data Register
for DAC & VCM
A0 = 0
Mode Control
VCM Control
MSB LSB
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0A0
for selecting
register
Register Data
Figure 2 Input Data (1)
The serial port is required the 11 bit data (D0 to D9 and A0). Address bit A0 is used to select the register as follows. When the data length is less than 11 bits, the internal register will not be up dated. And when the data length is more than 11 bits, this register will take late 10 bits and ignore the faster bit.
A0 Register
0 Input data register of DAC & VCMGAIN 1 Mode control register
4
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HA13566AF
Mode Control Register (A0 = 1)
Bit Symbol 1 0 Note
MD0 SPNENAB Spindle enable Spindle disable 1 MD1 BRAKE Brake enable Brake disable 1 MD2 Not use — MD3 HALF Half wave drive Full wave drive MD4 EXTCOM External commutation Internal commutation 2 MD5 SOFTSW Soft switching Switching MD6 VCMENAB VCM enable VCM disable MD7 RETRACT Retracting Not retracting MD8 POLESEL for 12 poles motor for 8 poles motor 3 MD9 FBOOST Low frequency High frequency 4
Notes: 1. The spindle motor is independently winding to the value of the MD2, during the MD1 is true.
2. The bit MD4 select a commutation mode at driving by B-EMF sensing. (See Commutation timing)
3. In order to prevent the misdetection of back-EMF amplifier, the bit MD8 should be chosen as shown above table.
4. The bit MD9 determine the operating frequency of Booster Circuit. According to the frequency of Input CLK at pin 10, the value of MD9 should be chosen as shown below.
CLK (at pin 10) MD9
7.1 MHz to 10 MHz 0
4.0 MHz to 7.0 MHz 1
Input Data Register (A0 = 0) Bit / DD0 to DD9: These input data are used to control the output current at VCM driver as shown follows.
MSB LSB
DD9 DD8 DD7 DD6 DD5 DD4 DD3 DD2 DD1 DD0
VCMGAIN
Input data of DAC
Figure 3 Input Data (2)
5
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HA13566AF
The data bit DD9 determine the transfer gain G
which is specified as the relationship between the input
VCM
data at the input data register and the output current at VCM amplifier. (See the under table)
DD9 DATA IO [mA]
1 1FF +199.2/R
S
1 100 0.000 1 000 –200.0/R 0 1FF +24.9/R
S
S
0 100 0.000 0 000 –25.0/R
S
Data Input Timing
SERENAB
CLK
Vth (= 1/2V
t0 t3 t2
Vth
CC2
Typ)
Up date point
t4 t5
t1
Latch point
DATA
Vth
SERENAB
Internal
DAC output
t6 : Conversion time of DAC 1µs
A0 D9
D8 D7 D6 D5 D4 D3 D2 D1 D0
Figure 4 Input Timing on Serial Port
t6
Figure 5 Conversion Timing on DAC
t0 20ns t1 20ns t2 50ns
t6
t3 40ns t4 40ns t5 40ns
6
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Commutation Timing
Commutation for starting up
HA13566AF
COMM
PHASE
I
U
I
V
I
W
1/f
COMM
Pulsewidth 10µs
Delay
+ 0 –
+ 0 –
+ 0 –
Synchronous
driving by B-EMF sensing
(0.2s to 0.3s)
Note: 1. The frequency of COMM signal f
f
COMM (max)
f
COMM (min)
= 2.5
= 0.5
P · KT · I
P · KT · I
O
J
J
(Hz) (for begin of synchronous driving)
O
(Hz) (2)
Where,
P : Pole number of spindle motor (Hz) K
: Torque constant (kg · cm/A)
T
I
: Start up current (A)
O
J : Moment of inertia (kg · cm · S
can be designed as follows.
COMM
(for end of synchronous driving)
2
)
7
(1)
Page 8
HA13566AF
External Commutation Mode (Full Wave Drive)
UV W
+
B-EMF
PHASE
COMM
U-Current Switching mode
U-Current Soft switching mode
0
0
Delay *2
0
+ 0 –
+
+ 50 %
0
– 50 %
Note: 2. Provided by MPU.
8
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External Commutation Mode (Half Wave Mode)
UV W
+
HA13566AF
B-EMF
(V
CC
PHASE
COMM
U-Current Switching mode
U-Current Soft switching mode
0
)
0
0
+ 0 –
+ 0 –
– 50 %
9
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HA13566AF
Internal Commutation Mode (Full Wave Mode)
UV W
+
B-EMF
PHASE
COMM
U-Current Switching mode
U-Current Soft switching mode
Note: 3. When the internal commutation mode is selected, the commutation of the motor is automatically
0
0
0
*3
+ 0 –
+ 0 –
selected at the B-EMF sensing drive. But don’t open the COMM terminal.
+ 50 %
– 50 %
10
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Internal Commutation Mode (Half Wave Mode)
UV W
+
HA13566AF
B-EMF
PHASE
COMM
U-Current Switching mode
U-Current Soft switching mode
0
0
0
+ 0 –
+ 0
– 50 %
11
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HA13566AF
Application
MPU
V
CC2
C2R2C1
Serial data
C107
C101
R1
V
CC2
SPNCOMP VREF
PHASE COMM
CHAGPMP
POWGOOD CLK
DATA SERENAB
DACOUT VCMIN
CDELAY
TAB
C106C105
Booster
W
CT
R
NF
PCOMP
RETOUT
VCMP
VCMN
R
RETPOW
U V
S
Spindle motor
C102
R101
C103
C104 R104
C108
R
D1 D2 D3
NF
R
R103
S
R
L
12
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HA13566AF
External Component
Parts No. Recommended Value Purpose Notes
R
1
R
2
R
101
R
, R
103
104
R
NF
R
S
C1, C
2
C
101
C
102
C
, C
103
104
C
105
C
106
C
107
C
108
D1, D2, D3 For retract Notes: 1. This integral constants can be designed as follows.
ω
O
47 k Integral constant 1 Integral constant 1 — Set retract current 2
2.2 For stability 0.2 Spindle current sense 3
0.47 VCM current sense — Integral constant 1
0.1 µF Power supply bypass
0.1 µF Phase compensation for spindle driver
0.1 µF For stability
0.47 µF For booster
4.7 µF For booster — POR delay 4 — Retpower filter
2πN
600
O
(3)
=
R R
C
C
J ωO NO R
2
=
9.55Kt Gctl Vref2
1
10 ω
1
1
O
=
1
= 10C
2
NF
(4)
R
2
(5) (6)
Where,
ω
= Time constant of servo loop
O
N
= Rotation number (rpm)
O
J = Moment of inertia (kg cm•s R
= Current sense resistor ()
NF
2
)
Gctl = Control gain (see electrical characteristics) Vref2 = Internal reference voltage (See electrical characteristics)
13
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HA13566AF
2. The retract current is determined as follows.
Iret =
where, R
= VCM coil Resistor.
L
Vsatret = Retout saturation voltage (See electrical characteristics)
3. The motor start up current I
I
= (A)
O
Where, Vref1 = Current limiter reference voltage (See electrical characteristics)
4. The power on reset delay time is determined as follows.
t
= 105•C
POR
Vretpow – Vsatret
R101 + R
+ R
L
Vref1
R
NF
(See electrical characteristics) (9)
107
S
is determined as follows.
O
(7)
(8)
14
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HA13566AF
Absolute Maximum Ratings (Ta = 25°C)
Item Symbol Value Units Notes
Power supply voltage V
CC2
Spindle current Ispn 1.0 A 2 VCM current Ivcm 400 mA 2 Retract current Iret 100 mA 2 Input voltage Vin 0 to V Power dissipation (Ta = 65°C) PT1 1.0 W 3 Power dissipation (Tc = 100°C) PT2 2.0 W 3 Junction temperature Tj 150 °C4 Storage temperature range Tstg –55 to +125 °C
Notes: 1. Operating voltage range is 4.25 V to 5.75 V.
2. ASO of each output transistor is shown below. Operating locus must be with in the ASO.
3. Thermal resistance is shown below.
θj-c 25°C/W θj-a 80°C/W
4. Operating junction temperature range is 0 to +125°C.
7.0 V 1
CC
V
4
(A)
C
1
0.5
Collector Current I
0.1 1510
Collector Emitter Voltage VCE (V)
t = 1 ms
t = 10 ms t = 100 ms
20
Figure 6 ASO of Output Transistor (Spindle Driver)
15
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HA13566AF
4
t = 1 ms
t = 10 ms
(A)
C
1
0.5
Collector Current I
0.1 1510
Collector Emitter Voltage VCE (V)
t = 100 ms
20
Figure 7 ASO of Output Transistor (VCM Driver)
16
Page 17
Electrical Characteristics (Ta = 25°C, VCC = 5 V)
CC
CC
HA13566AF
Item Symbol Min Typ Max Units
Supply current I Logic Input low current I input Input high current I
Input low voltage V Input high voltage V Clock frequency f
Logic output
Output high voltage
Output low voltage V
CC1
IL
IH
IL
IH
CLK
V
OH
OL
15 20 mA Enabl e m ode 3 —0 ±10 µAV ——±10 µAV — 1.5 V
3.5 V ——10MHz
4.4 V IOH=1mA 7, 13
0.4 V IOL=1mA
Test Conditions
=0V 8, 9, 10, 11
IL
=5V
IH
Applicable Terminal Note
Spindle Total saturation Vsatspn 1.0 1.4 V Ispn=0.8A 1, 25, 26 driver voltage 0.2 0.3 V Ispn=100mA
Output leak current Icer1 5 mA MD3=1,
VO=VCC+3V
Current limiter
Vref1 139 155 171 mV RNF=1.0
reference voltage Current control
Gctl –14 –12 –10 dB
gain
B-EMF
Input sensitivity Vmin 50 mVp-p 1, 25, 26 1
amps Charge Input high voltage V pump Input low voltage V
Input high current I Input dead current I Input low current I Output current Charge
IHCP
ILCP
IHCP
IDCP
ILCP
3.5 V 12 — 1.5 V — 150 200 µAV
IHCP
=5V — ±10 µA — –150 –200 µAV
ILCP
=0V +44 +54 +64 µA R1=24k 17
current Discharge
–64 –54 –44 µA R1=24k
current
Output cutoff
Ioff ±50 nA
current
Reference voltage Vref2 1.32 1.39 1.46 V R1=24k 16 VCM VCM input resistor Rin 42 60 78 k 2 driver Output quiescent
voltage
Vq V
CC2
/2 V
+5%
/2
V
/2
2
V 22, 23
2
+10% Output leak current Icer2 ±5mA Total output Vsatvcm 1.0 1.35 V Ivcm=400mA saturation voltage 0.8 1.0 V Ivcm=200mA
17
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HA13566AF
Electrical Characteristics (Ta = 25°C, VCC = 5 V) (cont)
Item Symbol Min Typ Max Units
Test Conditions
Applicable Terminal Note
VCM Resolution Ires 1/512 21, 22, 23 1 driver DAC output
Rout 50 14
resistor Output current full I scale I Gain ratio I
FS1
FS2
FS1
/ I
345 385 425 mA DD9=1, RS= 2, 14 2 45 50 55 mA 1, RL=14
7.5 8.0 8.5
FS2
Offset Ioff1 ±15 LSB DD9=1, RS= 21, 22, 23
Ioff2 ±20 LSB 1, RL=14 Ioff3 ±80 LSB Ioff1×8–Ioff2
Linearity I
LIN
——±1 LSB
Gain Bandwidth B 40 kHz DD9=1, RS=
1, RL=14
95 kHz DD9=0, RS=
1, RL=14
Retract driver
Retpow voltage Vretpow 1.4 V RS=1.0,
RL=14
18
Iret=100mA
Retout saturation
Vsatret 1.0 1.2 V Iret=100mA 19
voltage
LVI Operating voltage Vsd 3.55 3.85 4.15 V 3
Recovery voltage Vrec 3.9 4.2 4.5 V 1
POR Power on reset
POR 5 1020msC
=0.1µF13
107
delay time
OTSD Operating
Tsd 125 150 °C1
temperature Hysteresis Thys 25 °C
Note: 1. Design guide only
2. Specified by shorting between VCMIN and DACOUT.
1
18
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Package Dimensions
9.0 ± 0.2
9.0 ± 0.2
20 15
21
28
1
0.32 ± 0.08
0.30 ± 0.06
7.0
HA13566AF
Unit: mm
0.65
14
7
6
M
0.13
1.0
0.575 0.575
2.25 ± 0.10
0.10
Dimension including the plating thickness
Base material dimension
1.40
+ 0.09
– 0.05
0.13
1.70 Max
0.17 ± 0.05
0.15 ± 0.04
0.95 ± 0.10
0.50 ± 0.10
Hitachi Code JEDEC EIAJ Weight
0° – 8°
(reference value)
FP-28T — —
0.2 g
19
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Cautions
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4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail­safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product.
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