Datasheet FSL156MRIN Datasheet (Fairchild)

Page 1
FSL156MRIN Green-Mode Fairchild Power Switch (FPS™)
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
June 2012
Features
and Low Audible Noise
Random Frequency Fluctuation (RFF) for Low EMI Pulse-by-Pulse Current Limit Overload Protection (OLP), Over-Voltage
Protection (OVP), Abnormal Over-Current Protection (AOCP), Internal Thermal Shutdown (TSD) with Hysteresis, Output-Short Protection (OSP), and Under-Voltage Lockout (UVLO) with Hysteresis , Line Over Voltage Protection (LOVP)
Low Operating Current (0.4mA) in Burst Mode Internal Startup Circuit Internal High-Voltage SenseFET: 650V Built-in Soft-Start: 15ms Auto-Restart Mode
Applications
Power Supply for Home Appliances, LCD Monitors,
STBs, and DVD Players
Description
The FSL156MRIN is an integrated Pulse Width Modulation (PWM) controller and SenseFET specifically designed for offline Switched Mode Power Supplies (SMPS) with minimal external components. The PWM controller includes an integrated fixed-frequency oscillator, Line-Over Voltage Protection (LOVP), Under­Voltage Lockout (UVLO), Leading-Edge Blanking (LEB), optimized gate driver, internal soft-start, temperature­compensated precise current sources for loop compensation, and self-protection circuitry. Compared with a discrete MOSFET and PWM controller solution, the FSL156MRIN reduces total cost, component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability. This device provides a basic platform suited for cost-effective design of a flyback converter.
Ordering Information
Output Power Table
Operating
Part Number
Package
(1)
Junction
Temperature
FSL156MRIN
Notes:
1. Lead-free package per JEDEC J-STD-020B.
2. The junction temperature can limit the maximum output power.
3. Typical continuous power in a non-ventilated enclosed adapter measured at 50C ambient temperature.
4. Maximum practical continuous power in an open-frame design at 50C ambient temperature.
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0
8-DIP
-40°C ~ +125°C
Current
Limit
(Typ.)
1.6A
R
DS(ON)
(Max.)
2.2
230VAC ±15% 85-265V
Open
Adapter
(3)
Frame
26W 40W 20W 30W
(4)
Adapter
(2)
(3)
Frame
AC
Open
(4)
Page 2
Application Circuit
AC
IN
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
V
O
V
V
IN
STR
Drain
GND
Internal Block Diagram
FB
V
CC
Figure 1. Typical Application Circuit
Figure 2. Internal Block Diagram
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 2
Page 3
Pin Configuration
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
1. GND
2. V
CC
FSL156MRIN
3. FB
4. V
IN
Figure 3. Pin Assignments (Top View)
Pin Definitions
Pin # Name Description
1 GND
2 V
3 FB
4 V
5 V
6
7
Drain
8
Ground. This pin is the control ground and the SenseFET source. Power Supply. This pin is the positive supply input, which provides the internal operating
CC
current for both startup and steady-state operation.
Feedback. This pin is internally connected to the inverting input of the PWM comparator.
The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 7V, the overload protection triggers, which shuts down the FPS.
Line Over-Voltage Input. This pin is the input pin of line voltage. The voltage, which is
divided by resistors, is the input of this pin. If this pin voltage is higher than V
IN
LOVP triggers, which shuts down the FPS. Do not leave this pin floating. If LOVP is not used, this pin should be directly connected to the GND.
Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link.
At startup, the internal high-voltage current source supplies internal bias and charges the
STR
external capacitor connected to the V source (I
SenseFET Drain. High-voltage power SenseFET drain connection.
) is disabled.
CH
pin. Once VCC reaches 12V, the internal current
CC
8. Drain
7. Drain
6. Drain
5. V
STR
voltage, the
INH
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 3
Page 4
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol Parameter Min. Max. Unit
V
V
STR
VDS Drain Pin Voltage 650 V
V
V
CC
V
Feedback Pin Voltage -0.3 10.0 V
FB
VIN VIN Pin Voltage -0.3 10.0 V
I
Drain Current Pulsed 4 A
DM
I
Continuous Switching Drain Current
DS
EAS Single-Pulsed Avalanche Energy
PD
T
J
T
Storage Temperature -55 +150
STG
ESD
Notes:
5. Repetitive peak switching current when the inductive load is assumed: limited by maximum duty (D
junction temperature (see Figure 4).
6. L=45mH, starting T
7. Infinite cooling condition (refer to the SEMI G30-88).
8. Although this parameter guarantees IC operation, it does not guarantee all electrical characteristics.
Pin Voltage 650 V
STR
Pin Voltage 26 V
CC
1.90
1.27
1.5 W
Total Power Dissipation (T
=25C)
C
T
=25C
(5)
C
TC=100C
(6)
190 mJ
(7)
Maximum Junction Temperature 150
Operating Junction Temperature
Electrostatic Discharge Capability
=25C.
J
Human Body Model, JESD22-A114
Charged Device Model, JESD22-C101
(8)
-40 +125
4.5
2.0
MAX
A
C
C
C
kV
=0.73) and
Figure 4. Repetitive Peak Sw itching Current
Thermal Impedance
TA=25°C unless otherwise specified.
Symbol Parameter Value Unit
JA Junction-to-Ambient Thermal Impedance
JL Junction-to-Lead Thermal Impedance
Notes:
9. JEDEC recommended environment, JESD51-2, and test board, JESD51-10, with minimum land pattern.
10. Measured on drain pin #7, close to the plastic interface.
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 4
(9)
85 °C/W
(10)
11 °C/W
Page 5
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
Electrical Characteristics
TJ = 25C unless otherwise specified.
Symbol Parameter Conditions Min. Typ. Max. Unit
SenseFET Section
BV
Drain-Source Breakdown Voltage
DSS
I
Zero-Gate-Voltage Drain Current
DSS
R
Drain-Source On-State Resistance VGS=10V, ID=1A 1.8 2.2
DS(ON)
C
Input Capacitance
ISS
C
Output Capacitance
OSS
(11)
V
(11)
V
V
=0V, ID=250A
CC
V
=520V, TA=125C
DS
=25V, VGS=0V, f=1MHz 515 pF
DS
=25V, VGS=0V, f=1MHz 75 pF
DS
tr Rise Time VDS=325V, ID=4A, RG=25 26 ns
tf Fall Time VDS=325V, ID=4A, RG=25 25 ns
t
Turn-On Delay VDS=325V, ID=4A, RG=25 14 ns
d(on)
t
Turn-Off Delay VDS=325V, ID=4A, RG=25 32 ns
d(off)
Control Section
f
Switching Frequency
S
f
D
MAX
D
MIN
Switching Frequency Variation
S
Maximum Duty Ratio V
Minimum Duty Ratio V
IFB Feedback Source Current V
V
START
V
STOP
t
V
RECOMM
SS
UVLO Threshold Voltage
After Turn-on, V
Internal Soft-Start Time V
Recommended VCC Range 13 23 V
(11)
V
(11)
=14V, VFB=4V 61 67 73 kHz
CC
-25C < T
=14V, VFB=4V 61 67 73 %
CC
=14V, VFB=0V 0 %
CC
=0 65 90 115 µA
FB
V
=0V, V
FB
STR
J
CC
=40V, V
< 125C
Sweep 11 12 13 V
=0V 7.0 7.5 8.0 V
FB
Sweep 15 ms
CC
Burst Mode Section
V
BURH
V
BURL
Burst-Mode Voltage VCC=14V, VFB Sweep
0.30 0.35 0.40 V
Hys 150 mV
Protection Section
I
Peak Drain Current Limit
LIM
V
Shutdown Feedback Voltage V
SD
I
Shutdown Delay Current V
DELAY
t
Leading-Edge Blanking Time
LEB
V
Over-Voltage Protection VCC Sweep 23.0 24.5 26.0 V
OVP
V
INH
V
INHYS
t
OSP
V
OSP
t
OSP_FB
TSD
T
HYS
Line Over-Voltage Protection Threshold Voltage
Line Over-Voltage Protection Hysteresis
Output-Short
Threshold VFB 1.8 2.0 2.2 V
Protection
V
Thermal Shutdown Temperature
Hysteresis 60
Threshold Time
(11)
FB
Blanking Time 2.0 2.5 3.0 µs
(11,12)
di/dt=300mA/s
=14V, V
CC
=14V, VFB=4V 1.2 2.0 2.8 µA
CC
Sweep 6.45 7.00 7.55 V
FB
300 ns
VCC=14V, V
VCC=14V, V
Sweep 1.87 1.95 2.03 V
IN
Sweep 0.06 V
IN
OSP Triggered when t (Lasts Longer than t
Shutdown Temperature 125 135 145
(11)
ON<tOSP
& VFB>V
OSP
OSP_FB
650 V
250 µA
±5 ±10 %
0.45 0.50 0.55 V
1.45 1.60 1.75 A
0.7 1.0 1.3 µs
)
C
C
Continued on the following page…
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 5
Page 6
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
Electrical Characteristics (Continued)
TJ = 25C unless otherwise specified.
Symbol Parameter Conditions Min. Typ. Max. Unit
Total Device Section
I
OP
I
OPS
I
START
I
CH
V
STR
Notes:
11. These parameters are guaranteed; not 100% tested in production.
12. t
LEB
Operating Supply Current, (Control Part in Burst Mode)
Operating Switching Current, (Control Part and SenseFET Part)
Start Current
Startup Charging Current V
Minimum V
Supply Voltage VCC=VFB=0V, V
STR
includes gate turn-on time.
VCC=14V, VFB=0V 0.3 0.4 0.5 mA
VCC=14V, VFB=2V 1.1 1.5 1.9 mA
V
=11V (Before VCC
CC
Reaches V
=0V, V
CC=VFB
)
START
=40V 0.7 1.0 1.3 mA
STR
Sweep 26 V
STR
85 120 155 µA
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 6
Page 7
Typical Performance Characteristics
Characteristic graphs are normalized at TA=25°C.
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
1.20
1.15
1.10
1.05
1.00
0.95
Normalized
0.90
0.85
0.80 40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
1.20
1.15
1.10
1.05
1.00
0.95
Normalized
0.90
0.85
0.80 40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
Figure 5. Operating Supply Current (IOP) vs. TA Figure 6. Operating Switching Current (I
1.20
1.15
1.10
1.05
1.00
0.95
Norm alized
0.90
0.85
0.80 40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
1.20
1.15
1.10
1.05
1.00
0.95
Normalized
0.90
0.85
0.80 40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
OPS
) vs. T
A
Figure 7. Startup Charging Current (ICH) vs. TA Figure 8. Peak Drain Current Li mit (I
1.40
1.30
1.20
1.10
1.00
0.90
Norm alized
0.80
0.70
0.60 40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
1.20
1.15
1.10
1.05
1.00
0.95
Normalized
0.90
0.85
0.80 40'C 20'C 0'C 25'C 50'C 75'C 90'C 110 'C 120'C 125'C
Temperature [ °C]
) vs. TA
LIM
Figure 9. Feedback Sou rce Current (IFB) vs. TA Figure 10. Shutdown Delay Current (I
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 7
DELAY
) vs. TA
Page 8
Typical Performance Characteristics
Characteristic graphs are normalized at TA=25°C.
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
1.20
1.15
1.10
1.05
1.00
0.95
Normalized
0.90
0.85
0.80 40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
Figure 11. UVLO Threshold Voltage (V
1.20
1.15
1.10
1.05
1.00
0.95
Norm alized
0.90
0.85
0.80 40'C 20'C 0'C 25'C 50'C 75'C 90'C 110 'C 120'C 125'C
Temperature [ °C]
1.20
1.15
1.10
1.05
1.00
0.95
Normalized
0.90
0.85
0.80 40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
) vs. TA Figure 12. UVLO Threshold Voltage (V
START
1.20
1.15
1.10
1.05
1.00
0.95
Normalized
0.90
0.85
0.80 40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
STOP
) vs. TA
Figure 13. Shutdown Feedback Voltage (VSD) vs. T
1.20
1.15
1.10
1.05
1.00
0.95
Norm alized
0.90
0.85
0.80 40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
Figure 15. Switching Frequency (f
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 8
) vs. TA Figure 16. Maximum Duty Ratio (D
S
Figure 14. Over-Voltage Protection (V
A
1.20
1.15
1.10
1.05
1.00
0.95
Normalized
0.90
0.85
0.80 40'C 20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
OVP
MAX
) vs. TA
) vs. TA
Page 9
Typical Performance Characteristics
Characteristic graphs are normalized at TA=25°C.
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
1.20
1.15
1.10
1.05
1.00
0.95
Normalized
0.90
0.85
0.80 40'C 25'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
Figure 17. Line OVP (V
1.20
1.15
1.10
1.05
1.00
0.95
Normalized
0.90
0.85
0.80 40'C 25'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C ]
) vs. TA Figure 18. Hysteresis of LOVP (V
INH
INHYS
) vs. TA
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 9
Page 10
Functional Description
1. Startup: At startup, an internal high-voltage current
source supplies the internal bias and charges the external capacitor (C illustrated in Figure 19. When V FSL156MRIN begins switching and the internal high­voltage current source is disabled. Normal switching operation continues and the power is supplied from the auxiliary transformer winding unless VCC goes below the stop voltage of 7.5V.
Figure 19. Startup Block
2. Soft-Start: The internal soft-start circuit increases
PWM comparator inverting input voltage, together with the SenseFET current, slowly after startup. The typical soft-start time is 15ms. The pulse width to the power switching device is progressively increased to establish the correct working conditions for the transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased to smoothly establish the required output voltage. This helps prevent transformer saturation and reduces stress on the secondary diode during startup.
) connected to the VCC pin, as
VCC
reaches 12V, the
CC
3. Feedback Control: This device employs Current-
Mode control, as shown in Figure 20. An opto-coupler (such as the FOD817) and shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the R
resistor makes it possible to
SENSE
control the switching duty cycle. When the reference pin voltage of the shunt regulator exceeds the internal reference voltage of 2.5V, the opto-coupler LED current increases, pulling down the feedback voltage and reducing drain current. This typically occurs when the input voltage is increased or the output load is decreased.
3.1 Pulse-by-Pulse Current Limit: Because Current-
Mode control is employed, the peak current through the SenseFET is limited by the inverting input of PWM comparator (V
*), as shown in Figure 20. Assuming
FB
that the 90A current source flows only through the internal resistor (3R + R =25k), the cathode voltage of diode D2 is about 2.8V. Since D1 is blocked when the feedback voltage (V
) exceeds 2.8V, the
FB
maximum voltage of the cathode of D2 is clamped at this voltage. Therefore, the peak value of the current through the SenseFET is limited.
3.2 Leading-Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, a high-current spike usually occurs through the SenseFET, caused by primary-side capacitance and secondary-side rectifier reverse recovery. Excessive voltage across the R
SENSE
resistor leads to incorrect feedback operation in Current-Mode PWM control. To counter this effect, the LEB circuit inhibits the PWM comparator for t (300ns) after the SenseFET is turned on.
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
LEB
Figure 20. Pulse Width Modulation Circuit
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 10
Page 11
4. Protection Circuits: The FSL156MRIN has several
self-protective functions, such as Overload Protection (OLP), Abnormal Over-Current Protection (AOCP), Output-Short Protection (OSP), Over-Voltage Protection (OVP), and Thermal Shutdown (TSD). All the protections are implemented as auto-restart. Once the fault condition is detected, switching is terminated and the SenseFET remains off. This causes V
B
When V
B falls to the Under-Voltage Lockout (UVLO)
CC
to fall.
CC
stop voltage of 7.5V, the protection is reset and the startup circuit charges the V
capacitor. When VCC
CC
reaches the start voltage of 12.0V, normal operation resumes. If the fault condition is not removed, the SenseFET remains off and V
drops to stop voltage
CC
again. In this manner, the auto-restart can alternately enable and disable the switching of the power SenseFET until the fault condition is eliminated. Because these protection circuits are fully integrated into the IC without external components, reliability is improved without increasing cost.
Figure 21. Auto-Restart Protection Waveforms
4.1 Overload Protection (OLP): Overload is defined
as the load current exceeding its normal level due to an unexpected abnormal event. In this situation, the protection circuit should trigger to protect the SMPS. However, even when the SMPS is in normal operation, the overload protection circuit can be triggered during the load transition. To avoid this undesired operation, the overload protection circuit is designed to trigger only after a specified time to determine whether it is a transient situation or a true overload situation. Because of the pulse-by-pulse current-limit capability, the maximum peak current through the SenseFET is limited and, therefore, the maximum input power is restricted with a given input voltage. If the output consumes more than this maximum power, the output voltage (V
) decreases
OUT
below the set voltage. This reduces the current through the opto-coupler LED, which also reduces the opto-coupler transistor current, increasing the feedback voltage (VFB). If VFB exceeds 2.5V, D1 is blocked and the 2.0µA current source starts to charge CFB slowly up. In this condition, VFB continues
increasing until it reaches 7.0V, when the switching operation is terminated, as shown in Figure 22. The delay for shutdown is the time required to charge C from 2.5V to 7.0V with 2.0µA. A 25 ~ 50ms delay is typical for most applications. This protection is implemented as auto-restart.
Figure 22. Overload Protection
4.2 Abnormal Over-Current Protection (AOCP):
When the secondary rectifier diodes or the transformer pins are shorted, a steep current with extremely high di/dt can flow through the SenseFET during the minimum turn-on time. Even though the FSL156MRIN has overload protection, it is not enough to protect the FSL156MRIN in that abnormal case; due to the severe current stress imposed on the SenseFET until OLP is triggered. The internal AOCP circuit is shown in Figure 23. When the gate turn-on signal is applied to the power SenseFET, the AOCP block is enabled and monitors the current through the sensing resistor. The voltage across the resistor is compared with a preset AOCP level. If the sensing­resistor voltage is greater than the AOCP level, the set signal is applied to the S-R latch, resulting in the shutdown of the SMPS.
Figure 23. Abnormal Over-Current Protection
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
FB
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 11
Page 12
4.3. Output-Short Protection (OSP): If the output is
shorted, steep current with extremely high di/dt can flow through the SenseFET during the minimum turn­on time. Such a steep current creates high-voltage stress on the drain of the SenseFET when turned off. To protect the device from this abnormal condition, OSP is included. It is comprised of detecting V SenseFET turn-on time. When the V
is higher than
FB
FB
2.0V and the SenseFET turn-on time is lower than
1.0s, this condition is recognized as an abnormal error and PWM switching shuts down until V reaches V
again. An abnormal condition output
START
short is shown in Figure 24.
and
CC
4.6 Line Over-Voltage Protection (LOVP): If the line
input voltage is increased to an unwanted level, high line input voltage creates high-voltage stress on the entire system. To protect from this abnormal condition, LOVP is included. It is comprised of detecting V divided resistors. When V
is higher than 1.95V, this
IN
condition is recognized as an abnormal error and PWM switching shuts down until VIN decreases to around
1.89V (60mV hysteresis).
using
IN
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
Figure 25. Line Over-Voltage Protection
Figure 24. Output-Short Protection
4.4 Over-Voltage Protection (OVP): If the
secondary-side feedback circuit malfunctions or a solder defect causes an opening in the feedback path, the current through the opto-coupler transistor becomes almost zero. Then VFB climbs up in a similar manner to the overload situation, forcing the preset maximum current to be supplied to the SMPS until the overload protection is triggered. Because more energy than required is provided to the output, the output voltage may exceed the rated voltage before
5. Soft Burst Mode: To minimize power dissipation in
Standby Mode, the FSL156MRIN enters Burst-Mode operation. As the load decreases, the feedback voltage decreases. As shown in Figure 22, the device automatically enters Burst Mode when the feedback voltage drops below V
(350mV). At this point,
BURL
switching stops and the output voltages start to drop at a rate dependent on standby current load. This causes the feedback voltage to rise. Once it passes V
BURH
(500mV), switching resumes. The feedback voltage then falls and the process repeats. Burst Mode alternately enables and disables SenseFET switching, reducing switching loss in Standby Mode.
the overload protection is triggered, resulting in the breakdown of the devices in the secondary side. To prevent this situation, an OVP circuit is employed. In general, the V and the FSL156MRIN uses V monitoring the output voltage. If V
is proportional to the output voltage
CC
instead of directly
CC
exceeds 24.5V,
CC
an OVP circuit is triggered, resulting in the termination of the switching operation. To avoid undesired activation of OVP during normal operation, V
should
CC
be designed to be below 24.5V.
4.5 Thermal Shutdown (TSD): The SenseFET and
the control IC on a die in one package makes it easier for the control IC to detect the temperature of the SenseFET. If the temperature exceeds ~135C, the thermal shutdown is triggered and stops operation. The FSL156MRIN operates in Auto-Restart Mode until the temperature decreases to around 75C, when normal operation resumes.
Figure 26. Burst-Mode Operation
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 12
Page 13
6. Random Frequency Fluctuation (RFF): Fluctuating
switching frequency of an SMPS can reduce EMI by spreading the energy over a wide frequency range. The amount of EMI reduction is directly related to the switching frequency variation, which is limited internally. The switching frequency is determined randomly by external feedback voltage and an internal free-running oscillator at every switching instant. RFF effectively scatters EMI noise around typical switching frequency (67kHz) and can reduce the cost of the input filter included to meet the EMI requirements (e.g. EN55022).
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
Figure 27. Random Frequency Fluctuation
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 13
Page 14
Package Dimensions
FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
9.83
9.00
6.67
6.096
8.255
7.61
3.60
3.00
3.683
3.20
0.356
0.20
5.08 MAX
0.33 MIN
(0.56)
2.54
0.56
0.355
1.65
1.27
7.62
NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO
JEDEC MS-001 VARIATION BA
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANC
ES PER
ASME Y14.5M-1994
E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.
7.62
9.957
7.87
Figure 28. 8-Lead, MDIP, JEDEC MS-001, .300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 14
.
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FSL156MRIN — Green-Mode Fairchild Power Switch (FPS™)
© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL156MRIN • Rev. 1.0.0 15
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