Page 1
FDMC86520L
G
S
S
S
D
D
D
D
5
6
7
8
3
2
1
4
Bottom
D
D
D
D
S
S
S
G
Top
Pin 1
MLP 3.3x3.3
N-Channel Power Trench® MOSFET
60 V, 22 A, 7.9 mΩ
Features
Max r
Max r
Low Profile - 1 mm max in Power 33
100% UIL Tested
RoHS Compliant
= 7.9 mΩ at VGS = 10 V, ID = 13.5 A
DS(on)
= 11.7 mΩ at VGS = 4.5 V, ID = 11.5 A
DS(on)
General Description
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency and to minimize switch node
ringing of DC/DC converters using either synchronous or
conventional switching PWM controllers.It has been optimized
for low gate charge, low r
diode reverse recovery performance.
Applications
Primary Switch in isolated DC-DC
Synchronous Rectifier
Load Switch
August 2011
, fast switching speed and body
DS(on)
FDMC86520L N-Channel PowerTrench
®
MOSFET
MOSFET Maximum Ratings T
Symbol Parameter Ratings Units
V
DS
V
GS
I
D
E
AS
P
D
, T
T
J
STG
Thermal Characteristics
R
θJC
R
θJA
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDMC86520L FDMC86520L Power 33 13 ’’ 12 mm 3000 units
©2011 Fairchild Semiconductor Corporation
FDMC86520L Rev.C
Drain to Source Voltage 60 V
Gate to Source Voltage ±20 V
Drain Current -Continuous (Package limited) TC = 25 °C 22
-Continuous (Silicon limited) T
-Continuous T
-Pulsed 60
Single Pulse Avalanche Energy (Note 3) 79 mJ
Power Dissipation TC = 25 °C 40
Power Dissipation T
Operating and Storage Junction Temperature Range -55 to +150 °C
Thermal Resistance, Junction to Case 3.1
Thermal Resistance, Junction to Ambient (Note 1a) 53
= 25 °C unless otherwise noted
A
= 25 °C 55
C
= 25 °C (Note 1a) 13.5
A
= 25 °C (Note 1a) 2.3
A
1
A
W
°C/W
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Page 2
FDMC86520L N-Channel PowerTrench
Electrical Characteristics T
= 25 °C unless otherwise noted
J
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
ΔBV
ΔT
I
DSS
I
GSS
DSS
DSS
J
Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 60 V
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current VDS = 48 V, V
Gate to Source Leakage Current VGS = ±20 V, V
I
= 250 μA, referenced to 25 °C 29 mV/°C
D
= 0 V 1 μA
GS
= 0 V ±100 nA
DS
On Characteristics
V
GS(th)
ΔV
ΔT
r
DS(on)
g
FS
GS(th)
J
Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA11.73V
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
I
= 250 μA, referenced to 25 °C -7 mV/°C
D
V
= 10 V, ID = 13.5 A 6.5 7.9
GS
= 4.5 V, ID = 11.5 A 9.1 11.7
GS
= 10 V , ID = 13.5 A, TJ = 125 °C 9 11
V
GS
Forward Transconductance VDS = 5 V, ID = 13.5 A 49 S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance 638 850 pF
Reverse Transfer Capacitance 25 40 pF
Gate Resistance 0.5 Ω
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g(TOT)
Q
g(TOT)
Q
gs
Q
gd
Turn-On Delay Time
Rise Time 5.2 10 ns
Turn-Off Delay Time 32 55 ns
Fall Time 3.4 10 ns
Total Gate Charge V
Total Gate Charge V
Total Gate Charge 9.6 nC
Gate to Drain “Miller” Charge 4.9 nC
= 30 V, VGS = 0 V,
V
DS
f = 1 MHz
= 30 V, ID = 13.5 A,
V
DD
V
= 10 V, R
GS
= 0 V to 10 V
GS
= 0 V to 4.5 V 21 30 nC
GS
= 6 Ω
GEN
VDD = 30 V,
I
D
= 13.5 A
3420 4550 pF
15 30 ns
45 64 nC
mΩV
®
MOSFET
Drain-Source Diode Characteristics
V
SD
t
rr
Q
rr
NOTES:
1. R
is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θJA
the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. Starting T
FDMC86520L Rev.C
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge 21 34 nC
= 25 °C; N-ch: L = 0.3 mH, IAS = 23 A, VDD = 54 V, VGS = 10 V.
J
V
GS
V
GS
= 13.5 A, di/dt = 100 A/μs
I
F
53 °C/W when mounted on a
2
pad of 2 oz copper
1 in
= 0 V, IS = 13.5 A (Note 2) 0.82 1.3
= 0 V, IS = 2 A (Note 2) 0.71 1.2
38 62 ns
is guaranteed by design while R
θJC
125 °C/W when mounted on
a minimum pad of 2 oz copper
2
θCA
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V
is determined by
Page 3
FDMC86520L N-Channel PowerTrench
0 0.5 1.0 1.5 2.0 2.5
0
10
20
30
40
50
60
VGS = 3 V
VGS = 4.5 V
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
VGS = 3.5 V
VGS = 4 V
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0 102030405060
0
1
2
3
4
VGS = 4.5 V
VGS = 10 V
VGS = 4 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
I
D
, DRAIN CURRENT (A)
VGS = 3.5 V
VGS = 3 V
-75 -50 -25 0 25 50 75 100 125 150
0.6
0.8
1.0
1.2
1.4
1.6
1.8
ID = 13.5 A
V
GS
= 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANC E
T
J
, JUNCTION TEMPERATURE (
o
C)
246810
0
10
20
30
40
TJ = 125 oC
ID = 13.5 A
TJ = 25 oC
V
GS
, GATE TO S OURCE V O LTAGE (V )
r
DS(on)
,
DRAIN TO
SOURCE ON-RESISTANCE
(mΩ)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
1.5 2.0 2.5 3.0 3.5 4.0
0
10
20
30
40
50
60
TJ = 150 oC
V
DS
= 5 V
PULSE DURA TION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
I
D
, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
0 0.2 0.4 0.6 0.8 1.0 1.2
0.001
0.01
0.1
1
10
100
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
V
GS
= 0 V
I
S
, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Typical Characteristics T
Figure 1.
On Region Characteristics Figure 2.
= 25 °C unless otherwise noted
J
Nor mal ized O n-R esi sta nce
vs Drain Current and Gate Voltage
®
MOSFET
Figure 3. N or malized On Re sistanc e
vs Junction Temperature
FDMC86520L Rev.C
Figure 5. Transfer Characteristics
Figure 4.
On-Resistance vs Ga te to
Source Voltage
Figure 6.
Source to D rain Diode
Forward Voltage vs Source Current
3
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Page 4
FDMC86520L N-Channel PowerTrench
0 1020304050
0
2
4
6
8
10
ID = 13.5 A
VDD = 40 V
V
DD
= 20 V
V
GS
, GATE TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
VDD = 30 V
0.1 1 10 60
1
10
100
1000
10000
f = 1 MHz
V
GS
= 0 V
CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
C
rss
C
oss
C
iss
0.01 0.1 1 10 100
1
10
50
TJ = 100 oC
TJ = 25 oC
TJ = 125 oC
tAV, TIME IN AVALANCHE (ms)
I
AS
, AVALANCHE CURRENT (A)
25 50 75 100 125 150
0
10
20
30
40
50
60
V
GS
= 4.5 V
R
θJC
= 3.1 oC/W
V
GS
= 10 V
I
D
, DRAIN CURRENT (A)
T
C
, CASE TEMPERATURE (
o
C)
Limited by package
0.01 0.1 1 10 100 300
0.01
0.1
1
10
100
100 us
1 ms
1 s
10 ms
DC
10 s
100 ms
I
D
, DRAIN CURRENT (A)
VDS, DRAIN to SOURCE VOLTAGE (V)
THIS A REA IS
LIMITED BY r
DS(on)
SINGLE PULSE
T
J
= MAX RATED
R
θJA
= 125
o
C/W
T
A
= 25
o
C
10-410-310-210-1110
100 1000
0.5
1
10
100
1000
2000
SINGLE PULSE
R
θJA
= 125
o
C/W
T
A
= 25
o
C
P(
PK
), PEAK TRANSIENT POWER (W)
t, PULSE WIDTH (sec)
Typical Characteristics T
Figure 7.
Gate Charge Characteristics Figure 8.
= 25 °C unless otherwise noted
J
Cap aci t anc e vs Dra in
to Source Voltage
®
MOSFET
Figure 9.
Unc l amp e d In d uct i ve
Switching Capability
FDMC86520L Rev.C
Figure 11. Forward Bias Safe
Op
erating Area
Figure 10.
Ma ximum Contin uous Drain
Current vs Case Temperature
Figure 12.
Single P ulse Ma ximum
Power Dissipation
4
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Page 5
FDMC86520L N-Channel PowerTrench
10
-4
10
-3
10
-2
10
-1
110
100 1000
0.0005
0.001
0.01
0.1
1
SINGLE PULSE
R
θJA
= 125 oC/W
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
IMPEDANCE,
Z
θJA
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5
0.2
0.1
0.05
0.02
0.01
2
P
DM
t
1
t
2
NOTES:
DUTY FACTOR: D = t1/t
2
PEAK TJ = PDM x Z
θJA
x R
θJA
+ T
A
Typical Characteristics T
Figure 13.
= 25 °C unless otherwise noted
J
Junction-to-Ambient Transient Thermal Response Curve
®
MOSFET
FDMC86520L Rev.C
5
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Page 6
Dimensional Outline and Pad Layout
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIME NSIONS AND TO LERANCES PER
A. DOE S NOT CO NFO RM TO JEDEC
REGIS T RATION MO- 2 29
ASME Y14.5 M, 1994
0.10 CAB
0.05
C
TOP VIEW
BOT TO M VIEW
RE COMM ENDE D L AND PA T T ERN
0.10 C
0.08 C
B
A
3.30
3.30
0.05
0.00
0.10 C
2X
2X
0.8 MAX
S ID E VIEW
SEATING
PLANE
0.10 C
PIN #1 IDENT
(0.20)
8
5
1.95
0.65
E. DRAWING FILE NAME : MLP08Srev1
PIN#1 QUADRANT
0.40
0.30
41
(8X)
D. LAND PATTE RN R EC OMMEN DAT ION IS
BASED ON FSC DESIGN ONLY
2.32
2.22
0.55
0.45
(4X)
1.15
0.30
2.05
1.95
0.35
R0.15
0.79
FDMC86520L N-Channel PowerTrench
®
MOSFET
FDMC86520L Rev.C
6
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Page 7
TRADEMARKS
tm
®
tm
™
tm
The following includes registered and unregistered trademarks a nd service marks, owned by Fairch ild Semiconduct or and/or its global sub sidiaries, and is not
intended to be an exhaustive list of all such trademarks.
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®
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Saving our world, 1mW/W/kW at a time™
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μSerDes™
®
UHC
Ultra FRFET™
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VisualMax™
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®
®
®
*
FDMC86520L N-Channel PowerTrench
®
MOSFET
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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As used here in:
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intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
2. A critical component in any component of a life support, device, or
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the failure of the life support device or system, or to affect its safety or
effectiveness.
expected to result in a significant injury of the user.
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Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing co unterfeiting of their
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PRODUCT STATUS DEFINITIONS
Definition of Terms
.
Datasheet Identification Product Status Definition
Advance Information Formative / In Design
Preliminary First Production
No Identification Needed Full Production
Obsolete Not In Production
FDMC86520L Rev.C
Datasheet contains the design specificatio ns for product development. Specifications
may change in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinu ed by Fairchild
Semiconductor. The datasheet is for reference information only.
7
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Rev. I55
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