The FAN8902 is a monolithic integrated circuit, designed
for the PWM control of a DC fan motor current in an
automotive systems. It allows the fan motor speed to be
controlled linearly and efficiently.
1CMDMotor Current Command Input
2CMDaOptional OP Amplifier Output
3CMDbOptional OP Amplifier (-) Input
4SGNDSignal GND
5R
6VREFVoltage Reference (5V)
7CHMaximum Current Reference Input
8NCNo Connection
9CLMinimum Current Reference Input
10CSMotor Current Sense Voltage Input
11PGNDPower GND
12OUTDrive Output
13V
14LaMotor Current Maximum Reference Input
/ C
T
T
CC
Oscillator Time Constant
V
CC
2
Page 3
FAN8902(KA3902)
Internal Block Diagram
Vref
CH
CMD
CL
CMDa
CMDb
6
7
1.3V
1
La
14
9
2
3
+
+
−
+
−
−
+
+
−
4R
+
−
R
Vref
+
−
PWM
Comparator
PWM
LOGIC
Oscillator
UVLO
× 5
OVP
TSD
36V
13
V
CC
12
OUT
11
PGND
10
CS
5
R
T/CT
4
SGND
3
Page 4
FAN8902(KA3902)
Absolute Maximum Ratings
ParameterSymbolValueUnit
Supply VoltageV
CMD Input VoltageV
Peak Output CurrentI
Power DissipationP
CC
CMD
OPK
D
32V
6V
±0.8A
1W
Operating Voltage
ParameterSymbolMin.Typ.MaxUnit
Power Supply VoltageV
CC
9.012.032.0V
Temperature Characteristics
ParameterSymbolTempValueUnit
Vref Temperature StabilityV
Frequency StabilityF
Operating TemperatureT
Storage TemperatureT
The peak current, I
For example, if a required maximum current, I
R
S
M(MAX)=VS/RS
1V 5⁄
-------------- -10 mΩ[]==
20A
Vref &
output driver
8.0V
1.2V
PWM comparator
+
−
× 5
M(MAX)
=20[A]
PWM
Logic
6mA
1mA
8VV
6.8V
M
12
10
R5
I
M
V
S
R
S
TH(ST)
V
BAT
3. Thermal Shutdown (Tsd)
When the chip, temperature rises up to 150°C, the thermal shutdown (TSD) circuit is activated and the output driver turn off,
and then turn on again at 125°C.
6
Page 7
FAN8902(KA3902)
4. Oscillator Component Selection
Vref
R
T
V/C
T
C
T
I
D
+
−
VHV
L
Logic
The oscillator timing components can be calculated as follows:
TCRTC
T
DCT
fosc1 T
1.875 R
DutyT
C
×In Vref V
T
VHVL–()I
+()⁄=
CTD
TCT
fosc×100×=
–()Vref VH–()⁄[]×=
L
⁄[]×=
D
×()⁄=
For example, if fosc = 25kHz and duty = 95%
TDI
C
T
1000 pF[]=
R
1.875 fosc C
T
1.875 25kHz 1000pF×()⁄=
75 kΩ[]=
×()V
D
–()⁄=
HVL
×()⁄=
T
VCT [V]
V
H
=1.75
V
L
=3.0
T=40.0
Td=1.0
T
C
=39.0
t [µs]
5. Current Command Input Section
The current command I* selects the lower value between V
V
CMD
1
CMD
+
V
La
La
14
+
−
FAN8902
CMD
I*
and VLa.
4R
R
+
Logic
−
7
Page 8
FAN8902(KA3902)
6. Slope Compensation
An unconditional instability of the inner current loop exists for any fixed frequency current-mode converter operating above
50% duty cycle. Therefore, to guarantee current loop stability, the slope of the compensation ramp must be greater than
one-half of the down slope of the current waveform. The ramp voltage for slope compensation is as follow,
V
RAMP
V
CMD
R14
---------- -=∆V
×
R11
OSC
R12
C2
TR2
R11
Slop Compensation
R14
Vref
1
+
_
To PWM
Comparator
FAN8902
6
5
OSC
7. Motor Stall Current Limitation
FAN8902
V
CMD
1
CMD
I*
4R
Buffer-OP-amp
R
+
−
V
+
+
−
CS
PWM
COMP
VBAT
Logic
× 5
+
C1
C2
V
LA
14
12
10
R10
C4
Q1
R2
R3
D1
R5
M
IM
V
GS
Q2
V
RS
R
S
8
Page 9
FAN8902(KA3902)
In the steady state, the terminal voltage on a motor is consisted of a back EMF and the voltage drop on the armarture resistors.
When the motor happens to be stalled, the back EMF becomes zero, and the motor current (I
) is quickl y increase d until a
M
maximum values.
Therefore the duty of the pin #12 output becomes lower because of the increase of the sense voltage (V
voltage (V
) be lowered, then it makes the duty become lower again.
La
This mechanism makes the motor current hold very low value in the stalled motor state.
The voltage on pin #14 (V
V
LaVBAT
×= Assumed the saturation voltage of Q1 is zero.
D×
) ia calculated as follows:
La
R3
--------------------- R2 R3+
We can choose the ratio of the resistors, R2 and R3, as follows:
- Applied the rated voltage on motor, and then measured the current IRAT
- Matched the maximum command current, V
V
CMD,MAX
for example, if R
V
-V
La,MAX
Ratio = R3 / (R2 + R3) = V
= V
La,MAX
S
CMD,MAX
= 5V = V
= RS × I
= 10mΩ and I
= V
La,MAX
× 1 × R3 / (R2 + R3)
BAT
CMD,MAX
× 5 × 5
RAT
= 20[A] at V
RAT
= 10mΩ × 20 × 25 = 5V
/ V
BAT
CMD,MAX
BAT
= 5 / 13
to I
= 13[V],
RAT
.
Therefore, R2 : R3 = 8 : 5
V
BAT
V
MOTOR
Operating curve
A
B
VLa curve × (1 / R)
). Also it makes the
RS
The voltage drop
on the amarture resistance
B”
V
LA
La
B’
V
LA
than V
V
V
CMDI
LA
RAT
and VLa so as to limit the stalled motor current to very low in
CMD
, the motor operating point stays at A. But th e point gradually moves
CMD
V
MOTOR,STALL
The buffer OP-amp selects the lower command between V
the above figure. Because of much larger V
toward B’ and then B” through the curve from the instance of stall as the below figure.
9
Page 10
V
CMD
V
La
Reduced switch-on time
FAN8902(KA3902)
V
CS
Motor current
Normal operation
8. Operational Mode Selection
The FAN8902 has three operation modes as follows:
- STOP: Turned-off the power MOSFET
- LINEAR: Linearly controlled the power MOSFET
- FULL-ON: Fully turned-on the power MOSFET
The voltage, V
-V
SRT (PIN #9)
-V
MAX (PIN #7)
SRT (PIN #9)
and V
MAX (PIN #7)
= Vref × R7 / (R5 + R6 + R7)
= Vref × (R6 + R7) / (R5 + R6 + R7)
Motor
current
[A]
, in the application circuit are as follows:
I
MAX
I
SRT
STOP
Uncontrolled without the FAN8902
Controlled with the FAN8902
Stalled state
LINEAR
V
SRT
FULL-ON
V
MAX
V
BAT
V
[V]
CMD
9. Over Voltage Protector (Ovp)
If the voltage, V
the motor is stopped. Then if the voltage, V
≥ 36[V], the output (pin #12) is grounded, and the switching device (power MOSFET) is turned-off, and
BAT
→ 36[V], the switching device is turned-on again, and the motor is operated.
BAT
10. T otem-pole Output
The FAN8902 has a single totem-pole output driver which can be drive current to peak ±0.8[A].
10
Page 11
FAN8902(KA3902)
Test Circuit
C
O
47µF
IN 6
V
CC
SW 2
A
+
LaVCCOUTPGCSCLNC
Cid
1µF
Iout
TP 4
IN 4IN 5
891011121314
F A N 8 9 0 2
CMDCMDaCMDbSGRT / C
123 4567
R2
10k
R1
10k
C
1nF
T
R
T
75k
T
SW 1
VREFCH
C2
+
22µF
11
IN 1TP 1IN 2TP 2
TP 3IN 3
Iout
Page 12
Typical Application
FAN8902(KA3902)
Current
command
R12
R11
R14
V
BAT
1
CMD
NC
2
CMDa
NC
C
T
R
T
R5
CMDb
3
4
SG
5
R
T
6
VREF
F A N 8 9 0 2
/ C
T
C1
+
VCC
OUT
PG
CS
CL
C2
M
D1
C4
R10
Q1
R2
R3
R4
R
S
R1
La
14
13
12
11
10
9
C3
+
R7
R6
78
CH
NC
NC
12
Page 13
FAN8902(KA3902)
13
Page 14
FAN8902(KA3902)
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURT HER NOTICE TO ANY
PRODUCTS HEREI N TO IMPROVE RELIABILITY, FUNCTIO N OR DESIGN. FAIRCH IL D DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER IT S PATENT RIGHTS, NOR THE RIGHTS OF OTHE RS.
LIFE SUPPORT POL I CY
FAIRCHILD’S PR ODUCTS ARE NOT AUTH ORIZED FOR USE AS C RITICAL COMPONENT S IN LIFE SUPPORT DE VICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein :
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
2. A critical component in any component of a life support
device or sy stem whose fai lure to perform can be
reasonably expec ted to cause the failur e of the life support
device or system, or to affect its safety or effec t iv ene ss .
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
www.fairchildsemi.com
9/17/02 0.0m 001
2002 Fairchild Semiconductor Corporation
Stock#DSxxxxxxxx
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