Datasheet DM54LS273J-883, DM54LS273J-MLS Datasheet (NSC)

Page 1
TL/F/9825
DM54LS273/DM74LS273 8-Bit Register with Clear
April 1992
DM54LS273/DM74LS273 8-Bit Register with Clear
General Description
The ’LS273 is a high speed 8-bit register, consisting of eight D-type flip-flops with a common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20­pin package featuring 0.3 inch row spacing.
Features
Y
Edge-triggered
Y
8-bit high speed register
Y
Parallel in and out
Y
Common clock and master reset
Connection Diagram
Dual-In-Line Package
TL/F/9825– 1
Order Number DM54LS273E, DM54LS273J,
DM54LS273W, DM74LS273M or DM74LS273N
See NS Package Number E20A, J20A, M20B,
N20A or W20A
Pin Names Description
CP Clock Pulse Input (Active Rising Edge) D0–D7 Data Inputs MR
Asynchronous Master Reset Input (Active LOW)
Q0–Q7 Flip-Flop Outputs
C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
Page 2
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range
DM54LS
b
55§Ctoa125§C
DM74LS 0
§
Ctoa70§C
Storage Temperature Range
b
65§Ctoa150§C
Note:
The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaran­teed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation.
Recommended Operating Conditions
Symbol Parameter
DM54LS273 DM74LS273
Units
Min Nom Max Min Nom Max
V
CC
Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
V
IH
High Level Input Voltage 2 2 V
V
IL
Low Level Input Voltage 0.7 0.8 V
I
OH
High Level Output Current
b
0.4
b
0.4 mA
I
OL
Low Level Output Current 4 8 mA
T
A
Free Air Operating Temperature
b
55 125 0 70
§
C
ts(H) Setup Time HIGH or LOW 15 15
ns
t
s
(L) Dnto CP 15 15
th(H) Hold Time HIGH or LOW 5 5
ns
th(L) Dnto CP 5 5
tw(H) CP Pulse Width HIGH or LOW 20 20
ns
t
w
(L) 20 20
tw(L) MR Pulse Width LOW 20 20 ns
t
rec
Recovery Time
15 15 ns
MR
to CP
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min
Typ
Max Units
(Note 1)
V
I
Input Clamp Voltage V
CC
e
Min, I
I
eb
18 mA
b
1.5 V
V
OH
High Level Output V
CC
e
Min, I
OH
e
Max, DM54 2.5
V
Voltage V
IL
e
Max
DM74 2.7 3.4
V
OL
Low Level Output V
CC
e
Min, I
OL
e
Max, DM54 0.4
Voltage V
IH
e
Min
DM74 0.35 0.5 V
I
OL
e
4 mA, V
CC
e
Min DM74 0.25 0.4
I
I
Input Current@Max V
CC
e
Max, V
I
e
7V
0.1 mA
Input Voltage V
I
e
10V (DM54)
I
IH
High Level Input Current V
CC
e
Max, V
I
e
2.7V 20 mA
I
IL
Low Level Input Current V
CC
e
Max, V
I
e
0.4V
b
0.4 mA
I
OS
Short Circuit V
CC
e
Max DM54
b
20
b
100
mA
Output Current (Note 2)
DM74
b
20
b
100
I
CC
Supply Current V
CC
e
Max 27 mA
Note 1: All typicals are at V
CC
e
5V, T
A
e
25§C.
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.
2
Page 3
Switching Characteristics V
CC
ea
5.0V, T
A
ea
25§C
C
L
e
15 pF
Symbol Parameter DM54LS
DM74LS
Units
R
L
e
2kX
Min Max Min Max
f
max
Maximum Clock Frequency 30 30 MHz
t
PLH
Propagation Delay 24 24
ns
t
PHL
CP to Q
n
24 24
t
PLH
Propagation Delay
27 27 ns
MR
to Q
n
Functional Description
The ’LS273 is an 8-bit parallel register with a common Clock and common Master Reset. When the MR
input is LOW, the Q outputs are LOW, independent of the other inputs. Infor­mation meeting the setup and hold time requirements of the D inputs is transferred to the Q outputs on the LOW-to­HIGH transition of the clock input.
Truth Table
Inputs Outputs
MR CP D
n
Q
n
LXX L HLHH HLLL
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
Logic Symbol
TL/F/9825– 2
V
CC
e
Pin 20
GND
e
Pin 10
Logic Diagram
TL/F/9825– 3
3
Page 4
Physical Dimensions inches (millimeters)
Ceramic Leadless Chip Carrier Package (E)
Order Number DM54LS273E
NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package (J)
Order Number DM54LS273J
NS Package Number J20A
4
Page 5
Physical Dimensions inches (millimeters) (Continued)
20-Lead Wide Small Outline Molded Package (M)
Order Number DM74LS273M
NS Package Number M20B
20-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS273N
NS Package Number N20A
5
Page 6
DM54LS273/DM74LS273 8-Bit Register with Clear
Physical Dimensions inches (millimeters) (Continued)
20-Lead Ceramic Flat Package (W)
Order Number DM54LS273W
NS Package Number W20A
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