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DM54LS181J
Datasheet (NSC)
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Datasheet DM74LS181N, DM54LS181W, DM54LS181J Datasheet (NSC)

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Page 1
DM54LS181/DM74LS181 4-Bit Arithmetic Logic Unit
DM54LS181/DM74LS181 4-Bit Arithmetic Logic Unit
June 1992
General Description
The ’LS181 is a 4-bit Arithmetic Logic Unit (ALU) which can perform all the possible 16 logic operations on two variables and a variety of arithmetic operations.
Connection Diagram
Dual-In-Line Package
Order Number DM54LS181J, DM54LS181W or DM74LS181N
See NS Package Number J24A, N24A or W24C
Features
Y
Provides 16 arithmetic operations: add, subtract, com­pare, double, plus twelve other arithmetic operations
Y
Provides all 16 logic operations of two variables: exclu­sive-OR, compare, AND, NAND, OR, NOR, plus ten other logic operations
Y
Full lookahead for high speed arithmetic operation on long words
TL/F/9821– 1
Pin Names Description
A0–A3 Operand Inputs (Active LOW) B
0–B3 Operand Inputs (Active LOW) S0–S3 Function Select Inputs M Mode Control Input C
n
F
0–F3 Function Outputs (Active LOW) AeB Comparator Output G P C
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C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
TL/F/9821
Carry Input
Carry Generate Output (Active LOW) Carry Propagate Output (Active LOW) Carry Output
Page 2
Absolute Maximum Ratings (Note)
Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range
DM74LS 0
Storage Temperature Range
Ctoa70§C
§
b
65§Ctoa150§C
The ‘‘Absolute Maximum Ratings’’ are those values
Note:
beyond which the safety of the device cannot be guaran­teed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation.
Recommended Operating Conditions
Symbol Parameter
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
Supply Voltage 4.5 5.5 4.75 5 5.25 V
High Level Input Voltage 2 2 V
Low Level Input Voltage 0.7 0.8 V
High Level Output Current
Low Level Output Current 4 8 mA
Free Air Operating Temperature
DM54LS181 DM74LS181
Min Max Min Nom Max
b
0.4
b
55 125 0 70
b
0.4 mA
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min
e
V
I
V
OH
V
OL
I
I
I
IH
I
IL
I
OS
I
CC
Input Clamp Voltage V
High Level Output V
Voltage V
Low Level Output V Voltage V
Input Current@Max V Input Voltage V
High Level Input Current V
Low Level Input Current V
Short Circuit V Output Current (Note 2)
Supply Current V
CC
CC
e
IL
CC
e
IH
e
I
OL
CC
e
I
CC
CC
CC
CC
Sn,M,A
e
Note 1: All typicals are at V
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.
CC
5V, T
e
25§C.
A
eb
e
Min, I
Min, I
18 mA
I
e
Max, DM54 2.5
OH
Max DM74 2.7
e
e
10V (DM54) An,B
e
e
e
e
e
Min, I
Min
4 mA, V
Max, V
Max, V
Max, V
Max
Max, Bn,C
n
Max, DM54 0.4
OL
DM74 0.35 0.5
e
Min DM74 0.25 0.4
CC
e
7V M input 0.1
I
e
2.7V M input 20
I
e
0.4V M input
I
e
GND DM54 35
n
e
4.5V DM74 37
S C
A S C
A S C
n
n
n
n,Bn
n
n
n,Bn
n
n
b
20
Typ
(Note 1)
Max Units
b
1.5 V
0.3
0.4
0.5
60 80
100
b
0.4
b
1.2
b
1.6
b
2.0
b
100 mA
Units
C
§
mA
mA
mA
mA
V
V
2
Page 3
Switching Characteristics:
Symbol Parameter Conditions C
t t
t t
t t
t t
t t
t t
t t
t t
t t
t t
t t
t t
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
Propagation Delay MeGND 27 Cnto C
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Propagation Delay MeGND 26 Cnto F 20
Propagation Delay M, S1,S A or B to G (Sum) S1,S
Propagation Delay M, S0,S A or B to G (Diff) S1,S
Propagation Delay M, S1,S A or B to P (Sum) S0,S
Propagation Delay M, S0,S A or B to P (Diff) S1,S
Propagation Delay M, S1,S Aior Bito Fi(Sum) S0,S
Propagation Delay M, S0,S Aior Bito Fi(Diff) S1,S
e
GND; 29
2
e
4.5V 23
3
e
GND; 32
3
e
4.5V 26
2
e
GND; 30
2
e
4.5V 30
3
e
GND; 30
3
e
4.5V 33
2
e
GND; 32
2
e
4.5V 25
3
e
GND; 32
3
e
4.5V 33
2
Propagation Delay Me4.5V 33 A or B to F (Logic) 29
Propagation Delay M, S1,S A or B to C
(Sum) S0,S
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Propagation Delay M, S0,S A or B to C
(Diff) S1,S
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Propagation Delay M, S0,S A or B to AeBS
R
e
GND; 38
2
e
4.5V 38
3
e
GND; 41
3
e
4.5V 41
2
e
GND; 50
3
e
,S
4.5V; 62
1
2
e
2kXto 5.0V
L
DM54/DM74LS
e
15 pF Units
L
Min Max
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3
Page 4
Sum Mode Test Table I Function Inputs S0
Symbol Under
Input
Test
t t
t t
t t
t t
t t
t t
t t
t t
t t
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
A
i
B
i
A B None None
B A None None
A None B
B None A
A None B
B None A
C
n
Other Input
Same Bit
Apply Apply Apply Apply
4.5V GND 4.5V GND
B
i
A
i
None
None
Remaining
Remaining
Remaining Remaining
Remaining Remaining
Remaining Remaining
Remaining Remaining
None None
eS3e
4.5V, S1eS2eMe0V
Other Data Inputs Output
C
A and B
A and B
n
C
n
Remaining
A and B,C
n
Remaining
A and B,C
B A,C
B A,C
B A,C
B A,C
n
n
n
n
n
All All Any F
A B or C
Under
Test
F
i
F
i
P
P
G
G
C
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C
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Diff Mode Test Table II Function Inputs S1
Symbol Under
Input
Test
t t
t t
t t
t t
t t
t t
t t
t t
t t
t t
t t
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
A None B
B A None
A None
B A None None
A B None None
B None A None
A None B
B A None
A B None None
B None A None
C
n
Other Input
Same Bit
Apply Apply Apply Apply
4.5V GND 4.5V GND
B
None None
4
eS2e
4.5V, S0eS3eMe0V
Other Data Inputs Output
Remaining Remaining
A B,C
n
Remaining Remaining
A B,C
None
n
Remaining
A and B,C
n
Remaining
A and B,C
n
Remaining
A and B,C
n
Remaining
A and B,C
n
Remaining Remaining
A B,C
n
Remaining Remaining
A B,C
n
Remaining
A and B,C
n
Remaining
A and B,C
All
A and B
n
None C
Under
Test
F
i
F
i
P
P
G
G
e
A
AeB
C
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C
na4
na4
B
Page 5
Logic Mode Test Table III Function Inputs S1
Symbol Under
Input
Test
t
PLH
t
PHL
t
PLH
t
PHL
A B None None
B A None None
Other Input
Same Bit
Apply Apply Apply Apply
4.5V GND 4.5V GND
Functional Description
The ’LS181 is a 4-bit high speed parallel Arithmetic Logic Unit (ALU). Controlled by the four Function Select inputs (S0–S3) and the Mode Control input (M), it can perform all the 16 possible logic operations or 16 different arithmetic operations on active HIGH or active LOW operands. The Function Table lists these operations
When the Mode Control input (M) is HIGH, all internal car­ries are inhibited and the device performs logic operations on the individual bits as listed. When the Mode Control input is LOW, the carries are enabled and the device performs arithmetic operations on the two 4-bit words. The device incorporates full internal carry lookahead and provides for either ripple carry between devices using the C or for carry lookahead between packages using the signals P
(Carry Propagate) and G (Carry Generate). In the ADD
mode, P
indicates that F is 15 or more, while G indicates
that F
is 16 or more. In the SUBTRACT mode, P indicates
that F
is zero or less, while G indicates that F is less than
zero. P
and G are not affected by carry in. When speed
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output,
requirements are not stringent, it can be used in a simple ripple carry mode by connecting the Carry output (C signal to the Carry input (C operation the device is used in conjunction with the 9342 or
) of the next unit. For high speed
n
na4
93S42 carry lookahead circuit. One carry lookahead pack-
age is required for each group of four ’LS181 devices. Carry lookahead can be provided at various levels and offers high speed capability over extremely long word lengths.
e
The A F
outputs are HIGH and can be used to indicate logic equiv-
alence over four bits when the unit is in the subtract mode.
e
The A with other A than four bits. The A C
signal to indicate AlB and AkB.
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The Function Table lists the arithmetic operations that are performed without a carry in. An incoming carry adds a one to each operation. Thus, select code LHHL generates A minus B minus 1 (2s complement notation) without a carry in and generates A minus B when a carry is applied. Be­cause subtraction is actually performed by complementary addition (1s complement), a carry out means borrow; thus a carry is generated when there is no underflow and no carry is generated when there is underflow. As indicated, this de­vice can be used with either active LOW inputs producing
)
active LOW outputs or with active HIGH inputs producing active HIGH outputs. For either case the table lists the oper­ations that are performed to the operands labeled inside the logic symbol.
eS2eMe
4.5V, S0eS3e0V
Other Data Inputs Output
Under
Test
Remaining
A and B,C
Remaining
A and B,C
n
n
Any F
Any F
B output from the device goes HIGH when all four
B output is open-collector and can be wired-AND
e
B outputs to give a comparison for more
e
B signal can also be used with the
Function Table
Mode Select Active LOW Operands Active HIGH Operands
Inputs & F
Outputs & FnOutputs
n
Logic Arithmetic** Logic Arithmetic**
S3 S2 S1 S0 (M
e
H) (MeL) (C
e
L) (MeH) (MeL) (C
n
LLLLA A minus 1 A A LLLHAB
a
LLHLA
B AB minus 1 ABA
AB minus 1 AaB AaB
a
B
L L H H Logic 1 minus 1 Logic 0 minus 1
a
LHLLA
B A plus (AaB)AB A plus AB LHLHB AB plus (AaB)B (AaB) plus AB LHHLA LHHHA
HLLLA HLLHA HLHLB AB HLHHA
Z
B A minus B minus 1 AZB A minus B minus 1
a
B A
a
B AB AB minus 1
B A plus (AaB) AaB A plus AB
Z
B A plus B AZB A plus B
plus (AaB) B (AaB) plus AB
a
BA
a
B AB AB minus 1
H H L L Logic 0 A plus A* Logic 1 A plus A* HHLHAB HHHLAB AB
AB plus A AaB (AaB) plus A
minus A AaB(A
a
B) plus A
HHHHA A A Aminus 1
*Each bit is shifted to the next most significant position.
**Arithmetic operations expressed in 2s complement notation.
5
e
H)
n
Page 6
Logic Symbols
Active High Operands
TL/F/9821– 3
Active Low Operands
V
GND
e
Pin 24
CC
e
Pin 12
TL/F/9821– 4
6
Page 7
Logic Diagram
TL/F/9821– 5
7
Page 8
8
Page 9
Physical Dimensions inches (millimeters)
Order Number DM54LS181J
NS Package Number J24A
Package (J)
24-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS181N
NS Package Number N24A
9
Page 10
Physical Dimensions inches (millimeters) (Continued)
Package (W)
Order Number DM54LS181W
NS Package Number W24C
DM54LS181/DM74LS181 4-Bit Arithmetic Logic Unit
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user.
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1111 West Bardin Road Fax: ( Arlington, TX 76017 Email: cnjwge@tevm2.nsc.com Ocean Centre, 5 Canton Rd. Fax: 81-043-299-2408 Tel: 1(800) 272-9959 Deutsch Tel: ( Fax: 1(800) 737-7018 English Tel: (
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a
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a
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