Datasheet 74ABTH16827ADL, 74ABTH16827ADGG, 74ABT16827ADL, 74ABT16827ADGG Datasheet (Philips)

INTEGRATED CIRCUITS

74ABT16827A
74ABTH16827A

20-bit buffer/line driver, non-inverting
(3-State)

Product specification
Supersedes data of 1995 Aug 31
IC23 Data Handbook

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1998 Feb 27

Philips Semiconductors Product specification

Quiescent su ly current

20-bit buffer/line driver, non-inverting (3-State)

FEA TURES

•Multiple V

and GND pins minimize switching noise

CC

•Live insertion/extraction permitted

•3-State output buffers

•Power-up 3-State

•74ABTH16827A incorporates bus-hold data inputs which

eliminate the need for external pull-up resistors to hold unused
inputs

•Output capability: +64mA/-32mA

•Latch-up protection exceeds 500mA per Jedec Std 17

•ESD protection exceeds 2000 V per MIL STD 883 Method 3015

and 200 V per Machine Model

QUICK REFERENCE DATA

SYMBOL PARAMETER

C

t

PLH

t

PHL

C

OUT

I

CCZ

I

CCL

IN

Propagation delay
nAx to nYx

Input capacitance VI = 0V or V
Output capacitance VO = 0V or VCC; 3-State 6 pF

pp

DESCRIPTION

The 74ABT16827A high-performance BiCMOS device combines
low static and dynamic power dissipation with high speed and high
output drive.

The 74ABT16827A 20-bit buffers provide high performance bus
interface buffering for wide data/address paths or buses carrying
parity. They have NOR Output Enables (nOE
control flexibility.

Two options are available, 74ABT16827A which does not have the
bus-hold feature and 74ABTH16827A which incorporates the
bus-hold feature.

Outputs disabled; VCC = 5.5V 500 µA

74ABT16827A

74ABTH16827A

1, nOE2) for maximum

CONDITIONS

T

= 25°C; GND = 0V

amb

CL = 50pF; VCC = 5V

CC

Outputs Low; VCC = 5.5V 9 mA

TYPICAL UNIT

1.7

1.4
4 pF

ns

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

56-Pin Plastic SSOP Type III –40°C to +85°C 74ABT16827A DL BT16827A DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABT16827A DGG BT16827A DGG SOT364-1
56-Pin Plastic SSOP Type III –40°C to +85°C 74ABTH16827A DL BH16827A DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABTH16827A DGG BH16827A DGG SOT364-1

PIN DESCRIPTION

PIN NUMBER SYMBOL FUNCTION

55, 54, 52, 51, 49, 48, 47, 45, 44, 43,

42, 41, 40, 38, 37, 36, 34, 33, 31, 30

2, 3, 5, 6, 8, 9, 10, 12, 13, 14,

15, 16, 17, 19, 20, 21, 23, 24, 26, 27

1, 56,

28, 29

4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V)

7, 22, 35, 50 V

1A0 - 1A9
2A0 - 2A9

1Y0 - 1Y9
2Y0 - 2Y9

1OE0, 1OE1
2OE0, 2OE1

CC

Data inputs

Data outputs

Output enable inputs (active-Low)

Positive supply voltage

1998 Feb 27 853-1824 19025

2

Philips Semiconductors Product specification

OPERATING MODE

20-bit buffer/line driver, non-inverting (3-State)

PIN CONFIGURATION

1
2

1Y0

3

1Y1

4

GND

5

1Y2

6

1Y3

7

V

CC

8

1Y4

9

1Y5

10

1Y6

GND

11

1Y7

12

1Y8

13

1Y9

14

2Y0

15

2Y1

16

2Y2

17

GND

18

2Y3

19

2Y4

20

2Y5

21

V

22

CC

23

2Y6

24

2Y7

25

GND

26

2Y8

27

2Y9

28 29

2OE0

LOGIC SYMBOL

55 54 52 51 49 48 47 45 44 43

1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7

1

1OE0

56

1OE1

1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6 1Y7

561OE0
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30

SH00010

1OE1
1A0
1A1
GND
1A2
1A3
V

CC

1A4
1A5
1A6
GND
1A7
1A8
1A9
2A0
2A1
2A2
GND
2A3
2A4
2A5
V

CC

2A6
2A7
GND
2A8
2A9
2OE1

1A8 1A9

1Y8 1Y9

LOGIC SYMBOL (IEEE/IEC)

FUNCTION TABLE

X = Don’t care
Z = High impedance “off” state
H = High voltage level
L = Low voltage level

74ABT16827A

74ABTH16827A

1
56
28
29

55
54
52
51
49
48
47
45
44

43
42
41
40
38
37
36
34
33
31
30

INPUTS OUTPUTS

nOEx nAx nYx

L L L Transparent
L H H Transparent

H X Z High impedance

&

EN1

&

EN2

1 ∇

1

2 ∇

1

2
3
5
6
8

9
10
12
13
14
15
16
17
19
20
21
23
24
26
27

SH00012

28
29

1998 Feb 27

2 3 5 6 8 9 10 12 13 14

42 41 40 38 37 36 34 33 31 30

2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7

2OE0
2OE1

2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7

15 16 17 19 20 21 23 24 26 27

2A8 2A9

2Y8 2Y9

SH00011

3

Philips Semiconductors Product specification

I

DC output current

SYMBOL

PARAMETER

UNIT

20-bit buffer/line driver, non-inverting (3-State)

74ABT16827A

74ABTH16827A

LOGIC DIAGRAM

nA0

nOE

0

nOE1

nY0

ABSOLUTE MAXIMUM RA TINGS

SYMBOL

V

CC

I

IK

V

I

OK

V

OUT

OUT

T

stg

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

DC supply voltage –0.5 to +7.0 V
DC input diode current VI < 0 –18 mA
DC input voltage

I

DC output diode current VO < 0 –50 mA
DC output voltage

p

Storage temperature range –65 to 150 °C

nA1

nY1

nA2

nY2

nA3

nY3

nA4

nY4

nA5

nY5

nA6

nY6

nA7

nY7

nA8

nY8

SH00013

1, 2

PARAMETER CONDITIONS RATING UNIT

3

3

Output in Off or High state –0.5 to +5.5 V

–1.2 to +7.0 V

Output in Low state 128 mA

Output in High state –64 mA

nA9

nY9

RECOMMENDED OPERATING CONDITIONS

1998 Feb 27

LIMITS

MIN MAX

V

CC

V

V

V

I

OH

I

OL

DC supply voltage 4.5 5.5 V
Input voltage 0 V

I

High-level input voltage 2.0 V

IH

Low-level Input voltage 0.8 V

IL

High-level output current –32 mA
Low-level output current 64 mA

CC

V

∆t/∆v Input transition rise or fall rate 0 10 ns/V

T

amb

Operating free-air temperature range –40 +85 °C

4

Philips Semiconductors Product specification

I

74ABTH16827A

Data pins

4

5

74ABTH16827A

20-bit buffer/line driver, non-inverting (3-State)

74ABT16827A

74ABTH16827A

DC ELECTRICAL CHARACTERISTICS

LIMITS

T

= -40°C

SYMBOL PARAMETER

TEST CONDITIONS

T

amb

= +25°C

MIN TYP MAX MIN MAX

V

V

V

Input clamp voltage VCC = 4.5V; IIK = -18mA –0.9 –1.2 –1.2 V

IK

VCC = 4.5V; IOH = -3mA; VI = VIL or V

High-level output voltage VCC = 5.0V; IOH = -3mA; VI = VIL or V

OH

VCC = 4.5V; IOH = -32mA; VI = VIL or V

Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or V

OL

I

Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA

I

IH
IH

IH

IH

2.5 2.9 2.5 V

3.0 3.4 3.0 V

2.0 2.4 2.0 V

0.42 0.55 0.55 V

VCC = 5.5V; VI = 5.5V 0.01 1 1 µA

Input leakage current

I

I

VCC = 5.5V; VI = VCC or GND
VCC = 5.5V; VI = V

CC

VCC = 5.5V; VI = 0

Control

pins

p

±0.01 ±1 ±1 µA

0.01 1 1 µA
–1 –3 –5 µA

VCC = 4.5V; VI = 0.8V 35 35

I

HOLD

Bus Hold current A inputs

VCC = 4.5V; VI = 2.0V –75 –75
VCC = 5.5V; VI = 0 to 5.5V ±800

I

OFF

IPU/I

I

OZH

I

OZL

I

CEX

I

CCH

I

CCL

I

CCZ

∆I

NOTES:

1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

Power-off leakage current VCC = 0.0V; VO = 4.5V; VI = 0V or 5.5V ±5.0 ±100 ±100 µA
Power-up/down 3-State

PD

output current

3

3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or V
3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or V
Output High leakage

current

I

O

Output current

1

Quiescent supply current VCC = 5.5V; Outputs Low, VI = GND or V

Additional supply current

CC

per input pin

2

VCC = 2.1V; VO = 0.5V; VI = GND or VCC;
VOE = Don’t care

IH
IH

VCC = 5.5V; VO = 5.5V; VI = GND or V

CC

±5.0 ±50 ±50 µA

1.0 10 10 µA

–1.0 –10 –10 µA

1.0 50 50 µA

VCC = 5.5V; VO = 2.5V –50 –70 –180 –50 –180 mA
VCC = 5.5V; Outputs High, VI = GND or

V

CC

VCC = 5.5V; Outputs 3-State;
VI = GND or V

CC

VCC = 5.5V; one input at 3.4V,
other inputs at VCC or GND

CC

0.5 1 1 mA
9 19 19 mA

0.5 1 1 mA

0.2 1 1 mA

2. This is the increase in supply current for each input at 3.4V.

3. This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a
transition time of up to 100µsec is permitted.

4. Unused pins at V

5. This is the bus hold overdrive current required to force the input to the opposite logic state.

or GND.

CC

amb

to +85°C

UNIT

µA

AC CHARACTERISTICS

GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω

1998 Feb 27

SYMBOL PARAMETER WAVEFORM

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

Propagation delay
nAx to nYx

Output enable time
to High and Low level

Output disable time
from High and Low level

1

2

2

LIMITS

T

T

= +25oC

amb

VCC = +5.0V

amb

VCC = +5.0V ±0.5V

MIN TYP MAX MIN MAX

1.0

0.6

1.0

1.0

2.0

1.6

1.7

1.4

3.0

3.0

3.2

2.4

2.4

2.0

4.1

4.0

4.3

3.2

1.0

0.6

1.0

1.0

2.0

1.6

5

= -40 to

+85oC

2.7

2.3

5.0

5.0

5.0

3.5

UNIT

ns

ns

ns

Philips Semiconductors Product specification

20-bit buffer/line driver, non-inverting (3-State)

AC WAVEFORMS

3.0V or V

CC

whichever

nAx INPUT

nYx
OUTPUT

V

M

t

PLH

V

M

V

M

t

PHL

Waveform 1. Input (nAx) to Output (nYx) Propagation Delays

TEST CIRCUIT AND WAVEFORM

is less

0V

V

OH

V

M

V

OL

SA00016

74ABT16827A

74ABTH16827A

nOEx INPUT

nYx OUTPUT

nYx OUTPUT

V

M

t

PZL

V

M

t

PZH

V

M

Waveform 2. 3-State Output Enable and Disable Times

V

M

t

PLZ

t

PHZ

3.5V

+ 0.3V

V

OL

V

OL

V

OH

VOH – 0.3V

0V

SA00071

V

CC

R

PULSE

GENERATOR

V

IN

R

D.U.T.

T

V

OUT

C

L

L

R

L

Test Circuit for 3-State Outputs

SWITCH POSITION

TEST SWITCH

t
t

PLZ
PZL

closed
closed

All other open

DEFINITIONS

RL = Load resistor; see AC CHARACTERISTICS for value.

= Load capacitance includes jig and probe capacitance;

C

L

see AC CHARACTERISTICS for value.

R

= Termination resistance should be equal to Z

T

pulse generators.

OUT

of

t

W

(tF)

(tR)t

t

W

90%

V

M

t

TLH

THL

V

M

10%

7.0V

90%

NEGATIVE
PULSE

POSITIVE
PULSE

10%

V

M

10% 10%

t

THL

t

TLH

90% 90%

V

M

VM = 1.5V

Input Pulse Definition

INPUT PULSE REQUIREMENTS

FAMILY

Amplitude Rep. Rate t

t

W

R

74ABT/H16 3.0V 1MHz 500ns 2.5ns 2.5ns

AMP (V)

0V

(tR)

(tF)

AMP (V)

0V

t

F

SA00018

1998 Feb 27

6

Philips Semiconductors Product specification

20-bit buffer/line driver, non-inverting (3-State)

74ABT16827A

74ABTH16827A

SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm SOT371-1

1998 Feb 27

7

Philips Semiconductors Product specification

20-bit buffer/line driver, non-inverting (3-State)

74ABT16827A

74ABTH16827A

TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm SOT364-1

1998 Feb 27

8

Philips Semiconductors Product specification

20-bit buffer/line driver, non-inverting (3-State)

NOTES

74ABT16827A

74ABTH16827A

1998 Feb 27

9

Philips Semiconductors Product specification

20-bit buffer/line driver, non-inverting (3-State)

Data sheet status

Data sheet
status

Objective
specification

Preliminary
specification

Product
specification

Product
status

Development

Qualification

Production

Definition

This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.

This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.

[1]

74ABT16827A

74ABTH16827A

[1] Please consult the most recently issued datasheet before initiating or completing a design.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can

reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone [phone]

 Copyright Philips Electronics North America Corporation 1998

All rights reserved. Printed in U.S.A.

print code Date of release: 05-96
Document order number: 9397-750-03504

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