Page 1
INTEGRATED CIRCUITS
74ABT16646
74ABTH16646
16-bit bus transceiver/register (3-State)
Product specification
Supersedes data of 1995 Aug 17
IC23 Data Handbook
1998 Feb 27
Page 2
Philips Semiconductors Product specification
I
Quiescent supply current
16-bit bus transceiver/register (3-State)
FEA TURES
•Independent registers for A and B buses
•Multiple VCC and GND pins minimize switching noise
•Live insertion/extraction permitted
•Power–up 3-State
•Power–up reset
•Multiplexed real-time and stored data
•Outputs sink 64mA and source 32mA
•Latch–up protection exceeds 500mA per JEDEC Std 17
•74ABTH16646 incorporates bus-hold data inputs which eliminate
the need for external pull-up resistors to hold unused inputs
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
SYMBOL PARAMETER
t
PLH
t
PHL
C
C
CCZ
IN
I/O
Propagation delay
nAx to nBx
Input capacitance VI = 0V or V
I/O capacitance VO = 0V or VCC; 3-State 7 pF
pp
74ABT16646
74ABTH16646
DESCRIPTION
The 74ABT16646 high–performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT16646 16-bit transceiver/register consists of two sets of
bus transceiver circuits with 3-State outputs, D-type flip-flops, and
control circuitry arranged for multiplexed transmission of data
directly from the input bus or from the internal registers. Data on the
A or B bus will be clocked into the registers as the appropriate clock
pin goes High. Output Enable (nOE
provided to control the transceiver function. In the transceiver mode,
data present at the high impedance port may be stored in either the
A or B register or both.
The select (nSAB, nSBA) pins determine whether data is stored or
transferred through the device in real-time. The nDIR determines
which bus will receive data when the nOE
isolation mode (nOE = High), data from Bus A may be stored in the
B register and/or data from Bus B may be stored in the A register.
When an output function is disabled, the input function is still
enabled and may be used to store and transmit data. Only one of
the two buses, A or B may be driven at a time.
Two options are available, 74ABT16646 which does not have the
bus-hold feature and 74ABTH16646 which incorporates the
bus-hold feature.
CONDITIONS
T
= 25°C; GND = 0V
amb
CL = 50pF; VCC = 5V
CC
Outputs disabled; VCC =5.5V 550 µA
Outputs low; VCC =5.5V 9 mA
) and Direction (nDIR) pins are
is active Low. In the
TYPICAL UNIT
3.3
2.7
3 pF
ns
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
56-Pin Plastic SSOP Type III –40°C to +85°C 74ABT16646 DL BT16646 DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABT16646 DGG BT16646 DGG SOT364-1
56-Pin Plastic SSOP Type III –40°C to +85°C 74ABTH16646 DL BH16646 DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABTH16646 DGG BH16646 DGG SOT364-1
PIN DESCRIPTION
5, 6, 8, 9, 10, 12, 13, 14
15, 16, 17, 19, 20, 21, 23, 24
52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40, 38, 37, 36, 34, 33
4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V)
1998 Feb 27 853-1782 19026
PIN NUMBER SYMBOL NAME AND FUNCTION
2, 55, 27, 30 1CPAB, 1CPBA, 2CPAB, 2CPBA Clock input A to B / Clock input B to A
3, 54, 26, 31 1SAB, 1SBA, 2SAB, 2SBA Select input A to B / Select input B to A
1, 28 1DIR, 2DIR Direction control inputs
1A0 – 1A7,
2A0 – 2A7
1B0 – 1B7,
2B0 – 2B7
56, 29 1OE, 2OE Output enable inputs
7, 22, 35, 50 V
CC
2
Data inputs/outputs (A side)
Data inputs/outputs (B side)
Positive supply voltage
Page 3
Philips Semiconductors Product specification
OPERATING MODE
16-bit bus transceiver/register (3-State)
PIN CONFIGURATION
1DIR
1CPAB
1SAB
GND
1A0
1A1
V
CC
1A2
1A3
1A4
GND
1A5
1A6
1A7
2A0
2A1
2A2
GND
2A3
2A4
2A5
V
CC
2A6
2A7
GND
2SAB
2CPAB
2DIR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
SH00026
56
1OE
55
1CPBA
1SBA
54
GND
53
1B0
52
1B1
51
50
V
CC
49
1B2
1B3
48
1B4
47
GND
46
1B5
45
1B6
44
1B7
43
2B0
42
41
2B1
2B2
40
GND
39
2B3
38
37
2B4
36
2B5
35
V
CC
34
2B6
33
2B7
32
GND
31
2SBA
30
2CPBA
29
20E
74ABT16646
74ABTH16646
FUNCTION TABLE
INPUTS DATA I/O
nOE nDIR nCPAB nCPBA nSAB nSBA nAx nBx
X X ↑ X X X Input
X
X
L
H
X
X
Unspecified
output*
Input Input
Output Input
Input Output
X X X ↑ X X
H
H
L
L
L
L
X
X
L
L
H
H
↑
H or L
X
X
X
H or L
↑
H or L
X
H or L
X
X
X
X
X
X
L
H
H = High voltage level
L = Low voltage level
X = Don’t care
↑ = Low-to-High clock transition
* The data output function may be enabled or disabled by various signals at the nOE
data at the bus pins will be stored on every Low–to–High transition of the clock.
1998 Feb 27
3
Unspecified
output*
Store A, B unspecified
Input Store B, A unspecified
Store A and B data
Isolation, hold storage
Real time B data to A bus
Stored B data to A bus
Real time A data to B bus
Stored A data to B bus
input. Data input functions are always enabled, i.e.,
Page 4
Philips Semiconductors Product specification
16-bit bus transceiver/register (3-State)
LOGIC SYMBOL (IEEE/IEC)
56
1OE
1DIR
1CPBA
1SBA
1CPAB
1SAB
2OE
2DIR
2CPBA
2SBA
2CPAB
2SAB
1A0
1A1
1A2
1A3
1A4
1A5
1A6
1A7
2A0
2A1
2A2
2A3
2A4
2A5
2A6
2A7
1
55
54
2
3
29
28
30
31
27
26
5
6
8
9
10
12
13
14
15
16
17
19
20
21
23
24
G3
3 EN1 [BA]
3 EN2 [AB]
C4
G5
C6
G7
G10
10 EN8 [BA]
10 EN9 [AB]
C11
G12
C13
G14
1
∇1
6D
7
17
1
∇8
13D 14
114
54D
5
1
1
2∇
12 11D
12 1
1
9∇
52
1B0
51
1B1
49
1B2
48
1B3
47
1B4
45
1B5
44
1B6
43
1B7
42
2B0
41
2B1
40
2B2
38
2B3
37
2B4
36
2B5
34
2B6
33
2B7
LOGIC SYMBOL
2
3
1 1DIR
55 1CPBA
54 1SBA
56 1OE
27
26
28 2DIR
30 2CPBA
31 2SBA
29 2OE
74ABT16646
74ABTH16646
5 9 10 12 13 1468
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
1CPAB
1SAB
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
52 51 49 48 47 45 44 43
15 16 17 19 20 21 23 24
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
2CPAB
2SAB
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
42 41 40 38 37 36 34 33
SH00027
1998 Feb 27
SH00025
4
Page 5
Philips Semiconductors Product specification
16-bit bus transceiver/register (3-State)
74ABT16646
74ABTH16646
The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74ABT16646.
REAL TIME BUS TRANSFER
BUS B TO BUS A
ABAB AB
REAL TIME BUS TRANSFER
BUS A TO BUS B
STORAGE FROM
A, B, OR A AND B
}
nOE nDIR nCPAB nCPBA nSAB nSBA
LLXXXL
}
nOE nDIR nCPAB nCPBA nSAB nSBA
LH X X LX
TRANSFER STORED DA TA
TO A OR B
AB
}
nOE nDIR nCPAB nCPBA nSAB nSBA
LH ↑ XXX
LL X ↑ XX
HX ↑↑XX
1998 Feb 27
}
nOE nDIR nCPAB nCPBA nSAB nSBA
L L X H | L X H
L H H | L X H X
SH00028
5
Page 6
Philips Semiconductors Product specification
I
DC out ut current
16-bit bus transceiver/register (3-State)
LOGIC DIAGRAM
nOE
nDIR
nCPBA
nSBA
nCPAB
nSAB
1 of 16 Channels
nA0
1D
C1
Q
74ABT16646
74ABTH16646
1D
C1
Q
nB0
nA1
nA2
nA3
nA4
nA5
nA6
nA7
ABSOLUTE MAXIMUM RATINGS
DETAIL A X 7
1, 2
nB1
nB2
nB3
nB4
nB5
nB6
nB7
SH00029
SYMBOL PARAMETER CONDITIONS RATING UNIT
V
V
I
V
I
OK
OUT
OUT
T
DC supply voltage –0.5 to +7.0 V
CC
DC input diode current VI < 0 –18 mA
IK
I
DC input voltage
3
–1.2 to +7.0 V
DC output diode current VO < 0 –50 mA
DC output voltage
p
3
output in Off or High state –0.5 to +5.5 V
output in Low state 128 mA
output in High state –64 mA
Storage temperature range –65 to 150 °C
stg
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Feb 27
6
Page 7
Philips Semiconductors Product specification
SYMBOL
PARAMETER
UNIT
I
g
V
V
GND or 5.5V
±0.01
±1.0
±1.0
µA
B
B
Ports 74ABTH16646
16-bit bus transceiver/register (3-State)
74ABT16646
74ABTH16646
RECOMMENDED OPERATING CONDITIONS
LIMITS
MIN MAX
V
V
V
V
I
OH
I
OL
∆t/∆v Input transition rise or fall rate 0 10 ns/V
T
amb
DC ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER TEST CONDITIONS
V
V
OH
V
OL
V
RST
I
HOLD
I
OFF
I
PU/PD
IIH + I
IIL + I
I
CEX
I
O
I
CCH
I
CCL
I
CCZ
∆I
CC
∆I
CC
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V
transition time of up to 100µsec is permitted.
5. This is the bus hold overdrive current required to force the input to the opposite logic state.
DC supply voltage 4.5 5.5 V
CC
Input voltage 0 V
I
High-level input voltage 2.0 V
IH
Low-level Input voltage 0.8 V
IL
High-level output current –32 mA
Low-level output current 64 mA
Operating free-air temperature range –40 +85 °C
LIMITS
T
T
amb
= +25°C
amb
to +85°C
MIN TYP MAX MIN MAX
Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V
IK
VCC = 4.5V; IOH = –3mA; VI = VIL or V
High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or V
VCC = 4.5V; IOH = –32mA; VI = VIL or V
Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or V
Power-up output voltage3VCC = 5.5V; IO = 1mA; VI = GND or V
I
Input leakage
current
CC
= 5.5V
;
=
I
IH
IH
IH
IH
CC
Control
pins
2.5 2.9 2.5 V
3.0 3.4 3.0 V
2.0 2.4 2.0 V
0.35 0.55 0.55 V
0.13 0.55 0.55 V
VCC = 4.5V; VI = 0.8V 35 35
us Hold current A or
5
VCC = 4.5V; VI = 2.0V –75 –75
VCC = 5.5V; VI = 0 to 5.5V ±800
Power-off leakage current VCC = 0.0V; VO = 4.5V; VI = 0.0V or 5.5V ±2.0 ±100 ±100 µA
Power-up/down 3-State
output current
3-State output High current VCC = 5.5V; VO = 5.5V; VI = VIL or V
OZH
3-State output Low current VCC = 5.5V; VO = 0.0V; VI = VIL or V
OZL
4
Output High leakage
current
Output current
1
Quiescent supply current
Additional supply current
per input pin
2
74ABT16646
Additional supply current
per input pin
2
74ABTH16646
VCC = 2.1V; VO = 0.0V or VCC;
VI = GND or VCC; OE/OE = X
VCC = 5.5V; VO = 5.5V; VI = GND or V
IH
IH
CC
±1.0 ±50 ±50 µA
1.0 10 10 µA
–1.0 –10 –10 µA
5.0 50 50 µA
VCC = 5.5V; VO = 2.5V –50 –80 –180 –50 –180 mA
VCC = 5.5V; Outputs High, VI = GND or
V
CC
VCC = 5.5V; Outputs Low, VI = GND or V
CC
VCC = 5.5V; Outputs 3–State;
VI = GND or V
CC
VCC = 5.5V; one input at 3.4V,
other inputs at VCC or GND
VCC = 5.5V; one input at 3.4V,
other inputs at VCC or GND
between 0V and 2.0V , with a transition time of up to 100msec. From VCC = 21.V to VCC = 5V ± 10% a
CC
0.55 2 2 mA
9 19 19 mA
0.55 2 2 mA
5.0 50 50 µA
200 500 500 µA
CC
= –40°C
V
UNIT
µA
1998 Feb 27
7
Page 8
Philips Semiconductors Product specification
16-bit bus transceiver/register (3-State)
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
SYMBOL PARAMETER WAVEFORM
f
MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
Maximum clock frequency 1 125 125 MHz
Propagation delay
nCPAB to nBx or nCPBA to nAx
Propagation delay
nAx to nBx or nBx to nAx
Propagation delay
nSAB to nBx or nSBA to nAx
Output enable time
nOE
to nAx or nBx
Output disable time
nOE to nAx or nBx
Output enable time
nDIR to nAx or nBx
Output disable time
nDIR to nAx or nBx
1
2
2, 3
5, 6
5, 6
5, 6
5, 6
74ABT16646
74ABTH16646
LIMITS
T
= -40 to
T
= +25oC
amb
VCC = +5.0V
MIN TYP MAX MIN MAX
1.5
1.5
1.0
1.0
1.0
1.0
1.0
1.5
1.5
1.5
1.0
1.5
2.0
1.5
3.3
2.7
2.3
2.0
3.1
2.7
3.2
3.3
3.5
2.7
4.1
4.3
3.6
2.7
4.0
4.1
3.2
4.1
4.3
4.3
4.6
4.9
4.9
4.1
4.8
4.8
5.7
5.1
amb
+85oC
V
= +5.0V ±0.5V
CC
1.5
1.5
1.0
1.0
1.0
1.0
1.0
1.5
1.5
1.5
1.0
1.5
2.0
1.5
4.9
4.7
3.9
4.6
5.0
5.0
5.5
5.7
5.4
4.5
5.4
5.6
6.7
5.9
UNIT
ns
ns
ns
ns
ns
ns
ns
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
SYMBOL PARAMETER WAVEFORM
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
Setup time
nAx to nCPAB, nBx to nCPBA
Hold time
nAx to nCPAB, nBx to nCPBA
Pulse width, High or Low
nCPAB or nCPBA
4
4
1
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
1/f
MAX
nCPBA or
nCPAB
nAx or nBx
V
M
tw(H) tw(L)
t
PHL
V
V
M
M
V
M
t
PLH
V
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
3.0V or V
CC
whichever
is less
0V
V
OH
M
V
OL
SH00030
LIMITS
T
= +25oC
amb
VCC = +5.0V
T
= -40 to +85oC
amb
VCC = +5.0V ±0.5V
UNIT
MIN TYP MIN
2.0
1.5
1.5
1.0
4.5
3.0
nSBA or nSAB
nAx or nBx
1.0
0.8
0.0
–0.7
2.5
2.0
V
M
2.0
1.5
1.5
1.0
4.5
3.0
V
M
t
PLH
V
M
t
PHL
V
M
3.0V or V
nAx or nBx
0V
V
OH
nAx or nBx
V
OL
SH00031
ns
ns
ns
CC
Waveform 2. Propagation Delay, nSAB to nBx or nSBA to nAx,
nAx to nBx or nBx to nAx
1998 Feb 27
8
Page 9
Philips Semiconductors Product specification
16-bit bus transceiver/register (3-State)
AC WAVEFORMS (Continued)
VM = 1.5V, VIN = GND to 3.0V
3.0V or V
nSBA or
nSAB
nAx or nBx
Waveform 3. Propagation Delay, nSBA to nAx or nSAB to nBx
nAx or
nBx
ts(H)
nCPBA or
nCPAB
NOTE: The shaded areas indicate when the input is permitted
TEST CIRCUIT AND WAVEFORMS
V
M
t
PHL
V
V
M
V
M
to change for predictable output performance.
V
M
t
PLH
V
M
M
t
(H)
h
V
M
V
V
M
M
(L)
t
s
V
M
Waveform 4. Data Setup and Hold Times
0V
V
V
t
(L)
h
OH
OL
SH00032
SH00033
CC
3.0V
or
V
CC
0V
3.0V
or
V
CC
0V
74ABT16646
74ABTH16646
3.0V or V
nOE, nDIR
nDIR
nAx or nBx
V
M
t
PZH
V
M
t
PHZ
V
M
Waveform 5. 3–State Output Enable Time to High Level and
Output Disable Time from High Level
nOE, nDIR
nDIR
nAx or nBx
V
M
t
PZL
V
M
t
PLZ
V
M
Waveform 6. 3–State Output Enable Time to Low Level and
Output Disable Time from Low Level
whichever
is less
0V
V
OH
V
Y
0V
SH00034
3.0V or V
0V
3.0V or V
V
X
V
0V
OL
SH00035
CC
CC
CC
V
CC
R
PULSE
GENERATOR
V
IN
R
D.U.T.
T
V
OUT
C
L
L
R
L
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST SWITCH
t
t
PLZ
PZL
closed
closed
All other open
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
C
= Load capacitance includes jig and probe capacitance;
L
see AC CHARACTERISTICS for value.
RT = T ermination resistance should be equal to Z
pulse generators.
OUT
of
t
W
(tF)
(tR)t
t
W
90%
V
M
t
TLH
THL
V
M
10%
7.0V
90%
NEGATIVE
PULSE
POSITIVE
PULSE
10%
V
M
10% 10%
t
THL
t
TLH
90% 90%
V
M
VM = 1.5V
Input Pulse Definition
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude Rep. Rate t
t
W
R
74ABT/H16 3.0V 1MHz 500ns 2.5ns 2.5ns
AMP (V)
0V
(tR)
(tF)
AMP (V)
0V
t
F
SA00018
1998 Feb 27
9
Page 10
Philips Semiconductors Product specification
16-bit bus transceiver/register (3-State)
74ABT16646
74ABTH16646
SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm SOT371-1
1998 Feb 27
10
Page 11
Philips Semiconductors Product specification
16-bit bus transceiver/register (3-State)
74ABT16646
74ABTH16646
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm SOT364-1
1998 Feb 27
11
Page 12
Philips Semiconductors Product specification
16-bit bus transceiver/register (3-State)
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
74ABT16646
74ABTH16646
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
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Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 05-96
Document order number: 9397-750-03498
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