DATA SHEET
MOS FIELD EFFECT TRANSISTOR
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
2SK3061
DESCRIPTION
This product is N-Channel MOS Field Effect Transistor
designed for high current switching application.
FEATURES
• Low on-state resistance
DS(on)1
R
= 8.5 mΩ MAX. (VGS = 10 V, ID = 35 A)
DS(on)2
R
= 12 mΩ MAX. (VGS = 4.0 V, ID = 35 A)
iss
• Low C
iss
: C
= 5200 pF TYP.
• Built-in gate protection diode
• Isolated TO-220 package
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage V
Gate to Source Voltage V
Gate to Source Voltage V
Drain Current (DC) I
Drain Current (pulse)
Total Power Dissipation (T
Total Power Dissipation (T
Note1
C
= 25°C) P
A
= 25°C) P
Channel Temperature T
Storage Temperature T
Single Avalanche Current
Single Avalanche Energy
Note2
Note2
DSS
GSS(AC)
GSS(DC)
D(DC)
D(pulse)
I
T
T
ch
stg
AS
I
AS
E
ORDERING INFORMATION
PART NUMBER PACKAGE
2SK3061 Isolated TO-220
60 V
±20 V
+20, –10 V
±70 A
±280 A
35 W
2.0 W
150 °C
–55 to +150 °C
35 A
122.5 mJ
Notes 1.
PW ≤ 10 µs, Duty Cycle ≤ 1 %
2.
Starting Tch = 25 °C, RG = 25 Ω, VGS = 20 V→0 V
THERMAL RESISTANCE
Channel to Case R
Channel to Ambient R
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D13100EJ1V0DS00 (1st edition)
Date Published March 1999 NS CP(K)
Printed in Japan
th(ch-C)
th(ch-A)
3.57 °C/W
62.5 °C/W
©
1998,1999
ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
2SK3061
Drain to Source On-state Resi stance R
Gate to Source Cut-off Voltage V
DS(on)1VGS
DS(on)2VGS
R
GS(off)VDS
= 10 V, ID = 35 A6.38.5m
= 4.0 V, ID = 35 A8.212m
= 10 V, ID = 1 mA 1.0 1.5 2.0 V
Forward Transfer Admittance | yfs |VDS = 10 V, ID = 35 A 20 87 S
Drain Leakage Current I
Gate to Source Leakage Current I
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Turn-on Delay Time t
Rise Time t
Turn-off Delay Time t
Fall Time t
Total Gate Charge Q
Gate to Source Charge Q
Gate to Drain Charge Q
Body Diode Forward Voltage V
Reverse Recovery Time t
Reverse Recovery Charge Q
DSS
VDS = 60 V, VGS = 0 V10
GSS
VGS = ±20 V, VDS = 0 V
iss
VDS = 10 V 5200 pF
oss
VGS = 0 V 1300 pF
rss
f = 1 MHz 480 pF
d(on)ID
d(off)
GS
GD
F(S-D)IF
rr
= 35 A75ns
r
GS(on)
V
= 10 V 1150 ns
VDD = 30 V 360 ns
f
G
RG = 10
Ω
480 ns
ID = 70 A95nC
VDD = 48 V13nC
GS(on)
V
= 10 V30nC
= 70 A, VGS = 0 V0.97V
IF = 70 A, VGS = 0 V70ns
rr
di/dt = 100 A /
s 140 nC
µ
10
±
Ω
Ω
A
µ
A
µ
TEST CIRCUIT 1 AVALANCHE CAPABILITY
PG.
VGS = 20 → 0 V
V
G
R
DD
= 25 Ω
50 Ω
I
D
D.U.T.
I
AS
BV
DSS
V
DS
Starting T
L
V
DD
ch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I
G
PG.
= 2 mA
50 Ω
R
L
V
DD
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
R
PG.
V
GS
0
τ
τ = 1 µs
Duty Cycle ≤ 1 %
G
R
G
= 10 Ω
V
V
GS
Wave Form
I
D
Wave Form
GS
10 %
0
I
D
10 %10
0
t
d(on)
V
90
%
I
trt
t
on
GS(on)
D
d(off)tf
%
90
90
%
%
t
off
L
R
V
DD
2
Data Sheet D13100EJ1V0DS00
TYPICAL CHARACTERISTICS (TA = 25 °C)
2SK3061
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
100
80
60
40
20
dT - Percentage of Rated Power - %
0
20 40 60 80 100 120 140 160
T
C
- Case Temperature - °C
FORWARD BIAS SAFE OPERATING AREA
1000
I
D(pulse)=280 A
= 10V)
100
DS(on)
R
10
- Drain Current - A
D
I
GS
I
D(DC)=70 A
Limited(@V
DC Dissipation Limited
100
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
70
60
50
40
30
20
- Total Power Dissipation - W
T
10
P
0
20 40 60 80 100 120 140 160
T
C
- Case Temperature - °C
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
Pulsed
P
W
=
10
100
µs
µs
1
ms
10
ms
ms
200
100
- Drain Current - A
D
I
VGS =
10 V
VGS =
4.0 V
TC = 25
˚C
Single Pulse
1
0.1
1 10 100
V
DS
- Drain to Source Voltage - V
FORWARD TRANSFER CHARACTERISTICS
100
TA = 125˚C
10
75˚C
25˚C
−25˚C
1
- Drain Current - A
D
I
0.1
Pulsed
DS
V
012345
V
GS
- Gate to Source Voltage - V
= 10 V
0
1
V
DS
- Drain to Source Voltage - V
2
3
4
Data Sheet D13100EJ1V0DS00
3
1000
2SK3061
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
100
10
1
0.1
0.01
- Transient Thermal Resistance - ˚C/W
th(t)
r
0.001
100
µµ
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
100
Tch = −25˚C
25˚C
75˚C
125˚C
1
m10
10
m 100 m 1 10 100 1000 10
PW - Pulse Width - s
th(ch-A)
= 62.5 ˚C/W
R
R
th(ch-C)
= 3.57 ˚C/W
TC = 25˚C
Single Pulse
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
30
Pulsed
20
1
| - Forward Transfer Admittance - S
fs
y
|
0.1
1.0
I
D
- Drain Current - A
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
30
20
VGS =
10
4.0 V
- Drain to Source On-state Resistance - mΩ
0
DS(on)
R
10.1
10 100
I
D
- Drain Current - A
VDS = 10
Pulsed
10 100
Pulsed
10 V
10
ID = 35
A
V
- Drain to Source On-state Resistance - mΩ
05
DS(on)
R
V
GS
- Gate to Source Voltage - V
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
2.0
10 15
VDS = 10 V
D
= 1 mA
I
1.5
1.0
0.5
- Gate to Source Cut-off Voltage - V
GS(off)
0
V
−50
0 50 100 150
T
ch
- Channel Temperature - ˚C
4
Data Sheet D13100EJ1V0DS00
2SK3061
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
20
VGS = 4.0 V
15
10
5
- Drain to Source On-state Resistance - mΩ
DS(on)
R
0
−50
0
T
ch
- Channel Temperature - ˚C
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
50
100 150
100
10
1
Ciss, Coss, Crss - Capacitance - pF
0.1
0.1
1 10 100
V
DS
- Drain to Source Voltage - V
10 V
I
D
= 35 A
VGS = 0 V
f = 1 MHz
C
C
oss
C
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
100
VGS = 4.0 V
0 V
10
1
- Diode Forward Current - A
SD
0.1
I
Pulsed
0
0.5
V
SD
- Source to Drain Voltage - V
1
1.5
SWITCHING CHARACTERISTICS
VDS = 30 V
GS
= 10 V
10000
iss
rss
1000
- Switching Time - ns
f
100
, t
d(off)
, t
r
, t
10
d(on)
t
0.1
t
d(off)
1 10 100
I
D
- Drain Current - A
V
R
G
= 10 Ω
t
r
t
d(on)
t
f
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
1000
100
10
- Reverse Recovery Time - ns
rr
t
1
0.1
1 10 100
I
F
- Drain Current - A
di/dt = 100 A /
V
GS
=
0 V
Data Sheet D13100EJ1V0DS00
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
µ
s
80
D
= 70 A
I
V
GS
60
VDD = 12 V
30 V
40
48 V
= 10 V
16
14
12
10
8
6
20
- Drain to Source Voltage - V
DS
V
0
25 50 75 100
Q
G
- Gate Charge - nC
4
- Gate to Source Voltage - V
GS
2
V
0
5
2SK3061
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD
100
IAS = 35 A
E
AS
=
10
1.0
G
= 25 Ω
R
- Single Avalanche Current - A
V
DD
0.1
10
= 30 V
V
GS
= 20 V → 0 V
Starting T
µ
ch
= 25 °C
100
µ
L - Inductive Load - H
AS
I
PACKAGE DRAWING (Unit : mm)
Isolated TO-220 (MP-45F)
10.0 ± 0.3
φ
3.2
±
4.5 ± 0.2
0.2
122.5
mJ
1
m10
2.7
m
±
0.2
SINGLE AVALANCHE ENERGY
160
140
120
100
Energy Derating Factor - %
DERATING FACTOR
80
60
40
20
0
25 50
Starting T
75 100
ch
- Starting Channel Temperature - ˚C
VDD = 30 V
G
= 25 Ω
R
GS
= 20 V → 0 V
V
AS
≤ 35 A
I
125 150
0.7 ± 0.1
Remark
EQUIVALENT CIRCUIT
0.3
±
15.0
2.54
123
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
1.3
2.54
0.1
0.2
±
±
3
12.0
0.2
±
MIN.
4
13.5
±
0.2
1.Gate
2.Drain
3.Source
0.65
Drain (D)
Body
Gate (G)
Diode
Gate
Protection
±
0.1
2.5
±
0.11.5 ± 0.2
Diode
Source (S)
6
Data Sheet D13100EJ1V0DS00
[MEMO]
2SK3061
Data Sheet D13100EJ1V0DS00
7
2SK3061
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
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rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
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parties arising from the use of these circuits, software, and information.
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the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
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measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
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The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
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M7 98. 8
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