Datasheet 2SK2978 Datasheet (HIT)

Page 1
Features
Low on-resistance
= 0.09Ω typ. (VGS = 4 V, ID = 1.5 A)
DS(on)
Low drive current
High speed switching
2.5V gate drive devices.
Outline
2SK2978
Silicon N Channel MOS FET High Speed Power Switching
ADE-208-659B (Z)
3rd. Edition
Jun 1998
G
UPAK
1
2
3
D
4
1. Gate
2. Drain
3. Source
4. Drain
S
Page 2
2SK2978
Absolute Maximum Ratings (Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage V Gate to source voltage V Drain current I Drain peak current I Body-drain diode reverse drain current I Channel dissipation Pch
DSS
GSS
D
D(pulse)
DR
Note1
Note2
Channel temperature Tch 150 °C Storage temperature Tstg –55 to +150 °C
Note: 1. PW 10µs, duty cycle 1 %
2. When using the alumina ceramic board (12.5 x 20 x 0.7 mm)
Electrical Characteristics (Ta = 25°C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown voltage V Gate to source breakdown voltage V Zero gate voltege drain current I Gate to source leak current I Gate to source cutoff voltage V Static drain to source on state
(BR)DSS
(BR)GSS
DSS
GSS
GS(off)
R
DS(on)
resistance Static drain to source on state
R
DS(on)
resistance Forward transfer admittance |yfs| 3.0 5.0 S ID = 1.5A, VDS = 10V Input capacitance Ciss 260 pF VDS = 10V Output capacitance Coss 150 pF VGS = 0 Reverse transfer capacitance Crss 75 pF f = 1MHz Turn-on delay time t Rise time t Turn-off delay time t Fall time t Body–drain diode forward voltage V Body–drain diode reverse
t
d(on)
r
d(off)
f
DF
rr
recovery time Note: 3. Pulse test
4. Marking is “ZY”
20——V I ±10——V I ——10µAVDS = 20 V, VGS = 0 ——±10 µAVGS = ±8V, VDS = 0
0.5 1.5 V ID = 1mA, VDS = 10V — 0.09 0.12 ID = 1.5A, VGS = 4V
0.12 0.20 ID = 1.5A, VGS = 2.5V
15 ns VGS = 4V, ID = 1.5A — 70 ns RL = 6.67 —55—ns —70—ns — 0.9 V IF = 2.5A, VGS = 0 — 75 ns IF = 2.5A, VGS = 0
20 V ±10 V
2.5 A 5A
2.5 A 1W
= 10mA, VGS = 0
D
= ±100µA, VDS = 0
G
diF/ dt =50A/µs
Note3
Note3
Note3
2
Page 3
Main Characteristics
2SK2978
Power vs. Temperature Derating
2.0 Test condition : When using the alumina ceramic board (12.5 x 20 x 0.7 mm)
1.5
1.0
0.5
Channel Dissipation Pch (W)
0
10 V 5
4
D
3
50 100 150 200
Ambient Temperature Ta (°C)
Typical Output Characteristics
5 V
3 V
2.5 V
Pulse Test
2 V
Maximum Safe Operation Area
10
3
D
1
0.3 Operation in
this area is
0.1 limited by R
Drain Current I (A)
0.03 Ta = 25 °C
0.01
0.1 0.3 1 3 10 30 100 Drain to Source Voltage V (V)
Typical Transfer Characteristics
5
4
D
3
PW = 10 ms (1 shot)
DC Operation
DS(on)
10 µs
100 µs
1 ms
V = 10 V Pulse Test
DS
DS
2
Drain Current I (A)
1
0
246810
Drain to Source Voltage V (V)
V = 1.5 V
GS
DS
2
75°C
Drain Current I (A)
1
0
12345
Gate to Source Voltage V (V)
25°C
Tc = –25°C
GS
3
Page 4
2SK2978
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
1
Pulse Test
0.8
DS(on)
V (V)
0.6
I = 5 A
0.4
0.2 1 A
D
2.5 A
Drain to Source Saturation Voltage
0
24
Gate to Source Voltage V (V)
6
810
GS
Static Drain to Source on State Resistance
vs. Temperature
0.25 Pulse Test
0.2
DS(on)
R ( )
I = 5 A
D
0.15
2.5 V
0.1 V = 4 V
GS
1, 2.5 A
5 A
0.05
0
Static Drain to Source on State Resistance
–40 0 40 80 120 160
Case Temperature Tc (°C)
1.5 A
2.5 A
1 A
Static Drain to Source on State Resistance
vs. Drain Current
1
0.5
DS(on)
0.2
R ( )
0.1
V = 2.5 V
GS
PulseTest
4 V
0.05
0.02
Drain to Source On State Resistance
0.01
0.1 1
0.2
0.5
Drain Current I (A)
2
D
Forward Transfer Admittance vs.
Drain Current
10
5
fs
2
1
Tc = –25 °C
25 °C
75 °C
0.5
0.2
Forward Transfer Admittance |y | (S)
0.1
0.1 0.2 0.5 1 Drain Current I (A)
V = 10 V
DS
Pulse Test
25
D
105
10
4
Page 5
2SK2978
Body–Drain Diode Reverse
Recovery Time
100
50
20
di / dt = 50 A / µs
Reverse Recovery Time trr (ns)
10
0.1 0.2 0.5
V = 0, Ta = 25 °C
GS
1
Reverse Drain Current I (A)
Dynamic Input Characteristics
50
I = 2.5 A
D
40
DS
2
510
DR
1000
300
100
Capacitance C (pF)
20
16
1000
500
GS
Typical Capacitance vs. Drain to Source Voltage
Ciss
Coss
Crss
30
10
3
V = 0
GS
f = 1 MHz
1
0 5 10 15 20 25
Drain to Source Voltage V (V)
DS
Switching Characteristics
V = 4 V, V = 10 V
GS
DD
PW = 5 µs, duty < 1 %
V
30
GS
V = 10 V
DD
20
10
Drain to Source Voltage V (V)
0
V = 10 V
DD
5 V
4 8 12 16 20
Gate Charge Qg (nc)
12
5 V
8
4
V
DS
0
200
100
t
f
50
Switching Time t (ns)
Gate to Source Voltage V (V)
20
t
d(on)
10
0.1 0.2
0.5
1
Drain Current I (A)
t
d(off)
t
r
2
D
10
5
5
Page 6
2SK2978
Reverse Drain Current vs.
Source to Drain Voltage
5
4 V
4
DR
2.5 V
3
V = 0
2
GS
1
Reverse Drain Current I (A)
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V (V)
Pulse Test
SD
Switching Time Test Circuit Waveform
Vin Monitor
Vout Monitor
D.U.T.
R
Vin 4 V
50
L
V
DD
= 10 V
Vin Vout
10%
10%
90%
10%
td(on)
90%
tr
90%
td(off)
t
f
6
Page 7
Package Dimensions
4.5 ± 0.1
1.8 max
4
0.53 max
0.48 max
1
1.5
φ
1.0
23
1.5
3.0
1.5 ± 0.1
0.4
2.5 ± 0.1
4.25 max
0.8 min
2SK2978
Unit: mm
0.44 max
0.44 max
Hitachi Code
EIAJ
JEDEC
UPAK
SC–62
7
Page 8
Cautions
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4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail­safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
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7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products.
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