The Mega-Post PCI-Diagnostic Card is a powerful diagnostic tool for technicians and administrators to
troubleshoot various problems of IBM compatible PCs. It is easy to install, yet extremely powerful to use. With
Diagnostic Card in hand, you no longer have to go through tedious and time consuming process of
trying to figure out what is wrong with your PC hardware. The Mega-Post PCI-Diagnostic Card will tell you
exactly what is wrong with your PC in just seconds. It saves you time and money.
Our new and improved design of the Mega-Post PCI-Diagnostic Card can work with almost all
popular types of CPUs, Motherboards, and BIOSes..
Trademarks
The Mega-Post PCI-Diagnostic Card is a trademark of Handelsvertretung Ellerhorst with all rights reserved.
IBM PC, PCjr, IBM PC XT, IBM AT, and PS/2 are trademarks of international Business Machines Co., Inc.
Pentium is a trademark of Intel Corporation.
System Requirements
The Mega-Post PCI-Diagnostic Card itself only requires an empty PCI or ISA exp
to install memory chips to perform analysis. "POST Codes" can be displayed through the hexadecimal display
panel on the Diagnostic Card itself.
Tech Support
Tech Support 0049/(0)8766/9394-17
Mega-Post PCI-Diagnostic Card Indicators
'Indicators' are any light emitting diodes(LED) or hexadecimal display panel that may be
mounted on an Diagnostic Card. This section discusses the following indicators that appear on the Mega-Post
PCI-Diagnostic Card:
l Dual POST Code Display
l PCI BUS SIGNALS LEDs
POST Code Display
The POST Code Display is made up of a dual, dot matrix hexadecimal read-out that displays
Power On Self Test (POST) status codes.
User's Guide
CLK
Motherboard Clock Signal.
2)
3)
4)
3
Power On Self-Test (POST) Codes
Most AT and 386 computers (and a few XT computers) output status codes during POST. The
Diagnostic Card displays these codes during and after POST. Refer to Appendix A for a comprehensive listing
of POST codes provided by BIOS manufacturers.
PCI Signal Definition:
Should be on when power is supplied to the
BIOS
IRDY
OSC
FRAME
RST
12V
-12V
5V
-5V
3V3
motherboard even without CPU.
BIOS Read Signal. Flashes when CPU reads BIOS code.
Device Ready. Flashes when an IRDY signal is detected.
ISA Oscillation Indicator. Indicate ISA Oscillation Signal is available.
PCI Bus Frame. Should be on under normal circumstances and flashes when a PCI Frame Signal is detected.
Reset. After power on or reset, this indicator should be on for an half second and then turned off.
Power Supply, 12-Volt Positive. Should be on all the time otherwise there is a short circuit.
Power Supply, 12-Volt Negative. Should be on all the time otherwise there is a short circuit.
Power Supply, 5-Volt Positive. Should be on all the time otherwise there is a short circuit.
Power Supply, 5-Volt Negative. Should be on all the time otherwise there is a short circuit.
Power Supply, 3.3-Volt. Some motherboards have 3.3V power supply to
PCI slots. This indicator should be on if the motherboard supplies 3.3V
power.
Installing the Mega-Post PCI-Diagnostic Card
Installation Procedure
TO INSTALL A Diagnostic Card:
1)
Install the Diagnostic Card in any available PCI or ISA expansion slot.
Connect the second display by flat cable
Connect the build-in speaker and motherboard with speaker cable
Power on the machine.
User's Guide
When the machine is turned on, the hexadecimal display should show the various POST codes as
4
POST Codes
the system executes (unless it has a rare BIOS that does not display POST codes).
If the machine does not boot, system POST has detected a fatal fault and stopped. The number
showing in the hexadecimal display on the Diagnostic Card is the number of the test in which
POST failed. Refer to Appendix A for a listing of POST codes.
Troubleshooting During POST
After initial power up, Power-On Self-Test (POST) codes begin displaying on the Diagnostic
Card's hexadecimal displays (for most machines).
NOTE: A few machines use the parallel port to display POST codes instead of the Diagnostic
Card.
THE POST PROCESS
The ROM built onto the motherboard of the computer rums its built-in POST (Power-On Self-Test)
when you switch power on to the computer, press the reset button on the computer, or press Ctrl-Alt-Del (warm
boot). POST performs a tightly interwoven initialization and testing process
for each of these methods, but it typically does not test or initialize memory above 64K for warm
boot. You can get an even better idea of the detailed process by studying the POST code listings in
Appendix A.
(00)Going to give control to INT 19H boot loader.
(01)Processor register test about to start, and NMI to be disabled,286 reg. test about
to start.
(01)Processor test 1;Processor status(1FLAGS) verification; Tests the following processor
status flags carry, zero, sign, overflow. The BIOS will set each of these
flags, verify they are set then turn each flag off and verify it is off.
(01)[Beep]=none 80286 register test in -progress.
(02)NMI is disabled. Power on delay starting. Power on de- lay starting.286reg.
(02)Test CPU register.
(02)Processor test 2;Read/write/verify all CPU registers except SS,SP and BP with
data pattern FF&00.Determine status of manufacturing jumper.
(02)Test CPU register.
(02)[Beep]=1-1-3 CMOS write/read test .
(02)Verify real-mode operation(Beep)=1-1-1-3.CPU Flags test.
(02)[Beep]=1-1-3 CMOS write/read test in-progress or failure.
(03)Power on delay complete. To check soft reset/power-on. Any initialization
before keyboard BAT is in progress. ROM BIOS checksum(32K at F800:0) passed.
checking, DMA; Reset math Coprocessor; Clear all page registers, CMOS shutdown byte;
Initialize timer 0,1 and 2 including set EISA timer to a known
state; Initialize DMA controllers 0 and 1; Initialize interrupt controller 0 and 1;Initialize EISA
extended registers. Calculate BIOS EPROM and sign-on message checksum; fail if not
Error Code-00
Error Code-01
Error Code - 02
Error Code - 03
Chips & Tech (03)ROM did not checksum.
Phoenix&Dell
Phoenix&Dell (05)[Beep]=1-2-2 DMA initialization in-progress or failure.
(03)Disable Non-Maskable Interrupt(NMI).[Beep]=1-1-4 BIOS ROM checksum
in-progress or failure.
(04)Any initialization before keyboard BAT is complete. Reading keyboard SYS
bit, to check soft reset/power-on. Reading keyboard SYS bit, to check soft reset/power On.
Keyboard controller test with and without mouse passed. 8259 initialization OK.
(04)Low level keyboard communication, keyboard ID verification.
(04)Test memory refresh toggle; RAM must be periodically refreshed in order to
keep the memory from decaying. This function assures that the memory refresh
function is working properly. Test CMOS RAM I/O port interface and verify battery
power is available(bat. status=1).Reset 8042.
(04)Get the CPU type (Beep)=1-1-2-1.CPU register test. Programmable Interval
Timer test failure.
(05)Soft reset/power-on determined. Going to enable ROM. i.e. disable shadow
RAM/Cache if any. Going to enable ROM.i.e. disable shadow RAM/cache if any. Chipset
initialization over, DMA and interrupt controller disabled. CMOS pending interrupt disabled.
processor; Clear all page registers,CMOS shutdown byte; Initialize timer 0,1 and 2 including
set EISA timer to a known state; Initialize DMA controllers 0 and 1;Initialize interrupt
controller 0 and 1; Initialize EISA extended Regis- ters.Get manufacturing status, reset if
- WV, disable video, parity checking, DMA; Reset math Co-
Error Code
-
06
function is working properly. Initialize chips.
Appendix A
Phoenix&Dell (06)Initi
alize system hardware (Beep)=1
-1-2-
3.DMA page register write/read test
Error Code
-
07
Read/write/verify CPU registers.
Error Code
- 08
1Fh according to INT_TBL. Initialize CMOS timer.
verification in
-
progress or failure.
Award
Error Code
-
09
Check BIOS Checksum.
Phoenix&Dell (09)Set POST flay.(Beep)=1
-1-3-
2. 1st 64K RAM test in
-
progress.
Error Code
-
0A
controller.
(06)ROM is enabled. Calculating ROM BIOS checksum, and waiting for Keyboard
AMI
AST
Award
Chips & Tech (06)64K RAM Failed.
AMI
Award
Chips & Tech (07)64K RAM failed data test (Base Memory)
ACER (08)Shutdown 0.
AMI
Award
Chips & Tech (08)Interrupt Controller bad.
Phoenix&Dell (08)Initialize chipset registers with POST values. [Beep]= 1-3-1 RAM refresh
controller input buffer to be free. Calculating ROM BIOS checksum.. Video disabled and sysÂtem timer test begin Video disabled and system timer counting
OK.
(06)Support chipset initialize.
(06)Test memory refresh toggle; RAM must be periodically refreshed in-order to
keep the memory from decaying. This function assures that the memory refresh
in-progress or fail.
(07)ROM BIOS checksum passed. CMOS shutdown register test to be done
next.ROM BIOS checksum passed, Keyboard controller I/B free. Going to issue the
BAT command to keyboard controller. Going to issue the BAT command to keyboard
controller.CH-2 of 8254 initialization half way.CH-2 of 8253 test OK
(07)Verifies CMOS's basis R/W functionality Test CMOS interface and battery
status; Verifies CMOS is working correctly, detects bad battery. Setup low memory;
Early chip set initialization; Memory presence test; OEM chip set routines; Clear
low 64K of memory; Test first 64K memory; clear lower 256K of memory, enable
parity checking and test parity in lower 256K; test lower 25 If the BIOS detects
error 2C,2E,or 30(base 512K RAM error),it displays 6K memory. Set up stack,beep.
(08)CMOS shutdown register test done. CMOS checksum calculation to be done
next. BAT command to keyboard controller is issued. Going to verify the BAT command.
Going to verify the BAT command. CH-2 of timer initialization over.
CH-2 delta count test OK
(08)Setup low memory; Early chip set initialization; Memory presence test; OEM
chip set routines; Clear low 64K of memory; Test first 64K memory; clear lower
256K of memory, enable parity checking and test parity in lower 256K; test lower
256K memory. Set up stack, beep. Setup interrupt vector table in lower 1K RAM
area; Initialize first 120 interrupt vectors with SPURIOUS_INT_HDLR and initialize INT 00h-
AMI
AST
Chips & Tech (09)Unexpected interrupt is occurring.
AMI
Award
Chips & Tech (0A)Timer cannot interrupt.
(09)CMOS checksum calculation is done, CMOS diag byte written. CMOS initialize to begin.
Keyboard controller BAT result verified. Keyboard command
byte to be written next.(09)Keyboard command byte to be written next. CH-1 of
timer initialization over. CH-1 delta count test OK.
(09)Verify BIOS ROM checksum, flush external cache.
(09)Program the configuration register of Cyrix CPU. OEM specific cache initialization., Early
Cache initialization; Cyrix CPU initialization; cache initialization. Test CMOS RAM
checksum; beep; also test extended storage of parameters in the motherboard chipset; if not
warm- booting; display the Test
CMOS RAM checksum message, if bad, or insert key pressed, load defaults if bad.
(0A)CMOS initialization done(if any). Keyboard command byte code is issued.
Going to write command byte data. Go- ing to write command byte data. CH-0 of
timer initialization over. CH-0 delta count test OK
(0A)Initialize the first 32 interrupt vectors. Initialize INTs 33 to 120.Early Power Management
initialization. Setup interrupt vector table in lower 1K RAM area; Initialize first 120 interrupt
vectors with SPURIOUS_INT_HDLR and initialize
INT 00h-1Fh according to INT_TBL. Initialize key- board; Detect type of keyboard
controller(optional 8242 or 8248, with Nedadon XOR gate control); Set NUM_LOCK status.
Reset keyboard test keyboard controller interface to verify it
returned AAH and responded to enable/disable commands, set keyboard buffer,
enable keyboard and keyboard interrupts for normal use, beep, halt .Initialize Video
6
64K RAM chip or data line failure multi
-
bit.
Error Code
-
0B
BIOS Only). Test CMOS RAM checksum; beep; also test extended storage of parameters in the
find out type of video in use; Detect and initialize video adapter. 8254 timer, channel 0 test.
Phoenix&Dell (0B)Enable CPU Cable
-
Check CPU Jumpers. [Beep]=1
-3-
4 1st 64K RAM
Error Code
-
0C
NUM_LOCK status. Reset keyboard test keyboard controller interface
timer, channel 1 test.
1st 64K RAM address line failure.
Error Code
-
0D
(0D)(Beeps)=13 short,8254 timer register.
timer, channel 2 test.
AMI
Error Cod
e - 0E
Enable shadow according to setup. Test COMS
Shutdown byte.
AMI
Award
detect and initialization. Test Extended CMOS.
Error Code
-
10
Appendix A
Phoenix&Dell (0A)Initialize CPU registers. (Beep)=1-1-3-3. Perform BIOS checksum test. 1st
AMI
Award
Chips & Tech (0B)CPU protected mode.
AMI
Award
Chips & Tech (0C)DMA register failure.
Phoenix&Dell (0C)Initialize cache to initial POST value. Test DMA page registers. [Beep]=1-4-1
AMI
AST
Chips & Tech (0D) (Beeps)=14 short, Refresh failure.
Award
Phoenix&Dell (0D)[Beep]=1-4-2 1st 64K RAM parity test in progress or failure.
AST
Chips & Tech (0F)(Beeps)=15 short, Protected mode failure.
Phoenix (0F)Initialize the local IDE
AMI
CMOS status register initialize done. Keyboard controller command byte is written.
Going to issue Pin-23,24 block- ing/ unblocking command. Going to issue pin-23,24 blocking/
nubolcking command. Refresh started. Parity status cleared
(0B)Verify the RTC time is valid or not. Detect bad battery. Read CMOS data into
BIOS stack area. Perform PnP initializations. Assign I/O & Memory for PCI devices (PCI
motherboard chipset; if not warm-booting, display the
Test CMOS RAM check- sum message, if bad, or insert key pressed, load defaults
if bad. Initialize video interface; Detect CPU clock; Read CMOS location 14b to
odd/even logic failure.
(0C)KB controller I/B free. Going to issue the BAT command to keyboard
controller. Pin-3,24 of keyboard controller is blocked/unblocked. NOP command of
key- board controller to be issued next. NOP command of key- board controller to
be issued next. System timer started. Refresh & system timer OK
(0C)Initialization of the BIOS data area(40:00-40:FF). Initialize keyboard; Detect
type of keyboard controller (optional 8242 or 8248, with Nedadon XOR gate control); Set
to verify it returned AAH and responded to enable/disable commands, set keyboard
buffer, enable keyboard and keyboard interrupts for normal use,beep,halt.8254
(0D)BAT command to keyboard controller is issued. Going to verify the BAT command. NOP
command processing is done. CMOS shutdown register test to be
done next. CMOS shutdown register test to be done next. Refresh link toggling
passed. Refresh link toggling passed.
(0D)Program some of the chipset's value. Measure CPU speed for display. Video
initialization including MDA, CGA,EGA/VGA. Initialize video interface; Detect
CPU clock; Read CMOS location 14b to find out type of video in use; Detect and initialize
video adapter. OEM specific-Initialize motherboard special chipset as
required by OEM; initialize cache controller early, when cache is separate from chipset.8254
(0E)(Beeps)=14 short, ASIC registers.
(0E)Keyboard controller BAT result verified. Any initialization after KB controller
BAT to be next. CMOS shutdown register R/W test passed. Going to calculate CMOS
checksum, and update DIAG. Goint to calculate CMOS checksum,and
update DIAG Byte. Refresh period ON/OFF 50% OK
(0E)Initialize the APIC(Multi-Processor BIOS only). Test video RAM(If Monochrome display
device found). Show startup screen message. Test video memory; Test video memory, write
sign-on message to screen. Setup shadow RAM-
(0E)Initialize I/O.(Beep)=1-1-4-3. Test 8254 timers.
(0F)initialization after KB controller BAT done. Keyboard command byte to be
written next. CMOS checksum calculation is done, DIAG byte written. CMOS Init.
To begin(If "INIT CMOS IN EVERY BOOT IS SET").CMOS initialization to begin(If "INIT
CMOS IN EVERY BOOT IS SET").
(0F)(Beeps)=15 short,CMOS RAM shutdown.
(0F)DMA channel 0 Test. Test DMA controller 0; BIOS checksum test, keyboard
(10)KB controller command byte is written. Going to issue pin-23,24
blocking/unblocking command. CMOS initia- lization done(if any). CMOS status
Error Code - 0F
7
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