Compal LA-9532P BoardView
A
B
C
D
E
Compal Confidential
Model Name : V5WE2/T2 (EA/EG)
1 1
File Name : LA-9532P
Compal Confidential
2 2
EA50 UMA M/B Schematics Document
Intel Shark Bay ULT (Hasswell + Lynx PointLP)
3 3
2013-04-18
REV:1.0
ZZZ
Part Number
4 4
DAZ0VR00200 PCB V5WE2 LA-9532P LS-9531P/9532P/9533P
V5WE2_PCB
ZZZ1
HDMI_ROYALTY
ROYALTY HDMI W/LOGO+HDCP
RO0000003HM
45@
Description
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2012/07/10 2013/07/10
2012/07/10 2013/07/10
2012/07/10 2013/07/10
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
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1 42Thursday, April 18, 2013
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1 42Thursday, April 18, 2013
0.2
0.2
0.2
A
B
C
D
E
CRT Conn.
page 21
DP to VGA
1 1
ITE IT6511FN
page 20
DP x 2 lanes HDMI x 4 lanes
2.7GT/s
HDMI Conn.
page 19
2.97GT/s
eDP to LVDS
RTD2132R
MINI Card
eDP & LVDS
Co-lay Conn.
page 17
page 18
eDP
DDI
Intel Haswell ULT
Haswell ULT
Processor
OPI
Memory BUS
Dual Channel
1.35V DDR3L 1333/1600
Fan Control
page 30
204pin DDR3L-SO-DIMM X1
BANK 0, 1, 2, 3
page 15
204pin DDR3L-SO-DIMM X1
BANK 4, 5, 6, 7
page 16
WLAN
USB port 8
2 2
LAN(GbE)
Boardcom
57786
page 24
PCIe 2.0
5GT/s
port 4
PCIe 2.0
5GT/s
port 3
page 22
SATA3.0 SATA3.0
port 0
SATA HDD
Conn.
page 25
Flexible IO
6.0 Gb/s6.0 Gb/s
port 1
SATA CDROM
Conn.
page 25
Lynx Point - LP
PCH
1168pin BGA
page 04~14
USBx8
HD Audio
SPI
48MHz
USB 3.0
conn x1
USB port 0
page 26 page 18
3.3V 24MHz
USB 2.0
conn x2
(port 1,2)USB/B
page 26
CMOS
Camera
USB port 7
HDA Codec
ALC3225
page 29
Touch
Module
USB port 6
page 18
3 3
Card Reader
2 in 1
(SD/MMC)
page 23
RTC CKT.
page 06
Power On/Off CKT.
page 28
Sub Board
LS-9531P
PWR/B
page 26
LPC BUS
CLK=24MHz
ENE
KB9012/KB932
Touch Pad Int.KBD
page 28
page 27
page 28
SPI ROM x2
page 07
Int. Speaker Combo Jack
page 29
Int. MIC
page 29
page 29
LS-9532P
DC/DC Interface CKT.
4 4
page 31
USB/B
LS-9533P
Power Circuit DC/DC
page 32~40
A
BATT/B
(port 1,2)
page 26
page 33
EC ROM x1
(KB932)
page 27
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/07/10 2013/07/10
2012/07/10 2013/07/10
2012/07/10 2013/07/10
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
Block Diagrams
Block Diagrams
Block Diagrams
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
E
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2 42Monday, April 08, 2013
0.2
0.2
0.2
A
Voltage Rails
Power Plane Description
VIN
BATT+ Battery power supply (12.6V) N/A N/A N/A
B+
1 1
+CPU_CORE
+0.675VS +0.675VSP to +0.675VS switched power rail for DDR terminator
+1.5VS
+1.8VS +3VS to 1.8V switched power rail to CPU
+3VALW +3VALW always on power rail
+3VLP B+ to +3VLP power rail for suspend power ON ON
+3VS
+5VALW
+5VS +5VALW to +5VS switched power rail OFFON OFF
+VSB +VSBP to +VSB always on power rail for sequence control ON ON*
+RTCVCC RTC power
+1.05VS_VTT OFFON OFF+1.05VSP to +1.05VS_VTT switched power rail for cpu
2 2
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
+1.35VP to +1.35V power rail for DDRIIIL ON ON OFF+1.35V
+1.5V to +1.5VS switched power rail
+3VALW to +3VS power rail
+5VALWP to +5VALW power rail
B
S1 S3 S5
N/A N/A N/A
ON
ON OFF OFF
ON OFF OFF
ON
ON
ON
ON
ON
ON
N/AN/AN/A
OFFOFF
OFF
OFF
ON ON*
ON
OFF
OFF
ON ON*
ONON
C
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SIGNAL
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
HIGH HIGH HIGH HIGH
HIGH
LOWLOWLOW
HIGHHIGHHIGH
HIGH
HIGH
LOW
LOW
LOW
LOW LOW LOW LOW
Board ID / SKU ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID
0
1
2
3
4
5
6
7 NC
100K +/- 5%Ra/Rc/Re
Rb / Rd / Rf V min
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
AD_BID
0 V
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
V typ
D
ON
ON
ON
OFF
OFF
V
AD_BID
ON ON
ON
OFF
OFF
OFF
ON
ON
ON
ON
ON
AD_BID
0 V 0 V
0.503 V
0.819 V
0.538 V
0.875 V
1.185 V 1.264 V
2.200 V
3.300 V
2.341 V
3.300 V
E
LOW
OFF
OFF
OFF
max
BOARD ID Table
Board ID
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
EC SM Bus1 address
Device
Smart Battery
Address Address
0001 011X b
EC SM Bus2 address
Device
On Board Thermal Senser
1001_101xb
PCH SM Bus address
Device Address
ChannelA DIMM0
BOM config
3 3
PCB P/N
EVT BOM config
DVT BOM config
A0 1010 000X
DA60000XR00 : PCB 0VR LA-9532P REV0 M/B
9012@ ; AMIC@ ; CHR@ ; BL@ ; EMC@ ; AOAC@
9012@ ; BL@ ; EMC@ ; EDP@ (L01~L04)
9012@ ; BL@ ; EMC@ ; TL@ (L05)
PVT BOM config
PreMP BOM config
9012@ ; EMC@ ; EDP@ ; 1ROM@ ; IOAC@ 1ROM@
9012@ ; EMC@ ; EDP@ ; 1ROM@ ; IOAC@
JDIMM1(SPD)
0
1
2
3
4
5
6
7
USB Port Table
PortUSB 3.0
1
XHCI
USB 2.0 USB 1.1 Port
2
3
4
UHCI0
43 level BOM table
43 Level Description
4319LWBOL01
4319LWBOL02
4319LWBOL03
4319LWBOL04
4319LWBOL05
4 4
4319LWBOL06
4319LWBOL07
4319LWBOL08
4319LWBOL09
4319LWBOL10
4319LWBOL21
4319LWBOL22
SMT MB A9532 V5WE2 UMA I7 QDA7 HDMI
SMT MB A9532 V5WE2 UMA I5 QDJB HDMI
SMT MB A9532 V5WE2 UMA I5 QDJ7 HDMI
SMT MB A9532 V5WE2 UMA I5 QDJ9 HDMI
SMT MB A9532 V5WE2 UMA I5 QDJB LVDS HDMI
SMT MB A9532 V5WE2 UMA WO/CPU HDMI
SMT MB A9532 V5WE2 UMA I5 QEA4 HDMI
SMT MB A9532 V5WE2 UMA I5-4200 HDMI
SMT MB A9532 V5WE2 UMA I3-4010 HDMI
SMT MB A9532 V5WE2 UMA I5-4250 HDMI
SMT MB A9532 V5WC2 UMA I5-4200 HDMI
SMT MB A9532 V5WC2 UMA I3-4010 HDMI
A
B
EHCI1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
UHCI1
UHCI2
UHCI3
C
PCB Revision
0.1
0.2
0.3
0.4
1.0
USB Port(Left 3.0)
3 External
USB Port
0
USB Port(Left 3.0)
1
USB Port(Right 2.0)
2
USB Port(Right 2.0)
3
4
Mini Card(WLAN)
5
6
Touch Screen
7
Camera
Compal Secret Data
Compal Secret Data
2012/07/10 2013/07/10
2012/07/10 2013/07/10
2012/07/10 2013/07/10
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
BTO Option Table
BTO Item BOM Structure
EC 9012 9012@
EC 940
Unpop @
TPM Circuit
eDP mode EDP@
eDP to LVDS TL@
G‐Sensor
XDP (Debug Port)
KB Backlight
Debug Only
GPU_Select
reserve 3,5V MOS 35V@
BIOS 8M Solution
BIOS 4+2M Solution
IOAC Function IOAC@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
940@
TPM@
CONN@Connector
GSEN@
XDP@
BL@
DEG@
EMC@MEC requirement
XEMC@MEC requirement unpop11/1 Del XDP@
VGA@
2ROM@
TS@Touch screen Function
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Notes List
Notes List
Notes List
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
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4
3
U1A
HASWELL_MCP_E
2
1
CPU_DP1_N020
CPU_DP1_P020
CPU_DP1_N120
DP to CRT
D D
HDMI
+1.35V
12
R184
470_0603_5%
C C
DIMM_DRAMRST# 15,16
Reserved for ESD
H_PECI27
+1.05VS_VTT
H_PROCHOT#27,32,33
Reserved for ESD
CPU_DP1_P120
CPU_DP2_N019
CPU_DP2_P019
CPU_DP2_N119
CPU_DP2_P119
CPU_DP2_N219
CPU_DP2_P219
CPU_DP2_N319
CPU_DP2_P319
Reserved for ESD
1 2
C94 6.8P_0402_50V8C
XEMC@
12
R68
62_0402_5%
C95 6.8P_0402_50V8C
XEMC@
1 2
R6 10K_0402_5%
1 2
C60 6.8P_0402_50V8C
XEMC@
1 2
R11 200_0402_1%
1 2
R13 120_0402_1%
1 2
R41 100_0402_1%
DDR_PG_CTRL15
2
C993
6.8P_0402_50V8C
1
XEMC@
DDR3 Compensation Signals
1 2
R8
56_0402_5%
1 2
T20 @
T2 @
H_PROCHOT#_R
H_CPUPWRGD
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
DIMM_DRAMRST#
DDR_PG_CTRL
C54
DDI1_TXN0
C55
DDI1_TXP0
B58
DDI1_TXN1
C58
DDI1_TXP1
B55
DDI1_TXN2
A55
DDI1_TXP2
A57
DDI1_TXN3
B57
DDI1_TXP3
C51
DDI2_TXN0
C50
DDI2_TXP0
C53
DDI2_TXN1
B54
DDI2_TXP1
C49
DDI2_TXN2
B50
DDI2_TXP2
A53
DDI2_TXN3
B53
DDI2_TXP3
HASWELL-MCP-E-ULT_BGA1168
U1B
D61
PROC_DETECT
K61
CATERR
N62
PECI
K63
PROCHOT
C61
PROCPWRGD
AU60
SM_RCOMP0
AV60
SM_RCOMP1
AU61
SM_RCOMP2
AV15
SM_DRAMRST
AV61
SM_PG_CNTL1
HASWELL-MCP-E-ULT_BGA1168
DDI EDP
1 OF 19
HASWELL_MCP_E
MISC
JTAG
THERMAL
PWR
DDR3
2 OF 19
EDP_AUXN
EDP_AUXP
EDP_RCOMP
EDP_DISP_UTIL
EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
Rev1p2
PRDY
PREQ
PROC_TCK
PROC_TMS
PROC_TRST
PROC_TDI
PROC_TDO
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
Rev1p2
C45
B46
A47
B47
C47
C46
A49
B49
A45
B45
D20
A43
J62
K62
E60
E61
E59
F63
F62
J60
H60
H61
H62
K59
H63
K60
J61
EDP_COMP
XDP_PRDY#
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
XDP_OBS0
XDP_OBS1
EDP_TXN0 18
EDP_TXP0 18
EDP_TXN1 18
EDP_TXP1 18
EDP_AUXN 18
EDP_AUXP 18
EDP_DISP_UTIL 18
+VCCIOA_OUT
1 2
R1
24.9_0402_1%
Trace width=20 mils
Spacing=25mil
Max length=100mils
T157@
T158@
T159@
T160@
T161@
T162@
T163@
T164@
T165@
Reserved for ESD
B B
U1
CPU_SR170 _C1
A A
SR170@
SA00006SMB0
U1
CPU_QDJB_B1
QDJB@
SA000067060
5
U1
CPU_SR16Q _C1
SR16Q@
SA00006SX70
U1
CPU_QDJ7_B1
QDJ7@
SA000067H50
U1
CPU_QDJ6_B1
QDJ6@
SA00006FY20
U1
CPU_QDJ9_B1
QDJ9@
SA00006G120
U1
CPU_QEVE _C0
QEVE@
SA00006SM30
4
U1
CPU_QEVG_C0
QEVG@
SA00006SX30
Security Classification
Security Classification
Security Classification
2012/07/10 2013/07/10
2012/07/10 2013/07/10
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/07/10 2013/07/10
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
HSW MCP(1/11) DDI,MSIC,XDP
HSW MCP(1/11) DDI,MSIC,XDP
HSW MCP(1/11) DDI,MSIC,XDP
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
1
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4 42Friday, April 12, 2013
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0.2
0.2
0.2
5
U1C
AH63
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
D D
C C
B B
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
AH62
AK63
AK62
AH61
AH60
AK61
AK60
AM63
AM62
AP63
AP62
AM61
AM60
AP61
AP60
AP58
AR58
AM57
AK57
AL58
AK58
AR57
AN57
AP55
AR55
AM54
AK54
AL55
AK55
AR54
AN54
AY58
AW58
AY56
AW56
AV58
AU58
AV56
AU56
AY54
AW54
AY52
AW52
AV54
AU54
AV52
AU52
AK40
AK42
AM43
AM45
AK45
AK43
AM40
AM42
AM46
AK46
AM49
AK49
AM48
AK48
AM51
AK51
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
HASWELL_MCP_E
DDR CHANNEL A
4
SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1
SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS#0
SA_CS#1
SA_ODT0
SA_RAS
SA_WE
SA_CAS
SA_BA0
SA_BA1
SA_BA2
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSP0
SA_DQSP1
SA_DQSP2
SA_DQSP3
SA_DQSP4
SA_DQSP5
SA_DQSP6
SA_DQSP7
SM_VREF_CA
SM_VREF_DQ0
SM_VREF_DQ1
AU37
AV37
AW36
AY36
AU43
AW43
AY42
AY43
AP33
AR32
AP32
AY34
AW34
AU34
AU35
AV35
AY41
AU36
AY37
AR38
AP36
AU39
AR36
AV40
AW39
AY39
AU40
AP35
AW41
AU41
AR35
AV42
AU42
AJ61
AN62
AM58
AM55
AV57
AV53
AL43
AL48
AJ62
AN61
AN58
AN55
AW57
AW53
AL42
AL49
AP49
AR51
AP51
DDRA_ODT0
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
SA_CLK_DDR#0 15
SA_CLK_DDR0 15
SA_CLK_DDR#1 15
SA_CLK_DDR1 15
DDRA_CKE0_DIMMA 15
DDRA_CKE1_DIMMA 15
DDRA_CS0_DIMMA# 15
DDRA_CS1_DIMMA# 15
T4@
DDR_A_RAS# 15
DDR_A_WE# 15
DDR_A_CAS# 15
DDR_A_BS0 15
DDR_A_BS1 15
DDR_A_BS2 15
DDR_A_D[0..63]15
DDR_A_MA[0..15]15
DDR_A_DQS#[0..7]15
DDR_A_DQS[0..7]15
SM_DIMM_VREFCA 15,16
SA_DIMM_VREFDQ 15
SB_DIMM_VREFDQ 16
3
U1D
AY31
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
AW31
AY29
AW29
AV31
AU31
AV29
AU29
AY27
AW27
AY25
AW25
AV27
AU27
AV25
AU25
AM29
AK29
AL28
AK28
AR29
AN29
AR28
AP28
AN26
AR26
AR25
AP25
AK26
AM26
AK25
AL25
AY23
AW23
AY21
AW21
AV23
AU23
AV21
AU21
AY19
AW19
AY17
AW17
AV19
AU19
AV17
AU17
AR21
AR22
AL21
AM22
AN22
AP21
AK21
AK22
AN20
AR20
AK18
AL18
AK20
AM20
AR18
AP18
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
2
HASWELL_MCP_E
DDR CHANNEL B
SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS#0
SB_CS#1
SB_ODT0
SB_RAS
SB_WE
SB_CAS
SB_BA0
SB_BA1
SB_BA2
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7
AM38
AN38
AK38
AL38
AY49
AU50
AW49
AV50
AM32
AK32
AL32
AM35
AK35
AM33
AL35
AM36
AU49
AP40
AR40
AP42
AR42
AR45
AP45
AW46
AY46
AY47
AU46
AK36
AV47
AU47
AK33
AR46
AP46
AW30
AV26
DDR_B_DQS#1
AN28
DDR_B_DQS#2
AN25
DDR_B_DQS#3
AW22
DDR_B_DQS#4
AV18
DDR_B_DQS#5
AN21
DDR_B_DQS#6
AN18
DDR_B_DQS#7
AV30
AW26
AM28
AM25
AV22
AW18
AM21
AM18
DDRB_ODT0
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_D[0..63]16
DDR_B_MA[0..15]16
DDR_B_DQS#[0..7]16
DDR_B_DQS[0..7]16
1
SB_CLK_DDR#0 16
SB_CLK_DDR0 16
SB_CLK_DDR#1 16
SB_CLK_DDR1 16
DDRB_CKE0_DIMMB 16
DDRB_CKE1_DIMMB 16
DDRB_CS0_DIMMB# 16
DDRB_CS1_DIMMB# 16
T5@
DDR_B_RAS# 16
DDR_B_WE# 16
DDR_B_CAS# 16
DDR_B_BS0 16
DDR_B_BS1 16
DDR_B_BS2 16
HASWELL-MCP-E-ULT_BGA1168
A A
5
3 OF 19
Rev1p2
HASWELL-MCP-E-ULT_BGA1168
Security Classification
Security Classification
Security Classification
2012/07/10 2013/07/10
2012/07/10 2013/07/10
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/07/10 2013/07/10
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
4 OF 19
2
Rev1p2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
Compal Electronics, Inc.
HSW MCP(2/11) DDRIII
HSW MCP(2/11) DDRIII
HSW MCP(2/11) DDRIII
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
5 42Monday, April 08, 2013
of
5 42Monday, April 08, 2013
of
5 42Monday, April 08, 2013
1
0.2
0.2
0.2
5
PCH_RTCX1
1 2
R101 10M_0402_5%
Y1
1 2
32.768KHZ_12.5PF_Q13FC
1
C153
D D
18P_0402_50V8J
2
PCH_INTVRMEN
INTVRMEN
*
R73 330K_0402_5%
R74 330K_0402_5%@
H：Integrated VRM enable
L：Integrated VRM disable
PCH_RTCX2
1
C154
18P_0402_50V8J
2
1 2
1 2
+RTCVCC
+RTCVCC
C149
1U_0402_10V6K
R69
20K_0402_1%
1 2
1 2
R70
20K_0402_1%
C150
1U_0402_10V6K
RTCRST close RAM door
1
2
1
2
ME CMOS
12
R71
0_0603_5%@
HDA for AUDIO
C C
HDA_BITCLK_AUDIO29
HDA_SYNC_AUDIO29
HDA_RST_AUDIO#29
HDA_SDOUT_AUDIO29
HDA_SDO27
SPI_WP1#_R25,27,7
RP14
1 8
2 7
3 6
4 5
33_0804_8P4R_5%
EMC@
1 2
R163 0_0402_5%9012@
1 2
R161 4.7K_0402_5%940@
HDA_BIT_CLK
HDA_SYNC
HDA_RST#
HDA_SDOUT
CMOS
4
+RTCVCC
1 2
R72 1M_0402_5%
HDA_SDIN029
1 2
R9751_0402_5% @
T6 @
T7 @
T8 @
T9 @
T95 @
T21 @
T19 @
T15 @
T10 @
T11 @
T22 @
T12 @
PCH_RTCX1
PCH_RTCX2
SM_INTRUDER#
PCH_INTVRMEN
PCH_SRTCRST#
PCH_RTCRST#
HDA_BIT_CLK
HDA_SYNC
HDA_RST#
HDA_SDIN0
HDA_SDOUT
PCH_JTAG_RST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TCK_JTAGX
3
U1E
AW5
RTCX1
AY5
RTCX2
AU6
INTRUDER
AV7
INTVRMEN
AV6
SRTCRST
AU7
RTCRST
AW8
HDA_BCLK/I2S0_SCLK
AV11
HDA_SYNC/I2S0_SFRM
AU8
HDA_RST/I2S_MCLK
AY10
HDA_SDI0/I2S0_RXD
AU12
HDA_SDI1/I2S1_RXD
AU11
HDA_SDO/I2S0_TXD
AW10
HDA_DOCK_EN/I2S1_TXD
AV10
HDA_DOCK_RST/I2S1_SFRM
AY8
I2S1_SCLK
AU62
PCH_TRST
AE62
PCH_TCK
AD61
PCH_TDI
AE61
PCH_TDO
AD62
PCH_TMS
AL11
RSVD
AC4
RSVD
AE63
JTAGX
AV2
RSVD
HASWELL-MCP-E-ULT_BGA1168
HASWELL_MCP_E
RTC
JTAG
5 OF 19
2
RSVD
RSVD
SATALED
Rev1p2
J5
H5
B15
A15
J8
H8
A17
B17
J6
H6
B14
C15
F5
E5
C17
D17
V1
U1
V6
AC1
A12
L11
K10
C12
U3
GPIO34_SCI#
PCH_GPIO35
PCH_GPIO36
PCH_GPIO37
SATA_IREF
T13@
T14@
SATA_RCOMP
PCH_SATALED#
1 2
R10
10K_0402_5%
SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3
SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3
SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2
SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2
SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1
SATA_TN2/PETN6_L1
SATAAUDIO
SATA_TP2/PETP6_L1
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
SATA0GP/GPIO34
SATA1GP/GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37
SATA_IREF
SATA_RCOMP
SATA_PRX_DTX_N0 25
SATA_PRX_DTX_P0 25
SATA_PTX_DRX_N0 25
SATA_PTX_DRX_P0 25
SATA_PRX_DTX_N1 25
SATA_PRX_DTX_P1 25
SATA_PTX_DRX_N1 25
SATA_PTX_DRX_P1 25
1 2
PCH_GPIO35 9
PCH_GPIO36 9
PCH_GPIO37 9
1 2
R75 0_0603_5%@
within 500 mils
1 2
R2 3.01K_0402_1%
+3VS
1
GPIO34_SCI# 9
R937
0_0402_5%@
PCH_SATALED# 28
+1.05VS_ASATA3PLL
HDD
ODD
EC_SCI# 27,9
ME Debug
+RTCBATT1
+CHGRTC
B B
20mil
+RTCVCC
1
C168
@
0.1U_0402_16V4Z
2
12
2
3
D32
1
CHN202UPT_SC70-3
R446
@
1K_0402_5%
+RTCBATT_R
20mil
@
trace width 10mil W=20milsW=20mils
+CHGRTC+RTCBATT +RTCVCC
D22
2
1
A A
BAS40-04_SOT23-3
3
5
+RTCBATT1
1
+
-
2
Reserve only
1
C151
0.1U_0402_16V4Z
2
JBATT1
LOTES_AAA-BAT-054-K01
CONN@
SP07000H700
Security Classification
Security Classification
Security Classification
2012/07/10 2013/07/10
2012/07/10 2013/07/10
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/07/10 2013/07/10
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet of
Compal Electronics, Inc.
HSW MCP(3/11) RTC,SATA,XDP
HSW MCP(3/11) RTC,SATA,XDP
HSW MCP(3/11) RTC,SATA,XDP
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
6 42Thursday, April 18, 2013
of
6 42Thursday, April 18, 2013
of
6 42Thursday, April 18, 2013
1
0.2
0.2
0.2
5
4
3
2
1
XTAL24_IN
12
R481M_0402_5%
Y2
24MHZ_12PF_X3G024000DC1H
123
1
D D
C C
C2
12P_0402_50V8J
2
+3VS
4
1 2
R216 10K_0402_5%
XTAL24_OUT
1
C3
12P_0402_50V8J
2
PCIE LAN
WLAN
PCH_GPIO22
PCH_GPIO189
PCH_GPIO199
CLK_PCIE_LAN#22
CLK_PCIE_LAN22
+3VS
LAN_CLKREQ#22
CLK_PCIE_MINI1#24
CLK_PCIE_MINI124
MINI1_CLKREQ#24,8
CLK_PCIE_LAN#
CLK_PCIE_LAN
1 2
R52 10K_0402_5%
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
PCH_GPIO239
LPC_AD027,28
LPC_AD127,28
LPC_AD227,28
LPC_AD327,28
LPC_FRAME#27,28
PCH_GPIO18
PCH_GPIO19
PCH_GPIO22
PCH_GPIO23
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_MOSI
PCH_SPI_MISO
PCH_SPI_WP1#
PCH_SPI_HOLD1#
U1F
C43
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
U2
PCIECLKRQ0/GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1/GPIO19
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2/GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCIE_P3
N1
PCIECLKRQ3/GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4/GPIO22
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5/GPIO23
HASWELL-MCP-E-ULT_BGA1168
U1G
AU14
LAD0
AW12
LAD1
AY12
LAD2
AW11
LAD3
AV12
LFRAME
AA3
SPI_CLK
Y7
SPI_CS0
Y4
SPI_CS1
AC2
SPI_CS2
AA2
SPI_MOSI
AA4
SPI_MISO
Y6
SPI_IO2
AF1
SPI_IO3
HASWELL-MCP-E-ULT_BGA1168
SPI ROM ( 2MByte )
B B
PCH_SPI_CLK_1_R25
PCH_SPI_CS0#_1_R25
PCH_SPI_MOSI_1_R25
PCH_SPI_MISO_1_R25
SPI_HOLD1#_R25
+BIOS_SPI
SPI_WP1#_R25,27,6
SPI ROM
A A
( 8MByte for Chrome)
U6
MX25L6406EM2I-12G_SO8
940@
SA00004G600
1 2
R572 0_0402_5%DEG@
1 2
R599 0_0402_5%DEG@
1 2
R603 0_0402_5%DEG@
1 2
R602 0_0402_5%DEG@
1 2
R604 0_0402_5%DEG@
1 2
R105 1K_0402_5%1ROM@
1 2
R106 1K_0402_5%1ROM@
1 2
R103 1K_0402_5%2ROM@
1 2
R102 1K_0402_5%2ROM@
1 2
R564 1K_0402_5%940@
5
PCH_SPI_CLK_1
PCH_SPI_CS0#
PCH_SPI_MOSI_1
PCH_SPI_MISO_1
PCH_SPI_HOLD1#
PCH_SPI_IO3_1
PCH_SPI_IO2_1
PCH_SPI_HOLD1#
PCH_SPI_WP1#
NOTE : R106 & RP19 value
1 ROM solution use 15 ohm
2 ROM solution use 33 ohm
U6
1ROM@
2 1R108
EN25QH64-104HIP SO8
1ROM@
SA00006MK00
15_0402_5%
PCH_SPI_WP1#
PCH_SPI_WP1#
R108
33_0402_5%
2ROM@
R109
33_0402_5%
2ROM@
RP19
15_8P4R_5%
1ROM@
SD300001P00
4
U6
PCH_SPI_CS0#
PCH_SPI_MISO_1
12
PCH_SPI_IO2_1
1
CS#
2
DO(IO1)
3
WP#(IO2)
4
GND
EN25QH16-104HIP_SO8
2ROM@
SPI ROM ( 4MByte )
U7
PCH_SPI_CS1#
PCH_SPI_MISO_2
12
PCH_SPI_IO2_2
1
CS#
2
DO
3
WP#
4
GND
EN25QH32-104HIP_SO8
C453
10P_0402_50V8J
1 2
XEMC@
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
8
VCC
DI
CLK
DI(IO0)
8
7
6
5
7
6
5
PCH_SPI_IO3_2
PCH_SPI_CLK_2
PCH_SPI_MOSI_2
2ROM@
HOLD#(IO3)
VCC
HOLD#
CLK
Reserve for EMI(Near SPI ROM)
12
R402 33_0402_5%XEMC@
Issued Date
Issued Date
Issued Date
PCH_SPI_CLK_2
3
HASWELL_MCP_E
A25
XTAL24_IN
RSVD
RSVD
Rev1p2
SMBCLK
CL_CLK
CL_RST
Rev1p2
+3VS+BIOS_SPI
RP19
33_8P4R_5%
2ROM@
PCH_SPI_CLK
PCH_SPI_HOLD1#
PCH_SPI_MISOPCH_SPI_MISO_2
B25
K21
M21
C26
C35
C34
AK8
AL8
AN15
AP15
B35
A35
AN2
AP2
AH1
AL2
AN1
AK1
AU4
AU3
AH3
AF2
AD2
AF4
PCH_SPI_MOSI
PCH_SPI_CLK
PCH_SPI_HOLD1#
PCH_SPI_MISO
12
PCH_SPI_CLK_1
XTAL24_OUT
DIFFCLK_BIASREF
CLOCK
SIGNALS
6 OF 19
HASWELL_MCP_E
LPC
SMBUS
SML1ALERT/PCHHOT/GPIO73
SPI C-LINK
7 OF 19
D29 design for Debug
board flash SPI ROM
(can be short after MP)
1 2
R305 0_0402_5%
9012@
1 2
D29 RB751V40_SC76-2940@
1 2
C66 0.1U_0402_16V7K
PCH_SPI_IO3_1
PCH_SPI_CLK_1
PCH_SPI_MOSI_1
+3VS
2012/07/10 2013/07/10
2012/07/10 2013/07/10
2012/07/10 2013/07/10
PCH_SPI_MOSI_1
PCH_SPI_CLK_1
PCH_SPI_IO3_1
PCH_SPI_MISO_1
C152
10P_0402_50V8J
XEMC@
C67
2ROM@
0.1U_0402_16V7K
1 2
PCH_SPI_MOSI_2 PCH_SPI_MOSI
PCH_SPI_CLK_2
PCH_SPI_IO3_2
Compal Secret Data
Compal Secret Data
Compal Secret Data
TESTLOW_C35
TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLKOUT_LPC_0
CLKOUT_LPC_1
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
SMBALERT/GPIO11
SMBDATA
SML0ALERT/GPIO60
SML0CLK
SML0DATA
SML1CLK/GPIO75
SML1DATA/GPIO74
CL_DATA
1 8
2 7
3 6
4 5
Reserve for EMI(Near SPI ROM)
1 2
R104 33_0402_5%XEMC@
RP20
1 8
2 7
3 6
4 5
33_8P4R_5%
2ROM@
Deciphered Date
Deciphered Date
Deciphered Date
XTAL24_IN
XTAL24_OUT
T16@
T17@
XCLK_BIASREF
1 2
R140 10K_0402_5%
1 2
R141 10K_0402_5%
1 2
R142 10K_0402_5%
1 2
R148 10K_0402_5%
CLKOUT_LPC0
CLKOUT_LPC1
CLK_BCLK_ITP#
CLK_BCLK_ITP
PCH_GPIO11
PCH_SMBCLK
PCH_SMBDATA
PCH_GPIO60
SML0CLK
PCH_GPIO73
SML1CLK
SML1DATA
T23@
T24@
T25@
2
R78 3.01K_0402_1%
R390 22_0402_5%
R395 22_0402_5%
PCH_GPIO11 9
PCH_SMBCLK 24
PCH_SMBDATA 24
PCH_GPIO60 9
SML0DATA
PCH_GPIO73 9
PCH_SMBDATA
DMN66D0LDW-7_SOT363-6
PCH_SMBCLK
SML1CLK
DMN66D0LDW-7_SOT363-6
SML1DATA
1 2
12
EMC@
12
TPM@
T184@
T183@
SML0CLK
SML0DATA
PCH_SMBDATA
PCH_SMBCLK
SML1CLK
SML1DATA
+3VS
2
6 1
Q7A
5
3 4
Q7B
DMN66D0LDW-7_SOT363-6
+3VS
2
6 1
Q8A
3 4
Q8B
DMN66D0LDW-7_SOT363-6
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
HSW MCP(4/11) CLK,SPI,SMBUS
HSW MCP(4/11) CLK,SPI,SMBUS
HSW MCP(4/11) CLK,SPI,SMBUS
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
+1.05VS_AXCK_LCPLL
CLK_PCI_LPC 27
CLK_PCI_TPM 28
1 8
RP8 2.2K_0804_8P4R_5%
2 7
3 6
4 5
1 2
R114 2.2K_0402_5%
1 2
R113 2.2K_0402_5%
R116
4.7K_0402_5%
1 2
D_CK_SDATA
R119
4.7K_0402_5%
1 2
D_CK_SCLK
+3VS
+3VS
PU 2.2K at EC side (+3VS)
EC_SMB_CK2 27,30
5
EC_SMB_DA2 27,30
1
+3VALW_PCH
D_CK_SDATA 15,16
D_CK_SCLK 15,16
of
7 42Monday, April 08, 2013
of
7 42Monday, April 08, 2013
of
7 42Monday, April 08, 2013
0.2
0.2
0.2
5
+3VS
12
R227
10K_0402_5%
1 2
XDP_DBRESET#25
D D
PBTN_OUT#27
R59 0_0402_5%DEG@
PU at Page 4 (double PU)
1 2
R64 0_0402_5%
1 2
R110
0_0402_5%
PCH_RSMRST#
R117 10K_0402_5%
@
1 2
PBTN_OUT#_R
SYS_RESET#
PCH_PWROK_RPM_APWROK
Note: EC is +3VL change to @
+3VALW_PCH
12
R245
100K_0402_5% @
D21
@
ACIN27,32,34
C C
VGATE11,39
B B
PCH_PWROK
VGATE_3V
10K_0402_5% @
A A
10K_0402_5%
R205
R214
10K_0402_5%
12
@
12
RB751V40_SC76-2
12
R208
R204
10K_0402_5%@
Project_ID0Project_ID1
10K_0402_5%
5
1 2
U17
@
NC1VCC
2
A
3
GND
74AUP1G07GW_TSSOP5
+3VS
5
2
P
B
Y
1
A
G
U43
@
3
MC74VHC1G08DFT2G_SC70-5
+3VS+3VS
12
R215
12
Y
4
PCH_ACIN
+1.05VS_VTT
5
4
SYS_PWROK
*
V5WE2/T2
Reserved
Reserved
Reserved
10K_0402_5% @
VGATE_3V
R65
0_0402_5%
1 2
12
R207
@
10K_0402_5%
Project ID
R310
+3VS
12
PCH_PWROK
PCH_PWROK27
VCCST_PG_EC11,27
PCH_RSMRST#27
4
SYS_PWROK
+3VALW_PCH
VGATE_3V 27
0 0
0
1
1 1
4
1 2
1 2
R61 0_0402_5%@
1 2
R62 0_0402_5%
1 2
R63 0_0402_5%@
1 2
R79 0_0402_5%@
1 2
R156 8.2K_0402_5%
EC_SMI#27
PCH_GPIO789
PCH_GPIO799
PCH_GPIO559
R206
0_0402_5%@
PLT_RST#27,28
SUSWARN#9
PCH_INV_PWM17,18
ENBKL27
PCH_ENVDD18
PCH_GPIO78
PCH_GPIO79
PCH_GPIO80
PCH_GPIO519
+3VS
RP27
Project_ID0Project_ID1
GPIO53GPIO54
1
0
SUSACK#SUSWARN#
SYS_RESET#
SYS_PWROK_R
PCH_PWROK_R
PM_APWROK
PLT_RST#
PCH_RSMRST#_R
SUSWARN#
PBTN_OUT#_R
PCH_ACIN
PCH_BATLOW#
T31 @
3
U1H
AK2
SUSACK
AC3
SYS_RESET
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
PLTRST
AW6
RSMRST
AV4
SUSWARN/SUSPWRDNACK/GPIO30
AL7
PWRBTN
AJ8
ACPRESENT/GPIO31
AN4
BATLOW/GPIO72
AF3
SLP_S0
AM5
SLP_WLAN/GPIO29
HASWELL-MCP-E-ULT_BGA1168
HASWELL_MCP_E
SYSTEM POWER MANAGEMENT
8 OF 19
CLKRUN/GPIO32
SUS_STAT/GPIO61
SUSCLK/GPIO62
DSWVRMEN
DPWROK
WAKE
SLP_S5/GPIO63
SLP_S4
SLP_S3
SLP_A
SLP_SUS
SLP_LAN
Rev1p2
2
AW7
DSWODVREN
AV5
PCH_RSMRST#_R
AJ5
PCH_PCIE_WAKE#
V5
CLKRUN#
AG4
LPCPD#
AE6
SUSCLK
AP5
PM_SLP_S5#
AJ6
PM_SLP_S4#
AT4
PM_SLP_S3#
AL5
AP4
AJ7
PM_SLP_LAN#
DDPB_CTRLDATA: Port B Detected
DDPC_CTRLDATA: Port C Detected
1: Port B or C is detected
*
0: Port B or C is not detected
U1I
B8
EDP_BKLCTL
A9
EDP_BKLEN
C6
EDP_VDDEN
EC_SMI#
T26 @
PCH_GPIO55
PCH_GPIO52
Project_ID1
PCH_GPIO51
Project_ID0
1 8
2 7
3 6
4 5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
U6
P4
N4
N2
AD4
U7
L1
L3
R5
L4
PCH_GPIO52
PCH_GPIO80
MINI1_CLKREQ#
DEVSLP0
10K_0804_8P4R_5%
PIRQA/GPIO77
PIRQB/GPIO78
PIRQC/GPIO79
PIRQD/GPIO80
PME
GPIO55
GPIO52
GPIO54
GPIO51
GPIO53
HASWELL-MCP-E-ULT_BGA1168
2012/07/10 2013/07/10
2012/07/10 2013/07/10
2012/07/10 2013/07/10
3
HASWELL_MCP_E
eDP SIDEBAND
GPIO
MINI1_CLKREQ# 24,7
DEVSLP0 25,9
Compal Secret Data
Compal Secret Data
Compal Secret Data
DISPLAY
9 OF 19
Deciphered Date
Deciphered Date
Deciphered Date
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPB_AUXN
DDPC_AUXN
DDPB_AUXP
DDPC_AUXP
DDPB_HPD
DDPC_HPD
EDP_HPD
Rev1p2
B9
C9
R271 2.2K_0402_5%
D9
DDI2_CTRL_CK
D11
DDI2_CTRL_DATA
C5
B6
B5
A6
C8
A8
D6
PLT_RST#
U30
MC74VHC1G08DFT2G_SC70-5
2
1 2
1
2
1
DSWODVREN - On Die DSW VR Enable
H：Enable(DEFAULT)
*
L：Disable
1 2
R124 330K_0402_5%
1 2
R125 330K_0402_5%@
1 2
1 2
T30@
T96@
1 2
R118 10K_0402_5%@
R1578.2K_0402_5%
T27@
T28@
+3VS
+RTCVCC
R1201K_0402_1%
CLKRUN# 28
LPCPD# 28
SUSCLK 27
PM_SLP_S5# 27
PM_SLP_S4# 27
PM_SLP_S3# 27
T29@
+3VALW_PCH
+3VALW_PCH
not support Deep S4,S5 can NC
(Have internal PD)
+3VS
DDI2_CTRL_CK 19
DDI2_CTRL_DATA 19
1 2
R420
@
100K_0402_5%
1 2
R421
@
100K_0402_5%
CPU_DP_HPD 20
CPU_HDMI_HPD 19
CPU_EDP_HPD 18
R403
0_0402_5%
12
@
+3VS
5
IN1
VCC
4
OUT
IN2
GND
3
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
12
R416
100K_0402_5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
HSW MCP(5/11) PM,GPIO,DDI
HSW MCP(5/11) PM,GPIO,DDI
HSW MCP(5/11) PM,GPIO,DDI
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
+3VS
DDI1_AUX_DN 20
DDI1_AUX_DP 20
PLT_RST_BUF# 22,24
1
8 42Monday, April 08, 2013
8 42Monday, April 08, 2013
8 42Monday, April 08, 2013
0.2
0.2
0.2
of
of
of
5
+3VS
1 8
RP23
2 7
3 6
4 5
1 8
RP24
2 7
3 6
4 5
1 8
D D
C C
B B
+3VS
A A
RP25
RP26
RP16
RP28
RP29
RP30
RP31
RP32
R311
10K_0402_5%
+3VALW_PCH
RP34
RP35
RP37
RP38
RP39
RP40
R248
10K_0402_5%
R306
10K_0402_5%
DGPU_PRSNT#
R219
10K_0402_5%
VGA@
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 2
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
1 2
+3VS
12
12
10K_0804_8P4R_5%
10K_0804_8P4R_5%
10K_0804_8P4R_5%
10K_0804_8P4R_5%
10K_0804_8P4R_5%
10K_0804_8P4R_5%
10K_0804_8P4R_5%
18
27
36
45
10K_0804_8P4R_5%
18
27
36
45
10K_0804_8P4R_5%
18
27
36
45
10K_0804_8P4R_5%
10K_0804_8P4R_5%
18
27
36
45
10K_0804_8P4R_5%
10K_0804_8P4R_5%
10K_0804_8P4R_5%
10K_0804_8P4R_5%
10K_0804_8P4R_5%
5
PCH_GPIO51
PCH_GPIO83
PCH_GPIO55
SERIRQ
EC_IN_RW
PCH_GPIO69
PCH_GPIO4
PCH_GPIO7
PCH_GPIO5
PCH_GPIO1
PCH_GPIO94
PCH_GPIO93
PCH_GPIO2
PCH_GPIO91
PCH_GPIO90
PCH_GPIO38
PCH_GPIO19
PCH_GPIO36
PCH_GPIO78
EC_KBRST#
PCH_GPIO18
PCH_GPIO35
PCH_GPIO48
GPIO34_SCI#
PCH_GPIO71
PCH_GPIO49
PCH_GPIO16
PCH_GPIO37
PCH_GPIO67
PCH_GPIO65
PCH_GPIO6
PCH_GPIO64
PCH_GPIO84
PCH_GPIO0
PCH_GPIO3
PCH_GPIO89
PCH_GPIO17
PCH_GPIO23
PCH_GPIO76
PCH_GPIO50
PCH_GPIO70
GPIO10_SCI#
PCH_GPIO11
SUSWARN#
USB_OC3#
PCH_GPIO8
USB_OC1#
PCH_GPIO13
PCH_GPIO26
PCH_GPIO45
PCH_GPIO14
PCH_GPIO44
PCH_GPIO46
PCH_GPIO79
PCH_GPIO47
PCH_GPIO24
PCH_GPIO28
PCH_GPIO58
PCH_GPIO59
PCH_GPIO27
PCH_GPIO25
USB_OC2#
PCH_GPIO60
USB_OC0#
PCH_GPIO9
PCH_GPIO73
DIS,Optimus
UMA
PCH_GPIO51 8
PCH_GPIO55 8
PCH_GPIO19 7
PCH_GPIO36 6
PCH_GPIO78 8
PCH_GPIO18 7
PCH_GPIO35 6
GPIO34_SCI# 6
PCH_GPIO37 6
PCH_GPIO23 7
PCH_GPIO11 7
SUSWARN# 8
USB_OC3# 10
USB_OC1# 10
PCH_GPIO79 8
USB_OC2# 10
PCH_GPIO60 7
USB_OC0# 10,26
PCH_GPIO73 7
GPIO87
DGPU_PRSNT#
0
1
+3VS
RP36
4
1 8
2 7
3 6
4 5
EC_LID_OUT#27
4
EC_SCI#27,6
DEVSLP025,8
PCH_GPIO88
PCH_GPIO92
PCH_GPIO85
PCH_GPIO39
10K_0804_8P4R_5%
PCH_GPIO76
PCH_GPIO8
EC_LID_OUT#
R939
0_0402_5%
1 2
EC_SCI# GPIO10_SCI#
DEVSLP0
PCH_SPKR29
+3VALW_PCH
12
R301
10K_0402_5%
PCH_GPIO66
@
12
R303
10K_0402_5%
PCH_GPIO57PCH_GPIO56
PCH_GPIO16
PCH_GPIO17
PCH_GPIO24
PCH_GPIO27
PCH_GPIO28
PCH_GPIO26
PCH_GPIO56
PCH_GPIO57
PCH_GPIO58
PCH_GPIO59
PCH_GPIO44
PCH_GPIO47
PCH_GPIO48
PCH_GPIO49
PCH_GPIO50
PCH_GPIO71
PCH_GPIO13
PCH_GPIO14
PCH_GPIO25
PCH_GPIO45
PCH_GPIO46
PCH_GPIO9
PCH_GPIO70
PCH_GPIO38
PCH_GPIO39
PCH_SPKR
1 2
R270 1K_0402_1%@
SDIO_D0 / GPIO66 : Top-Block Swap Override
1: ENABLED
*
0: DISABLED
(Have internal PU)
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
U1J
P1
BMBUSY/GPIO76
AU2
GPIO8
AM7
LAN_PHY_PWR_CTRL/GPIO12
AD6
GPIO15
Y1
GPIO16
T3
GPIO17
AD5
GPIO24
AN5
GPIO27
AD7
GPIO28
AN3
GPIO26
AG6
GPIO56
AP1
GPIO57
AL4
GPIO58
AT5
GPIO59
AK4
GPIO44
AB6
GPIO47
U4
GPIO48
Y3
GPIO49
P3
GPIO50
Y2
HSIOPC/GPIO71
AT3
GPIO13
AH4
GPIO14
AM4
GPIO25
AG5
GPIO45
AG3
GPIO46
AM3
GPIO9
AM2
GPIO10
P2
DEVSLP0/GPIO33
C4
SDIO_POWER_EN/GPIO70
L2
DEVSLP1/GPIO38
N5
DEVSLP2/GPIO39
V2
SPKR/GPIO81
HASWELL-MCP-E-ULT_BGA1168
HASWELL_MCP_E
GPIO
10 OF 19
CPU/
MISC
LPIO
PCH_GPIO86
GSPI0_MOSI / GPIO86 : Boot BIOS Strap
1: ENABLED
0: SPI ROM
*
Compal Secret Data
Compal Secret Data
2012/07/10 2013/07/10
2012/07/10 2013/07/10
2012/07/10 2013/07/10
3
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
SERIRQ
RSVD
RSVD
Rev1p2
D60
V4
T4
AW15
AF20
AB21
R6
L6
N6
L8
R7
L5
N7
K2
J1
K3
J2
G1
K4
G2
J3
J4
F2
F3
G4
F1
E3
F4
D3
E4
C3
E2
THERMTRIP
RCIN/GPIO82
PCH_OPI_RCOMP
GSPI0_CS/GPIO83
GSPI0_CLK/GPIO84
GSPI0_MISO/GPIO85
GSPI0_MOSI/GPIO86
GSPI1_CS/GPIO87
GSPI1_CLK/GPIO88
GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90
UART0_RXD/GPIO91
UART0_TXD/GPIO92
UART0_RTS/GPIO93
UART0_CTS/GPIO94
UART1_RXD/GPIO0
UART1_TXD/GPIO1
UART1_RST/GPIO2
UART1_CTS/GPIO3
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5
I2C1_SDA/GPIO6
I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_CMD/GPIO65
SDIO_D0/GPIO66
SDIO_D1/GPIO67
SDIO_D2/GPIO68
SDIO_D3/GPIO69
1 2
R272 1K_0402_1%@
1 2
R273 1K_0402_5%
(Have internal PL)
2
H_THERMTRIP#
SERIRQ
PCH_OPIRCOMP
T106@
T32@
PCH_GPIO83
PCH_GPIO84
PCH_GPIO85
PCH_GPIO86
DGPU_PRSNT#
PCH_GPIO88
PCH_GPIO89
PCH_GPIO90
PCH_GPIO91
PCH_GPIO92
PCH_GPIO93
PCH_GPIO94
PCH_GPIO0
PCH_GPIO1
PCH_GPIO2
PCH_GPIO3
PCH_GPIO4
PCH_GPIO5
PCH_GPIO6
PCH_GPIO7
PCH_GPIO64
PCH_GPIO65
PCH_GPIO66
PCH_GPIO67
EC_IN_RW
PCH_GPIO69
+3VS
1
+1.05VS_VTT
12
R144
1K_0402_5%
EC_KBRST# 27
1 2
EC_IN_RW 28
+3VALW_PCH
R247 10K_0402_5%@
R145
49.9_0402_1%
1 2
SERIRQ 27,28
EC_LID_OUT#
GPIO15 : TLS Confidentiality
1: Intel ME TLS with confidentiality
0: Intel ME TLS with no confidentiality
*
(Have internal PD)
+3VS
1 2
R269 1K_0402_1%@
PCH_SPKR
SPKR / GPIO81 : NO REBOOT
1: ENABLED
0: DISABLED
*
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
Compal Electronics, Inc.
HSW MCP(6/11) GPIO,LPIO
HSW MCP(6/11) GPIO,LPIO
HSW MCP(6/11) GPIO,LPIO
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
(Have internal PD)
9 42Monday, April 08, 2013
of
9 42Monday, April 08, 2013
of
9 42Monday, April 08, 2013
1
0.2
0.2
0.2
5
D D
PCIE_PRX_DTX_N322
PCIE LAN
WLAN
C C
PCIE_PRX_DTX_P322
PCIE_PTX_C_DRX_N322
PCIE_PTX_C_DRX_P322
PCIE_PRX_DTX_N424
PCIE_PRX_DTX_P424
PCIE_PTX_C_DRX_N424
PCIE_PTX_C_DRX_P424
+1.05VS_AUSB3PLL
4
1 2
C155 0.1U_0402_16V7K
1 2
C160 0.1U_0402_16V7K
1 2
C156 0.1U_0402_16V7K
1 2
C157 0.1U_0402_16V7K
1 2
R232 3.01K_0402_1%
1 2
R155 0_0603_5%@
Trace width=15 mils
Spacing=12mil
Max length=500mils
PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3
PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3
PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4
PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4
T33 @
T34 @
PCIE_RCOMP
PCIE_IREF
U1K
F10
PERN5_L0
E10
PERP5_L0
C23
PETN5_L0
C22
PETP5_L0
F8
PERN5_L1
E8
PERP5_L1
B23
PETN5_L1
A23
PETP5_L1
H10
PERN5_L2
G10
PERP5_L2
B21
PETN5_L2
C21
PETP5_L2
E6
PERN5_L3
F6
PERP5_L3
B22
PETN5_L3
A21
PETP5_L3
G11
PERN3
F11
PERP3
C29
PETN3
B30
PETP3
F13
PERN4
G13
PERP4
B29
PETN4
A29
PETP4
G17
PERN1/USB3RN3
F17
PERP1/USB3RP3
C30
PETN1/USB3TN3
C31
PETP1/USB3TP3
F15
PERN2/USB3RN4
G15
PERP2/USB3RP4
B31
PETN2/USB3TN4
A31
PETP2/USB3TP4
E15
RSVD
E13
RSVD
A27
PCIE_RCOMP
B27
PCIE_IREF
HASWELL-MCP-E-ULT_BGA1168
3
HASWELL_MCP_E
PCIe
USB3.0 P3 / PCIE P1
USB3.0 P4 / PCIE P2
11 OF 19
USB
USB3.0 P1
USB3.0 P2
USB2N0
USB2P0
USB2N1
USB2P1
USB2N2
USB2P2
USB2N3
USB2P3
USB2N4
USB2P4
USB2N5
USB2P5
USB2N6
USB2P6
USB2N7
USB2P7
USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USBRBIAS
USBRBIAS
RSVD
RSVD
OC0/GPIO40
OC1/GPIO41
OC2/GPIO42
OC3/GPIO43
Rev1p2
AN8
AM8
AR7
AT7
AR8
AP8
AR10
AT10
AM15
AL15
AM13
AN13
AP11
AN11
AR13
AP13
G20
H20
C33
B34
E18
F18
B33
A33
AJ10
AJ11
AN10
AM10
AL3
AT1
AH2
AV3
USBRBIAS
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N4
USB20_P4
USB20_N6
USB20_P6
USB20_N7
USB20_P7
1 2
R154 22.6_0402_1%
T35@
T36@
1
USB20_N0 26
USB20_P0 26
USB20_N1 26
USB20_P1 26
USB20_N2 26
USB20_P2 26
USB20_N4 24
USB20_P4 24
USB20_N6 18
USB20_P6 18
USB20_N7 18
USB20_P7 18
PCH_USB3_RX0_N 26
PCH_USB3_RX0_P 26
PCH_USB3_TX0_N 26
PCH_USB3_TX0_P 26
CAD note:
Route single‐end 50‐ohms and max 450‐mils length.
Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15 mils
USB_OC0# 26,9
USB_OC1# 9
USB_OC2# 9
USB_OC3# 9
USB2 Port 0 (USB3.0 P0)
USB2 Port 1
USB2 Port 2
Mini Card(WLAN+BT)
Touch Module
Camera
USB3 Port 0
B B
A A
Security Classification
Security Classification
Security Classification
2012/07/10 2013/07/10
2012/07/10 2013/07/10
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/07/10 2013/07/10
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
HSW MCP(7/11) PCIE,USB
HSW MCP(7/11) PCIE,USB
HSW MCP(7/11) PCIE,USB
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
1
of
10 42Monday, April 08, 2013
of
10 42Monday, April 08, 2013
of
10 42Monday, April 08, 2013
0.2
0.2
0.2
5
Shark Bay ULT have internal gate for VDDQ
+1.35V +1.35V_CPU
J2
@
1 2
JUMP_43X118
Q5
@
AO4304L_SO8
D D
3VS_GATE31
+3VS
12
R422
100K_0402_5%
@
VCCST_PG_EC27,8
C C
8
7
6
5
1 2
@
R182
0_0402_5%
U16
NC1VCC
2
A
3
GND
74AUP1G07GW_TSSOP5
1
2
3
4
1
C5
0.1U_0603_25V7K
@
2
+3VALW_PCH
5
4
Y
R309
10K_0402_5%
VCCST_PG_EC_R
SVID ALERT
+1.05VS_VTT
Place the PU
12
resistors close to CPU
R171
75_0402_1%
R172
43_0402_1%
12
VR_ALERT#39
H_CPU_SVIDALRT#
SVID DATA
R174
0_0402_5%
@
+1.05VS_VTT
Place the PU
resistors close to CPU
12
R173
130_0402_1%
12
VIDSOUT
B B
VR_SVID_DATA39
+CPU_CORE
+1.05VS_VTT
12
4
R166
0_0402_5%
1 2
@
VCCST_PWRGD 27,38
+1.05VS_VTT
XDP@
R169
150_0402_1%
12
+1.05VS_VTT
CPU_PWR_DEBUG
3
+1.35V_CPU
+CPU_CORE
+1.05VS_VTT
+VCCIOA_OUT
VR_SVID_CLK39
VR_ON39
VGATE39,8
R164 0_1206_5%
+VCCIO_OUT
12
@
1 2
1 2
1 2
@
1 2
CPU_PWR_DEBUG
+1.05VS_VTT
+CPU_CORE
+1.35V_CPU
VCC_SENSE_R
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
R1650_0402_5% @
VIDSOUT
VCCST_PG_EC_R
PCH_VR_EN
R1670_0402_5%
VR_READY
R1680_0402_5%
C167
0.1U_0402_16V7K
T37 @
T38 @
T39 @
T40 @
T41 @
T42 @
T43 @
T44 @
T45 @
T46 @
T47 @
T48 @
T98 @
T109 @
T110 @
T111 @
T112 @
T113 @
T114 @
T115 @
T117 @
2
U1L
L59
RSVD
J58
RSVD
AH26
VDDQ
AJ31
VDDQ
AJ33
VDDQ
AJ37
VDDQ
AN33
VDDQ
AP43
VDDQ
AR48
VDDQ
AY35
VDDQ
AY40
VDDQ
AY44
VDDQ
AY50
VDDQ
F59
VCC
N58
RSVD
AC58
RSVD
E63
VCC_SENSE
AB23
RSVD
A59
VCCIO_OUT
E20
VCCIOA_OUT
AD23
RSVD
AA23
RSVD
AE59
RSVD
L62
VIDALERT
N63
VIDSCLK
L63
VIDSOUT
B59
VCCST_PWRGD
F60
VR_EN
C59
VR_READY
D63
VSS
H59
PWR_DEBUG
P62
VSS
P60
RSVD_TP
P61
RSVD_TP
N59
RSVD_TP
N61
RSVD_TP
T59
RSVD
AD60
RSVD
AD59
RSVD
AA59
RSVD
AE60
RSVD
AC59
RSVD
AG58
RSVD
U59
RSVD
V59
RSVD
AC22
VCCST
AE22
VCCST
AE23
VCCST
AB57
VCC
AD57
VCC
AG57
VCC
C24
VCC
C28
VCC
C32
VCC
HASWELL-MCP-E-ULT_BGA1168
HASWELL_MCP_E
HSW ULT POWER
12 OF 19
1
+CPU_CORE
C36
VCC
C40
VCC
C44
VCC
C48
VCC
C52
VCC
C56
VCC
E23
VCC
E25
VCC
E27
VCC
E29
VCC
E31
VCC
E33
VCC
E35
VCC
E37
VCC
E39
VCC
E41
VCC
E43
VCC
E45
VCC
E47
VCC
E49
VCC
E51
VCC
E53
VCC
E55
VCC
E57
VCC
F24
VCC
F28
VCC
F32
VCC
F36
VCC
F40
VCC
F44
VCC
F48
VCC
F52
VCC
F56
VCC
G23
VCC
G25
VCC
G27
VCC
G29
VCC
G31
VCC
G33
VCC
G35
VCC
G37
VCC
G39
VCC
G41
VCC
G43
VCC
G45
VCC
G47
VCC
G49
VCC
G51
VCC
G53
VCC
G55
VCC
G57
VCC
H23
VCC
J23
VCC
K23
VCC
K57
VCC
L22
VCC
M23
VCC
M57
VCC
P57
VCC
U57
VCC
W57
VCC
Rev1p2
VDDQ DECOUPLING
1
@
2
2.2U_0402_6.3V6M
C8
2.2U_0402_6.3V6M
C9
1
2
2.2U_0402_6.3V6M
C10
1
2
2.2U_0402_6.3V6M
C11
1
2
10U_0603_6.3V6M
1
C12
2
EMC@
1
2
EMC@
10U_0603_6.3V6M
1
C13
2
10U_0603_6.3V6M
1
C14
2
10U_0603_6.3V6M
1
C15
2
10U_0603_6.3V6M
1
C16
2
10U_0603_6.3V6M
1
+
C17
2
C18
330U_2.5V_M
330UF/2.5V/3528
12
R177
100_0402_1%
VCC_SENSE_R
A A
VSS_SENSE_R13
R233
100_0402_1%
Note: 0 ohm PLACED CLOSE TO CPU
12
R178
@
0_0402_5%
12
R235
@
12
5
0_0402_5%
VCC_SENSE 39
VSS_SENSE 39
4
@
C6
22U_0805_6.3V6M
1
2
1
EMC@
C7
2
10U_0603_6.3V6M
Security Classification
Security Classification
Security Classification
2012/07/10 2013/07/10
2012/07/10 2013/07/10
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/07/10 2013/07/10
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
+1.35V : 470UF/2V/7343 *2
10UF/6.3V/0603 * 6
2.2UF/6.3V/0402 * 4
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
HSW MCP(8/11) Power
HSW MCP(8/11) Power
HSW MCP(8/11) Power
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
1
of
11 42Monday, April 08, 2013
of
11 42Monday, April 08, 2013
of
11 42Monday, April 08, 2013
0.2
0.2
0.2
5
+1.05VS_VTT
1
+
C998
220U_6.3V_M
D D
+1.05VS_VTT +1.05VS_AUSB3PLL
C C
+1.05VS_VTT +1.05VS_AXCK_DCB
Near PJ602
1 2
L1
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%
1 2
L2
2.2UH_LQM2MPN2R2NG0L_30%
1 2
L3
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%
1 2
L4
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%
1 2
L5
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%
2
C42 1U_0402_6.3V6K
C32 100U_1206_6.3V6M
+1.05VS_ASATA3PLL
C46 1U_0402_6.3V6K
C61 100U_1206_6.3V6M
+1.05VS_APLLOPI
C47 1U_0402_6.3V6K
C22 100U_1206_6.3V6M
C48 1U_0402_6.3V6K
C23 100U_1206_6.3V6M
+1.05VS_AXCK_LCPLL
C999 1U_0402_6.3V6K
C49 1U_0402_6.3V6K
C24 100U_1206_6.3V6M
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
Near B18
Near B11
Near AA21
Near J18
+1.05VS_VTT
1
C21
1U_0402_6.3V6K
2
Near L10 Near M9
reserve on PVT
Near A20
1
C20
2
1
2
1U_0402_6.3V6K
Near J17
Near R21
4
C31
1U_0402_6.3V6K
EMC@
HDA --> 3.3V or 1.5V
I2C --> 1.8V
Near AC9
Near AH10
Near V8
+1.05VS_VTT
+1.05VS_AUSB3PLL
+1.05VS_ASATA3PLL
+1.05VS_APLLOPI
+3VALW_PCH
12
C38
1U_0402_6.3V6K
C28
12
22U_0805_6.3V6M
C59
EMC@
12
0.1U_0402_16V7K
C29
12
22U_0805_6.3V6M
+3VS
+1.05VS_AXCK_DCB
+1.05VS_AXCK_LCPLL
C57
12
1U_0402_6.3V6K
C56
12
1U_0402_6.3V6K
+3VALW_PCH
T99 @
AA21
T105 @
AH14
AH13
T116 @
+3VALW_PCH
AH10
T100 @
T101 @
T102 @
AE20
AE21
U1M
K9
VCCHSIO
L10
VCCHSIO
M9
VCCHSIO
N8
VCC1_05
P9
VCC1_05
B18
VCCUSB3PLL
B11
VCCSATA3PLL
Y20
RSVD
VCCAPLL
W21
VCCAPLL
J13
DCPSUS3
VCCHDA
DCPSUS2
AC9
VCCSUS3_3
AA9
VCCSUS3_3
VCCDSW3_3
V8
VCC3_3
W9
VCC3_3
J18
VCCCLK
K19
VCCCLK
A20
VCCACLKPLL
J17
VCCCLK
R21
VCCCLK
T21
VCCCLK
K18
RSVD
M20
RSVD
V21
RSVD
VCCSUS3_3
VCCSUS3_3
HASWELL-MCP-E-ULT_BGA1168
3
HASWELL_MCP_E
mPHY
OPI
USB3
AXALIA/HDA
VRM/USB2/AZALIA
GPIO/LCC
LPT LP POWER
13 OF 19
RTC
SPI
CORE
THERMAL SENSOR
SDIO/PLSS
SUS OSCILLATOR
USB2
VCCSUS3_3
VCCRTC
DCPRTC
VCCSPI
VCCASW
VCCASW
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
DCPSUSBYP
DCPSUSBYP
VCCASW
VCCASW
VCCASW
DCPSUS1
DCPSUS1
VCCTS1_5
VCC3_3
VCC3_3
VCCSDIO
VCCSDIO
DCPSUS4
RSVD
VCC1_05
VCC1_05
Rev1p2
+3VALW_PCH
AH11
AG10
AE7
Y8
AG14
AG13
J11
H11
H15
AE8
AF22
AG19
AG20
AE9
AF9
AG8
AD10
AD8
J15
K14
K16
U8
T9
AB8
AC20
AG16
AG17
C30 1U_0402_6.3V6K
+VCCRTCEXT
C54 0.1U_0402_16V7K
+3VS
C58 0.1U_0402_16V7K
C27 10U_0603_6.3V6M
C33 1U_0402_6.3V6K
C40 10U_0603_6.3V6M
EMC@
+PCH_VCCDSW
R209 0_0402_5%
C36 22U_0805_6.3V6M
C37 1U_0402_6.3V6K
C43 1U_0402_6.3V6K@
1 2
C55 0.1U_0402_16V7K
1 2
C44 1U_0402_6.3V6K
1 2
C53 1U_0402_6.3V6K@
1 2
C25 100U_1206_6.3V6M@
T103@
+1.05VS_VTT
1 2
C45 1U_0402_6.3V6K
2
1 2
1 2
@
1 2
1 2
1 2
1 2
1 2
1 2
1 2
12
@
+RTCVCC
+1.05VS_VTT
+1.05VS_VTT
+PCH_VCCDSW_R
+1.05VS_VTT
+1.5VS
+3VS
+3VS
C41
1U_0402_6.3V6K
1 2
+RTCVCC
1
C52
2
1U_0402_6.3V6K
1
1
@
C51
2
0.1U_0402_16V7K
1
@
C50
2
0.1U_0402_16V7K
B B
A A
Security Classification
Security Classification
Security Classification
2012/07/10 2013/07/10
2012/07/10 2013/07/10
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/07/10 2013/07/10
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
HSW MCP(9/11) Power
HSW MCP(9/11) Power
HSW MCP(9/11) Power
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
1
of
12 42Monday, April 08, 2013
of
12 42Monday, April 08, 2013
of
12 42Monday, April 08, 2013
0.2
0.2
0.2
5
4
3
2
1
HASWELL_MCP_E
D D
C C
B B
U1N
A11
VSS
A14
VSS
A18
VSS
A24
VSS
A28
VSS
A32
VSS
A36
VSS
A40
VSS
A44
VSS
A48
VSS
A52
VSS
A56
VSS
AA1
VSS
AA58
VSS
AB10
VSS
AB20
VSS
AB22
VSS
AB7
VSS
AC61
VSS
AD21
VSS
AD3
VSS
AD63
VSS
AE10
VSS
AE5
VSS
AE58
VSS
AF11
VSS
AF12
VSS
AF14
VSS
AF15
VSS
AF17
VSS
AF18
VSS
AG1
VSS
AG11
VSS
AG21
VSS
AG23
VSS
AG60
VSS
AG61
VSS
AG62
VSS
AG63
VSS
AH17
VSS
AH19
VSS
AH20
VSS
AH22
VSS
AH24
VSS
AH28
VSS
AH30
VSS
AH32
VSS
AH34
VSS
AH36
VSS
AH38
VSS
AH40
VSS
AH42
VSS
AH44
VSS
AH49
VSS
AH51
VSS
AH53
VSS
AH55
VSS
AH57
VSS
AJ13
VSS
AJ14
VSS
AJ23
VSS
AJ25
VSS
AJ27
VSS
AJ29
VSS
HASWELL-MCP-E-ULT_BGA1168
14 OF 19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Rev1p2
AJ35
AJ39
AJ41
AJ43
AJ45
AJ47
AJ50
AJ52
AJ54
AJ56
AJ58
AJ60
AJ63
AK23
AK3
AK52
AL10
AL13
AL17
AL20
AL22
AL23
AL26
AL29
AL31
AL33
AL36
AL39
AL40
AL45
AL46
AL51
AL52
AL54
AL57
AL60
AL61
AM1
AM17
AM23
AM31
AM52
AN17
AN23
AN31
AN32
AN35
AN36
AN39
AN40
AN42
AN43
AN45
AN46
AN48
AN49
AN51
AN52
AN60
AN63
AN7
AP10
AP17
AP20
AP22
AP23
AP26
AP29
AP3
AP31
AP38
AP39
AP48
AP52
AP54
AP57
AR11
AR15
AR17
AR23
AR31
AR33
AR39
AR43
AR49
AR5
AR52
AT13
AT35
AT37
AT40
AT42
AT43
AT46
AT49
AT61
AT62
AT63
AU1
AU16
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU33
AU51
AU53
AU55
AU57
AU59
AV14
AV16
AV20
AV24
AV28
AV33
AV34
AV36
AV39
AV41
AV43
AV46
AV49
AV51
AV55
HASWELL_MCP_E
U1O
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
HASWELL-MCP-E-ULT_BGA1168
15 OF 19
Rev1p2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AV59
AV8
AW16
AW24
AW33
AW35
AW37
AW4
AW40
AW42
AW44
AW47
AW50
AW51
AW59
AW60
AY11
AY16
AY18
AY22
AY24
AY26
AY30
AY33
AY4
AY51
AY53
AY57
AY59
AY6
B20
B24
B26
B28
B32
B36
B4
B40
B44
B48
B52
B56
B60
C11
C14
C18
C20
C25
C27
C38
C39
C57
D12
D14
D18
D2
D21
D23
D25
D26
D27
D29
D30
D31
U1P
HASWELL_MCP_E
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
HASWELL-MCP-E-ULT_BGA1168
G18
G22
D33
D34
D35
D37
D38
D39
D41
D42
D43
D45
D46
D47
D49
D50
D51
D53
D54
D55
D57
D59
D62
E11
E17
F20
F26
F30
F34
F38
F42
F46
F50
F54
F58
F61
H13
D5
D8
G3
G5
G6
G8
16 OF 19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_SENSE
VSS
Rev1p2
H17
H57
J10
J22
J59
J63
K1
K12
L13
L15
L17
L18
L20
L58
L61
L7
M22
N10
N3
P59
P63
R10
R22
R8
T1
T58
U20
U22
U61
U9
V10
V3
V7
W20
W22
Y10
Y59
Y63
V58
AH46
V23
E62
AH16
VSS_SENSE_R 11
A A
Security Classification
Security Classification
Security Classification
2012/07/10 2013/07/10
2012/07/10 2013/07/10
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/07/10 2013/07/10
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
HSW MCP(10/11) GND
HSW MCP(10/11) GND
HSW MCP(10/11) GND
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
V5WE2 M/B LA-9532P Schematic
1
of
13 42Monday, April 08, 2013
of
13 42Monday, April 08, 2013
of
13 42Monday, April 08, 2013
0.2
0.2
0.2
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