Compal LA-9371P Afterburn MXM, ZBook 17 Schematic

A

1 1

B

C

D

E

Compal Confidential

2 2

Intel Haswell rPGA Processor with Lynx Point-H

Afterburn MXM

LA-9371P

3 3

2012-09-28

REV : 0.2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

LA-9371P

E

0.2

1 53Friday, September 28, 2012

0.2

A

B

C

D

E

Compal Confidential

Model Name : Afterburn

File Name : LA-9371P

1 1

Ch B

DDR3-SO-DIMM2, 3

BANK 0, 1, 2, 3

Page 12

eDP Panel Conn.

P Switch

D PI3VDP124

Dock Conn DPD

Page 33

DP Conn

2 2

3 3

daughter board

sub/B Page 6

Mini DP Conn.

sub/B Page 4

daughter board

Port 8

Card Reader

Realtek RTS5237

LS-9373P Page 4

SD/MMC Slot

LS-9373P Page 4

Dock Conn

Page 33

GLAN Intel Clarkville

Page 29

Lan Switch PI3L500

Page 29

ThunderBolt Cactus Ridge

sub/B Page 2,3,4

X4

Port 3,4

daughter board

RJ45 Conn.

Page 29

Port 5Port 6

Expresscard

sub/B Page 7

Super I/O

Port 6

SMSC LPC47N217

Accelerometer ST HP3DC2

Page 28

FAN conn.

Page 24

4 4

RTC CKT.

Power On/Off CKT.

DC/DC interface CKT.

Page 13

LS-9376P Page 4

Page 34

A

Page 36

Dock Conn

VGA Conn

Port 7

WLAN (MINI card)

Page 25

Port 13

Page 32

Page 22

DPC

D

Page 33

Page 36

ODD Conn.

Page 23 Page 23

TPM1.2

Infineon SLB9656

SMBus (PCH)

B

eDP MUX PS8321

Page 36

eDPF

MXM3.0 Conn NVidia:

PE

CRT

VGA Switch 2 to 2

CRT

MAX14885EETL

PCI-Express x 8 (ARD PCIE2.0 2.5GT/s)

Port 1

mSATA Conn.

Page 35

CRT

Port 2

SATA HDD Conn. (Secondary)

Page 36

Port 4

(GEN1 1.5Gb/S GEN2 3Gb/S GEN3 6Gb/S)

Page 23

PEGx16

SATAx4

USB 2.0 Bus

KBC

Page 28

Touch Pad

SMSC MES1132

PS2

eDP

CRT

100MHz

Port 0

SATA HDD Conn. (primary)

Page 23

Int.KBD

Intel

Haswell

rPGA Processor

rPGA947

37.5mm*37.5mm

Page 4,5,6,7,8,9,10

100MHz

2.7GT/s

Intel

Lynx Point

PCH

695pin BGA

20mm*20mm

Page 13,14,15,16,17,18,19,20,21

LPC BUS

33MHz

SPI(PCH)

Page 30

Page 38Page 38

C

DMI x4FDI x2

100MHz

5GT/s

SPI

BIOS SPI ROM x1, 16 MB

EC ROM 2MB

DDR3L 1333MHz 1.35V

USB 3.0 x4

USB 2.0 x 11

HD Audio

Page 16

HDA Codec IDT 92HD91

Page 30

DDR3-SO-DIMM0, 1

BANK 0, 1, 2, 3

Ch A

Digital MIC

Page 22

Page 26

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

Combo Jack

LS-9373P Page 4

SPK conn

Page 27

2012/06/11 2013/06/11

D

Page 11

Port 1,4,5,9

Compal Secret Data

Deciphered Date

Port 1

Docking x 1

Port 2,5,6

USB conn x 3 (For I/O)

Port 0,11

Docking x 2

USB conn x 4(For I/O)

Port 6

Expresscard

Smart card Controller

Port 7

AU9540A51

FPR

Port 8

Validity VFM471

Port 10

Webcam

Port 12

WWAN SIM Card

Port 13

WLAN

Page 33

page 39

Page 33

page 39

sub/B Page 7

Page 37

Page 28

Page 22

Page 25 Page 25

daughter board

Docking connector: RJ45 USB30*1 USB20*1 DP*2 Parallel port Serial port PS/2 Line in/Line out SATAx2 VGA

Compal Electronics, Inc.

Custom

Compal Electronics, Inc.

Block Diagrams

LA-9371P

E

2 53Friday, September 28, 2012

Title

Size Document Number Rev

Date: Sheet of

0.2

5

4

3

2

1

Voltage Rails

D D

State

S0

C C

SMBUS Control Table

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

( O MEANS ON X MEANS OFF )

+RTCVCC

power plane

O

Symbol Note :

B+

O

X

+5VDS

+3VDS

OO

O

X

X X X

+1.35V

+0.675VS

O

X X

X

+5VS

+3VS

+1.5VS

+VCC_CORE

+1.05VS

1.05VM

+

OO

X

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build

AMT@ : means just install for support iAMT CONN@ : means ME part.

Layout Notes

L

07/24 update

: Question Area Mark.(Wait check)

Install below 45 level BOM structure for ver. 0.1

45@ : means just put it in the BOM of 45 level.

Install below 43 level BOM structure for ver. 0.1

DEBUG@ : means just build when PCIE port 80 CARD function enable.

Remove before MP

SOURCE

B B

A A

I2C_MAIN_CLK I2C_MAIN_DAT

I2C_BAY_CLK I2C_BAY_DAT

MEM_SMBCLK MEM_SMBDATA

LAN_SMBCLK LAN_SMBDATA

SML1_SMBCLK SML1_SMBDATA

Stapping O ptions Fla sh

GPIO 51 Bit 1

0

0 1

1

1 1

SMSC1126

Haswell

GPIO 19 Bit 0

0

5

Haswell

H

aswell

Boot BIOS Destination

2nd

BATT

X

V

X

V

X

X X

X X X

Reserved

RSVD

SPI

LPC

XDP

X

V

SODIMM

X

V

X X

G-SENSOR

X

V

X X

4

X

TP

V

X

NIC

X

V

X

NFC

EC

MXM

X

X X

X

V

Issued Date

X

X X

X

V

Compal Secret Data

2012/06/11 2013/06/11

3

Compal Secret Data

Deciphered Date

2

X

X X

V

X

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Notes List

LA-9371P

3 53Friday, September 28, 2012

1

0.2

5

D D

DMI_CRX_PTX_N0<14> DMI_CRX_PTX_N1<14> DMI_CRX_PTX_N2<14> DMI_CRX_PTX_N3<14>

DMI_CRX_PTX_P0<14> DMI_CRX_PTX_P1<14> DMI_CRX_PTX_P2<14> DMI_CRX_PTX_P3<14>

DMI_CTX_PRX_N0<14> DMI_CTX_PRX_N1<14> DMI_CTX_PRX_N2<14> DMI_CTX_PRX_N3<14>

DMI_CTX_PRX_P0<14> DMI_CTX_PRX_P1<14>

C C

B B

DMI_CTX_PRX_P2<14> DMI_CTX_PRX_P3<14>

FDI_CSYNC<14> FDI_INT<14>

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

FDI_CSYNC FDI_INT

4

Haswell rPGA EDS

JCPU1A

D21

DMI_RXN_0

C21

DMI_RXN_1

B21

DMI_RXN_2

A21

DMI_RXN_3

D20

DMI_RXP_0

C20

DMI_RXP_1

B20

DMI_RXP_2

A20

DMI_RXP_3

D18

DMI_TXN_0

C17

DMI_TXN_1

B17

DMI_TXN_2

A17

DMI_TXN_3

D17

DMI_TXP_0

C18

DMI_TXP_1

B18

DMI_TXP_2

A18

DMI_TXP_3

H29

FDI_CSYNC

J29

DISP_INT

I

NTEL_HASWELL_HA SWELL

CONN@

3

+VCCIOA_OUT

PEG_COMP

CAD Note: Trace width=12 mils ,Spacing=15mil Max length= 400 mils.

E23

PEG_RCOMP

PEG_RXN_0 PEG_RXN_1 PEG_RXN_2 PEG_RXN_3 PEG_RXN_4 PEG_RXN_5 PEG_RXN_6

PEG

PEG_RXN_7

DMI FDI

1 OF 9

PEG_RXN_8

PEG_RXN_9 PEG_RXN_10 PEG_RXN_11 PEG_RXN_12 PEG_RXN_13 PEG_RXN_14 PEG_RXN_15

PEG_RXP_0 PEG_RXP_1 PEG_RXP_2 PEG_RXP_3 PEG_RXP_4 PEG_RXP_5 PEG_RXP_6 PEG_RXP_7 PEG_RXP_8

PEG_RXP_9 PEG_RXP_10 PEG_RXP_11 PEG_RXP_12 PEG_RXP_13 PEG_RXP_14 PEG_RXP_15

PEG_TXN_0

PEG_TXN_1

PEG_TXN_2

PEG_TXN_3

PEG_TXN_4

PEG_TXN_5

PEG_TXN_6

PEG_TXN_7

PEG_TXN_8

PEG_TXN_9 PEG_TXN_10 PEG_TXN_11 PEG_TXN_12 PEG_TXN_13 PEG_TXN_14 PEG_TXN_15

PEG_TXP_0

PEG_TXP_1

PEG_TXP_2

PEG_TXP_3

PEG_TXP_4

PEG_TXP_5

PEG_TXP_6

PEG_TXP_7

PEG_TXP_8

PEG_TXP_9 PEG_TXP_10 PEG_TXP_11 PEG_TXP_12 PEG_TXP_13 PEG_TXP_14 PEG_TXP_15

PEG_COMP

M29

PEG_CRX_GTX_N0

K28

PEG_CRX_GTX_N1

M31

PEG_CRX_GTX_N2

L30

PEG_CRX_GTX_N3

M33

PEG_CRX_GTX_N4

L32

PEG_CRX_GTX_N5

M35

PEG_CRX_GTX_N6

L34

PEG_CRX_GTX_N7

E29

PEG_CRX_GTX_N8

D28

PEG_CRX_GTX_N9

E31

PEG_CRX_GTX_N10

D30

PEG_CRX_GTX_N11

E35

PEG_CRX_GTX_N12

D34

PEG_CRX_GTX_N13

E33

PEG_CRX_GTX_N14

E32

PEG_CRX_GTX_N15

L29

PEG_CRX_GTX_P0

L28

PEG_CRX_GTX_P1

L31

PEG_CRX_GTX_P2

K30

PEG_CRX_GTX_P3

L33

PEG_CRX_GTX_P4

K32

PEG_CRX_GTX_P5

L35

PEG_CRX_GTX_P6

K34

PEG_CRX_GTX_P7

F29

PEG_CRX_GTX_P8

E28

PEG_CRX_GTX_P9

F31

PEG_CRX_GTX_P10

E30

PEG_CRX_GTX_P11

F35

PEG_CRX_GTX_P12

E34

PEG_CRX_GTX_P13

F33

PEG_CRX_GTX_P14

D32

PEG_CRX_GTX_P15

H35

PEG_CTX_GRX_C_N0

H34

PEG_CTX_GRX_C_N1

J33

PEG_CTX_GRX_C_N2

H32

PEG_CTX_GRX_C_N3

J31

PEG_CTX_GRX_C_N4

G30

PEG_CTX_GRX_C_N5

C33

PEG_CTX_GRX_C_N6

B32

PEG_CTX_GRX_C_N7

B31

PEG_CTX_GRX_C_N8

A30

PEG_CTX_GRX_C_N9

B29

PEG_CTX_GRX_C_N10

A28

PEG_CTX_GRX_C_N11

B27

PEG_CTX_GRX_C_N12

A26

PEG_CTX_GRX_C_N13

B25

PEG_CTX_GRX_C_N14

A24

PEG_CTX_GRX_C_N15

J35

PEG_CTX_GRX_C_P0

G34

PEG_CTX_GRX_C_P1

H33

PEG_CTX_GRX_C_P2

G32

PEG_CTX_GRX_C_P3

H31

PEG_CTX_GRX_C_P4

H30

PEG_CTX_GRX_C_P5

B33

PEG_CTX_GRX_C_P6

A32

PEG_CTX_GRX_C_P7

C31

PEG_CTX_GRX_C_P8

B30

PEG_CTX_GRX_C_P9

C29

PEG_CTX_GRX_C_P10

B28

PEG_CTX_GRX_C_P11

C27

PEG_CTX_GRX_C_P12

B26

PEG_CTX_GRX_C_P13

C25

PEG_CTX_GRX_C_P14

B24

PEG_CTX_GRX_C_P15

12

RC124.9_0402_1% RC124.9_0402_1%

2

PEG_CRX_GTX_P[0..15]

PEG_CRX_GTX_N[0..15]

PEG_CTX_GRX_P[0..15]

PEG_CTX_GRX_N[0..15]

PEG_CTX_GRX_C_P0 PEG_CTX_GRX_C_N0 PEG_CTX_GRX_N0

PEG_CTX_GRX_C_P1 PEG_CTX_GRX_C_N1

PEG_CTX_GRX_C_P2 PEG_CTX_GRX_C_N2

PEG_CTX_GRX_C_P3 PEG_CTX_GRX_C_N3

PEG_CTX_GRX_C_P4 PEG_CTX_GRX_C_N4

PEG_CTX_GRX_C_P5 PEG_CTX_GRX_C_N5

PEG_CTX_GRX_C_P6 PEG_CTX_GRX_C_N6

PEG_CTX_GRX_C_P7 PEG_CTX_GRX_C_N7

PEG_CTX_GRX_C_P8 PEG_CTX_GRX_C_N8

PEG_CTX_GRX_C_P9 PEG_CTX_GRX_C_N9

PEG_CTX_GRX_C_P10 PEG_CTX_GRX_C_N10

PEG_CTX_GRX_C_P11 PEG_CTX_GRX_C_N11

PEG_CTX_GRX_C_P12 PEG_CTX_GRX_C_N12

PEG_CTX_GRX_C_P13 PEG_CTX_GRX_C_N13

PEG_CTX_GRX_C_P14 PEG_CTX_GRX_C_N14

PEG_CTX_GRX_C_P15 PEG_CTX_GRX_C_N15

12

CC1 0.22U_0402_6.3V6KCC1 0.22U_0402_6.3V6K

12

CC2 0.22U_0402_6.3V6KCC2 0.22U_0402_6.3V6K

12

CC3 0.22U_0402_6.3V6KCC3 0.22U_0402_6.3V6K

12

CC4 0.22U_0402_6.3V6KCC4 0.22U_0402_6.3V6K

12

CC5 0.22U_0402_6.3V6KCC5 0.22U_0402_6.3V6K

12

CC6 0.22U_0402_6.3V6KCC6 0.22U_0402_6.3V6K

12

CC7 0.22U_0402_6.3V6KCC7 0.22U_0402_6.3V6K

12

CC8 0.22U_0402_6.3V6KCC8 0.22U_0402_6.3V6K

12

CC9 0.22U_0402_6.3V6KCC9 0.22U_0402_6.3V6K

12

CC10 0.22U_0402_6.3V6KCC10 0.22U_0402_6.3V6K

12

CC11 0.22U_0402_6.3V6KCC11 0.22U_0402_6.3V6K

12

CC12 0.22U_0402_6.3V6KCC12 0.22U_0402_6.3V6K

12

CC13 0.22U_0402_6.3V6KCC13 0.22U_0402_6.3V6K

12

CC14 0.22U_0402_6.3V6KCC14 0.22U_0402_6.3V6K

12

CC15 0.22U_0402_6.3V6KCC15 0.22U_0402_6.3V6K

12

CC16 0.22U_0402_6.3V6KCC16 0.22U_0402_6.3V6K

1 2

CC17 0.22U_0402_6.3V6KCC17 0.22U_0402_6.3V6K

1 2

CC18 0.22U_0402_6.3V6KCC18 0.22U_0402_6.3V6K

1 2

CC19 0.22U_0402_6.3V6KCC19 0.22U_0402_6.3V6K

1 2

CC20 0.22U_0402_6.3V6KCC20 0.22U_0402_6.3V6K

1 2

CC21 0.22U_0402_6.3V6KCC21 0.22U_0402_6.3V6K

1 2

CC22 0.22U_0402_6.3V6KCC22 0.22U_0402_6.3V6K

1 2

CC23 0.22U_0402_6.3V6KCC23 0.22U_0402_6.3V6K

1 2

CC24 0.22U_0402_6.3V6KCC24 0.22U_0402_6.3V6K

1 2

CC25 0.22U_0402_6.3V6KCC25 0.22U_0402_6.3V6K

1 2

CC26 0.22U_0402_6.3V6KCC26 0.22U_0402_6.3V6K

1 2

CC27 0.22U_0402_6.3V6KCC27 0.22U_0402_6.3V6K

1 2

CC28 0.22U_0402_6.3V6KCC28 0.22U_0402_6.3V6K

1 2

CC29 0.22U_0402_6.3V6KCC29 0.22U_0402_6.3V6K

1 2

CC30 0.22U_0402_6.3V6KCC30 0.22U_0402_6.3V6K

1 2

CC31 0.22U_0402_6.3V6KCC31 0.22U_0402_6.3V6K

1 2

CC32 0.22U_0402_6.3V6KCC32 0.22U_0402_6.3V6K

PEG_CRX_GTX_P[0..15] <35>

PEG_CRX_GTX_N[0..15] <35>

PEG_CTX_GRX_P[0..15] <35>

PEG_CTX_GRX_N[0..15] <35>

PEG_CTX_GRX_P0

PEG_CTX_GRX_P1 PEG_CTX_GRX_N1

PEG_CTX_GRX_P2 PEG_CTX_GRX_N2

PEG_CTX_GRX_P3 PEG_CTX_GRX_N3

PEG_CTX_GRX_P4 PEG_CTX_GRX_N4

PEG_CTX_GRX_P5 PEG_CTX_GRX_N5

PEG_CTX_GRX_P6 PEG_CTX_GRX_N6

PEG_CTX_GRX_P7 PEG_CTX_GRX_N7

PEG_CTX_GRX_P8 PEG_CTX_GRX_N8

PEG_CTX_GRX_P9 PEG_CTX_GRX_N9

PEG_CTX_GRX_P10

PEG_CTX_GRX_N10

PEG_CTX_GRX_P11

PEG_CTX_GRX_N11

PEG_CTX_GRX_P12

PEG_CTX_GRX_N12

PEG_CTX_GRX_P13

PEG_CTX_GRX_N13

PEG_CTX_GRX_P14

PEG_CTX_GRX_N14

PEG_CTX_GRX_P15

PEG_CTX_GRX_N15

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

DMI,PEG

LA-9371P

1

4 53Friday, September 28, 2012

0.2

of

5

SM_DRAMPWROK with DDR Power Gating Topology

+5VDS

CC35

1 2

0.1U_0402_10V6K

UC1

20120923 HP's request 20120810 HP's request

D D

C C

KBC_PROC_HOT#

PM_DRAM_PWRGD<14>

1 2

+3VS

RC9 100K_0402_1%RC9 100K_0402_1%

+VCCIO_OUT

RC23 62_0402_5%RC23 62_0402_5%

13

D

2

G

Q59

G

Q59

S

2N7002KW_SOT323-3

PWR_GD<30,31,46>

1 2

CLK_CPU_SSC_DPLL#<15> CLK_CPU_SSC_DPLL<15>

KBC_PROC_HOT

PCH_THERMTRIP#_R<18,35>

H_PM_SYNC<14>

H_CPUPWRGD<18>

CPU_PLTRST#<18>

CLK_CPU_DPLL#<15> CLK_CPU_DPLL<15>

CLK_CPU_DMI#<15> CLK_CPU_DMI<15>

KBC_PROC_HOT_R<24,46>

UC1

1

2

RUN_ON_CPU1.5VS3#<9>

RC26 56_0402_5%RC26 56_0402_5% RC27

RC27

5

P

B

4

O

A

G

74AHC1G09GW_TSSOP5

3

Part Number = SA00003Y000

2

G

KBC_PROC_HOT_R

T120PAD @T120PAD @

T118PAD @T118PAD @

H_PECI<30>

1 2

390_0402_1%

1 2

20120911 Delete RC30 as HP's request

4

+1.35VS

12

RC5

1.8K_0402_1%

12

39_0402_5%

RC10

@

3.3K_0402_1%

RC12

1 2

13

D

QC1

2N7002K_SOT23-3

S

CPU_DETECT#

H_CATERR# H_PECI

T1PAD @T1PAD @

KBC_PROC_HOT_R H_THERMTRIP#

H_PM_SYNC H_CPUPWRGD PM_DRAM_PWRGD_CPU CPU_PLTRST#

PM_DRAM_PWRGD_CPU

Haswell rPGA EDS

CONN@

JCPU1B

AP32

SKTOCC

AN32

CATERR

AR27

PECI

AK31

FC_AK31

AM30

PROCHOT

AM35

THERMTRIP

AT28

PM_SYNC

AL34

PWRGOO D

AC10

SM_DRAMPW ROK

AT26

PLTRSTIN

G28

DPLL_REF _CLKN

H28

DPLL_REF _CLKP

F27

SSC_DPLL _REF_CLKN

E27

SSC_DPLL _REF_CLKP

D26

BCLKN

E26

BCLKP

INTEL_HASWELL_HASWELL

3

+VCCIO_OUT

Place near JXDP1

ON/OFFBTN#<13,14,30>

CPU_PWR_DEBUG<9>

DDR_XDP_WAN_SMBDAT<11,12,13,16,28,38> DDR_XDP_WAN_SMBCLK<11,12,13,16,28,38>

H_CPUPWRGD H_CPUPWRGD_XDP

PM_PWROK<14,30>

0.1U_0402_16V4Z

1

CC34

CC33

2

RC5 need to close to JCPU1

1 2

RC13 1K_0402_1%RC13 1K_0402_1%

1 2

RC107

20120925 HP's request

0_0402_5%

CFG0<8> CFG1<8>

CFG2<8> CFG3<8>

CFG4<8> CFG5<8>

CFG6<8> CFG7<8>

XDP_PREQ# XDP_PRDY#

CFG0 CFG1

CFG2 CFG3

XDP_OBS0 XDP_OBS1

CFG4 CFG5

CFG6 CFG7

PM_PWROK_XDP

XDP_TCLK

2

+VCCIO_OUT +VCCIO_OUT

JXDP1

1

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A 0

11

OBSDATA_A 1

13

GND4

15

OBSDATA_A 2

17

OBSDATA_A 3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B 0

29

OBSDATA_B 1

31

GND10

33

OBSDATA_B 2

35

OBSDATA_B 3

37

GND12

39

PWRGOO D/HOOK0

41

HOOK1

43

VCC_OBS_ AB

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

SAMTE_BSH-030-01-L-D-A

ITPCLK#/HO OK5

RESET#/HOO K6

GND1 OBSFN_C0 OBSFN_C1

GND3

OBSDATA_C0 OBSDATA_C1

GND5

OBSDATA_C2 OBSDATA_C3

GND7 OBSFN_D0 OBSFN_D1

GND9

OBSDATA_D0 OBSDATA_D1

GND11 OBSDATA_D2 OBSDATA_D3

GND13

ITPCLK/HOOK 4

VCC_OBS_ CD

DBR#/HOOK 7

GND15

TRST#

GND17

CONN@

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

TD0

54 56

TDI

58

TMS

60

CFG17 CFG16

CFG8 CFG9

CFG10 CFG11

CFG19 CFG18

CFG12 CFG13

CFG14 CFG15

XDP_RST#_R XDP_DBRESET#

XDP_TDO XDP_TRST# XDP_TDI XDP_TMS

RC105 1K_0402_1%RC105 1K_0402_1%

1

CFG17 <8> CFG16 <8>

CFG8 <8> CFG9 <8>

CFG10 <8> CFG11 <8>

CFG19 <8> CFG18 <8>

CFG12 <8> CFG13 <8>

CFG14 <8> CFG15 <8>

12

RC16 1K_0402_1%RC16 1K_0402_1%

PLT_RST#

12

CFG3

PLT_RST# <13,14,25,28,29,30,35,37,39>

#4/16 change by HP requirement

1 2

@

RC22 0_0402_5%

MISC

THERMAL

DDR3

PWR

CLOCK

2 OF 9

SM_RCOMP_ 0 SM_RCOMP_ 1 SM_RCOMP_ 2 SM_DRAMRST

JTAG

BPM_N_0 BPM_N_1 BPM_N_2 BPM_N_3 BPM_N_4 BPM_N_5 BPM_N_6 BPM_N_7

AP3

SM_RCOMP0

AR3

SM_RCOMP1

AP2

SM_RCOMP2

AN3

DDR3_DRAMRST#_CPU

AR29

XDP_PRDY#

PRDY

AT29

XDP_PREQ#

PREQ

AM34

XDP_TCLK

TCK

AN33

XDP_TMS

TMS

AM33

XDP_TRST#

TRST

AM31

XDP_TDI

TDI

AL33

XDP_TDO

TDO

AP33

XDP_DBRESET#

DBR

AR30

XDP_OBS0

AN31

XDP_OBS1

AN29

XDP_OBS2_R

AP31

XDP_OBS3_R

AP30

XDP_OBS4_R

AN28

XDP_OBS5_R

AP29

XDP_OBS6_R

AP28

XDP_OBS7_R

For ESD concern, please place close to CPU

RC36 0_0402_5%@RC36 0_0402_5%@ RC38 0_0402_5%@RC38 0_0402_5%@ RC40 0_0402_5%@RC40 0_0402_5%@ RC43 0_0402_5%@RC43 0_0402_5%@ RC45 0_0402_5%@RC45 0_0402_5%@ RC47 0_0402_5%@RC47 0_0402_5%@

XDP_DBRESET# <13,14>

1 2 1 2 1 2 1 2 1 2 1 2

DDR3_DRAMRST#_CPU

KBC_DS3_EN<25,29,30,44,9>

RC22 0_0402_5%

BSS138W-7-F_SOT323-3

S

4.99K_0402_1%

G

2

12

RC28

2

G

QC2

D

13

1 2

RC25 3.3K_0402_5%RC25 3.3K_0402_5%

13

D

QC3

2N7002K_SOT23-3

S

CPU_DRAM_RST# <11>

20120725 for S3 resume as HP's request

DDR_RST_EN <16>

PU/PD for JTAG signals

SSC CLOCK TERMINATION, IF NOT USED, stuff RC20,RC21

H_CPUPWRGD

B B

CAD Note: Avoid stub in the PWRGD path

20120911 Delete RC66 as HP's request

A A

5

4

while placing resistors RC25 & RC130

12

RC55

RC55 10K_0402_1%

10K_0402_1%

CRB Rev 0.7 is depop

3

CRB Rev 0.7 no pull up

DDR3 COMPENSATION SIGNALS

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

CAD Note: Trace width=12~15 mil, Spcing=20 mils Max trace length= 500 mil

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONI CS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DI VISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COM PAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

RC59 100_0402_1%RC59 100_0402_1%

1 2

RC61 75_0402_1%RC61 75_0402_1%

1 2

RC65 100_0402_1%RC65 100_0402_1%

Compal Secret Data

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

2

XDP_DBRESET#

RC52 1K_0402_1%RC52 1K_0402_1%

XDP_TDO

RC57 51_0402_1%RC57 51_0402_1%

XDP_TCLK

RC60 51_0402_1%RC60 51_0402_1%

XDP_TRST#

RC62 51_0402_1%RC62 51_0402_1%

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PM,XDP,CLK

12

LA-9371P

1

+3VS

+1.05VS

0.2

5 53Friday, September 28, 2012

0.2

5

D D

DDR_A_D[0..63]<11>

C C

B B

+SM_VREF_CA +DIMM01_VREF_DQ +DIMM23_VREF_DQ

20120710 Change by HP request

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AR15

SA_DQ_0

AT14

SA_DQ_1

AM14

SA_DQ_2

AN14

SA_DQ_3

AT15

SA_DQ_4

AR14

SA_DQ_5

AN15

SA_DQ_6

AM15

SA_DQ_7

AM9

SA_DQ_8

AN9

SA_DQ_9

AM8

SA_DQ_10

AN8

SA_DQ_11

AR9

SA_DQ_12

AT9

SA_DQ_13

AR8

SA_DQ_14

AT8

SA_DQ_15

AJ9

SA_DQ_16

AK9

SA_DQ_17

AJ6

SA_DQ_18

AK6

SA_DQ_19

AJ10

SA_DQ_20

AK10

SA_DQ_21

AJ7

SA_DQ_22

AK7

SA_DQ_23

AF4

SA_DQ_24

AF5

SA_DQ_25

AF1

SA_DQ_26

AF2

SA_DQ_27

AG4

SA_DQ_28

AG5

SA_DQ_29

AG1

SA_DQ_30

AG2

SA_DQ_31

J1

SA_DQ_32

J2

SA_DQ_33

J5

SA_DQ_34

H5

SA_DQ_35

H2

SA_DQ_36

H1

SA_DQ_37

J4

SA_DQ_38

H4

SA_DQ_39

F2

SA_DQ_40

F1

SA_DQ_41

D2

SA_DQ_42

D3

SA_DQ_43

D1

SA_DQ_44

F3

SA_DQ_45

C3

SA_DQ_46

B3

SA_DQ_47

B5

SA_DQ_48

E6

SA_DQ_49

A5

SA_DQ_50

D6

SA_DQ_51

D5

SA_DQ_52

E5

SA_DQ_53

B6

SA_DQ_54

A6

SA_DQ_55

E12

SA_DQ_56

D12

SA_DQ_57

B11

SA_DQ_58

A11

SA_DQ_59

E11

SA_DQ_60

D11

SA_DQ_61

B12

SA_DQ_62

A12

SA_DQ_63

AM3

SM_VREF

F16

SA_DIMM_VREFDQ

F13

SB_DIMM_VREFDQ

I

NTEL_HASWELL_HASWELL

3 OF 9

4

Haswell rPGA EDS

JCPU1C

CONN@

SA_CK_N_0 SA_CK_P_0

SA_CKE_0 SA_CK_N_1 SA_CK_P_1

SA_CKE_1 SA_CK_N_2 SA_CK_P_2

SA_CKE_2 SA_CK_N_3 SA_CK_P_3

SA_CKE_3

SA_CS_N_0 SA_CS_N_1 SA_CS_N_2 SA_CS_N_3

SA_ODT_0

SA_ODT_1

SA_ODT_2

SA_ODT_3

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS

SA_WE

SA_CAS

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14 SA_MA_15

SA_DQS_N_0 SA_DQS_N_1 SA_DQS_N_2 SA_DQS_N_3 SA_DQS_N_4 SA_DQS_N_5 SA_DQS_N_6 SA_DQS_N_7 SA_DQS_P_0 SA_DQS_P_1 SA_DQS_P_2 SA_DQS_P_3 SA_DQS_P_4 SA_DQS_P_5 SA_DQS_P_6 SA_DQS_P_7

RSVD

VSS

AC7 U4

M_CLK_A_DDR#0

V4

M_CLK_A_DDR0

AD9

DDR_CKE0_DIMMA

U3

M_CLK_A_DDR#1

V3

M_CLK_A_DDR1

AC9

DDR_CKE1_DIMMA

U2

M_CLK_A_DDR#2

V2

M_CLK_A_DDR2

AD8

DDR_CKE2_DIMMA

U1

M_CLK_A_DDR#3

V1

M_CLK_A_DDR3

AC8

DDR_CKE3_DIMMA

M7

DDR_CS0_DIMMA#

L9

DDR_CS1_DIMMA#

M9

DDR_CS2_DIMMA#

M10

DDR_CS3_DIMMA#

M8

M_A_ODT0

L7

M_A_ODT1

L8

M_A_ODT2

L10

M_A_ODT3

V5

DDR_A_BS0

U5

DDR_A_BS1

AD1

DDR_A_BS2

V10 U6

DDR_A_RAS#

U7

DDR_A_WE#

U8

DDR_A_CAS#

V8

DDR_A_MA0

AC6

DDR_A_MA1

V9

DDR_A_MA2

U9

DDR_A_MA3

AC5

DDR_A_MA4

AC4

DDR_A_MA5

AD6

DDR_A_MA6

AC3

DDR_A_MA7

AD5

DDR_A_MA8

AC2

DDR_A_MA9

V6

DDR_A_MA10

AC1

DDR_A_MA11

AD4

DDR_A_MA12

V7

DDR_A_MA13

AD3

DDR_A_MA14

AD2

DDR_A_MA15

AP15

DDR_A_DQS#0

AP8

DDR_A_DQS#1

AJ8

DDR_A_DQS#2

AF3

DDR_A_DQS#3

J3

DDR_A_DQS#4

E2

DDR_A_DQS#5

C5

DDR_A_DQS#6

C11

DDR_A_DQS#7

AP14

DDR_A_DQS0

AP9

DDR_A_DQS1

AK8

DDR_A_DQS2

AG3

DDR_A_DQS3

H3

DDR_A_DQS4

E3

DDR_A_DQS5

C6

DDR_A_DQS6

C12

DDR_A_DQS7

M_CLK_A_DDR#0 <11> M_CLK_A_DDR0 <11> DDR_CKE0_DIMMA <11> M_CLK_A_DDR#1 <11> M_CLK_A_DDR1 <11> DDR_CKE1_DIMMA <11> M_CLK_A_DDR#2 <11> M_CLK_A_DDR2 <11> DDR_CKE2_DIMMA <11> M_CLK_A_DDR#3 <11> M_CLK_A_DDR3 <11> DDR_CKE3_DIMMA <11>

DDR_CS0_DIMMA# <11> DDR_CS1_DIMMA# <11> DDR_CS2_DIMMA# <11> DDR_CS3_DIMMA# <11>

M_A_ODT0 <11> M_A_ODT1 <11> M_A_ODT2 <11>

M_A_ODT3 <11> DDR_A_BS0 <11> DDR_A_BS1 <11> DDR_A_BS2 <11>

DDR_A_RAS# <11> DDR_A_WE# <11> DDR_A_CAS# <11>

DDR_A_MA[0..15] <11>

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

3

DDR_B_D[0..63]<12>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AR18

SB_DQ_0

AT18

SB_DQ_1

AM17

SB_DQ_2

AM18

SB_DQ_3

AR17

SB_DQ_4

AT17

SB_DQ_5

AN17

SB_DQ_6

AN18

SB_DQ_7

AT12

SB_DQ_8

AR12

SB_DQ_9

AN12

SB_DQ_10

AM11

SB_DQ_11

AT11

SB_DQ_12

AR11

SB_DQ_13

AM12

SB_DQ_14

AN11

SB_DQ_15

AR5

SB_DQ_16

AR6

SB_DQ_17

AM5

SB_DQ_18

AM6

SB_DQ_19

AT5

SB_DQ_20

AT6

SB_DQ_21

AN5

SB_DQ_22

AN6

SB_DQ_23

AJ4

SB_DQ_24

AK4

SB_DQ_25

AJ1

SB_DQ_26

AJ2

SB_DQ_27

AM1

SB_DQ_28

AN1

SB_DQ_29

AK2

SB_DQ_30

AK1

SB_DQ_31

L2

SB_DQ_32

M2

SB_DQ_33

L4

SB_DQ_34

M4

SB_DQ_35

L1

SB_DQ_36

M1

SB_DQ_37

L5

SB_DQ_38

M5

SB_DQ_39

G7

SB_DQ_40

J8

SB_DQ_41

G8

SB_DQ_42

G9

SB_DQ_43

J7

SB_DQ_44

J9

SB_DQ_45

G10

SB_DQ_46

J10

SB_DQ_47

A8

SB_DQ_48

B8

SB_DQ_49

A9

SB_DQ_50

B9

SB_DQ_51

D8

SB_DQ_52

E8

SB_DQ_53

D9

SB_DQ_54

E9

SB_DQ_55

E15

SB_DQ_56

D15

SB_DQ_57

A15

SB_DQ_58

B15

SB_DQ_59

E14

SB_DQ_60

D14

SB_DQ_61

A14

SB_DQ_62

B14

SB_DQ_63

I

NTEL_HASWELL_HASWELL

JCPU1D

4 OF 9

CONN@

2

Haswell rPGA EDS

RSVD

SB_CKN0

SB_CK0

SB_CKE_0

SB_CKN1

SB_CK1

SB_CKE_1

SB_CKN2

SB_CK2

SB_CKE_2

SB_CKN3

SB_CK3

SB_CKE_3

SB_CS_N_0 SB_CS_N_1 SB_CS_N_2 SB_CS_N_3

SB_ODT_0 SB_ODT_1 SB_ODT_2 SB_ODT_3

SB_BS_0 SB_BS_1 SB_BS_2

SB_RAS

SB_WE

SB_CAS

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14 SB_MA_15

SB_DQS_N_0 SB_DQS_N_1 SB_DQS_N_2 SB_DQS_N_3 SB_DQS_N_4 SB_DQS_N_5 SB_DQS_N_6 SB_DQS_N_7 SB_DQS_P_0 SB_DQS_P_1 SB_DQS_P_2 SB_DQS_P_3 SB_DQS_P_4 SB_DQS_P_5 SB_DQS_P_6 SB_DQS_P_7

VSS

AG8 Y4

M_CLK_B_DDR#0

AA4

M_CLK_B_DDR0

AF10

DDR_CKE0_DIMMB

Y3

M_CLK_B_DDR#1

AA3

M_CLK_B_DDR1

AG10

DDR_CKE1_DIMMB

Y2

M_CLK_B_DDR#2

AA2

M_CLK_B_DDR2

AG9

DDR_CKE2_DIMMB

Y1

M_CLK_B_DDR#3

AA1

M_CLK_B_DDR3

AF9

DDR_CKE3_DIMMB

P4

DDR_CS0_DIMMB#

R2

DDR_CS1_DIMMB#

P3

DDR_CS2_DIMMB#

P1

DDR_CS3_DIMMB#

R4

M_B_ODT0

R3

M_B_ODT1

R1

M_B_ODT2

P2

M_B_ODT3

R7

DDR_B_BS0

P8

DDR_B_BS1

AA9

DDR_B_BS2

R10 R6

DDR_B_RAS#

P6

DDR_B_WE#

P7

DDR_B_CAS#

R8

DDR_B_MA0

Y5

DDR_B_MA1

Y10

DDR_B_MA2

AA5

DDR_B_MA3

Y7

DDR_B_MA4

AA6

DDR_B_MA5

Y6

DDR_B_MA6

AA7

DDR_B_MA7

Y8

DDR_B_MA8

AA10

DDR_B_MA9

R9

DDR_B_MA10

Y9

DDR_B_MA11

AF7

DDR_B_MA12

P9

DDR_B_MA13

AA8

DDR_B_MA14

AG7

DDR_B_MA15

AP18

DDR_B_DQS#0

AP11

DDR_B_DQS#1

AP5

DDR_B_DQS#2

AJ3

DDR_B_DQS#3

L3

DDR_B_DQS#4

H9

DDR_B_DQS#5

C8

DDR_B_DQS#6

C14

DDR_B_DQS#7

AP17

DDR_B_DQS0

AP12

DDR_B_DQS1

AP6

DDR_B_DQS2

AK3

DDR_B_DQS3

M3

DDR_B_DQS4

H8

DDR_B_DQS5

C9

DDR_B_DQS6

C15

DDR_B_DQS7

T3 PAD~D@T3 PA D~D@

M_CLK_B_DDR#0 <12> M_CLK_B_DDR0 <12> DDR_CKE0_DIMMB <12> M_CLK_B_DDR#1 <12> M_CLK_B_DDR1 <12> DDR_CKE1_DIMMB <12> M_CLK_B_DDR#2 <12> M_CLK_B_DDR2 <12> DDR_CKE2_DIMMB <12> M_CLK_B_DDR#3 <12> M_CLK_B_DDR3 <12> DDR_CKE3_DIMMB <12>

DDR_CS0_DIMMB# <12> DDR_CS1_DIMMB# <12> DDR_CS2_DIMMB# <12> DDR_CS3_DIMMB# <12>

M_B_ODT0 <12> M_B_ODT1 <12> M_B_ODT2 <12>

M_B_ODT3 <12> DDR_B_BS0 <12> DDR_B_BS1 <12> DDR_B_BS2 <12>

DDR_B_RAS# <12> DDR_B_WE# <12> DDR_B_CAS# <12>

1

DDR_B_MA[0..15] <12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

+SM_VREF_CA +DIMM23_VREF_DQ+DIMM01_VREF_DQ

0.1U_0402_16V4Z

1

CC84

2

Layout Notes

A A

5

L

Place CC84,CC85,CC86 close to JCPU1

0.1U_0402_16V4Z

1

CC85

2

0.1U_0402_16V4Z

1

CC86

2

20120802 HP's request

4

20120710 Change by HP request

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DDRIII

LA-9371P

6 53Friday, September 28, 2012

1

0.2

5

D D

4

3

2

1

COMPENSATION PU FOR eDP

+VCCIOA_OUT

EDP_COMP

CAD Note:Trace width=20 mils ,Spacing=25mil,

Haswell rPGA EDS

T28

DDIB_TXBN_0

U28

DDIB_TXBP_0

T30

C C

DDIB_TXBN_1

U30

DDIB_TXBP_1

U29

DDIB_TXBN_2

V29

DDIB_TXBP_2

U31

DDIB_TXBN_3

V31

DDIB_TXBP_3

T34

DDIC_TXCN_0

U34

DDIC_TXCP_0

U35

DDIC_TXCN_1

V35

DDIC_TXCP_1

U32

DDIC_TXCN_2

T32

DDIC_TXCP_2

U33

DDIC_TXCN_3

V33

DDIC_TXCP_3

P29

DDID_TXDN_0

R29

DDID_TXDP_0

N28

DDID_TXDN_1

P28

DDID_TXDP_1

P31

DDID_TXDN_2

R31

DDID_TXDP_2

N30

DDID_TXDN_3

P30

DDID_TXDP_3

INTEL_HASWELL_HAS WELL

eDP

CONN@

EDP_AUXN EDP_AUXP

EDP_HPD

EDP_RCOMP

EDP_DISP_UT IL

EDP_TXN_0 EDP_TXP_0 EDP_TXN_1 EDP_TXP_1

FDI_TXN_0 FDI_TXP_0 FDI_TXN_1 FDI_TXP_1

DDI

8 OF 9

JCPU1H

M27

EDP_CPU_C_AUX#

N27

EDP_CPU_C_AUX

P27

EDP_HPD

E24

EDP_COMP

R27

P35

EDP_CPU_C_LANE_N0

R35

EDP_CPU_C_LANE_P0

N34

EDP_CPU_C_LANE_N1

P34

EDP_CPU_C_LANE_P1

P33 R33 N32 P32

C126 0.1U_0402_25V6C126 0.1U_0402_25V6 C127 0.1U_0402_25V6C127 0.1U_0402_25V6

T119 PAD@T119 PAD@

C128 0.1U_0402_25V6C128 0.1U_0402_25V6 C129 0.1U_0402_25V6C129 0.1U_0402_25V6 C130 0.1U_0402_25V6C130 0.1U_0402_25V6 C131 0.1U_0402_25V6C131 0.1U_0402_25V6

1 2 1 2

1 2 1 2 1 2 1 2

Max length=100 mils.

FDI_CTX_PRX_N0 FDI_CTX_PRX_P0 FDI_CTX_PRX_N1 FDI_CTX_PRX_P1

+VCCIO_OUT

HPD INVERSION FOR EDP

B B

CPU_EDP_HPD#<36>

2

G

100K_0402_5%

12

RC79

12

RC7724.9_0402_1% RC7724.9_0402_1%

EDP_CPU_AUX# <36> EDP_CPU_AUX <36>

EDP_CPU_LANE_N0 <36> EDP_CPU_LANE_P0 <36> EDP_CPU_LANE_N1 <36> EDP_CPU_LANE_P1 <36> FDI_CTX_PRX_N0 <14> FDI_CTX_PRX_P0 <14> FDI_CTX_PRX_N1 <14> FDI_CTX_PRX_P1 <14>

12

RC78

RC78 10K_0402_5%

10K_0402_5%

20120807 Change RC78 to 10K as HP's request

EDP_HPD

13

D

QH1

QH1 BSS138W-7-F_SOT323-3

BSS138W-7-F_SOT323-3

S

SB000002X00

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

CPU-FDI,eDP,DDI

LA-9371P

1

7 53Friday, September 28, 2012

0.2

of

5

4

3

2

1

CFG STRAPS for CPU

CFG2

D D

PEG Static Lane Reversal - CFG2 is for the 16x

1:(Default) Normal Operation; Lane #

CFG2

definition matches socket pin map definition 0:Lane Reversed

Haswell rPGA EDS

JCPU1I

AT1

RSVD_TP

AT2

RSVD_TP

AD10

RSVD

A34

RSVD_TP

A35

RSVD_TP

T15 PAD~D@T15 PAD ~D@ T12 PAD~D@T12 PAD ~D@

T16 PAD~D@T16 PAD ~D@

C C

12

B B

RC84 49.9_0402_1%RC84 49.9_0402_1%

RC85 49.9_0402_1%RC85 49.9_0402_1%

RC86 49.9_0402_1%RC86 49.9_0402_1%

H_CPU_TESTLO

12

CFG_RCOMP

12

H_CPU_RSVD

T17 PAD~D@T17 PAD~D@

T26 PAD~D@T26 PAD ~D@ T28 PAD~D@T28 PAD ~D@

CFG0<5> CFG1<5> CFG2<5> CFG3<5> CFG4<5> CFG5<5> CFG6<5> CFG7<5> CFG8<5> CFG9<5> CFG10<5> CFG11<5> CFG12<5> CFG13<5> CFG14<5> CFG15<5>

+VCC_CORE

H_CPU_RSVD

H_CPU_TESTLO

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

W29

RSVD_TP

W28

RSVD_TP

G26

TESTLO_G26

W33

RSVD

AL30

RSVD

AL29

RSVD

F25

VCC

C35

RSVD_TP

B35

RSVD_TP

AL25

RSVD_TP

W30

RSVD_TP

W31

RSVD_TP

W34

TESTLO

AT20

CFG_0

AR20

CFG_1

AP20

CFG_2

AP22

CFG_3

AT22

CFG_4

AN22

CFG_5

AT25

CFG_6

AN23

CFG_7

AR24

CFG_8

AT23

CFG_9

AN20

CFG_10

AP24

CFG_11

AP26

CFG_12

AN25

CFG_13

AN26

CFG_14

AP25

CFG_15

INTEL_HASWELL_HAS WELL

CONN@

CFG_RCOMP

9 OF 9

RSVD_TP RSVD_TP RSVD_TP RSVD_TP

CFG_16 CFG_18 CFG_17 CFG_19

RSVD

FC_G6

RSVD RSVD RSVD RSVD RSVD

RSVD

RSVD RSVD

RSVD

RSVD_TP

RSVD_TP RSVD_TP

RSVD RSVD

VSS VSS

C23 B23 D24 D23

AT31

CFG_RCOMP

AR21

CFG16

AR23

CFG18

AP21

CFG17

AP23

CFG19

AR33 G6 AM27 AM26 F5 AM2 K6

E18

U10 P10

B1

NC

A2 AR1

E21 E20

AP27 AR26

AL31 AL32

CFG16 < 5> CFG18 < 5> CFG17 < 5> CFG19 < 5>

20120710 Delete RC106/RC107

CFG4

1 : Disabled; No Physical Display Port attached to Embedded Display Port 0 : Enabled; An external Display Port device is connected to the Embedded Display Port

11: (Default) x16 - Device 1 functions 1 and 2 disabled 10: x8, x8 - Device 1 function 1 enabled ; function 2

CFG[6:5]

disabled 01: Reserved - (Device 1 function 1 disabled ; function

2 enabled)

CFG4

Display Port Presence Strap

CFG6

CFG5

PCIE Port Bifurcation Straps

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

CFG9

1K_0402_1%

12

@RC106

@

RC106

CFG7

1K_0402_1%

12

RC80

1K_0402_1%

12

RC81

1K_0402_1%

12

@RC83

@RC82

@

RC82

@

RC83

1K_0402_1%

12

@RC87

@

RC87

2012/09/21 For a Intel Sighting

PEG DEFER TRAINING

1: (Default) PEG Train immediately

CFG7

following xxRESETB de assertion 0: PEG Wait for BIOS for training

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CPU-RSVD,CFG

LA-9371P

1

8 53Friday, September 28, 2012

0.2

5

+1.35VS Source

4

3

2

1

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC VCC VCC VCC

VCC VCC

AA26 AA28 AA34 AA30 AA32 AB26 AB29 AB25 AB27 AB28 AB30 AB31 AB33 AB34 AB32 AC26 AB35 AC28 AD25 AC30 AD28 AC32 AD31 AC34 AD34 AD26 AD27 AD29 AD30 AD32 AD33 AD35 AE26 AE32 AE28 AE30 AG28 AG34 AE34 AF25 AF26 AF27 AF28 AF29 AF30 AF31 AF32 AF33 AF34 AF35 AG26 AH26 AH29 AG30 AG32 AH32 AH35 AH25 AH27 AH28 AH30 AH31 AH33 AH34 AJ25 AJ26 AJ27 AJ28 AJ29 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35 G25 H25 J25 K25 L25 M25 N25 P25 R25 T25

U25 U26 V25 V26

W26 W27

+VCC_CORE

B+

4/20 change by HP requirement

D D

C C

SVID ALERT

KBC_DS3_EN<25,29,30,44,5>

SLP_S3#<14,30,31,34,39,44>

RC90 4.7K_0402_5%RC90 4.7K_0402_5%

1 2

20120911 Delete RC93 as HP's request

20K_0402_5%

5

CAD Note: Place the PU resistors close to CPU RC60 close to CPU 300 - 1500mils

12

R461

RUN_ON_CPU1.5VS3#

34

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6 QC5B

QC5B

SVID DATA

CAD Note: Place the PU resistors close to CPU RC63 close to CPU 300 - 1500mils

+VCC_CORE

100_0402_1%

B B

VCC_SENSE

VCCSENSE<46>

VSSSENSE<10,46>

100_0402_1%

12

RC101

CAD Note: RC102 SHOULD BE PLACED CLOSE TO CPU

VCCSENSE

20120911 Delete RC102, RC103 as HP's request

100_0402_1%

12

CAD Note: RC103 SHOULD BE PLACED CLOSE TO CPU

RC104

VSSSENSE

B+ +1.35VS

12

RC88

@

RC88 100K_0402_5%

100K_0402_5%

RUN_ON_CPU1.5VS3

61

DMN66D0LDW-7_SOT363-6

2

QC5A

RUN_ON_CPU1.5VS3# <5>

+1.35V

SI7326DN-T1-GE3_PAK1212-8-5

5

RC92

330K_0402_5%

QC4

12

1 2 3

12

4

1

CC39

2

0.1U_0402_25V6

RUN_ON_CPU1.5VS3 <11,12>

R6

@

20K_0402_5%

D

S

RESISTOR STUFFING OPTIONS ARE PROVIDED FOR TESTING PURPOSES

+1.35VS

RC89

RC89 470_0603_5%

470_0603_5%

1 2

13

10U_0603_6.3V6M

1

2

G

Q2

Q2 2N7002K_SOT23-3

2N7002K_SOT23-3

CC42

2

RUN_ON_CPU1.5VS3#

20120725 HP's request

VDDQ DECOUPLING

10U_0603_6.3V6M

1

CC43

CC44

2

Haswell rPGA EDS

CONN@

JCPU1E

K27

RSVD

L27

RSVD

T27

RSVD

V27

+1.35VS

CC38 0.1U_0402_10V6KCC38 0.1U_0402_10V6K

12

CC40 0.1U_0402_10V6KCC40 0.1U_0402_10V6K

12

+VCC_CORE

VCCSENSE

+VCCIO_OUT

T54

@ T54

@

PAD~D

+VCCIOA_OUT

VR_SVID_ALRT#<46> VR_SVID_CLK<46>

+1.05VS

12

RC98

RC98 150_0402_1%

150_0402_1%

CPU_PWR_DEBUG

10U_0603_6.3V6M

1

2

10U_0603_6.3V6M

1

CC45

CC46

2

10U_0603_6.3V6M

1

CC47

CC48

CC49

2

VR_SVID_DAT<46>

CPU_PWR_DEBUG<5>

T50 PAD~D@T50 PAD~D@ T51 PAD~D@T51 PAD~D@ T52 PAD~D@T52 PAD~D@ T53 PAD~D@T53 PAD~D@

10U_0603_6.3V6M

1

2

330U_D2_2V_Y

1

+

CC41

CC51

CC50

2

VR_SVID_ALRT# VR_SVID_CLK VR_SVID_DAT

+VCC_CORE

330U_D2_2V_Y

1

+

CC87

2

@

20120806 Add CC87 as Intel's reply

RSVD

AB11

VDDQ

AB2

VDDQ

AB5

VDDQ

AB8

VDDQ

AE11

VDDQ

AE2

VDDQ

AE5

VDDQ

AE8

VDDQ

AH11

VDDQ

K11

VDDQ

N11

VDDQ

N8

VDDQ

T11

VDDQ

T2

VDDQ

T5

VDDQ

T8

VDDQ

W11

VDDQ

W2

VDDQ

W5

VDDQ

W8

VDDQ

N26

RSVD

K26

VCC

AL27

RSVD

AK27

RSVD

AL35

VCC_SENSE

E17

RSVD

AN35

VCCIO_OUT

A23

RSVD

F22

VCOMP_OUT

W32

RSVD

AL16

RSVD

J27

RSVD

AL13

RSVD

AM28

VIDALERT

AM29

VIDSCLK

AL28

VIDSOUT

AP35

VSS

H27

PWR_DEBUG

AP34

VSS

AT35

RSVD_TP

AR35

RSVD_TP

AR32

RSVD_TP

AL26

RSVD_TP

AT34

VSS

AL22

VSS

AT33

VSS

AM21

VSS

AM25

VSS

AM22

VSS

AM20

VSS

AM24

VSS

AL19

VSS

AM23

VSS

AT32

VSS

Y25

VCC

Y26

VCC

Y27

VCC

Y28

VCC

Y29

VCC

Y30

VCC

Y31

VCC

Y32

VCC

Y33

VCC

Y34

VCC

Y35

VCC

I

NTEL_HASWELL_HASWELL

5 OF 9

22U_0805_6.3V6M

CH2

CH1

1

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

22U_0805_6.3V6M

CH3

CH4

1

2

22U_0805_6.3V6M

CH5

CH6

1

2

2012/06/11 2013/06/11

22U_0805_6.3V6M

CH8

CH7

1

2

Compal Secret Data

22U_0805_6.3V6M

CH10

CH9

1

2

Deciphered Date

22U_0805_6.3V6M

CH11

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CPU- PWR

LA-9371P

1

9 53Friday, September 28, 2012

0.2

of

5

4

3

2

1

D D

C C

B B

Haswell rPGA EDS

A10

VSS

A13

VSS

A16

VSS

A19

VSS

A22

VSS

A25

VSS

A27

VSS

A29

VSS

A3

VSS

A31

VSS

A33

VSS

A4

VSS

A7

VSS

AA11

VSS

AA25

VSS

AA27

VSS

AA31

VSS

AA29

VSS

AB1

VSS

AB10

VSS

AA33

VSS

AA35

VSS

AB3

VSS

AC25

VSS

AC27

VSS

AB4

VSS

AB6

VSS

AB7

VSS

AB9

VSS

AC11

VSS

AD11

VSS

AC29

VSS

AC31

VSS

AC33

VSS

AC35

VSS

AD7

VSS

AE1

VSS

AE10

VSS

AE25

VSS

AE29

VSS

AE3

VSS

AE27

VSS

AE35

VSS

AE4

VSS

AE6

VSS

AE7

VSS

AE9

VSS

AF11

VSS

AF6

VSS

AF8

VSS

AG11

VSS

AG25

VSS

AE31

VSS

AG31

VSS

AE33

VSS

AG6

VSS

AH1

VSS

AH10

VSS

AH2

VSS

AG27

VSS

AG29

VSS

AH3

VSS

AG33

VSS

AG35

VSS

AH4

VSS

AH5

VSS

AH6

VSS

AH7

VSS

AH8

VSS

AH9

VSS

AJ11

VSS

AJ5

VSS

AK11

VSS

AK25

VSS

AK26

VSS

AK28

VSS

AK29

VSS

AK30

VSS

AK32

VSS

E19

VSS

NTEL_HASWELL_HA SWELL

I

JCPU1F

6 OF 9

CONN@

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AK34 AK5 AL1 AL10 AL11 AL12 AL14 AL15 AL17 AL18 AL2 AL20 AL21 AL23 E22 AL3 AL4 AL5 AL6 AL7 AL8 AL9 AM10 AM13 AM16 AM19 E25 AM32 AM4 AM7 AN10 AN13 AN16 AN19 AN2 AN21 AN24 AN27 AN30 AN34 AN4 AN7 AP1 AP10 AP13 AP16 AP19 AP4 AP7 W25 AR10 AR13 AR16 AR19 AR2 AR22 AR25 AR28 AR31 AR34 AR4 AR7 AT10 AT13 AT16 AT19 AT21 AT24 AT27 AT3 AT30 AT4 AT7 B10 B13 B16 B19 B2 B22

Haswell rPGA EDS

B34

VSS

B4

VSS

B7

VSS

C1

VSS

C10

VSS

C13

VSS

C16

VSS

C19

VSS

C2

VSS

C22

VSS

C24

VSS

C26

VSS

C28

VSS

C30

VSS

C32

VSS

C34

VSS

C4

VSS

C7

VSS

D10

VSS

D13

VSS

D16

VSS

D19

VSS

D22

VSS

D25

VSS

D27

VSS

D29

VSS

D31

VSS

D33

VSS

D35

VSS

D4

VSS

D7

VSS

E1

VSS

E10

VSS

E13

VSS

E16

VSS

E4

VSS

E7

VSS

F10

VSS

F11

VSS

F12

VSS

F14

VSS

F15

VSS

F17

VSS

F18

VSS

F20

VSS

F21

VSS

F23

VSS

F24

VSS

F26

VSS

F28

VSS

F30

VSS

F32

VSS

F34

VSS

F4

VSS

F6

VSS

F7

VSS

F8

VSS

F9

VSS

G1

VSS

G11

VSS

G2

VSS

G27

VSS

G29

VSS

G3

VSS

G31

VSS

G33

VSS

G35

VSS

G4

VSS

G5

VSS

H10

VSS

H26

VSS

H6

VSS

H7

VSS

J11

VSS

J26

VSS

J28

VSS

J30

VSS

J32

VSS

J34

VSS

J6

VSS

K1

VSS

NTEL_HASWELL_HA SWELL

I

JCPU1G

7 OF 9

CONN@

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS_SENSE

RSVD

K10 K2 K29 K3 K31 K33 K35 K4 K5 K7 K8 K9 L11 L26 L6 M11 M26 M28 M30 M32 M34 M6 N1 N10 N2 N29 N3 N31 N33 N35 N4 N5 N6 N7 N9 P11 P26 P5 R11 R26 R28 R30 R32 R34 R5 T1 T10 T29 T3 T31 T33 T35 T4 T6 T7 T9 U11 U27 V11 V28 V30 V32 V34 W1 W10 W3 W35 W4 W6 W7 W9 Y11 H11 AL24 F19 T26 AK35 AK33

VSSSENSE <46,9>

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CPU-VSS

LA-9371P

1

10 53Friday, September 28, 2012

0.2

5

Populate RD1, De-Populate RD7 for Intel DDR3 VREFDQ multiple methods M1 Populate RD7, De-Populate RD1 for Intel DDR3

10U_0603_6.3V6M

CD14

1U_0402_6.3V6K

CD24

S

1

2

G

2

10U_0603_6.3V6M

@

13

D

+1.35V

1

CD15

+

2

SGA000 04400

VREFDQ multiple methods M3

QD1

QD1 2N7002K W_SOT 323-3

2N7002K W_SOT 323-3

1 2

RD24 1K_040 2_1%RD24 1K_040 2_1%

All VREF traces should have 10 mil trace width

CD16

CD16 330U_B2 _2.5VM_R 15M

330U_B2 _2.5VM_R 15M

+DIMM_A_D Q

2.2U_0402_6.3V6M

0.1U_0402_16V4Z

1K_0402_1%

1

12

CD3

CD4

RD23

2

DDR_CK E0_DIMMA<6>

DDR_A_ BS2<6>

M_CLK_A _DDR0<6> M_CLK_A _DDR#0<6>

DDR_A_ BS0<6>

DDR_A_ WE#<6> DDR_A_ CAS#<6>

DDR_CS 1_DIMMA#<6>

+3VS

0.1U_0402_16V4Z

2.2U_0402_6.3V6M

1

+0.675VS

CD28

1

CD27

2

RUN_ON_CPU1 .5VS3< 12,9>

+1.35V

1U_0402_6.3V6K

1

CD5

2

+1.35V

10U_0603_6.3V6M

CD10

CD9

1

2

Layout Note: Place near JDIMM1.203,204

+0.675VS

1U_0402_6.3V6K

1

2

+DIMM01_V REF_D Q

Layout Note: Place near JDIMM1

1U_0402_6.3V6K

1

CD7

CD6

2

10U_0603_6.3V6M

CD11

1

2

1U_0402_6.3V6K

1

CD22

CD21

2

1U_0402_6.3V6K

1

CD8

2

10U_0603_6.3V6M

CD13

CD12

1

2

1U_0402_6.3V6K

1

CD23

2

D D

DDR_A_ D[0..63]<6>

DDR_A_ DQS[0..7]<6>

DDR_A_ DQS#[0..7 ]<6>

DDR_A_ MA[0..15]<6>

C C

B B

A A

4

JDIMM1 H=5.2 mm TOP

+1.35V +1.35V

JDIMM1

1 3

DDR_A_ D0 DDR_A_ D1

DDR_A_ D2 DDR_A_ D3

DDR_A_ D8 DDR_A_ D9 DDR_A_ D13

DDR_A_ DQS#1 DDR_A_ DQS1

DDR_A_ D10 DDR_A_ D11

DDR_A_ D17

DDR_A_ DQS#2 DDR_A_ DQS2

DDR_A_ D18 DDR_A_ D19

DDR_A_ D24 DDR_A_ D25

DDR_A_ D26 DDR_A_ D27

DDR_CK E0_DIMMA

DDR_A_ BS2

DDR_A_ MA12 DDR_A_ MA9

DDR_A_ MA8 DDR_A_ MA5

DDR_A_ MA3 DDR_A_ MA1

M_CLK_A _DDR0 M_CLK_A _DDR#0

DDR_A_ MA10 DDR_A_ BS0

DDR_A_ WE# DDR_A_ CAS#

DDR_A_ MA13 DDR_CS 1_DIMMA#

DDR_A_ D32 DDR_A_ D33

DDR_A_ DQS#4 DDR_A_ DQS4

DDR_A_ D34 DDR_A_ D35

DDR_A_ D40 DDR_A_ D41

DDR_A_ D42 DDR_A_ D43

DDR_A_ D48 DDR_A_ D49

DDR_A_ DQS#6 DDR_A_ DQS6

DDR_A_ D50 DDR_A_ D51

DDR_A_ D56 DDR_A_ D57

DDR_A_ D58 DDR_A_ D59

5 7 9

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71

73 75 77 79 81 83 85 87 89 91 93 95 97

99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205 207

VREF_DQ VSS DQ0 DQ1 VSS DM0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1

RESET# VSS DQ10 DQ11 VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 VSS DQ26 DQ27 VSS

CKE0 VDD NC BA2 VDD A12/BC# A9 VDD A8 A5 VDD A3 A1 VDD CK0 CK0# VDD A10/AP BA0 VDD WE# CAS# VDD A13 S1# VDD TEST

VREF_CA VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0

EVENT# VDDSPD SA1 VTT

GND1 BOSS1

LCN_DAN0 6-K4406 -0103

CONN@

BOSS2

2

VSS

4

DDR_A_ D4

DQ4

6

DDR_A_ D5

DQ5

8

VSS

10

DDR_A_ DQS#0

DQS0#

12

DDR_A_ DQS0

DQS0

14

VSS

16

DDR_A_ D6

DQ6

18

DDR_A_ D7

DQ7

20

VSS

22

DDR_A_ D12

DQ12

24

DQ13

26

VSS

28

DM1

30

DDR3_D RAMRST# _R

32

VSS

34

DDR_A_ D14

DQ14

36

DDR_A_ D15

DQ15

38

VSS

40

DDR_A_ D20DDR_A_ D16

DQ20

42

DDR_A_ D21

DQ21

44

VSS

46

DM2

48

VSS

50

DDR_A_ D22

DQ22

52

DDR_A_ D23

DQ23

54

VSS

56

DDR_A_ D28

DQ28

58

DDR_A_ D29

DQ29

60

VSS

62

DDR_A_ DQS#3

DQS3#

64

DDR_A_ DQS3

DQS3

66

VSS

68

DDR_A_ D30

DQ30

70

DDR_A_ D31

DQ31

72

VSS

74

DDR_CK E1_DIMMA

CKE1

76

VDD

78

DDR_A_ MA15

A15

80

DDR_A_ MA14

A14

82

VDD

84

DDR_A_ MA11

A11

86

DDR_A_ MA7

A7

88

VDD

90

DDR_A_ MA6

A6

92

DDR_A_ MA4

A4

94

VDD

96

DDR_A_ MA2

A2

98

DDR_A_ MA0

A0

100

VDD

102

M_CLK_A _DDR1

CK1

104

M_CLK_A _DDR#1

CK1#

106

VDD

108

DDR_A_ BS1

BA1

110

DDR_A_ RAS#

RAS#

112

VDD

114

DDR_CS 0_DIMMA#

S0#

116

M_A_ODT 0

ODT0

118

VDD

120

M_A_ODT 1

ODT1

122

NC

124

VDD

126 128

VSS

130

DDR_A_ D36

DQ36

132

DDR_A_ D37

DQ37

134

VSS

136

DM4

138

VSS

140

DDR_A_ D38

DQ38

142

DDR_A_ D39

DQ39

144

VSS

146

DDR_A_ D44

DQ44

148

DDR_A_ D45

DQ45

150

VSS

152

DDR_A_ DQS#5

DQS5#

154

DDR_A_ DQS5

DQS5

156

VSS

158

DDR_A_ D46

DQ46

160

DDR_A_ D47

DQ47

162

VSS

164

DDR_A_ D52

DQ52

166

DDR_A_ D53

DQ53

168

VSS

170

DM6

172

VSS

174

DDR_A_ D54

DQ54

176

DDR_A_ D55

DQ55

178

VSS

180

DDR_A_ D60

DQ60

182

DDR_A_ D61

DQ61

184

VSS

186

DDR_A_ DQS#7

DQS7#

188

DDR_A_ DQS7

DQS7

190

VSS

192

DDR_A_ D62

DQ62

194

DDR_A_ D63

DQ63

196

VSS

198 200

SDA

202

SCL

204

VTT

206

GND2

208

+0.675VS

DDR3_D RAMRST# _R<12>

DDR_CK E1_DIMMA <6>

M_CLK_A _DDR1 <6> M_CLK_A _DDR#1 <6>

DDR_A_ BS1 <6> DDR_A_ RAS# <6>

DDR_CS 0_DIMMA# <6> M_A_ODT 0 <6>

+DIMM_VRE F_CA

M_A_ODT 1 <6>

0.1U_0402_16V4Z

2.2U_0402_6.3V6M

1K_0402_1%

12

CD19

1

RD25

2

DDR_XD P_WAN_ SMBDAT <1 2,13,16,2 8,38,5> DDR_XD P_WAN_ SMBCLK <12,13,16,28 ,38,5>

RD26 1K_0402_1%RD2 6 1K_040 2_1%

CD20

1 2

1 3

D

2

3

RD6 33_04 02_5%RD6 33_ 0402_5 %

S

QD2

G

2N7002K W_SOT 323-3

RUN_ON_CPU1 .5VS3

1 2

+1.35V

+SM_VREF _CA

+1.35V

1K_0402_5%

12

RD2

CPU_DRA M_RST# <5>

20120802 Change RD6 to 33Ohm as HP's request

All VREF traces should have 10 mil trace width

+3VS

0.1U_0402_16V4Z

1

CD25

2

1

JDIMM3 H=4.0mm BOT

+DIMM_A_D Q

0.1U_0402_16V4Z

2.2U_0402_6.3V6M

1

CD1

2

DDR_CK E2_DIMMA<6>

M_CLK_A _DDR2<6> M_CLK_A _DDR#2<6>

DDR_CS 3_DIMMA#<6>

2.2U_0402_6.3V6M

1

CD26

2

+1.35V +1.35V

JDIMM3

VREF_DQ1VSS1

DDR_A_ D0 DDR_A_ D1

CD2

DDR_A_ D2 DDR_A_ D3

DDR_A_ D8 DDR_A_ D9 DDR_A_ D13

DDR_A_ DQS#1 DDR_A_ DQS1

DDR_A_ D10 DDR_A_ D11

DDR_A_ D17

DDR_A_ DQS#2 DDR_A_ DQS2

DDR_A_ D18 DDR_A_ D19

DDR_A_ D24 DDR_A_ D25

DDR_A_ D26 DDR_A_ D27

DDR_CK E2_DIMMA

DDR_A_ BS2

DDR_A_ MA12 DDR_A_ MA9

DDR_A_ MA8 DDR_A_ MA5

DDR_A_ MA3 DDR_A_ MA1

M_CLK_A _DDR2 M_CLK_A _DDR#2

DDR_A_ MA10 DDR_A_ BS0

DDR_A_ WE# DDR_A_ CAS#

DDR_A_ MA13 DDR_CS 3_DIMMA#

DDR_A_ D32 DDR_A_ D33

DDR_A_ DQS#4 DDR_A_ DQS4

DDR_A_ D34 DDR_A_ D35

DDR_A_ D40 DDR_A_ D41

DDR_A_ D42 DDR_A_ D43

DDR_A_ D48 DDR_A_ D49

DDR_A_ DQS#6 DDR_A_ DQS6

DDR_A_ D50 DDR_A_ D51

DDR_A_ D56 DDR_A_ D57

DDR_A_ D58 DDR_A_ D59

+0.675VS +0 .675VS

VSS23DQ4 DQ05DQ5 DQ17VSS3 VSS49DQS#0 DM011DQS0 VSS513VSS6 DQ215DQ6 DQ317DQ7 VSS719VSS8 DQ821DQ12 DQ923DQ13 VSS925VSS10 DQS#127DM1 DQS129RESET# VSS1131VSS12 DQ1033DQ14 DQ1135DQ15 VSS1337VSS14 DQ1639DQ20 DQ1741DQ21 VSS1543VSS16 DQS#245DM2 DQS247VSS17 VSS1849DQ22 DQ1851DQ23 DQ1953VSS19 VSS2055DQ28 DQ2457DQ29 DQ2559VSS21 VSS2261DQS#3 DM363DQS3 VSS2365VSS24 DQ2667DQ30 DQ2769DQ31 VSS2571VSS26

CKE073CKE1 VDD175VDD2 NC177A15 BA279A14 VDD381VDD4 A12/BC#83A11

85

A9 VDD587VDD6

89

A8

91

A5 VDD793VDD8

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

GND1

FOX_AS 0A626-U4 S6-7H

FOX_AS 0A626-U4 S6-7H C

C

2 4

DDR_A_ D4

6

DDR_A_ D5

8 10

DDR_A_ DQS#0

12

DDR_A_ DQS0

14 16

DDR_A_ D6

18

DDR_A_ D7

20 22

DDR_A_ D12

24 26 28 30

DDR3_D RAMRST# _R

32 34

DDR_A_ D14

36

DDR_A_ D15

38 40

DDR_A_ D20DDR_A_ D16

42

DDR_A_ D21

44 46 48 50

DDR_A_ D22

52

DDR_A_ D23

54 56

DDR_A_ D28

58

DDR_A_ D29

60 62

DDR_A_ DQS#3

64

DDR_A_ DQS3

66 68

DDR_A_ D30

70

DDR_A_ D31

72

74

DDR_CK E3_DIMMA

76 78

DDR_A_ MA15

80

DDR_A_ MA14

82 84

DDR_A_ MA11

86

DDR_A_ MA7

A7

88 90

DDR_A_ MA6

A6

92

DDR_A_ MA4

A4

94 96

DDR_A_ MA2

A2

98

DDR_A_ MA0

A0

100 102

M_CLK_A _DDR3

CK1

104

M_CLK_A _DDR#3

CK1#

106

VDD12

108

DDR_A_ BS1

BA1

110

DDR_A_ RAS#

RAS#

112

VDD14

114

DDR_CS 2_DIMMA#

S0#

116

M_A_ODT 2

ODT0

118

VDD16

120

M_A_ODT 3

ODT1

122

NC2

124

VDD18

126

VREF_CA

128

VSS28

130

DDR_A_ D36

DQ36

132

DDR_A_ D37

DQ37

134

VSS30

136

DM4

138

VSS31

140

DDR_A_ D38

DQ38

142

DDR_A_ D39

DQ39

144

VSS33

146

DDR_A_ D44

DQ44

148

DDR_A_ D45

DQ45

150

VSS35

152

DDR_A_ DQS#5

DQS#5

154

DDR_A_ DQS5

DQS5

156

VSS38

158

DDR_A_ D46

DQ46

160

DDR_A_ D47

DQ47

162

VSS40

164

DDR_A_ D52

DQ52

166

DDR_A_ D53

DQ53

168

VSS42

170

DM6

172

VSS43

174

DDR_A_ D54

DQ54

176

DDR_A_ D55

DQ55

178

VSS45

180

DDR_A_ D60

DQ60

182

DDR_A_ D61

DQ61

184

VSS47

186

DDR_A_ DQS#7

DQS#7

188

DDR_A_ DQS7

DQS7

190

VSS50

192

DDR_A_ D62

DQ62

194

DDR_A_ D63

DQ63

196

VSS52

198

EVENT#

200

DDR_XD P_WAN_ SMBDAT

SDA

202

DDR_XD P_WAN_ SMBCLK

SCL

204

VTT2

206

GND2

ONN@

DDR_CK E3_DIMMA <6>

M_CLK_A _DDR3 <6> M_CLK_A _DDR#3 <6 >

DDR_CS 2_DIMMA# <6> M_A_ODT 2 <6>

M_A_ODT 3 <6>

2.2U_0402_6.3V6M

1

2

+DIMM_VRE F_CA

0.1U_0402_16V4Z

CD17

1

2

CD18

Standard

Reverse

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

Compal Secret Dat a

2012/06/11 2013/06 /11

Deciphered Date

Compal Electronics, Inc.

Title

DDRIII DIMM1&2

Size Document Number Rev

Custom

LA-9371P

Date: Sheet

LA-9371P

1

of

11 53Friday, Septem ber 28, 2 012

of

11 53Friday, Septem ber 28, 2 012

of

11 53Friday, Septem ber 28, 2 012

0.2

5

Populate RD4, De-Populate RD8 for Intel DDR3 VREFDQ multiple methods M1 Populate RD8, De-Populate RD4 for Intel DDR3 VREFDQ multiple methods M3

+DIMM_B_D Q

2.2U_0402_6.3V6M

D D

All VREF traces should

10U_0603_6.3V6M

1

2

1

@

CD43

+

2

have 10 mil trace width

CD44

CD44 330U_B2 _2.5VM_R 15M

330U_B2 _2.5VM_R 15M

DDR_B_ D[0..63]<6>

DDR_B_ DQS[0..7]<6>

DDR_B_ DQS#[0..7 ]<6>

DDR_B_ MA[0..15]<6>

Layout Note: Place near JDIMM2

+1.35V

1U_0402_6.3V6K

+1.35V

10U_0603_6.3V6M

1

2

+0.675VS

1U_0402_6.3V6K

1

CD33

2

10U_0603_6.3V6M

CD38

CD37

1

2

Layout Note: Place near JDIMM2.203,204

1U_0402_6.3V6K

1

CD49

2

C C

B B

A A

1U_0402_6.3V6K

1

CD34

CD36

CD35

2

10U_0603_6.3V6M

CD39

CD41

CD42

CD40

1

2

1U_0402_6.3V6K

1

2

CD52

CD51

CD50

2

2.2U_0402_6.3V6M

0.1U_0402_16V4Z

CD31

1

CD32

2

DDR_CK E0_DIMMB<6>

DDR_B_ BS2<6>

M_CLK_B _DDR0<6> M_CLK_B _DDR#0<6>

DDR_B_ BS0<6>

DDR_B_ WE#<6> DDR_B_ CAS#<6>

DDR_CS 1_DIMMB#<6>

+3VS

0.1U_0402_16V4Z

2.2U_0402_6.3V6M

CD56

1

CD55

2

4

JDIMM2 H=9.2mm TOP

+1.35V +1.35V

DDR_B_ D0 DDR_B_ D1

DDR_B_ D2 DDR_B_ D3

DDR_B_ D8 DDR_B_ D9

DDR_B_ DQS#1 DDR_B_ DQS1

DDR_B_ D10 DDR_B_ D11

DDR_B_ D16 DDR_B_ D17

DDR_B_ DQS#2 DDR_B_ DQS2

DDR_B_ D18 DDR_B_ D19

DDR_B_ D24 DDR_B_ D25

DDR_B_ D26 DDR_B_ D27

DDR_CK E0_DIMMB

DDR_B_ BS2

DDR_B_ MA12 DDR_B_ MA9

DDR_B_ MA8 DDR_B_ MA5

DDR_B_ MA3 DDR_B_ MA1

M_CLK_B _DDR0 M_CLK_B _DDR#0

DDR_B_ MA10 DDR_B_ BS0

DDR_B_ WE# DDR_B_ CAS#

DDR_B_ MA13 DDR_CS 1_DIMMB#

DDR_B_ D32 DDR_B_ D33

DDR_B_ DQS#4 DDR_B_ DQS4

DDR_B_ D34 DDR_B_ D35

DDR_B_ D40 DDR_B_ D41

DDR_B_ D42 DDR_B_ D43

DDR_B_ D48 DDR_B_ D49

DDR_B_ DQS#6 DDR_B_ DQS6

DDR_B_ D50 DDR_B_ D51

DDR_B_ D56 DDR_B_ D57

DDR_B_ D58 DDR_B_ D59

+0.675VS

101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205

JDIMM2

VREF_DQ1VSS1 VSS23DQ4 DQ05DQ5 DQ17VSS3 VSS49DQS#0 DM011DQS0 VSS513VSS6 DQ215DQ6 DQ317DQ7 VSS719VSS8 DQ821DQ12 DQ923DQ13 VSS925VSS10 DQS#127DM1 DQS129RESET# VSS1131VSS12 DQ1033DQ14 DQ1135DQ15 VSS1337VSS14 DQ1639DQ20 DQ1741DQ21 VSS1543VSS16 DQS#245DM2 DQS247VSS17 VSS1849DQ22 DQ1851DQ23 DQ1953VSS19 VSS2055DQ28 DQ2457DQ29 DQ2559VSS21 VSS2261DQS#3 DM363DQS3 VSS2365VSS24 DQ2667DQ30 DQ2769DQ31 VSS2571VSS26

CKE073CKE1 VDD175VDD2 NC177A15 BA279A14 VDD381VDD4 A12/BC#83A11 A985A7 VDD587VDD6 A889A6 A591A4 VDD793VDD8 A395A2 A197A0 VDD999VDD10 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST

VREF_CA VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0

EVENT# VDDSPD SA1 VTT1

G1

LCN_DAN0 6-K4806 -0103

LCN_DAN0 6-K4806 -0103 C

C

ONN@

Reverse

3

RUN_ON_CPU1 .5VS3< 11,9>

+DIMM23_V REF_D Q

2 4

DDR_B_ D4

6

DDR_B_ D5

8 10

DDR_B_ DQS#0

12

DDR_B_ DQS0

14 16

DDR_B_ D6

18

DDR_B_ D7

20 22

DDR_B_ D12

24

DDR_B_ D13

26 28 30

DDR3_D RAMRST# _R

32 34

DDR_B_ D14

36

DDR_B_ D15

38 40

DDR_B_ D20

42

DDR_B_ D21

44 46 48 50

DDR_B_ D22

52

DDR_B_ D23

54 56

DDR_B_ D28

58

DDR_B_ D29

60 62

DDR_B_ DQS#3

64

DDR_B_ DQS3

66 68

DDR_B_ D30

70

DDR_B_ D31

72

74

DDR_CK E1_DIMMB

76 78

DDR_B_ MA15

80

DDR_B_ MA14

82 84

DDR_B_ MA11

86

DDR_B_ MA7

88 90

DDR_B_ MA6

92

DDR_B_ MA4

94 96

DDR_B_ MA2

98

DDR_B_ MA0

100 102

M_CLK_B _DDR1

CK1

104

M_CLK_B _DDR#1

CK1#

106

VDD12

108

DDR_B_ BS1

BA1

110

DDR_B_ RAS#

RAS#

112

VDD14

114

DDR_CS 0_DIMMB#

S0#

116

M_B_ODT 0

ODT0

118

VDD16

120

M_B_ODT 1

ODT1

122

NC2

124

VDD18

126 128

VSS28

130

DDR_B_ D36

DQ36

132

DDR_B_ D37

DQ37

134

VSS30

136

DM4

138

VSS31

140

DDR_B_ D38

DQ38

142

DDR_B_ D39

DQ39

144

VSS33

146

DDR_B_ D44

DQ44

148

DDR_B_ D45

DQ45

150

VSS35

152

DDR_B_ DQS#5

DQS#5

154

DDR_B_ DQS5

DQS5

156

VSS38

158

DDR_B_ D46

DQ46

160

DDR_B_ D47

DQ47

162

VSS40

164

DDR_B_ D52

DQ52

166

DDR_B_ D53

DQ53

168

VSS42

170

DM6

172

VSS43

174

DDR_B_ D54

DQ54

176

DDR_B_ D55

DQ55

178

VSS45

180

DDR_B_ D60

DQ60

182

DDR_B_ D61

DQ61

184

VSS47

186

DDR_B_ DQS#7

DQS#7

188

DDR_B_ DQS7

DQS7

190

VSS50

192

DDR_B_ D62

DQ62

194

DDR_B_ D63

DQ63

196

VSS52

198 200

SDA

202

SCL

204

VTT2

206

G2

+0.675VS

20120710 Change by HP's request

DDR3_D RAMRST# _R <11 >

DDR_CK E1_DIMMB <6>

M_CLK_B _DDR1 <6> M_CLK_B _DDR#1 <6 >

DDR_B_ BS1 <6> DDR_B_ RAS# <6>

DDR_CS 0_DIMMB# <6> M_B_ODT 0 <6>

+DIMM_VRE F_CA

M_B_ODT 1 <6>

2.2U_0402_6.3V6M

CD47

1

2

DDR_XD P_WAN_ SMBDAT <1 1,13,16,2 8,38,5> DDR_XD P_WAN_ SMBCLK <11,13,16,28 ,38,5>

G

2

QD3

QD3 2N7002K W_SOT 323-3

2N7002K W_SOT 323-3

13

D

S

D

S

1 2

+1.35V

RD27 1K_04 02_1%RD27 1K_04 02_1%

All VREF traces should have 10 mil trace width

0.1U_0402_16V4Z

CD48

1

2

+DIMM_B_D Q

1K_0402_1%

12

RD28

2.2U_0402_6.3V6M

0.1U_0402_16V4Z

CD29

1

CD30

2

DDR_CK E2_DIMMB<6>

M_CLK_B _DDR2<6> M_CLK_B _DDR#2<6>

DDR_CS 3_DIMMB#<6>

+3VS

0.1U_0402_16V4Z

2.2U_0402_6.3V6M

CD54

1

CD53

2

JDIMM4 H=4.0mm BOT

+1.35V +1.35V

DDR_B_ D0 DDR_B_ D1

DDR_B_ D2 DDR_B_ D3

DDR_B_ D8 DDR_B_ D9

DDR_B_ DQS#1 DDR_B_ DQS1

DDR_B_ D10 DDR_B_ D11

DDR_B_ D16 DDR_B_ D17

DDR_B_ DQS#2 DDR_B_ DQS2

DDR_B_ D18 DDR_B_ D19

DDR_B_ D24 DDR_B_ D25

DDR_B_ D26 DDR_B_ D27

DDR_CK E2_DIMMB

DDR_B_ BS2

DDR_B_ MA12 DDR_B_ MA9

DDR_B_ MA8 DDR_B_ MA5

DDR_B_ MA3 DDR_B_ MA1

M_CLK_B _DDR2 M_CLK_B _DDR#2

DDR_B_ MA10 DDR_B_ BS0

DDR_B_ WE# DDR_B_ CAS#

DDR_B_ MA13 DDR_CS 3_DIMMB#

DDR_B_ D32 DDR_B_ D33

DDR_B_ DQS#4 DDR_B_ DQS4

DDR_B_ D34 DDR_B_ D35

DDR_B_ D40 DDR_B_ D41

DDR_B_ D42 DDR_B_ D43

DDR_B_ D48 DDR_B_ D49

DDR_B_ DQS#6 DDR_B_ DQS6

DDR_B_ D50 DDR_B_ D51

DDR_B_ D56 DDR_B_ D57

DDR_B_ D58 DDR_B_ D59

+0.675VS

101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71

73 75 77 79 81 83 85 87 89 91 93 95 97 99

FOX_AS 0A626-U4 RN-7F

JDIMM4

CONN@

VREF DQ Vss DQ0 DQ1 Vss DM0 Vss DQ2 DQ3 Vss DQ8 DQ9 Vss DQS1# DQS1 Vss DQ10 DQ11 Vss DQ16 DQ17 Vss DQS2# DQS2 Vss DQ18 DQ19 Vss DQ24 DQ25 Vss DM3 Vss DQ26 DQ27 Vss

CKE0 VDD NC BA2 VDD A12/BC# A9 VDD A8 A5 VDD A3 A1 VDD CK0 CK0# VDD A10/AP BA0 VDD WE# CAS# VDD A13 S1# VDD TEST Vss DQ32 DQ33 Vss DQS4# DQS4 Vss DQ34 DQ35 Vss DQ40 DQ41 Vss DM5 Vss DQ42 DQ43 Vss DQ48 DQ49 Vss DQS6# DQS6 Vss DQ50 DQ51 Vss DQ56 DQ57 Vss DM7 Vss DQ58 DQ59 Vss SA0 VDD SPD SA1 Vtt

GND

DQS0#

RESET#

DQS3#

VREF CA

DQS5#

DQS7#

EVENT#

2

Vss

4

DDR_B_ D4

DQ4

6

DDR_B_ D5

DQ5

8

Vss

10

DDR_B_ DQS#0

12

DDR_B_ DQS0

DQS0

14

Vss

16

DDR_B_ D6

DQ6

18

DDR_B_ D7

DQ7

20

Vss

22

DDR_B_ D12

DQ12

24

DDR_B_ D13

DQ13

26

Vss

28

DM1

30

DDR3_D RAMRST# _R

32

Vss

34

DDR_B_ D14

DQ14

36

DDR_B_ D15

DQ15

38

Vss

40

DDR_B_ D20

DQ20

42

DDR_B_ D21

DQ21

44

Vss

46

DM2

48

Vss

50

DDR_B_ D22

DQ22

52

DDR_B_ D23

DQ23

54

Vss

56

DDR_B_ D28

DQ28

58

DDR_B_ D29

DQ29

60

Vss

62

DDR_B_ DQS#3

64

DDR_B_ DQS3

DQS3

66

Vss

68

DDR_B_ D30

DQ30

70

DDR_B_ D31

DQ31

72

Vss

74

DDR_CK E3_DIMMB

CKE1

76

VDD

78

DDR_B_ MA15

A15

80

DDR_B_ MA14

A14

82

VDD

84

DDR_B_ MA11

A11

86

DDR_B_ MA7

A7

88

VDD

90

DDR_B_ MA6

A6

92

DDR_B_ MA4

A4

94

VDD

96

DDR_B_ MA2

A2

98

DDR_B_ MA0

A0

100

VDD

102

M_CLK_B _DDR3

CK1

104

M_CLK_B _DDR#3

CK1#

106

VDD

108

DDR_B_ BS1

BA1

110

DDR_B_ RAS#

RAS#

112

VDD

114

DDR_CS 2_DIMMB#

S0#

116

M_B_ODT 2

ODT0

118

VDD

120

M_B_ODT 3

ODT1

122

NC

124

VDD

126 128

Vss

130

DDR_B_ D36

DQ36

132

DDR_B_ D37

DQ37

134

Vss

136

DM4

138

Vss

140

DDR_B_ D38

DQ38

142

DDR_B_ D39

DQ39

144

Vss

146

DDR_B_ D44

DQ44

148

DDR_B_ D45

DQ45

150

Vss

152

DDR_B_ DQS#5

154

DDR_B_ DQS5

DQS5

156

Vss

158

DDR_B_ D46

DQ46

160

DDR_B_ D47

DQ47

162

Vss

164

DDR_B_ D52

DQ52

166

DDR_B_ D53

DQ53

168

Vss

170

DM6

172

Vss

174

DDR_B_ D54

DQ54

176

DDR_B_ D55

DQ55

178

Vss

180

DDR_B_ D60

DQ60

182

DDR_B_ D61

DQ61

184

Vss

186

DDR_B_ DQS#7

188

DDR_B_ DQS7

DQS7

190

Vss

192

DDR_B_ D62

DQ62

194

DDR_B_ D63

DQ63

196

Vss

198 200

DDR_XD P_WAN_ SMBDAT

SDA

202

DDR_XD P_WAN_ SMBCLK

SCL

204

Vtt

GND

+0.675VS

206

DDR_CK E3_DIMMB <6>

M_CLK_B _DDR3 <6> M_CLK_B _DDR#3 <6 >

DDR_CS 2_DIMMB# <6> M_B_ODT 2 <6>

+DIMM_VRE F_CA

M_B_ODT 3 <6>

2.2U_0402_6.3V6M

CD45

1

2

0.1U_0402_16V4Z

CD46

1

2

1

Reverse

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

Compal Secret Dat a

2012/06/11 2013/06 /11

Deciphered Date

Compal Electronics, Inc.

Title

DDRIII DIMM3&4

Size Document Number Rev

Custom

LA-9371P

Date: Sheet

LA-9371P

1

of

12 5 3Friday, Septe mber 28 , 2012

of

12 5 3Friday, Septe mber 28 , 2012

of

12 5 3Friday, Septe mber 28 , 2012

0.2

5

+RTCVCC

330K_0402_5%

12

RH6

PCH_INTVRMEN

D D

INTVRMEN - INTEGRATED SUS 1.05V VRM ENABLE High - Enable Internal VRs Low - Enable External VRs

USB_OC0#_R<17>

USB_OC1#_R<17>

USB_OC2#<17>

USB_OC3#<17>

USB_OC4#_R<17>

dGPU_HPD_INTR<17,35>

LED_LINK_LAN#_R<17,29>

USB_OC7#<17>

mSATA_DET#<18,23>

PCH_GPIO37<18> KBL_DET#<18,38> DGPU_PRSNT#<18,35> FN14<15> FN15<15>

PCH_GPIO8<18> Sec_HDD_DET<18> PM_RSMRST#<14,30>

#4/18 change by HP requirement

+3VS

1 2

RH29 10K_0402_5%@RH29 10K_0402_5%@

NO REBOOT STRAP

DISABLED WHEN LOW (DEFAULT) ENABLED WHEN HIGH

1 2

RH33 100K_0402_5%RH33 100K_0402_5%

20120802 HP's request

C C

B B

HDA_SYNC Isolation Circuit

HDA_SPKR

+3V_PCH

RH30

HDD_HALTLED

CMOS_CLR1

Shunt Clear CMOS

Open

ME_CLR1

Shunt Clear ME RTC Registers

Open

1 2

RH30

FLASH DESCRIPTOR SECURITY OVERRIDE

LOW = DESABLED (DEFAULT) HIGH = ENABLED

CMOS setting

Keep CMOS

TPM setting

Keep ME RTC Registers

+5VS

G

2

QH2

S

SB000002X00

BSS138W-7-F_SOT323-3

RH43

RH43 1M_0402_5%

1M_0402_5%

PLT_RST#<14,25,28,29,30,35,37,39,5> BAT_GRNLED# <30,39>

1

D

1 2

5

G

QH11B

4 3

S

MESS84DW-G_SC88-6

+RTCVCC

2

1 2

13

HDA_SYNCHDA_SYNC_R

D

2.2K_0402_5%

2

G

QH11A

1 6

S

MESS84DW-G_SC88-6

1

@

ME1 SHORT PADS

CH15 1U_0402_6.3V6KCH15 1U_0402_6.3V6K

RTC Circuit

RH233

1 2

1K_0402_5%

+BATT1.1+RTCVCC +3VDS

W=20mils

1 2 3 4

ACES_50273-0020N-001

CONN@

A A

W=20mils

CH102

1

1U_0603_10V4Z

2

Place near PCH

D40

1

DAN202U_SC70

5

2

3

+BATT_D

W=20mils

4

USB_OC0#_R USB_OC1#_R USB_OC2# USB_OC3# USB_OC4#_R dGPU_HPD_INTR LED_LINK_LAN#_R USB_OC7# SG_IN FN9 mSATA_DET# PCH_GPIO37 KBL_DET# DGPU_PRSNT# FN14 FN15 PCH_GPIO8 Sec_HDD_DET PM_RSMRST# RSMRST#_XDP PLT_RST# RESET_OUT#_R

HDA_SDOUT

D

20120709 Change by HP request

20120919 Change QH11 to PMOS

1 2

RH34 20K_0402_5%RH34 20K_0402_5%

1 2

RH35 1M_0402_5%RH35 1M_0402_5%

1 2

RH36 20K_0402_5%RH36 20K_0402_5%

+3V_PCH

#4/18 change by HP requirement

JBATT1

1 2 G1 G2

4

RH4 33_0402_5%PXDP@ RH4 33_0402_5%PXDP@ RH5 33_0402_5%PXDP@ RH5 33_0402_5%PXDP@ RH7 33_0402_5%PXDP@ RH7 33_0402_5%PXDP@ RH8 33_0402_5%PXDP@ RH8 33_0402_5%PXDP@ RH3 33_0402_5%PXDP@ RH3 33_0402_5%PXDP@ RH9 33_0402_5%PXDP@ RH9 33_0402_5%PXDP@ RH10 33_0402_5%PXDP@ RH10 33_0402_5%PXDP@ RH11 33_0402_5%PXDP@ RH11 33_0402_5%PXDP@ RH12 33_0402_5%PXDP@ RH12 33_0402_5%PXDP@ RH13 33_0402_5%PXDP@ RH13 33_0402_5%PXDP@ RH14 33_0402_5%PXDP@ RH14 33_0402_5%PXDP@ RH15 33_0402_5%PXDP@ RH15 33_0402_5%PXDP@ RH17 33_0402_5%PXDP@ RH17 33_0402_5%PXDP@ RH18 33_0402_5%PXDP@ RH18 33_0402_5%PXDP@ RH19 33_0402_5%PXDP@ RH19 33_0402_5%PXDP@ RH20 33_0402_5%PXDP@ RH20 33_0402_5%PXDP@ RH21 33_0402_5%PXDP@ RH21 33_0402_5%PXDP@ RH22 33_0402_5%PXDP@ RH22 33_0402_5%PXDP@ RH23 1K_0402_1%PXDP@ RH23 1K_0402_1%PXDP@ RH25 1K_0402_1%PXDP@ RH25 1K_0402_1%PXDP@

WWAN_DET#<25>

1

@

CMOS1 SHORT PADS

CH16

CMOS place near DIMM

2

1 2

1U_0402_6.3V6K

RH39 51_0402_1%

@

1 2

RH40

@

1 2

RH41

@

1 2

RH44

@

2012/09/21 HP's request

HDA_BITCLK_AUDIO<26>

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

12

200_0402_5%

HDA_SDOUT_AUDIO<26>

HDA_SYNC_AUDIO<26>

HDA_RST_AUDIO#<26>

1 2

RH28 10M_0402_5%RH28 10M_0402_5%

18P_0402_50V8J

1

CH13

2

YH1

RH230 0_0402_5%RH230 0_0402_5%

20120703

1

OSC4OSC

NC3NC

2

1 2

PCH_RTCRST#<14>

100_0402_1%

12

@

XDP_FN0 XDP_FN1 XDP_FN2 XDP_FN3 XDP_FN4 XDP_FN5 XDP_FN6 XDP_FN7 XDP_FN8 XDP_FN9 XDP_FN10 XDP_FN11 XDP_FN12 XDP_FN13 XDP_FN14 XDP_FN15 XDP_FN16 XDP_FN17

32.768K 12.5PF Q13MC1462001700

12

RH46

HDD_HALTLED<39>

100_0402_1%

RH47

@

1

CH14

CH14 18P_0402_50V8J

18P_0402_50V8J

2

HDA_SPKR<26>

HDA_SDI0<26>

ISO_PREP#<33,36>

100_0402_1%

12

@

27P_0402_50V8J

1

2

3

DDR_XDP_WAN_SMBDAT<11,12,16,28,38,5> DDR_XDP_WAN_SMBCLK<11,12,16,28,38,5>

PCH_RTCX1

PCH_RTCX2

PCH_RTCX1

PCH_RTCX2

SRTCRST#

INTRUDER#

PCH_INTVRMEN

PCH_RTCRST#

HDA_BIT_CLK

HDA_SYNC

HDA_SPKR

HDA_RST#

HDA_SDI0

HDA_SDOUT

HDD_HALTLED

ISO_PREP#

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

1 2

RH45 0_0402_5%RH45 0_0402_5%

RH48

1 2

3

HDA_SDOUT

HDA_SYNC_R

HDA_RST#

HDA_BIT_CLK

RH50 33_0402_5%RH50 33_0402_5%

RH51 33_0402_5%RH51 33_0402_5%

RH52 33_0402_5%RH52 33_0402_5%

RH53 33_0402_5%RH53 33_0402_5%

@CH17

@

CH17

2

1

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0

11

OBSDATA_A1

13

GND4

15

OBSDATA_A2

17

OBSDATA_A3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B0

29

OBSDATA_B1

31

GND10

33

OBSDATA_B2

35

OBSDATA_B3

37

GND12

39

PWRGOOD/HOOK0

41

HOOK1

43

VCC_OBS_AB

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

SAMTE_BSH-030-01-L-D-A

BC8

SATA_PRX_DTX_N0

BE8

SATA_PRX_DTX_P0

AW8

SATA_PTX_DRX_N0

AY8

SATA_PTX_DRX_P0

BC10

SATA_PRX_DTX_N1

BE10

SATA_PRX_DTX_P1

AV10

SATA_PTX_DRX_N1

AW10

SATA_PTX_DRX_P1

BB9

SATA_PRX_DTX_N2

BD9

SATA_PRX_DTX_P2

AY13

SATA_PTX_DRX_N2

AW13

SATA_PTX_DRX_P2

BC12

SATA_PRX_DTX_N3

BE12

SATA_PRX_DTX_P3

AR13

SATA_PTX_DRX_N3

AT13

SATA_PTX_DRX_P3

BD13

SATA_PRX_DTX_N4

BB13

SATA_PRX_DTX_P4

AV15

SATA_PTX_DRX_N4

AW15

SATA_PTX_DRX_P4

BC14

SATA_PRX_DTX_N5

BE14

SATA_PRX_DTX_P5

AP15

SATA_PTX_DRX_N5

AR15

SATA_PTX_DRX_P5

AY5

SATA_COMP

AP3

SATA_ACT#

AT1

SG_IN

AU2

FN9

BD4

SATA_IREF

BA2

BB2

SATA_COMP

PCH XDP

JXDP2

1 2

RH42 0_0402_5%RH42 0_0402_5%

1 2

+3V_PCH

0.1U_0402_16V4Z

1

CH12

2

PXDP@

1 2

PXDP@

ON/OFFBTN#<14,30,5>

RH37

10K_0402_5%

+3VS

UH1A

B5

RTCX1

B4

RTCX2

B9

SRTCRST#

A8

INTRUDER#

G10

INTVRMEN

D9

RTCRST#

B25

HDA_BCLK

A22

HDA_SYNC

AL10

SPKR

C24

HDA_RST#

L22

HDA_SDI0

K22

HDA_SDI1

G22

HDA_SDI2

F22

HDA_SDI3

A24

HDA_SDO

B17

DOCKEN#/GPIO33

C22

HDA_DOCK_RST #/GPIO13

AB3

JTAG_TCK

AD1

JTAG_TMS

AE2

JTAG_TDI

AD3

JTAG_TDO

F8

PCH_TP25

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

TP25

C26

TP22

AB6

TP20

LYNXPOINT_BGA695

PXDP@

RH24 0_0402_5%

RH26 0_0402_5%

1 2

PXDP@

1 2

PXDP@

RH27 0_0402_5%

RH38

RH38 10K_0402_5%

10K_0402_5%

1 2

LPT_PCH_M_EDS

JTAGRTC AZALIA

2012/06/11 2013/06/11

DDR_XDP_WAN_SMBDAT_R2 DDR_XDP_WAN_SMBCLK_R2

REV = 5

SATA

1 OF 11

Compal Secret Data

Deciphered Date

+3V_PCH

XDP_FN0 XDP_FN1

XDP_FN2 XDP_FN3

XDP_FN4 XDP_FN5

XDP_FN6 XDP_FN7

RSMRST#_XDP ON/OFFBTN#_XDP

SATA_RXN_0 SATA_RXP_0

SATA_TXN_0 SATA_TXP_0

SATA_RXN_1 SATA_RXP_1

SATA_TXN_1 SATA_TXP_1

SATA_RXN_2 SATA_RXP_2

SATA_TXN_2 SATA_TXP_2

SATA_RXN_3 SATA_RXP_3

SATA_TXN_3 SATA_TXP_3

SATA_RXN4/PERN1 SATA_RXP4/PERP1

SATA_TXN4/PETN1 SATA_TXP4/PETP1

SATA_RXN5/PERN2 SATA_RXP5/PERP2

SATA_TXN5/PETN2 SATA_TXP5/PETP2

SATA_RCOMP

SATALED#

SATA0GP/GPIO21

SATA1GP/GPIO19

SATA_IREF

TP9

TP8

SATA Impedance Compensation

CAD note: Place the resistor within 500 mils of the PCH. Avoid routing next to clock pins.

2

1

2

GND1

4

OBSFN_C0 OBSFN_C1

GND3 OBSDATA_C0 OBSDATA_C1

GND5 OBSDATA_C2 OBSDATA_C3

GND7

OBSFN_D0 OBSFN_D1

GND9 OBSDATA_D0 OBSDATA_D1

GND11 OBSDATA_D2 OBSDATA_D3

GND13

ITPCLK/HOOK4

ITPCLK#/HOOK5

VCC_OBS_CD

RESET#/HOOK6

DBR#/HOOK7

GND15

TRST#

TMS

GND17

CONN@

SATA_PRX_DTX_N0 <23> SATA_PRX_DTX_P0 <23>

SATA_PTX_DRX_N0 <23> SATA_PTX_DRX_P0 <23>

SATA_PRX_DTX_N1 <23> SATA_PRX_DTX_P1 <23>

SATA_PTX_DRX_N1 <23> SATA_PTX_DRX_P1 <23>

SATA_PRX_DTX_N2 <33> SATA_PRX_DTX_P2 <33>

SATA_PTX_DRX_N2 <33> SATA_PTX_DRX_P2 <33>

SATA_PRX_DTX_N3 <33> SATA_PRX_DTX_P3 <33>

SATA_PTX_DRX_N3 <33> SATA_PTX_DRX_P3 <33>

SATA_PRX_DTX_N4 <23> SATA_PRX_DTX_P4 <23>

SATA_PTX_DRX_N4 <23> SATA_PTX_DRX_P4 <23>

SATA_PRX_DTX_N5 <23> SATA_PRX_DTX_P5 <23>

SATA_PTX_DRX_N5 <23> SATA_PTX_DRX_P5 <23>

1 2

R463 10K_0402_5%R463 10K_0402_5%

SATA_ACT# <33,39>

SG_IN <22>

T72PAD~D @T72PAD~D @

+1.5VS

RH497.5K_0402_1% RH497.5K_0402_1%

Title

Size Document Number Rev

Custom

Date: Sheet of

XDP_FN16

6

XDP_FN17

8 10

XDP_FN8

12

XDP_FN9

14 16

XDP_FN10

18

XDP_FN11

20 22 24 26 28

XDP_FN12

30

XDP_FN13

32 34

XDP_FN14

36

XDP_FN15

38 40 42 44 46

RESET_OUT#_R

48

XDP_DBRESET#

50 52

PCH_JTAG_TDO

TD0

54 56

PCH_JTAG_TDI

TDI

58

PCH_JTAG_TMSPCH_JTAG_TCK

60

+1.5VS

1 2

+3VS

10K_0402_5%

PLT_RST#

Compal Electronics, Inc.

PCH-RTC,HDA,SATA,XDP

LA-9371P

RH237

+3VS

1

+1.05VS

+3V_PCH

XDP_DBRESET# <14,5>

0.1U_0402_16V4Z

1

CH103

2

PXDP@

HDD_Primary

ODD

DOCK_SATA2

DOCK_SATA3

HDD_Secondary

mSATA

+3VS

UMA@

13

D

Q70

2

2N7002KW _SOT323-3

G

S

13 53Friday, September 28, 2012

12

10K_0402_5%

10K_0402_5% R7

R7

12

10K_0402_5%

10K_0402_5% R8

R8

0.2

5

+3V_PCH

1 2

RH63 10K_ 0402_5%RH63 10K_0 402_5%

1 2

RH64 10K_ 0402_5%RH64 10K_0 402_5%

1 2

RH72 10K_ 0402_5%RH72 10K_0 402_5%

1 2

RH75 10K_ 0402_5%RH75 10K_0 402_5%

+3VS

D D

XDP_DBRE SET#<13,5>

VCC1_PW RGD<3 0>

DMI_CTX_PRX _N0<4> DMI_CTX_PRX _N1<4>

DMI_CTX_PRX _N2<4> DMI_CTX_PRX _N3<4>

DMI_CTX_PRX _P0<4> DMI_CTX_PRX _P1<4>

DMI_CTX_PRX _P2<4>

C C

PCH_PW ROK_R

B B

A A

DMI_CTX_PRX _P3<4>

DMI_CRX_P TX_N0<4> DMI_CRX_P TX_N1<4>

DMI_CRX_P TX_N2<4> DMI_CRX_P TX_N3<4>

DMI_CRX_P TX_P0<4> FDI_CSYNC <4> DMI_CRX_P TX_P1<4>

DMI_CRX_P TX_P2<4> DMI_CRX_P TX_P3<4>

+1.5VS

SUSACK#<30>

PM_PWR OK<30,5>

PM_APW ROK<30,31>

PM_DRAM_P WRGD<5>

PM_RSMRST#<13 ,30>

SUS_PW R_ACK<30>

ON/OFFBTN#

AC_PRES_ OUT<30,35>

20120911 Change BT_OFF to GPIO61

1 2

RH78 8.2K _0402_5%RH78 8.2K _0402_5%

1 2

RH70 1 0K_0402_5 %RH70 10K_040 2_5%

PCH_DPW ROK

RH246

@ RH246

@

1 2

0_0402_ 5%

20120810 HP's request

1 2

RH88 0_04 02_5%RH8 8 0_0402_5 %

1 2

RH90 7.5K _0402_1%RH90 7.5K _0402_1%

SIO_SLP _SUS# SUSACK #

1 2

RH92 0_04 02_5%RH9 2 0_0402_5 %

1 2

RH93 0_04 02_5%RH9 3 0_0402_5 %

1 2

RH221 0 _0402_5%RH221 0 _0402_5%

1 2

RH94

1 2

RH95 0_0402_5 %RH95 0_0402 _5%

1 2

RH97 0_0402_5%RH97 0 _0402_5%

SLP_W LAN#<25,44>

20120913 Delete UH7, RH235. Move RH236, CH106 to page 31

SUS_PW R_ACK

PCH_PCIE_ WAKE#

PCH_RI#

BT_OFF

PM_CLKRUN #

SLP_LAN #

1 2

RH54 0_04 02_5%RH5 4 0_0402_5 %

1 2

RH67 0_04 02_5%RH6 7 0_0402_5 %

DMI_CTX_PRX _N0 DMI_CTX_PRX _N1

DMI_CTX_PRX _N2 DMI_CTX_PRX _N3

DMI_CTX_PRX _P0 DMI_CTX_PRX _P1

DMI_CTX_PRX _P2 DMI_CTX_PRX _P3

DMI_CRX_P TX_N0 DMI_CRX_P TX_N1

DMI_CRX_P TX_N2 DMI_CRX_P TX_N3

DMI_CRX_P TX_P0 DMI_CRX_P TX_P1

DMI_CRX_P TX_P2 DMI_CRX_P TX_P3

DMI_IREF

DMI_RCOMP

20120911 HP's request

1 2

@

R230 0_0402_5%

@T90

@

T150 PAD~D@ T150 PAD~D@

T90

0_0402_ 5%

PAD~D

SYS_RESE T#

SYS_PW ROK_R

PCH_PW ROK

PM_APW ROK_R

PM_DRAM_P WRGD_R

PCH_RSMRST# _R

ME_SUS_P WR_ACK_R

ON/OFFBTN#

AC_PRES_ OUT

GPIO72

PCH_RI#

SLP_W LAN#

SYS_RESE T#

PM_RSMRST#

UH1B

AW22

DMI_RXN_0

AR20

DMI_RXN_1

AP17

DMI_RXN_2

AV20

DMI_RXN_3

AY22

DMI_RXP_0

AP20

DMI_RXP_1

AR17

DMI_RXP_2

AW20

DMI_RXP_3

BD21

DMI_TXN_0

BE20

DMI_TXN_1

BD17

DMI_TXN_2

BE18

DMI_TXN_3

BB21

DMI_TXP_0

BC20

DMI_TXP_1

BB17

DMI_TXP_2

BC18

DMI_TXP_3

BE16

DMI_IREF

AW17

TP12

AV17

TP7

AY17

DMI_RCOMP

R6

SUSACK#

AM1

SYS_RESET#

AD7

SYS_PWROK

F10

PWROK

AB7

APWROK

H3

DRAMPWROK

J2

RSMRST#

J4

SUSWARN#/SUSPWRNACK/GPIO30

K1

PWRBTN#

E6

ACPRESENT/GPIO31

K7

BATLOW#/GPIO72

N4

RI#

AB10

TP21

D2

SLP_WLAN#/GPIO29

LYNXPOINT_B GA695

PCH_RTCRST#<13>

20120920 Add ME debug circuit for HP's request

LPT_PCH_M_EDS

DMI

System Power

Management

2 OF 11

4

+3VDS

SLP_S3#

SLP_S5# SLP_S4# SIO_SLP _A#

PCH_RTCRST#

ON/OFFBTN#

SYS_RESE T#

FCI_1005 1922-1410E LF

REV = 5

AJ35

FDI_RXN_0

AL35

FDI_RXN_1

AJ36

FDI_RXP_0

FDI

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

FDI_RXP_1

TP16

TP15

TP10

FDI_CSYNC

FDI_INT

FDI_IREF

TP17

TP13

FDI_RCOMP

DSWVRMEN

DPWROK

WAKE#

CLKRUN#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN#

AL36

AV43

AY45

TP5

AV45

AW44

AL39

AL40

AT45

AU42

AU44

AR44

C8

L13

K3

AN7

U7

Y6

Y7

C6

H1

F3

F1

AY3

G5

Boot BIOS Strap

PCH_GPIO51

SATA1GP/ GPIO19

0 1 Reserved (NAND)

1 0

JME1

1

2

3

4

5

6

7

16

7

G2

8

15

8

G1

9

10

11

12

13

14

CONN@

FDI_CTX_PRX _N0

FDI_CTX_PRX _N1

FDI_CTX_PRX _P0

FDI_CTX_PRX _P1

FDI_CSYNC

FDI_INT

FDI_IREF

RH86 0_04 02_5%RH8 6 0_0402_5 %

FDI_RCOMP

DSWODV REN

PCH_DPW ROK

PCH_PCIE_ WAKE#

PM_CLKRUN #

BT_OFF

SUSCLK_K BC

SLP_S5#

SLP_S4#

SLP_S3#

SIO_SLP _A#

SIO_SLP _SUS#

H_PM_SYNC

SLP_LAN #

Boot BIOS Location

00 LPC

1 2

PCI

FDI_CTX_PRX _N0 <7>

FDI_CTX_PRX _N1 <7>

FDI_CTX_PRX _P0 <7>

FDI_CTX_PRX _P1 <7>

FDI_INT <4>

+1.5VS

12

+1.5VS

RH897. 5K_0402_1 % RH897 .5K_0402_ 1%

PCH_PCIE_ WAKE# <25,39 >

PM_CLKRUN # <28,30 ,32>

BT_OFF <25>

20120911 HP request

SUSCLK_K BC <30>

T85 PAD~D @T85 PAD~D@

@

T86 PAD ~D

SLP_S4# <44>

SLP_S3# <30,31,34 ,39,44,9>

SIO_SLP _A# <30 ,31,45>

T88 PAD ~D

@

SIO_SLP _SUS# <34>

T89 PAD~D

@

H_PM_SYNC <5>

SLP_LAN # <29, 30>

3

DSWODV REN

1 2

RH98 150_ 0402_1%RH98 1 50_0402_1 %

1 2

RH99 150_ 0402_1%RH99 1 50_0402_1 %

1 2

RH100 1 50_0402_ 1%RH100 150_ 0402_1%

1 2

RH101 1 00K_0402 _5%RH101 1 00K_0402 _5%

PCH_CRT_BLU<36>

PCH_CRT_GRN<36>

PCH_CRT_RED<36>

PCH_CRT_DDC_ CLK<3 6>

PCH_CRT_DDC_ DAT<36>

PCH_CRT_HSYNC<36>

PCH_CRT_VSYN C<36 >

BKL_PW M_PCH<35>

PANEL_B KEN_PCH<35>

DGPU_HOL D_RST#<35 >

DGPU_SEL ECT#<35,36 >

DGPU_PW R_EN<15,35>

+3VS

Camera_ON<22>

CR_SX_W ARN#<3 9>

20120718 Add QH12 to invertion PCH_GPIO56 signal 20120723 Delete QH12 as HP's request

PCH_CRT_BLU

PCH_CRT_GRN

PCH_CRT_RED

PCH_CRT_DDC_ CLK

PCH_CRT_DDC_ DAT

1 2

DGPU_HOL D_RST#

DGPU_SELECT#

DGPU_PW R_EN

1 2

Camera_ON

CR_SX_W ARN#

20120723

HSYNC

VSYNC

CRT_IREF

BKL_PW M_PCH

ENVDD_PCH

PCI_PIRQA #

PCI_PIRQB #

PCI_PIRQC #

PCI_PIRQD #

PCH_GPIO 51

20120920

RH84 2 0_0402_1%RH84 20_0 402_1%

RH85 2 0_0402_1%RH85 20_0 402_1%

RH87 6 49_0402_1 %RH87 64 9_0402_1 %

ENVDD_PCH<35>

RH147 1 00K_0402 _5%RH147 1 00K_0402 _5%

+RTCVCC

330K_0402_5%

RH55

1 2

PCH_CRT_BLU

PCH_CRT_GRN

PCH_CRT_RED

ENVDD_PCH

T45

VGA_BLUE

U44

VGA_GREEN

V45

VGA_RED

M43

VGA_DDC_CLK

M45

VGA_DDC_DATA

N42

VGA_HSYNC

N44

VGA_VSYNC

U40

DAC_IREF

U39

VGA_IRTN

N36

EDP_BKLTCTL

K36

EDP_BKLTEN

G36

EDP_VDDEN

H20

PIRQA#

L20

PIRQB#

K17

PIRQC#

M20

PIRQD#

A12

GPIO50

B13

GPIO52

C12

GPIO54

C10

GPIO51

A10

GPIO53

AL6

GPIO55

LYNXPOINT_B GA695

2

DSWODVREN - ON DIE DSW VR ENABLE

HIGH = ENABLED (DEFAULT) LOW = DISABLED

A16 SWAP OVERRIDE STRAP

STP_A16OVR

LPT_PCH_M_EV

LVDSCRT

5 OF 11

PCI

LOW = A16 SWAP OVERRIDE HIGH = DEFAULT

REV = 5UH1E

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPD_CTRLCLK

DDPD_CTRLDATA

DISPLAY

PLTRST#

MC74VHC1G 08DFT2G_SC70 -5

R40

R39

R35

R36

N40

N38

H45

DDPB_AUXN

K43

DDPC_AUXN

J42

DDPD_AUXN

H43

DDPB_AUXP

K45

DDPC_AUXP

J44

DDPD_AUXP

K40

DDPB_HPD

K38

DDPC_HPD

H39

DDPD_HPD

G17

PIRQE#/GPIO2

F17

PIRQF#/GPIO3

L15

PIRQG#/GPIO4

M15

PIRQH#/GPIO5

AD10

PME#

Y11

PLTRST#

20120810 HP's request

1

2

PWRSV_ SEL#

ODD_DA#

NMI_SMI_DB G#

ACCEL_INT_ R#

PLTRST#

+3V_PCH

0.1U_040 2_16V4Z

5

IN1

VCC

IN2

GND

3

1

PCI_PIRQA #

PCI_PIRQB #

PCI_PIRQC #

PCI_PIRQD #

PWRSV_ SEL#

DGPU_HOL D_RST#

DGPU_PW R_EN

ODD_DA#

NMI_SMI_DB G#

PCH_CRT_DDC_ CLK

PCH_CRT_DDC_ DAT

DGPU_SEL ECT#

Camera_ON

ACCEL_INT_ R#

CR_SX_W ARN#

20120705 Correct net name to follow GPIO table

PWRSV_ SEL# <37>

ODD_DA# <23>

NMI_SMI_DB G# <30>

12

T87 PAD~D@T87 PAD~D@

CH20

1 2

UH3

OUT

RH960_0402 _5% RH960_0402 _5%

4

PLT_RST#

1

@

CH107

22P_040 2_50V8J

2

20120713 Add for ESD's request

PLT_RST# <13,25,2 8,29,30,35 ,37,39,5>

12

RH568.2K_040 2_5% RH568.2K_ 0402_5%

12

RH578.2K_040 2_5% RH578.2K_ 0402_5%

12

RH598.2K_040 2_5% RH598.2K_ 0402_5%

12

RH608.2K_040 2_5% RH608.2K_ 0402_5%

12

RH6210K_ 0402_5% RH621 0K_0402_ 5%

12

RH6610K_ 0402_5% RH661 0K_0402_ 5%

12

RH6910K_ 0402_5% RH691 0K_0402_ 5%

12

RH7110K_ 0402_5% RH711 0K_0402_ 5%

12

RH74100K_0402_5 % RH74100K_0402_5 %

12

20120920 HP's request

RH762.2K _0402_5% RH762.2K _0402_5%

12

RH772.2K _0402_5% RH772.2K _0402_5%

12

RH8010K_ 0402_5% RH801 0K_0402_ 5%

12

RH8210K_ 0402_5% RH821 0K_0402_ 5%

12

RH838.2K _0402_5% RH838 .2K_0402_ 5%

12

RH24510K_040 2_5% RH24510K_0 402_5%

20120723 HP's request

ACCEL_INT# <28>

+3VS

11 SPI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Numb er Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

PCH -DMI,FDI,PM,DP,CRT

LA-9371P

1

of

14 53Friday, Septemb er 28, 2012

0.2

5

D D

4

3

2

+3V_PCH

10K_0402_5%

RH106

1

1 2

GFX_CLK_REQ#

FN14<13> FN15<13>

+3V_PCH

CLK_PCIE_CR#<39> CLK_PCIE_CR<39>

+3VS

CR_CLK_REQ#<39>

CLK_TB_REFCLK#<39>

CLK_TB_REFCLK<39>

+3VS

C C

B B

TB_CLKREQ#<39>

+3V_PCH

CLK_PCIE_EXP#<39> CLK_PCIE_EXP<39>

CLKREQ_EXP#<39>

+3V_PCH CLK_PCIE_LAN#< 29> CLK_PCIE_LAN<29>

CLK_PCIE_LAN_REQ1#<29>

CLK_PCI_DEBUG_KBC<30>

+3V_PCH CLK_PCIE_MINI1#<25>

CLK_PCIE_MINI1<25>

+3V_PCH

MINI1_CLKREQ#< 25>

CLK_PCI_KBC<30> CLK_PCI_SIO<32>

CLK_PCI_TPM<28>

CLK_PCI_DEBUG<25>

FN14 FN15

RH104 10K_0402_5%RH104 10K _0402_5%

RH105 10K_0402_5%RH105 10K _0402_5% RH203 0_0402_5%RH203 0_0402_5%

RH113 10K_0402_5%RH113 10K _0402_5% RH205 0_0402_5%RH205 0_0402_5%

RH118 10K_0402_5%RH118 10K _0402_5%

RH121 10K_0402_5%RH121 10K _0402_5%

RH125 10K_0402_5%RH125 10K _0402_5%

RH128 10K_0402_5%RH128 10K _0402_5%

RH131 10K_0402_5%RH131 10K _0402_5%

RH135 10_0402_5%RH135 10_0402_5% RH137 10_0402_5%RH137 10_0402_5%

RH138 22_0402_5%RH138 22_0402_5%

RH139 22_0402_5%RH139 22_0402_5%

RH141 22_0402_5%RH141 22_0402_5%

RH234 22_0402_5%RH234 22_0402_5%

12

20120911 HP's request

12 12

20120911 HP's request

12 12

12

20120911 HP's request

12

20120911 HP's request

12

20120911 HP's request

12

12 12

12

CLK_PCIE_CR# CLK_PCIE_CR

FN14

CLK_TB_REFCLK#

CLK_TB_REFCLK

FN15

CLK_PCIE_EXP# CLK_PCIE_EXP CLKREQ_EXP#

CLK_PCIE_LAN# CLK_PCIE_LAN

CLK_PCIE_LAN_REQ1#

CLK_PCIE_MINI1#

CLK_PCIE_MINI1

MINI1_CLKREQ#

CLK_PCI0

PCI_LOOPBACKOUTCLK_PCI_LOOPBACK

CLK_PCI2

CLK_PCI4

UH1C

Y43

CLKOUT_PCIE_N_0

Y45

CLKOUT_PCIE_P_0

AB1

PCIECLKRQ0#/GPIO73

AA44

CLKOUT_PCIE_N_1

AA42

CLKOUT_PCIE_P_1

AF1

PCIECLKRQ1#/GPIO18

AB43

CLKOUT_PCIE_N_2

AB45

CLKOUT_PCIE_P_2

AF3

PCIECLKRQ2#/GPIO20/SMI#

AD43

CLKOUT_PCIE_N_3

AD45

CLKOUT_PCIE_P_3

T3

PCIECLKRQ3#/GPIO25

AF43

CLKOUT_PCIE_N_4

AF45

CLKOUT_PCIE_P_4

V3

PCIECLKRQ4#/GPIO26

AE44

CLKOUT_PCIE_N5

AE42

CLKOUT_PCIE_P_5

AA2

PCIECLKRQ5#/GPIO44

AB40

CLKOUT_PCIE_N_6

AB39

CLKOUT_PCIE_P_6

AE4

PCIECLKRQ6#/GPIO45

AJ44

CLKOUT_PCIE_N_7

AJ42

CLKOUT_PCIE_P_7

Y3

PCIECLKRQ7#/GPIO46

AH43

CLKOUT_ITPXDP

AH45

CLKOUT_ITPXDP_P

D44

CLKOUT_33MHZ0

E44

CLKOUT_33MHZ1

B42

CLKOUT_33MHZ2

F41

CLKOUT_33MHZ3

A40

CLKOUT_33MHZ4

CLOCK SIGNAL

LPT_PCH_M_EDS

LYNXPOINT_BGA695

2 OF 11

REV = 5

CLKOUT_PEG_A

CLKOUT_PEG_A_P

PEGA_CLKRQ#/GPIO47

CLKOUT_PEG_B

CLKOUT_PEG_B_P

PEGB_CLKRQ#/GPIO56

CLKOUT_DMI

CLKOUT_DMI_P

CLKOUT_DP

CLKOUT_DP_P

CLKOUT_DPNS

CLKOUT_DPNS_P

CLKIN_DMI

CLKIN_DMI_P

CLKIN_GND

CLKIN_GND_P

CLKIN_DOT96N

CLKIN_DOT96P

CLKIN_SATA

CLKIN_SATA_P

REFCLK14IN

CLKIN_33MHZLOOPBACK

XTAL25_IN

XTAL25_OUT

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

ICLK_IREF

TP19 TP18

DIFFCLK_BIASREF

AB35

CLK_PCIE_VGA#

AB36

CLK_PCIE_VGA

AF6

GFX_CLK_REQ#

20120703 Follow HP's GPIO table

Y39

Y38

U4

WLAN_TRAMSIT_OFF#

AF39

CLK_CPU_DMI#

AF40

CLK_CPU_DMI

AJ40

CLK_CPU_SSC_DPLL#

AJ39

CLK_CPU_SSC_DPLL

AF35

CLK_CPU_DPLL#

AF36

CLK_CPU_DPLL

AY24

CLK_BUF_DMI#

AW24

CLK_BUF_DMI

AR24

CLK_BUF_BCLK#

AT24

CLK_BUF_BCLK

H33

CLK_BUF_DOT96#

G33

CLK_BUF_DOT96

BE6

CLK_BUF_CKSSCD#

BC6

CLK_BUF_CKSSCD

F45

CLK_PCH_14M

D17

CLK_PCI_LOOPBACK

AM43 AL44

20120807 Corret pin name as Intel's specification

C40

F38

SIO_14M

F36

F39

AM45

ICLK_IREF

AD39 AD38

AN44

PCH_CLK_BIASREF

CLK_PCIE_VGA# <35>

CLK_PCIE_VGA <35>

RH109

10K_0402_5%

WLAN_TRAMSIT_OFF# <25>

CLK_CPU_DMI# <5>

CLK_CPU_DMI <5>

CLK_CPU_SSC_DPLL# <5>

CLK_CPU_SSC_DPLL <5>

CLK_CPU_DPLL# <5>

CLK_CPU_DPLL <5>

T91PAD~D @T91PAD~D @

T92PAD~D @T92PAD~D @

1 2

12

RH1400_0402_5% RH1400_0402_5%

RH1427.5K_0402_1% RH1427.5K_0402_1%

RH136 22_0402_5%RH136 22_0402_5%

2

1 3

D

Q55

XTAL25_IN XTAL25_OUT

CLK_SIO_14M <32>

Q55

12

+3V_PCH

+1.5VS

DGPU_PWR_EN <14,35>

G

2N7002KW_SOT323-3

S

PEG_CLK_REQ# <35>

RH132 1M_0402_5%RH132 1M_0402_5%

25MHZ_20PF_7A25000012

18P_0402_50V8J

1

2

1 2

CH21

YH2

12

18P_0402_50V8J

1

CH22

2

PCIECLK REQ Pull UP Power Rail: SUS Rail : 0 3 4 5 6 7 Core Rail: 1 2

A A

CLK_BUF_DMI# CLK_BUF_DMI

CLK_BUF_BCLK# CLK_BUF_BCLK

CLK_BUF_DOT96# CLK_BUF_DOT96

CLK_BUF_CKSSCD# CLK_BUF_CKSSCD

CLK_PCH_14M

1 2

RH108 10K_0402_5%R H108 10K_0402_5%

1 2

RH110 10K_0402_5%R H110 10K_0402_5%

1 2

RH111 10K_0402_5%R H111 10K_0402_5%

1 2

RH112 10K_0402_5%R H112 10K_0402_5%

1 2

RH115 10K_0402_5%R H115 10K_0402_5%

1 2

RH117 10K_0402_5%R H117 10K_0402_5%

1 2

RH119 10K_0402_5%R H119 10K_0402_5%

1 2

RH120 10K_0402_5%R H120 10K_0402_5%

1 2

RH123 10K_0402_5%R H123 10K_0402_5%

CLOCK TERMINATION for FCIM and need close to PCH

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

PCH- CLK

LA-9371P

1

15 53Friday, September 28, 2012

0.2

of

5

D D

+3VS

1 2

RH145 10K_0402_5%RH145 10K_0402_5%

C C

PCH_SPI_CLK<30>

PCH_SPI_CS0#<30>

PCH_SPI_SI<30>

PCH_SPI_SO<30>

PCH_SPI_WP#<30>

PCH_SPI_HOLD#<30>

B B

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SPI_SI

PCH_SPI_SO

PCH_SPI_WP#

PCH_SPI_HOLD#

SIRQ

LPC_LAD0<25,28,30,32>

LPC_LAD1<25,28,30,32>

LPC_LAD2<25,28,30,32>

LPC_LAD3<25,28,30,32>

LPC_LFRAME#<25,28,30,32>

LPC_LDRQ0#<32>

SIRQ<28,30,32>

1 2

RH154

1 2

RH155 4.99_0402_1%RH155 4.99_0402_1%

RH156

RH157 4.99_0402_1%RH157 4.99_0402_1%

RH243

RH244

LPC_LAD0

LPC_LAD1

LPC_LAD2

LPC_LAD3

LPC_LFRAME#

SIRQ

PCH_SPI_CLK_R

4.99_0402_1%

PCH_SPI_CS0#_R

12

PCH_SPI_SI_R

4.99_0402_1%

12

PCH_SPI_SO_R

12

PCH_SPI_WP#_R

15_0402_5%

12

PCH_SPI_HOLD#_R

15_0402_5%

20120719 HP's request 20120726 HP's request

A20

LAD_0

C20

LAD_1

A18

LAD_2

C18

LAD_3

B21

LFRAME#

D21

LDRQ0#

G20

LDRQ1#/GPIO23

AL11

SERIRQ

AJ11

SPI_CLK

AJ7

SPI_CS0#

AL7

SPI_CS1#

AJ10

SPI_CS2#

AH1

SPI_MOSI

AH3

SPI_MISO

AJ4

SPI_IO2

AJ2

SPI_IO3

LYNXPOINT_BGA695

4

LPT_PCH_M_EDS

REV = 5UH1D

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK

CL_DATA

CL_RST#

TD_IREF

N7

R10

U11

N8

U8

R7

H6

K6

N11

AF11

AF10

AF7

BA45

TP1

BC45

TP2

BE43

TP4

BE44

TP3

AY43

SMBus

SPILPC

4 OF 11

C-Link

Thermal

SMBALERT#/GPIO11

SML0ALERT#/GPIO60

SML1ALERT#/PCHHOT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

3

FPR_OFF

MEM_SMBCLK

MEM_SMBDATA

DDR_RST_EN

LAN_SMBCLK

LAN_SMBDATA

NFC_RST#

SML1_SMBCLK

SML1_SMBDATA

CL_CLK1

CL_DATA1

CL_RST1#

1 2

PCH_TD_IREF

RH158 8.2K_0402_1%RH158 8.2K_0402_1%

FPR_OFF <28>

DDR_RST_EN <5>

LAN_SMBCLK <29>

LAN_SMBDATA <29>

NFC_RST# <39>

20120703 Add for NFC

CL_CLK1 <25>

CL_DATA1 <25>

CL_RST1# <25>

MEM_SMBCLK

MEM_SMBDATA

LAN_SMBCLK

LAN_SMBDATA

SML1_SMBCLK

SML1_SMBDATA

+3VS

3 4

QH3B

+3VS

DMN66D0LDW-7_SOT363-6

2

6 1

DMN66D0LDW-7_SOT363-6

QH10A

@

2

6 1

DMN66D0LDW-7_SOT363-6

QH3A

5

DMN66D0LDW-7_SOT363-6

5

QH10B

@

3 4

DMN66D0LDW-7_SOT363-6

QH9A

2

QH9B

34

DMN66D0LDW-7_SOT363-6

5

FPR_OFF

MEM_SMBCLK

MEM_SMBDATA

DDR_RST_EN

NFC_RST#

SML1_SMBCLK

SML1_SMBDATA

LAN_SMBCLK

LAN_SMBDATA

@

RH238

2.2K_0402_5%

@

RH239

2.2K_0402_5%

61

12

RH14310K_0402_5% RH14310K_0402_5%

12

RH1442.2K_0402_5% RH1442.2K_0402_5%

12

RH1462.2K_0402_5% RH1462.2K_0402_5%

12

RH1482.2K_0402_5% RH1482.2K_0402_5%

12

RH14910K_0402_5% RH14910K_0402_5%

1 2

RH1502.2K_0402_5% RH1502.2K_0402_5%

1 2

RH1512.2K_0402_5% RH1512.2K_0402_5%

12

RH1522.2K_0402_5% RH1522.2K_0402_5%

12

RH1532.2K_0402_5% RH1532.2K_0402_5%

DDR_XDP_WAN_SMBCLK <11,12,13,28,38,5>

DDR_XDP_WAN_SMBDAT <11,12,13,28,38,5>

12

+3VS

NFC_3S_SMBCLK <39>

12

+3VS

NFC_3S_SMBDAT <39>

20120703 Add for NFC 20120920 Uninstall QH10, RH238, RH239

PCH_KBC_I2CLK <30,35>

+3V_PCH

PCH_KBC_I2CDAT <30,35>

+3V_PCH

1

+3V_PCH

20120807 Change RH148 to 2.2K as HP's request

20120703 Add RH149 for NFC

+3VM_LAN

Screw Hole

H19

H18

H17

H5

H3

H_3P0

HOLEA

@

1

H28

H27

H24

H_3P0

HOLEA

20120709 Delete by HP's request

ZZZ2

ZZZ1

A A

45@

DCIN

PCB

MB

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

@

1

H42

H43

H_3P0

HOLEA

@

1

2012/06/11 2013/06/11

H_3P0

HOLEA

@

1

@

1

H34

H_6P0X7P0

HOLEA

@

1

H_3P0

HOLEA

@

1

H38

H_3P0

HOLEA

1

Compal Secret Data

@

Stand Off CPU Bracket

H11

H33

H20

H21

H10

H9

H_3P3

HOLEA

@

1

H4

H1

H_3P8

HOLEA

@

1

H30

H15

H_3P8

HOLEA

@

1

Deciphered Date

2

H_3P3

HOLEA

@

1

H8

H6

H_3P8

HOLEA

@

1

H39

H_3P8

HOLEA

@

1

H_4P0

H_3P3

HOLEA

@

1

H7

H_3P8

HOLEA

1

@

1

H37

H_2P1N

HOLEA

1

FD1

FD1 FIDUCIAL_C40M80

FIDUCIAL_C40M80

FD3

FD3 FIDUCIAL_C40M80

FIDUCIAL_C40M80

H13

H12

H_4P0

H_3P7

HOLEA

@

1

H46

H41

H_2P6X2P1N

H_3P3N

HOLEA

@

1

@

1

@

1

FD2

FD2 FIDUCIAL_C40M80

FIDUCIAL_C40M80

1

FD4

FD4 FIDUCIAL_C40M80

FIDUCIAL_C40M80

1

Title

Size Document Number Rev

Custom

Date: Sheet of

Keyboard

H14

H_4P0

HOLEA

1

@

H32

H_6P0

HOLEA

@

H36

H_3P6X2P1N

HOLEA

@

1

@

1

Travel BATT

H44

H_3P0N

HOLEA

@

1

Compal Electronics, Inc.

PCH - SPI, SMBUS,LPC

LA-9371P

H26

H_6P0

HOLEA

1

H45

H_3P0N

HOLEA

1

@

0.2

16 53Friday, September 28, 2012

0.2

5

D D

PCIE_PRX_DTX_N1<39> PCIE_PRX_DTX_P1<39>

PCIE_PTX_C_DRX_N1<39> PCIE_PTX_C_DRX_P1<39>

PCIE_PRX_DTX_N2<39> PCIE_PRX_DTX_P2<39>

PCIE_PTX_C_DRX_N2<39> PCIE_PTX_C_DRX_P2<39>

ThunderBolt

C C

Express card slot

GIGA LAN

WLAN

Card Reader

B B

PCIE_PRX_DTX_N3<39> PCIE_PRX_DTX_P3<39>

PCIE_PTX_C_DRX_N3<39> PCIE_PTX_C_DRX_P3<39>

PCIE_PRX_DTX_N4<39> PCIE_PRX_DTX_P4<39>

PCIE_PTX_C_DRX_N4<39> PCIE_PTX_C_DRX_P4<39>

PCIE_PRX_EXPTX_N5<39> PCIE_PRX_EXPTX_P5<39>

PCIE_PTX_EXPRX_N5<39> PCIE_PTX_EXPRX_P5<39>

PCIE_PRX_DTX_N6<29> PCIE_PRX_DTX_P6<29>

PCIE_PTX_C_DRX_N6<29> PCIE_PTX_C_DRX_P6<29>

PCIE_PRX_DTX_N7<25> PCIE_PRX_DTX_P7<25>

PCIE_PTX_C_DRX_N7<25> PCIE_PTX_C_DRX_P7<25>

PCIE_PRX_DTX_N8<39> PCIE_PRX_DTX_P8<39>

PCIE_PTX_C_DRX_N8<39> PCIE_PTX_C_DRX_P8<39>

1 2

CH108 0.1U_0402_10V7KCH1 08 0.1U_0402_10V7K

1 2

CH109 0.1U_0402_10V7KCH1 09 0.1U_0402_10V7K

1 2

CH110 0.1U_0402_10V7KCH1 10 0.1U_0402_10V7K

1 2

CH111 0.1U_0402_10V7KCH1 11 0.1U_0402_10V7K

1 2

CH27 0.1U_0402_10V 7KCH27 0.1U_0402_10V7K

1 2

CH28 0.1U_0402_10V 7KCH28 0.1U_0402_10V7K

1 2

CH29 0.1U_0402_10V7KCH29 0.1U_0402_10V7K

1 2

CH30 0.1U_0402_10V7KCH30 0.1U_0402_10V7K

1 2

CH100 0.1U_0402_10V7KCH100 0.1U_0402_10V7K

1 2

CH99 0.1U_0402_10V7KCH99 0.1U_0402_10V7K

1 2

CH31 0.1U_0402_10V7KCH31 0.1U_0402_10V7K

1 2

CH32 0.1U_0402_10V7KCH32 0.1U_0402_10V7K

1 2

CH33 0.1U_0402_10V 7KCH33 0.1U_0402_10V7K

1 2

CH34 0.1U_0402_10V 7KCH34 0.1U_0402_10V7K

1 2

CH35 0.1U_0402_10V7KCH35 0.1U_0402_10V7K

1 2

CH36 0.1U_0402_10V7KCH36 0.1U_0402_10V7K

+1.5VS

4

PCIE_PRX_DTX_N1 PCIE_PRX_DTX_P1

PCIE_PTX_DRX_N1 PCIE_PTX_DRX_P1

PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2

PCIE_PTX_DRX_N2 PCIE_PTX_DRX_P2

20120718 HP's request

PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3

PCIE_PTX_DRX_N3 PCIE_PTX_DRX_P3

PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4

PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4

PCIE_PRX_EXPTX_N5 PCIE_PRX_EXPTX_P5

PCIE_PTX_EXPRX_N5_C PCIE_PTX_EXPRX_P5_C

PCIE_PRX_DTX_N6 PCIE_PRX_DTX_P6

PCIE_PTX_DRX_N6 PCIE_PTX_DRX_P6

PCIE_PRX_DTX_N7 PCIE_PRX_DTX_P7

PCIE_PTX_DRX_N7 PCIE_PTX_DRX_P7

PCIE_PRX_DTX_N8 PCIE_PRX_DTX_P8

PCIE_PTX_DRX_N8 PCIE_PTX_DRX_P8

1 2

RH160 0_0402_5%RH160 0_0402_5%

1 2

RH164 7.5K_0402_1%RH164 7.5K_0402_1%

PCH_PCIE_IREF

PCH_PCIE_RCOMP

AW31

AY31

BE32 BC32

AT31

AR31

BD33 BB33

AW33

AY33

BE34 BC34

AT33

AR33

BE36 BC36

AW36

AV36

BD37 BB37

AY38

AW38

BC38 BE38

AT40 AT39

BE40 BC40

AN38 AN39

BD42 BD41

BE30

BC30

BB29

BD29

PERN1/USB3RN3 PERP1/USB3RP3

PETN1/USB3TN3 PETP1/USB3TP3

PERN2/USB3RN4 PERP2/USB3RP4

PETN2/USB3TN4 PETP2/USB3TP4

PERN_3 PERP_3

PETN_3 PETP_3

PERN_4 PERP_4

PETN_4 PETP_4

PERN_5 PERP_5

PETN_5 PETP_5

PERN_6 PERP_6

PETN_6 PETP_6

PERN_7 PERP_7

PETN_7 PETP_7

PERN_8 PERP_8

PETN_8 PETP_8

PCIE_IREF

TP11

TP6

PCIE_RCOMP

L

YNXPOINT_BGA695

LPT_PCH_M_EDS

PCIe

9 OF 11

3

REV = 5UH1I

USB

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC6#/GPIO10 OC7#/GPIO14

USB2N0 USB2P0 USB2N1 USB2P1 USB2N2 USB2P2 USB2N3 USB2P3 USB2N4 USB2P4 USB2N5 USB2P5 USB2N6 USB2P6 USB2N7 USB2P7 USB2N8 USB2P8 USB2N9

USB2P9 USB2N10 USB2P10 USB2N11 USB2P11 USB2N12 USB2P12 USB2N13 USB2P13

USB3RN1

USB3RP1 USB3TN1 USB3TP1

USB3RN2

USB3RP2 USB3TN2 USB3TP2

USB3RN5

USB3RP5 USB3TN5 USB3TP5

USB3RN6

USB3RP6 USB3TN6 USB3TP6

USBRBIAS#

USBRBIAS

TP24 TP23

OC5#/GPIO9

B37 D37 A38 C38 A36 C36 A34 C34 B33 D33 F31 G31 K31 L31 G29 H29 A32 C32 A30 C30 B29 D29 A28 C28 G26 F26 F24 G24

AR26 AP26 BE24 BD23 AW26 AV26 BD25 BC24 AW29 AV29 BE26 BC26 AR29 AP29 BD27 BE28

K24 K26

M33 L33

P3

USB_OC0#_R

V1

USB_OC1#_R

U2

USB_OC2#

P1

USB_OC3#

M3

USB_OC4#_R

T1

dGPU_HPD_INTR

N2 M1

USB_OC7#_R

USBP0USBP0+ USBP1USBP1+

USBP4USBP4+ USBP5USBP5+ USBP6USBP6+ USBP7USBP7+ USBP8USBP8+ USBP9USBP9+ USBP10USBP10+ USBP11USBP11+ USBP12USBP12+ USBP13USBP13+

USB3RN1 USB3RP1 USB3TN1 USB3TP1 USB3RN2 USB3RP2 USB3TN2 USB3TP2 USB3RN5 USB3RP5 USB3TN5 USB3TP5 USB3RN6 USB3RP6 USB3TN6 USB3TP6

USBRBIAS

RH165 0_0402_5%

RH242 0_0402_5%RH242 0_0402_5%

USBP0- <33>

USBP0+ <33>

USBP1- <39>

USBP1+ <39>

USBP4- <39>

USBP4+ <39>

USBP5- <39>

USBP5+ <39>

USBP6- <39>

USBP6+ <39>

USBP7- <37>

USBP7+ <37>

USBP8- <28>

USBP8+ <28>

USBP9- <39>

USBP9+ <39>

USBP10- <22>

USBP10+ <22>

USBP11- <33>

USBP11+ <33>

USBP12- <25>

USBP12+ <25>

USBP13- <25>

USBP13+ <25>

USB3RN1 <33>

USB3RP1 <33 >

USB3TN1 <33>

USB3TP1 <33>

USB3RN2 <39>

USB3RP2 <39 >

USB3TN2 <39>

USB3TP2 <39>

USB3RN5 <39>

USB3RP5 <39 >

USB3TN5 <39>

USB3TP5 <39>

USB3RN6 <39>

USB3RP6 <39 >

USB3TN6 <39>

USB3TP6 <39>

1 2

@

1 2

20120718 HP's request

2

----->Docking USB 3.0

----->USB 3.0 Walkup port 1

----->NA

----->USB 3.0 Walkup port 2

----->USB 3.0 Walkup port 3

----->Express card slot

----->Smart card reader

----->Finger Print Reader

----->Walkup USB 2.0/ USB Charging port

----->USB Camera

----->Docking USB 2.0 port

----->WWAN

----->BT/WLAN Combo

----->Docking USB 3.0

----->USB 3.0 Walkup port 2

----->USB 3.0 Walkup port 5

----->USB 3.0 Walkup port 6

USB_OC0#_R <13> USB_OC1#_R <13> USB_OC2# < 13> USB_OC3# < 13> USB_OC4#_R <13>

dGPU_HPD_INTR <13,35> LED_LINK_LAN#_R <13 ,29> USB_OC7# < 13>

TB_HOT_PLUG# <39>

1

USBRBIAS

CAD NOTE: Route single-end 50-ohms and max 500-mils length. Avoid routing next to clock pins or under stitching capacitors. Recommended minimum spacing to other signal traces is 15 mils.

22.6_0402_1%

12

RH159

USB_OC0#_R dGPU_HPD_INTR USB_OC2# USB_OC1#_R

USB_OC4#_R USB_OC7#_R

LED_LINK_LAN#_R

USB_OC3#

+3V_PCH

RPH1

4 5 3 6 2 7 1 8

10K_1206_8P4R_5%

RPH2

4 5 3 6 2 7 1 8

10K_1206_8P4R_5%

20120702 Swap for layout routing

20120911 For DB1-R platform ID

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH-PCIE,USB

LA-9371P

1

17 53Friday, September 28, 2012

0.2

5

+3VS

RH167 10K_0402_5%RH167 10K_0402_5%

RH169 100K_0402_5%RH169 100K_0402_5%

RH240 10K_0402_5%RH240 10K_0402_5%

RH171 10K_0402_5%RH171 10K_0402_5%

RH175 8.2K_0402_5%RH175 8.2K_0402_5%

RH176 10K_0402_5%@ RH176 10K_0402_5%@

D D

C C

RH177 10K_0402_5%RH177 10K_0402_5%

RH172 10K_0402_5%RH172 10K_0402_5%

RH173 10K_0402_5%RH173 10K_0402_5%

RH178 10K_0402_5%RH178 10K_0402_5%

RH241 10K_0402_5%RH241 10K_0402_5%

+3V_PCH

RH182 10K_0402_5%RH182 10K_0402_5%

RH183 10K_0402_5%RH183 10K_0402_5%

RH184 10K_0402_5%RH184 10K_0402_5%

RH185 10K_0402_5%

+3V_PCH

4.7K_0402_5%

RH193

1 2

1K_0402_1%

12

1 2

@

PCH_GPIO28

@RH194

@

RH194

12

PCH_GPIO0

12

OCP_OC#

12

THERM_SCI#

12

ODD_EN

DGPU_PWROK

12

FPR_LOCK#

DOCK_ID0

DOCK_ID1

KBC_SIO_RST#

EC_SCI#

12

WWA N_TRANSMIT_OFF#

12

PCH_GPIO24

12

PCH_GPIO8

12

LAN_DIS#

12

NFC_INT

20120703 Change for NFC

OCP_PWM_OUT<30>

20120705 Add PU resistor

20120705 Correct net name to follow GPIO table

2

G

20120703 Change for NFC

PLL ON DIE VR ENABLE

ENABLED - HIGH(DEFAULT) DISABLED - LOW

4

Q582N7002KW_SOT323-3

13

D

S

EC_SCI#<30>

PCH_GPIO8<13>

LAN_DIS#<29>

KBL_DET#<13,38>

DGPU_PWROK<35>

WWA N_TRANSMIT_OFF#<25>

LANWAKE#<29>

20120801 HP's request

mSATA_DET#<13,23>

Sec_HDD_DET<13>

PCH_GPIO37<13>

FPR_LOCK#<28>

DGPU_PRSNT#<13,35>

NFC_INT<39>

ODD_EN<23>

@

KBC_SIO_RST#<30,32>

GPS_XMIT_OFF#<25>

T140 PAD@T140 PAD

PCH_GPIO0

OCP_OC#

EC_SCI#

THERM_SCI#

PCH_GPIO8

LAN_DIS#

PCH_GPIO15

KBL_DET#

DGPU_PWROK

WWA N_TRANSMIT_OFF#

PCH_GPIO24

LANWAKE#

PCH_GPIO28

PCH_GPIO34

mSATA_DET#

Sec_HDD_DET

PCH_GPIO37

DOCK_ID0

DOCK_ID1

FPR_LOCK#

DGPU_PRSNT#

NFC_INT

ODD_EN

D3E_WAKE#

KBC_SIO_RST#

GPS_XMIT_OFF#

UH1F

AT8

BMBUSY#/GPIO0

F13

TACH1/GPIO1

A14

TACH2/GPIO6

G15

TACH3/GPIO7

Y1

GPIO8

K13

LAN_PHY_PWR_CTRL/GPIO12

AB11

GPIO15

AN2

SATA4GP/GPIO16

C14

TACH0/GPIO17

BB4

SCLOCK/GPIO22

Y10

GPIO24

R11

GPIO27

AD11

GPIO28

AN6

GPIO34

AP1

GPIO35/NMI#

AT3

SATA2GP/GPIO36

AK1

SATA3GP/GPIO37

AT7

SLOAD/GPIO38

AM3

SDATAOUT0/GPIO39

AN4

SDATAOUT1/GPIO48

AK3

SATA5GP/GPIO49

U12

GPIO57

C16

TACH4/GPIO68

D13

TACH5/GPIO69

G13

TACH6/GPIO70

H15

TACH7/GPIO71

BE41

VSS

BE5

VSS

C45

VSS

A5

VSS

L

YNXPOINT_BGA695

3

LPT_PCH_M_EDS

GPIO

6 OF 11

2

REV = 5

CPU/Misc

AN10

AY1

AT6

AV3

AV1

AU4

N10

A2 A41 A43 A44 B1 B2 B44 B45 BA1 BC1 BD1 BD2 BD44 BD45 BE2 BE3 D1 E1 E45 A4

A20GATE

RCIN#

H_CPUPWRGD

PCH_THERMTRIP#_R

CPU_PLTRST#

TP14

PECI

RCIN#

PROCPWRGD

THRMTRIP#

PLTRST_PROC#

VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NCTF

VSS VSS VSS

A20GATE <30>

T104PAD~D @T104PAD~D @

H_CPUPWRGD <5>

CPU_PLTRST# <5>

A20GATE

RCIN#

RH179 56_0402_5%RH179 56_0402_5%

0.1U_0402_16V4Z

1

CH37

2

12

PCH_THERMTRIP#_R

1

+3VS

12

RH16610K_0402_5% RH16610K_0402_5%

12

RH16810K_0402_5% RH16810K_0402_5%

+1.05VS

PCH_THERMTRIP#_R <35,5>

12

RH198 10K_0402_5%RH198 10K_0402_5%

RH200 10K_0402_5%RH200 10K_0402_5%

SATA2GP/GPIO36 , SATA3GP/GPIO37 SAMPLED AT RISING EDGE OF PWROK. WEAK INTERNAL PULL-DOWN.(WEAK INTERNAL PULL-DOWN IS DISABLED AFTER PLRST_N DE-ASSERTS).

B B

NOTE: THIS SIGNAL SHOLD NOT BE PULLED HIGH WHEN STRAP IS SAMPLED.

Config

USB X4,PCIEX8,SATAX6

A A

5

12

GPIO16,49

11

01USB X6,PCIEX8,SATAX4

Sec_HDD_DET

PCH_GPIO37

20120801 HP's request

+3VS

1 2

RH197 10K_0402_5%RH197 10K_0402_5%

RH199 10K_0402_5%RH199 10K_0402_5%

KBL_DET#

12

DGPU_PRSNT#

20120802 Delete RH201/RH202 as HP's request

4

1 2

RH181 1K_0402_1%RH181 1K_0402_1%

1 2

RH170

+3VS

Board ID

1 2

RH180

BRD_ID1 BRD_ID2

GPIO15 GPIO34 GPIO35 GPIO40

DB0

DB1

DB2

SI1

SI1B

SI2

PV1

MV

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

0

2

1

PCH_GPIO15

PCH_GPIO34

100K_0402_5%

mSATA_DET#

10K_0402_5%

0

1

10

1

0

1

GPIO15

GPIO34

GPIO35

20120801 HP's request 20120911 HP's request

BRD_ID3

0

1

0

BRD_ID4

0

1

0

1

0

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH -GPIO,MISC,NTFC

LA-9371P

18 53Friday, September 28, 2012

1

0.2

5

D D

+1.05VS

10U_0603_6.3V6M

1U_0402_6.3V6K

1

CH39

CH38

C C

B B

2

CH38

+1.05VM

2

22U_0805_6.3V6M

1

CH49

2

1U_0402_6.3V6K

1

CH43

CH44

2

1U_0402_6.3V6K

1

CH50

CH51

2

+PCH_VCCDSW

4

AA24 AA26 AD20 AD22 AD24 AD26 AD28 AE18 AE20 AE22 AE24 AE26 AG18 AG20 AG22 AG24

Y26

U14

AA18

U18 U20 U22 U24 V18 V20 V22 V24 Y18 Y20 Y22

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

DCPSUSBYP VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW VCCASW

L

YNXPOINT_BGA695

LPT_PCH_M_EDS

Core

PCIe/DMI

VCCMPHY

7 OF 11

CRT DAC

FDI

HVCMOS

USB3

SATA

3

+VCCADAC

0.01U_0402_16V7K

0.1U_0402_16V4Z

10U_0603_6.3V6M

1

CH40

2

REV = 5UH1G

VCCADAC1_5

VCCADACBG3_3

VCC3_3_R30 VCC3_3_R32

VSS

VCCVRM

VCCIO

DCPSUS1

VCCSUS3_3 VCCSUS3_3

DCPSUS3 DCPSUS3

VCCIO VCCVRM VCCVRM

VCCVRM

VCCIO

VCCVRM

VCCIO

P45

P43

M31

BB44

AN34

AN35

R30 R32

Y12

+PCH_USB_DCPSUS1

AJ30 AJ32

AJ26

+PCH_USB_DCPSUS3

AJ28 AK20 AK26 AK28

BE22

AK18

AN11

AK22

AM18 AM20 AM22 AP22 AR22 AT22

+3VS

+1.05VS

T142T142

T143T143

1U_0402_6.3V6K

1

CH55

2

10U_0603_6.3V6M

1

CH41

CH42

2

1U_0402_6.3V6K

1

CH57

CH56

2

LH1

BLM18PG181SN1D_2P

+1.05VS

1U_0402_6.3V6K

12

+3V_PCH

0.1U_0402_16V4Z

1

2

+1.5VS

10U_0603_6.3V6M

1

CH59

CH58

2

1

+1.5VS

+1.05VS

+3VS

0.1U_0402_16V4Z

1

CH47

2

CH48

+1.5VS

10U_0603_6.3V6M

1

@

CH53

10U_0603_6.3V6M

2

1

@

CH54

2

10U_0603_6.3V6M

1U_0402_6.3V6K

1

@

CH45

1

2

CH45

CH46

2

10U_0603_6.3V6M

1

@

CH52

2

1 2

RH204 5.11_0402_1%~DRH204 5.11_0402_1%~D

+PCH_VCCDSW_R

1U_0402_6.3V6K

1

CH61

2

A A

5

+PCH_VCCDSW

20120720 Delete CH60, CH62, CH63 as HP's request

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

PCH- Power

LA-9371P

1

19 53Friday, September 28, 2012

0.2

of

5

D D

+3V_PCH

0.1U_0402_10V6K

+1.05VS

1

CH65

0.1U_0402_10V6K

2

C C

LH2

1 2

4.7UH_LQM18FN4R7M00D_20%

0.1U_0402_10V6K

+3VS

1

CH67

0.1U_0402_10V6K

2

0.1U_0402_10V6K

+1.05VS

CH68

1

0.1U_0402_10V6K

2

20120720 Delete CH101 as HP's request

+1.5VS

1

CH70

10U_0603_6.3V6M

1

2

CH72

2

+1.05VS_VCC+1.05VS

+1.05VS_VCC

1U_0402_6.3V6K

10U_0603_6.3V6M

1

CH81

CH80

2

4

T144T144

+PCH_VCCCLK

+PCH_VCCCLK3_3

+PCH_VCCCLK

+1.05VS_VCC

S2

AF34

AP45

AD34

AA30 AA32

AD35

AG30 AG32

AD36

AE30 AE32

R24 R26 R28 U26

M24

U35

L24

U30

V28 V30 Y30

Y35

Y32

M29

L29

L26

M26

U32

V32

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VSS

VCCUSBPLL

VCC3_3

VCCIO VCCIO VCCIO VCCIO

DCPSUS2

VCCVRM

VCC

VCCCLK

VCCCLK3_3

VCCCLK3_3 VCCCLK3_3

VCCCLK

VCCCLK VCCCLK

VCCCLK

VCCCLK VCCCLK

VCCCLK

VCCCLK VCCCLK

L

YNXPOINT_BGA695

LPT_PCH_M_EDS

USB

ICC

8 OF 11

REV = 5UH1H

GPIO/LPC

RTC

Fuse

Thermal

Azalia

CPU

SPI

3

+3V_PCH

VCCSUS3_3 VCCSUS3_3

VCCDSW3_3

DCPSST

VCC3_3 VCC3_3 VCC3_3

VCCIO

VCCSUSHDA

VCCSUS3_3

VCCRTC

DCPRTC DCPRTC

V_PROC_IO V_PROC_IO

VCCSPI

VCCASW

VCCVRM

VCC3_3

VCC VCC

R20 R22

A16

AA14

AE14 AF12 AG14

U36

A26

K8

A6

P14

+PCH_DCPRTC

P16

AJ12 AJ14

AD12

P18 P20

L17

R18

AW40

AK30

AK32

CH104

1 2

0.1U_0402_10V6K

+PCH_VCCDSW3_3

+PCH_VCCSST

CH66 0.1U_0402_10V6KCH66 0.1U_0402_10V6K

+1.05VS

CH74 0.1U_0402_10V7K~DCH74 0.1U_0402_10V7K~D

+1.05VS

CH105 0.1U_0402_10V6KCH105 0.1U_0402_10V6K CH83 0.1U_0402_10V6KCH83 0.1U_0402_10V6K CH84 1U_0402_6.3V6KCH84 1U_0402_6.3V6K

20120725 HP's request

+1.05VM

+1.5VS

1 2

1 2 1 2 1 2

1

2

+3VS

1U_0402_6.3V6K

CH92

2

0.1U_0402_10V6K

CH64

1

2

1U_0402_6.3V6K

20120911 Delete RH226 HP's request

1

CH79

2

+3VS

0.1U_0402_10V6K

1

CH85

+3V_PCH

1

+3V_PCH

12

RH2080_0402_5% RH2080_0402_5%

12

+3VDS

RH2090_0402_5% @ RH2090_0402_5% @

+3VS

0.01U_0402_16V7K_X7R

+3V_PCH

1U_0402_6.3V6K

+RTCVCC

0.1U_0402_10V6K

1

CH75

2

1U_0402_6.3V6K

1

CH73

1U_0402_6.3V6K

2

1

CH76

CH77

2

0.01U_0402_16V7K_X7R

CH69

1

2

0.1U_0402_10V7K~D

1

CH71

2

B B

+1.05VS

1 2

RH213 0_0805_5%RH213 0_0805_5%

+PCH_VCCCLK

10U_0603_6.3V6M

1

2

1U_0402_6.3V6K

CH87

1

@

CH86

2

1U_0402_6.3V6K

CH88

1

2

1U_0402_6.3V6K

CH89

1

2

1U_0402_6.3V6K

CH90

1

2

1U_0402_6.3V6K

CH91

1

2

Place near pin AP45 Place near pin Y32,AA30,AA32 Place near pin AD34 Place near pin AD35,AD36 Place near pin AG30,AG32,AE30,AE32

+3VS

1 2

RH216 0_0805_5%RH216 0_0805_5%

A A

5

+PCH_VCCCLK3_3

1U_0402_6.3V6K

CH93

1

2

1U_0402_6.3V6K

CH94

1

2

1U_0402_6.3V6K

CH95

1

2

1U_0402_6.3V6K

CH96

1

2

Place near pin M29 Place near pin L29 Place near pin L26,M26 Place near pin U32,V32

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2012/06/11 2013/06/11

3

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

PCH - Power

LA-9371P

20 53Friday, September 28, 2012

1

0.2

of

5

D D

AL34

VSS

AL38

VSS

AL8

VSS

AM14

VSS

AM24

VSS

AM26

VSS

AM28

VSS

AM30

VSS

AM32

VSS

AM16

VSS

AN36

VSS

AN40

VSS

AN42

VSS

AN8

VSS

AP13

VSS

AP24

VSS

AP31

VSS

AP43

C C

B B

VSS

AR2

VSS

AK16

VSS

AT10

VSS

AT15

VSS

AT17

VSS

AT20

VSS

AT26

VSS

AT29

VSS

AT36

VSS

AT38

VSS

D42

VSS

AV13

VSS

AV22

VSS

AV24

VSS

AV31

VSS

AV33

VSS

BB25

VSS

AV40

VSS

AV6

VSS

AW2

VSS

F43

VSS

AY10

VSS

AY15

VSS

AY20

VSS

AY26

VSS

AY29

VSS

AY7

VSS

B11

VSS

B15

VSS

LYNXPOINT_BGA695

UH1J

4

LPT_PCH_M_EDS

REV = 5

10 OF 11

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

K39 L2 L44 M17 M22 N12 N35 N39 N6 P22 P24 P26 P28 P30 P32 R12 R14 R16 R2 R34 R38 R44 R8 T43 U10 U16 U28 U34 U38 U42 U6 V14 V16 V26 V43 W2 W44 Y14 Y16 Y24 Y28 Y34 Y36 Y40 Y8

3

LPT_PCH_M_EDS

UH1K

AA16

VSS

AA20

VSS

AA22

VSS

AA28

VSS

AA4

VSS

AB12

VSS

AB34

VSS

AB38

VSS

AB8

VSS

AC2

VSS

AC44

VSS

AD14

VSS

AD16

VSS

AD18

VSS

AD30

VSS

AD32

VSS

AD40

VSS

AD6

VSS

AD8

VSS

AE16

VSS

AE28

VSS

AF38

VSS

AF8

VSS

AG16

VSS

AG2

VSS

AG26

VSS

AG28

VSS

AG44

VSS

AJ16

VSS

AJ18

VSS

AJ20

VSS

AJ22

VSS

AJ24

VSS

AJ34

VSS

AJ38

VSS

AJ6

VSS

AJ8

VSS

AK14

VSS

AK24

VSS

AK43

VSS

AK45

VSS

AL12

VSS

AL2

VSS

BC22

VSS

BB42

VSS

LYNXPOINT_BGA695

REV = 5

11 OF 11

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

B19 B23 B27 B31 B35 B39 B7 BA40 BD11 BD15 BD19 AY36 AT43 BD31 BD35 BD39 BD7 D25 AV7 F15 F20 F29 F33 BC16 D4 G2 G38 G44 G8 H10 H13 H17 H22 H24 H26 H31 H36 H40 H7 K10 K15 K20 K29 K33 BC28

2

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH - GND

LA-9371P

1

21 53Friday, September 28, 2012

0.2

5

4

3

2

1

D D

DMN66D0LDW-7_SOT363-6

ENAVDD<35>

C C

ENABLT<35>

LID_SW#<30,39>

B B

USBP10+<17>

USBP10-<17>

+LCDVDD

12

R9

100_0603_5%

61

Q12A

ENAVDD

R490

100K_0402_5%

ENABLT

R12

12

R15 0_0402_5%

2

12

1 2

2K_0402_5%

R13

R13 100K_0402_5%

100K_0402_5%

RB751V-40_SOD323-2

@

1 2

L3

1

4

WCM-2012-900T_4P

1 2

LCD POWER CIRCUIT

+5VS

12

R10

R10 100K_0402_5%

100K_0402_5%

R11

R11 200K_0402_5%

200K_0402_5%

12

@

C6

0.047U_0402_16V7K

34

Q12B

Q12B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

5

D3

21

2

3

R16 0_0402_5%

@

C6

ENABLT_R

USB20_P10_R

USB20_N10_R

+3VS

=60mils

W

1

C1

4.7U_0603_6.3V6K

2

3

S

Q20

2

AO3413L_SOT23-3

G

D

1

+LCDVDD

2

1

C7

+3VS

2

4.7U_0603_6.3V6K

20120711 Change to +3VS as HP's request

4.7U_0603_6.3V6K

W=60mils

1

C8

0.1U_0402_16V4Z

2

C22 680P_04 02_50V7KC2 2 680P_0402_50V7K

1

C367

@C367

@

18P_0402_50V8J

2

1

@

C368

18P_0402_50V8J

2

20120719 RF's request

20120731 Delete KB LOGO circuit

12

INV_PWM

07/06 Change for eDP MUX

EDP_SW_D3N<36> EDP_SW_D3P<36>

EDP_SW_D2N<36> EDP_SW_D2P<36>

EDP_SW_D1N<36> EDP_SW_D1P<36>

EDP_SW_D0N<36>

EDP_SW_D0P<36>

EDC_SW_AUX<36>

EDC_SW_AUX#<36>

INV_PWM<35>

100K_0402_5%

+LCDVDD

1

2

+3VS

INV_PWM

R491

C2

10U_0603_6.3V6M

100K_0402_5%

12

0.1U_0402_16V4Z

Place closed to JLVDS1

1

C3

0.1U_0402_16V4Z

2

1 2

R179

R178

R178 100K_0402_5%

100K_0402_5%

1 2

+3VS

1

C83

Camera_ON<14>

2

EDP_SW_HPD<36>

D_MIC_CLK<26> D_MIC_DATA<26>

680P_0402_50V7K

+LCDVDD

SG_IN<13>

INVPWR_B+

INVPWR_B+ B+

FBMA-L11-201209-221LMA30T_0805

W=60mils

C4

FBMA-L11-201209-221LMA30T_0805

1

C5

C5 68P_0402_50V8J

68P_0402_50V8J

2

eDP PANEL Conn.

W=60mils

EDP_SW_HPD ENABLT_R

D_MIC_CLK D_MIC_DATA

+5VS

USB20_P10_R USB20_N10_R

L1

12

L2

12

SM010014520 3000ma 220ohm@100mhz DCR 0.04

W=60mils

JEDP1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

ACES_50398-04071-001

CONN@

20120911 Change JEDP1's footprint

20120913 Modify pin assignment

+5VS

4.7U_0603_6.3V6K

C84

C81

1

2

41

G1

42

G2

43

G3

44

G4

45

G5

0.1U_0402_16V4Z

1U_0402_6.3V6K

C23

C82

1

2

C80

1

2

47P_0402_50V8J

0.01U_0402_25V7K

C111

1

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

eDP/LVDS CONN & Camera

LA-9371P

1

22 53Friday, September 28, 2012

0.2

of

5

4

3

2

1

SATA Primary HDD CONN.

JHDD1

CONN@JHDD1

D D

C C

CONN@

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

23

GND

24

GND

SANTA_199201-1

20120715 Correct JHDD1's footprint

GND

19 20

V12

21

V12

22

V12

SATA_PTX_C_DRX_P0 SATA_PTX_C_DRX_N0

SATA_PRX_C_DTX_N0 SATA_PRX_C_DTX_P0

+5VS

Place caps. near HDD CONN.

1 2

C410.01U_0402_16V7K_X7R C410.01U_0402_16 V7K_X7R

1 2

C420.01U_0402_16V7K_X7R C420.01U_0402_16 V7K_X7R

1 2

C430.01U_0402_16V7K_X7R C430.01U_0402_16 V7K_X7R

1 2

C440.01U_0402_16V7K_X7R C440.01U_0402_16 V7K_X7R

+5VS

100mils

1

2

Placea caps. near HDD CONN.

SATA_PTX_DRX_P0 <13>

SATA_PTX_DRX_N0 <13>

SATA_PRX_DTX_N0 <13>

SATA_PRX_DTX_P0 <13>

10U_0805_10V4Z

1U_0402_6.3V4Z

C45

C46

1

2

1000P_0402_50V7K

0.1U_0402_16V4Z

C48

C47

1

2

SATA Second HDD CONN.

CONN@

JHDD2

23

GND

24

GND

25

NPTH

26

NPTH

ALLTO_C166J7-12205-L

1

GND

2 3 4 5 6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

SATA_PTX_C_DRX_P4 SATA_PTX_C_DRX_N4

SATA_PRX_C_DTX_N4 SATA_PRX_C_DTX_P4

+5VS

A+

A-

GND

B-

B+

GND

V33 V33

V33 GND GND GND

V5 V5 V5

GND

Reserved

GND

V12

20120917 Correct JHDD2's footprint

SATA ODD CONN.

mSATA Conn.

JMINI1

CONN@JMINI1

CONN@

1

3

5

7

7 9910 111112 131314 151516

171718

4

191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 G153G2

BELLW_80003-2021

B B

A A

SATA_PRX_DTX_P5<13> SATA_PRX_DTX_N5<13>

SATA_PTX_DRX_N5<13> SATA_PTX_DRX_P5<13>

20120801 Change to Port 5 as HP's request

mSATA_DET#<13,18>

5

1 2

C61 0.01U_0402_16V7KC61 0.01U_0402_16V7K

1 2

C62 0.01U_0402_16V7KC62 0.01U_0402_16V7K

1 2

C63 0.01U_0402_16V7KC63 0.01U_0402_16V7K

1 2

C64 0.01U_0402_16V7KC64 0.01U_0402_16V7K

+3VS

mSATA_DET#

+3VS

1 2

500_0402_1%

1 2

R1316

20120705 Change R1316 to 10K 20120801 Delete Q48 as HP's request

SATA_PRX_C_DTX_P5 SATA_PRX_C_DTX_N5

SATA_PTX_C_DRX_N5 SATA_PTX_C_DRX_P5

R1353

10K_0402_5%

2

4

6

8

10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54

+3VS

1

C59

C60

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

CONN@

JODD1

1

GND

2

A+

A-

GND

B-

B+

GND

DP

14 15 16 17

20120730 Correct JODD1's footprint

2012/06/11 2013/06/11

V5 V5

GND

MD

GND

NPTH

GND

NPTH

SANTA_204102-1

ODD_EN<18>

Compal Secret Data

SATA_PTX_C_DRX_P1

3

SATA_PTX_C_DRX_N1

4 5

SATA_PRX_C_DTX_N1

6

SATA_PRX_C_DTX_P1

7

8 9 10 11 12 13

R57

R57 100K_0402_5%

100K_0402_5%

2

ODD_EN

Deciphered Date

1 2

R56 0_0402_5%@R56 0_0402_5%@

+5V_ODD

ODD_DA# <14>

+5VS

12

ODD_EN#

13

D

Q25

G

2N7002K_SOT23-3

S

2

1 2

100K_0402_5%

+5VS

R1336

CC52

1U_0402_6.3V6K

CC52

1U_0402_6.3V6K

1

2

1

2

+5VS

Place caps. near HDD CONN.

1 2 1 2

+5VS

C680.01U_0402_16V7K_X7R C680.01U_0402_16 V7K_X7R C1330.01U_0402_16V7K_X7R C1330.01U_0402_16V7K_X7R

C1340.01U_0402_16V7K_X7R C1340.01U_0402_16V7K_X7R C1130.01U_0402_16V7K_X7R C1130.01U_0402_16V7K_X7R

SATA_PTX_DRX_P4 <13> SATA_PTX_DRX_N4 <13>

SATA_PRX_DTX_N4 <13> SATA_PRX_DTX_P4 <13>

100mils

1U_0402_6.3V4Z

0.1U_0402_16V4Z

10U_0805_10V4Z

C135

1

2

Placea caps. near HDD CONN.

Place caps. near ODD CONN.

1 2

C490.01U_0402_16V7K_X7R C490.01U_0402_16 V7K_X7R

1 2

C500.01U_0402_16V7K_X7R C500.01U_0402_16 V7K_X7R

1 2

C510.01U_0402_16V7K_X7R C510.01U_0402_16 V7K_X7R

1 2

C520.01U_0402_16V7K_X7R C520.01U_0402_16 V7K_X7R

1

C53

0.1U_0402_10V6K@

2

+5V_ODD

1 2

R55 0_0805_5%@ R55 0_0805_5%@

S

D

13

Q24

G

2

SI2305CDS-T1-GE3_SOT23-3

0.1U_0402_10V6K

C54

@

20120705 Correct net name to follow GPIO table

20120711 Change to +5VS and add R58 as HP's request

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

IBEX-M(1/6)-HDA/JTAG/SATA

LA-9371P

0.1U_0402_16V4Z

C119

1

2

SATA_PTX_DRX_P1 <13> SATA_PTX_DRX_N1 <13>

SATA_PRX_DTX_N1 <13> SATA_PRX_DTX_P1 <13>

+5V_ODD

10U_0805_10V4K

0.1U_0402_10V6K

C55

1

2

Placea caps. near ODD CONN.

C132

1

2

0.1U_0402_10V6K

C57

C56

1

2

1

1000P_0402_50V7K

C112

0.1U_0402_10V6K

C58

1

2

0.2

23 53Friday, September 28, 2012

0.2

5

4

3

2

1

PWM Fan Control circuit

FAN_PWM< 30>

D D

KBC_PROC_HOT#<30,5>

+VCCIO_OUT

R17

KBC_PROC_HOT_R<46,5>

D4

RB751V-40_SOD323-2

4.7K_0402_5%

1 2

2K_0402_5%

2

B

12

R133

12

13

C

E

Q65

Q65 MMBT3904_SOT23-3

MMBT3904_SOT23-3

+5VS

5

1

B

2

A

3

U3

P

4

Y

G

TC7SET00FU_SSOP5

20120711 HP's request

R166

1 2

47K_0402_5%

Notes:

1 2

+5VS

TACH_FAN_IN<30>

22_0402_5%

R60

+5VS

JFAN1

1

2

3

C65

12

0.1U_0402_10V6K@

4

5

G5

6

G6

ACES_50273-0040N-001

CONN@

20120709 Correct pin assignment

Place Q65 close CPU side

C C

28K_0402_1%

+3VS

R61

1 2

150_0402_1%

2

1

+3VS_TH

C660.1U_0402_16V4Z C660.1U_0402_16V4Z

5

VCC

4

HYST

GMT G708T1U

GND

U38

SET

1

2

3

OT#

28K_0402_1%

R1315

1 2

R492 0_0402_5%

@

KBC_PWR_ON <30,34>

20120801

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

Sandy(2/7) PM,XDP,Thermal

LA-9371P

1

of

24 53Friday, September 28, 2012

0.2

A

+3V_WWAN

CONN@

JMINI3

6

CH4

5

Vp

4

CONN@

VCC

RST CLK

GND GND

20120731 HP's request

JMINI3

1

GND (Presence)

3

GND

5

GND

7

USB_D+

9

USB_D-

11

GND

13

GND_WWAN RSV (WAKE# /OD))15AUDIO2 RSV(DPR)17AUDIO3 (W_DISABLE#2)

19

GND USB3_TX-21UIM_RESET

23

USB3_TX+

25

GND

27

USB3RX-

29

USB3RX+

31

GND PETn0/SATA_B+33GNSS1 PETn0/SATA_B-35GNSS2

37

GND PERn0/SATA_A-39GNSS4 PERn0/SATA_A+41PERST#

43

GND

45

REFCLKN

47

REFCLKP

49

GND

51

ANTCTL0

53

ANTCTL1

55

ANTCTL2

57

ANTCTL3

59

RESET#

61

PEDET

63

GND

65

GND

67

OC_USB3

69

GND2

LOTES_APCI0018-P002A

1 2 3

18P_0402_50V8J

1

C76

2

9 8

@

BT_ON

WL_LED

WWAN

1 1

20120807 Add test point as HP's request

2 2

UIM_VPP<39>

3 3

4 4

@

T125PAD@T125PAD

+3V_WWAN

UIM_VPP UIM_DATA SIM_DET

47K_0402_5%

@

DTA114YKAGZT146_SOT23-3

WWAN_DET#<13>

USBP12+<17> USBP12-<17>

1 2

R1354

@

R1375

1 2

20120908 Add PU as HP's request

@

T148PAD@T148PAD

@

T149PAD@T149PAD

@

T134PAD@T134PAD

@

T135PAD@T135PAD

JSIM1

5 6 7 4

12

R83

HB_5680629-SICR11

UIM_PWR

Q29

2

WL_LED#

2

WW_LED#

Q31

DTA114YKAGZT146_SOT23-3

20120807 HP's request

WWAN_SSD_IND

0_0402_5%

WWAN_WAKE#WLAN_WAKE#

10K_0402_5%

WWAN_RSVD2

PLT_RST# NGFF_WWAN_PEDET

NGFF_WWAN_USB3_OC

U5

1

CH1

2

Vn

CH23CH3

S DIO(BR) NUP4301MR6T1 TSOP-6@U5S DIO(BR) NUP4301MR6T1 TSOP-6@

GND VPP I/O NC

+3VS

47K

10K

1 3

13

10K

47K

+3VS

A

CONN@

3P3VAUX 3P3VAUX

FULL_CARD_PWR_OFF#

W_DISABLE1#

LED1#

AUDIO0 AUDIO1

IUM_RFU

UIM_CLK UIM_DATA UIM_PWR

DEVSLP

GNSS0

GNSS3

CLKREQ# PEWake#

Config_0

Config_1

COEX3 COEX2

COEX1 SIM_DET SUSCLK

3P3VAUX 3P3VAUX 3P3VAUX

GND1

+3V_WWAN

D9

DAN217T146_SC59-3@D9DAN217T146_SC59-3@

1

UIM_PWR UIM_RST UIM_CLK

4.7U_0805_10V4Z

0.1U_0402_10V6K

C77

C78

1

2

+3VS

12

R89

R89 47K_0402_5%

47K_0402_5%

61

Q4A

2

DMN66D0LDW-7_SOT363-6

34

5

R94 100K_0402_5%R94 100K_0402_5%

1 2

2 4 6 8 10

12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66

68

+3V_WWAN

3

2

WL/BT_LED#

Q4B

DMN66D0LDW-7_SOT363-6

WWAN_FULL_PWR M_WXMIT_OFF# WW_LED#

UIM_RST UIM_CLK UIM_DATA UIM_PWR

SIM_DET

B

10K_0402_5%

R6510K_0402_5% R6510K_0402_5%

12

+3VS

GPS_XMIT_OFF# <18>

@

10K_0402_5%

WWAN_DISABLE<30>

WL/BT_LED# <39>

B

R1374

12

+3V_WWAN

20120908 Add PU as HP's request

@

T146 PAD@T146 PAD

@

T147 PAD@T147 PAD

20120807 Add test point as HP's request

R1352

12

+3V_WWAN

20120730

WWAN_TRANSMIT_OFF#<18>

R81

1 2

04/23 HP

R84

1 2

220K_0402_1%

02/13 HP

+3VDS

1 2

RB751V-40_SOD323-2

+3VDS

G

2

0.1U_0402_10V6K

C79

1

@

2

20120719 HP's request

0.01U_0402_16V7K

0.01U_0402_16V7K C73

C73

C72

1

2

+3V_WWAN

C69

39P_0402_50V8J@

C69

39P_0402_50V8J@

C70

39P_0402_50V8J@

C70

39P_0402_50V8J@

1

2

D8

M_WXMIT_OFF#

S

Q27

Q27 SI2305CDS-T1-GE3_SOT23-3

SI2305CDS-T1-GE3_SOT23-3

+3V_WWAN

D

1 3

7W

+3V_WWAN

0.1U_0402_10V6K

0.1U_0402_10V6K C74

C74

C71

1

2

C

4.7U_0805_10V4Z

1

2

39P_0402_50V8J@

WLAN

MINI1_CLKREQ#<15>

2N7002KW_SOT323-3

WLAN&BT Combo module circuits

BT

on module

Enable

Disable

BT_CRTL

BT_ON#

Power

+3VS

+3V

+1.5VS

LOHI

HILO

Mini Card Power Rating

Primary Power (mA)

Peak Normal

1000

750

330

250

500

375

C

+3VS

2

G

1 3

D

S

D

S

Q69

CLK_PCI_DEBUG<15>

CL_CLK1<16> CL_DATA1<16> CL_RST1#<16>

Auxiliary Power (mA)

250 (wake enable)

5 (Not wake enable)

PCH_PCIE_WAKE#<14,39>

Normal

0_0402_5%

1 2

R67

@

1 2

@

KBC_DS3_EN<29,30,44,5,9>

BT_OFF<14>

@

0_0402_5%

R1355

20120807 HP's request

CLK_PCIE_MINI1#<15>

CLK_PCIE_MINI1<15>

PLT_RST#

CLK_PCI_DEBUG

PCIE_PRX_DTX_N7<17> PCIE_PRX_DTX_P7<17>

PCIE_PTX_C_DRX_N7<17> PCIE_PTX_C_DRX_P7<17>

+3V_AOAC

12

R85

R85 10K_0402_5%

10K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

BT_ON

13

D

Q28

2

G

2N7002K_SOT23-3

S

D

+3V_AOAC

R64

R64 10K_0402_5%

10K_0402_5%

WLAN

1 2

JMINI2

CONN@JMINI2

WLAN_WAKE#

+3VDS

R457 200K_0402_5%R457 200K_0402_5%

1 2

+3V_AOAC

0.1U_0402_16V4Z

1

C86

2

2012/06/11 2013/06/11

D

CONN@

112 334 556 778 9910 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 G153G2

BELLW_80003-1023

R458

1 2

4.7K_0402_5%

12

R90

R90 1K_0402_5%

1K_0402_5%

1 2

C85 0.047U_0402_16V7K@C85 0.047U_0402_16V7K@

20120719 HP's request

123

DGS

Q30

Q30 AO3413L_SOT23-3

AO3413L_SOT23-3

Compal Secret Data

Deciphered Date

+3VDS

+3V_AOAC+3V_AOAC

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54

WLAN_DISABLE <30>

+3VDS

Q68

Q68 2N7002KW_SOT323-3

2N7002KW_SOT323-3

13

D

S

LPC_LFRAME# LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0

RB751V-40_SOD323-2

RB751V-40_SOD323-2 D10

D10

12

WL_LED#

@

2

G

SLP_WLAN# <14,44>

12

@

R459

R459 100K_0402_5%

100K_0402_5%

20120801 Change to uninstall as HP's request

Size Document Number Rev

Date: Sheet

Date: Sheet of

E

LPC_LFRAME# <16,28,30,32> LPC_LAD3 <16,28,30,32> LPC_LAD2 <16,28,30,32> LPC_LAD1 <16,28,30,32> LPC_LAD0 <16,28,30,32>

WLAN_TRAMSIT_OFF# <15> PLT_RST# <13,14,28,29,30,35,37,39,5>

USBP13- <17>

USBP13+ <17>

Title

LA-9371P

WLAN_TRAMSIT_OFF#

1

2

Compal Electronics, Inc.

WWAN/NAND mini

E

@

C364

22P_0402_50V8J

20120713 Add for ESD's request

25 53Friday, September 28, 2012

0.2

of

5

4

3

2

1

Notes:

Keep PVDD supply and speaker traces routed on the DGND plane. Keep away from AGND and other analog signals

If Sense_A total length is greater than 6 inches, chagne C12 to 0.1uF

+AVDD_CODEC

If Sense_B is un-used, then pull high Sense_B to AVDD by 10Kohm resistor

20120702 Delete MIC_SENSE# circuit

AVDD1 AVDD2

PVDD1 PVDD2

SENSE_A SENSE_B

PORTC_L PORTC_R

PORTE_L PORTE_R

PORTF_L PORTF_R

PCBEEP

VREFFILT

CAP2

AVSS1 AVSS2 AVSS3

V-

+AVDD_CODEC

27 38

45 39

13 14

28 29 23

31 32

19 20 24

15 16

17 18

40 41

44 43

25

12

21 22 34 37

26 30 33

1

CA6

2

0.1U_0402_25V6

HP_OUT_L HP_OUT_R

DOCK_LI_L_CODE C DOCK_LI_R_COD EC

SPKL+ SPKL-

SPKR+ SPKR-

CA14 0.1U_0402_25V6CA14 0.1U_0402_25 V6

CA16

+5VS

CA8,CA10 near UA5 PIN45 C

CA7

1U_0402_6.3V6K

SENSE_A SENSE_B

12

1

CA21

2

4.7U_0603_6.3V6K

A9,CA21 near UA5 PIN39

1

2

MONO_INMONO_INR

1U_0402_6.3V6K

1

CA9

CA10

CA11

2

0.1U_0402_25V6

0.1U_0402_25V6 10U_0603_6.3V6M

10U_0603_6.3V6M

DOCK_HP_L_ CODEC <27> DOCK_HP_R_ CODEC <27>

EXT_MIC_L <27> EXT_MIC_JACK <27> VREFOUT_MIC_JACK <27>

1

CA18

2

CA19

10U_0603_6.3V6M

Place C209,C210,CA87,CA89 close to Codec

1

CA12

2

10U_0603_6.3V6M

PLACE CLOSE TO U1 PIN 13

PLACE CLOSE TO U1 PIN 14

SENSE_A <2 7> SENSE_B <2 7>

External MIC

HP_OUT_L <39> HP_OUT_R <39>

DOCK_LI_L_CODE C <27> DOCK_LI_R_COD EC <27>

SPKL+ <27> SPKL- <27>

SPKR+ <27> SPKR- <27>

Combo Jack

Headphone

Internal SPKR(front stereo speaker)

SENSE_A

SENSE_B

20120702 Delete MUTE circuit

RA3 2.49K_0402 _1%R A3 2.49K_0402_1%

CA1 1000P_ 0402_50V7KCA1 100 0P_0402_50V7K

CA13 100 0P_0402_50V7K

1 2

RA4 2.49K_0402 _1%R A4 2.49K_0402_1%

1 2

@

+3VS

D D

0.1U_0402_ 25V6

HDA_BITCLK_AUDIO

HDA_BITCLK_AUDIO<13>

HDA_SDOUT_AUD IO<1 3>

HDA_SYNC_AUDIO<13>

+3VS

D_MIC_CLK<22>

D_MIC_DATA<22>

12

RA13

4.7K_0402_5 %

HDA_RST_AUDIO#<13>

MUTE_LED_ CNTR<39>

@

HDA_RST_AUDIO#

C C

B B

1 2

RA9

HDA_SDI0<13>

EC_MUTE#< 30>

D_MIC_CLK

2

1

33_0402_5 %@

1

CA2

CA3

2

CA8

22P_0402_5 0V8J

1 2

@

HDA_BITCLK_AUDIO

HDA_SDOUT_AUD IO

HDA_SYNC_AUDIO

HDA_SDI0 SDIN_CODEC

HDA_RST_AUDIO#

DH1

RB751V-40_SOD 323-2

1 2

RA27 10K_ 0402_5%RA27 10K_ 0402_5%

+3VS

RA16

10K_0402_5 %

12 12

1 2

RA12 100 _0402_5%RA12 100_0402_5% RA14 100 _0402_5%RA14 100_0402_5%

+3VS

Place AVDD ,PVDD,and DVDD capacitor close to Codec

1

2

1U_0402_6.3V6K

21

CA4

0.1U_0402_25V6

12

RA1133_04 02_5% R A1133_0402_5%

EAPD_L

REC_MUTE_ LED_CTRL

4.7U_0603_ 6.3V6K

1

CA5

CA5 10U_0603_ 6.3V

10U_0603_ 6.3V

2

D_MIC_CLK_L_ C D_MIC_DATA_CD_MIC_DATA

MUTE_LED_ CNTR

1

CA15

2

UA1

1

DVDD_CORE

3

DVDD_IO

9

DVDD

6

HDA_BITCLK

5

HDA_SDO

10

HDA_SYNC

8

HDA_SDI

11

HDA_RST#

47

EAPD

2

DMIC_CLK/GPIO1

4

DMIC0/GPIO2

48

SPDIFOUT0/GPIO3

46

DMIC1/GPIO0/SPDIFOUT1

36

CAP+

35

CAP-

7

DVSS

42

PVSS

49

PAD

92HD91B2X5N LGXWCX8_QFN48_7X7

HP0_PORTA_L

HP0_PORTA_R

VREFOUT_A

HP1_PORTB_L

HP1_PORTB_R

VREFOUT_C/GPIO4

SPK_PORTD_+L SPK_PORTD_-L

SPK_PORTD_+R

SPK_PORTD_-R

MONO_OUT

VREG(+2.5V)

20120920 HP's request

1

CA20

@CA20

@

0.01U_0402 _16V7K

2

REC_MUTE_ CTRL_KB <38>

1 2

CA23 0.1U_0402_25V6@C A23 0.1U _0402_25V6@

1 2

CA24 0.1U_0402_25V6@C A24 0.1U _0402_25V6@

1 2

CA25 0.1U_0402_25V6@C A25 0.1U _0402_25V6@

1 2

CA27 0.1U_0402_25V6@C A27 0.1U _0402_25V6@

1 2

CA30 0.1U_0402_25V6@C A30 0.1U _0402_25V6@

A A

1 2

RA21 0_080 5_5%RA21 0_0 805_5%

REC_MUTE_ LED_CTRL

RA28

10K_0402_5 %

1 2

GNDAGND

RA53 need under or near UA1

5

2

G

2N7002KW _SOT323-3

13

D

S

Q171

20120719 HP's request

HDA_SPKR<13>

SB Beep

4

HDA_SPKR

DMN66D0LD W-7_SOT363-6

+AVDD_CODEC

2

QA1A

12

RA17

RA17 10K_0402_5 %

10K_0402_5 %

RA18

CA22

1 2

0.1U_0402_ 25V6

61

3

RA18

1 2

100K_0402_ 5%

RA19

10K_0402_5 %

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MONO_IN

12

1

CA26

0.01U_0402 _16V7K

2

2012/06/11 2013/06/11

680P_0603_ 50V7K

Compal Secret Data

Deciphered Date

+5VS

1

12

C88

2

CA31

0.1U_0402_ 25V6

2

W=40Mil

1 2

10K_0402_5 %

RA20

1

2

1

+AVDD_CODEC

CA28

0.1U_0402_25V6

2

CA29

CA29 10U_0805_ 10V6K

10U_0805_ 10V6K

1

26 53Friday, September 28, 2012

UA2

1

VIN

3

EN

HPA01085DBVR SOT 23 5P

Size Document Number Rev

Date: Sheet of

5

VOUT

4

BYPASS

2

GND

Title

Audio IDT 92HD91

Custom

Compal Electronics, Inc.

LA-XXXXP

12

C87

680P_0603_50V7K

0.2

5

Speaker Connector

SPKR+

SPKR+<26>

SPKR-

SPKR-<26>

SPKL+

SPKL+<26>

SPKL-

SPKL-<26>

D D

2200P_0402_50V7K

3.3_0402_5%

2200P_0402_50V7K

1

2

12

1

CA33

CA34

CA32

RA25

CA34

CA35

2

12

3.3_0402_5%

RA23

CA35

2

12

3.3_0402_5%

RA26

@

RA24

YSDA0502C C/A SOT-23

DA3

4

JSPKR1

6

G6

5

G5

4

3

2

1

ACES_50273-0040N-001

CONN@

3

223

DA2

@DA2

@

YSDA0502C C/A SOT-23

1

YSDA0502C C/A SOT-23

1

20120713 Change P/N for ESD's request

3

VREFOUT_MIC_JACK<26>

EXT_MIC_JACK<26>

20120713 Delete DA1 for ESD

2

RA22

2.2K_0402_5%

1

C89

2

1U_0402_6.3V6K

LA3

BLM18AG601SN1D_2P

220P_0402_50V7K

CA36

12

EXT_MIC_L2

1

2

EXT_MIC_L2 <39>

1

Need place near Audio Codec (UA5)

EXT_MIC_L <26>

+AVDD_CODEC

12

R103

12

R105

2.2U_0402_6.3V6M

20120713 Move to S/B

2

CC55

1

2

5

6

0.1U_0402_16V7K

0.1U_0402_16V7K C97

C97

+AVDD_CODEC

8

U6B

P

+

OUT

-

G

4

7

TLV2462CDR_SO8

+VREF_EQ

DOCK Audio

LA8

+AVDD_CODEC

U6A

3

+

2

-

1 2

12

8

P

OUT

G

TLV2462CDR_SO8

4

R96

C93

100K_0402_5%

1 2

15P_0402_50V8J

1

C96

C96 68P_0402_50V8J

68P_0402_50V8J

2

1

MIC_OUT

1 2

R99 10K_0402_5%R99 10K_0402_5%

C90

1U_0603_16V7

IN-

12

100K_0402_5%

C C

20120702 Change C91/C94 to 2.2uF as specified.

C91

QA1B

1 2

R110

1 2

20K_0402_1%

R167

20K_0402_1%

39.2K_0402_1%

2

12

2.2U_0603_10V7K

C94

2.2U_0603_10V7K

R100

CC53

1 2

2.2U_0402_6.3V6M

CC54

1 2

2.2U_0402_6.3V6M

12

R108

61

DOCK_HP_L_CODEC<26>

DOCK_HP_R_CODEC<26>

DOCK_LI_L_CODEC<26>

B B

HP_SENSE#<39>

A A

DOCK_LI_R_CODEC<26>

+AVDD_CODEC

R174

R174 30K_0402_1%

30K_0402_1%

1 2

DOCK_HPS#<33>

34

5

DMN66D0LDW-7_SOT363-6

100K_0402_5%

1 2

30_0402_5%

1 2

30_0402_5%

12

20K_0402_1%

20K_0402_1% R101

R101

12

R106

2K_0402_5%

SENSE_A <26>

Q6A

DMN66D0LDW-7_SOT363-6

R97

R98

12

R107

R107 2K_0402_5%

2K_0402_5%

6.2K_0402_5%

1 2

R102

6.2K_0402_5%

1 2

R104

LINE_IN_SENSE<33>

LA6

BLM18AG601SN1D_2P

LA7

BLM18AG601SN1D_2P

220P_0402_50V7K

DOCK_LINE_IN_L

DOCK_LINE_IN_R

100K_0402_5%

12

CA39

20K_0402_1%

R111

1

2

12

R109

34

5

12

DLINE_OUT_L <33>

DLINE_OUT_R < 33>

1

CA40

220P_0402_50V7K

2

DOCK_LINE_IN_L <33>

DOCK_LINE_IN_R <33>

SENSE_B <26>

Q6B

DMN66D0LDW-7_SOT363-6

+VREF_EQ

EXT_MIC_JACK

2

C92

0.01U_0402_16V7K

1

C95

1 2

470P_0603_50V8J

IN-

BLM18AG601SN1D_2P

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

2013/06/112012/06/11

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

Audio SPK Conn/Jack/MIC

LA-9371P

1

27 53Friday, September 28, 2012

0.2

5

+3VS

TPM1.2

12

9656@

R1357

20120810 HP's request for ST33TPM12

26 23 20 17

21 22 16 27 15

0_0402_5%

12

R1357

0_0402_5%

U8

LAD0 LAD1 LAD2 LAD3

SLB9656TT1.2

SLB9656TT1.2SLB9656TT1.2

LCLK LFRAME# LRESET# SERIRQ TEST

7

PP

19

24

VDD

4

BADDPLT_RST#

0.1U_0402_16V4Z

1

C98

2

0.1U_0402_16V4Z

D D

LPC_LAD0<16,25,30,32> LPC_LAD1<16,25,30,32> LPC_LAD2<16,25,30,32> LPC_LAD3<16,25,30,32>

CLK_PCI_TPM<15>

LPC_LFRAME#<16,25,30,32> PLT_RST#<13,14,25,29,30,35,37,39,5> SIRQ<16,30,32>

+3VS

R119

12

R122

@

0_0402_5%

20120706

C C

LPC_PD#_TPM

1

2

1 2

C100

C99

0.1U_0402_16V4Z

2

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

PLT_RST#

PM_CLKRUN#_TPM

4.7K_0402_5%@

+3VS

12

R126

4.7K_0402_5%

12

9635@R 126

9635@

9656@

R129 0_0402_5%

R123

4

+3VS +3VDS

GPIO

NC

NC NC

NC

NC NC NC

R113

0_0402_5%

9656@

28 9 8

14 13

2 6

1 3 12

12

LPC_PD#_TPM BADD

TPM_XTALO TPM_XTALI

12

9656@

R112

0_0402_5%

5

10

VDD

TESTB1/LRESET#

TEST1

GND

SLB9656TT1.2_TSSOP28

11

18

25

20120810 HP's request for ST33TPM12

12

R1358

R1358 0_0402_5%

0_0402_5%

9656@

12

R114

R114 0_0402_5%

0_0402_5%

9635@

1

C101

0.1U_0402_16V4Z

2

T108 PAD@T108 PAD T109 PAD@T109 PAD

CLK_PCI_TPM

TPM_XTALI

R127

@ R127

@

TPM_XTALO

Base I/O Address

0 = 02Eh

* 1 = 04Eh

@ @

1 2

C105

12

Y1

9635@Y1

9635@

32.768KHZ_12.5PF_FC-135

1 2

C106

10M_0402_5%

12

R117

9635@

4.7K_0402_5%

1 2

R120

33_0402_5%@

18P_0402_50V8J9635@

9635@C106

9635@

18P_0402_50V8J

3

+3VS

12

R115

9635@

4.7K_0402_5%

12

R116

4.7K_0402_5%@

C102

22P_0402_50V8J

1 2

@

ACCELEROMETER

+3VS

DDR_XDP_WAN_ SMBCLK<11,12,13,16,38,5> DDR_XDP_WAN_ SMBDAT<11,12,13,16,38,5>

+3VS

R118 10K_0402_5%R118 10K_0402_5%

12

R121

R121 0_0402_5%

0_0402_5%

R124

R124 0_0402_5%

0_0402_5%

@

12

2

+3VS

12

RH219

10K_0402_5%

ACCEL_INT#

U9

1

Vdd_IO

4

SCL/SPC

6

SDA/SDI/SDO

7

SDO/SA0

8

CS

2

NC

3

NC

HP3DC2U9HP3DC2

GND GND

INT2 INT1 VDD

RES RES RES RES

9 11 14

5 12 10 13 15 16

0.1U_0402_16V7K

1

+3VS

1

C103

20120703 Delete LED1

2

C104

C104 10U_0603_6.3V6M

10U_0603_6.3V6M

2

ACCEL_INT# <14>

R177

1 2

PM_CLKRUN#<14,30,32>

B B

A A

TPM

SLB9635

SLB9656

ST33TPM12

5

R112, R113, R129

R114, R115, R117, R126, R177, C105, C106, Y1

R113, R129,R114, R115, R117, R126, R177, R1357, R1358,R127,R122,R116,R120, C102, C101, C105, C106, Y1

PM_CLKRUN#_TPM

0_0402_5%

9635@

BOM Option (Not Inst all)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

Finger printer

0.1U_0402_16V4Z

USBP8-<17>

USBP8+<17>

FPR_LOCK#<18> FPR_OFF<16>

Compal Secret Data

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

R131 0_0402 _5%R131 0_0402_5% R130 0_0402 _5%R130 0_0402_5%

SCA00000U10

YSLC05CH_SOT23-3

2

C107

+3VS

1

2

12 12

USB20_N8_R USB20_P8_R

FPR_LOCK# FPR_OFF

2

3

D11

1

20120713 Change P/N for ESD's request

Title

Size Document Number Rev

Date: Sheet of

JFP1

1

221

3

443

5

665

7

887

9

10109

11

121211

ACES_85203-0602N-10

CONN@

20120907 Change JFP1's footprint

Compal Electronics, Inc.

TPM/Gsensor

LA-9371P

1

0.2

28 53Friday, September 28, 2012

0.2

1

0.1U_0402_16V4Z

1U_0402_6.3V6K

1

C108

2

LAN_SMBCLK<16>

LAN_SMBDATA<16>

KBC_DS3_EN<25,30,44,5,9>

LANWAKE#<18>

LAN_DIS#<18>

+3VM_LAN

1

3

IN

OUT

Y2

NC

25MHZ 18PF_CRG3202518

2

4

+3VM_LAN

C109

XTAL1

XTAL2

1

2

20120927

+3VM_LAN

10U_0805_10V4Z

C110

1

2

C115 0.1U_0402_10V7KC115 0.1U_0402_10V7K C116 0.1U_0402_10V7KC116 0.1U_0402_10V7K

R1356 0_0402_5%@R1356 0_0402_5%@

R153 0_0402_5%@R153 0_0402_5%@

R154 10K_0402_5%@R154 10K_0402_5%@ R155 10K_0402_5%@R155 10K_0402_5%@

C125

C125 33P_0402_50V8J

33P_0402_50V8J

LAN_MDIP0

LAN_MDIN0

+V_DAC

LAN_MDIP1

LAN_MDIN1

LAN_MDIP2

LAN_MDIN2

+V_DAC

LAN_MDIP3

LAN_MDIN3

R128

12

PCIE_PRX_DTX_P6_C PCIE_PRX_DTX_N6_C

LAN_SMBCLK LAN_SMBDATA

20120807 HP's request

LANWAKE#

LAN_DIS#

LED_LINK_LAN# LAN_ACT#

LAN_JTAG_TMS LAN_JTAG_TCK

XTAL2 XTAL1

1 2

24

TX1+

23

TX1-

22

TXCT1

21

TXCT2

20

TX2+

19

TX2-

18

TX3+

17

TX3-

16

TXCT3

15

TXCT4

14

TX4+

13

LANWAKE#

4/6 U10 footprint need check

T110T110 T111T111

MDO0+

MDO0-

MDO1+

MDO1-

MDO2+

MDO2-

MDO3+

MDO3-

4.7K_0402_5%

20120719 Change R128 to 4.7K as HP's request

20120711 HP's request

1 2 1 2

1 2

20120711 HP's request

1 2

1 2 1 2

R158 1K_0402_5%R158 1K_0402_5%

R159 3.01K_0402_1%R159 3.01K_0402_1%

TS1

1

TD1+

2

TD1-

3

TDCT1

4

TDCT2

5

TD2+

6

TD2-

7

TD3+

8

TD3-

9

TDCT3

10

TDCT4

11

TD4+

TD4-12TX4-

MHPC_NS692417

W=60mils

22U_0603_6.3V6M

0.1U_0402_16V4Z

1

C370

C369

2

20120719 HP's request

A A

CLK_PCIE_LAN_REQ1#<15>

PLT_RST#<13,14,25,28,30,35,37,39,5>

CLK_PCIE_LAN<15> CLK_PCIE_LAN#<15>

PCIE_PRX_DTX_P6<17> PCIE_PRX_DTX_N6<17>

PCIE_PTX_C_DRX_P6<17> PCIE_PTX_C_DRX_N6<17>

B B

33P_0402_50V8J

C C

1 2

C371 0.1U_0402_16V4ZC371 0.1U_0402_16V4Z

1 2

C120

1 2

C372 0.1U_0402_16V4ZC372 0.1U_0402_16V4Z

1 2

C373 0.1U_0402_16V4ZC373 0.1U_0402_16V4Z

1 2

C374

20120719 HP's request

D D

C124

0.01U_0402_16V7K

1U_0402_6.3V6K

LED_LINK_LAN#_R<13,17>

1

2

Q34

Q34 2N7002K_SOT23-3

2N7002K_SOT23-3

R157

LED_LINK_LAN#_R LED_LINK_LAN#

48 36

44 45

38 39

41 42

28 31

2

3

26 27 25

32 34 33 35

9

10

30

12

20120713 Change P/N for ESD's request

1 2

U10

CLK_REQ_N PE_RST_N

PE_CLKP PE_CLKN

PETp PETn

PERp PERn

SMB_CLK SMB_DATA

LANWAKE_N

LAN_DISABLE_N

LED0 LED1 LED2

JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TCK

XTAL_OUT XTAL_IN

TEST_EN

RBIAS

R160 75_0402_5%R160 75_0402_5% R161 75_0402_5%R161 75_0402_5% R162 75_0402_5%R162 75_0402_5% R163 75_0402_5%R163 75_0402_5%

YSLC05CH_SOT23-3

0_0402_5%

PCIE

SMBUS

LEDJTAG

CLARKVILLE

1 2 1 2 1 2 1 2

D13

SCA00000U10

1 3

3

@

D

S

D

S

G

2

LAN_DIS#

MDI_PLUS0

MDI_MINUS0

MDI_PLUS1

MDI_MINUS1

MDI_PLUS2

MDI

MDI_MINUS2

MDI_PLUS3

MDI_MINUS3

SVR_EN_N

RSVD1_VCC3P3

VDD3P3_IN

VDD3P3_4 VDD3P3_15 VDD3P3_19 VDD3P3_29

VDD0P9_8 VDD0P9_11 VDD0P9_16

VDD0P9_22

VDD0P9_37

VDD0P9_40 VDD0P9_43 VDD0P9_46 VDD0P9_47

CTRL_0P9

2

1

13

LAN_MDIP0

14

LAN_MDIN0

17

LAN_MDIP1

18

LAN_MDIN1

20

LAN_MDIP2

21

LAN_MDIN2

23

LAN_MDIP3

24

LAN_MDIN3

6

1

5

4 15 19 29

8 11 16

22

37

40 43 46 47

7

4.7UH +-5% NLC252018T-4R7J-N

49

20120719 HP's request

2

C121

SE120102K90

1000P_1808_3KV

1

C122

12

0.1U_0402_16V4Z

2

L16

100UH_SSC0301101MCF_0.18A_20%

1 2

47K_0402_5%

R145

C117

1 2

1000P_0402_50V7K

1 2

3

SLP_LAN<34>

SLP_LAN#<14,30>

20120711 HP's request

L15

0.1U_0402_16V4Z

1

C123

4.7U_0603_6.3V6K

2

SLP_LAN

+1.05VM_LAN

C350

+3VM_LAN

1

2

+5VDS

12

R376

R376 100K_0402_5%

100K_0402_5%

61

AMT@

Q7A

2

DMN66D0LDW-7_SOT363-6

20120720 HP's request

1

C351

22U_0805_6.3V6M

2

20120704 HP's request

DOCK_ID<33,36>

LED_LINK_LAN#

NOTE: L : A-->B1 (DOCK) H: A-->B2 (M/B)

MB_LAN_ACT# MB_LAN_ACT#_R

1 2

R144 10K_0402_5%R144 10K_0402_5%

+3VM_LAN

1 2

4

MDO0-

MDO0+

MDO1-

MDO1+

MDO2-

MDO2+

MDO3-

MDO3+

DOCK_ID

LAN_ACT#

C114680P_0402_50V7K@ C114680P_0402_50V7K@

C118680P_0402_50V7K@ C118680P_0402_50V7K@

U43

2

A0

3

A1

7

A2

8

A3

11

A4

12

A5

14

A6

15

A7

17

SEL

19

LED0

20

LED1

54

LED2

5

NC

57

PAD_GND

GND01GND16GND29GND313GND416GND521GND624GND728GND833GND939GND1044GND1149GND1253GND13

+3VM_LAN

R136

10K_0402_5%

R136

10K_0402_5%

12

+3VM_LAN

1 2

R138 300_0603_5%R138 300_0603_5%

+3VM_LAN

1 2

R150 300_0603_5%R150 300_0603_5%

+3VM_LAN

56

VDD04VDD110VDD218VDD327VDD438VDD550VDD6

+3VM_LAN

0LED1 1LED1 2LED1

0LED2 1LED2 2LED2

0.1U_0402_16V4Z

1

C426

1

C425

2

48

DOCK_MDO0-

0B1

47

DOCK_MDO0+

1B1

43

DOCK_MDO1-

2B1

42

DOCK_MDO1+

3B1

37

DOCK_MDO2-

4B1

36

DOCK_MDO2+

5B1

32

DOCK_MDO3-

6B1

31

DOCK_MDO3+

7B1

22

DOCK_LAN_ACT#

23

DOCK_LED_LINK_LAN#

52

46

MB_MDO0-

0B2

45

MB_MDO0+

1B2

41

MB_MDO1-

2B2

40

MB_MDO1+

3B2

35

MB_MDO2-

4B2

34

MB_MDO2+

5B2

30

MB_MDO3-

6B2

29

MB_MDO3+

7B2

25

MB_LAN_ACT#

26

MB_LED_LINK_LAN#

51

PI3L500-AZFEX_TQFN56_11X5

55

RJ-45 CONN.

MB_MDO3-

MB_MDO3+

MB_MDO1-

MB_MDO2-

MB_MDO2+

MB_MDO1+

MB_MDO0-

MB_MDO0+

MB_LED_LINK_LAN#_RMB_LED_LINK_LAN#

2

3

@

D12

SCA00000U10

YSLC05CH_SOT23-3

1

20120713 Change P/N for ESD's request

5

JRJ45 CONN@

10

Orange LED+

9

Orange LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

12

Green LED+

11

Green LED-

SUYIN_100065HR012S302ZL

DOCK_MDO0- <33> DOCK_MDO0+ <33>

DOCK_MDO1- <33> DOCK_MDO1+ <33>

DOCK_MDO2- <33> DOCK_MDO2+ <33>

DOCK_MDO3- <33> DOCK_MDO3+ <33>

DOCK_LAN_ACT# <33> DOCK_LED_LINK_LAN# <33>

13

SHLD1

14

SHLD2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Intel 82566 Nineveh

LA-9371P

5

29 53Friday, September 28, 2012

0.2

1

TP_CLK TP_DATA SP_CLK SP_DATA

PS2_CLK PS2_DATA KBD_DATA KBD_CLK

EC_XCLK2

EC_XCLK1

1

C424

C424 10P_0402_25V8K

10P_0402_25V8K

2

PVT_SCLK

C365

C365 33P_0402_50V8J

33P_0402_50V8J

@

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5

20120908 Delete R266 20120718 Uninstall R266

PCH_SPI_CLK<16>

20120713 Change by HP request

+RTCVCC

1

C179

2

0.1U_0402_16V4Z

Layout note: Close to PIN68

1 2

PVT_MOSI

R218 0_0402_5%R218 0_0402_5%

20120718 Install R218/Uninstall R219 20120908 Delete R219

20120713 Change by HP request

+3VS

D44

3

PS2_CLK

1

2

PS2_DATA

BAT54CW_SOT323-3

D45

3

KBD_DATA

1

2

KBD_CLK

BAT54CW_SOT323-3

20120720 for HP's request

VOLTAGE_ADC<42> LATCHED_ALARM<51>

PCH_SPI_CLK

WLAN_DISABLE<25> CHRG_ADP_DET<42> TP_DATA<38>

WWAN_DISABLE<25> SLP_LAN#<14,29> CURRENT_ADC<42> OCP_A_IN<50>

1

C180

C181

2

0.1U_0402_16V4Z

Layout note: Close to PIN14

Layout note: Close to PIN37

PCH_SPI_SI<16>

PCH_SPI_CS0#<16>

PCH_SPI_SO<16>

KSO[0..13]<38>

KSI[0..7]<38>

TP_CLK<38>

SP_CLK<38> SP_DATA<38> PS2_CLK<33> PS2_DATA<33>

PM_CLKRUN#<14,28,32> SIRQ<16,28,32> CLK_PCI_KBC<15> EC_SCI#<18>

LPC_LAD3<16,25,28,32> LPC_LAD2<16,25,28,32> LPC_LAD1<16,25,28,32> LPC_LAD0<16,25,28,32>

LPC_LFRAME#<16,25,28,32> KBC_SIO_RST#<18,32>

20120908 Delete R264 &R262

A_GND

R267 300_0402_5%R267 300_0402_5%

1 2

33_0402_5%

R437

WLAN_DISABLE

TP_DATA WWAN_DISABLE

SLP_LAN#

R272 300_0402_5%R272 300_0402_5% R273 300_0402_5%R273 300_0402_5%

1

C183

C182

2

0.1U_0402_16V4Z

C189 2200P_0402_50V7KC189 2200P_0402_50V7K

1 2 1 2

0.1U_0402_16V4Z

Layout note: Close to PIN58

Layout note: Close to PIN84

PCH_SPI_SI PVT_MOSI_R PCH_SPI_CS0# PVT_CS# PCH_SPI_SO PVT_MISO

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

TP_CLK

SP_CLK SP_DATA PS2_CLK PS2_DATA

PM_CLKRUN# SIRQ CLK_PCI_KBC EC_SCI#

LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0

LPC_LFRAME# KBC_SIO_RST#

EC_XCLK1

1 2

PCH_SPI_CLK_EC

PWR_GD<31,46,5>

1

C184

C185

2

0.1U_0402_16V4Z

20120713 Change by HP request

Layout note: Close to PIN106

U17

128

FLDATAOUT

127

*PVT_MOSI/GPIO54

97

FLCS0#

96

*PVT_CS0#/GPIO146

95

FLDATAIN

94

*PVT_MISO/GPIO164

21

KSO0

20

KSO1

19

KSO2

18

KSO3

17

KSO4

16

KSO5

13

KSO6

12

KSO7

10

KSO8

9

KSO9

8

KSO10

7

KSO11

6

*KSO12/GPIO5

5

*KSO13/GPIO6

29

KSI0

28

KSI1

27

KSI2

26

KSI3

25

KSI4

24

KSI5

23

KSI6

22

KSI7

35

*IMCLK/GPIO51

61

*GPIO50/KCLK

62

*GPIO65/KDAT

66

*GPIO46/EMCLK

67

*GPIO47/EMDAT

55

CLKRUN#

57

SER_IRQ

54

PCI_CLK

76

EC_SCI#

51

LAD[3]

50

LAD[2]

48

LAD[1]

46

LAD[0]

52

LFRAME#

53

LRESET#

70

*VSS_VBAT

71

*XTAL1

39

*ADC3/GPIO61

1

*GPIO36

2

*PVT_SCLK/GPIO153

3

*SHD_SCLK/GPIO122

30

*GPIO31

31

*GPIO127

32

*IMDAT/GPIO52

33

GPIO147

34

GPIO151

43

*ADC1/GPIO57

44

*ADC0/ADC_TO_PWM_IN/GP IO56

MEC1322-NU_VTQFP128_14X14

20120810 HP's request

20120923 HP's request

Layout note: ADC nets are spaced at least 20mils from any high speed switching signals to prevent cross talk that could add noise

+RTCVCC

Layout note: Close to PIN119

Power Mgmt/SIRQ

LPC

LPC Bus

Bus

PWR_GD

20120912 Delete R277

1 2

C190 2200P_0402_50V7KC190 2200P_0402_50V7K

1 2

C192 2200P_0402_50V7KC192 2200P_0402_50V7K

+3VDS

20120912 Change RP1 and RP2 to 100K ohms.

RP1

18

KSI1

27

KSI0

36

KSI3

45

KSI2

100K_0804_8P4R_5%

RP2

1 8

KSI7

2 7

KSI6

3 6

KSI5

4 5

KSI4

100K_0804_8P4R_5%

A A

+3VDS

1 2

R496 10K_0402_5%R496 10K_0402_5%

1 2

R497 10K_0402_5%R497 10K_0402_5%

1 2

R498 10K_0402_5%R498 10K_0402_5%

1 2

R499 10K_0402_5%R499 10K_0402_5%

T121PAD @T121PAD @ T122PAD @T122PAD @

+3VS

4.7K_0804_8P4R_5%

1 8 2 7 3 6 4 5

RP3

4.7K_0804_8P4R_5%

1 8 2 7 3 6 4 5

RP4

+RTCVCC

20120713 Change by HP request

B B

1

C188

C188 1U_0402_6.3V6K

1U_0402_6.3V6K

2

Y4

1 2

1

32.768KHZ_12.5PF_FC-135

C423

C423 10P_0402_25V8K

10P_0402_25V8K

2

20120908 HP's request

PCH_SPI_CLK_EC

20120713 Change by HP request

1

C C

2

20120718 EMI's request

SPI ROM (16MByte )

1 2

PCH_SPI_CS0#

3.3K_0402_5%

PCH_SPI_WP#

3.3K_0402_5%

PCH_SPI_HOLD#

3.3K_0402_5%

+3VDS

1

2

20120713 Delete RH220

CH98

@CH98

@

22P_0402_50V8J

+3VDS

1

@

CH112

CH112 22P_0402_50V8J

22P_0402_50V8J

2

20120803 RF's request

1

20120709 Delete UH6 as HP's request

PCH_SPI_CLK

0_0402_5%

33P_0402_50V8J

R1343

@

C375

@

+3VDS

20120713 Change power rail from +3V_SPI to +3VDS

RH222

@RH222

@

D D

RH223

RH224

+3VDS

20mils

1

CH97

0.1U_0402_16V4Z

2

+3VDS

JTAG_RST#

14

37

106

68

*VBAT

Keyboard/Mouse Interface

119

VCC1

VCC158VCC184VCC1

VCC1

100mA 2mA

General Purpose I/O Interface

SMSC_1322-NU_TQFP-128P

Access Bus Interface

*PWRGD

VSS

AVSS

VSS

VSS47VSS56VSS

VSS82VSS

72

36

45

11

104

117

+3VDS

8

3

PCH_SPI_WP#

7

PCH_SPI_HOLD#

1

PCH_SPI_CS0#

PCH_SPI_SI

6

5

128M W25Q128FVSIG SOIC8P

12

1

2

20120722 for EMI's request

2

20120908 Delete R216

20120718 Install R215/Uninstall R216

1 2

R215 100K_0402_5%R215 100K_0402_5%

1 2

C186

1U_0402_6.3V6K

20120912 Delete R543

49

*GPIO145 *GPIO157/BC_CL K *GPIO160/BC_DAT

*JTAG_RST#

*GPIO161/BC_INT#

*GPIO24/I2C3_C LK0 *GPIO25/I2C3_D AT0

*GPIO135/KBRST

*GPIO34/TACH2PWM_OUT

*GPIO133/PW M0 *GPIO136/PW M2

VREF_PCEI

*GPIO131/PECI_ DATA

*GPIO7/KSO14

*GPIO10/KSO15

OUT1/RSMRST#

*GPIO162/RXD

*GPIO165/TXD/HSD_CS1 #

*GPIO23/I2C1_D AT0 *GPIO22/I2C1_C LK0 *GPIO21/I2C2_D AT0 *GPIO20/I2C2_C LK0

*GPIO105/FAN_TACH1 *GPIO140/TACH2PWM_ IN *GPIO45/A20M/PVT_CS#1

*GPIO53/PS2CLK

*GPIO152/PS2DAT

*GPIO11/KSO16

*GPIO130

*I2C0_DATA0

*I2C0_CLK0

*I2C0_DATA1

*I2C0_CLK1

*GPIO110

*GPIO12/KSO17

*ADC_TO_PWM_OUT/GPIO41

*nRESET_OUT#/GPIO121

*GPIO141/PW M3

VCC1_RST#

*ADC4/GPIO62

*GPIO163

*nBAT_LED#/GPIO154

*nPWR_LED#/GP IO156

A_GND

C191 2200P_0402_50V7KC191 2200P_0402_50V7K

1 2

R281 0_0402_5%R281 0_0402_5%

CONN@UH5

CONN@

4

VSS

2

Q

*GPIO155

*GPIO206

*ADC2/GPIO60

1 2

Miscellaneous

UH5

VCC

W

HOLD

S

C

D

20120709 Add by HP request.

20120710 Change R537 to 10K 20120803 Change R537 to 4.7K as HP's request 20120925 Delete R537, Q73, D21 as HP's request

+3VDS

Layout note: 2vias to GND

15

CAP

93

SIO_SLP_A#

98 99

AC_PRES_OUT

100

KBC_PWR_ON

126

CHARGER_CLK

125

CHARGER_DAT

124

*GPIO66

123

FET_A

*GPIO44

122

KBRST#

121

FAN_PWM

120

BAT_GRNLED#

118

KBD_PWM_LED

107

CPPWR_EN

*GPIO30

79 80

H_PECI_R

81

SLP_S3#

83

8051_RECOVER#/_NUM_LOCK_LED#

85

PM_RSMRST#

86

NFC_UART_RX_R

87

PLT_SEL

88

AB2A_DATA

89

AB2A_CLK

90

KBC_PROC_HOT#

91

EC_MUTE#

92

MAIN_BAT_DET#

101

TACH_FAN_IN

102

A20GATE

103

KBD_CLK

105

KBD_DATA

4

ON/OFFBTN#

74

ADP_PRES

111

I2C_MAIN_DAT

112

I2C_MAIN_CLK

109

I2C_BAY_DAT

110

I2C_BAY_CLK

73

ON/OFFBTN_KBC#

108

KSO17

59

OCP_PWM_OUT

75

KBC_DS3_EN

*GPIO13

60

PM_PWROK

78

ADP_ID_CHK

77

VCC1_PWRGD

38

EN_P1V5

69

EC_XCLK2

*XTAL2

116

FET_B

113

AMBER_BATLED#

115

TX_STBY_LED#

114

41

ADC_VREF_1126_C

42 65

TRAVEL_BAT_DET#

GPIO33

64

LID_SW#

*GPIO27

63

ADP_EN

GPIO35

40

AVCC

12

R283 4.99_0402_1%R283 4.99_0402_1%

1 2

C187 4.7U_0805_10V4ZC187 4.7U_0805_10V4Z

1 2

R222 0_0402_5%R222 0_0402_5%

1 2

R227 0_0402_5%R227 0_0402_5%

20120926 HP's request

0_0402_5%

1 2

R1381

20120713 Delete R236

1 2

R238 43_0402_1%R238 43_0402_1%

1 2

R1348

@

1 2

R541 0_0402_5%R541 0_0402_5%

1 2

R542 0_0402_5%R542 0_0402_5%

1 2

R1349 0_0402_5%

@

1 2

R239 0_0402_5%R239 0_0402_5%

1 2

R240 0_0402_5%R240 0_0402_5%

20120908 Delete R241, R242

20120912 Delete R249,R251

20120908 Delete R253 20120912 Delete R256

1 2

R500 0_0402_5%

@

20120908 Delete R258/Uninstall R500

20120911 Resever for SUSACK#

1 2

R1378 0_0402_5%@R1378 0_0402_5%@

1 2

R270 300_0402_5%R270 300_0402_5%

20120908 Delete R271

ADC_VREF_1126_C

0_0402_5%

PCH_KBC_I2CDAT PCH_KBC_I2CLK

C322

1 2

100P_0402_50V8J

+1.05VS

+3VDS

A_GND

20120711 Change C322 to 100pF as HP's request

&UH1

45@&UH1

45@

128M W25Q128FVSIG SOIC8P

PCH_SPI_SOPCH_SPI_SO_R_1

+3VDS

0.1U_0402_16V4Z

3

SIO_SLP_A# <14,31,45> SUS_PWR_ACK <14> AC_PRES_OUT <14,35> KBC_PWR_ON <24,34> CHARGER_CLK <42> CHARGER_DAT <42>

NMI_SMI_DBG# <14>

FET_A <51> PM_APWROK <14,31> FAN_PWM <24> BAT_GRNLED# <13,39> KBD_PWM_LED <38>

CPPWR_EN < 39>

H_PECI <5> SLP_S3# <14,31,34,39,44,9> 8051_RECOVER#/_NUM_LOCK_LED# <38> PM_RSMRST# <13,14>

NFC_UART_RX <39> NFC_UART_TX <39>

PCH_KBC_I2CDAT <16,35>

PCH_KBC_I2CLK <16,35> KBC_PROC_HOT# <24,5> EC_MUTE# <26> MAIN_BAT_DET# <41> TACH_FAN_IN <24> A20GATE <18>

KBD_CLK <33> KBD_DATA <33>

ON/OFFBTN# <13,14,5> ADP_PRES <34,50>

I2C_MAIN_DAT <41> I2C_MAIN_CLK <41>

I2C_BAY_DAT <41> I2C_BAY_CLK <41>

ON/OFFBTN_KBC# <33,38>

KSO17 <39> OCP_PWM_OUT <18> KBC_DS3_EN <25,29,44,5,9> PM_PWROK <14,5> ADP_ID_CHK <50> VCC1_PWRGD <14> EN_P1V5 <33,39,44>

SUSCLK_KBC <14>

FET_B <51> AMBER_BATLED# <39>

8051RX_CAPLED# <38>

SUSACK# <14> ADP_A_ID <50> TRAVEL_BAT_DET# <41> LID_SW# <22,39> ADP_EN <42>

C193

1

2

KSO0 KSO1 KSO3 KSO2 JTAG_RST#

20120719 Install R541 and R542 for NFC function

PCH_SPI_WP# <16>

20120725 add R1348 & R1349 for Quad I/O SPI support 20120818 Delete R1348 & R1349 and Add R541 and R542

PCH_SPI_HOLD# <16>

20120719 Change to ADP_ID_CHK as HP's request

TX_STBY_LED#

DMN66D0LDW-7_SOT363-6

R282

1 2

10K_0402_5%

20mils

1 2

R438

10K_0402_5%

PVT_CS#

PVT_SCLK

PVT_MOSI PVT_MISO

3

20120725 HP's request

20120925 HP's request

+3VDS

20120725 HP's request

+3VDS

R269

100K_0402_5%

5

Q172B

PVT ROM (IN)

U18

CONN@U18

CONN@

8

VCC

VSS

3

W

7

HOLD

1

S

6

C

5

Q

D

16M W25Q16CVSSIG SOIC 8P

CLK_PCI_DEBUG_KBC<15>

PLT_RST#<13,14,25,28,29,35,37,39,5>

TX_STBY_LED# 8051RX_CAPLED# 8051_RECOVER#/_NUM_LOCK_LED#

1 2

R237 15_0402_5%R237 15_0402_5%

1 2

R235 15_0402_5%R235 15_0402_5%

1 2

R234 15_0402_5%R234 15_0402_5%

1 2

R233 15_0402_5%R233 15_0402_5%

1 2

R231 15_0402_5%R231 15_0402_5%

CHARGER_DAT CHARGER_CLK ADP_EN KBRST# VCC1_PWRGD

8051TX_STBYLED#

TX_STBY_LED# 8051RX_CAPLED# KBD_PWM_LED KBC_PWR_ON

ON/OFFBTN_KBC# CHRG_ADP_DET PCH_KBC_I2CDAT PCH_KBC_I2CLK LID_SW# MAIN_BAT_DET# TRAVEL_BAT_DET# TACH_FAN_IN ON/OFFBTN#

8051_RECOVER#/_NUM_LOCK_LED#

PVT_CS#

12

61

Q172A

2

DMN66D0LDW-7_SOT363-6

34

2MB

4

2

LPC Debug Port

B+

JP6

1

Ground

2

LPC_PCI_CLK

3

Ground

4

LPC_LFRAME#

SIRQ

NMI_SMI_DBG# LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

VCC1_PWRGD

PLT_SEL

R252 10K_0402_5%R252 10K_0402_5%

CPPWR_EN PM_PWROK PM_RSMRST# ADP_ID_CHK FET_A

FET_B KBC_PROC_HOT# OCP_PWM_OUT KBC_DS3_EN

8051TX_STBYLED# <33,38,39>

20120725 HP's request

&UH2

16M W25Q16CVSSIG SOIC 8P

20120725 HP's request

LPC_FRAME#

5

+V3S

6

LPC_RESET#

7

+V3S

8

LPC_AD0

9

LPC_AD1

10

LPC_AD2

11

LPC_AD3

12

VCC_3VA

13

PWR_LED#

14

CAPS_LED#

15

NUM_LED#

16

VCC1_PWRGD

17

SPI_CLK

18

SPI_CS#

19

SPI_SI

20

SPI_SO

21

SPI_HOLD#

22

Reserved

23

Reserved

24

Reserved

ACES_87216-2404_24P

CONN@

1 2

R243 10K_0402_5%R243 10K_0402_5%

1 2

R245 10K_0402_5%R245 10K_0402_5%

1 2

R246 10K_0402_5%R246 10K_0402_5%

1 2

R247 10K_0402_5%@R247 10K_0402_5%@

1 2

R248 10K_0402_5%R248 10K_0402_5%

1 2

R1347 10K_0402_5%R1347 10K_0402_5%

1 2

R255 100K_0402_5%R255 100K_0402_5%

1 2

R257 100K_0402_5%R257 100K_0402_5%

1 2

R259 10K_0402_5%R259 10K_0402_5%

1 2

R263 100K_0402_5%R263 100K_0402_5%

1 2

R268 10K_0402_5%R268 10K_0402_5%

1 2

R439 10K_0402_5%R439 10K_0402_5%

1 2

R440 10K_0402_5%R440 10K_0402_5%

1 2

R441 10K_0402_5%R441 10K_0402_5%

1 2

R442 10K_0402_5%R442 10K_0402_5%

1 2

R443 10K_0402_5%R443 10K_0402_5%

1 2

R444 10K_0402_5%R444 10K_0402_5%

1 2

R445 10K_0402_5%R445 10K_0402_5%

1 2

R295 100K_0402_5%R295 100K_0402_5%

1 2

R493 100K_0402_5%R493 100K_0402_5%

1 2

R546 100K_0402_5%R546 100K_0402_5%

20120718 HP's request

4.7K_0804_8P4R_5%

I2C_MAIN_CLK I2C_MAIN_DAT I2C_BAY_CLK I2C_BAY_DAT

1 2

R274 10K_0402_5%R274 10K_0402_5%

1 2

R275 10K_0402_5%R275 10K_0402_5%

1 2

R276 10K_0402_5%R276 10K_0402_5%

1 2

R278 10K_0402_5%R278 10K_0402_5%

1 2

R279 100K_0402_5%R279 100K_0402_5%

1 2

R280 100K_0402_5%R280 100K_0402_5%

1 2

R446 100K_0402_5%R446 100K_0402_5%

1 2

R447 10K_0402_5%R447 10K_0402_5%

1 2

R265 100K_0402_5%R265 100K_0402_5%

45@&UH2

45@

4

+3VDS

1 8 2 7 3 6 4 5

RP5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONIC S, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEITHER THIS SHEE T NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DI SCLOSED TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

MAY BE USED BY OR DI SCLOSED TO ANY THIRD PAR TY WITHOUT PRIOR WRITTEN CONSENT OF COMPA L ELECTRONICS, INC.

4

Compal Secret Data

2012/06/11 2013/06/11

Deciphered Date

5

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

KBC1126

LA-9371P

30 53Friday, September 28, 2012

5

30 53Friday, September 28, 2012

0.2

R285

1

R284

C194

3300P_0402_25V7K

+5VS

+0.675VS

1.5VS_PG<49>

R1337

SLP_S3#<14,30,34,39,44,9>

PM_APWROK

1 2

3.3K_0402_5%

R1338

1 2

3.3K_0402_5%

+1.35VS

+3VS

+1.05VS

1 2

R288 76.8K_0402_1%R288 76.8K_0402_1%

1 2

R289 11.5K_0402_1%R289 11.5K_0402_1%

1 2

R1340 3.3K_0402_5%R1340 3.3K_0402_5%

D41

2

3

DAP202UGT106_SC70-3

1 2

R1339 30.9K_0402_1%R13 39 30.9K_0402_1%

1 2

R297 76.8K_0402_1%R297 76.8K_0402_1%

1 2

R293

1

24.3K_0402_1%

3300P_0402_25V7K

+3VL

C196

R284

40.2K_0402_1%

@

2

1 2

20120818 HP's request

1 2

R290 10K_0402_5%R290 10K_0402_5%

1 2

R291 57.6K_0402_1%R291 57.6K_0402_1%

31.6K_0402_1%

31.6K_0402_1% R292

R292

1 2

R296 10K_0402_5%R296 10K_0402_5%

12

1

R299

73.2K_0402_1%

2

1.07VREF

12

1.07VREF

R285

1 2

1M_0402_5%

+5VDS

8

3

+

2

-

4

1

C195

C195 1000P_0402_50V7K

1000P_0402_50V7K

2

R294

1 2

1M_0402_5%

+5VDS

5

+

6

-

U19A

P

1

O

G

LM393DR2G_SO8

8

U19B

P

7

O

G

LM393DR2G_SO8

4

+3VS

12

R286

R286 10K_0402_5%

10K_0402_5%

PWR_GD

20120711 HP's request

20120718 HP's request

20120723 Change R286 to 10K as HP's request

PWR_GD <30,46,5>

SIO_SLP_A#<14,30,45>

1.05VM_PG<45>

+3VM_LAN

+3VL

1 2

R310 20.5K_0402_1%R310 20.5K_0402_1%

R1341

1 2

3.3K_0402_5%

R1342

3.3K_0402_5%

3.3K_0402_5%1 2

D43

2

3

DAP202UGT106_SC70-3

46.4K_0402_1%

1 2

R304

19.1K_0402_1%

1

R313

C197

1

2

12

1000P_0402_50V7K

35.7K_0402_1%

35.7K_0402_1% R306

R306

R311

1 2

10K_0402_5%

1

C199

3300P_0402_25V7K

2

R309

1 2

1M_0402_5%

+5VDS

8

U20B

5

P

+

6

-

G

LM393DR2G_SO8

4

R301

1 2

1M_0402_5%

C198

1 2

0.068U_0402_10V6K

+3VDS

R175

3.3K_0402_5%

1 2

R1379

1 2

1M_0402_5%

1

2

1M_0402_5%

+5VDS

8

3

+

2

-

4

P

G

7

O

12

R307

R307 1K_0402_5%

1K_0402_5%

20120717 HP's request

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

PM_APWROK <14,30>

20120923 HP's request

VGATE<46>

CH106

0.1U_0402_16V4Z

Compal Secret Data

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

+3V_PCH

12

RH236

4.7K_0402_5%

U20A

1

O

LM393DR2G_SO8

20120913 Modify power ok circuit

PCH_PWROK_R <14>

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

POK CKT

LA-9371P

of

31 53Friday, September 28, 2012

0.2

1

2

3

4

5

Parallel Port

TO LPC47N217N

RB751V-40_SOD323-2

A A

B B

+5VS_PRN

LPTERR#

LPTACK# LPTBUSY LPTPE LPTSLCT

LPD3 LPD2 LPD1 LPD0

LPD7 LPD6 LPD5 LPD4

LPTINIT# LPTSTB# LPTAFD# LPTSLCTIN#

R482 4.7K_0402_5%R482 4.7K_0402_5% R480 4.7K_0402_5%R480 4.7K_0402_5% R481 4.7K_0402_5%R481 4.7K_0402_5% R484 4.7K_0402_5%R484 4.7K_0402_5% R485 4.7K_0402_5%R485 4.7K_0402_5% R486 4.7K_0402_5%R486 4.7K_0402_5%

+3VS

R331 10K_0402_5%R331 10K_0402_5%

R328 10K_0402_5%R328 10K_0402_5%

1 2

R320 4.7K_0402_5%R320 4.7K_0402_5%

1 2

R464 4.7K_0402_5%R464 4.7K_0402_5%

1 2

R465 4.7K_0402_5%R465 4.7K_0402_5%

1 2

R466 4.7K_0402_5%R466 4.7K_0402_5%

1 2

R467 4.7K_0402_5%R467 4.7K_0402_5%

1 2

R468 4.7K_0402_5%R468 4.7K_0402_5%

1 2

R469 4.7K_0402_5%R469 4.7K_0402_5%

1 2

R470 4.7K_0402_5%R470 4.7K_0402_5%

1 2

R471 4.7K_0402_5%R471 4.7K_0402_5%

1 2

R472 4.7K_0402_5%R472 4.7K_0402_5%

1 2

R473 4.7K_0402_5%R473 4.7K_0402_5%

1 2

R474 4.7K_0402_5%R474 4.7K_0402_5%

1 2

R475 4.7K_0402_5%R475 4.7K_0402_5%

1 2

R476 4.7K_0402_5%R476 4.7K_0402_5%

1 2

R477 4.7K_0402_5%R477 4.7K_0402_5%

1 2

R478 4.7K_0402_5%R478 4.7K_0402_5%

1 2

R479 4.7K_0402_5%R479 4.7K_0402_5%

1 2 1 2 1 2 1 2 1 2 1 2

1 2

+5VS

D27

SIO_GPIO44 SIO_GPIO46 SIO_GPIO45 SIO_IRQ SIO_GPIO12 SIO_GPIO10

1 2

SYSOPT

SIO_GPIO23

DCD#1 RI#1 CTS#1 DSR#1

RXD1

1 2

R318 4.7K_0402_5%R318 4.7K_0402_5%

1 2

R319 4.7K_0402_5%R319 4.7K_0402_5%

1 2

R321 4.7K_0402_5%R321 4.7K_0402_5%

1 2

R322 4.7K_0402_5%R322 4.7K_0402_5%

1 2

R323 1K_0402_5%R323 1K_0402_5%

+3VS

U22

54

RXD1<33> TXD1<33> DSR#1<33> RTS#1<33> CTS#1<33> DTR#1<33> RI#1<33> DCD#1<33>

LPTINIT#<33> LPTSLCTIN#<33> LPD0< 33> LPD1< 33> LPD2< 33> LPD3< 33> LPD4< 33> LPD5< 33> LPD6< 33> LPD7< 33> LPTSLCT<33> LPTPE<33> LPTBUSY<33> LPTACK#<33> LPTERR#<33> LPTAFD#<33> LPTSTB#<33>

+3VS

C202 0.1U_0402_16V4ZC202 0.1U_040 2_16V4Z

C201 0.1U_0402_16V4ZC201 0.1U_040 2_16V4Z

1

2

RXD1 TXD1 DSR#1 RTS#1 CTS#1 DTR#1 RI#1 DCD#1

LPTINIT# LPTSLCTIN# LPD0 LPD1 LPD2LPD2 LPD3 LPD4LPD4 LPD5 LPD6LPD6 LPD7 LPTSLCT LPTPE LPTBUSY LPTACK# LPTERR# LPTAFD# LPTSTB#

+3VS

C203 0.1U_0402_16V4ZC203 0.1U_040 2_16V4Z

C204 4.7U_0805_10V4ZC204 4.7U_080 5_10V4Z

1

2

RXD1

55

TXD1

56

DSR1#

1

RTS1#

2

CTS1#

3

DTR1#

4

RI1#

5

35 36 37 39 40 41 42 43 44 45 47 48 49 50 51 52 53

7 10 23 38 46

SERIAL I/FPARALLEL I/F

DCD1#

INIT# SLCTIN# PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 SLCT PE BUSY ACK# ERROR# ALF# STROBE#

VTR VCC

POWER

VCC VCC VCC

LPC47N217N-ABZJ_QFN56_8X8

LPC I/F

CLOCK

GPIO11/SYSOPT

GPIO12/IO_SMI#

GPIO13/IRQIN1 GPIO14/IRQIN2

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ#

PCI_RESET#

LPCPD#

CLKRUN#

PCI_CLK

SER_IRQ

IO_PME#

CLK14

GPIO41 GPIO42 GPIO43 GPIO44 GPIO45

GPIO

GPIO46 GPIO47 GPIO10

GPIO23

EPAD

9 11 12 13

14 15

16 17

18 19 20 6

8

21 22 24 25 26 27 28 29 30 31 32 33 34

57

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

LPC_LFRAME# LPC_LDRQ0#

KBC_SIO_RST# LPCPD#_SIO

PM_CLKRUN# CLK_PCI_SIO SIRQ SIO_PME#

R324 10K_0402_5%R324 10K_0402_5%

CLK_SIO_14M

SIO_GPIO41 SIO_GPIO42 SIO_GPIO43 SIO_GPIO44 SIO_GPIO45 SIO_GPIO46 SER_SHD_GPIO47 SIO_GPIO10 SYSOPT SIO_GPIO12 SIO_IRQ

SIO_GPIO23

1 2

12

R327

R327 10K_0402_5%

10K_0402_5%

LPC_LAD0 <16,25,28,30> LPC_LAD1 <16,25,28,30> LPC_LAD2 <16,25,28,30> LPC_LAD3 <16,25,28,30>

LPC_LFRAME# <16,25,28,30> LPC_LDRQ0# <16>

KBC_SIO_RST# <18,30>

PM_CLKRUN# <14,28,30> CLK_PCI_SIO <15>

SIRQ <16,28,30>

+3VS

CLK_SIO_14M <15>

LPCPD#_SIO

R325 4.7K_0402_5%R325 4.7K_0402_5%

12

R332

@R332

@

10_0402_5%

1

C205

@C20 5

@

18P_0402_50V8J

2

1 2

CLK_SIO_14MCLK_PCI_SIO

12

R333 10_0402_5%

10_0402_5%

1

C206 10P_0402_25V8K

10P_0402_25V8K

2

+3VS

@R333

@

@C20 6

@

+3VS

1 2

R483 10K_0402_5%R483 10K_0402_5%

1 2

R1360 10K_0 402_5%

C C

D D

R1360 10K_0 402_5%

@

1 2

R329 10K_0402_5%R329 10K_0 402_5%

1 2

R1361 4.7K_040 2_5%

@

1 2

R330 4.7K_0402_5%R330 4.7K_0402_5%

1 2

R1362 4.7K_040 2_5%

@

1

SIO_GPIO43 SIO_GPIO42 SIO_GPIO41

SIO_GPIO43

SIO_GPIO42 SIO_GPIO41

20120720 System ID for HP's request 20120731 System ID for HP's request 20120821 Add R for 2DIMM & 4DIMM option

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

4

Date: Sheet of

Compal Electronics, Inc.

SUPER I/O LPC47N217N-ABZJ

LA-9371P

32 53Friday, September 28, 2012

5

0.2

1

VA

C209 0.1U_0603_50V4ZC209 0.1U_0603_50V4Z

(1) PCI Express x1 channels (2) PS/2 Interfaces (2) USB 2.channels (2) SATA Channels (2) Display Port Channels (1) Serial Port (1) Parallel Port (1) Line In (1) Line Out (1) RJ45 (10/100/1000) (1) VGA

A A

(1) 2 LAN indicator LED's (1) Power Button (1) I2C interface

C207 0.1U_0603_50V4ZC207 0.1U_0603_50V4Z

1

2

D42

L30ESD24VC3-2_SOT23-3

D42

@

VA

12A

DOCK_MDO3+<29> DOCK_MDO3-<29>

DOCK_MDO2+<29> DOCK_MDO2-<29>

20120912

B B

DPB_TXP0<36> DPB_TXN0<36>

DPB_TXP1<36>

Quick SW

DPB_TXN1<36>

DPB_TXP2<36> DPB_TXN2<36>

DPB_TXP3<36> DPB_TXN3<36>

DPB_AUX<36> DPB_AUX#<36>

+5VS

DETECT

DPB_AUX DPB_AUX#

DOCK CONN. 184PIN

VIN VA

1

20120713 ESD's request

JDOCK1A

2

3

JDOCK1A

190

P1

188

187

186

185

184

183

182

181

180

179

178

177

176

175

174

173

172

171

170

169

168

167

166

165

164

163

162

161

160

159

158

157

156

155

154

153

152

151

150

149

148

147

146

145

144

FOX_QL0094L-D26601-8H

2

L27

HCB2012KF-121T50_0805

1 2

5A

L28

HCB2012KF-121T50_0805

1 2

189

G1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

MXM_DCK_AUX

43

44

MXM_DCK_AUX#

44

45

USB3TN1 USB3TP1

USB3RN1 USB3RP1

DOCKING CONNECT

+5VS

C211

C210

+5VS

C210

10U_0805_10V4Z

1

2

DOCK_MDO1+ <29> DOCK_MDO1- <29>

DOCK_MDO0+ <29> DOCK_MDO0- <29>

DOCK_LED_LINK_LAN# <29> DOCK_LAN_ACT# <29>

USB3TN1 <17>

USB3TP1 <17>

USB3RN1 <17>

USB3RP1 <17>

USBP0- <17>

USBP0+ <17>

MXM_DCK_LANE_P0 <35> MXM_DCK_LANE_N0 <35>

MXM_DCK_LANE_P1 <35> MXM_DCK_LANE_N1 <35>

MXM_DCK_LANE_P2 <35> MXM_DCK_LANE_N2 <35>

MXM_DCK_LANE_P3 <35> MXM_DCK_LANE_N3 <35>

MXM_DCK_AUX <35> MXM_DCK_AUX# <35>

C213

C212

0.1U_0402_16V4Z

1

2

20120912

3

DOCK_ID ISO_PREP#

100K_0402_5%

1 2

DPB_HPD

ADP_SIGNAL

1 2

R339 0_0402_5%R339 0_0402_5%

1 2

R341 0_0402_5%R341 0_0402_5%

LPTSTB# LPTAFD# LPTERR# LPTACK# LPTBUSY LPTPE LPTSLCT LPD7 LPD6 LPD5 LPD4 LPD3 LPD2 LPD1 LPD0 LPTSLCTIN# LPTINIT# STB_LED#_R SATA_ACT# DOCK_ID ISO_PREP#

USBP11USBP11+

GPU

DPB_HPD<36> EN_P1V5<30,39,44>

ADP_SIGNAL

DPB_AUX DPB_AUX# MXM_DCK_AUX#

LPTSTB#<32> LPTAFD#<32> LPTERR#<32> LPTACK#<32> LPTBUSY<32> LPTPE<32> LPTSLCT<32> LPD7<32> LPD6<32> LPD5<32> LPD4<32> LPD3<32> LPD2<32> LPD1<32> LPD0<32> LPTSLCTIN#<32> LPTINIT#<32>

SATA_ACT#<13,39> DOCK_ID<29,36> ISO_PREP#<13,36>

SATA_PTX_DRX_P3<13> SATA_PTX_DRX_N3<13>

SATA_PRX_DTX_P3<13> SATA_PRX_DTX_N3<13>

USBP11-<17>

USBP11+<17>

SATA_PTX_DRX_P2<13> SATA_PTX_DRX_N2<13>

SATA_PRX_DTX_P2<13> SATA_PRX_DTX_N2<13>

20120801 Change to Port 2 as HP's request

4

1 2

R334 10K_0402_5%R334 10K_0402_5%

1 2

R337 10K_0402_5%R337 10K_0402_5%

ON/OFFBTN_KBC#

1

2

R168

DPB_AUX_R

DPB_AUX#_R

+5VS

+3V_PCH

C299

0.01U_0402_16V7K

20120911 Delete R336 as HP's request

JDOCK1B

143

142

141

140

139

138

137

136

135

134

133

132

131

130

129

128

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

111

110

109

108

107

106

105

104

103

102

101

100

99

98

97

96

95

192

G2

194

G4

196

G6

198

G8

200

G10

FOX_QL0094L-D26601-8H

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

191

G1

193

G3

195

G5

197

G7

199

G9

DCK1_HPD ON/OFFBTN_KBC# VA_ON#

MXM_R_DCK_AUX#

D_DDCDATA D_DDCCLK

R_DOCK_RED

R_DOCK_GRN R_DOCK_BLU

DCD#1 RI#1 DTR#1 CTS#1 RTS#1 DSR#1 TXD1 RXD1

KBD_DATA KBD_CLK PS2_DATA PS2_CLK

DOCK_HPS#

DLINE_OUT_L DLINE_OUT_R

DETECT

5

VA_ON#

R335

1K_0402_5%

DCK1_HPD <35> ON/OFFBTN_KBC# <30,38>

1 2

R340 0_0402_5%R340 0_0402_5%

1 2

R342 0_0402_5%R342 0_0402_5%

D_DDCDATA <36> D_DDCCLK <36> D_VSYNC <36> D_HSYNC <36>

R_DOCK_RED <36>

R_DOCK_GRN <36>

R_DOCK_BLU <36>

DCD#1 <32> RI#1 <32> DTR#1 <32> CTS#1 <32> RTS#1 <32> DSR#1 <32> TXD1 <32> RXD1 <32>

KBD_DATA <30> KBD_CLK <30> PS2_DATA <30> PS2_CLK <30> LINE_IN_SENSE <27> DOCK_HPS# <27>

DOCK_LINE_IN_L <27> DOCK_LINE_IN_R <27>

DLINE_OUT_L <27> DLINE_OUT_R <27>

12

1

C208

0.1U_0402_16V4Z

2

MXM_DCK_AUXMXM_R_DCK_AUX

C C

+5VDS

12

R346

R346 10K_0402_5%

10K_0402_5%

STB_LED#_R

13

D

Q35

2

2N7002K_SOT23-3

8051TX_STBYLED#<30,38,39>

2N7002K_SOT23-3

G

S

R_DOCK_RED R_DOCK_GRN R_DOCK_BLU

1 2

R343 150_0402_1%R343 150_0402_1%

1 2

R344 150_0402_1%R344 150_0402_1%

1 2

R345 150_0402_1%R345 150_0402_1%

1 2

C214 0.1U_0402_16V4Z@C214 0.1U_0402_16V4Z@

1 2

C215 0.1U_0402_16V4Z@C215 0.1U_0402_16V4Z@

1 2

C216 0.1U_0402_16V4Z@C216 0.1U_0402_16V4Z@

20120718 HP's request

D D

IN

NC<-->COM

L

H

1

2

ON

OFF

NO<-->COM

OFF

ON

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DOCK CONN

LA-9371P

5

33 53Friday, September 28, 2012

0.2

A

B

C

D

E

+3VALW TO +3VALW(PCH AUX Power)

Short J1 for PCH VCCSUS3.3

+3VDS

1 1

1

C224

10U_0603_6.3V6M

KBC_PWR_ON#<44,45>

2 2

2

KBC_PWR_ON#

61

2

Q67A

Q67A DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

J1

@J1

@

112

JUMP_43X79

123

DGS

AO3413L_SOT23-3

12

R489

1K_0402_5%

1 2

R455 100K_0402_5%R455 100K_0402_5%

KBC_PWR_ON <24,30> SIO_SLP_SUS# <14>

+3VALW to +3VM_LAN Transfer

1

C229

AMT@ C229

AMT@

1U_0402_6.3V6K

3 3

2

+3V_PCH

2

40mil

Q40

@

C225

10U_0603_6.3V6M

C225

10U_0603_6.3V6M

C220

1U_0603_25V6@C220

1U_0603_25V6

1

20120705

+3VDS +3VM_LAN

+5VDS

34

4/25 change by HP requirement

SLP_LAN<29>

2

Q67B

Q67B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

5

12

R456

R456 100K_0402_5%

100K_0402_5%

1K_0402_5%

SLP_LAN

470_0603_5%

1 2

34

DMN66D0LDW-7_SOT363-6

AMT@

Q36

AO3413L_SOT23-3

1

3

DGS

2 12

R488

R355

5

KBC_PWR_ON#

Q18B

AMT@

1.5A

C230

1

2

0.1U_0402_16V4Z

20120720 Delete C231 as HP's request

+5VALW to +5VS Transfer

U24

SI7326DN-T1-GE3_PAK1212-8-5

5

1

C226

C226 10U_0805_10V4Z

10U_0805_10V4Z

2

4

RUNON

+5VS+5VDS

4

1 2 3

.5A

0.1U_0402_16V4Z

C221

1

C222

C222 10U_0805_10V4Z

10U_0805_10V4Z

2

+1.05VM to +1.05VS Transfer

4

R375

+1.05VS+1.05VM

6A

1 2 3

C235

10U_0805_10V4Z

C235

10U_0805_10V4Z

C232

330U_B2_2VM_R15M

C232

330U_B2_2VM_R15M

1

+

2

Q41

Q41 AO4430L_SO8

AO4430L_SO8

8 7 6 5

C234

0.1U_0402_16V4Z

C234

0.1U_0402_16V4Z

C233

10U_0805_10V4Z

C233

10U_0805_10V4Z

1

2

RUNON

1 2

0_0402_5%

@

+3VALW to +3VS Transfer

R354

R354 330K_0402_5%

330K_0402_5%

SHORT PADS

SLP_S3

ADP_PRES<30,50>

SLP_S3<49>

SLP_S3#<14,30,31,39,44,9>

100K_0402_5%

B+

R368

12

2

U25

SI7326DN-T1-GE3_PAK1212-8-5

1

5

C218

C218 10U_0603_6.3V6M

10U_0603_6.3V6M

2

12

J2

61

Q9A

DMN66D0LDW-7_SOT363-6

5

SLP_S3

2

G

12

1 2 3

4

RUNON

12

R356

R356 820K_0402_5%

820K_0402_5%

34

+3VDS

12

13

D

S

2N7002KW_SOT323-3

12

1

2

Q9B

DMN66D0LDW-7_SOT363-6

R363

4.7K_0402_5%

07/10 Change R363 to 4.7K

Q39

C227

0.01U_0402_16V7K

+3VS+3VDS

C223

1

2

R357

R357 0_0402_5%

0_0402_5%

6.5A

0.1U_0402_16V4Z

10U_0603_6.3V6M

C219

1

2

20120711 HP's request

Discharge circuit-1

+1.05VS

12

R369

R369 470_0402_5%

470_0402_5%

13

D

Q42

G

Q42 2N7002K_SOT23-3

2N7002K_SOT23-3

S

A

2

SLP_S3

4 4

SLP_S3

+3VS

12

R370

R370 220_0402_5%

220_0402_5%

61

Q173A

2

DMN66D0LDW-7_SOT363-6

SLP_S3

+5VS

12

R373

R373 470_0402_5%

470_0402_5%

34

Q173B

Q173B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

5

B

Discharge circuit-2 for V-M

+3VM_LAN

12

R360

R360 470_0402_5%

470_0402_5%

34

Q7B

5

SLP_LAN

DMN66D0LDW-7_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2012/06/11 2013/06/11

+5VS

68P_0402_50V8J

1

@

C404

2

Compal Secret Data

Deciphered Date

@

C405

+5VDS

+3VDS

68P_0402_50V8J

1

@

C406

2

D

68P_0402_50V8J

1

@

C407

C408

2

C408

2

68P_0402_50V8J

1

@

C409

2

Title

Size Document Number Rev

LA-9371P

Date: Sheet of

+3VS

68P_0402_50V8J

1

@

C410

2

20120809 RF's request

Compal Electronics, Inc.

@

C411

C412

2

DC/DC Circuits

E

34 53Friday, September 28, 2012

0.2

5

<13,14,25,28,29,30,37,39,5>

PEG_CTX_GRX_P[0..15]<4>

PEG_CTX_GRX_N[0..15]<4>

PEG_CRX_GTX_P[0..15]<4>

PEG_CRX_GTX_N[0..15]<4>

PCH_THERMTRIP#_R

AC_PRES_OUT

D D

C C

PEG_CRX_GTX_N0 PEG_CRX_GTX_P0

PEG_CRX_GTX_N1 PEG_CRX_GTX_P1

PEG_CRX_GTX_N2 PEG_CRX_GTX_P2

PEG_CRX_GTX_N3 PEG_CRX_GTX_P3

PEG_CRX_GTX_N4 PEG_CRX_GTX_P4

PEG_CRX_GTX_N5 PEG_CRX_GTX_P5

PEG_CRX_GTX_N6 PEG_CRX_GTX_P6

PEG_CRX_GTX_N7 PEG_CRX_GTX_P7

PEG_CRX_GTX_N8 PEG_CRX_GTX_P8

PEG_CRX_GTX_N9 PEG_CRX_GTX_P9

PEG_CRX_GTX_N10 PEG_CRX_GTX_P10

B B

PEG_CRX_GTX_N11 PEG_CRX_GTX_P11

A A

PEG_CTX_GRX_P[0..15]

PEG_CTX_GRX_N[0..15]

PEG_CRX_GTX_P[0..15]

PEG_CRX_GTX_N[0..15]

PCH_THERMTRIP#_R <18,5>

AC_PRES_OUT <14,30>

DGPU_PWR_EN

CV9 0.22U_0402_6.3V6KCV9 0.22U_0402_6.3V6K

CV10 0.22U_0402_6.3V6KCV10 0.22U_0402_6.3V6K

CV11 0.22U_0402_6.3V6KCV11 0.22U_0402_6.3V6K CV12 0.22U_0402_6.3V6KCV12 0.22U_0402_6.3V6K

CV13 0.22U_0402_6.3V6KCV13 0.22U_0402_6.3V6K CV14 0.22U_0402_6.3V6KCV14 0.22U_0402_6.3V6K

CV15 0.22U_0402_6.3V6KCV15 0.22U_0402_6.3V6K CV16 0.22U_0402_6.3V6KCV16 0.22U_0402_6.3V6K

CV17 0.22U_0402_6.3V6KCV17 0.22U_0402_6.3V6K CV18 0.22U_0402_6.3V6KCV18 0.22U_0402_6.3V6K

CV19 0.22U_0402_6.3V6KCV19 0.22U_0402_6.3V6K CV20 0.22U_0402_6.3V6KCV20 0.22U_0402_6.3V6K

CV21 0.22U_0402_6.3V6KCV21 0.22U_0402_6.3V6K CV22 0.22U_0402_6.3V6KCV22 0.22U_0402_6.3V6K

CV23 0.22U_0402_6.3V6KCV23 0.22U_0402_6.3V6K CV24 0.22U_0402_6.3V6KCV24 0.22U_0402_6.3V6K

CV25 0.22U_0402_6.3V6KCV25 0.22U_0402_6.3V6K CV26 0.22U_0402_6.3V6KCV26 0.22U_0402_6.3V6K

CV27 0.22U_0402_6.3V6KCV27 0.22U_0402_6.3V6K CV28 0.22U_0402_6.3V6KCV28 0.22U_0402_6.3V6K

CV29 0.22U_0402_6.3V6KCV29 0.22U_0402_6.3V6K CV30 0.22U_0402_6.3V6KCV30 0.22U_0402_6.3V6K

CV31 0.22U_0402_6.3V6KCV31 0.22U_0402_6.3V6K CV32 0.22U_0402_6.3V6KCV32 0.22U_0402_6.3V6K

DGPU_SELECT#<14,36>

BKL_PWM_PCH<14>

12 12

BL_PWM_G

DGPU_SELECT#

R487 4.7K_0402_5%@R487 4.7K_0402_5%@

+3VS

ENAVDD_G

BL_EN_G

DGPU_SELECT#

1 2

R63 100K_0402_5%R63 100K_0402_5%

PEG_CRX_GTX_C_N0 PEG_CRX_GTX_C_P0

PEG_CRX_GTX_C_N1 PEG_CRX_GTX_C_P1

PEG_CRX_GTX_C_N2 PEG_CRX_GTX_C_P2

PEG_CRX_GTX_C_N3 PEG_CRX_GTX_C_P3

PEG_CRX_GTX_C_N4 PEG_CRX_GTX_C_P4

PEG_CRX_GTX_C_N5 PEG_CRX_GTX_C_P5

PEG_CRX_GTX_C_N6 PEG_CRX_GTX_C_P6

PEG_CRX_GTX_C_N7 PEG_CRX_GTX_C_P7

PEG_CRX_GTX_C_N8 PEG_CRX_GTX_C_P8

PEG_CRX_GTX_C_N9 PEG_CRX_GTX_C_P9

PEG_CRX_GTX_C_N10 PEG_CRX_GTX_C_P10

PEG_CRX_GTX_C_N11 PEG_CRX_GTX_C_P11

U34

3

Y0

1

Y1

6

S

74LVC1G3157GV_TSOP6

U35

3

Y0

1

Y1

6

S

74LVC1G3157GV_TSOP6

U36

3

Y0

1

Y1

6

S

74LVC1G3157GV_TSOP6

5

B+ B+

JMXM1A

CONN@JMXM1A

CONN@

1

PWR_SRC

3

PWR_SRC

5

PWR_SRC

7

PWR_SRC

9

PWR_SRC

11

PWR_SRC

13

PWR_SRC

15

PWR_SRC

17

PWR_SRC

19

PWR_SRC

21

GND

23

GND

25

GND

27

GND

29

GND

31

GND

33

5 4 2

GND

35

GND

37

GND

39

GND

41

5V

43

5V

45

5V

47

5V

49

5V

51

GND

53

GND

55

GND

57

GND

59

PEX_STD_SW#

61

VGA_DISABLE#

63

PNL_PWR_EN

65

PNL_BL_EN

67

PNL_BL_PWM

69

HDMI_CEC

71

DVI_HPD

73

LVDS_DDC_DAT

75

LVDS_DDC_CLK

77

GND

79

OEM

81

OEM

83

OEM

85

OEM

87

GND

89

PEX_RX15#

91

PEX_RX15

93

GND

95

PEX_RX14#

97

PEX_RX14

99

GND

101

PEX_RX13#

103

PEX_RX13

105

GND

107

PEX_RX12#

109

PEX_RX12

111

GND

113

PEX_RX11#

115

PEX_RX11

117

GND

119

PEX_RX10#

121

PEX_RX10

123

GND

125

PEX_RX9#

127

PEX_RX9

129

GND

131

PEX_RX8#

133

PEX_RX8

135

GND

137

PEX_RX7#

139

PEX_RX7

141

GND

143

PEX_RX6#

145

PEX_RX6

147

GND

149

PEX_RX5#

151

PEX_RX5

153

GND

155

PEX_RX4#

157

PEX_RX4

JAE_MM70-314B2-1-R500

+3VS

ENAVDD <22>ENVDD_PCH<14>

ENABLT <22>PANEL_BKEN_PCH<14>

INV_PWM <22>

+5VS

ENAVDD_G BL_EN_G BL_PWM_G

12

VCC

GND

VCC

GND

VCC

GND

Z

PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC PWR_SRC

PRSNT_R#

WAKE#

PWR_GOOD

PWR_EN

RSVD RSVD RSVD RSVD

PWR_LEVEL

TH_OVERT#

TH_ALERT#

TH_PWM

GPIO0 GPIO1

GPIO2 SMB_DAT SMB_CLK

OEM OEM OEM OEM

PEX_TX15#

PEX_TX15

PEX_TX14#

PEX_TX14

PEX_TX13#

PEX_TX13

PEX_TX12#

PEX_TX12

PEX_TX11#

PEX_TX11

PEX_TX10#

PEX_TX10

PEX_TX9#

PEX_TX9

PEX_TX8#

PEX_TX8

PEX_TX7#

PEX_TX7

PEX_TX6#

PEX_TX6

PEX_TX5#

PEX_TX5

PEX_TX4#

PEX_TX4

S Z

LOHIY0

4

2 4 6 8 10 12 14 16 18 20 22

GND

24

GND

26

GND

28

GND

30

GND

32

GND

34

GND

36

GND

38

GND

40

GND

42

DGPU_PRSNT#

44 46

DGPU_PWROK

48

DGPU_PWR_EN

50 52

20120927 HP's request

54 56 58 60 62

200K_0402_5%

64 66 68 70 72

MXM_PCH_KBC_I2CDAT

74

MXM_PCH_KBC_I2CLK

76

GND

78 80 82 84 86

GND

88

PEG_CTX_GRX_N0

90

PEG_CTX_GRX_P0

92

GND

94

PEG_CTX_GRX_N1

96

PEG_CTX_GRX_P1

98

GND

100

PEG_CTX_GRX_N2

102

PEG_CTX_GRX_P2

104

GND

106

PEG_CTX_GRX_N3

108

PEG_CTX_GRX_P3

110

GND

112

PEG_CTX_GRX_N4

114

PEG_CTX_GRX_P4

116

GND

118

PEG_CTX_GRX_N5

120

PEG_CTX_GRX_P5

122

GND

124

PEG_CTX_GRX_N6

126

PEG_CTX_GRX_P6

128

GND

130

PEG_CTX_GRX_N7

132

PEG_CTX_GRX_P7

134

GND

136

PEG_CTX_GRX_N8

138

PEG_CTX_GRX_P8

140

GND

142

PEG_CTX_GRX_N9

144

PEG_CTX_GRX_P9

146

GND

148

PEG_CTX_GRX_N10

150

PEG_CTX_GRX_P10

152

GND

154

PEG_CTX_GRX_N11

156

PEG_CTX_GRX_P11

DGPU_PRSNT# <13,18>

DGPU_PWROK <18> DGPU_PWR_EN <14,15>

R1382200K_0402_5% R1382200K_0402_5%

1 2

R1383

R1384200K_0402_5% R1384200K_0402_5%

S

2N7002KW_SOT323-3

+3VS

+5VS

+3VS

2

Q60A

DMN66D0LDW-7_SOT363-6

dGPU_HPD_INTR<13,17>

G

2

13

AC_PRES_OUT

D

Q61

MMBT3904_SOT23-3

61

+5VS

5

DMN66D0LDW-7_SOT363-6

Q60B

1 2

2

EBC

Q62

34

dGPU_HPD_INTR

12

R451

R451 100K_0402_5%

100K_0402_5%

3

PEX_RST

R137

2.2K_0402_5%

13

PCH_THERMTRIP#_RMXM_THERMTRIP#

PCH_KBC_I2CDAT <16,30>

PCH_KBC_I2CLK <16,30>

SWITCH

20120710

20120717 Delete C354 to C363

Dock

20120709 HP's request

2N7002KW_SOT323-3

13

D

2

G

TB_HPD DCK1_HPDDCK1_SYS_HPD

Q51

S

PEG_CRX_GTX_N13 PEG_CRX_GTX_P13

PEG_CRX_GTX_N14 PEG_CRX_GTX_P14

PEG_CRX_GTX_N15 PEG_CRX_GTX_P15

MXM_SYS_LANE_N0<36>

MXM_SYS_LANE_P0<36>

MXM_SYS_LANE_N1<36> MXM_SYS_LANE_P1<36>

MXM_SYS_LANE_N2<36> MXM_SYS_LANE_P2<36>

MXM_SYS_LANE_N3<36> MXM_SYS_LANE_P3<36>

MXM_SYS_AUX#<36> MXM_SYS_AUX<36>

MXM_DCK_LANE_N0<33>

MXM_DCK_LANE_P0<33>

MXM_DCK_LANE_N1<33>

MXM_DCK_LANE_P1<33>

MXM_DCK_LANE_N2<33>

MXM_DCK_LANE_P2<33>

MXM_DCK_LANE_N3<33>

MXM_DCK_LANE_P3<33>

MXM_DCK_AUX#<33> MXM_DCK_AUX<33>

2

12

R452

R452 100K_0402_5%

100K_0402_5%

G

0.22U_0402_6.3V6K

13

D

Q52

S

2N7002KW_SOT323-3

2

CONN@

JMXM1B

158

GND

PEG_CTX_GRX_N12 PEG_CTX_GRX_P12

1 2

PEG_CRX_GTX_C_N13

CV30.22U_0402_6.3V6K CV30.22U_0402_6.3V6K CV40.22U_0402_6.3V6K CV40.22U_0402_6.3V6K

1 2

PEG_CRX_GTX_C_P13

1 2

PEG_CRX_GTX_C_N14

CV50.22U_0402_6.3V6K CV50.22U_0402_6.3V6K CV6

CV6

1 2

PEG_CRX_GTX_C_P14

CV7

1 2

PEG_CRX_GTX_C_N15

CV80.22U_0402_6.3V6K CV80.22U_0402_6.3V6K

1 2

12

R453

R453 100K_0402_5%

100K_0402_5%

2

G

PEG_CRX_GTX_C_P15

13

D

Q53

2N7002KW_SOT323-3

S

CLK_PCIE_VGA#<15> CLK_PCIE_VGA<15>

160

PEX_TX3#

162

PEX_TX3

164

GND

166

GND

168

PEX_RX2#

170

PEX_RX2

172

GND

174

PEX_RX1#

176

PEX_RX1

178

GND

180

PEX_RX0#

182

PEX_RX0

184

GND

186

PEX_REFCLK#

188

PEX_REFCLK

190

GND

192

RSVD

194

RSVD

196

RSVD

198

RSVD

200

RSVD

202

LVDS_UCLK#

204

LVDS_UCLK

206

GND

208

LVDS_UTX3#

210

LVDS_UTX3

212

GND

214

LVDS_UTX2#

216

LVDS_UTX2

218

GND

220

LVDS_UTX1#

222

LVDS_UTX1

224

GND

226

LVDS_UTX0#

228

LVDS_UTX0

230

GND

232

DP_C_L0#

234

DP_C_L0

236

GND

238

DP_C_L1#

240

DP_C_L1

242

GND

244

DP_C_L2#

246

DP_C_L2

248

GND

250

DP_C_L3#

252

DP_C_L3

254

GND

256

DP_C_AUX#

258

DP_C_AUX

260

RSVD

262

RSVD

264

RSVD

266

RSVD

268

RSVD

270

RSVD

272

RSVD

274

RSVD

276

RSVD

278

RSVD

280

RSVD

282

RSVD

284

GND

286

DP_A_L0#

288

DP_A_L0

290

GND

292

DP_A_L1#

294

DP_A_L1

296

GND

298

DP_A_L2#

300

DP_A_L2

302

GND

304

DP_A_L3#

306

DP_A_L3

308

GND

310

DP_A_AUX#

312

DP_A_AUX

314

PRSNT_L#

316

GND

318

GND

JAE_MM70-314B2-1-R500

PEX_RX3#

PEX_RX3

PEX_TX2#

PEX_TX2

PEX_TX1#

PEX_TX1

PEX_TX0#

PEX_TX0

PEX_CLK_REQ#

PEX_RST# VGA_DDC_DAT VGA_DDC_CLK

VGA_VSYNC VGA_HSYNC

VGA_RED

VGA_GREEN

VGA_BLUE

LVDS_LCLK#

LVDS_LCLK

LVDS_LTX3#

LVDS_LTX3

LVDS_LTX2#

LVDS_LTX2

LVDS_LTX1#

LVDS_LTX1

LVDS_LTX0#

LVDS_LTX0

DP_D_L0#

DP_D_L0

DP_D_L1#

DP_D_L1

DP_D_L2#

DP_D_L2

DP_D_L3#

DP_D_L3

DP_D_AUX#

DP_D_AUX DP_C_HPD DP_D_HPD

DP_B_L0#

DP_B_L0

DP_B_L1#

DP_B_L1

DP_B_L2#

DP_B_L2

DP_B_L3#

DP_B_L3

DP_B_AUX#

DP_B_AUX DP_B_HPD DP_A_HPD

RSVD RSVD RSVD

159

GND

161 163 165

GND

167

GND

169 171 173

GND

175 177 179

GND

181 183 185

GND

187 189 191 193 195 197 199

GND

201 203 205 207

GND

209 211 213

GND

215 217 219

GND

221 223 225

GND

227 229 231

GND

233 235 237

GND

239 241 243

GND

245 247 249

GND

251 253 255

GND

257 259 261

GND

263 265 267 269 271 273 275 277

GND

279 281 283

GND

285 287 289

GND

291 293 295

GND

297 299 301

GND

303 305 307 309 311

3V3

313

3V3

315

GND

317

GND

R92

150_0402_1%

1 2 1 2

10U_0603_6.3V6M

1

2

R91

1 2

C348

0.1U_0402_16V4Z

1

2

CV1 0.22U_0402_6.3V6KCV1 0.22U_0402_6.3V6K CV2 0.22U_0402_6.3V6KCV2 0.22U_0402_6.3V6K

PEG_CLK_REQ# <15>

GPU_VGA_DDC_DAT <36> GPU_VGA_DDC_CLK <36> GPU_VGA_VSYNC <36> GPU_VGA_HSYNC <36>

150_0402_1%

1 2

C24 0.1U_0402_10V7K~DC24 0.1U_0402_10V7K~D C25 0.1U_0402_10V7K~DC25 0.1U_0402_10V7K~D

C26 0.1U_0402_10V7K~DC26 0.1U_0402_10V7K~D C27 0.1U_0402_10V7K~DC27 0.1U_0402_10V7K~D

C28 0.1U_0402_10V7K~DC28 0.1U_0402_10V7K~D C29 0.1U_0402_10V7K~DC29 0.1U_0402_10V7K~D

C30 0.1U_0402_10V7K~DC30 0.1U_0402_10V7K~D C31 0.1U_0402_10V7K~DC31 0.1U_0402_10V7K~D

C32 0.1U_0402_10V7K~DC32 0.1U_0402_10V7K~D C33 0.1U_0402_10V7K~DC33 0.1U_0402_10V7K~D

C34 0.1U_0402_10V7K~DC34 0.1U_0402_10V7K~D C35 0.1U_0402_10V7K~DC35 0.1U_0402_10V7K~D

C36 0.1U_0402_10V7K~DC36 0.1U_0402_10V7K~D C37 0.1U_0402_10V7K~DC37 0.1U_0402_10V7K~D

C38 0.1U_0402_10V7K~DC38 0.1U_0402_10V7K~D C39 0.1U_0402_10V7K~DC39 0.1U_0402_10V7K~D

C40 0.1U_0402_10V7K~DC40 0.1U_0402_10V7K~D C67 0.1U_0402_10V7K~DC67 0.1U_0402_10V7K~D

C349

0.1U_0402_16V4Z

1

2

PEG_CRX_GTX_C_N12 PEG_CRX_GTX_C_P12

PEG_CTX_GRX_N13 PEG_CTX_GRX_P13

PEG_CTX_GRX_N14 PEG_CTX_GRX_P14

PEG_CTX_GRX_N15 PEG_CTX_GRX_P15

PEX_RST

R93

150_0402_1%

1 2

MXM_eDP_C_LANE_N0 MXM_eDP_C_LANE_P0

MXM_eDP_C_LANE_N1 MXM_eDP_C_LANE_P1

MXM_eDP_C_LANE_N2 MXM_eDP_C_LANE_P2

MXM_eDP_C_LANE_N3 MXM_eDP_C_LANE_P3

GPU_C_AUX# GPU_C_AUX

R450 10K_0402_5%R450 10K_0402_5%

1 2

20120709 HP's request

MXM_TB_C_LANE_N0 MXM_TB_C_LANE_P0

MXM_TB_C_LANE_N1 MXM_TB_C_LANE_P1

MXM_TB_C_LANE_N2 MXM_TB_C_LANE_P2

MXM_TB_C_LANE_N3 MXM_TB_C_LANE_P3

MXM_TB_AUX# MXM_TB_AUX

R448 10K_0402_5%R448 10K_0402_5% R449 10K_0402_5%R449 10K_0402_5%

C347

1 2 1 2

+3VS

1 2 1 2

RED_R <36> GREEN_R <36> BLUE_R <36>

1

PEG_CRX_GTX_N12 PEG_CRX_GTX_P12

CRT

+3VS

U37

5

1

IN1

VCC

4

OUT

2

IN2

GND

MC74VHC1G08DFT2G_SC70-5

3

20120828 Change U37 to non OD part to solve MXM issue

MXM_eDP_LANE_N0 <36> MXM_eDP_LANE_P0 <36>

MXM_eDP_LANE_N1 <36> MXM_eDP_LANE_P1 <36>

MXM_eDP_LANE_N2 <36> MXM_eDP_LANE_P2 <36>

MXM_eDP_LANE_N3 <36> MXM_eDP_LANE_P3 <36>

GPU_AUX# <36>

DCK1_SYS_HPD

TB_HPD DCK1_HPD

12

100K_0402_5%

R169

GPU_AUX <36> DCK1_SYS_HPD <36> GPU_HPD <36>

Thunder Bolt

MXM_TB_LANE_N0 <39> MXM_TB_LANE_P0 <39>

MXM_TB_LANE_N1 <39> MXM_TB_LANE_P1 <39>

MXM_TB_LANE_N2 <39> MXM_TB_LANE_P2 <39>

MXM_TB_LANE_N3 <39> MXM_TB_LANE_P3 <39>

MXM_TB_AUX# <39>

MXM_TB_AUX <39> TB_HPD <39> DCK1_HPD <33>

20120709 HP's request

DGPU_HOLD_RST# <14>

PLT_RST#

EDP

Y1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2012/06/11 2013/06/11

2

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

MXM

Size Document Number Rev

Date: Sheet of

Date: Sheet

LA-9371P

1

of

35 53Friday, September 28, 2012

0.2

1

+3VS

U42

eDP MUX

A A

CC72 0.1U_0402_16V4ZCC72 0.1U_0402_16V4Z CC73 0.01U_0402_16V7K_X7RCC73 0.01U_0402_16V7K_X7R

EDP_CPU_LANE_P0<7> EDP_CPU_LANE_N0<7> EDP_CPU_LANE_P1<7> EDP_CPU_LANE_N1<7>

1 2 1 2

IN2_PEQ IN1_PEQ IN1_AEQ# IN2_AEQ#

EDP_CPU_LANE_P0 EDP_CPU_LANE_N0 EDP_CPU_LANE_P1 EDP_CPU_LANE_N1

From CPU

EDP_CPU_AUX<7>

EDP_CPU_AUX#<7>

MXM_eDP_LANE_P0<35> MXM_eDP_LANE_N0<35> MXM_eDP_LANE_P1<35> MXM_eDP_LANE_N1<35>

From GPU

B B

IN1_AEQ# IN2_AEQ# IN1_PEQ

IN2_PEQ CFG_HPD CFG_OUTPUT

+3VS

R506

4.7K_0402_5%

12

@

MXM_eDP_LANE_P2<35> MXM_eDP_LANE_N2<35> MXM_eDP_LANE_P3<35> MXM_eDP_LANE_N3<35>

GPU_AUX<35>

GPU_AUX#<35>

CPU_EDP_HPD#<7>

GPU_HPD<35>

R509

R508

R510

R507

4.7K_0402_5%

12

@

12

R510

4.7K_0402_5%

12

@

R512

4.7K_0402_5%

@R513

@

12

@

R514

@R514

@

R513

12

4.7K_0402_5%

EDP_CPU_AUX EDP_CPU_AUX#

MXM_eDP_LANE_P0 MXM_eDP_LANE_N0 MXM_eDP_LANE_P1 MXM_eDP_LANE_N1 MXM_eDP_LANE_P2 MXM_eDP_LANE_N2 MXM_eDP_LANE_P3 MXM_eDP_LANE_N3

GPU_AUX GPU_AUX#

CPU_EDP_HPD# GPU_HPD

100K_0402_5%

R511

4.7K_0402_5%

@

R515

4.7K_0402_5%

100K_0402_5%

@R504

@

R504

U42

54

VDD

31

VDD

49

IN2_PEQ/SDA_CTL

50

IN1_PEQ/SCL_CTL

3

IN1_AEQ#

51

IN2_AEQ#

52

IN1_D0p

53

IN1_D0n

55

IN1_D1p

56

IN1_D1n

1

IN1_D2p

2

IN1_D2n

4

IN1_D3p

5

IN1_D3n

24

IN1_AUXp

23

IN1_AUXn

20

IN1_SCL

19

IN1_SDA

7

IN2_D0p

8

IN2_D0n

10

IN2_D1p

11

IN2_D1n

13

IN2_D2p

14

IN2_D2n

15

IN2_D3p

16

IN2_D3n

26

IN2_AUXp

25

IN2_AUXn

22

IN2_SCL

21

IN2_SDA

6

IN1_HPD

9

IN2_HPD

12

2

SW_AUX

OUT_AUXp_SCL OUT_AUXn_SDA

AC_AUXp AC_AUXn

I2C_CTL_EN

CFG_OUTPUT

CA_DET

OUT_D0p OUT_D0n OUT_D1p

OUT_D1n OUT2_D2p OUT2_D2n

OUT_D3p

OUT_D3n

SW_ML/I2C_ADDR

CFG_HPD OUT_HPD

REXT CEXT

GND GND

Epad

PS8321QFN56GTR-A0_QFN56_7X7

47

28 27

30 29

37

34

44

42 41 39 38 36 35 33 32

48

46 43

18 17

45 12 57 40

PD

SEL

CC70

1 2

EDC_SW_C_AUX

1 2

EDC_SW_C_AUX#

CC71

I2C_CTL_EN

CFG_OUTPUT

R516 1M_0402_5%R516 1M_0402_5%

1 2

CC75

EDP_SW_C_D0P EDP_SW_C_D0N EDP_SW_C_D1P EDP_SW_C_D1N EDP_SW_C_D2P EDP_SW_C_D2N EDP_SW_C_D3P EDP_SW_C_D3N

1 2 1 2

CC76

CC76 CC77

CC77

1 2

CC78

1 2 1 2

CC79

CC79 CC80

CC80

1 2 1 2

CC81

CC81 CC82

CC82

1 2

SEL

CFG_HPD

CC74

2.2U_0402_6.3V6M

1

2

0.1U_0402_16V4Z

12

R505

4.99K_0402_1%

EDC_SW_AUX <22> EDC_SW_AUX# <22>

Place close to U42

T145T145

EDP_SW_D0P <22> EDP_SW_D0N <22> EDP_SW_D1P <22> EDP_SW_D1N <22> EDP_SW_D2P <22> EDP_SW_D2N <22> EDP_SW_D3P <22> EDP_SW_D3N <22>

EDP_SW_HPD <22>

DGPU_SELECT#<14,35>

SW_ML/SW_AUX

3

4

5

DP Switch

+3VS

C238

0.1U_0402_16V4Z

C238

0.1U_0402_16V4Z

C241

0.1U_0402_16V4Z

C241

C239

1U_0402_6.3V4Z

C239

1U_0402_6.3V4Z

C240

1

2

MXM_SYS_LANE_N0<35> MXM_SYS_LANE_P0<35> MXM_SYS_LANE_N1<35> MXM_SYS_LANE_P1<35> MXM_SYS_LANE_N2<35> MXM_SYS_LANE_P2<35> MXM_SYS_LANE_N3<35> MXM_SYS_LANE_P3<35>

MXM_SYS_AUX#<35> MXM_SYS_AUX<35>

DCK1_SYS_HPD<35>

+3VS

R462

R462 10K_0402_5%

10K_0402_5%

1 2

SEL

2N7002KW_SOT323-3

13

D

2

G

S

Q63

0

1

GPU

CPU

0.1U_0402_16V4Z

1

2

U26

DPSW_SEL

U26

12

VDD

21

VDD

34

VDD

2

GPU_SEL

3

D0-

4

D0+

6

D1-

7

D1+

8

D2-

9

D2+

10

D3-

11

D3+

13

AUX-

14

AUX+

5

AUX_HPD_SEL

18

HPD

1

GND

17

GND

22

GND

43

HGND

PI3VDP12412ZHEX_TQFN42_9X3P5~D

42

D0-A

41

D0+A

40

D1-A

39

D1+A

38

D2-A

37

D2+A

36

D3-A

35

D3+A

24

AUX-A

23

AUX+A

16

HPD_A

33

D0-B

32

D0+B

31

D1-B

30

D1+B

29

D2-B

28

D2+B

27

D3-B

26

D3+B

19

AUX-B

20

AUX+B

15

HPD_B

25

OE

DPSW_SEL

2N7002KW_SOT323-3

DPA_TXN0 DPA_TXP0 DPA_TXN1 DPA_TXP1 DPA_TXN2 DPA_TXP2 DPA_TXN3 DPA_TXP3

R503 10K_0402_5%R503 10K_0402_5%

+3VS

12

R416

R416 10K_0402_5%

10K_0402_5%

13

D

2

G

S

Q54

1 2

C324 0.1U_0402_16V7KC324 0.1U_0402_16V7K C323 0.1U_0402_16V7KC323 0.1U_0402_16V7K

1 2 1 2

C326 0.1U_0402_16V7KC326 0.1U_0402_16V7K C325 0.1U_0402_16V7KC325 0.1U_0402_16V7K

1 2

C328 0.1U_0402_16V7KC328 0.1U_0402_16V7K

1 2 1 2

C327 0.1U_0402_16V7KC327 0.1U_0402_16V7K C330 0.1U_0402_16V7KC330 0.1U_0402_16V7K

1 2 1 2

C329 0.1U_0402_16V7KC329 0.1U_0402_16V7K

1 2

ISO_PREP# <13,33>

+3VS

MB_DPA_TXN0 <39> MB_DPA_TXP0 <39> MB_DPA_TXN1 <39> MB_DPA_TXP1 <39> MB_DPA_TXN2 <39> MB_DPA_TXP2 <39> MB_DPA_TXN3 <39> MB_DPA_TXP3 <39> MB_DPA_AUX# <39> MB_DPA_AUX <39> MB_DP_HPD <39>

DPB_TXN0 <33> DPB_TXP0 <33> DPB_TXN1 <33> DPB_TXP1 <33> DPB_TXN2 <33> DPB_TXP2 <33> DPB_TXN3 <33> DPB_TXP3 <33> DPB_AUX# <33> DPB_AUX <33> DPB_HPD <33>

M/B DP

Docking

20120723

10/17 HP

1 2

+RCRT_VCC+5VS

D49

21

HSYNC_C

2

1

3

RB491D_SOT23-3

C413

0.1U_0402_10V6K

VGA_R

VGA_G

VGA_B

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

LA-9371P

Switch/MUX

5

F1

10P_0402_50V8J@

C419

0_0402_5%

1 2

0_0402_5%

1 2

10P_0402_50V8J@

1

2

F1

1.1A_8VDC_FUSE

R1364 0_0805_5%R1364 0_0805_5%

R1366 0_0805_5%R1366 0_0805_5%

R1368 0_0805_5%R1368 0_0805_5%

C C

+3VS

R501 10K_0402_5%R501 10K_0402_5%

VGA_DDCCLK VGA_DDCDATA

U28

PCH_CRT_RED<14>

RED_R<35>

PCH_CRT_GRN<14>

GREEN_R<35>

PCH_CRT_BLU<14>

BLUE_R<35>

PCH_CRT_DDC_CLK<14>

GPU_VGA_DDC_CLK<35>

PCH_CRT_DDC_DAT<14>

GPU_VGA_DDC_DAT<35>

1 2

R350 10K_0402_5%R350 10K_0402_5%

+5VS

PCH_CRT_HSYNC<14> GPU_VGA_HSYNC<35>

PCH_CRT_VSYNC<14>

D D

R348 10K_0402_5%R348 10K_0402_5%

+5VS

1 2

DGPU_SELECT#

DMN66D0LDW-7_SOT363-6

61

2

QA2A

GPU_VGA_VSYNC<35>

R349 10K_0402_5%R349 10K_0402_5%

1 2

+5VS

5

DOCK_ID<29,33>

20120723

1

34

QA2B

DMN66D0LDW-7_SOT363-6

7

REDA

17

REDB

8

GRNA

18

GRNB

9

BLUA

19

BLUB

5

SCLA

15

SCLB

6

SDAA

16

SDAB

2

EN

3

SHA

13

SHB

4

SVA

14

SVB

1

S00

40

S01

39

S10

38

S11

30

GND

20

GND

10

GND

41

GPAD

1 2 1 2

R502 10K_0402_5%R502 10K_0402_5%

MAX14885E

MAX14885EETL+T_TQFN40_5X5~D

RED1 RED2

GRN1 GRN2

SDA1 SDA2

1

CC61

CC60

2

+3VS

10U_0603_6.3V6M

29

VCC

21

VCC

11

VL

33

VGA_RED

24

R_DOCK_RED

32

VGA_GRN

23

R_DOCK_GRN

31

BLU1 BLU2

SCL1 SCL2

SH1 SH2

SV1 SV2

NC

VGA_BLU

22

R_DOCK_BLU

35

VGA_DDCCLK

26

D_DDCCLK

34

VGA_DDCDATA

25

D_DDCDATA

37

R_CRT_HSYNC CRT_HSYNC

28

R_D_HSYNC

36

R_CRT_VSYNC

27

R_D_VSYNC

12

2

10U_0603_6.3V6M

1

CC66

0.1U_0402_16V4Z

2

R_DOCK_RED <33>

R_DOCK_GRN <33>

R_DOCK_BLU <33>

D_DDCCLK <33>

D_DDCDATA <33>

R385 33_0402_1%R385 33_0402_1%

1 2

R386 33_0402_1%R386 33_0402_1%

1 2

R387 33_0402_1%R387 33_0402_1%

1 2 1 2

R388 33_0402_1%R388 33_0402_1%

CC62

2

10U_0603_6.3V6M

1

CC64

CC63

2

0.1U_0402_16V4Z

D_HSYNC <33>

CRT_VSYNC

D_VSYNC <33>

0.1U_0402_16V4Z

1

CC65

2

1

2

0.1U_0402_16V4Z

+5VS

L29

VGA_RED

VGA_GRN

VGA_BLU

3

VGA_B

VGA_R

VGA_G

R1369

12

150_0402_1%

R1371

R1370

12

150_0402_1%

3

2

3

2

L29

39NH_CS0805-39NJ-S_5%

1 2

L30

39NH_CS0805-39NJ-S_5%

1 2

L33

39NH_CS0805-39NJ-S_5%

1 2

D48

YSLC05CH_SOT23-3

SCA00000U10

SCA00000U10 @

@

D46

YSLC05CH_SOT23-3

SCA00000U10

SCA00000U10 @

@

L32110NH_CS0805-R11J-S_5%L32110NH_CS0805-R11J-S_5%

1 2

DAC_RE

L31110NH_CS0805-R11J-S_5%L31110NH_CS0805-R11J-S_5%

1 2

DAC_GR

L34110NH_CS0805-R11J-S_5%L34110NH_CS0805-R11J-S_5%

1 2

18P_0402_50V8J

C414

C420

C421

1

10/17 HP10/17 HP

2

VSYNC_C

1

HSYNC_C

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, I NC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

DAC_R

DAC_G

DAC_BDAC_BL

D47

3

1

2

YSLC05CH_SOT23-3

SCA00000U10

SCA00000U10 @

@

2012/06/11 2013/06/11

09/30 HP

R1363

1 2

VGA_RE

0_0805_5%

1 2

R1365

R1367

18P_0402_50V8J

C416

C422

1

2

4

VGA_GR

0_0805_5%

1 2

VGA_BL

0_0805_5%

10P_0402_50V8J@

C418

18P_0402_50V8J

C417

1

2

CRT_HSYNC

CRT_VSYNC VSYNC_C

VGA_DDCCLK

VGA_DDCDATA

Compal Secret Data

Deciphered Date

C415

R1372

R1373

1

2

1

2

+CRTVDD

W=40mils

JVGA1

6

11

1 7

G

12

G

2 8

13

3 9

14

4 10 15

5

CONN@

SUYIN_070915HR015M226ZR

36 53Friday, September 28, 2012

16 17

0.2

of

5

+VCC_SM

12

R391

CC68

1U_0402_6.3V6K

12

R391

4.7K_0402_5%

+5VS

2

1

D D

+5VS

C252

0.1U_0402_16V7K

1

2

SCardRst SCardclk

R395 0_0402_5%R395 0_0402_5%

SCardData

R396 470_0402_5%R396 470_0402_5%

+3VS_SM

C253

0.1U_0402_16V7K

1 2

USBP7-<17> USBP7+<17>

+VCC_SM

1

2

CC69

1

2

SCardC8 SCardC6 SCardFcb

SCardclk_R

1U_0402_6.3V6K

4

U30

1

SCard0C8

2

SCard0C6

3

SCard0Fcb

4

SMIO_5VPWR

5

SCard0Rst

6

SCard0Clk

7

SCard0Data

8

DM

9

DP

10

AV33

11

SCPWR0

12

5VGND

13

5VInput

+3VS_SM

C257

0.1U_0402_16V7K

1

2

14

V33OUT

AU9542B56-GBS-GR_SSOP28

C259

C258

0.1U_0402_16V7K

1U_0402_6.3V6K

1

2

PWRSV_SEL

LEDCRD

LEDPWR

RESET

EEPDATA

EEPCLK

P1(6)

ICCInsertN

VDDH VDDP

VDD

V18OUT

XO

XI

3

28

XTAL_OUT

27

XTAL_IN

26

PWRSV_SEL# XTAL_OUT

25 24 23 22 21 20 19 18 17 16 15

1

2

SSDA SSCL EEPWP ICCInsertN

C255

1U_0402_6.3V6K

T93 PAD~D@T93 PAD~D@ T94 PAD~D@T94 PAD~D@

T95 PAD~D@T95 PAD~D@

+1.8VS_SM

C256

1

0.1U_0402_16V7K

2

PWRSV_SEL# < 14>

+3VS_SM

C254

0.1U_0402_16V7K

1

2

PLT_RST# <13,14,25,28,29,30,35,39,5>

20120920 HP's request

2

CV33 18P_0402_50V8JCV33 18P_0402_50V8J

12

RH225

RH225 1M_0402_5%

1M_0402_5%

CV34 18P_0402_50V8JCV34 18P_0402_50V8J

20120709 Vendor's suggestion

1

@

Y3

Y3 12MHZ_18PF_X5H012000FI1H

12MHZ_18PF_X5H012000FI1H

1 2

XTAL_IN

C C

J3

12

GND

11

GND

10

9

8

7

6

5

4

3

2

1

ACES_51524-0100N-001

CONN@

B B

20120705 Correct J3's footprint

20120714 Correct J3's pin define

20120912 Modify J3's pin define

C265

C264

0.1U_0402_16V7K

1

@

2

@

2

SCardRst SCardclk SCardFcb

SCardC6 SCardData SCardC8 ICCInsertN

C262

C263

0.1U_0402_16V7K

1

@

2

20120709 Vendor's suggestion

+VCC_SM

C260

C261

0.1U_0402_16V7K

1

@

2

20120709 Vendor's suggestion

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/06/11 2013/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Smart Card

1

0.2

37 53Friday, September 28, 2012

0.2

5

+5VDS

8051TX_STBYLED#<30,33,39>

D D

ON/OFFBTN_KBC#<30,33>

8051TX_STBYLED# ON/OFFBTN_KBC#

EMI cap

C C

+5VS_KBL

KB backlight Conn

JP9

8

778

6

556

4

334

2

112

ACES_50611-0040N-001

CONN@

20120926 Follow ME's request

AO3413L_SOT23-3

JPWR1

112 334 556 778

ACES_50611-0040N-001

CONN@

20120917 Change JPWR1 to 4 pin

C270

0.1U_0402_16V7K

20120927 HP's request

Q47

3

2

G

1

0.047U_0402_16V7K

1

2

ON/OFFBTN_KBC#

200K_0402_5%

C295

@

2

1

+5VS

S

D

KBL_DET# <13,18>

R408

2 4 6 8

12

DMN66D0LDW-7_SOT363-6

+5VDS

Q10A

12

R407

R407 100K_0402_5%

100K_0402_5%

61

4

2

KBD_PWM_LED <30>

3

KSI[0..7]<30>

KSO[0..13]<30>

KSI0

KSI1

KSI2

KSI7 KSI6 KSI5 KSI4 KSI3 KSI2 KSI1 KSI0

KSO13 KSO12 KSO11 KSO10

KSO9 KSO8 KSO7 KSO6 KSO5 KSO4 KSO3 KSO2 KSO1 KSO0

D33

2

1

3

DAP202UGT106_SOT323-3

D34

2

1

3

DAP202UGT106_SOT323-3

D35

2

1

3

DAP202UGT106_SOT323-3

REC_MUTE_CTRL_KB<26>

KSI_D_0

KSI_D_8

KSI_D_1

KSI_D_9

KSI_D_2

KSI_D_10

+3VDS

KSO13 KSO9 KSI_D_11 KSI7 KSI_D_5 KSO10 KSO7 KSO8 KSI_D_3 KSI_D_2 KSI_D_0 KSI_D_12 KSI_D_14 KSO2 KSO11

KSI_D_0 <39>

KSI_D_1 <39>

CONN@ JKB1

CONN@

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

GND36GND

38

GND

E-T_6781-Q34N-00R

1

KSI3

1

KSI4

1

KSI5

JKB1

11 13 15 17 19 21 23 25 27 29 31 33

GND

D36

DAP202UGT106_SOT323-3

D37

DAP202UGT106_SOT323-3

D38

DAP202UGT106_SOT323-3

2

1

3

360_0402_5%

3

5

7

9

11 13 15 17 19 21 23 25 27 29 31 33

35 37

2

3

2

3

2

3

KSO12 KSI_D_9 KSI_D_13 KSI_D_6 KSO1 KSO6 KSO4 KSO3 KSI_D_1 KSI_D_4 KSI_D_10 KSI_D_8 KSO5 KSO0

KSI_D_3

KSI_D_11

KSI_D_4

KSI_D_12

KSI_D_5

KSI_D_13

R400

12

8051RX_CAPLED# <30>

8051_RECOVER#/_NUM_LOCK_LED# <30>

20120711 Correct JKB1's footprint

20120712 Correct connection for JKB1

20120917 Correct connection for JKB1

D39

2

1

KSI6

KSI_D_6

3

KSI_D_14

DAP202UGT106_SOT323-3

KSO12 KSI_D_9 KSI_D_13 KSI_D_6

KSO1 KSO6 KSO4 KSO3

KSI_D_1 KSI_D_4 KSI_D_10 KSI_D_8

KSO13 KSO9 KSI_D_11 KSI7

KSI_D_5 KSO10 KSO7 KSO8

KSI_D_3 KSI_D_2 KSI_D_0 KSI_D_12

KSI_D_14 KSO2 KSO11 KSO0

KSO5

1

C376

@C376

@

1 2

C377

@C377

@

1 2

C378

@C378

@

1 2

C379

@C379

@

1 2

C380

@C380

@

1 2

C381

@C381

@

1 2

C382

@C382

@

1 2

C383

@C383

@

1 2

C384

@C384

@

1 2

C385

@C385

@

1 2

C386

@C386

@

1 2

C387

@C387

@

1 2

C388

@C388

@

1 2

C389

@C389

@

1 2

C390

@C390

@

1 2

C391

@C391

@

1 2

C392 100P_0402_50V8J@C392 100P_0402_50V8J@

1 2

C393 100P_0402_50V8J@C393 100P_0402_50V8J@

1 2

C394 100P_0402_50V8J@C394 100P_0402_50V8J@

1 2

C395 100P_0402_50V8J@C395 100P_0402_50V8J@

C396

@C396

@

1 2

C397

@C397

@

1 2

C398

@C398

@

1 2

C399

@C399

@

1 2

C400

@C400

@

1 2

C401

@C401

@

1 2

C402

@C402

@

1 2

C403

@C403

@

1 2 1 2

C366

@C366

@

20120718 EMI's request

100P_0402_50V8J

100P_0402_50V8J 100P_0402_50V8J

100P_0402_50V8J

100P_0402_50V8J 100P_0402_50V8J

100P_0402_50V8J

100P_0402_50V8J 100P_0402_50V8J

100P_0402_50V8J

100P_0402_50V8J 100P_0402_50V8J

100P_0402_50V8J

100P_0402_50V8J 100P_0402_50V8J

100P_0402_50V8J

100P_0402_50V8J 100P_0402_50V8J

100P_0402_50V8J

B B

TP/B TO M/B

JTP1

2

112

4

334

SP_LEFT SP_MID SP_RIGHT

DDR_XDP_WAN_SMBCLK<11,12,13,16,28,5> DDR_XDP_WAN_SMBDAT<11,12,13,16,28,5>

TP_DATA<30> TP_CLK<30>

C297

100P_0402_50V8J

1

C298

100P_0402_50V8J

1

D32 YSDA0502C C/A SOT-23D32 YSDA0502C C/A SOT-23

2

A A

5

2

DDR_XDP_WAN_SMBCLK DDR_XDP_WAN_SMBDAT TP_DATA TP_CLK

+3VS

3

223

1

20120713 Change P/N for ESD's request 20120925 Install D32 as ESD's request

4

6

556

8

778

10

9910

12

111112

14

131314

16

151516

18

171718

20

191920

E-T_6900K-Q10N-00R

CONN@

+3VS

1

C296

2

0.1U_0402_16V7K

20120907 Change JTP1's footprint & Delete JTP2 => Need check Pin assigment

20120911 Change JTP1's footprint

3

SP_DATA<30> SP_CLK<30>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/06/11 2013/06/11

Stick Point CONN

SP_LEFT SP_MID SP_RIGHT

Compal Secret Data

Deciphered Date

2

+5VS

JP13

12

G4

11

G3

10

G2

9

G1

8

8 8

7

6

6 6

5

4

4 4

3

2

2 2

1

ACES_50554-0080N-001

CONN@

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

KB/TP/PWR CONN

38 53Friday, September 28, 2012

1

38 53Friday, September 28, 2012

0.2

5

4

3

2

1

Function Board

JFB1

D D

Function Key

MUTE

WIRELESS

+5VS

+3VDS KSI_D_0<38> KSI_D_1<38> KSO17<30>

MUTE_LED_CNTR<26>

LID_SW#<22,30>

KSI_D_0 KSI_D_1 KSO17 MUTE_LED_CNTR WL/BT_LED#

LID_SW#

USB & Card Reader Board

C C

USB3TN5<17> USB3TP5<17>

USB3RN5<17> USB3RP5<17>

USBP4-<17> USBP4+<17>

USB3TN2<17> USB3TP2<17>

USB3RN2<17> USB3RP2<17>

USBP1-<17> USBP1+<17>

@

T141PAD@T141PAD

HP_SENSE#<27>

B B

+3VS_NFC

1

C352

0.1U_0402_16V4Z

2

NFC_3S_SMBDAT<16> NFC_3S_SMBCLK <16>

NFC_INT<18>

A A

UIM_VPP<25>

20120724

+3VM_LAN

+3VS

R1317

100K_0402_5%

+5VDS +3VS +5VDS

EN_P1V5

20120910 Add R1376 for NFC power rail option

@

R1376

1 2

0_0402_5%

R1359

1 2

+3VS_NFC

0_0402_5%

1 2

NFC_SW

@

0_0402_5%

R1344

12

5

JFB1

2

112

4

334

6

556

8

778

10

9910

12

111112

14

131314

16

151516

18

171718

20

191920

E-T_6900K-Q10N-00R

CONN@

20120715 Correct JFB1's footprint

20120912 Correct JFB1's footprint & Pin assignment

JCR1

1

2

1

2

3

4

3

4

5

6

5

6

7

8

7

8

9

10

9

10

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59

12

11

12

14

13

14

16

15

16

18

17

18

20

19

20

22

21

22

24

23

24

26

25

26

28

27

28

30

29

30

32

31

32

34

33

34

36

35

36

38

37

38

40

39

40

42

41

42

44

43

44

46

45

46

48

47

48

50

49

50

52

51

52

54

53

54

56

55

56

58

57

58

60

59

60

61

GND

62

GND

63

GND

64

GND

65

GND

66

GND

ACES_50121-06001-001

CONN@

JNFC1

112 334 556 778 9910 111112

13

GND

15

GND

ACES_50559-01201-001

CONN@

PLT_RST#

@

1 2

R1380 0_0402_5%

2 4 6 8

NFC_SEL_R

10 12

14

12

16

R1377

R1377 200K_0402_5%

200K_0402_5%

20120910 HP's request

20120703 Add connection for NFC 20120710 Correct connection for NFC 20120724 Add connection as HP's request 20120730 Correct footprint for JNFC1

20120815 Add R1359 for NFC power rail option

+3VDS

NFC_RST# <16>

NFC_UART_RX <30>NFC_UART_TX<30>

4

PCIE_PTX_C_DRX_P8 <17> PCIE_PTX_C_DRX_N8 <17>

PCIE_PRX_DTX_P8 <17> PCIE_PRX_DTX_N8 <17>

CLK_PCIE_CR <15> CLK_PCIE_CR# <15>

CR_CLK_REQ# <15>

EXT_MIC_L2 <27>

HP_OUT_R <26>

HP_OUT_L <26>

20120713

PCH_PCIE_WAKE# <14,25>

20120801 HP's request 2012919 HP's request

+3V_PCH

12

NFC_SEL_R NFC_SEL

12

R358

@R358

@

10K_0402_5%

@

R1346

R1346 10K_0402_5%

10K_0402_5%

R1345

1 2

0_0402_5%

USB3TN6<17>

USB3RN6<17> USB3RP6<17>

USBP5-<17> USBP5+<17>

MB_DPA_AUX#<36> MB_DPA_AUX<36>

MB_DPA_TXP3<36> MB_DPA_TXN3<36>

MB_DPA_TXP2<36> MB_DPA_TXN2<36>

MB_DPA_TXP1<36> MB_DPA_TXN1<36>

MB_DPA_TXP0<36> MB_DPA_TXN0<36>

MB_DP_HPD<36>

USBP6-<17> USBP6+<17>

CLK_PCIE_EXP#<15> CLK_PCIE_EXP<15> CLKREQ_EXP#<15>

PCIE_PRX_EXPTX_N5<17> PCIE_PRX_EXPTX_P5<17>

PCIE_PTX_EXPRX_N5<17> PCIE_PTX_EXPRX_P5<17>

PCIE_PRX_DTX_N2<17> PCIE_PRX_DTX_P2<17>

PCIE_PTX_C_DRX_N2<17> PCIE_PTX_C_DRX_P2<17>

PLT_RST#<13,14,25,28,29,30,35,37,5>

CPPWR_EN<30>

0.01U_0402_16V7K_X7R

T151 PA D @T151 PAD @

Thunderbolt

JTB1

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

81

83

85

87

89

91

+3VDS

SLP_S3#<14,30,31,34,44,9>

EN_P1V5<30,33,44>

C340

+5VDS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

20120731 HP's request

1

2

2012/06/11 2013/06/11

93

95

97

99

101

103

105

107

109

111

113

115

117

119

FOX_QTS0120A-4121M-9H

CONN@

20120911 Change JTB1's footprint

Compal Secret Data

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

82

84

86

88

90

92

94

96

98

100

102

104

106

108

110

112

114

116

118

120

121

GND

122

GND

Deciphered Date

2

MXM_TB_LANE_N3 <35>

MXM_TB_LANE_P3 <35>USB3TP6<17>

MXM_TB_LANE_N2 <35>

MXM_TB_LANE_P2 <35>

MXM_TB_LANE_N1 <35>

MXM_TB_LANE_P1 <35>

MXM_TB_LANE_N0 <35>

MXM_TB_LANE_P0 <35>

MXM_TB_AUX# <35> MXM_TB_AUX <35>

TB_HPD <35>

PCIE_PRX_DTX_N3 <17>

PCIE_PRX_DTX_P3 <17>

PCIE_PTX_C_DRX_N3 <17> PCIE_PTX_C_DRX_P3 <17>

PCIE_PRX_DTX_N4 <17>

PCIE_PRX_DTX_P4 <17>

PCIE_PTX_C_DRX_N4 <17> PCIE_PTX_C_DRX_P4 <17>

CLK_TB_REFCLK# <15> CLK_TB_REFCLK <15> TB_CLKREQ# <15>

PCIE_PRX_DTX_N1 <17>

PCIE_PRX_DTX_P1 <17>

PCIE_PTX_C_DRX_N1 <17> PCIE_PTX_C_DRX_P1 <17>

USBP9- <17> USBP9+ <17>

SATA_ACT# <13,33> 8051TX_STBYLED# <30,33,38> AMBER_BATLED# <30> BAT_GRNLED# <13,30> WL/BT_LED# <25>

HDD_HALTLED <13> TB_HOT_PLUG# <17> CR_SX_WARN# <14>

+1.5VS

+3VS

+3VDS +5VS

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

CONN

LA-9371P

1

HDD LED PWR_LED

Battery charger LED

WIRELESS

HDD LED

of

39 53Friday, September 28, 2012

0.2

5

4

3

2

1

ADP_EN

DC IN

D D

Main BATT

2nd BATT

C C

ACFET RBFET

Battery Selector

BATT

Charger

BQ24736

ACDRV

RBFET

B+

B++

EN_P1V5

SLP_S3#

SIO_SLP_A#

RT8243AZQW

EN

RT8207M

EN

TPS51212

EN

NCP81103

+3VDSP

+1.35VP +1.5VP

+0.675VSP +0.75VSP

+CPU_CORE

Jumper

+3VDS

+5VDS+5VDSP

+1.35V +1.5V

+0.675VS +0.75VS

+1.05VM+1.05VMP

+3VS

SY8032

+3VS

EN

7/19

+1.5VSP +1.5VS

B B

VR_ON

EN

A A

5

4

3

2

1

5

ADP_SIGNAL

PJP1

D D

1

3

5

7

9

ACES_59 012-0100N-002

@

2

1

4

3

6

5

8

7

10

9

ADPIN I2C_MAIN_CLK -1

12

2

3

PD1

1

L30ESD2 4VC3-2_SOT23-3

12

PC1

PC4

100P_0402_50V8J

4

HCB2012 KF-121T50_080 5

1 2

HCB2012 KF-121T50_080 5

1 2

HCB2012 KF-121T50_080 5

1 2

1000P_0402_50V7K

3

PD11

PD11 AZC099-0 4S.R7G SOT23 ES D

AZC099-0 4S.R7G SOT23 ES D

4

V I/O

5

Ground

V BUS

6

V I/O

PL1

PL2

PL3

12

PC5

100P_0402_50V8J

VIN

12

PC6

1000P_0402_50V7K

PR1

@P R1

@

15K_040 2_5%

PJP2

1

2

3 4 5 6 7 8 9 10

I2C_MAIN_DAT -1

3 4 5 6 7

8 GND GND

FOX_BP0 208C-B24B1-9H

CONN@

7/11

12

PR2

100_0402_5%

@

12

PR3

V I/O

1K_0402_5%

2

PD10

PD10 L30ESD2 4VC3-2_SOT23-3

L30ESD2 4VC3-2_SOT23-3

PR5

100_0402_5%

2

3

VMB_A

12

PC10

PC10 100P_04 02_50V8J

100P_04 02_50V8J

HCB2012 KF-121T50_080 5

1 2

HCB2012 KF-121T50_080 5

PC3

PC3 1000P_0 402_50V7K

1000P_0 402_50V7K

1

PL4

PL5

3

2

1

12

PC8

12

PC2

0.1U_060 3_50V7K

12

PR4

100_0402_5%

100P_0402_50V8J

12

PC9

100P_0402_50V8J

1

BATT_A

12

PC7

0.01U_04 02_50V7K

OCP_MAIN#<50>

MAIN_BAT_DET#<30>

C C

PD12

12

PC16

PC16 100P_04 02_50V8J

100P_04 02_50V8J

100_0402_5%

2

3

VMB_B

PD12 L30ESD2 4VC3-2_SOT23-3

L30ESD2 4VC3-2_SOT23-3

12

PC12

PC12 1000P_0 402_50V7K

1000P_0 402_50V7K

1

PL6

HCB2012 KF-121T50_080 5

1 2

PL7

HCB2012 KF-121T50_080 5

PD13

PD13 AZC099-0 4S.R7G SOT23 ES D

AZC099-0 4S.R7G SOT23 ES D

4

V I/O

5

V BUS

6

B B

PJP3

1

2

3 4 5 6 7 8

I2C_BAY_DAT-1 I2C_BAY_CLK-1

12

3 4 5 6 7 8

FOX_BR0 208C-Z71H1-9H

CONN@

V I/O

7/11

PR6

100_0402_5%

@

3

V I/O

2

Ground

1

V I/O

12

PR7

PC14

1K_0402_5%

12

PC11

0.1U_060 3_50V7K

12

PR8

100P_0402_50V8J

12

100_0402_5%

PR9

PC15

100P_0402_50V8J

I2C_MAIN_DAT <30>

I2C_MAIN_CLK <30 >

BATT_B

12

PC13

0.01U_04 02_50V7K

1

I2C_BAY_DAT <30>

I2C_BAY_CLK < 30>

5341

0.2

A A

OCP_TRAVEL#<50>

TRAVEL_BAT_DET#<30>

Security Class ification

2012/04/03

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/03

3

Compal Secret Data

Deciphered Date

2014/12/31

2

Compal Electronics, Inc.

Title

DC Conn/BATT Conn

Size Docum ent Number Rev

15W

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

5

4

3

2

1

PQ107 AO 4423L 1P SO8PQ107 AO4423L 1P SO8

1 2 3 6

PQ101 AO 4423L 1P SO8PQ101 AO4423L 1P SO8

D D

+3VDS

C C

12

PR101

PC101

220K_0402_5%

0.1U_0402_25V6

61

PQ103A

2

ME2N7002DKW -G 2N SOT363-6

12

34

5

PQ103B

PR107

100K_0402_5%

ME2N7002DKW-G 2N SOT363-6

12

PR103

220K_0402_5%

ACFET_CHG

ADP_EN <30>

1 2 3 6

+3VDS

4/11

12

PR113

+5VS VIN

12

PR115

PR115 127K_0402_1%

127K_0402_1%

12

PR119

PR119 20K_0402_1%

20K_0402_1%

12

PR114

18.2K_0402_1%

PD104

PD104 LL4148_LL34-2

LL4148_LL34-2

12

B B

PR118

PR118 10K_0402_1%

10K_0402_1%

PR113 22K_0402_1%

22K_0402_1%

12

PR116

PR116 1M_0402_5%

1M_0402_5%

12

PC122

4

ACFET_CHG

4

100P_0402_50V8 J

8 7

5

8 7

5

21

@

CHARGER_DAT<30>

CHARGER_CLK<30>

PQ102

PQ102 MDU1512RH 1N PO WERDFN56-8

MDU1512RH 1N PO WERDFN56-8

1 2 3

12

PD101

PR104

4.12K_0603_1%

BAT54WS-7-F_SOD323-2~D

BQ24736RGRR_QFN20_3P 5X3P5

4/12

SRSET<50>

CHRG_ADP_DET <30>

4/12

V_3.9K<50>

4

12

PR127

PR127 10 +-1% 0402

10 +-1% 0402

1 2

PR128

PR128 10 +-1% 0402

10 +-1% 0402

12

7/30

PR105

4.12K_0603_1%

PR117

PR117 10K_0402_5%

10K_0402_5%

1 2

PR122

PR122 0 +-5% 0402

0 +-5% 0402

1 2

PC125

100P_0402_50V8 J

P2 B+P1VIN

PR109

PR109 10_1206_1%

10_1206_1%

PC111

PC111 1U_0603_25V6K

1U_0603_25V6K

1 2

BST_CHG-1

12

to 5*5, 9/7

PL101

PL101 1UH_PCMB053T-1R0M S_7A_20%

1UH_PCMB053T-1R0M S_7A_20%

1 2

PR108

1 2

2.2_0402_1%

PC112

0.047U_0402_25V7K

1 2

4

12

PC103

@

10U_0805_25V6K

PQ104

PQ104 AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

241

4.7U 20% VMPI0703AR-4R7M-Z01 5.5A

1 2

12

PR111

5

PR111

4.7_1206_5%

SNB_CHG

12

PQ106

AON7406L_DFN8-5

123

PC121

680P_0402_50V7 K

12

PC105

PC104

10U_0805_25V6K

PL102

12

PC106

PC107

0.1U_0402_25V6

10U_0805_25V6K

2200P_0402_50 V7K

for RF request, 8/6

PR110

0.02_1206_1%

1

CHG

2

CSOP1

12

PC113

0.1U_0402_25V6

12

PC108

PC138

@

68P_0402_50V8J

82P 50V J NPO 0402

PQ105

P2

AO4409L 1P SO8

1 2 3 6

P1

8 7

5

4

BATT

4

3

CSON1

12

PC114

0.1U_0402_25V6

12

PC115

PC116

PD102

2 1

RB551V-30_SOD323-2

PC116

10U_0805_25V6K

12

PC117

PC118

2200P_0402_50 V7K

0.01U_0402_50 V7K

PR102

8/8

PR102

0.005 +-1% 2512 100PP M/C

ACDRV_CHG

4

ACDRV

SRN_CHG

1

2

0.1U_0402_25V6

12

PC109

CMSRC_CHG

3

CMSRC

SRP_CHG

12

0.005 +-1% 2512 100PP M/C

4

3

PC102

1 2

12

0.1U_0402_25V6

ACN_CHG

ACP_CHG

1

2

21

ACP

PAD

ACN

20

VCC

19

PHASE

18

HIDRV

17

BTST

16

REGN

15

DL_CHG

PR120

PR120 0_0402_5%

0_0402_5%

1 2

PR121

PR121 0_0402_5%

0_0402_5%

1 2

CURRENT_ADC <30>

PC126

@

PC126

@

0.22U_0402_6.3V6K

B+

PC110

0.1U_0402_25V6

VCC_CHG

LX_CHG

DH_CHG

BST_CHG

REGN_CHG

RB751V-40_SOD323-2

12

PC120

PC120 1U_0603_25V6K

1U_0603_25V6K

12

PC124

0.1U_0603_25V7K

B+

12

PR112

2.2_0402_1%

1 2

PD103

5

CHRG_ADP_DET

PU102

5

6

ACPRES

ACDET

7

ICS

IOUT

8

SDA

9

SCL

10

ILIM

0.01U_0402_50 V7K

12

PC123

DLIM11SRN12SRP13GND14LODRV

0.01U_0402_50 V7K

12

PC119

VIN

12

PR124

49.9K_0402_1%

1 2

A A

5

12

PR125

PR125 576K_0402_1%

576K_0402_1%

1 2

PC127

100P_0402_50V8 J

12

PR126

49.9K_0402_1%

12

PC128

0.22U_0402_6.3V6K

VOLTAGE_ADC <30>

4

12

@

12

PC129

PC130

@

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50 V7K

2200P_0402_50 V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

12

PC131

PC139

@

6.8P_0402_50V8C

6.8P_0402_50V8C 82P 50V J NPO 0402

82P 50V J NPO 0402

3

12

PC133

PC132

@

0.1U_0402_25V6

2012/04/03

12

PC134

@

6.8P_0402_50V8C

2200P_0402_50 V7K

Compal Secret Data

@

12

PC140

@

82P 50V J NPO 0402

Deciphered Date

12

PC136

@

0.1U_0402_25V6

12

PC135

@

2200P_0402_50 V7K

12

PC141

PC137

@

6.8P_0402_50V8C

6.8P_0402_50V8C 82P 50V J NPO 0402

82P 50V J NPO 0402

2014/12/31

2

12

PC143

@

0.1U_0402_25V6

12

PC144

PC142

2200P_0402_50 V7K

PC145

@

6.8P_0402_50V8C

6.8P_0402_50V8C 82P 50V J NPO 0402

82P 50V J NPO 0402

12

PC147

PC146

@

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50 V7K

2200P_0402_50 V7K

12

PC148

@

6.8P_0402_50V8C

12

PC151

PC149

@

0.1U_0402_25V6

82P 50V J NPO 0402

for RF request, 8/6

Compal Electronics, Inc.

Title

CHARGER

Size D ocument Number Rev

15W

Date: Sheet of

Friday, September 28, 2012

Date: Sheet of

Friday, September 28, 2012

Date: Sheet of

Friday, September 28, 2012

1

12

PC153

PC152

PC150

@

6.8P_0402_50V8C

2200P_0402_50 V7K

82P 50V J NPO 0402

0.2

5342

5

D D

B+

PL301

@PL301

@

1UH_PCMB053T-1R0M S_7A_20%

1 2

PJP301

@PJ P301

@

PAD-OPEN 1x3m

C C

+3VDSP

12

@

12

PC324

@

12

PC326

0.1U_0402_25V6

PC328

PC327

@

2200P_0402_50 V7K

B++

12

PC305

PC322

@

68P_0402_50V8J

2200P_0402_50V7K

82P 50V J NPO 0402

12

PC329

@

6.8P_0402_50V8C

2200P_0402_50V7K

4.7U 20% VMPI0703AR -4R7M-Z01 5.5A

1

+

PC314

2

82P 50V J NPO 0402

150U_B2_6.3VM_R35M

12

PC304

0.1U_0402_25V6

PL303

1 2

12

PC303

10U_0805_25V6K

12

PR314

4.7_1206_5%

12

PC313

680P_0402_50V7K

for RF request, 8/6

B B

4

PQ301

PQ301 SIS412DN-T1-GE3 1N POWERPAK1212-8

SIS412DN-T1-GE3 1N POWERPAK1212-8

0.1U_0603_25V7K

3 5

241

3 5

241

0.1U_0603_25V7K

PQ303

PQ303 AON7406L 1N DFN

AON7406L 1N DFN

PC310

+3VDSP

12

BST_3V-1

B++

PR311

@PR3 11

@

0_0402_5%

1 2

PC319

PR313

2.2_0603_5%

12

0.1U_0603_25V7K

PC320

PC320 100P_0402_50V8J

100P_0402_50V8J

1 2

PR304

13.7K_0402_1%

1 2

PR306

20K_0402_1%

PG_3V_5V

BST_3V

UG_3V

LX_3V

LG_3V

PR321

499K_0402_1%

1 2

12

PU301

6

PGOOD

7

BOOT2

8

UGATE2

9

PHASE2

10

LGATE2

ENLDO_3V_5V

12

PR325

100K_0402_1%

FB_3V

5

3

12

1 2

PR310 68K_0603_5%PR 310 68K_0603_5%

PR309 115K +-1% 0402PR309 115K +-1% 0402

PR308 124K +-1% 0402PR308 124K +-1% 0402

ENTRIP2

ENTRIP1

3

2

4

FB2

TON

ENTRIP1

ENTRIP2

RT8243AZQW WQFN 20P

VIN11ENLDO12ENM13LDO514LDO3

12

PC316

1U_0402_10V6K

12

PR32410K_0402_1% PR32410K_0402_1%

PR305

30K_0402_1%

PR307

20K_0402_1%

1 2

FB_5V

1

FB1

PAD

BYP1

BOOT1

UGATE1

PHASE1

LGATE1

15

12

PC302

4.7U_0805_10V6K

PC317

4.7U_0805_10V6K

21

20

19

BST_5V

18

UG_5V

17

LX_5V

16

LG_5V

12

PR312

2.2_0603_5%

1 2

+3VLP

Typ: 175mA

+5VLP

Typ: 225mA

+5VDSP

12

PC321

PC321 1U_0402_10V6K

1U_0402_10V6K

BST_5V-1

2

PC311

0.1U_0603_25V7K

1 2

1

<1>5V=283KHz 3V=330KHz (Vin=6.5 ~ 12v) <

2>5V=321KHz 3V=375KHz (Vin=12 ~ 25v)

(By Rton= 68K ohm)

B++

12

PQ302

PQ302 SIS412DN-T1-GE3 1N POWERPAK1212-8

SIS412DN-T1-GE3 1N POWERPAK1212-8

3 5

241

2.2UH +-20% ETQ P3W2R2WF N 8.5A

1 2

12

PR315

4.7_1206_5%

12

PC312

PQ304

3 5

241

MDV1526URH 1N PDFN33-8

680P_0402_50V7K

12

PC308

PC307

PC306

10U_0805_25V6K

PL302

1

+

PC315

2

150U_UD_6.3VM_R15M

12

PC309

0.1U_0402_25V6

2200P_0402_50V7K

for RF request, 8/6for RF request, 8/6

12

PC331

PC330

@

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50 V7K

2200P_0402_50 V7K

for RF request, 8/6

12

PC325

PC323

@

68P_0402_50V8J

82P 50V J NPO 0402

+5VDSP

12

PC332

PC333

@

6.8P_0402_50V8C

6.8P_0402_50V8C 82P 50V J NPO 0402

82P 50V J NPO 0402

PJP302

PJP302 JUMP_43X118

JUMP_43X118

112

PJP303

PJP303 JUMP_43X118

JUMP_43X118

112

PJP306

PJP306 JUMP_43X39

JUMP_43X39

+3VLP +3VL

A A

5

112

+5VDS+5VDSP

2

+3VDS+3VDSP

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

+3VLP

Compal Secret Data

2011/06/13

3

Compal Secret Data

Deciphered Date

2

2012/06/13

Title

Size D ocument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

3VDSP/5VDSP

Friday, September 28, 2012

15W

1

43 53

0.2

5

PL401

HCB1608 KF-121T30_060 3

1 2

B+

12

PC419

PC401

@

82P 50V J NPO 0402

D D

82P 50V J NPO 0402

B+_1.35V

12

PC403

0.1U_0402_25V6

68P_0402_50V8J

12

PC406

PC405

PC404

10U_0805_25V6K

2200P_0402_50V7K

for RF request, 8/6

PL402

1

2

330U_D2_2.5VY_R15M

PL402

1 2

EN_P1V5<30,33,39>

12

PR404

4.7_1206 _5%

SNB_1.35V

12

PC410

680P_0603_50V7K

PR416

4.7K +-5% 0 402

2.2UH_VM PI0703AR-2R2M-Z01 _8A_20%

+1.35VP

+

PC409

C C

B B

4

4.7U_0805_25V6-K

PQ401

PQ401 SIS412DN-T 1-GE3 1N POW ERPAK1212-8

SIS412DN-T 1-GE3 1N POW ERPAK1212-8

3 5

241

5

4

PQ402

123

MDV1526 URH 1N PDFN33-8

KBC_PWR_ON #<34,45>

12

1

2

+5VDS

13

D

2

G

S

PR417

100_0402_5%

PD401

PD401 BAT54CW _SOT323-3

BAT54CW _SOT323-3

3

PR405

5.1_0603 _5%

1 2

12

7/11

PQ404

PQ404 2N7002K W 1N SOT323 -3

2N7002K W 1N SOT323 -3

PC402

0.22U_04 02_10V6K

1 2

PR403

15.8K +-1% 0402

1 2

+5VDS

PC411

PC411 1U_0603 _10V6K

1U_0603 _10V6K

+3VS

SLP_S3#<14,30 ,31,34,39,9>

3

PR418

2.2_0603 _5%

1 2

PR402

PR402 0_0402_ 5%

0_0402_ 5%

1 2

DH_1.35V

LX_1.35V

17

16

PHASE

LGATE

PGND

CS

RT8207M ZQW_W QFN20_3X3

VDDP

VDD

PGOOD

9

10

TON_1.35V

12

PC416

@P C416

@

0.1U_040 2_10V7K

PC412

PC412 1U_0603 _10V6K

1U_0603 _10V6K

PR419

PR419 100K_0402_5%

@

100K_0402_5%

@

1 2

1.35V_PG

PR407

PR407 887K_04 02_1%

887K_04 02_1%

1 2

PR412

PR412 0_0402_ 5%

0_0402_ 5%

1 2

15

14

13

12

11

DL_1.35V

CS_1.35V

VDD_1.35 V +1.35 VP

12

B+_1.35V

+1.35VP

+0.675VSP

BST_1.35V

19

18

20

PU401

21

VTT

VLDOIN

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

S3

6

7

FB_1.35V

S3_1.35V

12

PC417

@P C417

@

0.1U_040 2_10V7K

PAD

1

2

3

4

5

BOOT

UGATE

S5

TON

8

2

VTTREF_ 0.675V

12

PR411

PR411 10K_040 2_1%

10K_040 2_1%

+1.35VP

PR406

PR406 10K_040 2_1%

10K_040 2_1%

1 2

PC414

@P C414

@

.1U_0402 _16V7K

1 2

D

S

D

S

13

1 2

PQ403

G

2N7002K W 1N SOT323 -3

2

10K_040 2_1%

12

PC407

10U_0603_6.3V6M

PR408

41.2K_04 02_5%

+3VDS

PR413

1 2

12

PC418

PC418 .1U_0402 _16V7K

.1U_0402 _16V7K

12

PC408

10U_0603_6.3V6M

PR414

PR414 0 +-5% 040 2

0 +-5% 040 2

1 2

+0.675VSP

12

PC413

0.033U_0 402_16V7K

12

PC415

PC415 .1U_0402 _16V7K

.1U_0402 _16V7K

12

+1.35VP

PR415

@P R415

@

10K_040 2_5%

1

8/1

SLP_W LAN# <14,25>

SLP_S4#<14>

A A

5

4

KBC_DS3_EN <25,29,30,5,9>

+1.35VP

+0.675VSP

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/03

3

PJP401

PJP401 JUMP_43 X118

JUMP_43 X118

1 2

PJP402

PJP402 JUMP_43 X39

JUMP_43 X39

2

112

Compal Secret Data

Deciphered Date

+1.35V

+0.675VS

2014/12/31

2

Compal Electronics, Inc.

Title

DDR Power

Size Docum ent Number Rev

15W

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet

1

5344

of

0.2

5

D D

+3VS

12

PR511

@

PR511

@

100K_0402_5%

12

PR506

470K_04 02_1%

100K_0402_5%

TRIP_1.05V

EN_1.05V

FB_1.05V

RF_1.05V

5.11K_04 02_1%

PR508

1.05VM_P G<31>

7/17

PR503

86.6K +-1% 0402

PR504

PR504 100_040 2_5%

100_040 2_5%

SIO_SLP_A#

C C

1 2

12

PC508

@

.1U_0402_16V7K

4

PU501

1

2

3

4

5

VBST

PGOOD

TRIP

DRVH

EN

SW

V5IN

VFB

DRVL

RF

TPS5121 2DSCR_SON10_ 3X3

TP

12

10

9

8

7

6

11

BST_1.05 V

DH_1.05V

LX_1.05V

DL_1.05V

PR502

2.2_0603 _5%

1 2

BST_1.05 V-1

+5VDS

12

PC507

PC507 1U_0603 _6.3V6M

1U_0603 _6.3V6M

PC506

0.22U_06 03_16V7K

1 2

4/11

3

AON7406 L 1N DFN

PQ502

B+_1.05V

12

PC504

4.7U_0805_25V6-K

PQ501

PQ501 SIS412DN-T 1-GE3 1N POW ERPAK1212-8

SIS412DN-T 1-GE3 1N POW ERPAK1212-8

3 5

241

2.2UH +-20 % ETQP3W2R 2WFN 8.5A

12

PR505

4.7_1206 _5%

SNB_1.05V

12

PC511

3 5

241

PC511 680P_06 03_50V7K

680P_06 03_50V7K

12

PC505

4.7U_0805_25V6-K

PL502

1 2

2

12

PC503

PC502

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50V7K

2200P_0402_50V7K

for RF request, 8/6

12

PC512

@

68P_0402_50V8J

PL501

HCB2012 KF-121T50_080 5

1 2

12

PC513

@

82P 50V J NPO 0402

1

+

PC510

PC510 220U_B2 _2.5VM_R15M

220U_B2 _2.5VM_R15M

2

1

B+

+1.05VMP

PQ503

2N7002K W 1N SOT323 -3

KBC_PWR_ON #

B B

PQ503

2

G

13

D

S

PR510

PR510 10K_040 2_1%

10K_040 2_1%

1 2

+1.05VMP

PJP501

PJP501 JUMP_43 X118

JUMP_43 X118

1 2

+1.05VM

4/11

A A

Security Class ification

2012/04/03

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/03

3

Compal Secret Data

Deciphered Date

2014/12/31

2

Compal Electronics, Inc.

Title

1.05VMP

Size Docum ent Number Rev

15W

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

1

5345

0.2

5

D D

Place close to phase 1 inductir

C C

PC245

390P_0402_50V7K

PR215

49.9_0402_1%

1 2

1K_0402_1%

1 2

PR221

0_0402_5%

1 2

PR224

0_0402_5%

PR219

1 2

12

PC251

1000P_0402_50V7K

1 2

VSSSENSE<10,9>

VCCSENSE<9>

B B

12

PH201

220K_0402 _5%_ERTJ0EV224J

1K_0402_1%

PC246

10P_0402_25V8K

1 2

PR220

7.5K_0402_1%

+5VDS

4

PR201

75K_0402_ 1%

1 2

PR212

+VCCIO_OUT

165K_0402_1%

1 2

CPU_B+

1 2

12

PC247

0.01U_040 2_25V7K

1 2

PR222

1K_0402_5%

1 2

PC252

2200P_0402_50V7K

1 2

PR226

2_0603_5%

PR203

24.3K_0402_1%

1 2

.1U_0402_16V7K

PC254

1 2

2.2U_0603 _10V7K

PR217

PC249

3

PR202

143K_0603_1%

1 2

143K_0603_1%

1 2

143K_0603_1%

PC240

PC239

1 2

220P_0402 _50V8J

820P_0402 _50V7K

PC242

1000P_040 2_50V7K

CSSUM

CSCOMP

57W=17.4K 47W=15.4K

PR214

17.4K +-1% 0402

1 2

12

0_0402_5%

PWR_GD<30,31,5>

KBC_PROC_HOT_R<24,5>

1 2

28 29 30 31 32 33 34 35 36

37

PR227

PR228

0_0402_5%

ILIM IOUT VRMP COMP FB DIFFOUT VSN VSP VCC

GND

27

26

CSSUM

CSCOMP

EN1VRHOT#2SDIO3ALERT#4ROSC7SCLK

VR_HOT#

1 2

CSP3

CSP2

CSP1

PU201

20

19

21

25

24

22

23

NCP81103MNTWG_QFN36_5X5

BST3

CSP3

CSP1

CSP2

DRON

CSREF

PWM2/IMAX

PVCC PGND

VR_RDY

TSENSE

INT_SEL

5

6

8

9

TSENSE

SDIO

ALERT#

SCLK

VR_RDY

PR229

24.9K_0402_1%

PR204

PR205

75K +-1% 0402

1 2

18

HG3

17

SW3

16

LG3

15 14 13

LG1

12

SW1

11

HG1

10

BST1

PR225

45.3K_0402_1%

1 2

PC255

PC255 .1U_0402_16V7K

.1U_0402_16V7K

1 2

SWN3

SWN2

SWN1

CSREF <47>

DRON <47>

PR213

57W=75K 47W=66.5K

81103_PWM <47>

PR218

2.2_0603_5%

1 2

HG3 <47>

LG3 <47>

1 2

PR252 0_0402_5%PR252 0_0402_5%

LG1 <47>

HG1 <47>

PR223

2.2_0603_5%

1 2

TSENSE

2

CSREF

PC248

0.22U_0402_10V6K

1 2

PC250

1 2

2.2U_0603_10V7K

PC253

0.22U_0402_10V6K

1 2

PR251

12

0_0402_5%

CSP3

CSP2

CSP1

12

PC241

12

PC243

12

PC244

0_0402_5%

0_0402_5% PR253

PR253

1 2

0.047U_04 02_16V7K

PR206

20K_0402_ 1%

@ PR206

20K_0402_ 1%

@

1 2

PR208

20K_0402_ 1%

@ PR208

20K_0402_ 1%

@

1 2

PR210

20K_0402_ 1%

@ PR210

20K_0402_ 1%

@

1 2

SW3 <47>

SW1 <47>

+5VDS

PR207

4.87K +-1% 0402

12

PR209

4.87K +-1% 0402

12

PR211

4.87K +-1% 0402

12

1

SWN3 <47>

SWN2 <47>

SWN1 <47>

1 2

12

PR233

0_0402_5 %

PR233

0_0402_5 %

PR234

PR230

100 +-5% 0402

VR_SVID_DAT<9>

A A

5

VR_SVID_ALRT#<9>

VR_SVID_CLK<9>

1 2

PR236

22 +-5% 0402

1 2

PR237

22 +-5% 0402

1 2

PR238

22 +-5% 0402

100 +-5% 0402

1 2

SDIO

ALERT#

SCLK

4

PC256

PC256 .1U_0402_16V7K

.1U_0402_16V7K

1 2

<31>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR232

PR231

PR230

PR234

62K +-1% 0 402

+3VS

VGATE

Compal Secret Data

2011/12/14 2012/12/31

3

Compal Secret Data

PR235

13K_0402_ 1%

1 2

Place close to phase 1 MOSFET

Deciphered Date

PH202

100K_0402 _1%_TSM0B104F42 51RZ

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

PWR-+CPU_CORE

QFKAA

1

0.2

46 53Friday, September 28, 2012

0.2

5

D D

to 3*3, 9/7

PR239

2.2_0603_1%

HG1<46>

SW1<46>

LG1<46>

C C

12

3 5

5

4

CPU_B+

12

PC211

PQ211

AON7518 1N DFN

PQ211

AON7518 1N DFN

241

12

PQ209

123

SNUB_CPU1

12

SIR818DP-T1-GE3 1N POWERPAK SO8

4

PJP201

for RF request, 8/6

12

PC212

10U_0805_25V6K

PR240

4.7_1206_5%

PC259

680P_0402_50V7K

12

PC213

PC214

10U_0805_25V6K

0.1U_0402_25V6K

PL204

0.22UH 20% MMD-06DZNR22MEO1L 25A

1

2

12

PC215

2200P_0402_50V7K

4

3

PC264

@

V1N_CPU

@

68P_0402_50V8J

PR241

PR241 10_0402_1%

10_0402_1%

PC267

82P 50V J NPO 0402

12

1 2

PAD-OPEN 1x3m

1 2

PL201

@ PL201

@

FBMA-L11-453215-800LMA90T_1812

CSREF <46>

SWN1 <46>

12

PC257@

68P_0402_50V8J

3

+VCC_CORE

12

PC258@

220P_0402_25V8K

B+

2

1

Place on MXM side, 8/7

12

PC230

10U_0805_25V6K

for RF request, 8/6

12

PC232

PC231

10U_0805_25V6K

0.1U_0402_25V6K

12

PR243

4.7_1206_5%

SNUB_CPU3

12

PC260

680P_0402_50V7K

CPU_B+ B+

12

PC268

PC238

PL203

0.22UH 20% MMD-06DZNR22MEO1L 25A

1

2

PC268

PC265

@

68P_0402_50V8J

2200P_0402_50V7K

4

3

82P 50V J NPO 0402

V3N_CPU

1

+

PC233

2

100U_25V_M

PR244

10_0402_1%

1

2

1

+

PC235

PC234

PC235

100U_25V_M

@

100U_25V_M

2

@

+VCC_CORE

12

CSREF

SWN3 <46>

to 3*3, 9/7

12

PR242

2.2_0603_1%

HG3<46>

SW3<46>

LG3<46>

12

3 5

241

5

4

123

12

PC229

10U_0805_25V6K

PQ204

AON7518 1N DFN

PQ204

AON7518 1N DFN

PQ205

SIR818DP-T1-GE3 1N POWERPAK SO8

10U_0805_25V6K

for RF request, 8/6

CPU_B+

12

PC205

PC204

PC206

10U_0805_25V6K

PL202

0.22UH 20% MMD-06DZNR22MEO1L 25A

1

2

12

PC207

PC203

10U_0805_25V6K

0.1U_0402_25V6K

0.1U_0402_25V6K 2200P_0402_50V7K

2200P_0402_50V7K

4

3

V2N_CPU CSREF

Security Classification

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRON ICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

3

12

PC266

@

10_0402_1%

Issued Date

68P_0402_50V8J

PR250

12

@

PC269

82P 50V J NPO 0402

12

+VCC_CORE

SWN2 <46>

Compal Secret Data

2011/12/14 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PWR-CPU_CORE

Size Document Number Rev

C

Date: Sheet of

QFKAA

1

47 53Friday, September 28, 2012

0.2

0.22U_0402_10V6K

0.22U_0402_10V6K PR246

PR246

2.2_0603_1%

4

to 3*3, 9/7

12

PQ203

AON7518 1N DFN

PQ203

AON7518 1N DFN

3 5

241

5

4

123

12

PR249

4.7_1206_5%

PQ201

SNUB_CPU2

12

PC263

SIR818DP-T1-GE3 1N POWERPAK SO8

680P_0402_50V7K

PR245

2.2_0603_5%

B B

81103_PWM<46>

DRON<46>

0_0402_5%

PR248

12

5

+5VDS

A A

PC262

PR247

PR247 2K_0402_1%

2K_0402_1%

2.2U_0603_10V7K

12

EN_VCORE2

VCC_VCORE2

2.2_0603_5%

1 2

BSTA2 BSTA2_1

1

2

3

4

PU202

PU202 NCP81151MNTBG_DFN8_2X2

NCP81151MNTBG_DFN8_2X2

BST

PWM

EN

VCC

FLAG

DRVH

GND

DRVL

9

8

7

SW

6

5

12

PC261

HG2

SW2

LG2

5

4

3

2

1

+

2

1

2

12

4 X 470u/4m 34X 22u/0805

1

+

PC2003

PC2002

2

470U_D2_2VM_R4.5M

1

PC2015

PC2014

2

22U_0805_6.3V6M

12

PC2025

PC2026

22U_0805_6.3V6M

1

+

PC2004

2

470U_D2_2VM_R4.5M

1

PC2016

2

22U_0805_6.3V6M

12

PC2027

22U_0805_6.3V6M

1

12

PC2005

PC2006

2

22U_0805_6.3V6M

1

12

PC2018

PC2017

2

12

22U_0805_6.3V6M

12

PC2028

PC2029

22U_0805_6.3V6M

1

PC2007

2

22U_0805_6.3V6M

12

PC2019

22U_0805_6.3V6M

12

PC2030

22U_0805_6.3V6M

1

PC2008

PC2009

2

12

PC2009

2

22U_0805_6.3V6M

12

PC2020

PC2021

22U_0805_6.3V6M

12

PC2032

PC2031

22U_0805_6.3V6M

12

PC2010

22U_0805_6.3V6M

12

PC2022

22U_0805_6.3V6M

12

PC2033

22U_0805_6.3V6M

12

PC2011

PC2012

22U_0805_6.3V6M

12

PC2023

22U_0805_6.3V6M

12

PC2034

PC2035

22U_0805_6.3V6M

12

PC2036

22U_0805_6.3V6M

12

PC2037

PC2038

22U_0805_6.3V6M

+VCC_CORE

+VCC_CO RE

D D

1

+

PC2001

2

470U_D2_2VM_R4.5M

12

PC2013

22U_0805_6.3V6M

C C

12

PC2024

22U_0805_6.3V6M

B B

A A

Security Class ification

2012/04/03

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/03

3

Compal Secret Data

Deciphered Date

2014/12/31

2

Compal Electronics, Inc.

Title

PROCESSOR DECOUPLING

Size Docum ent Number Rev

15W

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

1

5348

0.2

A

1 1

+3VS

7/17

1

PJP602

1

JUMP_43 X39

@

2

2 2

12

PC601

100K_0402_5%

22U_0805_6.3VAM

12

PR605

@

PR605

@

+3VS

PU601

PU601 SY8032ABC _SOT23-6

SY8032ABC _SOT23-6

4

IN

5

PG

GND

FB6EN

7/17

LX

B

PR601

3

LX_1.5V

2

1

EN_1.5V

12

PC603

@ PC 603

@

0.1U_040 2_10V7K

1.5VS_PG <31>

2N7002K W 1N SOT323 -3

SLP_S3<34>

PC602

680P_04 02_50V7K

SNUB_+1.5V

1 2

4X4

PL602

4.7_0402_1%

1 2

PL602

0.47UH +-2 0% PCMC042T-R47 MN 6A

1 2

PR602

PR602 10K_040 2_5%

10K_040 2_5%

1 2

PQ601

13

D

2

G

S

+3VS

12

PR603

150K_0402_1%

12

PR604

PR604 100K_04 02_1%

100K_04 02_1%

C

PJP601

+1.5VSP

12

PC604

22P_0402_50V8J

12

PC606

PC605

22U_0805_6.3VAM

+1.5VSP

+1.5V_PCIEP TDC=0.46A

2

JUMP_43 X39@

D

112

+1.5VS

Peak Current=0.66A

3 3

4 4

Security Class ification

2012/04/03

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2012/04/03

Compal Secret Data

Deciphered Date

C

2014/12/31

Compal Electronics, Inc.

Title

1.5VSP

Size Docum ent Number Rev

15W

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet

D

5349

of

0.2

5

+5VS

PR1101

PR1101 665K_04 02_1%@

665K_04 02_1%@

1 2

PR1102

PR1102 200K_04 02_1%@

D D

OCP_MAIN#<41>

OCP_TRA VEL#<41>

200K_04 02_1%@

1 2

PR1103

PR1103 118K_04 02_1%@

118K_04 02_1%@

1 2

PR1104

PR1104 118K_04 02_1%@

118K_04 02_1%@

1 2

12

PR1105

PR1105 200K_04 02_1%@

200K_04 02_1%@

12

PR1106

PR1106 1M_0402 _1%@

1M_0402 _1%@

4

PC1101

1U_0603 _16V6K@

1 2

1

+IN

2

V-

3

-IN

PU1101

@

LMV321AS5X_SOT23-5

OUT

3

+5VS

5

V+

4

12

PR1107

PR1107 2K_0402 _5%@

2K_0402 _5%@

12

PC1102

0.01U_0402_16V7K

@

2

1

+3VDS

2

B

E

B

2

12

PR1109

PR1109 100K_04 02_5%

100K_04 02_5%

C

PQ1103

PQ1103 MMBT390 4WH_SOT32 3-3

MMBT390 4WH_SOT32 3-3

3 1

E

3

PQ1104

PQ1104 MMBT390 6H_SOT23-3

MMBT390 6H_SOT23-3

C

1

SRSET <42>

PQ1101

PR1108

PR1108 100_040 2_5%

100_040 2_5%

ADP_SIGNA L

C C

ADP_ID_CHK

B B

1 2

2N7002K W 1N SOT323 -3

P1

12

PR1121

PR1121 200K_04 02_1%

200K_04 02_1%

12

PR1123

86.6K_04 02_1%

PQ504

2

G

12

PR1125

PR1125 13K_040 2_1%

13K_040 2_1%

13

D

S

12

PR1124

PR1124 22K_040 2_5%

22K_040 2_5%

12

PR1110

8.06K_04 02_1%

12

PR1113

8.66K_04 02_1%

12

PR1117

45.3K_04 02_1%

PR1120

PR1120 274K_04 02_1%

274K_04 02_1%

1 2

3

+

2

-

12

PC1104

@P C1104

@

0.01U_04 02_16V7K

+3VDS

B

2

E

1

3

C

PQ1102

PQ1102 MMBT390 6H_SOT23-3

MMBT390 6H_SOT23-3

+5VDS

8

P

1

O

G

PU1102A

PU1102A LM393DR 2G SO8

LM393DR 2G SO8

4

PQ1101 NDS0610 _NL_SOT23-3

NDS0610 _NL_SOT23-3

D

S

D

S

13

G

2

VIN

12

+3VDS

12

PR1122

PR1122 47K_040 2_5%

47K_040 2_5%

12

PR1111

PR1114

PR1114 220K_04 02_5%

220K_04 02_5%

PR1118

PR1118 130K_04 02_1%

130K_04 02_1%

2

0_0402_ 5%

1

12

ADP_PRE S <30,34>

3

PD1101

PD1101 BAV70W _SOT323-3@

BAV70W _SOT323-3@

PR1116

3.9K_040 2_5%

1

PC1103

PC1103 3900P_0 402_50V7K

3900P_0 402_50V7K

2

V_3.9K<42>

12

PR1115

PR1115 100_040 2_5%

100_040 2_5%

12

PD1102

PD1102 GLZ4.7B_ LL34-2

GLZ4.7B_ LL34-2

12

PR1119

@P R1119

@

0_0402_ 5%

PR1112

PR1112 100K_04 02_5%

100K_04 02_5%

1 2

OCP_A_IN <30 >ADP_A_ID <30 >

+3VL

A A

Security Class ification

2012/04/03

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/03

3

Compal Secret Data

Deciphered Date

2014/12/31

2

Compal Electronics, Inc.

Title

ADP_OCP

Size Docum ent Number Rev

15W

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

1

5350

0.2

5

MFET_B

D D

PD1202

PD1202 SX34H_S MA

SX34H_S MA

21

MFET_A

12

PR1205

PR1205 470K_04 02_5%

470K_04 02_5%

BATT

C C

B B

12

PR1207

PR1207 470K_04 02_5%

470K_04 02_5%

BATT

12

PR1216

PR1216 200K_04 02_1%

200K_04 02_1%

12

PR1218

PR1218 137K_04 02_1%

A A

137K_04 02_1%

5

4

3 6 2 1

PQ1203

PQ1203 AO4409L 1P SO8

AO4409L 1P SO8 PQ1205

PQ1205 AO4409L 1P SO8

AO4409L 1P SO8

1 2 3 6

4

PD1203

PD1203 SX34H_S MA

SX34H_S MA

+3VDS

4/11

12

PR1214

10K_040 2_5%

12

PR1217

64.9K_04 02_1%

13

D

2

G

PQ1209

S

2N7002K W 1N SOT323 -3

5

7 8

8 7

5

21

5

7 8

PQ1204

PQ1204 AO4409L 1P SO8

AO4409L 1P SO8 PQ1206

PQ1206 AO4409L 1P SO8

AO4409L 1P SO8

8 7

5

MFET_B

MFET_A

PR1213

PR1213 1M_0402 _5%

1M_0402 _5%

1 2

5

+

6

-

4

+5VDS

4/11 4/11

8

P

G

PU1102B

PU1102B LM393DR 2G SO8

LM393DR 2G SO8

4

PR1202

PR1202 10K_040 2_5%

10K_040 2_5%

1 2

36 2 1

1 2 36

1 2

10K_040 2_5%

10K_040 2_5% PR1212

PR1212

7

O

4

2

12

PC1201

0.1U_060 3_25V7M

4

1

PD1201

PD1201 BAV99W T1G_SC70-3

BAV99W T1G_SC70-3

3 12

PR1201

PR1201 10K_040 2_5%

10K_040 2_5%

12

PR1203

PR1203 10K_040 2_5%

10K_040 2_5%

12

PR1206

PR1206 220K_04 02_5%

220K_04 02_5%

BATT_A

BATT_B

12

PR1208

PR1208 220K_04 02_5%

220K_04 02_5%

12

PR1209

PR1209 10K_040 2_5%

10K_040 2_5%

12

PR1210

PR1210 10K_040 2_5%

10K_040 2_5%

3

PD1204

PD1204 BAV99W T1G_SC70-3

BAV99W T1G_SC70-3

1

LATCHED _ALARM

+3VDS

12

PR1215

PR1215 100K_04 02_5%

100K_04 02_5%

LATCHED _ALARM

3

2

BATT_A

12

PR1204

PR1204 470K_04 02_5%

13

D

2

G

S

470K_04 02_5%

PQ1202

PQ1202 2N7002K W 1N SOT323 -3

2N7002K W 1N SOT323 -3

61

2

PQ1201A

34

5

PQ1201B

+3VDS

ME2N7002DKW-G 2N SOT363-6

FET_A<30>

BATT_B

12

PR1211

13

D

2

G

S

PR1211 470K_04 02_5%

470K_04 02_5%

PQ1208

PQ1208 2N7002K W 1N SOT323 -3

2N7002K W 1N SOT323 -3

34

5

PQ1207B

61

2

PQ1207A

+3VDS

ME2N7002DKW-G 2N SOT363-6

FET_B<30>

LATCHED_ALARM <30>

Security Class ification

2012/04/03

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2012/04/03

3

Compal Secret Data

Deciphered Date

2014/12/31

2

1

Compal Electronics, Inc.

Title

Battery selector

Size Docum ent Number Rev

15W

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

Date: Sheet of

Friday, September 28, 201 2

1

5351

0.2

5

Version Change List ( P. I. R. List ) for HW Circuit

Version Change List ( P. I. R. List ) for HW CircuitVersion Change List ( P. I. R. List ) for HW Circuit

Request

Item

Item Issue Description

Page#

ItemItem

Page#Page#

30

3030

1111

D D

31

3131

2222

26

2626

3333

36

3636

4444

5555

30

3030

30

6666

3030

25

2525

7777

Title

TitleTitle

KBC

KBCKBC

PWR OK

PWR OKPWR OK

MXM

MXMMXM

Switch/MUX

Switch/MUXSwitch/MUX

KBC

KBCKBC

KBC

KBCKBC

NGFF

NGFFNGFF

Date

DateDate

08/18

08/1808/18

08/18

08/1808/18

08/28

08/28 Compal

08/2808/28

09/07

09/0709/07

09/08

09/0809/08

09/08

09/0809/08

09/08

09/0809/08

RequestRequest

Owner

OwnerOwner

HP

HPHP

HP

HPHP

Compal

CompalCompal

HP

HP09/07

HPHP

HP

HPHP

HP

HP09/08

HPHP

HP

HPHP

4

Issue DescriptionDate

Issue DescriptionIssue Description

The quad-mode does not require any GPIO from KBC

The quad-mode does not require any GPIO from KBCThe quad-mode does not require any GPIO from KBC

Makes the power good circuit working.

Makes the power good circuit working.Makes the power good circuit working.

MXM Card can't be recognized in OS.

MXM Card can't be recognized in OS.MXM Card can't be recognized in OS.

Move D-Sub connector on M/B

Move D-Sub connector on M/B Add VGA filter circuit and connector

Move D-Sub connector on M/BMove D-Sub connector on M/B

SUSCLK is off during DS3 condition

SUSCLK is off during DS3 conditionSUSCLK is off during DS3 condition

Simplify the KBC solution for MEC1322

Simplify the KBC solution for MEC1322Simplify the KBC solution for MEC1322

3

Solution Description

Solution DescriptionSolution Description

Delete R1348 & R1349 and Add R541 and R542

Delete R1348 & R1349 and Add R541 and R542 Delete R1348 & R1349 and Add R541 and R542

Non-install R284

Non-install R284Non-install R284

Change U37 to MC74VHC1G08DFT2G (Non-OD type)

Change U37 to MC74VHC1G08DFT2G (Non-OD type)Change U37 to MC74VHC1G08DFT2G (Non-OD type)

Add VGA filter circuit and connector

Add VGA filter circuit and connectorAdd VGA filter circuit and connector

Add Y4, C423, C424 ; Delete R258, R264

Add Y4, C423, C424 ; Delete R258, R264Add Y4, C423, C424 ; Delete R258, R264

Delete R262,R266,R219,R216,R241,R242,R271,R253

Delete R262,R266,R219,R216,R241,R242,R271,R253Delete R262,R266,R219,R216,R241,R242,R271,R253

Add PU resistor for WWAN_FULL_PWR/WWAN_RSVD2

Add PU resistor for WWAN_FULL_PWR/WWAN_RSVD2Add PU resistor for WWAN_FULL_PWR/WWAN_RSVD2

2

1

Rev.

Rev.Page#

Rev.Rev.

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

C C

B B

A A

39

3939

8888

39

3939

9999

10

9999

1010

20

11

2020

1111

5555

12

1212

5555

13

1313

9999

14

1414

33

3333

15

1515

33

3333

16

1616

15

1515

17

1717

14

18

1818

19

1919

20

2020

21

2121

22

2222

1414

30

3030

19

18

1818

30

3030

36

36 0.2

3636

NFC

NFCNFC

NFC

NFCNFC

CPU

CPUCPU

PCH

PCHPCH

CPU

CPUCPU

CPU

CPUCPU

CPU

CPUCPU

DOCKING

DOCKINGDOCKING

DOCKING

DOCKINGDOCKING

PCH

PCHPCH

PCH

PCHPCH

KBC

KBCKBC

PCH

PCHPCH

KBC

KBCKBC

Switch/MUX

Switch/MUXSwitch/MUX

KBC detection of NFC module

HP

09/10

09/1009/10

09/10

09/10 HP

09/1009/10

09/11

09/11 HP

09/1109/11

09/11

09/11 HP

09/1109/11

09/11

09/11 HP

09/1109/11

09/11

09/11 HP

09/1109/11

09/11

09/11 HP

09/1109/11

09/11

09/11 HP

09/1109/11

09/11

09/11 HP

09/1109/11

09/11

09/1109/11

09/11

09/1109/11

09/11

09/1109/11

09/11

09/1109/11

09/12

09/12 Delete R249,R251,R256,R277

09/1209/12

09/12

09/1209/12

HP09/10

HPHP

HP

HPHP

HP

HPHP

HP

HPHP

HP

HPHP

HP

HPHP

HP

HPHP

HP

HPHP

HP

HPHP

HP

HPHP

HP

HP09/11

HPHP

HP

HPHP

HP

HPHP

HP

HPHP

HP

HP09/12

HPHP

KBC detection of NFC moduleKBC detection of NFC module

Power rail option for NFC module

Power rail option for NFC modulePower rail option for NFC module

Connect PCH's pin AD12 to +3V_PCH directly

Connect PCH's pin AD12 to +3V_PCH directlyConnect PCH's pin AD12 to +3V_PCH directly

Connect CPU.AT26 pin to CPU_PLTRST# directly

Connect CPU.AT26 pin to CPU_PLTRST# directly Connect CPU.AT26 pin to CPU_PLTRST# directly

Connect CPU.AL34 pin to H_CPUPWRGD directly

Connect CPU.AL34 pin to H_CPUPWRGD directlyConnect CPU.AL34 pin to H_CPUPWRGD directly

Connect SLP_S3# to QC5.5 direcly.

Connect SLP_S3# to QC5.5 direcly.Connect SLP_S3# to QC5.5 direcly.

Connect EN_P1V5 to JDOCK1.140 directly.

Connect EN_P1V5 to JDOCK1.140 directly.Connect EN_P1V5 to JDOCK1.140 directly.

Connect ON/OFFBTN_KBC# to Docking directly.

Connect ON/OFFBTN_KBC# to Docking directly.Connect ON/OFFBTN_KBC# to Docking directly.

Simplify PCH solution for PCIE CLK Group

Simplify PCH solution for PCIE CLK GroupSimplify PCH solution for PCIE CLK Group

Reassignement GPIO for "BT_OFF"

Reassignement GPIO for "BT_OFF"Reassignement GPIO for "BT_OFF"

Reserve for SUSACK# signal

Reserve for SUSACK# signal Uninstall R436 and add R1378

Reserve for SUSACK# signalReserve for SUSACK# signal

Reassigned BRD_ID4 to GPIO40 for CP support

Reassigned BRD_ID4 to GPIO40 for CP support Reassigned BRD_ID4 to GPIO40 for CP support

and update table for DB1-R

and update table for DB1-Rand update table for DB1-R

Simplify the KBC solution for MEC1322

Simplify the KBC solution for MEC1322Simplify the KBC solution for MEC1322

eDP trace length over Intel's specification

eDP trace length over Intel's specificationeDP trace length over Intel's specification

Add 200K (R1377) PD resistor to NFC_UART_RX

Add 200K (R1377) PD resistor to NFC_UART_RXAdd 200K (R1377) PD resistor to NFC_UART_RX

Add +3VM_LAN (R1376) for NFC module

Add +3VM_LAN (R1376) for NFC moduleAdd +3VM_LAN (R1376) for NFC module

Remove RC102 and RC103

Remove RC102 and RC103 Remove RC102 and RC103

Remove RH226

Remove RH226Remove RH226

Remove RC66

Remove RC66Remove RC66

Remove RC30

Remove RC30Remove RC30

Remove RC93

Remove RC93Remove RC93

Remove R351

Remove R351Remove R351

Remove R336

Remove R336Remove R336

Remove RH107,RH103,RH114,RH116,RH122

Remove RH107,RH103,RH114,RH116,RH122Remove RH107,RH103,RH114,RH116,RH122

RH124,RH126,RH127,RH129,RH130

RH124,RH126,RH127,RH129,RH130RH124,RH126,RH127,RH129,RH130 Change it from GPIO72 to GPIO61

Change it from GPIO72 to GPIO61Reassignement GPIO for "BT_OFF"

Change it from GPIO72 to GPIO61Change it from GPIO72 to GPIO61

Uninstall R436 and add R1378

Uninstall R436 and add R1378Uninstall R436 and add R1378

Connect RH180.1 to +3VS & RPH1.8 to GND

Connect RH180.1 to +3VS & RPH1.8 to GNDConnect RH180.1 to +3VS & RPH1.8 to GND

Delete R249,R251,R256,R277

Delete R249,R251,R256,R277Delete R249,R251,R256,R277

Change solution to PS8321

Change solution to PS8321Change solution to PS8321

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2012/04/03 2014/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW Changed-List History-1

LA-9371P

1

52 53Friday, September 28, 2012

0.2

5

Version Change List ( P. I. R. List ) for HW Circuit

Version Change List ( P. I. R. List ) for HW CircuitVersion Change List ( P. I. R. List ) for HW Circuit

Request

Item

Item Issue Description

Page#

ItemItem

Page#Page#

29

2929

23

2323

D D

24

2424

39

3939

25

2525

22

2222

26

2626

31

3131

27

2727

39

3939

28

2828

13

1313

29

2929

37

3737

C C

30

3030

26

2626

31

3131

14

1414

32

3232

31

3131

Title

TitleTitle

LAN

LANLAN

I/O CONN

I/O CONNI/O CONN

eDP

eDPeDP

POK CKT

POK CKTPOK CKT

I/O CONN

I/O CONNI/O CONN

PCH

PCHPCH

Smart Card

Smart CardSmart Card

CODEC

CODECCODEC

PCH

PCHPCH

PWR OK

PWR OKPWR OK

Date

DateDate

09/12

09/1209/12

09/12

09/1209/12

09/13

09/1309/13

09/13

09/1309/13

09/19

09/1909/19

09/19

09/1909/19

09/20

09/2009/20

09/20

09/2009/20

09/20

09/2009/20

09/23

09/2309/23

RequestRequest

Owner

OwnerOwner

HP

HPHP

HP

HPHP

Compal

CompalCompal

HP

HPHP

HP

HPHP

HP

HPHP

HP

HPHP

HP

HPHP

HP

HPHP

HP

HP09/23

HPHP

4

Issue DescriptionDate

Issue DescriptionIssue Description

Avoid IEEE failure with trace stub lines

Avoid IEEE failure with trace stub linesAvoid IEEE failure with trace stub lines

Move Hall sensor IC on Function board

Move Hall sensor IC on Function boardMove Hall sensor IC on Function board

Avoid LVDS Burn out Risk

Avoid LVDS Burn out RiskAvoid LVDS Burn out Risk

Modify Power OK circuit

Modify Power OK circuitModify Power OK circuit

Prevent Card Reader can't be recognized issue

Prevent Card Reader can't be recognized issuePrevent Card Reader can't be recognized issue

Disable the unlock of ME descriptor

Disable the unlock of ME descriptor Change QH11 to P-MOSFET

Disable the unlock of ME descriptor Disable the unlock of ME descriptor

RC delay is NOT good as reset

RC delay is NOT good as resetRC delay is NOT good as reset

KBC appears drives high during S3, so the change

KBC appears drives high during S3, so the changeKBC appears drives high during S3, so the change to aviod the leakage without losing functionality.

to aviod the leakage without losing functionality.

to aviod the leakage without losing functionality.to aviod the leakage without losing functionality.

Modify net name for easy read

Modify net name for easy readModify net name for easy read

3

Solution Description

Solution DescriptionSolution Description

Add Lan switch solution PI3L500-AZFEX (U43)

Add Lan switch solution PI3L500-AZFEX (U43)Add Lan switch solution PI3L500-AZFEX (U43)

Add +3VDS & LID_SW# pin to JFB1

Add +3VDS & LID_SW# pin to JFB1Add +3VDS & LID_SW# pin to JFB1

Rearrange pin assignment of JEDP1

Rearrange pin assignment of JEDP1Rearrange pin assignment of JEDP1

Delete UH7, RH235 ; Add R1379

Delete UH7, RH235 ; Add R1379Delete UH7, RH235 ; Add R1379

Add R1380 for PCH_PCIE_WAKE#

Add R1380 for PCH_PCIE_WAKE#Add R1380 for PCH_PCIE_WAKE#

Change QH11 to P-MOSFET

Change QH11 to P-MOSFETChange QH11 to P-MOSFET

Delete CC67,R393, then connect U30.23 to PLT_RST#.

Delete CC67,R393, then connect U30.23 to PLT_RST#.Delete CC67,R393, then connect U30.23 to PLT_RST#.

Uninstall RA13 and CA20

Uninstall RA13 and CA20Uninstall RA13 and CA20

Change RH74 from 10K to 100K Ohm

Change RH74 from 10K to 100K OhmChange RH74 from 10K to 100K Ohm

Modify VR_ON to PWR_GD and PWR_GOOD_3 to VGATE

Modify VR_ON to PWR_GD and PWR_GOOD_3 to VGATEModify VR_ON to PWR_GD and PWR_GOOD_3 to VGATE

2

1

Rev.

Rev.Page#

Rev.Rev.

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

Connect PM_PWROK to JXDP1.47 via 0 Ohm (RC107)

33

3333

5555

34

3434

30

3030

35

35 09/27

3535

35

3535

B B

36

3636

38

38 KB Backlight

3838

A A

XDP

XDPXDP

KBC

KBCKBC

MXM

MXMMXM

KB Backlight

KB BacklightKB Backlight

5

09/25

09/2509/25

09/25

09/2509/25

09/27 HP

09/2709/27

09/27

09/2709/27

HP

HP09/25

HPHP

HP

HP09/25

HPHP

HP

HPHP

HP

HPHP

Resolve ME LAN failures

Resolve ME LAN failuresResolve ME LAN failures

There is yellow bang in device manager

There is yellow bang in device managerThere is yellow bang in device manager

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

Connect PM_PWROK to JXDP1.47 via 0 Ohm (RC107)Connect PM_PWROK to JXDP1.47 via 0 Ohm (RC107)

Delete R537, Q73, D21

Delete R537, Q73, D21Delete R537, Q73, D21

Add pull high resistor (R1382,R1383 & R1384) to +3VS

Add pull high resistor (R1382,R1383 & R1384) to +3VSAdd pull high resistor (R1382,R1383 & R1384) to +3VS

Change R408 to 200K Ohm, and uninstall C295

Change R408 to 200K Ohm, and uninstall C295Change R408 to 200K Ohm, and uninstall C295

Compal Secret Data

2012/04/03 2014/12/31

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

HW Changed-List History-1

LA-9371P

1

53 53Friday, September 28, 2012

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

0.20.2

0.2

Compal LA-9371P Afterburn MXM, ZBook 17 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual