COMPAL LA-8611P Schematics

A

B

C

D

E

1 1

Compal Confidential

2 2

QAWGH Schematics Document

AMD APU Trinity FS1r2 + FCH Hudson-M3 + GPU Seymourr XT

2011-10-07

3 3

4 4

A

B

REV:0.1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

LA8611P

LA8611P

LA8611P

151Friday, November 04, 2011

151Friday, November 04, 2011

151Friday, November 04, 2011

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Compal confidential

File Name :

1 1

LVDS
translator

RTDS2132S

QAWGH

page 24

AMD Seymour XT

VRAM
64M16/128M16
DDR3 x 4

HDMI Conn.

page 26

B

page 17 ~ 23

Gen2PCIE x 16

DP Port0

DP Port2
DP Port1

C

AMD FS1r2 APU

Trinity
uPGA 722 pin
35mm x 35mm

page 5,~9

D

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 1866

ZZZ

ZZZ

LA8611P

DA_PCB

DA_PCB

DA80000S600

DA80000S600

QAWGH

LS7986P CardReader/B
LS7982P USB/B
LS7983P PWR/B
LS8612P LED/B
LS7985P ODD/B
LS8617P Cap Sensor/B

204pin DDRIII-SO-DIMM X2

BANK 0, 1, 2

page 10,11

E

4 * x1 PCI-E 2.0

LVDS Conn.

page 25

2 2

PCI Express

GPP1

USB(WiMAX)

Mini Card Slot 1

WLAN/WiMAX

3 3

page 32

GPP0

LAN

AR8161/8162

page 28~29

CRT Conn.

page 27

SPI ROM

page 13

Cap Sensor

Sub-board

FCH CRT (VGA DAC)

4 * x1 PCI-E 2.0

Touch Pad Int. KBD

page 35 page 35

x4 UMI Gen. 1

2.5GT/s per lane

Hudson M3

uFCBGA-656

24.5mm x 24.5mm

page 12~16

LPC Bus

EC

ENE KB930/ KB9012

page 34

AZALIA

4*USB3.0,10*USB2.0

6*SATA serial

SATA0

Audio Codec

CX20671-21Z

page 30

CMOS Camera
BlueTooth Conn
USB Port 3.0 x2(Left)
USB Port 2.0 x 1 (Right)

Card Reader
USB 2.0 x 1

RTS5178

Sub-board

SATA 3.0 HDD Conn.

page 25

page 31

page 31

2Channel Speaker

Internal MIC

Audio Jacks

page 37,38

Sub-board

2 in 1 Conn.

SD/SDXC/MMC

page 30

page 30

Sub-board

SATA1

SATA ODD Conn.

page 31

Thermal Sensor

EMC1403

4 4

A

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

page 32

Compal Secret Data

Compal Secret Data

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

C

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Block Diagrams

Block Diagrams

Block Diagrams

LA8611P

LA8611P

LA8611P

251Friday, November 04, 2011

251Friday, November 04, 2011

251Friday, November 04, 2011

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Voltage Rails

Power Plane

VIN
B+
+APU_CORE
+APU_CORE_NB

1 1

+1.5V ON
+0.75VS
+1.2VS ON
+2.5VS
+1.1VALW
+1.1VS
+1.5VS
+VGA_CORE
+1.5VGS
+1.8VGS
+1.0VGS ON
+3VALW
+3V_LAN ON ON
+3VS
+5VALW
+5VS

2 2

+VSB ON ON*
+RTCVCC
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

EC SM Bus1 address

Device

Smart Battery

Description

Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for APU
Voltage for On-die VGA of APU

1.5V power rail for APU VDDIO and DDR

1.2V (VDDR, VDDP) switched power rail for APU

2.5V for APU VDDA

1.1V switched power rail for FCH

1.5V switched power rail

0.95-1.2V switched power rail

1.5V switched power rail

1.8V switched power rail

3.3V always on power rail

3.3V power rail for LAN

3.3V switched power rail
5V always on power rail
5V switched power rail
VSB always on power rail
RTC power

EC SM Bus2 address

Address Address

0001-011xb

HEX

15H

Device

EMC1403(VGA, DDR,WLAN)
SB-TSI (default)
VGA Thermal
Cap Sensor
RTDS2132S-E

S1 S3 S5

N/A N/A N/A

ON
ON

ON
ON ON*ON
ON
ON
ON
ON

ON

ON
ON
ON
ON
ON

1001-101xb
1001-100xb
1000-001xb
1000-0000b
1010-1000b

N/AN/AN/A

OFF

OFF
OFF OFF
ON

OFF
OFFONOFF0.75V switched power rail for DDR terminator
OFF OFF
OFF

OFF

OFF OFF1.1V switched power rail for FCH
OFF

OFF

OFFOFF
OFF

OFF
OFFONOFF
OFF OFF1.0V switched power rail for VGA
ON ON*

ON*
OFF

OFF
ON

ON*
OFF

OFF

ONON

HEX

9AH

98H

82H

80H

A8H

FCH Hudson-M2/3
SATA Port List

SATA0
SATA1
SATA2
SATA3
SATA4
SATA5

NC
HDD
ODD
NC
NC
NC

BOM Structure

UMA@ : UMA only
PX@ : DIS muxluss

CMOS@ : USB camera
HDMI@ : HDMI function
nonHDMI@ : w/o HDMI function
BT@ : BT function

Comal
PCIE Port List

LAN
WLAN
NC
NC
NC
NC
NC
NC

APUFCH

PCIE0
PCIE1
PCIE2
PCIE3
PCIE0
PCIE1
PCIE2
PCIE3

ME@ : ME components

3 3

SM Bus Controller 0

Device Address

(FCH_SMB1 ~ FCH_SMB4, SMB_ALERT#)

HEX

X76@ : VRAM
45@ : 45 Level
PX4@ : PX4
PX5@ : PX5
8162@ : 10/100 LAN
GIGA@ : giga LAN
14@ : G 14"
15@ : G 15"
BBH@ : Best Buy high-end
nonBBH@ : non Best Buy high-end

SM Bus Controller 1

Device Address

DDR DIMM1 (FCH_SMB0)
DDR DIMM2 (FCH_SMB0)
WLAN (FCH_SMB0)

4 4

(FCH_SMB0)

1001-000xb
1001-001xb

HEX

90H

92H

AN@ : Apple & Nokia combo
A@ : Apple only

FCH Hudson-M2/3
USB Port List

USB1.1

Port0
Port1

USB2.0

Port0
Port1
Port2
Port3
Port4
Port5
Port6
Port7
Port8
Port9
Port10
Port11
Port12
Port13

NC
NC

Right USB1
Right USB2
Mini PCIE
USB Camera

BT

Card Reader

NC
NC
NC

NC
USB3.0 LP1
USB3.0 LP2

NC

NC

FCH Hudson-M2/3
USB OC PIN

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#NCNC

USB3.0 (LP1, LP2)
USB2.0 (RP1)
USB2.0 (RP2)

NC
NC
NC

A

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Notes List

Notes List

Notes List
LA8611P

LA8611P

LA8611P

351Friday, November 04, 2011

351Friday, November 04, 2011

351Friday, November 04, 2011

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Power-Up/Down Sequence

"Seymour" has the following requirements with regards to power-supply sequencing
to avoid damaging the ASIC:

‧

All the ASIC supplies, except for VDDR3, must fully reach their respective

nominal voltages within 20 ms of the start of the ramp-up sequence, though a

D D

shorter ramp-up duration is preferred. There is no timing requirement on the
ramp up of VDDR3 relative to other power rails.

‧

The external pull-up resistors on the DDC/AUX signals (if applicable) should

ramp up before or after both VDDC and VDD_CT have ramped up.

‧

VDDC and VDD_CT should not ramp up simultaneously. For example, VDDC
should reach 90% before VDD_CT starts to ramp up (or vice versa). For BACO
enabled designs, VDDC must ramp up before VDD_CT at system power up.

‧

For power down, reversing the ramp-up sequence is recommended

VDDR3(3.3VGS)

WithoutBACOoption:

PE_GPIO0(PXS_RST#):Low‐>ResetdGPU;High‐>Normaloperation
PE_GPIO1(PXS_PWREN):Low‐>dGPUPowerOFF;High‐>dGPUPowerON

BACOoption:

PE_GPIO0(PXS_RST#):High‐>Normaloperation(dGPUisnotresetonBACOmode)
PE_GPIO1(PXS_PWREN):Low‐>dGPUPowerOFF;High‐>dGPUPowerON(alwaysHigh)

dGPUPowerPins Maxcurrent

PCIE_PVDD,PCIE_VDDR,TSVDD,VDDR4,VDD_CT,
DPE_PVDD,DP[F:E]_VDD18,DP[D:A]_PVDD,
DP[D:A]_VDD18,AVDD,VDD1DI,A2VDDQ,VDD2DI,
DPLL_PVDD,MPV18,andSPV18

DP[F:E]_VDD10,DP[D:A]_VDD10,DPLL_VDDC,and
SPV10

PCIE_VDDC

VDDR3

BIF_VDDC(currentconsumption=55mA@1.0V,in
BACOmode)

VDDR1

VDDC/VDDCI

Voltage

1.8V

1.0V

1.0V

3.3V

Sameas
VDDC

1.5V

TBD

PX3.0

OFF

OFF

OFF

OFF

OFF

OFF

OFF

BACOMode

ON

ON

ON

ON

ON
Sameas
PCIE_VDDC

OFF

OFF

1679mA

775mA

1.1A

60mA

70mA

1.2A

28

PCIE_VDDC(1.0V)

PX4.0

C C

B B

VDDR1(1.5VGS)

VDDC/VDDCI(1.12V)

VDD_CT(1.8V)

PERSTb

REFCLK

Straps Reset

Straps Valid

Global ASIC Reset

T4+16clock

PX5.0

iGPU

iGPU

PE_GPIO0(PXS_RST#) PE_EN

PE_GPIO1(PXS_PWREN)

+3.3VALW

+1.5V

+5VLAW

PE_GPIO0(PXS_RST#)

PE_GPIO1(PXS_PWREN)

MOS

LDO

Regulator

dGPU

1

2

5

dGPU

BIF_VDDC

+3.3VGS

+1.0VGS

+1.8VGS

PX_mode

B+

BIF_VDDC

BACOSwitch

+B

Regulator

Regulator

+VGA_CORE

3

4

+1.5VGS

+VGA_CORE

PWRGOOD

+3.3VALW

MOS

+1.5V

LDO

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

+5VLAW

Deciphered Date

Deciphered Date

Deciphered Date

2

Regulator

+3.3VGS

1

+1.0VGS

2

+1.8VGS

5

Short PX_MODE and PX_PWREN

B+

Regulator

+B

Regulator

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

+1.5VGS

3

+VGA_CORE

4

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

dGPU Notes List

dGPU Notes List

dGPU Notes List

LA8611P

LA8611P

LA8611P

1

451Friday, November 04, 2011

451Friday, November 04, 2011

451Friday, November 04, 2011

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PCIE_CRX_GTX_P[0..15]<17>

JCPU1A

JCPU1A

PCI EXPRESS

1 1

LAN

WLAN

2 2

PCIE_CRX_DTX_P0<28>
PCIE_CRX_DTX_N0<28>
PCIE_CRX_DTX_P1<32>
PCIE_CRX_DTX_N1<32>

UMI_RXP0<12>
UMI_RXN0<12>
UMI_RXP1<12>
UMI_RXN1<12>
UMI_RXP2<12>
UMI_RXN2<12>
UMI_RXP3<12>
UMI_RXN3<12>

+1.2VS

PCIE_CRX_GTX_P0
PCIE_CRX_GTX_N0
PCIE_CRX_GTX_P1
PCIE_CRX_GTX_N1
PCIE_CRX_GTX_P2
PCIE_CRX_GTX_N2
PCIE_CRX_GTX_P3
PCIE_CRX_GTX_N3
PCIE_CRX_GTX_P4
PCIE_CRX_GTX_N4
PCIE_CRX_GTX_P5
PCIE_CRX_GTX_N5
PCIE_CRX_GTX_P6
PCIE_CRX_GTX_N6
PCIE_CRX_GTX_P7
PCIE_CRX_GTX_N7
PCIE_CRX_GTX_P8
PCIE_CRX_GTX_N8
PCIE_CRX_GTX_P9
PCIE_CRX_GTX_N9
PCIE_CRX_GTX_P10
PCIE_CRX_GTX_N10
PCIE_CRX_GTX_P11
PCIE_CRX_GTX_N11
PCIE_CRX_GTX_P12
PCIE_CRX_GTX_N12
PCIE_CRX_GTX_P13
PCIE_CRX_GTX_N13
PCIE_CRX_GTX_P14
PCIE_CRX_GTX_N14
PCIE_CRX_GTX_P15
PCIE_CRX_GTX_N15

P_ZVDDP

1 2

R1 196_0402_1%R1 196_0402_1%

AG11

AB8
AB7
AA9
AA8
AA5
AA6

AE5
AE6
AD8
AD7
AC9
AC8
AC5
AC6

AG8
AG9
AG6
AG5
AF7
AF8
AE8
AE9

Y8

Y7
W9
W8
W5
W6

V8

V7

U9

U8

U5

U6

T8

T7

R9

R8

R5

R6

P8

P7

N9

N8

N5

N6
M8
M7

P_GFX_RXP0
P_GFX_RXN0
P_GFX_RXP1
P_GFX_RXN1
P_GFX_RXP2
P_GFX_RXN2
P_GFX_RXP3
P_GFX_RXN3
P_GFX_RXP4
P_GFX_RXN4
P_GFX_RXP5
P_GFX_RXN5
P_GFX_RXP6
P_GFX_RXN6
P_GFX_RXP7
P_GFX_RXN7
P_GFX_RXP8
P_GFX_RXN8
P_GFX_RXP9
P_GFX_RXN9
P_GFX_RXP10
P_GFX_RXN10
P_GFX_RXP11
P_GFX_RXN11
P_GFX_RXP12
P_GFX_RXN12
P_GFX_RXP13
P_GFX_RXN13
P_GFX_RXP14
P_GFX_RXN14
P_GFX_RXP15
P_GFX_RXN15

P_GPP_RXP0
P_GPP_RXN0
P_GPP_RXP1
P_GPP_RXN1
P_GPP_RXP2
P_GPP_RXN2
P_GPP_RXP3
P_GPP_RXN3

P_UMI_RXP0
P_UMI_RXN0
P_UMI_RXP1
P_UMI_RXN1
P_UMI_RXP2
P_UMI_RXN2
P_UMI_RXP3
P_UMI_RXN3

P_ZVDDP

PCI EXPRESS

LOTES_ACA-ZIF-109-P12-A_FS1R2ME@

LOTES_ACA-ZIF-109-P12-A_FS1R2ME@

GPP GRAPHICS

GPP GRAPHICS

UMI

UMI

B

P_GFX_TXP0
P_GFX_TXN0
P_GFX_TXP1
P_GFX_TXN1
P_GFX_TXP2
P_GFX_TXN2
P_GFX_TXP3
P_GFX_TXN3
P_GFX_TXP4
P_GFX_TXN4
P_GFX_TXP5
P_GFX_TXN5
P_GFX_TXP6
P_GFX_TXN6
P_GFX_TXP7
P_GFX_TXN7
P_GFX_TXP8
P_GFX_TXN8
P_GFX_TXP9

P_GFX_TXN9
P_GFX_TXP10
P_GFX_TXN10
P_GFX_TXP11
P_GFX_TXN11
P_GFX_TXP12
P_GFX_TXN12
P_GFX_TXP13
P_GFX_TXN13
P_GFX_TXP14
P_GFX_TXN14
P_GFX_TXP15
P_GFX_TXN15

P_GPP_TXP0

P_GPP_TXN0

P_GPP_TXP1

P_GPP_TXN1

P_GPP_TXP2

P_GPP_TXN2

P_GPP_TXP3

P_GPP_TXN3

P_UMI_TXP0
P_UMI_TXN0
P_UMI_TXP1
P_UMI_TXN1
P_UMI_TXP2
P_UMI_TXN2
P_UMI_TXP3
P_UMI_TXN3

P_ZVSS

PCIE_CTX_C_GRX_P0

AB2

PCIE_CTX_C_GRX_N0

AB1

PCIE_CTX_C_GRX_P1

AA3

PCIE_CTX_C_GRX_N1

AA2

PCIE_CTX_C_GRX_P2

Y5

PCIE_CTX_C_GRX_N2

Y4

PCIE_CTX_C_GRX_P3

Y2

PCIE_CTX_C_GRX_N3

Y1

PCIE_CTX_C_GRX_P4

W3

PCIE_CTX_C_GRX_N4

W2

PCIE_CTX_C_GRX_P5

V5

PCIE_CTX_C_GRX_N5

V4

PCIE_CTX_C_GRX_P6

V2

PCIE_CTX_C_GRX_N6

V1

PCIE_CTX_C_GRX_P7

U3

PCIE_CTX_C_GRX_N7

U2

PCIE_CTX_C_GRX_P8

T5

PCIE_CTX_C_GRX_N8

T4

PCIE_CTX_C_GRX_P9

T2

PCIE_CTX_C_GRX_N9

T1

PCIE_CTX_C_GRX_P10

R3

PCIE_CTX_C_GRX_N10

R2

PCIE_CTX_C_GRX_P11

P5

PCIE_CTX_C_GRX_N11

P4

PCIE_CTX_C_GRX_P12

P2

PCIE_CTX_C_GRX_N12

P1

PCIE_CTX_C_GRX_P13

N3

PCIE_CTX_C_GRX_N13

N2

PCIE_CTX_C_GRX_P14

M5

PCIE_CTX_C_GRX_N14

M4

PCIE_CTX_C_GRX_P15

M2

PCIE_CTX_C_GRX_N15

M1

PCIE_CTX_C_DRX_P0

AD5

PCIE_CTX_C_DRX_N0

AD4

PCIE_CTX_C_DRX_P1

AD2

PCIE_CTX_C_DRX_N1

AD1
AC3
AC2
AB5
AB4

UMI_TXP0_C

AG2

UMI_TXN0_C

AG3

UMI_TXP1_C

AF4

UMI_TXN1_C

AF5

UMI_TXP2_C

AF1

UMI_TXN2_C

AF2

UMI_TXP3_C

AE2

UMI_TXN3_C

AE3

P_ZVSS

AH11

C1 0.1U_0402_16V7KPX@C1 0.1U_0402_16V7KPX@
C2 0.1U_0402_16V7KPX@C2 0.1U_0402_16V7KPX@
C3 0.1U_0402_16V7KPX@C3 0.1U_0402_16V7KPX@
C4 0.1U_0402_16V7KPX@C4 0.1U_0402_16V7KPX@
C5 0.1U_0402_16V7KPX@C5 0.1U_0402_16V7KPX@
C6 0.1U_0402_16V7KPX@C6 0.1U_0402_16V7KPX@
C7 0.1U_0402_16V7KPX@C7 0.1U_0402_16V7KPX@
C8 0.1U_0402_16V7KPX@C8 0.1U_0402_16V7KPX@
C9 0.1U_0402_16V7KPX@C9 0.1U_0402_16V7KPX@
C10 0.1U_0402_16V7KPX@C10 0.1U_0402_16V7KPX@
C11 0.1U_0402_16V7KPX@C11 0.1U_0402_16V7KPX@
C12 0.1U_0402_16V7KPX@C12 0.1U_0402_16V7KPX@
C13 0.1U_0402_16V7KPX@C13 0.1U_0402_16V7KPX@
C14 0.1U_0402_16V7KPX@C14 0.1U_0402_16V7KPX@
C15 0.1U_0402_16V7KPX@C15 0.1U_0402_16V7KPX@
C16 0.1U_0402_16V7KPX@C16 0.1U_0402_16V7KPX@
C17 0.1U_0402_16V7KPX@C17 0.1U_0402_16V7KPX@
C18 0.1U_0402_16V7KPX@C18 0.1U_0402_16V7KPX@
C19 0.1U_0402_16V7KPX@C19 0.1U_0402_16V7KPX@
C20 0.1U_0402_16V7KPX@C20 0.1U_0402_16V7KPX@
C21 0.1U_0402_16V7KPX@C21 0.1U_0402_16V7KPX@
C22 0.1U_0402_16V7KPX@C22 0.1U_0402_16V7KPX@
C23 0.1U_0402_16V7KPX@C23 0.1U_0402_16V7KPX@
C24 0.1U_0402_16V7KPX@C24 0.1U_0402_16V7KPX@
C25 0.1U_0402_16V7KPX@C25 0.1U_0402_16V7KPX@
C26 0.1U_0402_16V7KPX@C26 0.1U_0402_16V7KPX@
C27 0.1U_0402_16V7KPX@C27 0.1U_0402_16V7KPX@
C28 0.1U_0402_16V7KPX@C28 0.1U_0402_16V7KPX@
C29 0.1U_0402_16V7KPX@C29 0.1U_0402_16V7KPX@
C30 0.1U_0402_16V7KPX@C30 0.1U_0402_16V7KPX@
C31 0.1U_0402_16V7KPX@C31 0.1U_0402_16V7KPX@
C32 0.1U_0402_16V7KPX@C32 0.1U_0402_16V7KPX@

1 2

R2 196_0402_1%R2 196_0402_1%

C

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

C33 0.1U_0402_16V7KC33 0.1U_0402_16V7K

1 2

C34 0.1U_0402_16V7KC34 0.1U_0402_16V7K

1 2

C35 0.1U_0402_16V7KC35 0.1U_0402_16V7K

1 2

C36 0.1U_0402_16V7KC36 0.1U_0402_16V7K

1 2

C37 0.1U_0402_16V7KC37 0.1U_0402_16V7K

1 2

C38 0.1U_0402_16V7KC38 0.1U_0402_16V7K

1 2

C39 0.1U_0402_16V7KC39 0.1U_0402_16V7K

1 2

C40 0.1U_0402_16V7KC40 0.1U_0402_16V7K

1 2

C41 0.1U_0402_16V7KC41 0.1U_0402_16V7K

1 2

C42 0.1U_0402_16V7KC42 0.1U_0402_16V7K

1 2

C43 0.1U_0402_16V7KC43 0.1U_0402_16V7K

1 2

C44 0.1U_0402_16V7KC44 0.1U_0402_16V7K

1 2

PCIE_CTX_GRX_P0
PCIE_CTX_GRX_N0
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_P15
PCIE_CTX_GRX_N15

PCIE_CTX_GRX_P[0..15] <17>
PCIE_CTX_GRX_N[0..15] <17>PCIE_CRX_GTX_N[0..15]<17>

PCIE_CTX_DRX_P0 <28>
PCIE_CTX_DRX_N0 <28>
PCIE_CTX_DRX_P1 <32>
PCIE_CTX_DRX_N1 <32>

UMI_TXP0 <12>
UMI_TXN0 <12>
UMI_TXP1 <12>
UMI_TXN1 <12>
UMI_TXP2 <12>
UMI_TXN2 <12>
UMI_TXP3 <12>
UMI_TXN3 <12>

D

E

3 3

Power Sequence of APU

+1.5V

+2.5VS

+1.5VS

+APU_CORE

4 4

+APU_CORE_NB

+1.2VS

A

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

FS1r2 PCIE/UMI

FS1r2 PCIE/UMI

FS1r2 PCIE/UMI

LA8611P

LA8611P

LA8611P

E

551Friday, November 04, 2011

551Friday, November 04, 2011

551Friday, November 04, 2011

Group A

Group B

of

of

of

0.1

0.1

0.1

A

B

C

D

E

1 1

JCPU1B

JCPU1B

MEMORY CHANNEL A

DDRA_SMA[15..0]<10>

DDRA_SBS0#<10>
DDRA_SBS1#<10>
DDRA_SBS2#<10>
DDRA_SDM[7..0]<10>

2 2

DDRA_SDQS0<10>
DDRA_SDQS0#<10>
DDRA_SDQS1<10>
DDRA_SDQS1#<10>
DDRA_SDQS2<10>
DDRA_SDQS2#<10>
DDRA_SDQS3<10>
DDRA_SDQS3#<10>
DDRA_SDQS4<10>
DDRA_SDQS4#<10>
DDRA_SDQS5<10>
DDRA_SDQS5#<10>
DDRA_SDQS6<10>
DDRA_SDQS6#<10>
DDRA_SDQS7<10>
DDRA_SDQS7#<10>

DDRA_CLK0<10>
DDRA_CLK0#<10>
DDRA_CLK1<10>
DDRA_CLK1#<10>

DDRA_CKE0<10>
DDRA_CKE1<10>

DDRA_ODT0<10>
DDRA_ODT1<10>

3 3

DDRA_SCS0#<10>
DDRA_SCS1#<10>

DDRA_SRAS#<10>
DDRA_SCAS#<10>
DDRA_SWE#<10>

MEM_MA_RST#<10>
MEM_MA_EVENT#<10>

+MEM_VREF

+1.5V

Place them close to APU within 1"

15mil

DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
DDRA_SMA14
DDRA_SMA15

DDRA_SBS0#
DDRA_SBS1#
DDRA_SBS2#

DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7

DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#

DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#

DDRA_CKE0
DDRA_CKE1

DDRA_ODT0
DDRA_ODT1

DDRA_SCS0#
DDRA_SCS1#

DDRA_SRAS#
DDRA_SCAS#
DDRA_SWE#

MEM_MA_RST#

MEM_MA_EVENT#

M_ZVDDIO

1 2

R3 39.2_0402_1%R3 39.2_0402_1%

M21
M22

AA25

AD27
AC23
AD19
AC15

AE26
AD26
AB22
AA22
AB18
AA18
AA14
AA15

AA27

AA26

W24
W23

W20
W21

U20
R20
R21
P22
P21
N24
N23
N20
N21

U23
L24
L21

L20
U24

U21
L23

E14

J17
E21
F25

G14
H14
G18
H18

J21
H21
E27
E26

T21
T22
R23
R24

H28
H27

Y25

V22

V21

H25
T24

MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15

MA_BANK0
MA_BANK1
MA_BANK2

MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7

MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7

MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1

MA_CKE0
MA_CKE1

MA_ODT0
MA_ODT1

MA_CS_L0
MA_CS_L1

MA_RAS_L
MA_CAS_L
MA_WE_L

MA_RESET_L
MA_EVENT_L

M_VREF
M_ZVDDIO

MEMORY CHANNEL A

LOTES_ACA-ZIF-109-P12-A_FS1R2ME@

LOTES_ACA-ZIF-109-P12-A_FS1R2ME@

MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7

MA_DATA8

MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15

MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23

MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31

MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39

MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47

MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55

MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63

E13
J13
H15
J15
H13
F13
F15
E15

H17
F17
E19
J19
G16
H16
H19
F19

H20
F21
J23
H23
G20
E20
G22
H22

G24
E25
G27
G26
F23
H24
E28
F27

AB28
AC27
AD25
AA24
AE28
AD28
AB26
AC25

Y23
AA23
Y21
AA20
AB24
AD24
AA21
AC21

AA19
AC19
AC17
AA17
AB20
Y19
AD18
AD17

AA16
Y15
AA13
AC13
Y17
AB16
AB14
Y13

DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7

DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15

DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23

DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31

DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39

DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47

DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55

DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63

DDRA_SDQ[63..0] <10>

DDRB_SMA[15..0]<11>

DDRB_SBS0#<11>
DDRB_SBS1#<11>
DDRB_SBS2#<11>
DDRB_SDM[7..0]<11>

DDRB_SDQS0<11>
DDRB_SDQS0#<11>
DDRB_SDQS1<11>
DDRB_SDQS1#<11>
DDRB_SDQS2<11>
DDRB_SDQS2#<11>
DDRB_SDQS3<11>
DDRB_SDQS3#<11>
DDRB_SDQS4<11>
DDRB_SDQS4#<11>
DDRB_SDQS5<11>
DDRB_SDQS5#<11>
DDRB_SDQS6<11>
DDRB_SDQS6#<11>
DDRB_SDQS7<11>
DDRB_SDQS7#<11>

DDRB_CLK0<11>
DDRB_CLK0#<11>
DDRB_CLK1<11>
DDRB_CLK1#<11>

DDRB_CKE0<11>
DDRB_CKE1<11>

DDRB_ODT0<11>
DDRB_ODT1<11>

DDRB_SCS0#<11>
DDRB_SCS1#<11>

DDRB_SRAS#<11>
DDRB_SCAS#<11>
DDRB_SWE#<11>

MEM_MB_RST#<11>
MEM_MB_EVENT#<11>

DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
DDRB_SMA14
DDRB_SMA15

DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#

DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7

DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#

DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#

DDRB_CKE0
DDRB_CKE1

DDRB_ODT0
DDRB_ODT1

DDRB_SCS0#
DDRB_SCS1#

DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#

MEM_MB_RST#
MEM_MB_EVENT#

M28
M27
M24
M25

W26

AF25
AG22
AH18
AD14

AG24
AG25
AG21
AF21
AG17
AG18
AH14
AG14

W27

T27
P24
P25
N27
N26

L26
U26
L27
K27

K25
K24

U27
T28
K28

D14
A18
A22
C25

C15
B15
E18
D18
E22
D22
B26
A26

R26
R27
P27
P28

J26
J27

Y28
V25

Y27
V24

V27
V28

J25
T25

JCPU1C

JCPU1C

MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15

MB_BANK0
MB_BANK1
MB_BANK2

MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7

MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7

MB_CLK_H0
MB_CLK_L0
MB_CLK_H1
MB_CLK_L1

MB_CKE0
MB_CKE1

MB_ODT0
MB_ODT1

MB_CS_L0
MB_CS_L1

MB_RAS_L
MB_CAS_L
MB_WE_L

MB_RESET_L
MB_EVENT_L

MEMORY CHANNEL B

MEMORY CHANNEL B

LOTES_ACA-ZIF-109-P12-A_FS1R2ME@

LOTES_ACA-ZIF-109-P12-A_FS1R2ME@

MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7

MB_DATA8

MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15

MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23

MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31

MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39

MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47

MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55

MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63

A14
B14
D16
E16
B13
C13
B16
A16

C17
B18
B20
A20
E17
B17
B19
C19

C21
B22
C23
A24
D20
B21
E23
B23

E24
B25
B27
D28
B24
D24
D26
C27

AG26
AH26
AF23
AG23
AG27
AF27
AH24
AE24

AE22
AH22
AE20
AH20
AD23
AD22
AD21
AD20

AF19
AE18
AE16
AH16
AG20
AG19
AF17
AD16

AG15
AD15
AG13
AD13
AG16
AF15
AE14
AF13

DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7

DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15

DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23

DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31

DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39

DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47

DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55

DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63

DDRB_SDQ[63..0] <11>

EVENT# pull high 0.75V reference voltage

+1.5V

4 4

R5 1K_0402_5%R5 1K_0402_5%

1 2

R6 1K_0402_5%R6 1K_0402_5%

1 2

MEM_MA_EVENT#
MEM_MB_EVENT# +MEM_VREF

A

R4

R4

1K_0402_1%

1K_0402_1%

R7

R7

1K_0402_1%

1K_0402_1%

+1.5V

1 2

1 2

B

1

C45

C45
1000P_0402_50V7K

1000P_0402_50V7K

2

15mil

2

C46

C46

0.1U_0402_16V7K

0.1U_0402_16V7K

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

FS1r2 DDRIII Memory I/F

FS1r2 DDRIII Memory I/F

FS1r2 DDRIII Memory I/F

LA8611P

LA8611P

LA8611P

651Friday, November 04, 2011

651Friday, November 04, 2011

651Friday, November 04, 2011

E

of

of

of

0.1

0.1

0.1

A

Place near APU

C56 0.1U_0402_16V7KC56 0.1U_0402_16V7K

DP0_TXP0_C<24>
DP0_TXN0_C<24>

1 2

C48 0.1U_0402_16V7KC48 0.1U_0402_16V7K

1 2

Place near APU

C63 0.1U_0402_16V7KC63 0.1U_0402_16V7K

1 1

ML_VGA_TXP0<13>
ML_VGA_TXN0<13>

ML_VGA_TXP1<13>
ML_VGA_TXN1<13>

ML_VGA_TXP2<13>
ML_VGA_TXN2<13>

ML_VGA_TXP3<13>
ML_VGA_TXN3<13>

HDMI_TX2P<26>
HDMI_TX2N<26>

HDMI_TX1P<26>
HDMI_TX1N<26>

HDMI_TX0P<26>
HDMI_TX0N<26>

HDMI_CLKP<26>
HDMI_CLKN<26>

C58 0.1U_0402_16V7KHDMI@C58 0.1U_0402_16V7KHDMI@
C53 0.1U_0402_16V7KHDMI@C53 0.1U_0402_16V7KHDMI@

C59 0.1U_0402_16V7KHDMI@C59 0.1U_0402_16V7KHDMI@
C54 0.1U_0402_16V7KHDMI@C54 0.1U_0402_16V7KHDMI@

C55 0.1U_0402_16V7KHDMI@C55 0.1U_0402_16V7KHDMI@
C60 0.1U_0402_16V7KHDMI@C60 0.1U_0402_16V7KHDMI@

C61 0.1U_0402_16V7KHDMI@C61 0.1U_0402_16V7KHDMI@
C62 0.1U_0402_16V7KHDMI@C62 0.1U_0402_16V7KHDMI@

Place near Connector

2 2

Route as differential
with VSS_SENSE

3 3

APU_VDDNB_SEN_H<47>

1 2

C64 0.1U_0402_16V7KC64 0.1U_0402_16V7K

1 2

C65 0.1U_0402_16V7KC65 0.1U_0402_16V7K

1 2

C66 0.1U_0402_16V7KC66 0.1U_0402_16V7K

1 2

C67 0.1U_0402_16V7KC67 0.1U_0402_16V7K

1 2

C68 0.1U_0402_16V7KC68 0.1U_0402_16V7K

1 2

C69 0.1U_0402_16V7KC69 0.1U_0402_16V7K

1 2

C70 0.1U_0402_16V7KC70 0.1U_0402_16V7K

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

APU_CLK<12>
APU_CLK#<12>

APU_DISP_CLK<12>
APU_DISP_CLK#<12>

APU_SVC<47>
APU_SVD<47>

APU_SVT<47>

APU_RST#<12>

APU_PWRGD<12,47>

APU_PROCHOT#<12>

APU_VDD_SEN_L<47>

APU_VDD_SEN_H<47>

APU_SIC
APU_SID

APU_THERMTRIP#
ALERT_L

APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#

DP0_TXP0
DP0_TXN0

DP1_TXP0
DP1_TXN0

DP1_TXP1
DP1_TXN1

DP1_TXP2
DP1_TXN2

DP1_TXP3
DP1_TXN3

DP2_TXP0
DP2_TXN0

DP2_TXP1
DP2_TXN1

DP2_TXP2
DP2_TXN2

DP2_TXP3
DP2_TXN3

AE11
AD11

AB11
AA11

AG12
AH12

AF10
AB12

AC10
AE12
AF12

H10
F10

G10

B

L3
L2

K5
K4

K2
K1

J3
J2

H5
H4

H2
H1

G3
G2

F2
F1

L9
L8

L5
L6

K8
K7

J6
J5

B3
A3

C3

J10

F9
G9
H9

B4
C5
A4
A5
C4
B5

ANALOG/DISPLAY/MISC

ANALOG/DISPLAY/MISC

DP0_TXP0
DP0_TXN0

DP0_TXP1
DP0_TXN1

DP0_TXP2
DP0_TXN2

DP0_TXP3
DP0_TXN3

DP1_TXP0
DP1_TXN0

DP1_TXP1
DP1_TXN1

DP1_TXP2
DP1_TXN2

DP1_TXP3
DP1_TXN3

DP2_TXP0
DP2_TXN0

DP2_TXP1
DP2_TXN1

DP2_TXP2
DP2_TXN2

DP2_TXP3
DP2_TXN3

CLKIN_H
CLKIN_L

DISP_CLKIN_H
DISP_CLKIN_L

SVC
SVD

SVT
SIC

SID
RESET_L

PWROK
PROCHOT_L

THERMTRIP_L
ALERT_L

TDI
TDO
TCK
TMS
TRST_L
DBRDY
DBREQ_L

VSS_SENSE
VDDP_SENSE
VDDNB_SENSE
VDDIO_SENSE
VDD_SENSE
VDDR_SENSE

LVDS

To FCH

HDMI

LOTES_ACA-ZIF-109-P12-A_FS1R2ME@

LOTES_ACA-ZIF-109-P12-A_FS1R2ME@

JCPU1D

JCPU1D

DISPLAY PORT 0

DISPLAY PORT 0

DISPLAY PORT 2 DISPLAY PORT 1

DISPLAY PORT 2 DISPLAY PORT 1

CTRL SER. CLK

CTRL SER. CLK

JTAG

JTAG

SENSE

SENSE

DISPLAY PORT MISC.

DISPLAY PORT MISC.

DP_VARY_BL

DP_AUX_ZVSS

TEST

TEST

DMAACTIVE_L

RSVD

RSVD

DP0_AUXP
DP0_AUXN

DP1_AUXP
DP1_AUXN

DP2_AUXP
DP2_AUXN

DP3_AUXP
DP3_AUXN

DP4_AUXP
DP4_AUXN

DP5_AUXP
DP5_AUXN

DP0_HPD
DP1_HPD
DP2_HPD
DP3_HPD
DP4_HPD
DP5_HPD

DP_BLON

DP_DIGON

TEST6

TEST9
TEST10
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19
TEST20
TEST24

TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST30_H
TEST30_L

TEST31

TEST32_H
TEST32_L

TEST35

FS1R2

TEST4

TEST5

RSVD1
RSVD2
RSVD3
RSVD4

DP0_AUXP

D1

DP0_AUXN

D2

ML_VGA_AUXP

E1

ML_VGA_AUXN

E2
D5

D6
E5

E6
F5

F6
G5

G6
D3

E3
D7
E7
F7
G7

C6
B6
A6

DP_AUX_ZVSS

C1
AD12

M18
N18
F11
G11
H11
J11

APU_TEST18

F12

APU_TEST19

G12

APU_TEST20

J12

APU_TEST24

H12

TEST25_H

AE10

TEST25_L

AD10
L10
M10
P19
R19

APU_TEST31

K22
T19
N19

APU_TEST35

AA12

FS1R2

W10
AC12

P18
R18

Y10
AA10
Y12
K21

C

C47 0.1U_0402_16V7KC47 0.1U_0402_16V7K

1 2

C49 0.1U_0402_16V7KC49 0.1U_0402_16V7K

1 2

C57 0.1U_0402_16V7KC57 0.1U_0402_16V7K

1 2

C52 0.1U_0402_16V7KC52 0.1U_0402_16V7K

1 2

LVDS_HPD <24>
FCH_CRT_HPD <13>
HDMI_DET <26>

DP_INT_PWM <9>

R16 150_0402_1%R16 150_0402_1%

1 2

T5T5
T6T6
T66T66
T67T67
T3T3
T4T4

R18 1K_0402_5%R18 1K_0402_5%

1 2

R19 1K_0402_5%R19 1K_0402_5%

1 2

R21 1K_0402_5%R21 1K_0402_5%

1 2

R22 1K_0402_5%R22 1K_0402_5%

1 2

R23 510_0402_1%R23 510_0402_1%

1 2

R24 510_0402_1%R24 510_0402_1%

1 2

T7T7
T8T8

R27 39.2_0402_1%R27 39.2_0402_1%

1 2

R28 300_0402_5%HDMI@R28 300_0402_5%HDMI@

1 2

R29 300_0402_5%nonHDMI@R29 300_0402_5%nonHDMI@

1 2

R30 10K_0402_5%R30 10K_0402_5%

1 2

ALLOW_STOP <12>

T11T11
T12T12

DP0_AUXP_C <24>
DP0_AUXN_C <24>

ML_VGA_AUXP_C <13>
ML_VGA_AUXN_C <13>

HDMI_CLK <26>
HDMI_DATA <26>

+1.2VS

+1.5V
+3VALW

D

To LVDS
Translater

To FCH

To HDMI

APU_PROCHOT#

THERMTRIP shutdown
temperature: 115 degree

1K_0402_5%

1K_0402_5%

APU_THERMTRIP#

R13

R13

1K_0402_5%

1K_0402_5%

+1.5V

R20

R20

1 2

E

E

3 1

MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

1 2

Q1

Q1

MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

R868 0_0402_5%

R868 0_0402_5%

12

R17

R17
10K_0402_5%

10K_0402_5%

B

B

2

Q2

Q2

C

C

DP0_AUXP
DP0_AUXN
ML_VGA_AUXP
ML_VGA_AUXN

+3VS+1.5V

12

R14

R14
10K_0402_5%

10K_0402_5%

2

B

B

E

E

31

C

C

@

@

1 2

Indicates to the FCH that a thermal trip
has occurred. Its assertion will cause the FCH to
transition the system to S5 immediately

1 2

R55 0_0402_5%R55 0_0402_5%

1 2

R56 0_0402_5%

R56 0_0402_5%

@

@

R57 1.8K_0402_5%R57 1.8K_0402_5%
R25 1.8K_0402_5%R25 1.8K_0402_5%
R10 1.8K_0402_5%R10 1.8K_0402_5%
R11 1.8K_0402_5%R11 1.8K_0402_5%

12

R12

R12
10K_0402_5%

10K_0402_5%

E

12
12
12
12

Asserted as an input to force the
processor into the HTC-active state

H_PROCHOT# <33,40,47>

H_THERMTRIP# <14>

MAINPWON <33,40,42>

ESD request

@

APU_PWRGD

+1.5V

R42 1K_0402_5%R42 1K_0402_5%

1 2

R44 1K_0402_5%R44 1K_0402_5%

1 2

R46 1K_0402_5%R46 1K_0402_5%

1 2

R48 1K_0402_5%R48 1K_0402_5%

1 2

+1.5VS

R52 300_0402_5%R52 300_0402_5%

1 2

R54 300_0402_5%R54 300_0402_5%

4 4

1 2

R36 1K_0402_5%@R36 1K_0402_5%@

1 2

R39 1K_0402_5%@R39 1K_0402_5%@

1 2

R41 1K_0402_5%@R41 1K_0402_5%@

1 2

@

C1033 100P_0402_50V8J

C1033 100P_0402_50V8J

1 2

APU_SIC
APU_SID
ALERT_L
ALLOW_STOP

APU_RST#
APU_PWRGD
APU_SVT
APU_SVC
APU_SVD

A

CPU TSI interface level shift

@

@

C71 0.1U_0402_16V4Z

C71 0.1U_0402_16V4Z

1 2

R31

+3VS

1 2

31.6K_0402_1%

31.6K_0402_1%

APU_SID

APU_SIC

R31

B

R32

R32

1 2

30K_0402_1%

30K_0402_1%

G

G

2

Q3

Q3

13

D

S

D

S

BSH111 1N_SOT23-3

BSH111 1N_SOT23-3

G

G

2

Q4

Q4

13

D

S

D

S

BSH111 1N_SOT23-3

BSH111 1N_SOT23-3

BSH111, the Vgs is:
min = 0.4V
Max = 1.3V

R37

R37
1K_0402_5%

1K_0402_5%

1 2

EC_SMB_DA2_SUS <33>

EC_SMB_CK2_SUS <33>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

To EC

To EC

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

C

APU_TRST#

Compal Secret Data

Compal Secret Data

Compal Secret Data

R45 10K_0402_5%R45 10K_0402_5%
R47 10K_0402_5%R47 10K_0402_5%
R49 10K_0402_5%R49 10K_0402_5%

Deciphered Date

Deciphered Date

Deciphered Date

1 2
1 2
1 2

D

+1.5V

HDT Debug conn

JHDT1

JHDT1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

SAMTE_ASP-136446-07-B

SAMTE_ASP-136446-07-B

ME@

ME@

APU_TCK

2

2

APU_TMS

4

4

APU_TDI

6

6

APU_TDO

8

8

APU_PWRGD

10

10

APU_RST#

12

12

APU_DBRDY

14

14

APU_DBREQ#

16

16

R51 0_0402_5%R51 0_0402_5%

18

18

R53 0_0402_5%R53 0_0402_5%

20

20

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

R35 1K_0402_5%R35 1K_0402_5%

1 2

R38 1K_0402_5%R38 1K_0402_5%

1 2

R40 1K_0402_5%R40 1K_0402_5%

1 2

R50 1K_0402_5%R50 1K_0402_5%

1 2
1 2
1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

FS1r2 Display/MISC/HDT

FS1r2 Display/MISC/HDT

FS1r2 Display/MISC/HDT

APU_TEST19
APU_TEST18

LA8611P

LA8611P

LA8611P

E

+1.5V+1.5V

0.1

0.1

0.1

of

of

of

751Monday, November 07, 2011

751Monday, November 07, 2011

751Monday, November 07, 2011

A

Power Name

VDD
+APU_CORE

VDDNB
+APU_CORE_NB

VDDIO
+1.5V

VDDP / VDDR
+1.2VS

VDDA

1 1

+2.5VS

2 2

3 3

Consumption

5A / 3.5A

VDDP decoupling

180P_0402_50V8J

180P_0402_50V8J

180P_0402_50V8J

180P_0402_50V8J

C106

C106

C105

C105

1

1

2

2

60A
29A

3.2A

0.5A

C107

C107

1

2

+1.2VS

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

C108

C108

+APU_CORE_NB

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

1

2

+1.5V

+APU_CORE

F8

VDD_1

H6

VDD_2

J1

VDD_3

J14

VDD_4

P6

VDD_5

P10

VDD_6

J16

VDD_7

J18

VDD_8

J9

VDD_9

K19

VDD_10

K3

VDD_11

K17

VDD_12

M3

VDD_13

K6

VDD_14

V10

VDD_15

V18

VDD_16

V3

VDD_17

F3

VDD_18

L18

VDD_19

V6

VDD_20

W1

VDD_21

T18

VDD_22

Y14

VDD_23

AA1

VDD_24

AB6

VDD_25

AC1

VDD_26

R1

VDD_27

P3

VDD_28

K10

VDD_29

H3

VDD_30

M19

VDD_31

C8

VDDNB_1

D10

VDDNB_2

B8

VDDNB_3

B12

VDDNB_4

C9

VDDNB_5

A9

VDDNB_6

A10

VDDNB_7

A8

VDDNB_8

A11

VDDNB_9

E10

VDDNB_10

E11

VDDNB_11

C10

VDDNB_12

H26

VDDIO_1

K20

VDDIO_2

J28

VDDIO_3

K23

VDDIO_4

K26

VDDIO_5

L22

VDDIO_6

L25

VDDIO_7

L28

VDDIO_8

M20

VDDIO_9

M23

VDDIO_10

M26

VDDIO_11

N22

VDDIO_12

N25

VDDIO_13

N28

VDDIO_14

P20

VDDIO_15

P23

VDDIO_16

P26

VDDIO_17

AA28

VDDIO_18

AH6

VDDP_1

AH5

VDDP_2

AH4

VDDP_3

AH3

VDDP_4

AH7

VDDP_5

AB10

VDDA

LOTES_ACA-ZIF-109-P12-A_FS1R2

LOTES_ACA-ZIF-109-P12-A_FS1R2

ME@

ME@

JCPU1E

JCPU1E

VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62

VDDNB_13
VDDNB_14
VDDNB_15
VDDNB_16
VDDNB_17
VDDNB_18
VDDNB_19
VDDNB_20
VDDNB_21
VDDNB_22
VDDNB_23

VDDNB_CAP_1
VDDNB_CAP_2

VDDIO_19
VDDIO_20
VDDIO_21
VDDIO_22
VDDIO_23
VDDIO_24
VDDIO_25
VDDIO_26
VDDIO_27
VDDIO_28
VDDIO_29
VDDIO_30
VDDIO_31
VDDIO_32
VDDIO_33
VDDIO_34
VDDIO_35
VDDIO_36

VDDR_1
VDDR_2
VDDR_3
VDDR_4

B

+APU_CORE

R11
T10
H8
G1
U11
W11
W13
W15
W17
W19
AB3
AD3
AD6
AE1
L1
Y6
M6
N11
N1
T3
T6
U19
U1
Y16
Y18
Y3
D4
F4
AF6
AF3
L11

C11

+APU_CORE_NB

C12
D9
D8
D12
D11
B11
A12
B10

Module design without +APU_CORE_NB

E12

power plane only Decoupling cap

B9
K13

K12

T23

+1.5V

T26
U22
U25
U28
Y26
T20
R28
R25
R22
V20
V23
V26
W22
W25
W28
Y24
G28

AG10
AH8
AH9
AH10

Northbridge Power Pins
for Remote Decoupling

+APU_CORE

+APU_CORE_NB

@

+VDDNB_CAP

C168 22U_0603_6.3V6MC168 22U_0603_6.3V6M

C169 22U_0603_6.3V6MC169 22U_0603_6.3V6M

1

1

2

2

C110

C110

C109

180P_0402_50V8J

C109

180P_0402_50V8J

1

2

C75

0.22U_0402_6.3V6K

C75

0.22U_0402_6.3V6K

C72

0.22U_0402_6.3V6K

C72

0.22U_0402_6.3V6K

1

1

2

2

C80

0.22U_0402_6.3V6K

C80

0.22U_0402_6.3V6K

C79

0.22U_0402_6.3V6K

C79

0.22U_0402_6.3V6K

1

1

2

2

+1.5V

C85

22U_0603_6.3V6M

C85

22U_0603_6.3V6M

C84

22U_0603_6.3V6M@C84

22U_0603_6.3V6M

1

1

2

2

C145 180P_0402_50V8JC145 180P_0402_50V8J

1

2

VDDR decoupling

180P_0402_50V8J

180P_0402_50V8J

C111

1000P_0402_50V7K

C111

1000P_0402_50V7K

1

1

2

2

C115

C115

C

C77

0.01U_0402_16V7K

C77

0.01U_0402_16V7K

C74

180P_0402_50V8J

C74

C73

0.01U_0402_16V7K

C73

0.01U_0402_16V7K

C76

0.01U_0402_16V7K

C76

0.01U_0402_16V7K

1

2

C81

180P_0402_50V8J

C81

180P_0402_50V8J

1

2

1

1

2

2

C82

180P_0402_50V8J

C82

180P_0402_50V8J

C83

180P_0402_50V8J

C83

180P_0402_50V8J

1

1

2

2

180P_0402_50V8J

C78

180P_0402_50V8J

C78

180P_0402_50V8J

1

1

2

2

(330uF_6.3V_4.2L_ESR17m)*1=(SF000002Z00)

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

C86

22U_0603_6.3V6M

C86

22U_0603_6.3V6M

C87

22U_0603_6.3V6M

C87

22U_0603_6.3V6M

1

1

2

2

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

C116

0.22U_0402_6.3V6K

C116

0.22U_0402_6.3V6K

1

1

2

2

4.7U_0603_6.3V6K

C88

22U_0603_6.3V6M

C88

22U_0603_6.3V6M

C90

C90

C89

C89

1

2

1

1

2

2

+1.2VS

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

C93

C93

C92

C92

C91

C91

1

1

2

1

2

2

+1.5V

C101

0.22U_0402_6.3V6K

C101

0.22U_0402_6.3V6K

1

2

C95

C95

C94

0.22U_0402_6.3V6K

C94

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

C102

C102

1

1

2

2

C103

180P_0402_50V8J

C103

180P_0402_50V8J

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

1

1

2

2

D

C97

C97

C96

0.22U_0402_6.3V6K

C96

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

1

1

2

2

Across VDDIO and VSS
split

C104

180P_0402_50V8J

C104

180P_0402_50V8J

1

2

E

JCPU1F

JCPU1F

J20

VSS_1

L4

VSS_2

R7

VSS_3

W18

VSS_4

A15

VSS_5

AB17

VSS_6

AC22

VSS_7

AE21

VSS_8

AF24

VSS_9

AH23

VSS_10

AH25

VSS_11

B7

VSS_12

C14

VSS_13

C16

VSS_14

C2

VSS_15

C20

VSS_16

C22

VSS_17

C24

VSS_18

C26

VSS_19

C28

VSS_20

D13

VSS_21

D15

VSS_22

D17

VSS_23

D19

VSS_24

D23

VSS_25

D25

VSS_26

D27

VSS_27

E4

VSS_28

E9

VSS_29

F14

VSS_30

F16

VSS_31

F18

VSS_32

F20

VSS_33

F22

VSS_34

C98

0.22U_0402_6.3V6K

C98

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

C99

180P_0402_50V8J

C99

180P_0402_50V8J

C100

330U_2.5V_M+C100

330U_2.5V_M

1

2

1

1

+

2

2

F26

VSS_35

F28

VSS_36

G13

VSS_37

G15

VSS_38

G17

VSS_39

G19

VSS_40

G21

VSS_41

G23

VSS_42

G25

VSS_43

G4

VSS_44

J22

VSS_45

J24

VSS_46

J4

VSS_47

J7

VSS_48

K11

VSS_49

K14

VSS_50

K9

VSS_51

AC11

VSS_52

L19

VSS_53

L7

VSS_54

M11

VSS_55

AF11

VSS_56

V19

VSS_57

V9

VSS_58

W16

VSS_59

W4

VSS_60

W7

VSS_61

Y11

VSS_62

Y20

VSS_63

Y22

VSS_64

Y9

VSS_65

A17

VSS_66

A13

VSS_67

K16

VSS_68

F24

VSS_69

G8

VSS_70

H7

VSS_71

J8

VSS_72

LOTES_ACA-ZIF-109-P12-A_FS1R2

LOTES_ACA-ZIF-109-P12-A_FS1R2

ME@

ME@

VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143

A19
A21
A23
A25
A7
AA4
AA7
AB13
AB15
AB19
AB21
AB23
AB25
AB27
AB9
AC14
AC16
AC18
AC20
AC24
AC26
AC28
AC4
AC7
AD9
AE13
AE15
AE17
M9
N10
N4
N7
R10
R4
T11
T9
U10
U18
U4
U7
V11
AE19
AE23
AE25
AE27
AE4
AE7
AF14
AF16
AF18
AF20
AF22
AF26
AF28
AF9
AG4
AG7
AH13
AH15
AH17
AH19
AH21
P9
C18
D21
W14
P11
C7
E8
K18
W12

Demo Board Capacitor

APU_CORE
22uF x 10

0.22uF x 2

0.01uF x 3
180pF x 2

CORE_NB
22uF x 2
10uF x 1

0.22uF x 2
180pF x 3

CORE_NB_CAP
22uF x 2
180pF x 1

VDDIO_SUS
(CPU side)
22uF x 4

4.7uF x 4

0.22uF x 6 +2(split)
180pF x 1 + 2(split)

4 4

+2.5VS

L1

L1
FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

12

C117

3300P_0402_50V7K

C117

3300P_0402_50V7K

C118

0.22U_0402_6.3V6K

C118

0.22U_0402_6.3V6K

1

12

2

A

C119

C119

40mil

+VDDA

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

1

2

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

VDDP

0.22uF x 2
180pF x 2

VDDR

0.22uF x 2
1nF x 1
180pF x 2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

VDDA

4.7uF x 1

0.22uF x 1

3.3nF x 1

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

FS1r2 PWR/GND

FS1r2 PWR/GND

FS1r2 PWR/GND

LA8611P

LA8611P

LA8611P

E

VDDIO_SUS
(DIMM x2)
100uF x 2

0.1uF x 12

851Monday, November 07, 2011

851Monday, November 07, 2011

851Monday, November 07, 2011

0.1

0.1

0.1

of

of

of

5

4

3

2

1

Panel PWM

+3VS

MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

2

G

G

12

R77

R77

4.7K_0402_5%

4.7K_0402_5%

13

D

D

Q11

Q11
2N7002K_SOT23-3

2N7002K_SOT23-3

S

S

12

@

@

R884

R884
0_0402_5%

0_0402_5%

APU_INVT_PWM <24>

12

D D

R76

R76
47K_0402_5%

47K_0402_5%

C

C

Q12

Q12

DP_INT_PWM<7>

C C

1 2

R78 2.2K_0402_5%R78 2.2K_0402_5%

12

R79

R79

4.7K_0402_5%

4.7K_0402_5%

2

B

B

E

E

3 1

12

R885

R885
0_0402_5%

0_0402_5%

B B

A A

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

FS1r2 Signal Level Shifter

FS1r2 Signal Level Shifter

FS1r2 Signal Level Shifter

LA8611P

LA8611P

LA8611P

1

951Friday, November 04, 2011

951Friday, November 04, 2011

951Friday, November 04, 2011

of

of

of

0.1

0.1

0.1

A

B

C

D

E

+VREF_DQ

DDRA_SDQ0

1 1

DDRA_SDQS1#<6>
DDRA_SDQS1<6>

DDRA_SDQS2#<6>
DDRA_SDQS2<6>

DDRA_CKE0<6>

2 2

3 3

+3VS

4 4

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

DDRA_SBS2#<6>

DDRA_CLK0<6>
DDRA_CLK0#<6>

DDRA_SBS0#<6>

DDRA_SWE#<6>

DDRA_SCAS#<6> DDRA_ODT0 <6>

DDRA_SCS1#<6>

DDRA_SDQS4#<6>
DDRA_SDQS4<6>

DDRA_SDQS6#<6>
DDRA_SDQS6<6>

1

2

1

C131

C131

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C130

C130

DDRA_SDQ1
DDRA_SDM0
DDRA_SDQ2

DDRA_SDQ3
DDRA_SDQ8

DDRA_SDQ9
DDRA_SDQS1#

DDRA_SDQS1
DDRA_SDQ10

DDRA_SDQ11
DDRA_SDQ16

DDRA_SDQ17
DDRA_SDQS2#

DDRA_SDQS2
DDRA_SDQ18

DDRA_SDQ19
DDRA_SDQ24

DDRA_SDQ25
DDRA_SDM3
DDRA_SDQ26

DDRA_SDQ27

DDRA_CKE0

DDRA_SBS2#
DDRA_SMA12

DDRA_SMA9
DDRA_SMA8

DDRA_SMA5
DDRA_SMA3

DDRA_SMA1
DDRA_CLK0

DDRA_CLK0#
DDRA_SMA10

DDRA_SBS0#
DDRA_SWE#

DDRA_SCAS# DDRA_ODT0
DDRA_SMA13

DDRA_SCS1#

DDRA_SDQ32
DDRA_SDQ33

DDRA_SDQS4#
DDRA_SDQS4

DDRA_SDQ34
DDRA_SDQ35

DDRA_SDQ40
DDRA_SDQ41

DDRA_SDM5
DDRA_SDQ42

DDRA_SDQ43
DDRA_SDQ48

DDRA_SDQ49
DDRA_SDQS6#

DDRA_SDQS6
DDRA_SDQ50

DDRA_SDQ51
DDRA_SDQ56

DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58

DDRA_SDQ59

R84 10K_0402_5%

R84 10K_0402_5%

1 2

A

+1.5V +1.5V

JDIMM1

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

12

R85

R85
10K_0402_5%

10K_0402_5%

203

VTT

205

GND1

207

BOSS1

LCN_DAN06-K4406-0103

LCN_DAN06-K4406-0103

Reverse H:4mm

<Address: 00>

ME@JDIMM1

ME@

DQS0#

DQS0

DQ12
DQ13

RESET#

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3
DQ30

DQ31

ODT0
ODT1

VREF_CA

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5
DQ46

DQ47
DQ52

DQ53

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7
DQ62

DQ63

EVENT#

GND2

BOSS2

VSS
DQ4
DQ5
VSS

VSS
DQ6
DQ7
VSS

VSS
DM1

VSS

VSS

VSS
DM2
VSS

VSS

VSS

VSS

VSS

CKE1

VDD

VDD

VDD

VDD

VDD
CK1

CK1#

VDD
BA1

RAS#

VDD

VDD

VDD
VSS

VSS
DM4
VSS

VSS

VSS

VSS

VSS

VSS
DM6
VSS

VSS

VSS

VSS

VSS
SDA

SCL
VTT

2

DDRA_SDQ4

4

DDRA_SDQ5

6
8

DDRA_SDQS0#

10

DDRA_SDQS0

12
14

DDRA_SDQ6

16

DDRA_SDQ7

18
20

DDRA_SDQ12

22

DDRA_SDQ13

24
26

DDRA_SDM1

28

MEM_MA_RST#

30
32

DDRA_SDQ14

34

DDRA_SDQ15

36
38

DDRA_SDQ20

40

DDRA_SDQ21

42
44

DDRA_SDM2

46
48

DDRA_SDQ22

50

DDRA_SDQ23

52
54

DDRA_SDQ28

56

DDRA_SDQ29

58
60

DDRA_SDQS3#

62

DDRA_SDQS3

64
66

DDRA_SDQ30

68

DDRA_SDQ31

70
72

DDRA_CKE1

74
76

DDRA_SMA15

78

A15
A14

A11

A7
A6

A4
A2

A0

S0#

NC

B

DDRA_SMA14

80
82

DDRA_SMA11

84

DDRA_SMA7

86
88

DDRA_SMA6

90

DDRA_SMA4

92
94

DDRA_SMA2

96

DDRA_SMA0

98
100

DDRA_CLK1

102

DDRA_CLK1#

104
106

DDRA_SBS1#

108

DDRA_SRAS#

110
112

DDRA_SCS0#

114
116
118

DDRA_ODT1

120
122
124
126
128

DDRA_SDQ36

130

DDRA_SDQ37

132
134

DDRA_SDM4

136
138

DDRA_SDQ38

140

DDRA_SDQ39

142
144

DDRA_SDQ44

146

DDRA_SDQ45

148
150

DDRA_SDQS5#

152

DDRA_SDQS5

154
156

DDRA_SDQ46

158

DDRA_SDQ47

160
162

DDRA_SDQ52

164

DDRA_SDQ53

166
168

DDRA_SDM6

170
172

DDRA_SDQ54

174

DDRA_SDQ55

176
178

DDRA_SDQ60

180

DDRA_SDQ61

182
184

DDRA_SDQS7#

186

DDRA_SDQS7

188
190

DDRA_SDQ62

192

DDRA_SDQ63

194
196

MEM_MA_EVENT#

198
200
202
204

206
208

+0.75VS

DDRA_SDQS0# <6>
DDRA_SDQS0 <6>

MEM_MA_RST# <6>

DDRA_SDQS3# <6>
DDRA_SDQS3 <6>

DDRA_CKE1 <6>

DDRA_CLK1 <6>
DDRA_CLK1# <6>

DDRA_SBS1# <6>
DDRA_SRAS# <6>

DDRA_SCS0# <6>

DDRA_ODT1 <6>

+VREF_CA

DDRA_SDQS5# <6>
DDRA_SDQS5 <6>

DDRA_SDQS7# <6>
DDRA_SDQS7 <6>

MEM_MA_EVENT# <6>

FCH_SDATA0 <11,14,32>
FCH_SCLK0 <11,14,32>

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Issued Date

Issued Date

C

DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SMA[0..15]

+1.5V

2

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+VREF_DQ

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

DDRA_SDQ[0..63] <6>

DDRA_SDM[0..7] <6>

DDRA_SMA[0..15] <6>

Place near DIMM1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C120

C120

C121

C121

1

+VREF_DQ +VREF_CA

1

C126

C126

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

C122

C122

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C129

C129

2

1000P_0402_50V7K

1000P_0402_50V7K

Deciphered Date

Deciphered Date

Deciphered Date

0.1U_0402_16V4Z

2

C123

C123

1

+1.5V

R80

R80
1K_0402_1%

1K_0402_1%

1 2

R82

R82
1K_0402_1%

1K_0402_1%

1 2

2

C124

C124

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

D

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C125

C125

1

+VREF_CA

+1.5V

R81

R81
1K_0402_1%

1K_0402_1%

15mil15mil

1

C127

C127

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1000P_0402_50V7K

1000P_0402_50V7K

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

1 2

1

2

R83

R83

C128

C128

1K_0402_1%

1K_0402_1%

1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DDRIII SO-DIMM 1

DDRIII SO-DIMM 1

DDRIII SO-DIMM 1

LA8611P

LA8611P

LA8611P

0.1

0.1

0.1

of

of

of

10 51Friday, November 04, 2011

10 51Friday, November 04, 2011

10 51Friday, November 04, 2011

E

A

B

C

D

E

DQ4
DQ5

VSS3

VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

DM1

DQ14
DQ15

DQ20
DQ21

DM2
DQ22

DQ23
DQ28

DQ29

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

CK1
CK1#

BA1
RAS#

NC2

DQ36
DQ37

DM4
DQ38

DQ39
DQ44

DQ45

DQ46
DQ47

DQ52
DQ53

DM6
DQ54

DQ55
DQ60

DQ61

DQ62
DQ63

SDA

SCL
VTT2

+1.5V+1.5V

2

DDRB_SDQ4

4

DDRB_SDQ5

6
8

DDRB_SDQS0#

10

DDRB_SDQS0

12
14

DDRB_SDQ6

16

DDRB_SDQ7

18
20

DDRB_SDQ12

22

DDRB_SDQ13

24
26

DDRB_SDM1

28

MEM_MB_RST#

30
32

DDRB_SDQ14

34

DDRB_SDQ15

36
38

DDRB_SDQ20

40

DDRB_SDQ21

42
44

DDRB_SDM2

46
48

DDRB_SDQ22

50

DDRB_SDQ23

52
54

DDRB_SDQ28

56

DDRB_SDQ29

58
60

DDRB_SDQS3#

62

DDRB_SDQS3

64
66

DDRB_SDQ30

68

DDRB_SDQ31

70
72

DDRB_CKE1

74
76

DDRB_SMA15

78

A15
A14

A11

A7
A6

A4
A2

A0

S0#

G2

DDRB_SMA14

80
82

DDRB_SMA11

84

DDRB_SMA7

86
88

DDRB_SMA6

90

DDRB_SMA4

92
94

DDRB_SMA2

96

DDRB_SMA0

98
100

DDRB_CLK1

102

DDRB_CLK1#

104
106

DDRB_SBS1#

108

DDRB_SRAS#

110
112

DDRB_SCS0#

114

DDRB_ODT0DDRB_SCAS#

116
118

DDRB_ODT1

120
122
124
126
128

DDRB_SDQ36

130

DDRB_SDQ37

132
134

DDRB_SDM4

136
138

DDRB_SDQ38

140

DDRB_SDQ39

142
144

DDRB_SDQ44

146

DDRB_SDQ45

148
150

DDRB_SDQS5#

152

DDRB_SDQS5

154
156

DDRB_SDQ46

158

DDRB_SDQ47

160
162

DDRB_SDQ52

164

DDRB_SDQ53

166
168

DDRB_SDM6

170
172

DDRB_SDQ54

174

DDRB_SDQ55

176
178

DDRB_SDQ60

180

DDRB_SDQ61

182
184

DDRB_SDQS7#

186

DDRB_SDQS7

188
190

DDRB_SDQ62

192

DDRB_SDQ63

194
196

MEM_MB_EVENT#

198
200
202
204

206

+0.75VS

DDRB_SDQS0# <6>
DDRB_SDQS0 <6>

MEM_MB_RST# <6>

DDRB_SDQS3# <6>
DDRB_SDQS3 <6>

DDRB_CKE1 <6>

DDRB_CLK1 <6>
DDRB_CLK1# <6>

DDRB_SBS1# <6>
DDRB_SRAS# <6>

DDRB_SCS0# <6>
DDRB_ODT0 <6>

DDRB_ODT1 <6>

+VREF_CA

DDRB_SDQS5# <6>
DDRB_SDQS5 <6>

DDRB_SDQS7# <6>
DDRB_SDQS7 <6>

MEM_MB_EVENT# <6>

FCH_SDATA0 <10,14,32>
FCH_SCLK0 <10,14,32>

DDRB_SDQ[0..63]
DDRB_SDM[0..7]

DDRB_SMA[0..15]

DDRB_SDQ[0..63] <6>

DDRB_SDM[0..7] <6>

DDRB_SMA[0..15] <6>

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C142

C142

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+VREF_DQ

15mil 15mil

+VREF_DQ +VREF_CA

1000P_0402_50V7K

1000P_0402_50V7K

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C132

C132

C133

C133

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C137

C137

1

1

C143

C143

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

2

C138

C138

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

+1.5V

1

2

2

C136

C136

1

+0.75VS

2

1

+VREF_CA

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C139

C139

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1000P_0402_50V7K

1000P_0402_50V7K

C134

C134

1

C135

C135

2

Place near DIMM2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

1

C140

C140

+1.5V

1

1

+

+

2

@

@

C141

C141

C144

C144
220U_6.3V_M

220U_6.3V_M

SF000002Y00

+VREF_DQ

DDRB_SDQ0

+3VS

DDRB_SDQ1
DDRB_SDM0
DDRB_SDQ2

DDRB_SDQ3
DDRB_SDQ8

DDRB_SDQ9
DDRB_SDQS1#

DDRB_SDQS1
DDRB_SDQ10

DDRB_SDQ11
DDRB_SDQ16

DDRB_SDQ17
DDRB_SDQS2#

DDRB_SDQS2
DDRB_SDQ18

DDRB_SDQ19
DDRB_SDQ24

DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26

DDRB_SDQ27

DDRB_CKE0

DDRB_SBS2#
DDRB_SMA12

DDRB_SMA9
DDRB_SMA8

DDRB_SMA5
DDRB_SMA3

DDRB_SMA1
DDRB_CLK0

DDRB_CLK0#
DDRB_SMA10

DDRB_SBS0#
DDRB_SWE#

DDRB_SMA13
DDRB_SCS1#

DDRB_SDQ32
DDRB_SDQ33

DDRB_SDQS4#
DDRB_SDQS4

DDRB_SDQ34
DDRB_SDQ35

DDRB_SDQ40
DDRB_SDQ41

DDRB_SDM5
DDRB_SDQ42

DDRB_SDQ43
DDRB_SDQ48

DDRB_SDQ49
DDRB_SDQS6#

DDRB_SDQS6
DDRB_SDQ50

DDRB_SDQ51
DDRB_SDQ56

DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58

DDRB_SDQ59

R86 10K_0402_5%

R86 10K_0402_5%

1 2

12

R87

R87

10K_0402_5%

10K_0402_5%

1 1

DDRB_SDQS1#<6>
DDRB_SDQS1<6>

DDRB_SDQS2#<6>
DDRB_SDQS2<6>

DDRB_CKE0<6>

2 2

3 3

4 4

DDRB_SBS2#<6>

DDRB_CLK0<6>
DDRB_CLK0#<6>

DDRB_SBS0#<6>

DDRB_SWE#<6>

DDRB_SCAS#<6>

DDRB_SCS1#<6>

DDRB_SDQS4#<6>
DDRB_SDQS4<6>

DDRB_SDQS6#<6>
DDRB_SDQS6<6>

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

LCN_DAN06-K4806-0103

LCN_DAN06-K4806-0103

ME@JDIMM2

ME@

DQS#0

DQS0

VSS10

VSS17

VSS19

VSS21

DQS3

VDD10

VDD12

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

VSS30
VSS31

VSS33

VSS35
DQS#5

DQS5

VSS38

VSS40

VSS42
VSS43

VSS45

VSS47
DQS#7

DQS7

VSS50

VSS52

EVENT#

Reserve H:8mm

<Address: 01>

A

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DDRIII SO-DIMM 2

DDRIII SO-DIMM 2

DDRIII SO-DIMM 2

LA8611P

LA8611P

LA8611P

11 51Friday, November 04, 2011

11 51Friday, November 04, 2011

11 51Friday, November 04, 2011

E

of

of

of

0.1

0.1

0.1

A

C146 150P_0402_50V8JC146 150P_0402_50V8J

+VDDAN_11_PCIE

+1.1VS_CKVDD

CLK_PCIE_VGA<17>
CLK_PCIE_VGA#<17>

CLK_PCIE_WLAN<32>
CLK_PCIE_WLAN#<32>

CLK_PCIE_LAN<28>
CLK_PCIE_LAN#<28>

CLK_LAN_48M<28>

1

2

1 2

UMI_RXP0<5>
UMI_RXN0<5>
UMI_RXP1<5>
UMI_RXN1<5>
UMI_RXP2<5>
UMI_RXN2<5>
UMI_RXP3<5>
UMI_RXN3<5>

UMI_TXP0<5>
UMI_TXN0<5>
UMI_TXP1<5>
UMI_TXN1<5>
UMI_TXP2<5>
UMI_TXN2<5>
UMI_TXP3<5>
UMI_TXN3<5>

C158

C158

22P_0402_50V8J

22P_0402_50V8J

20M_0402_5%

20M_0402_5%

C159

C159

22P_0402_50V8J

22P_0402_50V8J

PLT_RST#

C147 0.1U_0402_16V7KC147 0.1U_0402_16V7K
C148 0.1U_0402_16V7KC148 0.1U_0402_16V7K
C149 0.1U_0402_16V7KC149 0.1U_0402_16V7K
C150 0.1U_0402_16V7KC150 0.1U_0402_16V7K
C151 0.1U_0402_16V7KC151 0.1U_0402_16V7K
C152 0.1U_0402_16V7KC152 0.1U_0402_16V7K
C153 0.1U_0402_16V7KC153 0.1U_0402_16V7K
C154 0.1U_0402_16V7KC154 0.1U_0402_16V7K

R94 590_0402_1%R94 590_0402_1%
R88 2K_0402_1%R88 2K_0402_1%

R95 2K_0402_1%R95 2K_0402_1%

R98 0_0402_5%PX@R98 0_0402_5%PX@
R99 0_0402_5%PX@R99 0_0402_5%PX@

R102 0_0402_5%R102 0_0402_5%
R103 0_0402_5%R103 0_0402_5%

R100 0_0402_5%R100 0_0402_5%
R101 0_0402_5%R101 0_0402_5%

R680 22_0402_5%@R680 22_0402_5%@

1 2

12

R107

R107

1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2

1 2

C146 place close to FCH

1 1

2 2

WLAN

3 3

25M_X1
25M_X2

4 4

C157

C157

22P_0402_50V8J

22P_0402_50V8J

LAN

1 2

R106 1M_0402_5%R106 1M_0402_5%

3

NC

OSC

2

OSC

NC

Y4

Y4

25MHZ_20PF_FSX3M-25.M20FDO

25MHZ_20PF_FSX3M-25.M20FDO

1

22P_0402_50V8J

2

22P_0402_50V8J

A

4
1

C155

C155

B

APU_DISP_CLK<7>
APU_DISP_CLK#<7>

B

APU_PCIE_RST#_C

APU_CLK<7>
APU_CLK#<7>

CLK_PCIE_VGA_R
CLK_PCIE_VGA#_R

CLK_PCIE_WLAN_R
CLK_PCIE_WLAN#_R

CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R

CLK_LAN_25M_R

32K_X1

32K_X2

R89 33_0402_5%R89 33_0402_5%

1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2

Y1

Y1

32.768KHZ_12.5PF_CM31532768DZFT

32.768KHZ_12.5PF_CM31532768DZFT

1 2

A_RST#
UMI_RXP0_C

UMI_RXN0_C
UMI_RXP1_C
UMI_RXN1_C
UMI_RXP2_C
UMI_RXN2_C
UMI_RXP3_C
UMI_RXN3_C

PCIE_CALRP
PCIE_CALRN

CLK_CALRN

25M_X1

25M_X2

C

U2A

U2A

HUDSON-2

AE2

PCIE_RST#

AD5

A_RST#

AE30

UMI_TX0P

AE32

UMI_TX0N

AD33

UMI_TX1P

AD31

UMI_TX1N

AD28

UMI_TX2P

AD29

UMI_TX2N

AC30

UMI_TX3P

AC32

UMI_TX3N

AB33

UMI_RX0P

AB31

UMI_RX0N

AB28

UMI_RX1P

AB29

UMI_RX1N

Y33

UMI_RX2P

Y31

UMI_RX2N

Y28

UMI_RX3P

Y29

UMI_RX3N

AF29

PCIE_CALRP

AF31

PCIE_CALRN

V33

GPP_TX0P

V31

GPP_TX0N

W30

GPP_TX1P

W32

GPP_TX1N

AB26

GPP_TX2P

AB27

GPP_TX2N

AA24

GPP_TX3P

AA23

GPP_TX3N

AA27

GPP_RX0P

AA26

GPP_RX0N

W27

GPP_RX1P

V27

GPP_RX1N

V26

GPP_RX2P

W26

GPP_RX2N

W24

GPP_RX3P

W23

GPP_RX3N

F27

CLK_CALRN

G30

PCIE_RCLKP

G28

PCIE_RCLKN

R26

DISP_CLKP

T26

DISP_CLKN

H33

DISP2_CLKP

H31

DISP2_CLKN

T24

APU_CLKP

T23

APU_CLKN

J30

SLT_GFX_CLKP

K29

SLT_GFX_CLKN

H27

GPP_CLK0P

H28

GPP_CLK0N

J27

GPP_CLK1P

K26

GPP_CLK1N

F33

GPP_CLK2P

F31

GPP_CLK2N

E33

GPP_CLK3P

E31

GPP_CLK3N

M23

GPP_CLK4P

M24

GPP_CLK4N

M27

GPP_CLK5P

M26

GPP_CLK5N

N25

GPP_CLK6P

N26

GPP_CLK6N

R23

GPP_CLK7P

R24

GPP_CLK7N

N27

GPP_CLK8P

R27

GPP_CLK8N

J26

14M_25M_48M_OSC

C31

25M_X1

C33

25M_X2

21807-A13-HUDSON-M3_FCBGA656

21807-A13-HUDSON-M3_FCBGA656

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HUDSON-2

PCI CLKS

PCI CLKS

PCICLK4/14M_OSC/GPO39

PCI EXPRESS INTERFACES

PCI EXPRESS INTERFACES

PCI INTERFACE

PCI INTERFACE

REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42

GNT2#/SD_LED/GPO45

GNT3#/CLK_REQ7#/GPIO46

CLOCK GENERATOR

CLOCK GENERATOR

LPCAPUS5 PLUS

LPCAPUS5 PLUS

LDRQ1#/CLK_REQ6#/GPIO49

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

C

PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38

PCIRST#

AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8

AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31

CBE0#
CBE1#
CBE2#
CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#
STOP#

PERR#
SERR#
REQ0#

REQ1#/GPIO40

GNT0#

GNT1#/GPO44

CLKRUN#

LOCK#

INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35

LPCCLK0
LPCCLK1

LAD0
LAD1
LAD2
LAD3

LFRAME#

LDRQ0#

SERIRQ/GPIO48

DMA_ACTIVE#

PROCHOT#

APU_PG

LDT_STP#

APU_RST#

S5_CORE_EN

RTCCLK

INTRUDER_ALERT#

VDDBT_RTC_G

32K_X1

32K_X2

AF3
AF1
AF5
AG2
AF6

AB5

AJ3
AL5
AG4
AL6
AH3
AJ5
AL1
AN5
AN6
AJ1
AL8
AL3
AM7
AJ6
AK7
AN8
AG9
AM11
AJ10
AL12
AK11
AN12
AG12
AE12
AC12
AE13
AF13
AH13
AH14
AD15
AC15
AE16
AN3
AJ8
AN10
AD12
AG10
AK9
AL10
AF10
AE10

PAR

AH1
AM9
AH8
AG15
AG13
AF15
AM17
AD16
AD13
AD21
AK17
AD19
AH9

AF18
AE18
AC16
AD18

B25
D25

D27
C28
A26
A29
A31
B27
AE27
AE19

G25
E28
E26
G26
F26

H7
F1
F3
E6

G2

G4

Compal Secret Data

Compal Secret Data

Compal Secret Data

APU_PCIE_RST#_C

Module design have reserve GPIO44,45 for
VGA power enable and reset

R891 0_0402_5%R891 0_0402_5%

1 2

APU_PROCHOT#_R

32K_X1

32K_X2

Deciphered Date

Deciphered Date

Deciphered Date

APU_PCIE_RST #: Reset PCIE device on APU

T14T14

T69T69

D

PCI_CLK1 <16>
PCI_CLK3 <16>

PCI_CLK4 <16>

MC74VHC1G08DFT2G SC70 5P

MC74VHC1G08DFT2G SC70 5P

R692

@R692

@

1 2

33_0402_5%

33_0402_5%

C790

C790

150P_0402_50V8J

150P_0402_50V8J

12

1

@

@

2

R692/ C790 close to FCH

PCI_AD23 <16>
PCI_AD24 <16>
PCI_AD25 <16>
PCI_AD26 <16>
PCI_AD27 <16>

@

@

1 2

R670

W=20mils

1

C156

C156

2

R670

0_0402_5%

0_0402_5%

LPC_CLK1 <16>
LPC_AD0 <32,33>
LPC_AD1 <32,33>
LPC_AD2 <32,33>
LPC_AD3 <32,33>
LPC_FRAME# <32,33>

SERIRQ <33>

R15 0_0402_5%@R15 0_0402_5%@

1 2

APU_PWRGD <7,47>
APU_RST# <7>

RTC_CLK <16,33>

1U_0402_6.3V6K

1U_0402_6.3V6K

D

E

+3VALW

C789

@C789

@

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

5

2

P

B

1

A

@

@

R693

R693

8.2K_0402_5%

8.2K_0402_5%

1 2

R105 510_0402_5%R105 510_0402_5%

3

@

@

R695

@R695

@

1 2

0_0402_5%

0_0402_5%

CLK_PCI_EC <16,33>
CLK_PCI_DB <32>

ALLOW_STOP <7>
APU_PROCHOT# <7>

Y

G

U43

U43

+RTCBATT

12

4

CLRP1
SHORT PADS

SHORT PADS

@CLRP1

@

1 2

R866

R866
0_0402_5%

0_0402_5%

APU_PCIE_RST# <17,28,32>

PLT_RST# <33>

for Clear CMOS

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

FCH PCIE/CLK/PCI/LPC/RTC

FCH PCIE/CLK/PCI/LPC/RTC

FCH PCIE/CLK/PCI/LPC/RTC

LA8611P

LA8611P

LA8611P

12 51Monday, November 07, 2011

12 51Monday, November 07, 2011

12 51Monday, November 07, 2011

E

0.1

0.1

0.1

of

of

of

A

B

C

D

E

4MB SPI ROM
& Non-share ROM.

+3VALW

1 2

1 2

1
2
3
4

SPI_WP#

3.3K_0402_5%

3.3K_0402_5%

SPI_HOLD#

3.3K_0402_5%

3.3K_0402_5%

U4

U4

CS#
SO/SIO1
WP#
GND

MX25L3206EM2I-12G_SO8

MX25L3206EM2I-12G_SO8

SA00003K800

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

+3VALW

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C165

C165

1 2

R110

8

VCC

SPI_HOLD#

7

HOLD#
SI/SIO0

SPI_CLK_FCH

6

SCLK

SPI_SI

5

GBE_PHY_INTR

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

FCH SATA/SPI/VGA/HWM/SD

FCH SATA/SPI/VGA/HWM/SD

FCH SATA/SPI/VGA/HWM/SD

R110

0_0402_5%

0_0402_5%

1 2
1 2

0_0402_5%

0_0402_5%

R119

R119

R110 place close to FCH

R121 10K_0402_5%R121 10K_0402_5%

LA8611P

LA8611P

LA8611P

1 2

E

R112

U2B

U2B

1 1

C161 0.01U_0402_16V7KC161 0.01U_0402_16V7K

SATA_FTX_DRX_P1<31>

HDD

ODD

2 2

3 3

1 2

R888 10K_0402_5%R888 10K_0402_5%

no Zero Power ODD function,
Thus, pull-down needs to be poped

4 4

SATA_FTX_DRX_N1<31>

SATA_FRX_C_DTX_N1<31>
SATA_FRX_C_DTX_P1<31>

SATA_FTX_C_DRX_P2<31>
SATA_FTX_C_DRX_N2<31>

SATA_FRX_C_DTX_N2<31>
SATA_FRX_C_DTX_P2<31>

+AVDD_SATA

ODD_EN

1 2

C162 0.01U_0402_16V7KC162 0.01U_0402_16V7K

1 2

+3VS

BT_DISABLE#<32>

1 2

BT_ON#<31>

WL_OFF#<32>

ODD_EN<31>

A

SATA_FTX_C_DRX_P1
SATA_FTX_C_DRX_N1

SATA_CALRP

R1281K_0402_1% R1281K_0402_1%

12

SATA_CALRN

R130931_0402_1% R130931_0402_1%

12

R13310K_0402_5% R13310K_0402_5%

1 2

R146 10K_0402_5%R146 10K_0402_5%

1 2

R149 10K_0402_5%R149 10K_0402_5%

1 2

R151 10K_0402_5%R151 10K_0402_5%

AK19

SATA_TX0P

AM19

SATA_TX0N

AL20

SATA_RX0N

AN20

SATA_RX0P

AN22

SATA_TX1P

AL22

SATA_TX1N

AH20

SATA_RX1N

AJ20

SATA_RX1P

AJ22

SATA_TX2P

AH22

SATA_TX2N

AM23

SATA_RX2N

AK23

SATA_RX2P

AH24

SATA_TX3P

AJ24

SATA_TX3N

AN24

SATA_RX3N

AL24

SATA_RX3P

AL26

SATA_TX4P

AN26

SATA_TX4N

AJ26

SATA_RX4N

AH26

SATA_RX4P

AN29

SATA_TX5P

AL28

SATA_TX5N

AK27

SATA_RX5N

AM27

SATA_RX5P

AL29

NC6

AN31

NC7

AL31

NC8

AL33

NC9

AH33

NC10

AH31

NC11

AJ33

NC12

AJ31

NC13

AF28

SATA_CALRP

AF27

SATA_CALRN

AD22

SATA_ACT#/GPIO67

AF21

SATA_X1

AG21

SATA_X2

AH16

T48T48

B

FANOUT0/GPIO52

AM15

FANOUT1/GPIO53

AJ16

FANOUT2/GPIO54

AK15

FANIN0/GPIO56

AN16

FANIN1/GPIO57

AL16

FANIN2/GPIO58

K6

TEMPIN0/GPIO171

K5

TEMPIN1/GPIO172

K3

TEMPIN2/GPIO173

M6

TEMPIN3/TALERT#/GPIO174

21807-A13-HUDSON-M3_FCBGA656

21807-A13-HUDSON-M3_FCBGA656

HUDSON-2

HUDSON-2

SERIAL ATA

SERIAL ATA

HW MONITOR

HW MONITOR

GBE_COL

GBE_CRS

GBE_MDCK

GBE_MDIO
GBE_RXD3

GBE_RXD2
GBE_RXD1
GBE_RXD0

GBE_TXCLK

GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0

VGA_RED

VGA_BLUE

AUXCAL

NC1
NC2
NC3
NC4
NC5

C

AL14
AN14
AJ12
AH12
AK13
AM13
AH15
AJ14

AC4
AD3
AD9
W10
AB8
AH7
AF7
AE7
AD7
AG8
AD1
AB7
AF9
AG6
AE8
AD8
AB9
AC2
AA7

GBE_PHY_INTR

W9

SPI_SO_R

V6

SPI_SI_R

V5

SPI_CLK_FCH_R

V3

SPI_SB_CS0#_R

T6

SPI_WP#

V1

L30

R125 150_0402_1%R125 150_0402_1%

L32

M29

M28
N30

M33
N32

K31

V28
V29

U28
T31

T33
T29
T28
R32
R30
P29
P28

C29

N2
M3
L2
N4
P1
P3
M1
M5

AG16
AH10
A28
G27
L4

1 2

R126 150_0402_1%R126 150_0402_1%

1 2

R127 150_0402_1%R127 150_0402_1%

1 2

R131 715_0402_1%R131 715_0402_1%

1 2

AUXCAL

R134 100_0402_1%R134 100_0402_1%

1 2

1 2

R137 10K_0402_5%R137 10K_0402_5%

1 2

R138 10K_0402_5%R138 10K_0402_5%

@

@

1 2

R139 10K_0402_5%

R139 10K_0402_5%

@

@

1 2

R142 10K_0402_5%

R142 10K_0402_5%

@

@

1 2

R143 10K_0402_5%

R143 10K_0402_5%

@

@

1 2

R145 10K_0402_5%

R145 10K_0402_5%

@

@

1 2

R147 10K_0402_5%

R147 10K_0402_5%

1 2

R148 10K_0402_5%R148 10K_0402_5%

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

SPI_SB_CS0#_R
SPI_SO_R SPI_SO_L

CRT_HSYNC <27>
CRT_VSYNC <27>

CRT_DDC_DATA <27>
CRT_DDC_CLK <27>

ML_VGA_AUXP_C <7>
ML_VGA_AUXN_C <7>

ML_VGA_TXP0 <7>
ML_VGA_TXN0 <7>
ML_VGA_TXP1 <7>
ML_VGA_TXN1 <7>
ML_VGA_TXP2 <7>
ML_VGA_TXN2 <7>
ML_VGA_TXP3 <7>
ML_VGA_TXN3 <7>

FCH_CRT_HPD <7>

Need to enable internal
pull down to leave
unconnected

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

R115

R115

0_0402_5%

0_0402_5%

1 2
1 2

0_0402_5%

0_0402_5%

R117

R117

DAC_RED <27>

DAC_GRN <27>

DAC_BLU <27>

+VDDAN_11_ML

SD_CLK/SCLK_2/GPIO73

SD_CMD/SLOAD_2/GPIO74

SD_CD/GPIO75

SD_WP/GPIO76

SD_DATA0/SDATI_2/GPIO77

SD_DATA1/SDATO_2/GPIO78

SD CARDGBE LANSPI ROMVGA DACVGA MAINLINK

SD CARDGBE LANSPI ROMVGA DACVGA MAINLINK

SD_DATA2/GPIO79
SD_DATA3/GPIO80

GBE_RXCLK

GBE_RXCTL/RXDV

GBE_RXERR

GBE_TXCTL/TXEN

GBE_PHY_PD

GBE_PHY_RST#

GBE_PHY_INTR

SPI_DI/GPIO164

SPI_DO/GPIO163

SPI_CLK/GPIO162

SPI_CS1#/GPIO165

ROM_RST#/SPI_WP#/GPIO161

VGA_GREEN

VGA_HSYNC/GPO68

VGA_VSYNC/GPO69

VGA_DDC_SDA/GPO70
VGA_DDC_SCL/GPO71

VGA_DAC_RSET

AUX_VGA_CH_P

AUX_VGA_CH_N

ML_VGA_L0P
ML_VGA_L0N
ML_VGA_L1P
ML_VGA_L1N
ML_VGA_L2P
ML_VGA_L2N
ML_VGA_L3P
ML_VGA_L3N

ML_VGA_HPD/GPIO229

VIN0/GPIO175
VIN1/GPIO176

VIN2/SDATI_1/GPIO177

VIN3/SDATO_1/GPIO178

VIN4/SLOAD_1/GPIO179

VIN5/SCLK_1/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R112

R108

R108

SPI_SB_CS0#

+FCH_VDDAN_33_DAC

12

R61410K_0402_5% R61410K_0402_5%

D

SPI_WP#

SPI_CLK_FCH

33_0402_5%

33_0402_5%

22P_0402_50V8J

22P_0402_50V8J

SPI_CLK_FCH_R
SPI_SI_R

13 51Friday, November 04, 2011

13 51Friday, November 04, 2011

13 51Friday, November 04, 2011

R111

R111

of

of

of

@

@

C160

C160

@

@

+3VALW

12

0.1

0.1

0.1

A

1 1

+3VALW

+3VALW

For FCH internal debug use

R179 2.2K_0402_5%@R179 2.2K_0402_5%@

1 2

R181 2.2K_0402_5%@R181 2.2K_0402_5%@

1 2

R183 2.2K_0402_5%@R183 2.2K_0402_5%@

2 2

+3VALW

3 3

+3VS

4 4

1 2

R883 10K_0402_5%@R883 10K_0402_5%@

1 2

R624 10K_0402_5%R624 10K_0402_5%

1 2

R625 10K_0402_5%R625 10K_0402_5%

1 2

R174 10K_0402_5%R174 10K_0402_5%

1 2

R618 10K_0402_5%@R618 10K_0402_5%@

1 2

R649 10K_0402_5%@R649 10K_0402_5%@

1 2

R620 10K_0402_5%@R620 10K_0402_5%@

1 2

R163 10K_0402_5%@R163 10K_0402_5%@

1 2

R164 10K_0402_5%@R164 10K_0402_5%@

1 2

R169 100K_0402_5%@R169 100K_0402_5%@

1 2

R170 10K_0402_5%@R170 10K_0402_5%@

1 2

R896 10K_0402_5%R896 10K_0402_5%

1 2

R171 2.2K_0402_5%R171 2.2K_0402_5%

1 2

R172 2.2K_0402_5%R172 2.2K_0402_5%

1 2

R175 10K_0402_5%R175 10K_0402_5%

1 2

R173 8.2K_0402_5%R173 8.2K_0402_5%

1 2

R176 8.2K_0402_5%R176 8.2K_0402_5%

1 2

R166 10K_0402_5%R166 10K_0402_5%

1 2

R168 10K_0402_5%R168 10K_0402_5%

1 2

R177 2.2K_0402_5%R177 2.2K_0402_5%

1 2

R178 10K_0402_5%@R178 10K_0402_5%@

1 2

R180 10K_0402_5%@R180 10K_0402_5%@

1 2

R182 10K_0402_5%PX@R182 10K_0402_5%PX@

1 2

ODD_DA#_FCH
ODD_DETECT#

H_THERMTRIP#

EC_LID_OUT#

FCH_PCIE_WAKE#

FCH_SCLK0

FCH_SDATA0

WD_PWRGD

WLAN_CLKREQ#

LAN_CLKREQ#

FCH_SCLK1
FCH_SDATA1
EC_RSMRST#
HDA_BITCLK
HDA_SDIN0

PEG_CLKREQ#_R

A

TEST0
TEST1
TEST2

USB_OC7#
USB_OC2#
USB_OC1#
USB_OC0#

USB_OC5#
USB_OC3#

CPPE#_R

12

UMA@

UMA@

12

PX@

PX@

+3VALW+3VALW

12

UMA@

UMA@

R685

R685

10K_0402_5%

10K_0402_5%

12

PX@

PX@

R682

R682

10K_0402_5%

10K_0402_5%

HDA_BITCLK_AUDIO<30>
HDA_SDOUT_AUDIO<30>

HDA_SDIN0<30>

HDA_SYNC_AUDIO<30>

HDA_RST_AUDIO#<30>

R684

R684

10K_0402_5%

10K_0402_5%

R683

R683

10K_0402_5%

10K_0402_5%

PEG_CLKREQ#<18>

VGA_GATE#<33>

GPIO189
GPIO190

PXS_RST#<17>
PXS_PWREN<19,43,46>

B

PCIE_RST2 : Reset PCIE device on Hudson 3

EC_LID_OUT#<33>
PM_SLP_S3#<33>

PM_SLP_S5#<33>
PBTN_OUT#<33>

FCH_PWRGD<33,47>

GATEA20<33>
KBRST#<33>

EC_SCI#<33>
EC_SMI#<33>

R155 10K_0402_5%@R155 10K_0402_5%@

1 2

FCH_PCIE_WAKE#<28,32>

H_THERMTRIP#<7>

EC_RSMRST#<33>

LAN_CLKREQ#<28>

FCH_SPKR<30>
FCH_SCLK0<10,11,32>
FCH_SDATA0<10,11,32>

WLAN_CLKREQ#<32>

VGA_PWRGD<17,19,46>

R156 0_0402_5%@R156 0_0402_5%@

ODD_DA#_FCH<31>

ODD_DETECT#<31>

USB_OC2#<35>
USB_OC1#<36>
USB_OC0#<37>

R159 33_0402_5%R159 33_0402_5%
R160 33_0402_5%R160 33_0402_5%

R161 33_0402_5%R161 33_0402_5%
R162 33_0402_5%R162 33_0402_5%

2

G

G

BOARD
Config.

GPIO189 GPIO190

1 2
1 2

1 2
1 2

13

D

D

S

S

00

12

12
12

PX@

PX@

Q112

Q112

2N7002K_SOT23-3

2N7002K_SOT23-3

FCH_PWRGD

11

B

TEST0
TEST1
TEST2

CPPE#_R
SYS_RESET#

WD_PWRGD

FCH_SCLK0
FCH_SDATA0
FCH_SCLK1
FCH_SDATA1

PEG_CLKREQ#_R

USB_OC7#
USB_OC5#
USB_OC3#

USB_OC2#
USB_OC1#
USB_OC0#

R960_0402_5% PX@ R960_0402_5% PX@
R970_0402_5% PX@ R970_0402_5% PX@

10
01

T17T17

HDA_BITCLK
HDA_SDOUT
HDA_SDIN0

HDA_SYNC
HDA_RST#

T61T61
T19T19

GPIO189
GPIO190

Function

PX4

Reserved

DIS
UMA

C

U2D

U2D

HUDSON-2

AB6

PCIE_RST2#/PCI_PME#/GEVENT4#

R2

RI#/GEVENT22#

W7

SPI_CS3#/GBE_STAT1/GEVENT21#

T3

SLP_S3#

W2

SLP_S5#

J4

PWR_BTN#

N7

PWR_GOOD

T9

TEST0

T10

TEST1/TMS

V9

TEST2

AE22

GA20IN/GEVENT0#

AG19

KBRST#/GEVENT1#

R9

LPC_PME#/GEVENT3#

C26

LPC_SMI#/GEVENT23#

T5

LPC_PD#/GEVENT5#

U4

SYS_RESET#/GEVENT19#

K1

WAKE#/GEVENT8#

V7

IR_RX1/GEVENT20#

R10

THRMTRIP#/SMBALERT#/GEVENT2#

AF19

WD_PWRGD

U2

RSMRST#

AG24

CLK_REQ4#/SATA_IS0#/GPIO64

AE24

CLK_REQ3#/SATA_IS1#/GPIO63

AE26

SMARTVOLT1/SATA_IS2#/GPIO50

AF22

CLK_REQ0#/SATA_IS3#/GPIO60

AH17

SATA_IS4#/FANOUT3/GPIO55

AG18

SATA_IS5#/FANIN3/GPIO59

AF24

SPKR/GPIO66

AD26

SCL0/GPIO43

AD25

SDA0/GPIO47

T7

SCL1/GPIO227

R7

SDA1/GPIO228

AG25

CLK_REQ2#/FANIN4/GPIO62

AG22

CLK_REQ1#/FANOUT4/GPIO61

J2

IR_LED#/LLB#/GPIO184

AG26

SMARTVOLT2/SHUTDOWN#/GPIO51

V8

DDR3_RST#/GEVENT7#/VGA_PD

W8

GBE_LED0/GPIO183

Y6

SPI_HOLD#/GBE_LED1/GEVENT9#

V10

GBE_LED2/GEVENT10#

AA8

GBE_STAT0/GEVENT11#

AF25

CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#

M7

BLINK/USB_OC7#/GEVENT18#

R8

USB_OC6#/IR_TX1/GEVENT6#

T1

USB_OC5#/IR_TX0/GEVENT17#

P6

USB_OC4#/IR_RX0/GEVENT16#

F5

USB_OC3#/AC_PRES/TDO/GEVENT15#

P5

USB_OC2#/TCK/GEVENT14#

J7

USB_OC1#/TDI/GEVENT13#

T8

USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#

AB3

AZ_BITCLK

AB1

AZ_SDOUT

AA2

AZ_SDIN0/GPIO167

Y5

AZ_SDIN1/GPIO168

Y3

AZ_SDIN2/GPIO169

Y1

AZ_SDIN3/GPIO170

AD6

AZ_SYNC

AE4

AZ_RST#

K19

PS2_DAT/SDA4/GPIO187

J19

PS2_CLK/CEC/SCL4/GPIO188

J21

SPI_CS2#/GBE_STAT2/GPIO166

D21

PS2KB_DAT/GPIO189

C20

PS2KB_CLK/GPIO190

D23

PS2M_DAT/GPIO191

C22

PS2M_CLK/GPIO192

F21

KSO_0/GPIO209

E20

KSO_1/GPIO210

F20

KSO_2/GPIO211

A22

KSO_3/GPIO212

E18

KSO_4/GPIO213

A20

KSO_5/GPIO214

J18

KSO_6/GPIO215

H18

KSO_7/GPIO216

G18

KSO_8/GPIO217

B21

KSO_9/GPIO218

K18

KSO_10/GPIO219

D19

KSO_11/GPIO220

A18

KSO_12/GPIO221

C18

KSO_13/GPIO222

B19

KSO_14/GPIO223

B17

KSO_15/GPIO224

A24

KSO_16/GPIO225

D17

KSO_17/GPIO226

21807-A13-HUDSON-M3_FCBGA656

21807-A13-HUDSON-M3_FCBGA656

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

HUDSON-2

EMBEDDED CTRL

EMBEDDED CTRL

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

USBCLK/14M_25M_48M_OSC

USB MISCUSB 1.1USB 2.0USB 3.0

USB MISCUSB 1.1USB 2.0USB 3.0

USB_FSD1P/GPIO186

USB_FSD0P/GPIO185

USB OC GPIO ACPI / WAKE UP EVENTSHD AUDIO

USB OC GPIO ACPI / WAKE UP EVENTSHD AUDIO

SCL3_LV/GPIO195

SDA3_LV/GPIO196
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM1/EC_TIMER1/GPIO198

EC_PWM2/EC_TIMER2/WOL_EN/GPIO199

EC_PWM3/EC_TIMER3/GPIO200

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

USB_RCOMP

USB_FSD1N

USB_FSD0N

USB_HSD13P

USB_HSD13N
USB_HSD12P

USB_HSD12N
USB_HSD11P

USB_HSD11N
USB_HSD10P

USB_HSD10N

USB_HSD9P

USB_HSD9N

USB_HSD8P

USB_HSD8N

USB_HSD7P

USB_HSD7N

USB_HSD6P

USB_HSD6N

USB_HSD5P

USB_HSD5N

USB_HSD4P

USB_HSD4N

USB_HSD3P

USB_HSD3N

USB_HSD2P

USB_HSD2N

USB_HSD1P

USB_HSD1N

USB_HSD0P

USB_HSD0N

USBSS_CALRP
USBSS_CALRN

USB_SS_TX3P

USB_SS_TX3N
USB_SS_RX3P

USB_SS_RX3N

USB_SS_TX2P

USB_SS_TX2N
USB_SS_RX2P

USB_SS_RX2N

USB_SS_TX1P

USB_SS_TX1N
USB_SS_RX1P

USB_SS_RX1N

USB_SS_TX0P

USB_SS_TX0N
USB_SS_RX0P

USB_SS_RX0N

SCL2/GPIO193

SDA2/GPIO194

KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208

D

G8
B9
H1

H3
H6

H5
H10

G10
K10

J12
G12

F12
K12

K13
B11

D11
E10

F10
C10

A10
H9

G9
A8

C8
F8

E8
C6

A6
C5

A5
C1

C3
E1

E3
C16

A16
A14

C14
C12

A12
D15

B15
E14

F14
F15

G15
H13

G13
J16

H16
J15

K15

H19
G19
G22
G21
E22
H22
J22
H21

K21
K22
F22
F24
E24
B23
C24
F18

D

USB_RCOMP

USBSS_CALRP
USBSS_CALRN

USB30_FTX_DRX_P1
USB30_FTX_DRX_N1

USB30_FRX_DTX_P1
USB30_FRX_DTX_N1

USB30_FTX_DRX_P0
USB30_FTX_DRX_N0

USB30_FRX_DTX_P0
USB30_FRX_DTX_N0

R165 10K_0402_5%R165 10K_0402_5%
R167 10K_0402_5%R167 10K_0402_5%
R227 10K_0402_5%R227 10K_0402_5%
R228 10K_0402_5%R228 10K_0402_5%

EC_PWM2

R154 11.8K_0402_1%R154 11.8K_0402_1%

1 2

USB30_P11 <37>
USB30_N11 <37>

USB30_P10 <37>
USB30_N10 <37>

T74T74
T75T75

USB20_P5 <35>
USB20_N5 <35>

USB20_P4 <31>
USB20_N4 <31>

USB20_P3 <25>
USB20_N3 <25>

USB20_P2 <32>
USB20_N2 <32>

USB20_P1 <35>
USB20_N1 <35>

USB20_P0 <36>
USB20_N0 <36>

R864 1K_0402_1%R864 1K_0402_1%
R865 1K_0402_1%R865 1K_0402_1%

1 2
1 2
1 2
1 2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

1 2
1 2

LP2

LP1

CR

BT

CMOS

WLAN

RP2

RP1

+FCH_VDD_11_SSUSB_S

USB30_FTX_DRX_P1 <37>
USB30_FTX_DRX_N1 <37>

USB30_FRX_DTX_P1 <37>
USB30_FRX_DTX_N1 <37>

USB30_FTX_DRX_P0 <37>
USB30_FTX_DRX_N0 <37>

USB30_FRX_DTX_P0 <37>
USB30_FRX_DTX_N0 <37>

EC_PWM2 <16>

strap pin

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

FCH-ACPI/USB/HDA/GPIO

FCH-ACPI/USB/HDA/GPIO

FCH-ACPI/USB/HDA/GPIO

LA8611P

LA8611P

LA8611P

E

Root

Root

Root

LP2

LP1

0.1

0.1

0.1

of

of

of

14 51Friday, November 04, 2011

14 51Friday, November 04, 2011

14 51Friday, November 04, 2011

E

A

B

C

D

E

+3VS

+FCH_VDDAN_33_DAC

1 1

+3VS +FCH_VDDAN_33_DAC

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

2 2

+3VALW

+VDDAN_33_USB

3 3

+3VS

+3VS

4 4

L4

L4

1 2

MBK1608221YZF_2P

MBK1608221YZF_2P

220 ohm

1 2

R186 0_0402_5%R186 0_0402_5%

L2

L2

L6

L6

1 2

220 ohm

L7

L7

1 2

220 ohm

L10

L10

1 2

220 ohm

L12

L12

1 2

220 ohm

30mil

+VDDPL_33_SSUSB_S

A

1 2

220 ohm

MBK1608221YZF_2P

MBK1608221YZF_2P

MBK1608221YZF_2P

MBK1608221YZF_2P

MBK1608221YZF_2P

MBK1608221YZF_2P

MBK1608221YZF_2P

MBK1608221YZF_2P

+VDDPL_33_SYS

C181

2.2U_0402_6.3V6M

C181

2.2U_0402_6.3V6M

1

2

+VDDPL_33_MLDAC

0.1U_0402_16V7K

0.1U_0402_16V7K

C180

C180

1

2

C166

2.2U_0603_6.3V4Z

C166

2.2U_0603_6.3V4Z

C167

C167

1

2

C198

2.2U_0402_6.3V6M

C198

2.2U_0402_6.3V6M

1

2

+VDDPL_33_USB_S

C210

2.2U_0402_6.3V6M

C210

2.2U_0402_6.3V6M

1

2

+VDDPL_33_PCIE

+VDDPL_33_SATA

C182

0.1U_0402_16V7K

C182

0.1U_0402_16V7K

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K

C188

C188

1

VDDPL_33_SSUSB_S

2

For Hudson3 USB3.0 only
For Hudson2, connect to GND

LDO_CAP: Internally generated 1.8V
supply for the RGB outputs

+1.1VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C200

0.1U_0402_16V7K

C200

0.1U_0402_16V7K

1

2

C211

0.1U_0402_16V7K

C211

0.1U_0402_16V7K

1

2

C218

2.2U_0402_6.3V6M

C218

2.2U_0402_6.3V6M

1

2

C227

2.2U_0402_6.3V6M

C227

2.2U_0402_6.3V6M

1

+1.1VALW

2

+3VS

+VDDPL_33_MLDAC

1 2

MBK1608221YZF_2P

MBK1608221YZF_2P

220 ohm/2A

+3VALW

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

+1.1VALW

+1.1VALW

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

42 ohm/4A

1 2

R185 0_0603_5%R185 0_0603_5%

L5

L5

L8

L8

1 2

220 ohm/2A

L11

L11

1 2

MBK1608221YZF_2P

MBK1608221YZF_2P

220 ohm

L13

L13

1 2

MBK1608221YZF_2P

MBK1608221YZF_2P

220 ohm

+FCH_VDD_11_SSUSB_S

40mils

L15

L15

12

22U_0603_6.3V6M

22U_0603_6.3V6M

C176

C176

C178

C178

1

1

2

2

+VDDPL_33_SYS

R188 0_0402_5%R188 0_0402_5%

1 2

R189 0_0402_5%R189 0_0402_5%

1 2

+VDDPL_33_USB_S
+VDDPL_33_PCIE
+VDDPL_33_SATA

R192 0_0402_5%R192 0_0402_5%

1 2

R193 0_0603_5%R193 0_0603_5%

1 2

R199

R199

1 2

0_0603_5%

0_0603_5%

R201

R201

1 2

0_0603_5%

0_0603_5%

B

C212

C212

C219

C219

C223

C223

10U_0603_6.3V6M

10U_0603_6.3V6M

C213

C213

1

1

2

2

C220

C220

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

1

1

2

2

C224

C224

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

2

2

C199

C199

1

2

R196 0_0402_5%R196 0_0402_5%

10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

C229

C229

1

2

C237

C237

1

2

+VDDIO_33_PCIGP

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

C187

C187

1

2

+VDDPL_33_DAC
+VDDPL_33_ML

@

@

+VDDPL_11_DAC

0.1U_0402_16V7K

0.1U_0402_16V7K

C202

C202

1

1

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C215

C215

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K

C230

0.1U_0402_16V7K

C230

0.1U_0402_16V7K

1

2

C238

1U_0402_6.3V6K

C238

1U_0402_6.3V6K

1

2

0.1U_0402_16V7K

C179

C179

1

2

+VDDAN_11_ML

0.1U_0402_16V7K

0.1U_0402_16V7K

C216

C216

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

C231

0.1U_0402_16V7K

C231

0.1U_0402_16V7K

1

2

C239

C239

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K

+FCH_VDDAN_33_DAC
+VDDPL_33_SSUSB_S

1 2

C194 2.2U_0603_6.3V4Z

C194 2.2U_0603_6.3V4Z

C201

C201

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

1 2

+VDDAN_33_USB

C214

C214

1

2

+VDDAN_11_USB_S+VDDAN_11_USB_S

+VDDCR_11V_USB

C225

C225

1

2

+VDDAN_11_SSUSB

1U_0402_6.3V6K

1U_0402_6.3V6K

+VDDCR_11_SSUSB

10U_0603_6.3V6M

10U_0603_6.3V6M

U2C

U2C

HUDSON-2

102mA

AB17

VDDIO_33_PCIGP_1

AB18

VDDIO_33_PCIGP_2

AE9

VDDIO_33_PCIGP_3

AD10

VDDIO_33_PCIGP_4

AG7

VDDIO_33_PCIGP_5

AC13

VDDIO_33_PCIGP_6

AB12

VDDIO_33_PCIGP_7

AB13

VDDIO_33_PCIGP_8

AB14

VDDIO_33_PCIGP_9

AB16

VDDIO_33_PCIGP_10

47mA

H24

VDDPL_33_SYS

20mA

V22

VDDPL_33_DAC

12mA

U22

VDDPL_33_ML

30mA

T22

VDDAN_33_DAC

11mA

L18

VDDPL_33_SSUSB_S

14mA

D7

VDDPL_33_USB_S

11mA

AH29

VDDPL_33_PCIE

12mA

AG28

VDDPL_33_SATA

M31

LDO_CAP

7mA

V21

VDDPL_11_DAC

226mA

Y22

VDDAN_11_ML_1

V23

VDDAN_11_ML_2

V24

VDDAN_11_ML_3

V25

VDDAN_11_ML_4

AB10

VDDIO_33_GBE_S

AB11

VDDCR_11_GBE_S_1

AA11

VDDCR_11_GBE_S_2

AA9

VDDIO_GBE_S_1

AA10

VDDIO_GBE_S_2

470mA

G7

VDDAN_33_USB_S_1

H8

0.1U_0402_16V7K

0.1U_0402_16V7K

VDDAN_33_USB_S_2

J8

VDDAN_33_USB_S_3

K8

VDDAN_33_USB_S_4

K9

VDDAN_33_USB_S_5

M9

VDDAN_33_USB_S_6

M10

VDDAN_33_USB_S_7

N9

VDDAN_33_USB_S_8

N10

VDDAN_33_USB_S_9

M12

VDDAN_33_USB_S_10

N12

VDDAN_33_USB_S_11

M11

VDDAN_33_USB_S_12

140mA

U12

VDDAN_11_USB_S_1

U13

VDDAN_11_USB_S_2

42mA

T12

VDDCR_11_USB_S_1

T13

VDDCR_11_USB_S_2

282mA

P16

VDDAN_11_SSUSB_S_1

M14

VDDAN_11_SSUSB_S_2

N14

VDDAN_11_SSUSB_S_3

P13

VDDAN_11_SSUSB_S_4

P14

VDDAN_11_SSUSB_S_5

424mA

N16

VDDCR_11_SSUSB_S_1

N17

VDDCR_11_SSUSB_S_2

P17

VDDCR_11_SSUSB_S_3

M17

VDDCR_11_SSUSB_S_4

21807-A13-HUDSON-M3_FCBGA656

21807-A13-HUDSON-M3_FCBGA656

0.1U_0402_16V7K

0.1U_0402_16V7K

C240

0.1U_0402_16V7K

C240

0.1U_0402_16V7K

1

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HUDSON-2

PCI/GPIO I/O

PCI/GPIO I/O

USB SS USB MAIN LINKGBE LAN

USB SS USB MAIN LINKGBE LAN

POWER

POWER

C

VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8

CORE S0

CORE S0

VDDCR_11_9

VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6

CLKGEN I/OPCI EXPRESSSERIAL ATA3.3V_S5 I/O

CLKGEN I/OPCI EXPRESSSERIAL ATA3.3V_S5 I/O

VDDAN_11_CLK_7
VDDAN_11_CLK_8

VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8

VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7
VDDAN_11_SATA_8
VDDAN_11_SATA_9

VDDAN_11_SATA_10

VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8

VDDXL_33_S

VDDCR_11_S_1
VDDCR_11_S_2

VDDPL_11_SYS_S

VDDAN_33_HWM_S

VDDIO_AZ_S

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

1007mA

C183

C183

T14
T17

1
T20
U16
U18

2
V14

V17
V20
Y17

340mA

H26
J25

C189

C189

K24
L22

1
M22
N21
N22

2
P22

1088mA

AB24
Y21
AE25

C195

C195

AD24
AB23

1
AA22
AF26
AG27

2

1337mA

AA21
Y20
AB21

C203

C203

AB22
AC22

1
AC21
AA20
AA18

2
AB20

AC19

59mA

N18
L19

C207

C207

M18
V12

1
V13
Y12
Y13

2
W11

5mA

G24

C217

C217

1

2

187mA

N20
M20

C221

C221

1

2

70mA

J24

C226

C226

1

2

12mA

M8

C232

1

@

2

26mA

AA4

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

+VCC_VDDCR_11

0.1U_0402_16V7K

0.1U_0402_16V7K

C184

C184

1

2

+1.1VS_CKVDD

C190

C190

0.1U_0402_16V7K

0.1U_0402_16V7K

1

2

+VDDAN_11_PCIE

C196

C196

0.1U_0402_16V7K

0.1U_0402_16V7K

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K

C204

C204

1

2

+VDDIO_33_S

1U_0402_6.3V6K

1U_0402_6.3V6K

C208

C208

1

2

+VDDXL_3.3V

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

+VDDCR_1.1V

C222

C222

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

+VDDPL_11_SYS_S

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

C228

C228

1

2

+VDDAN_33_HWM

C233

2.2U_0402_6.3V6M@C232

2.2U_0402_6.3V6M

1

@

2

0.1U_0402_16V7K

0.1U_0402_16V7K

C185

C185

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K

C191

C191

1

2

C197

C197

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

C205

C205

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C209

C209

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K@C233

0.1U_0402_16V7K

+VDDIO_AZ

C236 2.2U_0402_6.3V6MC236 2.2U_0402_6.3V6M

D

1U_0402_6.3V6K

1U_0402_6.3V6K

C186

C186

1

2

+1.1VS_CKVDD

C192

C192

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

+VDDAN_11_PCIE

22U_0603_6.3V6M

22U_0603_6.3V6M

+AVDD_SATA

C206

C206

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

1 2

C177

C177

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C193

C193

1

2

22U_0603_6.3V6M

22U_0603_6.3V6M

R195 0_0402_5%R195 0_0402_5%

R198 0_0402_5%R198 0_0402_5%

R200 0_0402_5%R200 0_0402_5%

1 2

R184 0_0805_5%R184 0_0805_5%

10U_0603_6.3V6M

10U_0603_6.3V6M

42ohm @ 100MHz

1 2

R187 0_0603_5%R187 0_0603_5%

22U_0603_6.3V6M

22U_0603_6.3V6M

42ohm @ 100MHz

1 2

R191 0_0805_5%R191 0_0805_5%

42ohm @ 100MHz

1 2

R194 0_0805_5%R194 0_0805_5%

1 2

L9

L9

1 2

MBK1608221YZF_2P

MBK1608221YZF_2P

220 ohm

1 2

R197 0_0603_5%R197 0_0603_5%

L14

L14

1 2

MBK1608221YZF_2P

MBK1608221YZF_2P

220 ohm

1 2

1 2

+1.1VS

+1.1VS

+1.1VS

+1.1VS

+3VALW

+3VALW

+VDDXL_3.3V
Tie to +3.3V_S5 rail if USB3 Wake
is supported; otherwise, tie to
+3.3V_S0 rail.
Hudson-2 designs: Tie to +3.3V_S0
rail.

+1.1VALW

+1.1VALW

+3VALW

AMD reply:
VDDAN_33_HWM_S: Please connect
it to +3.3V_S5 directly if HWM is not used.

+3VS

VDDIO_AZ_S should be tied to
+3.3/1.5V_S5 rail if Wake on Ring
is supported

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

FCH PWR

FCH PWR

FCH PWR

LA8611P

LA8611P

LA8611P

15 51Friday, November 04, 2011

15 51Friday, November 04, 2011

15 51Friday, November 04, 2011

E

of

of

of

0.1

0.1

0.1

5

4

3

2

1

U2E

U2E

HUDSON-2

A3

A33

B7

B13

D D

C C

B B

D13
E12

E16
E29

F11
F13
F16
F17
F19
F23
F25
F29

G16
G32

H12
H15
H29

K16
K27
K28

L12
L13
L15
L16

L21
M13
M16
M21
M25

N11

N13

N23

N24

P12

P18

P20

P21

P31

P33

R11

R25

R28

T11

T16

T18

K25

H25

D9
E5

F7
F9

G6

J6

J9
J10
J13
J28
J32

K7

L6

N6

R4

N8

HUDSON-2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSAN_HWM
VSSXL
VSSPL_SYS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GROUND

GROUND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSPL_DAC

VSSAN_DAC

VSSANQ_DAC

VSSIO_DAC

EFUSE

T25
T27
U6
U14
U17
U20
U21
U30
U32
V11
V16
V18
W4
W6
W25
W28
Y14
Y16
Y18
AA6
AA12
AA13
AA14
AA16
AA17
AA25
AA28
AA30
AA32
AB25
AC6
AC18
AC28
AD27
AE6
AE15
AE21
AE28
AF8
AF12
AF16
AF33
AG30
AG32
AH5
AH11
AH18
AH19
AH21
AH23
AH25
AH27
AJ18
AJ28
AJ29
AK21
AK25
AL18
AM21
AM25
AN1
AN18
AN28
AN33

T21
L28
K33
N28

R6

STRAP PINS

PCI_CLK1

ALLOW

PULL

PCIE GEN2

HIGH

DEFAULT

FORCE

PULL

PCIE GEN1

LOW

PCI_CLK1<12>
PCI_CLK3<12>
PCI_CLK4<12>
CLK_PCI_EC<12,33>
LPC_CLK1<12>
EC_PWM2<14>
RTC_CLK<12,33>

PCI_CLK3

USE
DEBUG
STRAPS

IGNORE
DEBUG
STRAP

DEFAULT

12

12

@

@

PCI_CLK4

NON_FUSION
CLOCK MODE

FUSION
CLOCK
MODE

DEFAULT

R202 10K_0402_5%R202 10K_0402_5%

12

@

@

R214 10K_0402_5%

R214 10K_0402_5%

12

R203 10K_0402_5%

R203 10K_0402_5%

12

@

@

R215 10K_0402_5%R215 10K_0402_5%

12

CLK_PCI_EC

EC
ENABLED

EC
DISABLED

DEFAULT

R205 10K_0402_5%

R205 10K_0402_5%

R204 10K_0402_5%

R204 10K_0402_5%

12

@

@

R217 10K_0402_5%R217 10K_0402_5%

R216 10K_0402_5%R216 10K_0402_5%

12

12

12

@

@

LPC_CLK1

CLKGEN
ENABLED

DEFAULT

CLKGEN
DISABLE

R206 10K_0402_5%R206 10K_0402_5%

12

@

@

R218 10K_0402_5%

R218 10K_0402_5%

12

EC_PWM2

LPC ROM

SPI ROM

DEFAULT

+3VALW+3VALW+3VALW+3VALW+3VS+3VS+3VS

R207 10K_0402_5%

R207 10K_0402_5%

12

R219 2.2K_0402_5%R219 2.2K_0402_5%

12

@

@

R208 10K_0402_5%R208 10K_0402_5%

R220 2.2K_0402_5%

R220 2.2K_0402_5%

RTC_CLK

S5 PLUS
MODE
DISABLED

DEFAULT

S5 PLUS
MODE
ENABLED

DEBUG STRAPS

FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]

PCI_AD27 PCI_AD26

@

@

R209 2.2K_0402_5%

R209 2.2K_0402_5%

12

DISABLE
ILA
AUTORUN

DEFAULT

ENABLE
ILA
AUTORUN

PULL
HIGH

PULL
LOW

PCI_AD27<12>
PCI_AD26<12>
PCI_AD25<12>
PCI_AD24<12>
PCI_AD23<12>

USE PCI
PLL

DEFAULT

BYPASS
PCI PLL

PCI_AD25 PCI_AD24

USE FC
PLL

BYPASS
FC PLL

R210 2.2K_0402_5%

R210 2.2K_0402_5%

12

@

@

@

@

USE DEFAULT
PCIE STRAPS

DEFAULT

USE EEPROM
PCIE STRAPS

R211 2.2K_0402_5%

R211 2.2K_0402_5%

12

@

@

R212 2.2K_0402_5%

R212 2.2K_0402_5%

12

PCI_AD23

DISABLE PCI
MEM BOOT

DEFAULTDEFAULT

ENABLE PCI
MEM BOOT

R213 2.2K_0402_5%

R213 2.2K_0402_5%

12

@

@

21807-A13-HUDSON-M3_FCBGA656

A A

21807-A13-HUDSON-M3_FCBGA656

5

Security Classification

Security Classification

Security Classification

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

FCH-VSS/Strap

FCH-VSS/Strap

FCH-VSS/Strap

LA8611P

LA8611P

LA8611P

16 51Friday, November 04, 2011

16 51Friday, November 04, 2011

16 51Friday, November 04, 2011

1

0.1

0.1

0.1

of

of

of

5

PCIE_CTX_GRX_P[15..0]<5>
PCIE_CTX_GRX_N[15..0]<5>

D D

C C

B B

CLK_PCIE_VGA<12>
CLK_PCIE_VGA#<12>

VGA_PWRGD<14,19,46>

A A

PCIE_CTX_GRX_P[15..0]
PCIE_CTX_GRX_N[15..0]

PCIE_CTX_GRX_P0
PCIE_CTX_GRX_N0

PCIE_CTX_GRX_P1
PCIE_CTX_GRX_N1

PCIE_CTX_GRX_P2
PCIE_CTX_GRX_N2

PCIE_CTX_GRX_P3
PCIE_CTX_GRX_N3

PCIE_CTX_GRX_P4
PCIE_CTX_GRX_N4

PCIE_CTX_GRX_P5
PCIE_CTX_GRX_N5

PCIE_CTX_GRX_P6
PCIE_CTX_GRX_N6

PCIE_CTX_GRX_P7
PCIE_CTX_GRX_N7

PCIE_CTX_GRX_P8
PCIE_CTX_GRX_N8

PCIE_CTX_GRX_P9
PCIE_CTX_GRX_N9

PCIE_CTX_GRX_P10
PCIE_CTX_GRX_N10

PCIE_CTX_GRX_P11
PCIE_CTX_GRX_N11

PCIE_CTX_GRX_P12
PCIE_CTX_GRX_N12

PCIE_CTX_GRX_P13
PCIE_CTX_GRX_N13

PCIE_CTX_GRX_P14
PCIE_CTX_GRX_N14

PCIE_CTX_GRX_P15
PCIE_CTX_GRX_N15

CLK_PCIE_VGA
CLK_PCIE_VGA#

R222 0_0402_5%

R222 0_0402_5%

@

@

R224

PX@R224

PX@

10K_0402_5%

10K_0402_5%

GPU_RST#

5

12

12

12

PX@

PX@

R226

R226
100K_0402_5%

100K_0402_5%

AA38

Y37

Y35

W36

W38

V37

V35
U36

U38
T37

T35
R36

R38
P37

P35
N36

N38
M37

M35

L36

L38
K37

K35

H37

H35
G36

G38
F37

F35
E37

AB35
AA36

AH16

AA30

J36

J38

U6A

PX@

U6A

PX@

PCIE_RX0P
PCIE_RX0N

PCIE_RX1P
PCIE_RX1N

PCIE_RX2P
PCIE_RX2N

PCIE_RX3P
PCIE_RX3N

PCIE_RX4P
PCIE_RX4N

PCIE_RX5P
PCIE_RX5N

PCIE_RX6P
PCIE_RX6N

PCIE_RX7P
PCIE_RX7N

PCIE_RX8P
PCIE_RX8N

PCIE_RX9P
PCIE_RX9N

PCIE_RX10P
PCIE_RX10N

PCIE_RX11P
PCIE_RX11N

PCIE_RX12P
PCIE_RX12N

PCIE_RX13P
PCIE_RX13N

PCIE_RX14P
PCIE_RX14N

PCIE_RX15P
PCIE_RX15N

CLOCK

CLOCK

PCIE_REFCLKP
PCIE_REFCLKN

PWRGOOD

PERSTB

Seymour M2

Seymour M2

4

PCIE_CRX_GTX_P[15..0]
PCIE_CRX_GTX_N[15..0]

PCIE_CRX_C_GTX_P0

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P

PCI EXPRESS INTERFACE

PCI EXPRESS INTERFACE

PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

CALIBRATION

CALIBRATION

PCIE_CALRP
PCIE_CALRN

4

Y33

PCIE_CRX_C_GTX_N0

Y32

PCIE_CRX_C_GTX_P1

W33

PCIE_CRX_C_GTX_N1 PCIE_CRX_GTX_N1

W32

PCIE_CRX_C_GTX_P2

U33

PCIE_CRX_C_GTX_N2

U32

PCIE_CRX_C_GTX_P3

U30

PCIE_CRX_C_GTX_N3 PCIE_CRX_GTX_N3

U29

PCIE_CRX_C_GTX_P4

T33

PCIE_CRX_C_GTX_N4 PCIE_CRX_GTX_N4

T32

PCIE_CRX_C_GTX_P5

T30

PCIE_CRX_C_GTX_N5 PCIE_CRX_GTX_N5

T29

PCIE_CRX_C_GTX_P6

P33

PCIE_CRX_C_GTX_N6

P32

PCIE_CRX_C_GTX_P7

P30

PCIE_CRX_C_GTX_N7 PCIE_CRX_GTX_N7

P29

PCIE_CRX_C_GTX_P8

N33

PCIE_CRX_C_GTX_N8 PCIE_CRX_GTX_N8

N32

PCIE_CRX_C_GTX_P9

N30

PCIE_CRX_C_GTX_N9 PCIE_CRX_GTX_N9

N29

PCIE_CRX_C_GTX_P10

L33

PCIE_CRX_C_GTX_N10 PCIE_CRX_GTX_N10

L32

PCIE_CRX_C_GTX_P11

L30

PCIE_CRX_C_GTX_N11 PCIE_CRX_GTX_N11

L29

PCIE_CRX_C_GTX_P12

K33

PCIE_CRX_C_GTX_N12 PCIE_CRX_GTX_N12

K32

PCIE_CRX_C_GTX_P13

J33

PCIE_CRX_C_GTX_N13 PCIE_CRX_GTX_N13

J32

PCIE_CRX_C_GTX_P14

K30

PCIE_CRX_C_GTX_N14

K29

PCIE_CRX_C_GTX_P15

H33

PCIE_CRX_C_GTX_N15 PCIE_CRX_GTX_N15

H32

Issued Date

Issued Date

Issued Date

1 2
1 2

Y30
Y29

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCIE_CRX_GTX_P[15..0] <5>
PCIE_CRX_GTX_N[15..0] <5>

R2231.27K_0402_1% PX@ R2231.27K_0402_1% PX@
R2252K_0402_1% PX@ R2252K_0402_1% PX@

+1.0VGS

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

3

3

C2410.1U_0402_16V7K PX@C2410.1U_0402_16V7K PX@

12

C2420.1U_0402_16V7K PX@C2420.1U_0402_16V7K PX@

12

PX@

PX@

C2430.1U_0402_16V7K

C2430.1U_0402_16V7K

12

C2440.1U_0402_16V7K PX@C2440.1U_0402_16V7K PX@

12

PX@

PX@

C2450.1U_0402_16V7K

C2450.1U_0402_16V7K

12

C2460.1U_0402_16V7K PX@C2460.1U_0402_16V7K PX@

12

PX@

PX@

C2470.1U_0402_16V7K

C2470.1U_0402_16V7K

12

C2480.1U_0402_16V7K PX@C2480.1U_0402_16V7K PX@

12

PX@

PX@

C2500.1U_0402_16V7K

C2500.1U_0402_16V7K

12

C2510.1U_0402_16V7K PX@C2510.1U_0402_16V7K PX@

12

PX@

PX@

C2490.1U_0402_16V7K

C2490.1U_0402_16V7K

12

C2520.1U_0402_16V7K PX@C2520.1U_0402_16V7K PX@

12

PX@

PX@

C2530.1U_0402_16V7K

C2530.1U_0402_16V7K

12

C2540.1U_0402_16V7K PX@C2540.1U_0402_16V7K PX@

12

PX@

PX@

C2550.1U_0402_16V7K

C2550.1U_0402_16V7K

12

C2560.1U_0402_16V7K PX@C2560.1U_0402_16V7K PX@

12

PX@

PX@

C2570.1U_0402_16V7K

C2570.1U_0402_16V7K

12

C2580.1U_0402_16V7K PX@C2580.1U_0402_16V7K PX@

12

PX@

PX@

C2590.1U_0402_16V7K

C2590.1U_0402_16V7K

12

C2600.1U_0402_16V7K PX@C2600.1U_0402_16V7K PX@

12

PX@

PX@

C2610.1U_0402_16V7K

C2610.1U_0402_16V7K

12

C2620.1U_0402_16V7K PX@C2620.1U_0402_16V7K PX@

12

PX@

PX@

C2630.1U_0402_16V7K

C2630.1U_0402_16V7K

12

C2640.1U_0402_16V7K PX@C2640.1U_0402_16V7K PX@

12

PX@

PX@

C2650.1U_0402_16V7K

C2650.1U_0402_16V7K

12

C2660.1U_0402_16V7K PX@C2660.1U_0402_16V7K PX@

12

PX@

PX@

C2670.1U_0402_16V7K

C2670.1U_0402_16V7K

12

C2680.1U_0402_16V7K PX@C2680.1U_0402_16V7K PX@

12

PX@

PX@

C2690.1U_0402_16V7K

C2690.1U_0402_16V7K

12

C2700.1U_0402_16V7K PX@C2700.1U_0402_16V7K PX@

12

PX@

PX@

C2710.1U_0402_16V7K

C2710.1U_0402_16V7K

12

C2720.1U_0402_16V7K PX@C2720.1U_0402_16V7K PX@

12

Compal Secret Data

Compal Secret Data

Compal Secret Data

PCIE_CRX_GTX_P0
PCIE_CRX_GTX_N0

PCIE_CRX_GTX_P1

PCIE_CRX_GTX_P2
PCIE_CRX_GTX_N2

PCIE_CRX_GTX_P3

PCIE_CRX_GTX_P4

PCIE_CRX_GTX_P5

PCIE_CRX_GTX_P6
PCIE_CRX_GTX_N6

PCIE_CRX_GTX_P7

PCIE_CRX_GTX_P8

PCIE_CRX_GTX_P9

PCIE_CRX_GTX_P10

PCIE_CRX_GTX_P11

PCIE_CRX_GTX_P12

PCIE_CRX_GTX_P13

PCIE_CRX_GTX_P14
PCIE_CRX_GTX_N14

PCIE_CRX_GTX_P15

Deciphered Date

Deciphered Date

Deciphered Date

2

1

LVDS Interface

U6G

PX@

U6G

PX@

LVDS CONTROL

LVDS CONTROL

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P

TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P

TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P

TXOUT_U2N_DPF0N

TXOUT_U3P
TXOUT_U3N

LVTMDP

LVTMDP

TXCLK_LP_DPE3P

TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N

TXOUT_L3P
TXOUT_L3N

Seymour M2

Seymour M2

R221 0_0402_5%@R221 0_0402_5%@

PXS_RST#<14>

APU_PCIE_RST#<12,28,32>

2

2
1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

12

+3VGS

5

U7

U7

P

B

4

Y

A

G

PX@

PX@

3

MC74VHC1G08DFT2G SC70 5P

MC74VHC1G08DFT2G SC70 5P

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ATI_SeymourXT_M2_PCIE/LVDS

ATI_SeymourXT_M2_PCIE/LVDS

ATI_SeymourXT_M2_PCIE/LVDS

GPU_RST#

LA8611P

LA8611P

LA8611P

1

VARY_BL

DIGON

17 51Friday, November 04, 2011

17 51Friday, November 04, 2011

17 51Friday, November 04, 2011

of

of

of

AK27
AJ27

AK35
AL36

AJ38
AK37

AH35
AJ36

AG38
AH37

AF35
AG36

AP34
AR34

AW37
AU35

AR37
AU39

AP35
AR35

AN36
AP37

0.1

0.1

0.1

5

D D

VRAM_ID0<22>
VRAM_ID1<22>

+3VGS

C C

+3VGS

B B

+1.8VGS

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

+1.0VGS

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

A A

STRAPS

L18

PX@L18

PX@

12

L19

PX@L19

PX@

12

27MHZ_16PF_X5H027000FG1H

27MHZ_16PF_X5H027000FG1H

C291

PX@ C291

PX@

18P_0402_50V8J

18P_0402_50V8J

1 2
1 2
1 2

1 2

1 2
1 2

1 2
1 2
1 2

1 2
1 2
1 2

1 2

75mA

1

C280

2
PX@ C280

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

125mA

1

C284

2
PX@ C284

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

R254

R254

PX@

PX@

1M_0402_5%

1M_0402_5%

Y2

PX@Y2

PX@

2 1

R22910K_0402_5% @ R22910K_0402_5% @
R23010K_0402_5% PX@ R23010K_0402_5% PX@
R23110K_0402_5% PX@ R23110K_0402_5% PX@

R23210K_0402_5% @ R23210K_0402_5% @

R23410K_0402_5% @ R23410K_0402_5% @
R23610K_0402_5% @ R23610K_0402_5% @

R23710K_0402_5% PX@ R23710K_0402_5% PX@
R23910K_0402_5% @ R23910K_0402_5% @
R24010K_0402_5% @ R24010K_0402_5% @

R24210K_0402_5% @ R24210K_0402_5% @
R24310K_0402_5% @ R24310K_0402_5% @
R24410K_0402_5% @ R24410K_0402_5% @

R24510K_0402_5% @ R24510K_0402_5% @

1

C281

2
PX@ C281

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C285

2
PX@ C285

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

XTALINXTALOUT

C292

18P_0402_50V8J

18P_0402_50V8J

5

GPU_GPIO0
GPU_GPIO1
GPU_GPIO2

GPU_GPIO5

GPU_GPIO8
GPU_GPIO9

GPU_GPIO11
GPU_GPIO12
GPU_GPIO13

GPIO24_TRSTB

GPIO25_TDI
GPIO27_TMS

GPIO26_TCK

+DPLL_PVDD

1

C282

2
PX@ C282

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

+DPLL_VDDC

1

C287

2
PX@ C287

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

PX@C292

PX@

ACIN<33,41>

XTALIN
Voltage Swing: 1.8 V

+1.8VGS

+1.8VGS

PX@

PX@

1 2

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

VRAM_ID2<22>

RB751V_SOD323

RB751V_SOD323
D2

@D2

@

GPU_VID0<46>

R241 10K_0402_5%@R241 10K_0402_5%@

1 2

GPU_VID1<46>

PEG_CLKREQ#<14>

PX@

PX@

R248 499_0402_1%

R248 499_0402_1%

12

PX@

PX@

R249 249_0402_1%

R249 249_0402_1%

12

12

C279 0.1U_0402_16V7K

C279 0.1U_0402_16V7K

PX@

PX@

(1.8V@20mA TSVDD)

L20

L20

21

T49T49

T50T50

T51T51

T52T52

1

C288

2

10U_0603_6.3V6M

10U_0603_6.3V6M

PX@ C288

PX@

4

GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
VGA_SMB_DA2
VGA_SMB_CK2
GPU_GPIO5
GPU_GPIO_6

R02

GPU_GPIO8
GPU_GPIO9

GPU_GPIO11
GPU_GPIO12
GPU_GPIO13

GPU_VID0
GPIO_16

GPU_VID1
GPIO21_BBEN

PEG_CLKREQ#
GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO

0.60 V level, Please
VREFG Divider ans
cap close to ASIC

+VREFG_GPU

+VREFG_GPU

+DPLL_PVDD

+DPLL_VDDC

XTALIN
XTALOUT

+TSVDD

1

1

C290

C289

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

PX@ C290

PX@

PX@ C289

PX@

4

U6B

U6B

AR8

DVPCNTL_MVP_0

AU8

DVPCNTL_MVP_1

AP8

DVPCNTL_0

AW8

DVPCNTL_1

AR3

DVPCNTL_2

AR1

DVPCLK

AU1

DVPDATA_0

AU3

DVPDATA_1

AW3

DVPDATA_2

AP6

DVPDATA_3

AW5

DVPDATA_4

AU5

DVPDATA_5

AR6

DVPDATA_6

AW6

DVPDATA_7

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13

AR10

DVPDATA_14

AW10

DVPDATA_15

AU10

DVPDATA_16

AP10

DVPDATA_17

AV11

DVPDATA_18

AT11

DVPDATA_19

AR12

DVPDATA_20

AW12

DVPDATA_21

AU12

DVPDATA_22

AP12

DVPDATA_23

AJ21

SWAPLOCKA

AK21

SWAPLOCKB

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH23

GPIO_3_SMBDATA

AJ23

GPIO_4_SMBCLK

AH17

GPIO_5_AC_BATT

AJ17

GPIO_6

AK17

GPIO_7_BLON

AJ13

GPIO_8_ROMSO

AH15

GPIO_9_ROMSI

AJ16

GPIO_10_ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14_HPD2

AM13

GPIO_15_PWRCNTL_0

AK14

GPIO_16

AG30

GPIO_17_THERMAL_INT

AN14

GPIO_18_HPD3

AM17

GPIO_19_CTF

AL13

GPIO_20_PWRCNTL_1

AJ14

GPIO_21_BB_EN

AK13

GPIO_22_ROMCSB

AN13

GPIO_23_CLKREQB

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE_HPD4

AH26

GENERICF_HPD5

AH24

GENERICG_HPD6

AK24

HPD1

AH13

VREFG

AM32

DPLL_PVDD

AN32

DPLL_PVSS

AN31

DPLL_VDDC

AV33

XTALIN

AU34

XTALOUT

AW34

XO_IN

AW35

XO_IN2

AF29

DPLUS

AG29

DMINUS

AK32

TS_FDO

AL31

TS_A/NC

AJ32

TSVDD

AJ33

TSVSS

Seymour M2 PX@

Seymour M2 PX@

MUTI GFX

MUTI GFX

I2C

I2C

PLL/CLOCK

PLL/CLOCK

THERMAL

THERMAL

TXCAP_DPA3P

TXCAM_DPA3N

TX0P_DPA2P

TX0M_DPA2N

DPA

DPA

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P

TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

DPB

DPB

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

TXCCP_DPC3P

TXCCM_DPC3N

TX0P_DPC2P

TX0M_DPC2N

DPC

DPC

TX1P_DPC1P

TX1M_DPC1N

TX2P_DPC0P

TX2M_DPC0N

TXCDP_DPD3P

TXCDM_DPD3N

TX3P_DPD2P

TX3M_DPD2N

DPD

DPD

TX4P_DPD1P

TX4M_DPD1N

TX5P_DPD0P

TX5M_DPD0N

DAC1

DAC1

HSYNC
VSYNC

RSET

AVDD

AVSSQ

VDD1DI
VSS1DI

R2/NC

R2B/NC

G2/NC

G2B/NC

B2/NC

B2B/NC

C/NC
Y/NC

COMP/NC

DAC2

DAC2

H2SYNC/GENLK_CLK

V2SYNC/GENLK_VSYNC

VDD2DI/NC

VSS2DI/NC

A2VDD/NC

A2VDDQ/NC

A2VSSQ/TSVSSQ

R2SET/NC

DDC/AUX

DDC/AUX

DDC1CLK

DDC1DATA

AUX1P

AUX1N

DDC2CLK

DDC2DATA

AUX2P

AUX2N

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

DDCCLK_AUX7P

DDCDATA_AUX7N

3

AU24
AV23

AT25
AR24

AU26
AV25

AT27
AR26

AR30
AT29

AV31
AU30

AR32
AT31

AT33
AU32

AU14
AV13

AT15
AR14

AU16
AV15

AT17
AR16

AU20
AT19

AT21
AR20

AU22
AV21

AT23
AR22

AD39

R

AD37

RB

AE36

G

AD35

GB

AF37

B

AE38

BB

AC36
AC38

AB34
AD34

AE34
AC33

AC34

AC30
AC31

AD30
AD31

AF30
AF31

AC32
AD32
AF32

AD29
AC29

AG31
AG32

AG33
AD33
AF33

AA29

AM26
AN26

AM27
AL27

AM19
AL19

AN20
AM20

AL30
AM30

AL29
AM29

AN21
AM21

AJ30
AJ31

AK30
AK29

VGA_HSYNC
VGA_VSYNC

R238 499_0402_1%PX@R238 499_0402_1%PX@

1 2

+AVDD

+VDD1DI

GENLK_CLK
GENLK_VSYNC

0.1U_0402_16V7K

0.1U_0402_16V7K

(1.8V@65mA AVDD)

(1.8V@100mA VDD1DI)

1

1

C277

C276

2

2

PX@ C277

PX@

PX@ C276

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

3

Reserve as AMD request

VGA_HSYNC
VGA_VSYNC

1 2

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

1

C278

2

PX@ C278

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

T53T53
T54T54

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.8VGS

L17

PX@L17

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

1 2
1 2

1

C274

2
PX@ C274

PX@

R89210K_0402_5% @ R89210K_0402_5% @
R89310K_0402_5% @ R89310K_0402_5% @

1

1

C275

C273

2

2
PX@ C273

PX@

PX@ C275

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

Compal Secret Data

Compal Secret Data

Compal Secret Data

+3VGS

1 2

L16

L16

PX@

PX@

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

Deciphered Date

Deciphered Date

Deciphered Date

2

CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE
GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

STRAPS

GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB

GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS

RSVD

RSVD

RSVD

BIOS_ROM_EN

VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS

RSVD

RSVD

AMD RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL
RESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" AND
NOT CONFLICT DURING RESET

GPIO21 GPIO2

GPIO2

GPIO8

GPIO9 VGA ENABLEDBIF_VGA DIS

GPIO21

GPIO_22_ROMCSB

GPIO[13:11]ROMIDCFG(2:0)

H2SYNC

GENERICC

HSYNCAUD[1]
VSYNCAUD[0]

H2SYNC GENERICC

TX_PWRS_ENB

+1.8VGS

2

10K_0402_5%

10K_0402_5%

VGA_SMB_CK2

VGA_SMB_DA2

TX_DEEMPH_EN

+3VGS

PX@

PX@

R246

R246

DESCRIPTION OF DEFAULT SETTINGSPIN

Advertises PCIE speed
when compliance test

RESERVED

RESERVED

ENABLE EXTERNAL BIOS ROM

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

AUD[1] AUD[0]
0 0 No audio function
0 1 Audio for DisplayPort and HDMI if dongle is detected
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI

GPIO8

Transmitter Power Saving Enable

GPIO0

0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)

PCI Express Transmitter De-emphasis Enable
0: Tx de-emphasis diabled for mobile mode

GPIO1

1: Tx de-emphasis enabled (Defailt setting for desktop)

Internal VGA Thermal Sensor

12

12

+3VGS

PX@

PX@

R247

R247
10K_0402_5%

10K_0402_5%

2

61

5

Q17A

PX@ Q17A

PX@

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

3

4

Q17B

PX@ Q17B

PX@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ATI_SeymourXT_M2_Main_MSIC

ATI_SeymourXT_M2_Main_MSIC

ATI_SeymourXT_M2_Main_MSIC

1

RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE

RECOMMENDED

0: 50% swing
1: Full swing

0: disable
1: enable

0: 2.5GT/s
1: 5GT/s

0: disable
1: enable

LA8611P

LA8611P

LA8611P

1

SETTINGS

X

X

0

0

0

0

X

XXX

0

0

0

11

EC_SMB_CK2 <24,32,33>

EC_SMB_DA2 <24,32,33>

of

of

of

18 51Friday, November 04, 2011

18 51Friday, November 04, 2011

18 51Friday, November 04, 2011

0.1

0.1

0.1

5

4

3

2

1

+3VGS

10K_0402_5%

10K_0402_5%

PXS_PWREN#

OUT

GND

PX4@

PX4@

R257

R257

5

12

34

PX4@

PX4@

Q68B

Q68B
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

1

5

2

P

B

1

A

G

3

PX_MODE <46>

C293

@ C293

@

2

0.1U_0402_16V7K

0.1U_0402_16V7K
U9

U9

PX4@

PX4@
4

Y

R263

R263

100K_0402_5%

100K_0402_5%

@

@

Q26

Q26

2

IN

+3VALW

@

@

12

1

3

+3VGS

2
1

VGA_PWRGD<14,17,46>

C296

@C296

@

0.1U_0402_16V7K

0.1U_0402_16V7K

1 2

U10

U10

5

P

B
A

PX_MODE

4

Y

G

PX4@

PX4@

3

MC74VHC1G08DFT2G SC70 5P

MC74VHC1G08DFT2G SC70 5P

1 2

R262

R262

0_0402_5%

0_0402_5%

PX5@

PX5@

MC74VHC1G08DFT2G SC70 5P

MC74VHC1G08DFT2G SC70 5P

DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

PXS_PWREN<14,43,46>

PX4@

PX4@

R259

R259

1 2

+3VGS

10K_0402_5%

10K_0402_5%

D D

13

D

PX_EN<20>

C C

PXS_PWREN RUNPWROK

1 2

2

G

G

R261

R261

20K_0402_5%

20K_0402_5%

PX@

PX@

R880

R880

0_0402_5%

0_0402_5%

1U_0402_6.3V6K

1U_0402_6.3V6K

@

@

C297

C297

+3VGS

@

@

D

Q24

Q24
2N7002K_SOT23-3

2N7002K_SOT23-3

PX4@

PX4@

S

S

12

1

2

R256

R256

10K_0402_5%

10K_0402_5%

PX4@

PX4@

2

+5VS+5VS

12

6

PX4@

PX4@

Q68A

Q68A
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

1

VDDC_ON#

1.0V_ON#

+3.3VS TO +3.3VGS

+5VALW

PXS_PWRENPXS_PWREN

R270

R270
20K_0402_5%

20K_0402_5%

PX@

PX@

2

+1.0VGS

+VGA_CORE

G

G

1.0V_ON#

VDDC_ON#

13

D

D

2N7002K_SOT23-3

2N7002K_SOT23-3

S

S

Q18

Q18

PX4@

PX4@

AO3414_SOT23-3

AO3414_SOT23-3

S

S

G

G

Q22

Q22

PX4@

PX4@

AO3414_SOT23-3

AO3414_SOT23-3

S

S

G

G

+3VS +3VGS

J2

2 1

2MM

2MM

3 1

AP2301GN-HF_SOT23-3

AP2301GN-HF_SOT23-3

2

R271

R271
20K_0402_5%

20K_0402_5%

PX@

PX@

PX@

PX@

1

C304

C304

0.1U_0603_25V7K

Q30

Q30

PX@

PX@

0.1U_0603_25V7K

2

@J2

@

Q27

Q27

PX@

PX@

D

D

123

D

D

123

Q19

Q19

PX4@

PX4@

AO3414_SOT23-3

AO3414_SOT23-3

D

D

123

Q23

Q23

PX4@

PX4@

AO3414_SOT23-3

AO3414_SOT23-3

D

D

123

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C302

C302

PX@

PX@

2

PXS_PWREN#

S

S

G

G

S

S

G

G

55mA@1.0V, in BACO mode

1U_0603_10V6K

1U_0603_10V6K

12

@

@

1

C303

C303

R268

R268

PX@

PX@

470_0603_5%

470_0603_5%

2

13

D

D

S

S

@

@

1 2

R272

R272

0_0402_5%

0_0402_5%

+BIF_VDDC

1 2

R250 0_0805_5%

R250 0_0805_5%

1

C294

C294
22U_0805_6.3V6MPX@

22U_0805_6.3V6MPX@

2

2

G

G

Q29

Q29
2N7002K_SOT23-3

2N7002K_SOT23-3

@

@

PX5@

PX5@

+VGA_CORE

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C305

C305

PX@

PX@

2

+VSB

PX@

PX@

R275

R275
20K_0402_5%

20K_0402_5%

6

PX@

PX@

Q69A

Q69A

2

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

1

+1.5V

8
7
6
5

R278

R278

PX@

PX@

1 2

150K_0402_5%

150K_0402_5%

2 1

2MM

2MM

U12

PX@U12

PX@

AO4430L_SO8

AO4430L_SO8

1 2

PX@

PX@

R273

R273

100K_0402_5%

100K_0402_5%

5

12

+1.5VS TO +1.5VGS

+3VALW

12

PX_MODE#

34

PX@

PX@

Q69B

Q69B
DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

B B

PX_MODE

R276

PX@ R276

PX@

100K_0402_5%

A A

100K_0402_5%

J9

@J9

@

4

R280

R280
0_0402_5%

0_0402_5%

@

@

+1.5VGS

1
2
3

1

PX@

PX@

C308

C308

0.1U_0603_25V7K

0.1U_0603_25V7K

2

1

PX@

PX@

C306

C306
10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

PX@

PX@

C307

C307
1U_0603_10V6K

1U_0603_10V6K

2

PX_MODE#

12

@

@

R274

R274
470_0603_5%

470_0603_5%

13

D

D

S

S

@

@

R282 0_0402_5%

R282 0_0402_5%

1 2

2

G

G

Q31

@

Q31

@

2N7002K_SOT23-3

2N7002K_SOT23-3

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

ATI_SeymourXT_M2_BACO POWER

ATI_SeymourXT_M2_BACO POWER

ATI_SeymourXT_M2_BACO POWER

LA8611P

LA8611P

LA8611P

1

of

of

of

19 51Friday, November 04, 2011

19 51Friday, November 04, 2011

19 51Friday, November 04, 2011

0.1

0.1

0.1

5

D D

+1.8VGS

R284

R284

1 2

0_0402_5%

0_0402_5%

PX@

PX@

+1.0VGS

1

C318

@ C318

@

2

10U_0603_6.3V6M

10U_0603_6.3V6M

150mA

C321

@ C321

@

10U_0603_6.3V6M

10U_0603_6.3V6M

C324

@ C324

@

10U_0603_6.3V6M

10U_0603_6.3V6M

+DPCD_VDD10

1

C319

@ C319

@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C322

@ C322

@

2

1

C325

@ C325

@

2

R286

R286

1 2

0_0402_5%

+1.8VGS

+1.0VGS

0_0402_5%

PX@

PX@

R289

R289

1 2

0_0402_5%

0_0402_5%

PX@

PX@

R291

R291

1 2

0_0402_5%

0_0402_5%

PX@

PX@

C C

B B

A A

1

C320

@ C320

@

2

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C323

@ C323

@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+DPEF_VDD10

1

C326

@ C326

@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C313

C313

@

@

2

10U_0603_6.3V6M

10U_0603_6.3V6M

+DPCD_VDD10

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K

+DPEF_VDD10

1

2

0.1U_0402_16V7K

0.1U_0402_16V7K

C314

C314

@

@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

@

@

2

C310

C310

0.1U_0402_16V7K

0.1U_0402_16V7K

+DPEF_VDD10

+DPCD_VDD18

1

2

+DPCD_VDD18

+DPCD_VDD10

+DPEF_VDD18

+DPEF_VDD18

+DPEF_VDD10

+DPCD_VDD18

+DPCD_VDD10

+DPEF_VDD18

20mA

20mA

R287150_0402_1% PX@ R287150_0402_1% PX@

12

R292150_0402_1% PX@ R292150_0402_1% PX@

12

AP20
AP21

AP13
AT13

AN17
AP16

AP17
AW14
AW16

AP22

AP23

AP14

AP15

AN19

AP18

AP19
AW20
AW22

AW18

AH34

AM33

AN34

AP39

AR39

AU37

AF34

AG34

AK33

AK34

AF39

AH39

AK39

AM34

AM39

AJ34

AL33

AL34

Seymour M2

Seymour M2

PX@

PX@

4

U6H

U6H

DP C/D POWER

DP C/D POWER

DPCD/DPC_VDD18#1
DPCD/DPC_VDD18#2

DPCD/DPC_VDD10#1
DPCD/DPC_VDD10#2

DP/DPC_VSSR#1
DP/DPC_VSSR#2
DP/DPC_VSSR#3
DP/DPC_VSSR#4
DP/DPC_VSSR#5

DPCD/DPD_VDD18#1
DPCD/DPD_VDD18#2

DPCD/DPD_VDD10#1
DPCD/DPD_VDD10#2

DP/DPD_VSSR#1
DP/DPD_VSSR#2
DP/DPD_VSSR#3
DP/DPD_VSSR#4
DP/DPD_VSSR#5

DPCD_CALR

DP E/F POWER

DP E/F POWER

DPEF/DPE_VDD18#1
DPEF/DPE_VDD18#2

DPEF/DPE_VDD10#1
DPEF/DPE_VDD10#2

DP/DPE_VSSR#1
DP/DPE_VSSR#2
DP/DPE_VSSR#3
DP/DPE_VSSR#4

DPEF/DPF_VDD18#1
DPEF/DPF_VDD18#2

DPEF/DPF_VDD10#1
DPEF/DPF_VDD10#2

DP/DPF_VSSR#1
DP/DPF_VSSR#2
DP/DPF_VSSR#3
DP/DPF_VSSR#4
DP/DPF_VSSR#5

DPEF_CALR

DP A/B POWER

DP A/B POWER

DPAB/DPA_VDD18#1
DPAB/DPA_VDD18#2

DPAB/DPA_VDD10#1
DPAB/DPA_VDD10#2

DP/DPA_VSSR#1
DP/DPA_VSSR#2
DP/DPA_VSSR#3
DP/DPA_VSSR#4
DP/DPA_VSSR#5

DPAB/DPB_VDD18#1
DPAB/DPB_VDD18#2

DPAB/DPB_VDD10#1
DPAB/DPB_VDD10#2

DP/DPB_VSSR#1
DP/DPB_VSSR#2
DP/DPB_VSSR#3
DP/DPB_VSSR#4
DP/DPB_VSSR#5

DPAB_CALR

DP PLL POWER

DP PLL POWER

DPAB_VDD18/DPA_PVDD

DP_VSSR/DPA_PVSS

DPAB_VDD18/DPB_PVDD

DP_VSSR/DPB_PVSS

DPCD_VDD18/DPC_PVDD

DP_VSSR/DPC_PVSS

DPCD_VDD18/DPD_PVDD

DP_VSSR/DPD_PVSS

DPEF_VDD18/DPE_PVDD

DP_VSSR/DPE_PVSS

DPEF_VDD18/DPF_PVDD

DP_VSSR/DPF_PVSS

1.8V@300mA DPAB_VDD18)

+DPAB_VDD18

1

C311

C311

2

@

@

@

@

130mA

AN24
AP24

110mA

AP31
AP32

AN27
AP27
AP28
AW24
AW26

AP25
AP26

AN33
AP33

AN29
AP29
AP30
AW30
AW32

AW28

20mA

AU28
AV27

20mA

AV29
AR28

AU18
AV17

AV19
AR18

AM37
AN38

AL38
AM35

0.1U_0402_16V7K

0.1U_0402_16V7K

(1.0V@220mA DPAB_VDD10)

+DPAB_VDD10

1

C315

C315

@

@

2

0.1U_0402_16V7K

0.1U_0402_16V7K

+DPAB_VDD18

130mA

+DPAB_VDD10

110mA

R288 150_0402_1%PX@R288 150_0402_1%PX@

1 2

+DPAB_VDD18

+DPAB_VDD18

+DPCD_VDD18

+DPCD_VDD18

+DPEF_VDD18

+DPEF_VDD18

1

C312

C312

2

@

@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C316

C316

@

@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

3

+DPAB_VDD18

1

C309

C309

2

+DPAB_VDD10

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C317

C317

@

@

2

10U_0603_6.3V6M

10U_0603_6.3V6M

R283

R283

1 2

0_0402_5%

0_0402_5%

PX@

PX@

R285

R285

1 2

0_0402_5%

0_0402_5%

PX@

PX@

+1.8VGS

+1.0VGS

2

U6F

U6F

AB39

M34
M39

W31
W34

M17
M22
M24

E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34

N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39

Y34
Y39

F15
F17
F19
F21
F23
F25
F27
F29
F31
F33

F7
F9
G2
G6
H9

J2

J27

J6
J8

K14

K7
L11
L17

L2
L22
L24

L6

N16
N18

N2
N21
N23
N26

N6
R15
R17

R2
R20
R22
R24
R27

R6
T11
T13
T16
T18
T21
T23
T26
U15
U17

U2
U20
U22
U24
U27

U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
U13
V13

PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35

GND#100
GND#101
GND#102
GND#103
GND#104
GND#105
GND#106
GND#107
GND#108
GND#109
GND#110
GND#111
GND#112
GND#113
GND#114
GND#115
GND#116
GND#117
GND#118
GND#119
GND#120
GND#121
GND#122
GND#123
GND#124
GND#125
GND#126
GND#127
GND#128
GND#129
GND#130
GND#131
GND#132
GND#133
GND#134
GND#135
GND#136
GND#137
GND#138
GND#139
GND#140
GND#141
GND#142
GND#143
GND#144
GND#145
GND#146
GND#147
GND#148
GND#149
GND#150
GND#151
GND#153
GND#154
GND#155
GND#156
GND#157
GND#158
GND#159
GND#160
GND#161
GND#163
GND#164
GND#165
GND#166
GND#167
GND#168
GND#169
GND#170
GND#171
GND#172
GND#173
GND#174
GND#175
GND#152
GND#162

Seymour M2

Seymour M2

PX@

PX@

GND

GND

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8

GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60

GND/PX_EN#61

GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98

VSS_MECH#1
VSS_MECH#2
VSS_MECH#3

A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13

A39
AW1
AW39

MECH#1
MECH#2
MECH#3

12

R290

R290

4.7K_0402_5%

4.7K_0402_5%

PX@

PX@

1

PX_EN <19>

T55 PADT55 PAD
T56 PADT56 PAD
T57 PADT57 PAD

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

ATI_SetmourXT_M2_PWR_GND

ATI_SetmourXT_M2_PWR_GND

ATI_SetmourXT_M2_PWR_GND

LA8611P

LA8611P

LA8611P

1

of

of

of

20 51Friday, November 04, 2011

20 51Friday, November 04, 2011

20 51Friday, November 04, 2011

0.1

0.1

0.1

5

4

3

2

1

+1.5VGS

D D

VDDR1 CRB Design

0.1u 6 6
1u 10 5
10u 6 5

VDD_CT CRB Design

0.1u 1 1
1u 3 3
10u 1 1

VDDR3 CRB Design

C C

1u 3 3
10u 1 1

VDDR4 CRB Design

0.1u 1 1
1u 1 1

MPV18 CRB Design

0.1u 2 1
1u 2 1
10u 1 1

SPV18 CRB Design

0.1u 1 1
1u 1 1
10u 1 1

SPV10 CRB Design

0.1u 1 1
1u 1 1
10u 1 1

B B

1

1

C336

C336

C337

+

+

@

@

2

2

PX@ C337

220U_B2_2.5VM_R35

220U_B2_2.5VM_R35

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C338

2

PX@ C338

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

1

C339

C327

C328

2

2

2

PX@ C339

PX@

PX@ C327

PX@

PX@ C328

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

+1.8VGS +VDDC_CT

+3VGS

1

1

C391

C390

2

2

PX@ C390

PX@

PX@ C391

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

1 2

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

+1.0VGS

1 2

MCK1608471YZF 0603

MCK1608471YZF 0603

For DDR3/GDDR5, MVDDQ = 1.5V

1

1

1

1

C340

C341

2

2

PX@ C340

PX@

PX@ C341

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

PX@ L22

PX@

1 2

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

1

1

C393

C392

2

2

PX@ C393

PX@

PX@ C392

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.8VGS

+1.8VGS+1.8VGS

L25

PX@L25

PX@

L26

PX@L26

PX@

1

C342

C329

C343

2

2

2

PX@ C342

PX@

PX@ C329

PX@

PX@ C343

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

L22

(1.8V@110mA VDD_CT)

1

C370

2
PX@ C370

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

L23

PX@ L23

PX@

1 2

BLM15BD121SN1D_0402

BLM15BD121SN1D_0402

(M97, Broadway and Madison: 1.8V@150mA MPV18)

L24

PX@L24

PX@

1 2

MCK1608471YZF 0603

MCK1608471YZF 0603

1

1

C406

C407

2

2

PX@ C407

PX@

PX@ C406

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

C420

C424

2

2

PX@ C424

PX@

PX@ C420

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C344

2

PX@ C344

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

C371

C372

2

2

PX@ C371

PX@

PX@ C372

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C408

2
PX@ C408

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

(1.8V@75mA SPV18)
(120mA SPV10)

1

C426

2
PX@ C426

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

C346

C345

2

2

PX@ C346

PX@

PX@ C345

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C373

2

PX@ C373

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C396

2
PX@ C396

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C403

2

PX@ C403

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

VCCSENSE_VGA<46>

VSSSENSE_VGA<46>

1

C347

2

PX@ C347

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C374

2
PX@ C374

PX@

1

C397

2

PX@ C397

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C404

2
PX@ C404

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C348

2

PX@ C348

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

+VDDR4

+MPV18

1

C405

2

PX@ C405

PX@

Route as differential

+SPV18
+SPV10

AD11
AG10

AF26

AF27
AG26
AG27

AF23

AF24
AG23
AG24

AF13

AF15
AG13
AG15

AD12

AF11

AF12
AG11

AM10

AN10

AF28

AG28

AH29

AC7
AF7
AJ7

AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10

J7

J9
K11
K13

K8

L12
L16
L21
L23
L26

L7
M11
N11

P7
R11
U11

U7

Y11

Y7

M20
M21

V12
U12

H7
H8

AN9

U6E

U6E

MEM I/O

MEM I/O

VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
VDDR1#18
VDDR1#19
VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25
VDDR1#26
VDDR1#27
VDDR1#28
VDDR1#29
VDDR1#30
VDDR1#31
VDDR1#32
VDDR1#33
VDDR1#34

LEVEL

LEVEL
TRANSLATION

TRANSLATION

VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4

I/O

I/O

VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4

VDDR4#4
VDDR4#5
VDDR4#7
VDDR4#8

VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#6

NC_VDDRHA
NC_VSSRHA

NC_VDDRHB
NC_VSSRHB

PLL

PLL

MPV18#1
MPV18#2

SPV18
SPV10
SPVSS

VOLTAGE

VOLTAGE
SENESE

SENESE

FB_VDDC

FB_VDDCI

FB_GND

Seymour M2

Seymour M2

PX@

PX@

PCIE

PCIE

PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8

PCIE_VDDR/PCIE_PVDD

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8

PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12

VDDC#1

CORE

CORE

VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8

VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15

POWER

POWER

VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32

VDDC/BIF_VDDC#33

VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41

VDDC/BIF_VDDC#42

VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58

VDDCI#1

VDDCI#2

VDDCI#3

VDDCI#4

VDDCI#5

VDDCI#6

VDDCI#7

VDDCI#8

VDDCI#9

VDDCI#10
VDDCI#11
VDDCI#12
VDDCI#13
VDDCI#14
VDDCI#15

ISOLATED

ISOLATED

VDDCI#16

CORE I/O

CORE I/O

VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22

AA31
AA32
AA33
AA34
V28
W29
W30
Y31
AB37

G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M26
N24
N27
R18
R21
R23
R26
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28

AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13

(1.8V@504mA PCIE_VDDR)

+PCIE_VDDR

1

1

1

1

C332

C330

C331

C333

2

2

2

2

PX@ C332

PX@

PX@ C333

PX@ C331

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

PX@ C330

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

(1.0V@1920mA PCIE_VDDC)

1

1

C349

2

PX@ C349

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C355

2

PX@ C355

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C401

2

PX@ C401

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

(GDDR3/DDR3 1.12V@4A VDDCI)
(GDDR5 1.12V@16A VDDCI)

1

C409

2

PX@ C409

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

VDDCI and VDDC should have seperate regulators with a merge option on PCB
For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator

1

1

C350

C352

C351

2

2

2

PX@ C350

PX@

PX@ C352

PX@

PX@ C351

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C356

2

PX@ C356

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

C378

C377

2

2

PX@ C378

PX@

PX@ C377

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

+BIF_VDDC

For non-BACO designs, connect BIF_VDDC to VDDC.
For BACO designs - see BACO reference schematics

1

C402

2

PX@ C402

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

C410

C412

C411

2

2

2

PX@ C410

PX@

PX@ C412

PX@

PX@ C411

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C334

C335

2
PX@ C334

PX@

PX@ C335

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C353

C354

2

@ C353

@

PX@ C354

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C359

C360

2
PX@ C359

PX@

PX@ C360

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C379

2
PX@ C379

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C413

C414

2
PX@ C413

PX@

PX@ C414

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

MBK1608121YZF_0603

MBK1608121YZF_0603

1

2

+1.0VGS

1

2

1

1

C361

2

2

PX@ C361

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C381

2
PX@ C381

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

C415

2

2

PX@ C415

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

L21

PX@ L21

PX@

1

C362

2

PX@ C362

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C382

2

PX@ C382

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C416

2

PX@ C416

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.8VGS

12

1

C364

C363

2

PX@ C364

PX@

PX@ C363

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C383

C384

2

PX@ C383

PX@

PX@ C384

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C418

C417

2

PX@ C418

PX@

PX@ C417

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

C365

PX@ C365

PX@

C385

PX@ C385

PX@

1

2

1

2

1

C366

2

PX@ C366

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C386

2

PX@ C386

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C367

2

PX@ C367

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C387

2

PX@ C387

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

+VGA_CORE

1

C369

C368

2

PX@ C369

PX@

PX@ C368

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

+VGA_CORE

1

C389

C388

2

PX@ C389

PX@

PX@ C388

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

+VGA_CORE

1

C394

C400

2

PX@ C394

PX@

PX@ C400

PX@

22U_0603_6.3V6M

22U_0603_6.3V6M

+VGA_CORE

1

C425

C422

2

PX@ C425

PX@

PX@ C422

PX@

22U_0603_6.3V6M

22U_0603_6.3V6M

PCIE_VDDR CRB Design

0.1u 2 2
1u 3 3
10u 1 1

PCIE_VDDC CRB Design
1u 7 5 (1@)
10u 1 1

VDDC CRB Design
1u 30 25

1

10u 10 1
22u 0 1

2

1

2

1

2

VDDCI CRB Design
1u 10 9
10u 3 2
22u 0 1

1

2

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

ATI_SeymourXT_M2_Power

ATI_SeymourXT_M2_Power

ATI_SeymourXT_M2_Power

LA8611P

LA8611P

LA8611P

1

21 51Friday, November 04, 2011

21 51Friday, November 04, 2011

21 51Friday, November 04, 2011

of

of

of

0.1

0.1

0.1

5

U6C

U6C

DDR2

DDR2
GDDR3/GDDR5

GDDR3/GDDR5
DDR3

DDR3

C37

DQA0_0/DQA_0

C35

DQA0_1/DQA_1

A35

DQA0_2/DQA_2

E34

DQA0_3/DQA_3

G32

DQA0_4/DQA_4

D33

DQA0_5/DQA_5

F32

D D

C C

+1.5VGS

R299 240_0402_1%@R299 240_0402_1%@

1 2

R300 240_0402_1%PX@R300 240_0402_1%PX@

1 2

R301 240_0402_1%@R301 240_0402_1%@

1 2

R304 240_0402_1%PX@R304 240_0402_1%PX@

1 2

R302 240_0402_1%@R302 240_0402_1%@

1 2

R305 240_0402_1%@R305 240_0402_1%@

1 2

AG12

AH12

E32
D31

F30
C30
A30

F28
C28
A28
E28
D27

F26
C26
A26

F24
C24
A24
E24
C22
A22

F22
D21
A20

F20
D19
E18
C18
A18

F18
D17
A16

F16
D15
E14

F14
D13

F12
A12
D11

F10
A10
C10
G13
H13

J13
H11
G10

G8
K9

K10

G9
A8
C8
E8
A6
C6
E6
A5

L18

L20

L27
N12

M12
M27

DQA0_6/DQA_6
DQA0_7/DQA_7
DQA0_8/DQA_8
DQA0_9/DQA_9
DQA0_10/DQA_10
DQA0_11/DQA_11
DQA0_12/DQA_12
DQA0_13/DQA_13
DQA0_14/DQA_14
DQA0_15/DQA_15
DQA0_16/DQA_16
DQA0_17/DQA_17
DQA0_18/DQA_18
DQA0_19/DQA_19
DQA0_20/DQA_20
DQA0_21/DQA_21
DQA0_22/DQA_22
DQA0_23/DQA_23
DQA0_24/DQA_24
DQA0_25/DQA_25
DQA0_26/DQA_26
DQA0_27/DQA_27
DQA0_28/DQA_28
DQA0_29/DQA_29
DQA0_30/DQA_30
DQA0_31/DQA_31
DQA1_0/DQA_32
DQA1_1/DQA_33
DQA1_2/DQA_34
DQA1_3/DQA_35
DQA1_4/DQA_36
DQA1_5/DQA_37
DQA1_6/DQA_38
DQA1_7/DQA_39
DQA1_8/DQA_40
DQA1_9/DQA_41
DQA1_10/DQA_42
DQA1_11/DQA_43
DQA1_12/DQA_44
DQA1_13/DQA_45
DQA1_14/DQA_46
DQA1_15/DQA_47
DQA1_16/DQA_48
DQA1_17/DQA_49
DQA1_18/DQA_50
DQA1_19/DQA_51
DQA1_20/DQA_52
DQA1_21/DQA_53
DQA1_22/DQA_54
DQA1_23/DQA_55
DQA1_24/DQA_56
DQA1_25/DQA_57
DQA1_26/DQA_58
DQA1_27/DQA_59
DQA1_28/DQA_60
DQA1_29/DQA_61
DQA1_30/DQA_62
DQA1_31/DQA_63

MVREFDA
MVREFSA

MEM_CALRN0
MEM_CALRN1
MEM_CALRN2

MEM_CALRP1
MEM_CALRP0
MEM_CALRP2

DDR2

DDR2
GDDR5/GDDR3

GDDR5/GDDR3
DDR3

DDR3

ADBIA0/ODTA0
ADBIA1/ODTA1

CLKA0

CLKA0B

CLKA1

CLKA1B
RASA0B

RASA1B
CASA0B

CASA1B

CSA0B_0
CSA0B_1

CSA1B_0
CSA1B_1

CKEA0
CKEA1

WEA0B
WEA1B

MAA0_8
MAA1_8

GDDR5

GDDR5

G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17

A32
C32
D23
E22
C14
A14
E10
D9

C34
D29
D25
E20
E16
E12
J10
D7

A34
E30
E26
C20
C16
C12
J11
F8

J21
G19

H27
G27

J14
H14

K23
K19

K20
K17

K24
K27

M13
K16

K21
J20

K26
L15

H23
J19

MAA0_0/MAA_0
MAA0_1/MAA_1
MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6
MAA0_7/MAA_7
MAA1_0/MAA_8

MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12

MAA1_5/MAA_13_BA2
MAA1_6/MAA_14_BA0

MAA1_7/MAA_A15_BA1

WCKA0_0/DQMA_0

WCKA0B_0/DQMA_1

WCKA0_1/DQMA_2

WCKA0B_1/DQMA_3

WCKA1_0/DQMA_4

WCKA1B_0/DQMA_5

WCKA1_1/DQMA_6

WCKA1B_1/DQMA_7

MEMORY INTERFACE A

MEMORY INTERFACE A

GDDR5/DDR2/GDDR3

GDDR5/DDR2/GDDR3

EDCA0_0/QSA_0/RDQSA_0
EDCA0_1/QSA_1/RDQSA_1
EDCA0_2/QSA_2/RDQSA_2
EDCA0_3/QSA_3/RDQSA_3
EDCA1_0/QSA_4/RDQSA_4
EDCA1_1/QSA_5/RDQSA_5
EDCA1_2/QSA_6/RDQSA_6
EDCA1_3/QSA_7/RDQSA_7

DDBIA0_0/QSA_0B/WDQSA_0
DDBIA0_1/QSA_1B/WDQSA_1
DDBIA0_2/QSA_2B/WDQSA_2
DDBIA0_3/QSA_3B/WDQSA_3
DDBIA1_0/QSA_4B/WDQSA_4
DDBIA1_1/QSA_5B/WDQSA_5
DDBIA1_2/QSA_6B/WDQSA_6
DDBIA1_3/QSA_7B/WDQSA_7

4

+1.8VGS

R293 10K_0402_5%X76@R293 10K_0402_5%X76@

1 2

R294 10K_0402_5%X76@R294 10K_0402_5%X76@

1 2

R295 10K_0402_5%X76@R295 10K_0402_5%X76@

1 2

R296 10K_0402_5%X76@R296 10K_0402_5%X76@

1 2

R297 10K_0402_5%X76@R297 10K_0402_5%X76@

1 2

R298 10K_0402_5%X76@R298 10K_0402_5%X76@

1 2

Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2

ZZZ20

ZZZ20

VRAM

VRAM

H1G@

H1G@
X7638538L01

X7638538L01

H5TQ1G63DFR-11C

SA000041S30

K4W1G1646G-BC11

SA00004GS40

H5TQ2G63BFR-11C

SA00003YO10

K4W2G1646C-HC11

SA000047Q10

64MX16 (512MB)

64MX16 (512MB)

128Mx16 (1GB)

128Mx16 (1GB)

ZZZ21

ZZZ21

VRAM

VRAM

H512M@

H512M@
X7638538L04

X7638538L04

3

VRAM_ID0
VRAM_ID1
VRAM_ID2

R293

100

R294

00

R293

11

R294

0

ZZZ22

ZZZ22

VRAM

VRAM

S1G@

S1G@
X7638538L02

X7638538L02

ZZZ23

ZZZ23

VRAM_ID0 <18>
VRAM_ID1 <18>
VRAM_ID2 <18>

R296

R298

R295

R298

1

R296

R297

0

R295

R297

11

VRAM

VRAM

S512M@

S512M@
X7638538L03

X7638538L03

PX@

PX@

R303

R303

1 2

5.11K_0402_1%

5.11K_0402_1%

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

+VDD_MEM15_REFDB
+VDD_MEM15_REFSB

TESTEN

AA12

AD28
AK10

AL10

2

C5
C3

E3
E1
F1
F3

F5
G4
H5
H6

J4

K6

K5

L4
M6
M1
M3
M5
N4

P6

P5
R4

T6

T1
U4

V6

V1

V3

Y6

Y1

Y3

Y5

AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6

AJ4
AK3
AF8
AF9
AG8
AG7
AK9

AL7
AM8
AM7
AK1

AL4
AM6
AM1
AN4
AP3
AP1
AP5

Y12

U6D

U6D

DDR2

DDR2
GDDR3/GDDR5

GDDR3/GDDR5
DDR3

DDR3

DQB0_0/DQB_0
DQB0_1/DQB_1
DQB0_2/DQB_2
DQB0_3/DQB_3
DQB0_4/DQB_4
DQB0_5/DQB_5
DQB0_6/DQB_6
DQB0_7/DQB_7
DQB0_8/DQB_8
DQB0_9/DQB_9
DQB0_10/DQB_10
DQB0_11/DQB_11
DQB0_12/DQB_12
DQB0_13/DQB_13
DQB0_14/DQB_14
DQB0_15/DQB_15
DQB0_16/DQB_16
DQB0_17/DQB_17
DQB0_18/DQB_18
DQB0_19/DQB_19
DQB0_20/DQB_20
DQB0_21/DQB_21
DQB0_22/DQB_22
DQB0_23/DQB_23
DQB0_24/DQB_24
DQB0_25/DQB_25
DQB0_26/DQB_26
DQB0_27/DQB_27
DQB0_28/DQB_28
DQB0_29/DQB_29
DQB0_30/DQB_30
DQB0_31/DQB_31
DQB1_0/DQB_32
DQB1_1/DQB_33
DQB1_2/DQB_34
DQB1_3/DQB_35
DQB1_4/DQB_36
DQB1_5/DQB_37
DQB1_6/DQB_38
DQB1_7/DQB_39
DQB1_8/DQB_40
DQB1_9/DQB_41
DQB1_10/DQB_42
DQB1_11/DQB_43
DQB1_12/DQB_44
DQB1_13/DQB_45
DQB1_14/DQB_46
DQB1_15/DQB_47
DQB1_16/DQB_48
DQB1_17/DQB_49
DQB1_18/DQB_50
DQB1_19/DQB_51
DQB1_20/DQB_52
DQB1_21/DQB_53
DQB1_22/DQB_54
DQB1_23/DQB_55
DQB1_24/DQB_56
DQB1_25/DQB_57
DQB1_26/DQB_58
DQB1_27/DQB_59
DQB1_28/DQB_60
DQB1_29/DQB_61
DQB1_30/DQB_62
DQB1_31/DQB_63

MVREFDB
MVREFSB

TESTEN
CLKTESTA

CLKTESTB

DDR2

DDR2
GDDR5/GDDR3

GDDR5/GDDR3
DDR3

DDR3

MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8

MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12

MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

WCKB1B_1/DQMB_7

GDDR5/DDR2/GDDR3

GDDR5/DDR2/GDDR3

MEMORY INTERFACE B

MEMORY INTERFACE B

EDCB0_0/QSB_0/RDQSB_0
EDCB0_1/QSB_1/RDQSB_1
EDCB0_2/QSB_2/RDQSB_2
EDCB0_3/QSB_3/RDQSB_3
EDCB1_0/QSB_4/RDQSB_4
EDCB1_1/QSB_5/RDQSB_5
EDCB1_2/QSB_6/RDQSB_6
EDCB1_3/QSB_7/RDQSB_7

DDBIB0_0/QSB_0B/WDQSB_0
DDBIB0_1/QSB_1B/WDQSB_1
DDBIB0_2/QSB_2B/WDQSB_2
DDBIB0_3/QSB_3B/WDQSB_3
DDBIB1_0/QSB_4B/WDQSB_4
DDBIB1_1/QSB_5B/WDQSB_5
DDBIB1_2/QSB_6B/WDQSB_6
DDBIB1_3/QSB_7B/WDQSB_7

ADBIB0/ODTB0
ADBIB1/ODTB1

CLKB0

CLKB0B

CLKB1

CLKB1B
RASB0B

RASB1B
CASB0B

CASB1B

CSB0B_0
CSB0B_1

CSB1B_0
CSB1B_1

CKEB0
CKEB1

WEB0B
WEB1B

MAB0_8
MAB1_8

GDDR5

GDDR5

DRAM_RST

P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9

H3
H1
T3
T5
AE4
AF5
AK6
AK5

F6
K3
P3
V5
AB5
AH1
AJ9
AM5

G7
K1
P1
W4
AC4
AH3
AJ8
AM3

T7
W7

L9
L8

AD8
AD7

T10
Y10

W10
AA10

P10
L10

AD10
AC10

U10
AA11

N10
AB11

T8
W8

AH11

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
B_BA2
B_BA0
B_BA1

DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7

QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7

ODTB0
ODTB1

CLKB0
CLKB0#

CLKB1
CLKB1#

RASB0#
RASB1#

CASB0#
CASB1#

CSB0#_0

CSB1#_0

CKEB0
CKEB1

WEB0#
WEB1#

MAB13
MAB14

DRAM_RST#_R

1

MDB[0..63]<23>

MDB[0..63]

MAB[12..0]
B_BA[2..0]

DQMB#[7..0] <23>

QSB[7..0] <23>

QSB#[7..0] <23>

ODTB0 <23>
ODTB1 <23>

CLKB0 <23>
CLKB0# <23>

CLKB1 <23>
CLKB1# <23>

RASB0# <23>
RASB1# <23>

CASB0# <23>
CASB1# <23>

CSB0#_0 <23>

CSB1#_0 <23>

CKEB0 <23>
CKEB1 <23>

WEB0# <23>
WEB1# <23>

MAB13 <23>
MAB14 <23>

MAB[12..0] <23>

B_BA[2..0] <23>

Seymour M2

Seymour M2

PX@

PX@

Thames/Whislter M2 Seymour M2

B B

A A

R299

R300

R301

R302

R304

R305

POP

@

POP

POP

@

POP

POP

POP

@

@

@

@

This basic topology should be used for DRAM_RST for DDR3/GDDR5.These
Capacitors and Resistor values are an example only. The Series R and
|| Cap values will depend on the DRAM load and will have to be
calculated for different Memory ,DRAM Load and board to pass Reset
Signal Spec.
Place all these components very close to GPU (Within
25mm) and keep all component close to each Other (within
5mm) except Rser2

+1.5VGS

12

R308

R308

4.7K_0402_5%

4.7K_0402_5%

@

@

R313

R313

DRAM_RST#<23>

1 2

51.1_0402_1%

51.1_0402_1%

PX@

PX@

120P_0402_50V9

120P_0402_50V9

PX@

PX@

C431

C431

12

1 2

10_0402_5%

10_0402_5%

R314

R314

PX@

PX@

DRAM_RST#_R

PX@

PX@

R317

R317

4.99K_0402_1%

4.99K_0402_1%

1 2

0.1U_0402_16V7K

0.1U_0402_16V7K

51.1_0402_1%

51.1_0402_1%

C427

C427

R306

R306

12

@

@

12

@

@

12

@

@

C428

C428

0.1U_0402_16V7K

0.1U_0402_16V7K

12

@

@

R307

R307

51.1_0402_1%

51.1_0402_1%

Seymour M2

Seymour M2

PX@

PX@

route 50ohms single-ended/100ohms diff
and keep short
Debug only, for clock observation, if not needed, DNI
5mil 5mil

+1.5VGS +1.5VGS

12

R311

R311

40.2_0402_1%

40.2_0402_1%

PX@

PX@

+VDD_MEM15_REFDB

12

12

C432

R318

R318

100_0402_1%

100_0402_1%

PX@

PX@

C432

0.1U_0402_16V7K

0.1U_0402_16V7K

PX@

PX@

R312

R312

40.2_0402_1%

40.2_0402_1%

PX@

PX@

R319

R319

100_0402_1%

100_0402_1%

PX@

PX@

12

12

+VDD_MEM15_REFSB

12

C433

C433

0.1U_0402_16V7K

0.1U_0402_16V7K

PX@

PX@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

ATI_SeymourXT_M2_MEM IF

ATI_SeymourXT_M2_MEM IF

ATI_SeymourXT_M2_MEM IF

LA8611P

LA8611P

LA8611P

1

of

of

of

22 51Monday, November 07, 2011

22 51Monday, November 07, 2011

22 51Monday, November 07, 2011

0.1

0.1

0.1

5

U17

VREFC_A1_B
VREFD_Q1_B

D D

MDB[0..63]<22>

MAB[14..0]<22>

DQMB#[7..0]<22>

QSB[7..0]<22>

QSB#[7..0]<22>

C C

CLKB0

R344 56_0402_1%

R344 56_0402_1%

CLKB0#

R345 56_0402_1%

R345 56_0402_1%

CLKB1

1 2

R350 56_0402_1%

R350 56_0402_1%

CLKB1#

1 2

R351 56_0402_1%

R351 56_0402_1%

PX@

PX@

1 2

PX@

PX@

1 2

PX@

PX@

PX@

PX@

MDB[0..63]

MAB[14..0]

DQMB#[7..0]

QSB[7..0]

QSB#[7..0]

12

12

C481

C481

0.01U_0402_16V7K

0.01U_0402_16V7K

PX@

PX@

C482

C482

0.01U_0402_16V7K

0.01U_0402_16V7K

PX@

PX@

B_BA0<22>
B_BA1<22>
B_BA2<22>

CLKB0<22>
CLKB0#<22>
CKEB0<22>

ODTB0<22>
CSB0#_0<22>
RASB0#<22>
CASB0#<22>
WEB0#<22>

QSB2 QSB3 QSB4
QSB0 QSB1

DQMB#2 DQMB#3 DQMB#4
DQMB#0 DQMB#1

QSB#2 QSB#3 QSB#4
QSB#0 QSB#1

DRAM_RST#<22>

12

R346

R346

240_0402_1%

240_0402_1%

PX@

PX@

U17

M8
H1

MAB0 MAB0 MAB0 MAB0

N3

MAB1 MAB1 MAB1 MAB1

P7

MAB2 MAB2 MAB2 MAB2

P3

MAB3 MAB3 MAB3 MAB3

N2

MAB4 MAB4 MAB4 MAB4

P8

MAB5 MAB5 MAB5 MAB5

P2

MAB6 MAB6 MAB6 MAB6

R8

MAB7 MAB7 MAB7 MAB7

R2

MAB8 MAB8 MAB8 MAB8

T8

MAB9 MAB9 MAB9 MAB9

R3

MAB10 MAB10 MAB10 MAB10

L7

MAB11 MAB11 MAB11 MAB11

R7

MAB12 MAB12 MAB12 MAB12

N7

MAB13 MAB13 MAB13 MAB13

T3

MAB14 MAB14 MAB14 MAB14

T7
M7

M2
N8
M3

J7
K7
K9

K1

L2

J3
K3

L3

F3
C7

E7
D3

G3
B7

T2

L8

J1

L1

J9

L9

K4B1G1646E-HC12_FBGA96

K4B1G1646E-HC12_FBGA96

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET
ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

4

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

X76@

X76@

3

U18

MDB19

E3

MDB20

F7

MDB22

F2

MDB16

F8

MDB23

H3

MDB17

H8

MDB21

G2

MDB18

H7

MDB0

D7

MDB4

C3

MDB1

C8

MDB6

C2

MDB3

A7

MDB7

A2

MDB2

B8

MDB5

A3

+1.5VGS

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VGS

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VREFC_A2_B
VREFD_Q2_B

B_BA0 B_BA0 B_BA0
B_BA1 B_BA1 B_BA1
B_BA2 B_BA2 B_BA2

CLKB0
CLKB0#
CKEB0 CKEB1

ODTB0 ODTB1
CSB0#_0 CSB1#_0
RASB0# RASB1#
CASB0# CASB1#
WEB0# WEB1#

DRAM_RST# DRAM_RST# DRAM_RST#

12

R347

R347

240_0402_1%

240_0402_1%

PX@

PX@

U18

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

K4B1G1646E-HC12_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

X76@

X76@

MDB26

E3

MDB30

F7

MDB24

F2

MDB29

F8

MDB27

H3

MDB28

H8

MDB25

G2

MDB31

H7

MDB15

D7

MDB10

C3

MDB14

C8

MDB11

C2

MDB12

A7

MDB9

A2

MDB13

B8

MDB8

A3

+1.5VGS

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VGS

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

R348

R348

240_0402_1%

240_0402_1%

PX@

PX@

CLKB1<22>
CLKB1#<22>
CKEB1<22>

ODTB1<22>
CSB1#_0<22>
RASB1#<22>
CASB1#<22>
WEB1#<22>

VREFC_A3_B
VREFD_Q3_B

QSB5

DQMB#5

QSB#5

12

U19

U19

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4B1G1646E-HC12_FBGA96

K4B1G1646E-HC12_FBGA96

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

X76@

X76@

1

U20

CLKB1
CLKB1#

QSB6
QSB7

DQMB#6
DQMB#7

QSB#6
QSB#7

U20

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL
SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

K4B1G1646E-HC12_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

X76@

X76@

MDB55

E3

MDB50

F7

MDB54

F2

MDB51

F8

MDB53

H3

MDB49

H8

MDB52

G2

MDB48

H7

MDB56

D7

MDB59

C3

MDB63

C8

MDB62

C2

MDB57

A7

MDB61

A2

MDB58

B8

MDB60

A3

+1.5VGS

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VGS

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDB33

E3

MDB37

F7

MDB35

F2

MDB39

F8

MDB32

H3

MDB36

H8

MDB34

G2

MDB38

H7

MDB44

D7

MDB41

C3

MDB47

C8

MDB43

C2

MDB45

A7

MDB40

A2

MDB46

B8

MDB42

A3

+1.5VGS

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VGS

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

R349

R349

240_0402_1%

240_0402_1%

PX@

PX@

VREFC_A4_B
VREFD_Q4_B

12

B B

+1.5VGS

1

1

C492

2
PX@ C492

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C493

2
PX@ C493

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

C491

A A

2
PX@ C491

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C494

2

PX@ C494

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C495

2

PX@ C495

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C496

2

PX@ C496

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C497

2

PX@ C497

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS

R352

R352

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

R360

R360

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

1

C498

2

PX@ C498

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

C499

PX@ C499

PX@

1

2

12

VREFD_Q1_B VREFD_Q2_B

12

1

C483

2
PX@ C483

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

1

1

C500

2

PX@ C500

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

C501

2

PX@ C501

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

C502

2

PX@ C502

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

R353

R353

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

R361

R361

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

1

C503

2

PX@ C503

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

12

VREFC_A1_B VREFC_A2_B

12

1

C484

2

PX@ C484

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

R354

R354

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

R362

R362

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

+1.5VGS

1

C504

2

PX@ C504

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

12

12

1

C505

2

PX@ C505

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C485

2

PX@ C485

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C506

2
PX@ C506

PX@

10U_0603_6.3V6M

10U_0603_6.3V6M

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

1

C507

2

PX@ C507

PX@

R355

R355

PX@

PX@

R364

R364

PX@

PX@

12

12

1

C486

2

PX@ C486

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

+1.5VGS +1.5VGS

1

1

C508

C509

2

2

PX@ C508

PX@

PX@ C509

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

R356

R356

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

R365

R365

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

1

C510

2

PX@ C510

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

12

12

1

C511

2

PX@ C511

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C487

2

PX@ C487

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C512

2

PX@ C512

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

4.99K_0402_1%

4.99K_0402_1%

VREFC_A3_B

4.99K_0402_1%

4.99K_0402_1%

1

C513

2

PX@ C513

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

C514

PX@ C514

PX@

1

2

12

R357

R357

PX@

PX@

12

R366

R366

PX@

PX@

1

C515

2
PX@ C515

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C488

2

PX@ C488

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C516

2

PX@ C516

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

VREFD_Q3_B

1

C517

2
PX@ C517

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

R358

R358

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

R367

R367

4.99K_0402_1%

4.99K_0402_1%

PX@

PX@

1

C518

2

PX@ C518

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

12

12

1

C519

2

PX@ C519

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C489

2

PX@ C489

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C520

2

PX@ C520

PX@

4.99K_0402_1%

4.99K_0402_1%

VREFC_A4_B

4.99K_0402_1%

4.99K_0402_1%

1

C521

2

PX@ C521

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

R359

R359

PX@

PX@

R363

R363

PX@

PX@

1

C522

2

PX@ C522

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

12

12

1

C523

2
PX@ C523

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C490

2

PX@ C490

PX@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

C524

2

PX@ C524

PX@

VREFD_Q4_B

1

C525

2

PX@ C525

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C526

2

PX@ C526

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C527

2

PX@ C527

PX@

1U_0402_6.3V6K

1U_0402_6.3V6K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

ATI_SeymourXT_M2_VRAM_B

ATI_SeymourXT_M2_VRAM_B

ATI_SeymourXT_M2_VRAM_B

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C 0.1

C 0.1

C 0.1

Date: Sheet of

Date: Sheet of

Date: Sheet of

LA8611P

LA8611P

LA8611P

1

23 51Friday, November 04, 2011

23 51Friday, November 04, 2011

23 51Friday, November 04, 2011

5

+3VS +3VS_PS

30mil 30mil

R368 0_0603_5%R368 0_0603_5%

Close to Pin3

10U_0603_6.3V6M

10U_0603_6.3V6M

D D

1

C528

C528

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C529

C529

2

+DP_V33

1

C530

C530

2

Reserve for R01 as vender request

Close to L28

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C531

C531

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

22U_0603_6.3V6M

22U_0603_6.3V6M

C532

C532

1

C533

C533

2

1

2

1

2

C534

C534

Close to Pin18

+SWR_VDD

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C535

C535

2

Close to Pin13

Close to L29

C C

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

22U_0603_6.3V6M

22U_0603_6.3V6M

1

C536

C536

2

0.1U_0402_16V4Z

1

C537

C537

2

Close to
Pin27

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C538

C538

2

Close to Pin7

+SWR_V12

1

C539

C539

2

L30

@ L30

@

0_0402_5%

0_0402_5%

+1.2VS

12

20110124 Modify

4

+3VS_PS

4.7UH_PG031B-4R7MS_1.1A_20%

4.7UH_PG031B-4R7MS_1.1A_20%

T70T70

T71T71

For EC programming ROM

LVDS_HPD<7>

R377

R377

100K_0402_5%

100K_0402_5%

L27

L27
FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805
L28

L28
FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805
L29

L29

1 2

+DP_V33

12

+SWR_VDD

12

+SWR_LX+SWR_V12

DP0_AUXP_C<7>
DP0_AUXN_C<7>

DP0_TXP0_C<7>
DP0_TXN0_C<7>

CSCL
CSDA

1 2

1K_0402_5%

1K_0402_5%

R378

R378

LVDS_HPD_R

1 2

R882

R882

12

12K_0402_1%

12K_0402_1%

Change to 12Kohm 1% (DG ref.)
20101114

40mil
60mil

60mil
60mil60mil

3

13
18

12
11
27

7

2
1

5
6

9

10

32

8
4

U22

U22

DP_V33
SWR_VDD

PVCC
SWR_LX

SWR_VCCK
VCCK
DP_V12

AUX_P
AUX_N

LANE0P
LANE0N

CIICSCL1
CIICSDA1

HPD
DP_REXT

DP_GND

3

Power

Power

LVDS

LVDS

RTD2132S

RTD2132S

DP-IN

DP-IN

GPIO(PWM OUT)

GPIO(Panel_VCC)

GPIO(PWM IN)

GPIO

GPIO

GPIO(BL_EN)

LVDS

LVDS

Other

Other

EDID

EDID

ROM

ROM

RTD2132S-GR_QFN32_5X5

RTD2132S-GR_QFN32_5X5

Version E

TXEC+

TXEC­TXE2+

TXE2-

TXE1+

TXE1-

TXE0+

TXE0-

MIICSCL1

MIICDA1

MIICSCL0
MIICSDA0

GND

19
20

21
22

23
24

25
26

14
15
16
17

29
28

31
30

33

TL_BKOFF#_R

MIIC_SCL
MIIC_SDA

2

LVDS_ACLK <25>
LVDS_ACLK# <25>

LVDS_A2 <25>
LVDS_A2# <25>

LVDS_A1 <25>
LVDS_A1# <25>

LVDS_A0 <25>
LVDS_A0# <25>

TL_INVT_PWM <25>

TL_ENVDD <25>

APU_INVT_PWM <9>

EDID_CLK <25>
EDID_DATA <25>

MIIC_SCL
MIIC_SDA

EEROM

@

@

0_0402_5%

0_0402_5%

1 2
1 2

0_0402_5%

0_0402_5%

@

@

EDID_DATA
EDID_CLK

MIIC_SDA
CSCL
CSDA

MIIC_SCL_R
MIIC_SDA_R

MIIC_SCL

R369 4.7K_0402_5%R369 4.7K_0402_5%
R370 4.7K_0402_5%R370 4.7K_0402_5%

R374 4.7K_0402_5%R374 4.7K_0402_5%
R375 4.7K_0402_5%@R375 4.7K_0402_5%@
R376 4.7K_0402_5%@R376 4.7K_0402_5%@

R621

R621
R622

R622

Pull high for EEPROM implementation
pull down for EEPROM free design

+SWR_VDD

1 2
1 2

1 2
1 2
1 2

1

U21

U21

8

VCC

7

WP

6

SCL

5

SDA

GND

CAT24C64WI-GT3_SO8

CAT24C64WI-GT3_SO8

+3VS_PS

1 2

1 2

1

A0

2

A1

3

A2

4

@

@

R372

R372

4.7K_0402_5%

4.7K_0402_5%

R630

R630

4.7K_0402_5%

4.7K_0402_5%

+3VS_PS

Vendor advise reserve it

R696 0_0402_5%R696 0_0402_5%

1 2

B B

CSDA

A A

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

TL_BKOFF#_R

BKOFF#<25,33>

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

R878 0_0402_5%R878 0_0402_5%

1 2

CSCL EC_SMB_CK2

Compal Secret Data

Compal Secret Data

Compal Secret Data

R623 0_0402_5%@R623 0_0402_5%@

+3VS_PS

2
1

U38

U38

+3VS_PS

2

Q34A

@Q34A

@

61

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

R879 0_0402_5%R879 0_0402_5%

1 2

Deciphered Date

Deciphered Date

Deciphered Date

1 2

C745

C745

0.1U_0402_16V7K

0.1U_0402_16V7K

1 2

5

P

B

4

Y

A

G

3

MC74VHC1G08DFT2G SC70 5P

MC74VHC1G08DFT2G SC70 5P

EC_SMB_DA2

5

Q34B

@Q34B

@

34

2

ENBAKL <33>

TL_BKOFF# <25>

EC_SMB_DA2 <18,32,33>

EC_SMB_CK2 <18,32,33>

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

LVDS Translator - RTD2132S

LVDS Translator - RTD2132S

LVDS Translator - RTD2132S

LA8611P

LA8611P

LA8611P

1

0.1

0.1

0.1

of

of

of

24 51Monday, November 07, 2011

24 51Monday, November 07, 2011

24 51Monday, November 07, 2011

5

4

3

2

1

LCD POWER CIRCUIT

D D

2N7002K_SOT23-3

2N7002K_SOT23-3

R389 0_0402_5%R389 0_0402_5%

TL_ENVDD<24>

C C

B B

A A

1 2

EC_INVT_PWM<33>

TL_INVT_PWM<24>

BKOFF#<24,33>

TL_BKOFF#<24>

+3VS

+3VALW

5

+LCDVDD

12

R381

R381
150_0603_1%

150_0603_1%

13

D

D

Q35

Q35

2

G

G

S

S

2

IN

12

R390

@R390

100K_0402_5%

100K_0402_5%

R698 0_0402_5%@R698 0_0402_5%@

1 2

R403 0_0402_5%R403 0_0402_5%

1 2

R402 10K_0402_5%R402 10K_0402_5%

1 2

CMOS_ON#<33>

@

@

@

R697 0_0402_5%

R697 0_0402_5%

1 2

R392 0_0402_5%R392 0_0402_5%

1 2

C780

C780

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

@

@

+5VALW

12

R382

R382
100K_0402_5%

100K_0402_5%

R383

R383

1 2

220K_0402_5%

220K_0402_5%

1

OUT

GND

Q37

Q37

DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

3

1 2

R400 0_0402_5%R400 0_0402_5%

RB751V_SOD323

RB751V_SOD323
D4

1

2

21

@D4

@

CMOS Camera

Q39

Q39

AP2301GN-HF_SOT23-3

AP2301GN-HF_SOT23-3

3 1

CMOS@

CMOS@

2

C555

R408

R408
10K_0402_5%

10K_0402_5%

CMOS@

CMOS@

1 2

C555

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CMOS@

CMOS@

CMOS1

+3VS

2

C547

C547

0.1U_0402_16V4Z

0.1U_0402_16V4Z

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

INVTPWM

R395

R395
100K_0402_5%

100K_0402_5%

1 2

R399

@R399

@

1 2

10K_0402_5%

10K_0402_5%

DISPOFF#

+CMOS_PW

12

1

2

4

W=60mils

1

C546

C546

31

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

Q36

Q36
AP2301GN-HF_SOT23-3

AP2301GN-HF_SOT23-3

+LCDVDD

L31

L31

1 2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

+3VS

R406

R406
0_0603_5%

0_0603_5%

CMOS@

CMOS@

+3VS_CMOS

10U_0603_6.3V6M

10U_0603_6.3V6M
C556

C556

CMOS@

CMOS@

+LCDVDD_CONN

1

C554

C554

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CMOS@

CMOS@

2

W=60mils

1

1

C548

C548

C549

C549

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

Reserve for R01 as vender request

LVDS_A1<24>
LVDS_A1#<24>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

T72T72

T73T73

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

680P_0402_50V7K

680P_0402_50V7K

+3VS

C544

C544

@

@

2

LVDS_ACLK<24>
LVDS_ACLK#<24>

LVDS_A2<24>
LVDS_A2#<24>

LVDS_A0<24>

LVDS_A0#<24>
EDID_DATA<24>
EDID_CLK<24>

1

+LCDVDD_CONN

2

+3VS_CMOS

USB20_P3<14>
USB20_N3<14>

@

C543

C543

680P_0402_50V7K

680P_0402_50V7K

1
2
3
4
5

DISPOFF#
INVTPWM

(60 MIL)

+3VS

USB20_P3
USB20_N3

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

ACES_88341-3001

ACES_88341-3001

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

C542

C542

4.7U_0805_25V6-K

4.7U_0805_25V6-K

2

2

JLVDS1

JLVDS1

1
2

G1

3

G2

4

G3

5

G4
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

ME@

ME@

LVDS/CAMERA

LVDS/CAMERA

LVDS/CAMERA

LA8611P

LA8611P

LA8611P

31
32
33
34

1

R822

R822

1 2

0_0805_5%

0_0805_5%

1

1

@

B++LEDVDD

0.1

0.1

0.1

of

of

of

25 51Friday, November 04, 2011

25 51Friday, November 04, 2011

25 51Friday, November 04, 2011

5

4

3

2

1

3

1

R429

@R429

@

0_0805_5%

0_0805_5%

RB491D_SC59-3

RB491D_SC59-3

HDMI@

HDMI@

D7

D7

C557

C557

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

HDMI@

HDMI@

2

19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

HDMIDAT_R

HDMICLK_R

2

D5

@D5

@

PJDLC05_SOT23-3

PJDLC05_SOT23-3

ESD

21

+5VS

JHDMI1

JHDMI1

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CK­CK_shield
CK+
D0­D0_shield
D0+
D1­D1_shield
D1+
D2­D2_shield
D2+

SUYIN_100042GR019M23DZL

SUYIN_100042GR019M23DZL

ME@

ME@

GND
GND
GND
GND

20
21
22
23

HDMICLK_R

HDMIDAT_R

HDMI_CLKP<7>
HDMI_CLKN<7>

HDMI_TX0P<7>

HDMI_TX0N<7>
HDMI_TX1P<7>
HDMI_TX1N<7>
HDMI_TX2P<7>
HDMI_TX2N<7>

D D

R410 0_0402_5%HDMI@R410 0_0402_5%HDMI@
R411 0_0402_5%HDMI@R411 0_0402_5%HDMI@
R412 0_0402_5%HDMI@R412 0_0402_5%HDMI@
R413 0_0402_5%HDMI@R413 0_0402_5%HDMI@
R414 0_0402_5%HDMI@R414 0_0402_5%HDMI@
R415 0_0402_5%HDMI@R415 0_0402_5%HDMI@
R416 0_0402_5%HDMI@R416 0_0402_5%HDMI@
R417 0_0402_5%HDMI@R417 0_0402_5%HDMI@

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

HDMI_CLK+_CONN

HDMI_CLK-_CONN
HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

EMI request

R521

L32

@L32

HDMI_CLKP

HDMI_CLKN

HDMI_TX0P

HDMI_TX0N

HDMI_TX1P

C C

B B

HDMI_TX1N

HDMI_TX2P

HDMI_TX2N

@

1

1

4

4

WCM-2012-900T_4P

WCM-2012-900T_4P
L33

@L33

@

1

1

4

4

WCM-2012-900T_4P

WCM-2012-900T_4P
L34

@L34

@

1

1

4

4

WCM-2012-900T_4P

WCM-2012-900T_4P
L35

@L35

@

1

1

4

4

WCM-2012-900T_4P

WCM-2012-900T_4P

HDMI_CLK+_CONN
HDMI_CLK-_CONN
HDMI_TX0+_CONN
HDMI_TX0-_CONN
HDMI_TX1+_CONN
HDMI_TX1-_CONN
HDMI_TX2+_CONN
HDMI_TX2-_CONN

NEAR CONNECTOR

A A

HDMI_CLK+_CONN

2

2

HDMI_CLK-_CONN

3

3

HDMI_TX0+_CONN

2

2

HDMI_TX0-_CONN

3

3

HDMI_TX1+_CONN

2

2

HDMI_TX1-_CONN

3

3

HDMI_TX2+_CONN

2

2

HDMI_TX2-_CONN

3

3

1 2

R418 604_0402_1%HDMI@R418 604_0402_1%HDMI@

1 2

R419 604_0402_1%HDMI@R419 604_0402_1%HDMI@

1 2

R420 604_0402_1%HDMI@R420 604_0402_1%HDMI@

1 2

R421 604_0402_1%HDMI@R421 604_0402_1%HDMI@

1 2

R422 604_0402_1%HDMI@R422 604_0402_1%HDMI@

1 2

R423 604_0402_1%HDMI@R423 604_0402_1%HDMI@

1 2

R424 604_0402_1%HDMI@R424 604_0402_1%HDMI@

1 2

R425 604_0402_1%HDMI@R425 604_0402_1%HDMI@

+5VS

12

@

@

R427

R427
100K_0402_5%

100K_0402_5%

2

G

G

C1025 10P_0402_50V8J@ C1025 10P_0402_50V8J@

C1026 10P_0402_50V8J@ C1026 10P_0402_50V8J@

C1027 10P_0402_50V8J@ C1027 10P_0402_50V8J@

C1028 10P_0402_50V8J@ C1028 10P_0402_50V8J@

C1029 10P_0402_50V8J@ C1029 10P_0402_50V8J@

C1030 10P_0402_50V8J@ C1030 10P_0402_50V8J@

C1031 10P_0402_50V8J@ C1031 10P_0402_50V8J@

C1032 10P_0402_50V8J@ C1032 10P_0402_50V8J@

13

D

D

Q42

Q42
2N7002K_SOT23-3

2N7002K_SOT23-3

HDMI@

HDMI@

S

S

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

HDMI_CLK<7>

HDMI_DATA<7>

+5VS

3

2

R867

R867

1K_0402_5%

1K_0402_5%

@

@

1 2

MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

HDMI_DET<7>

HDMI_HPD

1

@

@

D8

D8
BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

+3VS

C

C

HDMI@

HDMI@

Q43

Q43

E

E

3 1
12

ESD

2

B

B

HDMI@

HDMI@

R434

R434
100K_0402_5%

100K_0402_5%

HDMI@

HDMI@

R432

R432

1 2

150K_0402_5%

150K_0402_5%

200K_0402_5%

200K_0402_5%

R433

R433

@

@

4.7K_0402_5%

4.7K_0402_5%

HDMI_HPD

1 2

R521

HDMI@

HDMI@

4.7K_0402_5%

4.7K_0402_5%

1 2

R522

R522

HDMI@

HDMI@

1 2

1.1A_6V_SMD1812P110TF

1.1A_6V_SMD1812P110TF

HDMI@

HDMI@

2K_0402_5%

2K_0402_5%

+3VS

2

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6
Q41A

Q41A

HDMI@

HDMI@

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

R430

R430

1 2

1 2

61

+5VS_HDMI_F

21

HDMI@

HDMI@

F1

F1

+5VS_HDMI

HDMI@

HDMI@

R431

R431
2K_0402_5%

2K_0402_5%

HDMI_CLK-_CONN
HDMI_CLK+_CONN

HDMI_TX0-_CONN
HDMI_TX0+_CONN

HDMI_TX1-_CONN
HDMI_TX1+_CONN

HDMI_TX2-_CONN
HDMI_TX2+_CONN

5

Q41B

Q41B

HDMI@

HDMI@

HDMI_HPD

HDMIDAT_R
HDMICLK_R

34

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

HDMI Connector

HDMI Connector

HDMI Connector

LA8611P

LA8611P

LA8611P

26 51Friday, November 04, 2011

26 51Friday, November 04, 2011

26 51Friday, November 04, 2011

1

of

of

of

0.1

0.1

0.1

A

B

C

D

E

FCM1608CF-121T03 0603

FCM1608CF-121T03 0603

1 2

FCM1608CF-121T03 0603

FCM1608CF-121T03 0603

1 2

FCM1608CF-121T03 0603

FCM1608CF-121T03 0603

1 2

1

1

C559

C559

C560

C560
10P_0402_50V8J

10P_0402_50V8J

2

2

10P_0402_50V8J

10P_0402_50V8J

1 2

L39

L39

FCM1608CF-121T03 0603

FCM1608CF-121T03 0603

1 2

L40

L40

FCM1608CF-121T03 0603

FCM1608CF-121T03 0603

12

R441

R441

4.7K_0402_5%

4.7K_0402_5%

CRT_DDC_DATA

CRT_DDC_CLK

1

1

@

@

C570

C570
68P_0402_50V8K

68P_0402_50V8K

2

2

L36

L36

L37

L37

L38

L38

1

C561

C561

2

10P_0402_50V8J

10P_0402_50V8J

1

C562

C562

2

10P_0402_50V8J

10P_0402_50V8J

1

@

@

C565

C565
10P_0402_50V8J

10P_0402_50V8J

2

1

@

@

C567

C567
10P_0402_50V8J

10P_0402_50V8J

2

RED

GREEN

BLUE

1

C563

C563
10P_0402_50V8J

10P_0402_50V8J

2

JVGA_HS

JVGA_VS

+5VS

+5VS

BLUE

CRT_DDC_DATA

CRT_DDC_CLK

D2107

@D2107

@

6

I/O4

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23-6

AZC099-04S.R7G_SOT23-6

D2108

6

I/O4

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23-6

AZC099-04S.R7G_SOT23-6

+5VS

RED
CRT_DDC_DATA

GREEN
JVGA_HS

BLUE
JVGA_VS

CRT_DDC_CLK

@D2108

@

D14

D14

2 1

RB491D_SC59-3

RB491D_SC59-3

I/O2

GND

I/O1

I/O2

GND

I/O1

+CRT_VCC

RED

3

2

GREEN

1

JVGA_HS

3

2

JVGA_VS

1

F2

F2

21

1.1A_6V_SMD1812P110TF

1.1A_6V_SMD1812P110TF

1

C571

C571
100P_0402_50V8J

100P_0402_50V8J

2

1

C568

C568

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

JCRT1

JCRT1

6

11

1
7

12

2
8

16

G

G

13

14
10

15

17

G

G

3
9

4

5

CONTE_80431-5K1-152

CONTE_80431-5K1-152

ME@

ME@

DAC_RED

DAC_GRN

DAC_BLU

12

C564

C564

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C566

C566

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R435

R435
150_0402_1%

150_0402_1%

+CRT_VCC

1

2

+CRT_VCC

1

@

@

2

12

R436

R436
150_0402_1%

150_0402_1%

5

P

A2Y

G

3

5

P

A2Y

G

3

12

1

4

OE#

U23

U23
SN74AHCT1G125DCKR_SC70-5

SN74AHCT1G125DCKR_SC70-5

1

4

OE#

U24

U24
SN74AHCT1G125DCKR_SC70-5

SN74AHCT1G125DCKR_SC70-5

R437

R437
150_0402_1%

150_0402_1%

R438

R438

1 2

1K_0402_5%

1K_0402_5%

CRT_HSYNC_1

4.7K_0402_5%

4.7K_0402_5%

1

C558

C558

2

10P_0402_50V8J

10P_0402_50V8J

CRT_VSYNC_1

+CRT_VCC

R440

R440

C569

C569

100P_0402_50V8J

100P_0402_50V8J

12

@

@

1 1

2 2

3 3

4 4

DAC_RED<13>

DAC_GRN<13>

DAC_BLU<13>

CRT_HSYNC<13>

CRT_VSYNC<13>

CRT_DDC_DATA<13>

CRT_DDC_CLK<13>

A

B

Security Classification

Security Classification

Security Classification

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

CRT Connector

CRT Connector

CRT Connector

Custom

Custom

Custom

LA8611P

LA8611P

LA8611P

27 51Friday, November 04, 2011

27 51Friday, November 04, 2011

27 51Friday, November 04, 2011

of

of

E

of

0.1

0.1

0.1

Switching Mode only

5

4

3

2

1

+3VALW

J11

J11

D D

112

JUMP_43X79

JUMP_43X79

@

@

Atheros request can't disable LAN power

+3V_LAN

APU_PCIE_RST#<12,17,32>

C C

PCIE_CRX_DTX_N0<5>
PCIE_CRX_DTX_P0<5>

PCIE_CTX_DRX_N0<5>

PCIE_CTX_DRX_P0<5>

CLK_PCIE_LAN#<12>

CLK_PCIE_LAN<12>

FCH_PCIE_WAKE#<14,32>

LAN_WAKE#<33>

B B

A A

LAN_CLKREQ#<14>

5

+3V_LAN

Layout Notice : Place as close

2

Vendor recommand reseve the
PU resistor close LAN chip

+3V_LAN

Vendor recommand reseve the
PU resistor close LAN chip

+3V_LAN

1

C869

C869

2

Near
Pin13

chip as possible.

R773 4.7K_0402_5%

R773 4.7K_0402_5%

1 2

@

@

Place Close to Chip

C861 .1U_0402_16V7KC861 .1U_0402_16V7K

1 2

C863 .1U_0402_16V7KC863 .1U_0402_16V7K

1 2

@

@

R777 0_0402_5%

R777 0_0402_5%

1 2

R778 0_0402_5%R778 0_0402_5%

1 2

R780 4.7K_0402_5%

R780 4.7K_0402_5%

1 2

@

@

@

1

C870

C870

2

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Near
Pin31

CLK_LAN_48M<12>

@

1

C871

C871

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R781 4.7K_0402_5%

R781 4.7K_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Near
Pin19

Place Close to C881

APU_PCIE_RST#

PCIE_PRX_C_DTX_N0
PCIE_PRX_C_DTX_P0

APU_PCIE_RST#
PCIE_WAKE#_R

LAN_XTALO
LAN_XTALI

+1.1_AVDDL
+1.1_AVDDL
+1.1_AVDDL
+1.1_AVDDL_L

+1.1_AVDDL

1

C872

C872

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Near
Pin6

C879 5P_0402_50V8@C879 5P_0402_50V8@

1

C873

C873

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

4

R772 0_0402_5%R772 0_0402_5%

+1.1_DVDDL

U41

AR8162-AL3A-R

AR8162-AL3A-R

U41

U41

29

TX_N

30

TX_P

36

RX_N

35

RX_P

32

REFCLK_N

33

REFCLK_P

2

PERST#

3

WAKE#

25

SMCLK

26

SMDATA

28

NC

27

TESTMODE

7

XTLO

8

XTLI

4

CLKREQ#

13

AVDDL

19

AVDDL

31

AVDDL

34

AVDDL

6

AVDDL_REG/AVDDL

41

GND

27P_0402_50V8J

27P_0402_50V8J

1 2

8162@U41

8162@

GIGA@

GIGA@

Atheros

Atheros

AR8151/AR8161

AR8151/AR8161

VDDCT/ISOLAN

DVDDL_REG/DVDDL

AVDDH/AVDD33

AR8161-AL3A-R_QFN40_5X5

AR8161-AL3A-R_QFN40_5X5

Y3

Y3

4

NC

OSC

1

OSC

25MHZ_20PF_FSX3M-25.M20FDO

25MHZ_20PF_FSX3M-25.M20FDO

1

C881

C881

2

NC

Close together

L60

+LX_R +LX

1

C855

C855

C854

@ C854

@

2

1000P_0402_50V7K

1000P_0402_50V7K

Close to
Pin40

L60

1 2

4.7UH_SIA4012-4R7M_20%

4.7UH_SIA4012-4R7M_20%

1

C859

C859

Note: Place Close to LAN chip
L39 DCR< 0.15 ohm

2

Rate current > 1A

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

SA000050E00_S IC AR8161-AL3A-R QFN 40P E-LAN CTRL
SA000052J10_S IC AR8162-AL3A-R QFN 40P E-LAN CTRL

ACTIVITY

38

LED_0

LAN_LINK#

39

LED_1

LAN_CLK_SEL

23

LED_2

MDI0-

12

TRXN0
TRXP0
TRXN1
TRXP1
TRXN2
TRXP2
TRXN3
TRXP3

VDD33

DVDDL/PPS

AVDDH

AVDDH_REG

3
2

RBIAS

C882

C882

MDI0+

11

MDI1-

15

MDI1+

14

MDI2-

18

MDI2+

17

MDI3-

21

MDI3+

20

LAN_RBIAS

10

1

40

LX

5

24
37

16
22
9

LAN_XTALI
LAN_XTALO

1

2

27P_0402_50V8J

27P_0402_50V8J

Place Close to PIN1

+3V_LAN

+LX

+LX

+1.7_VDDCT

+1.1_DVDDL

+AVDDH_AVDD3.3
+2.7_AVDDH
+2.7_AVDDH

1

1

C875

C875

C874

C874

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Near
Pin9

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+LX

1 2

+2.7_AVDDH

1

C876

C876

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

12

MDI0- <29>
MDI0+ <29>
MDI1- <29>
MDI1+ <29>
MDI2- <29>
MDI2+ <29>
MDI3- <29>
MDI3+ <29>

R881 10K_0402_5%@R881 10K_0402_5%@

R775 10K_0402_5%@R775 10K_0402_5%@

1 2

R779 2.37K_0402_1%R779 2.37K_0402_1%

R782 30K_0402_1%R782 30K_0402_1%

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Near
Pin22

3

Place close to Pin34

+AVDDH_AVDD3.3

H --> Overclocking mode
L --> Not overclocking mode

Overclocking mode stick

ACTIVITY <29>
LAN_LINK# <29>

For 48MHz CLK need to pull down,
keep floating for cystal

Place Close to PIN1

+3V_LAN

1

1

12

C864

C864

C865

C865

2

@

+3VS

1

1

C878

C878

C877

C877

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Near
Pin37

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

@

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1000P_0402_50V7K

1000P_0402_50V7K

1

C866

C866

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C867

C867

C868

C868

2

2

@

@

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

2

FBMA-L11160808601LMA10T_2P

FBMA-L11160808601LMA10T_2P

1

1

C856

C856

2

1

C857

C857

C858

C858

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C860

C860

2

Place close to Pin16

10U_0603_6.3V6M

10U_0603_6.3V6M

L62

L61

L61

1 2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

R774 0_0402_5%R774 0_0402_5%

1 2

1

C862

C862

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

LAN-AR8151/8161

LAN-AR8151/8161

LAN-AR8151/8161

Tuesday, November 08, 2011

Tuesday, November 08, 2011

Tuesday, November 08, 2011

L62

FBMA-L11160808601LMA10T_2P

FBMA-L11160808601LMA10T_2P

1 2

+3V_LAN

LA8611P

LA8611P

LA8611P

1

28 51

28 51

28 51

+1.1_DVDDL+1.1_AVDDL+1.1_AVDDL_L

of

of

of

0.1

0.1

0.1

5

MDI3+

MDI3-

9

D D

11

Place Close to T2

C C

B B

6677889

11

GND

5

Place Close to T1

10

6677889

10

GND

5

RCLAMP3304N.TCT_SLP2626P10-10

RCLAMP3304N.TCT_SLP2626P10-10

112233445

D31

D31

@

@

MDI2-

MDI2+

MDI1-

MDI1+

9

10

10

RCLAMP3304N.TCT_SLP2626P10-10

RCLAMP3304N.TCT_SLP2626P10-10

112233445

D32

D32

@

@

MDI0-

MDI0+

LAN_LINK#<28>

470P_0402_50V7K

470P_0402_50V7K

ACTIVITY<28>

4

@

@

C888

C888

ACTIVITY

@

@

C889

C889

470P_0402_50V7K

470P_0402_50V7K

1

2

1

2

+3V_LAN

+3V_LAN

2

C883

@ C883

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C884

C884

0.1U_0402_16V4Z@

0.1U_0402_16V4Z@

2

2

C886

C886

0.1U_0402_16V4Z@

0.1U_0402_16V4Z@

1

1

C887

@ C887

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

R790 510_0402_5%R790 510_0402_5%

12

R793 510_0402_5%R793 510_0402_5%

12

3

T2

T2

MDI3+<28>
MDI3-<28>

MDI2+<28>
MDI2-<28>

MDO0+

MDO0­MDO1+
MDO2+

MDO2-

MDO1­MDO3+

MDO3-

MDI0+<28>
MDI0-<28>

MDI1+<28>
MDI1-<28>

9

10

1
2
3
4
5
6
7

8
11
12

MDI3+
MDI3-

MDI2+
MDI2-

JRJ1

JRJ1

Green LED­Green LED+
PR1+
PR1­PR2+
PR3+
PR3­PR2­PR4+
PR4­Yellow LED­Yellow LED+

SANTA_130452-D ME@

SANTA_130452-D ME@

MDI0+
MDI0-

MDI1+
MDI1-

1

TD+

2
3
4
5
6
7

1
2
3
4
5
6
7

TX+

TD-

TX-

CT

CT

NC

NC

NC

NC

CT

CT

RD+

RX+

RD-8RX-

BOTHHAND_NS0013LF

BOTHHAND_NS0013LF

GIGA@

GIGA@

T1

T1

TD+

TX+

TD-

TX-

CT

CT

NC

NC

NC

NC

CT

CT

RD+

RX+

RD-8RX-

BOTHHAND_NS0013LF

BOTHHAND_NS0013LF

14

G2

13

G1

CHASSIS_GND

2

Reserve for EMI go rural solution

8162@

MDO3+

16

MDO3-

15

MCT3

14
13
12

MCT2

11

MDO2+

10

MDO2-

9

16
15

MCT0

14
13
12

MCT1

11
10
9

8162@

R869 0_0603_5%

R869 0_0603_5%

1 2

R870 0_0603_5%

R870 0_0603_5%

1 2

8162@

8162@

8162@

8162@

R871 0_0603_5%

R871 0_0603_5%

1 2

R872 0_0603_5%

R872 0_0603_5%

1 2

8162@

8162@

MDO0+
MDO0-

MDO1+
MDO1-

CHASSIS_GND

CHASSIS_GND

1

C885

C885

@

@

1 2

1000P_1206_2KV7K

1000P_1206_2KV7K

12

1 2

R784 75_0603_5%R784 75_0603_5%

DL1 LSE-200NX3216TRLF_1206-2

DL1 LSE-200NX3216TRLF_1206-2

Reserve gas tube for EMI go rural solution

Place Close to T1,T2

@

@

C1034 470P_0603_50V8J

C1034 470P_0603_50V8J

1 2

C1035 0.1U_0603_50V4ZC1035 0.1U_0603_50V4Z

1 2

C1036 1U_0603_25V6C1036 1U_0603_25V6

1 2

A A

Security Classification

Security Classification

Security Classification

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LAN_Transformer

LAN_Transformer

LAN_Transformer

LA8611P

LA8611P

LA8611P

29 51Tuesday, November 08, 2011

29 51Tuesday, November 08, 2011

29 51Tuesday, November 08, 2011

1

0.1

0.1

0.1

of

of

of

5

CX20671
High Definition Audio Codec SoC
With Integrated Class-D Stereo
Amplifier.
An integrated 5 V to 3.3 V Low-dropout
voltage regulator (LDO).

An integrated 3.3 V to 1.8V Low-dropout
voltage regulator (LDO).

D D

C C

+3VS

R839 0_0402_5%R839 0_0402_5%

+3VS

+3VALW

1 2

R840 0_0402_5%@R840 0_0402_5%@

1 2

HDA_SYNC_AUDIO<14>

HDA_SDIN0<14>

HDA_SDOUT_AUDIO<14>

CX_GPIO0<35>

EC_MUTE#<33>

+3VS

1

C981

C981

2

1

C992

C992

2

HDA_RST_AUDIO#<14>
HDA_BITCLK_AUDIO<14>

R841 33_0402_5%R841 33_0402_5%

1 2

EAPD<33>

EAPD active low
0=power down ex AMP
1=power up ex AMP

1

C982

C982

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

C993

C993

2

1U_0603_10V4Z

1U_0603_10V4Z

@

@

Internal SPEAKER

B B

Short GND and GNDA on
GND1 & GND2 on layout

R853

@R853

@

1 2

0_0402_5%

0_0402_5%

GND GNDA

PC Beep

EC Beep

ICH Beep

A A

FCH_SPKR<14>

C1009

C1009

BEEP#<33>

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C1010

C1010

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

R858

1 2

33_0402_5%

33_0402_5%

12

@

@

R859

R859
10K_0402_5%

10K_0402_5%

R858

PC_BEEP1 PC_BEEP

1 2

5

C978

C978

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

4

1

1

C979

C979

2

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

C997

C997

2

HDA_RST_AUDIO#
HDA_BITCLK_AUDIO

HDA_SYNC_AUDIO
HDA_SDOUT_AUDIO

PC_BEEP

R8490_0402_5% @ R8490_0402_5% @

12

R8500_0402_5% R8500_0402_5%

SPK_L2+
SPK_L1-

SPK_R2+
SPK_R1-

MIC1

MIC1

1
2

WM-64PCY_2P

WM-64PCY_2P

45@

45@

4

1

C980

C980

2

@

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C983

C983

10 mils

1

C998

C998

2

U45

U45

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

@

@

9

RESET#

5

BIT_CLK

8

SYNC

6

SDATA_IN

4

SDATA_OUT

10

PC_BEEP

CX_GPIO0

38

GPIO0/EAPD#

37

GPIO1/SPK_MUTE#

40

DMIC_CLK

1

DMIC_1/2

11

LEFT+

13

LEFT-

16

RIGHT+

14

RIGHT-

Place colose to Codec chip

+MICBIASC

GNDA

1

1

2

2

C1017

C1017

C1018

C1018

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

@

@

@

@

1

1

C984

C984

2

2

1U_0603_10V4Z

1U_0603_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

7

2

3

29

18

27

VDD_IO

FILT_1.8

FILT_1.65

VAUX_3.3

AVDD_3.3

DVDD_3.3

GND

CX20671-21Z_QFN40_6X6

CX20671-21Z_QFN40_6X6

41

12

R860

R860

2.2K_0402_5%

2.2K_0402_5%

C1012 2.2U_0603_6.3V4ZC1012 2.2U_0603_6.3V4Z

1 2

1

C985

C985

2

28

26

AVDD_5V

AVDD_HP
CLASS-D_REF

1

C986

C986

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

C994

C994

@

@

LPWR_5.0

RPWR_5.0

SENSE_A

PORTB_R

PORTB_L

B_BIAS

C_BIAS

PORTC_R

PORTC_L

PORTA_R

PORTA_L

AVEE
FLY_P
FLY_N

NC
NC
NC

AVDD_3.3 pinis output of
internal LDO. NOT connect
to external supply.

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C995

C995

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

12
15
17

SENSE_A

36

35
34
33

32
31
30

23
22

24
25
39

21
19
20

1 2

C1005 1U_0603_10V4ZC1005 1U_0603_10V4Z

MIC_INR
MIC_INL

+MICBIASB

+MICBIASC

3

+LDO_OUT_3.3V

Layout Note:Path from +5VS to LPWR_5.0
RPWR_5.0 must be very low
resistance (<0.01 ohms)

+5VS

1

1

C996

C996

C999

C999

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1002

C1002

2

Please bypass caps very close to device.

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R847 0_0402_5%R847 0_0402_5%

1 2

C1003

C1003
C1004

C1004

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

MIC_INR

MIC_INL

1

1

C1007

C1007

C1006

C1006

@

@

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

SPK_R1-

L70 FBMA-L11-160808-121LMT_0603L70 FBMA-L11-160808-121LMT_0603

1 2

SPK_R2+

L71 FBMA-L11-160808-121LMT_0603L71 FBMA-L11-160808-121LMT_0603

1 2

SPK_L1-

L72 FBMA-L11-160808-121LMT_0603L72 FBMA-L11-160808-121LMT_0603

1 2

SPK_L2+

L73 FBMA-L11-160808-121LMT_0603L73 FBMA-L11-160808-121LMT_0603

1 2

wide 30MIL

Use SD028000080 (0ohm) for R01
(SM010016720 bead)

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C1000

C1000

C1001

C1001

@

@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

@

@

1 2
1 2

Internal MIC

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

LBSS138LT1G_SOT-23-3

LBSS138LT1G_SOT-23-3

Issued Date

Issued Date

Issued Date

1

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

R848 100_0402_1%R848 100_0402_1%

R852 15_0402_5%

R852 15_0402_5%

1 2

R851 15_0402_5%

R851 15_0402_5%

1 2

Changed from 5.1ohm to 15ohm
for "zi zi"noise.

MIC_JD

13

D

D

Q107

Q107

S

S

PLUG_IN_R

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2

HDA_RST_AUDIO#
HDA_SYNC_AUDIO
HDA_SDOUT_AUDIO

1

1

1

C988

C988

C987

C987

2

2

@

@

@

@

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

+5VS

R842 5.11K_0402_1%R842 5.11K_0402_1%

SENSE_A

R845 2K_0402_5%

R845 2K_0402_5%

R845 & R846 for App & Nokia combo ear phone un-pop

EXT_MIC

HP_OUTR <35>
HP_OUTL <35>

1 2

R843 20K_0402_1%R843 20K_0402_1%

1 2

R844 39.2K_0402_1%R844 39.2K_0402_1%

1 2

+MICBIASB

A@

A@

12

EXT_MIC <35>

External MIC

Headphone

R846 4.7K_0402_5%

R846 4.7K_0402_5%

C989

C989

C991

C991

2

@

@

@

@

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

A@

A@

12

1

2

R838

R838

1 2

0_0402_5%

0_0402_5%

@

@

Sense resistors must be
connected same power
that is used for VAUX_3.3

+3VS

MIC_JD
PLUG_IN_R

HDA_BITCLK_AUDIO

Combo Jack detect (normal close)

33K_0402_5%

2

G

G

CX_GPIO0

@

@

33K_0402_5%

R854

R854

1 2

12

C1008

C1008
1U_0402_6.3V6K

1U_0402_6.3V6K

R857 47K_0402_5%

R857 47K_0402_5%

1 2

1

C1011

C1011

@

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

close to Codec

@

@

@

@

1

1

C1013

C1013

2

1

C1014

C1014

C1015

C1015

2

2

220P_0402_50V7K

220P_0402_50V7K

220P_0402_50V7K

220P_0402_50V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

@

@

@

@

1

C1016

C1016

2

220P_0402_50V7K

220P_0402_50V7K

220P_0402_50V7K

220P_0402_50V7K

EXT_MICEXT_MIC

EXT_MICEXT_MIC

PLUG_IN<35>

SPK_R1-_CONN
SPK_R2+_CONN
SPK_L1-_CONN
SPK_L2+_CONN

D41

@ D41

@

TVNST52302AB0 C/C SOT523

TVNST52302AB0 C/C SOT523

+5VS

12

R855

R855
10K_0402_5%

10K_0402_5%

R856

R856

20K_0402_5%

20K_0402_5%

2

3

2

3

D42

@D42

@

1

1

TVNST52302AB0 C/C SOT523

TVNST52302AB0 C/C SOT523

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

1

R837

@R837

EMI

@

4.7K_0402_5%

4.7K_0402_5%

HDA_RST_AUDIO#

C990

@C990

@

100P_0402_50V8J

100P_0402_50V8J

ESD Reserve

Port B
Port A

PLUG_IN_R

13

D

D

Q108

Q108

2

2N7002_SOT23

2N7002_SOT23

G

G

S

S

JSPK1

JSPK1

1

1

2

2

3

3

4

4

5

GND1

6

GND2

ACES_88231-04001

ACES_88231-04001

ME@

ME@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

CX20671 Codec

CX20671 Codec

CX20671 Codec

LA8611P

LA8611P

LA8611P

1

30 51Monday, November 07, 2011

30 51Monday, November 07, 2011

30 51Monday, November 07, 2011

+3VS

of

of

of

12

1

2

0.1

0.1

0.1

A

B

C

D

E

F

G

H

HDD CONN

JHDD1

JHDD1

SATA_FRX_C_DTX_N1<13>

1 1

+5VS_HDD +3VS

2 2

ODD CONN 15''

SATA_FTX_C_DRX_P2<13>
SATA_FTX_C_DRX_N2<13>

SATA_FRX_C_DTX_N2<13>
SATA_FRX_C_DTX_P2<13>

3 3

SATA_FRX_C_DTX_P1<13>

+5VS +5VS_HDD

1

C615

C615
1000P_0402_50V7K

1000P_0402_50V7K

2

JUMP_43X79

JUMP_43X79

1

2

J10

@ J10

@

2

112

C616

C616

0.1U_0402_16V4Z

0.1U_0402_16V4Z

ODD_DETECT#<14>
ODD_DA#<33>

ODD_DA#_FCH<14>

1

C617

C617
1U_0603_10V6K

1U_0603_10V6K

2

SATA_FTX_DRX_P1<13>
SATA_FTX_DRX_N1<13>

C613 0.01U_0402_16V7KC613 0.01U_0402_16V7K

1 2

C614 0.01U_0402_16V7KC614 0.01U_0402_16V7K

1 2

1

C608

C608
10U_0603_6.3V6M

10U_0603_6.3V6M

2

C969 0.01U_0402_16V7K15@ C969 0.01U_0402_16V7K15@

1 2

C968 0.01U_0402_16V7K15@ C968 0.01U_0402_16V7K15@

1 2

C934 0.01U_0402_16V7K15@ C934 0.01U_0402_16V7K15@

1 2

C935 0.01U_0402_16V7K15@ C935 0.01U_0402_16V7K15@

1 2

R819 0_0402_5%@R819 0_0402_5%@

1 2

R873 0_0402_5%@R873 0_0402_5%@

1 2

R820 0_0402_5%@R820 0_0402_5%@

1 2

R821 10K_0402_5%@R821 10K_0402_5%@

+3VS

1 2

1 3

+3VS

Q46 2N7002_SOT23@

Q46 2N7002_SOT23@

D

D

G

G

2

S

S

SATA_FTX_DRX_P1
SATA_FTX_DRX_N1

SATA_FRX_DTX_N1
SATA_FRX_DTX_P1

+3VS

+5VS_HDD

1

2

SATA_FTX_DRX_P2_15
SATA_FTX_DRX_N2_15

SATA_FRX_DTX_N2_15
SATA_FRX_DTX_P2_15

@

@

C620

C620

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1
2
3
4
5
6
7

8

9
10
11
12
13
14
15
16
17
18
19
20
21
22

SUYIN_127043FB022G278ZR

SUYIN_127043FB022G278ZR

ODD_DETECT#_R
+5V_ODD

ODD_DA#_R

GND
RX+
RX­GND
TX­TX+
GND

3.3V

3.3V

3.3V
GND
GND
GND
5V
5V
5V
GND
Reserved
GND
12V
12V
12V

ME@

ME@

JODD1

JODD1

1
2
3
4
5
6
7
8
9

10
11

12

ACES_87056-01001-001

ACES_87056-01001-001

ME@

ME@

GND
GND

1
2
3
4
5
6
7
8
9
10

GND
GND

23
24

ODD CONN 14''

JODD2

ME@JODD2

SATA_FTX_C_DRX_P2
SATA_FTX_C_DRX_N2

SATA_FRX_C_DTX_N2
SATA_FRX_C_DTX_P2

C967 0.01U_0402_16V7K14@ C967 0.01U_0402_16V7K14@

1 2

C966 0.01U_0402_16V7K14@ C966 0.01U_0402_16V7K14@

1 2

C965 0.01U_0402_16V7K14@ C965 0.01U_0402_16V7K14@

1 2

C964 0.01U_0402_16V7K14@ C964 0.01U_0402_16V7K14@

1 2

SATA_FTX_DRX_P2_14
SATA_FTX_DRX_N2_14

SATA_FRX_DTX_N2_14
SATA_FRX_DTX_P2_14

ODD_DETECT#_R
+5V_ODD

ODD_DA#_R

1
2
3
4
5
6
7

8

9
10
11
12
13

ME@

GND
RX+
RX­GND
TX­TX+
GND

DP
+5V
+5V
MD

GND1

GND

GND2

GND

TYCO_2-1759838-8~D

TYCO_2-1759838-8~D

14
15

BT MODULE CONN

BT@

BT@

R814

R814
100K_0402_5%

100K_0402_5%

BT_ON#<13>

1 2

ODD_EN<13>

+3VS

BT@

BT@

C929

C929

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

D

S

D

S

13

G

G

2

USB20_P4<14>
USB20_N4<14>

BT_ACTIVE<32>

2

IN

+3VS_BT_R

Q81

Q81
PMV65XP_SOT23-3~D

PMV65XP_SOT23-3~D

BT@

BT@

short J12, no zero power ODD function

+5VS

12

@

@

R817

R817
10K_0402_5%

10K_0402_5%

1

OUT

GND

Q83

Q83
DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

3

@

@

+3VS_BT

0_0603_5%

0_0603_5%
R815

BT@R815

BT@

12

BTON_LED:NC

@

@

R818

R818

1 2

100K_0402_5%

100K_0402_5%

30mils

1

2

ACES_87213-0600G

ACES_87213-0600G

ME@

ME@

J12

@ J12

@

112

JUMP_43X79

JUMP_43X79

S

S

G

G

2

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C930

C930

BT@

BT@

JBT1

JBT1

1

1

2

2

3

3

4

4

5

7

5

G1

6

8

6

G2

2

D

D

13

Q82

Q82
PMV65XP_SOT23-3~D

PMV65XP_SOT23-3~D

@

@

@

@

C937

C937

0.01U_0402_16V7K

0.01U_0402_16V7K

+5V_ODD

1

2

@

@

C936

C936
10U_0603_6.3V6M

10U_0603_6.3V6M

1

@

@

C932

C932

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

4 4

A

B

C

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

E

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

F

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

HDD/ODD/BT

HDD/ODD/BT

HDD/ODD/BT

LA8611P

LA8611P

LA8611P

G

of

of

of

31 51Friday, November 04, 2011

31 51Friday, November 04, 2011

31 51Friday, November 04, 2011

H

0.1

0.1

0.1

A

B

C

D

E

Mini-Express Card for WLAN/WiMAX(Half)

+3VS_WLAN+1.5VS

1

C627

C627

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

WL_OFF# <13>

APU_PCIE_RST# <12,17,28>
+3VALW
+3VS_WLAN

FCH_SCLK0 <10,11,14>
FCH_SDATA0 <10,11,14>

USB20_N2 <14>
USB20_P2 <14>

1

@

@

C1023

C1023

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

PCI_RST#_R
CLK_PCI_DB

100_0402_1%

100_0402_1%

R490

R490

R491

R491

100_0402_1%

100_0402_1%

1 2
1 2
1 2
1 2
1 2
1 2

WLAN_WAKE#

+3VS_WLAN

R492

R492
100K_0402_5%

100K_0402_5%

1 2

JWLN1

JWLN1

1

WAKE#

3

NC

5

NC

7

CLKREQ#

9

GND

11

REFCLK-

13

REFCLK+

15

GND

17

NC

19

NC

21

GND

PERST#

23

PERn0

+3.3Vaux

25

PERp0

27

GND

29

GND

SMB_CLK

31

PETn0

SMB_DATA

33

PETp0

35

GND

37

NC

USB_D+

39

NC

41

NC

LED_WWAN#

43

NC

LED_WLAN#

45

NC

LED_WPAN#

47

NC

49

NC

51

NC

53

GND

TAITW_PFPET0-AFGLBG1ZZ4N0

TAITW_PFPET0-AFGLBG1ZZ4N0

ME@

ME@

LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
APU_PCIE_RST#

LPC_AD3 <12,33>
LPC_AD2 <12,33>
LPC_AD1 <12,33>

3.3V

GND

1.5V
NC
NC
NC
NC
NC

GND

NC

GND

+1.5V

GND

USB_D-

GND

+1.5V

GND

+3.3V

GND

LPC_FRAME# <12,33>

LPC_AD0 <12,33>
CLK_PCI_DB <12>

R480 0_0402_5%R480 0_0402_5%

FCH_PCIE_WAKE#<14,28>

1 1

BT_DISABLE#<13>

R525 0_0402_5%R525 0_0402_5%

2 2

1 2

BT_ACTIVE<31>

WLAN_CLKREQ#<14>

CLK_PCIE_WLAN#<12>

CLK_PCIE_WLAN<12>

PCIE_CRX_DTX_N1<5>
PCIE_CRX_DTX_P1<5>

PCIE_CTX_DRX_N1<5>
PCIE_CTX_DRX_P1<5>

EC_TX_P80_DATA<33,34>
EC_RX_P80_CLK<33,34>

1 2

R481 0_0402_5%@R481 0_0402_5%@

1 2

1 2
1 2

For EC to detect
debug card insert.

Reserve for SW mini-pcie debug card.
Series resistors closed to KBC side.

LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R
PCI_RST#_R
CLK_PCI_DB

R493 0_0402_5%@R493 0_0402_5%@
R494 0_0402_5%@R494 0_0402_5%@
R495 0_0402_5%@R495 0_0402_5%@
R496 0_0402_5%@R496 0_0402_5%@
R497 0_0402_5%@R497 0_0402_5%@
R498 0_0402_5%@R498 0_0402_5%@

J5

J5

112

JUMP_43X79

JUMP_43X79

@

@

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

+3VS_WLAN+3VS

2

+1.5VS_WLAN

R484 0_0402_5%@R484 0_0402_5%@
R485 0_0402_5%R485 0_0402_5%

R486 0_0402_5%@R486 0_0402_5%@
R487 0_0402_5%@R487 0_0402_5%@

1

1

2

2

1 2
1 2

1 2
1 2

J6

J6
JUMP_43X79

JUMP_43X79

@

@

LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R

+1.5VS

1

@

@

C628

C628

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

@

@

C629

C629

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

3 3

4 4

Close U33

C782

C782

2200P_0402_50V7K

2200P_0402_50V7K

@

@

C784

C784

2200P_0402_50V7K

2200P_0402_50V7K

REMOTE1+

1

2

REMOTE1-

REMOTE2+

1

2

REMOTE2-

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C785

C785

+3VS

2

1

SMSC thermal sensor
placed near by VRAM

U33

U33

1

REMOTE1+
REMOTE1­REMOTE2+
REMOTE2-

VDD

2

DP1

3

DN1

4

DP2

5

DN2

EMC1403-2-AIZL-TR_MSOP10

EMC1403-2-AIZL-TR_MSOP10

SMCLK

SMDATA

ALERT#

THERM#

GND

Address 1001_101xb

Change from SA000029210 to SA000046C00 for main source

+3VS

12

R674

R674
10K_0402_5%

10K_0402_5%

@

@

10
9
8
7
6

EC_SMB_CK2 <18,24,33>
EC_SMB_DA2 <18,24,33>

REMOTE1+

C783

C783

100P_0402_50V8J

100P_0402_50V8J

REMOTE1-

REMOTE2+

C786

C786

100P_0402_50V8J

100P_0402_50V8J

REMOTE2-

REMOTE1,2+/-:
Trace width/space:10/10 mil
Trace length:<8"

1

@

@

2

1

@

@

2

Close to DDR

C

C

Q72

Q72

2

B

B

MMST3904-7-F_SOT323-3

MMST3904-7-F_SOT323-3

E

E

3 1

Under WLAN

C

C

Q73

@

Q73

@

2

B

B

MMST3904-7-F_SOT323-3

MMST3904-7-F_SOT323-3

E

E

3 1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Mini PCIE/Thermal IC

Mini PCIE/Thermal IC

Mini PCIE/Thermal IC

LA8611P

LA8611P

LA8611P

E

of

32 51Friday, November 04, 2011

of

32 51Friday, November 04, 2011

of

32 51Friday, November 04, 2011

0.1

0.1

0.1

L45

L45

+3VALW +EC_AVCC

+3VALW

+3VALW

+3VS

12

R512

R512
10K_0402_5%

10K_0402_5%

@

@

+3VALW

+3VALW

1

@

@

C650

C650
100P_0402_50V8J

100P_0402_50V8J

2

1 2

FBM-11-160808-601-T_0603

FBM-11-160808-601-T_0603

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

L46 FBM-11-160808-601-T_0603L46 FBM-11-160808-601-T_0603

@

@

C640 22P_0402_50V8J

C640 22P_0402_50V8J

1 2

R502 47K_0402_5%R502 47K_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R507 47K_0402_5%@R507 47K_0402_5%@

1 2

R508 47K_0402_5%@R508 47K_0402_5%@

1 2

EC_FAN_PWM

R518

R518

2.2K_0402_5%

2.2K_0402_5%

R519

R519

2.2K_0402_5%

2.2K_0402_5%

R523

R523

2.2K_0402_5%

2.2K_0402_5%

1

@

@

C651

C651
100P_0402_50V8J

100P_0402_50V8J

2

EC_SMB_CK2_SUS

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

EC_SMB_CK2_SUS

2

C636

C636

1

12

C643

C643

EC_SMB_CK1

EC_SMB_DA1

R524

R524

2.2K_0402_5%

2.2K_0402_5%

EC_SMB_CK2_SUS
EC_SMB_DA2_SUS

6 1

Q113A

Q113A

1

C638

C638

1000P_0402_50V7K

1000P_0402_50V7K

2

ECAGND

@

@

12

R501 10_0402_5%

R501 10_0402_5%

2

1

KSO[0..17]<35>

KSI[0..7]<35>

KSO1
KSO2

+3VS

2.2K_0402_5%

2

DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

2.2K_0402_5%

5

3

Q113B

Q113B

4

R886

R886

+3VS

EC_SMB_CK2_SUS<7>
EC_SMB_DA2_SUS<7>

RTC_CLK<12,16>

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CLK_PCI_EC<12,16>

KSO[0..17]
KSI[0..7]

EC_SMB_CK1<40,41>
EC_SMB_DA1<40,41>

EC_INVT_PWM<25>

EC_TX_P80_DATA<32,34>
EC_RX_P80_CLK<32,34>

FCH_PWRGD<14,47>

EC_FAN_PWM<34>

R887

R887

2.2K_0402_5%

2.2K_0402_5%

C633

0.1U_0402_16V4Z

C633

0.1U_0402_16V4Z

C632

C632

1

2

GATEA20<14>
KBRST#<14>

SERIRQ<12>

LPC_FRAME#<12,32>

LPC_AD3<12,32>
LPC_AD2<12,32>
LPC_AD1<12,32>
LPC_AD0<12,32>

PLT_RST#<12>

EC_SCI#<14>

BATT_LEN#<40>

PM_SLP_S3#<14>
PM_SLP_S5#<14>
EC_SMI#<14>
CMOS_ON#<25>

ODD_DA#<31>
EC_TACH<34>

1 2

R513 0_0402_5%R513 0_0402_5%

EC_SMB_CK2 <18,24,32>

EC_SMB_DA2 <18,24,32>

+3VALW

C634

0.1U_0402_16V4Z

C634

0.1U_0402_16V4Z

C635

0.1U_0402_16V4Z

C635

0.1U_0402_16V4Z

1

1

2

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2_SUS
EC_SMB_DA2_SUS

EC_PME#
EC_TX_P80_DATA
EC_RX_P80_CLK

T68T68

100K_0402_5%

100K_0402_5%

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

EC_SMI#

1

2

2

LPC_AD3
LPC_AD2
LPC_AD1 BATT_TEMP
LPC_AD0

EC_RST#
EC_SCI#

XCLKI
XCLKO

122
123

12

R516

R516

1 2

POP for susclk implemented
20100810

10
12

13
37
20
38

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

77
78
79
80

14
15
16
17
18
19
25
28
29
30
31
32
34
36

C639

1000P_0402_50V7K

C639

1000P_0402_50V7K

C637

1000P_0402_50V7K

C637

1000P_0402_50V7K

1

2

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

LPC & MISC

LPC & MISC

LPC_AD0
CLK_PCI_EC

PCIRST#/GPIO05
EC_RST#
EC_SCII#/GPIO0E
GPIO1D

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25
KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

EC_SMB_CK1/GPIO44
EC_SMB_DA1/GPIO45
EC_SMB_CK2/GPIO46
EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
GPIO0A
GPIO0B
GPIO0C
GPIO0D
EC_INVT_PWM/GPIO11
FAN_SPEED1/GPIO14
EC_PME#/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PCH_PWROK/GPIO18
SUSP_LED#/GPIO19
NUM_LED#/GPIO1A

XCLKI/GPIO5D
XCLKO/GPIO5E

C647

C647
20P_0402_50V8

20P_0402_50V8

1

2

Int. K/B

Int. K/B
Matrix

Matrix

SM Bus

SM Bus

9

PS2 Interface

PS2 Interface

+EC_AVCC

+3VLP

22

33

96

125

67

111

EC_VDD0

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/AVCC

PWM Output

PWM Output

AD Input

AD Input

DA Output

DA Output

CPU1.5V_S3_GATE/GPXIOA00

SPI Device Interface

SPI Device Interface

SPI Flash ROM

SPI Flash ROM

BATT_CHG_LED#/GPIO52

GPIO

GPIO

BATT_LOW_LED#/GPIO55

EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

H_PROCHOT#_EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

GPO

GPIO

GPIO

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

GPI

GPI

PECI_KB9012/GPXIOD07

GND/GND

GND/GND

GND/GND

AGND/AGND

GND/GND

GND0

11

24

35

69

94

113

ECAGND

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

GPIO0F

BEEP#/GPIO10

GPIO12

ACOFF/GPIO13

BATT_TEMP/GPIO38

GPIO39

ADP_I/GPIO3A

GPIO3B

GPIO42

IMON/GPIO43

DAC_BRIG/GPIO3C

EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01
HDA_SDO/GPXIOA02
VCIN0_PH/GPXIOD00

SPIDI/GPIO5B

SPIDO/GPIO5C

SPICLK/GPIO58

SPICS#/GPIO5A

ENBKL/GPIO40

PECI_KB930/GPIO41

FSTCHG/GPIO50

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

SYSON/GPIO56
VR_ON/GPIO57

PM_SLP_S4#/GPIO59

BKOFF#/GPXIOA08

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

GPXIOD06

V18R

KB9012QF A3 LQFP 128P_14X14

KB9012QF A3 LQFP 128P_14X14

Issued Date

Issued Date

Issued Date

U31

U31

21

BEEP#

23
26

ACOFF

27

63
64
65
66

BRDID

75
76

68
70
71
72

83

USB_ON#

84

INT#

85
86

TP_CLK

87

TP_DATA

88

97
98
99
109

119
120
126
128

ENBAKL

73

RST#

74
89
90

CAPS_LED#

91
92
93

SYSON

95
121
127

100

EC_LID_OUT#

101

Turbo_V

102

H_PROCHOT#_EC

103
104

BKOFF#

105

PBTN_OUT#

106
107
108

ACIN

110

EC_ON

112
114

LID_SW#

115

SUSP#

116
117
118

V18R

124

1

C646

C646

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

BEEP# <30>
NOVO# <35>
ACOFF <41>

BATT_TEMP <40>

ADP_I <40,41>

APU_IMON <47>

EC_MUTE#

EC_MUTE# <30>

EAPD <30>

TP_CLK <35>

TP_DATA <35>

VGATE <47>
VLDT_EN <44>

NTC_V <40>

ENBAKL <24>

BATT_CHG_LED# <35>

CAPS_LED# <35>
PWR_LED# <35>

BATT_LOW_LED# <35>

SYSON <38,43>

VR_ON <47>

EC_RSMRST# <14>

EC_LID_OUT# <14>

Turbo_V <40>
MAINPWON <7,40,42>

BKOFF# <24,25>

PBTN_OUT# <14>
VGA_GATE# <14>

ACIN <18,41>
EC_ON <35,42>
ON/OFF <35>
LID_SW# <35>

SUSP# <38,44,46>

Compal Secret Data

Compal Secret Data

Compal Secret Data

R503 10K_0402_5%R503 10K_0402_5%

USB_ON# <35,36,37>

Deciphered Date

Deciphered Date

Deciphered Date

1 2

@

@

R757

R757

0_0402_5%

0_0402_5%

+5VS

TP_CLK

R499 4.7K_0402_5%R499 4.7K_0402_5%

TP_DATA

BATT_TEMP
ACIN

USB_ON#

BRDID

+3VALW

1 2

R500 4.7K_0402_5%R500 4.7K_0402_5%

1 2

1 2

C641 100P_0402_50V8JC641 100P_0402_50V8J

1 2

C642 100P_0402_50V8JC642 100P_0402_50V8J

R504 10K_0402_5%R504 10K_0402_5%

1 2

Ra

R505 100K_0402_5%R505 100K_0402_5%

1 2

R506 33K_0402_5%R506 33K_0402_5%

1 2

Rb

+5VALW

+3VALW

ID BRD ID Ra Rb Vab

R10 MP0

R03 PVT

1

R02 DVT

2

3

12

PROCHOT <40>

LAN_WAKE#<28>

H_PROCHOT#_EC

R520 0_0402_5%R520 0_0402_5%

+3VS

+5VS

1 2

RST#
EC_SMB_DA2

EC_SMB_CK2
INT#

2

G

G

x

100K

100K

100K

13

D

D

Q109

Q109

2N7002H_SOT23-3

2N7002H_SOT23-3

S

S

+3VALW

8.2K

18K

33K

EC_TACH

SUSP#

H_PROCHOT# <7,40,47>

R517

R517
10K_0402_5%

10K_0402_5%

1 2

JCAP1

JCAP1

1
2
3
4
5
6
7
8

9

10

ACES_50521-0084N-P01

ACES_50521-0084N-P01

ME@

ME@

0

EC_PME#

1
2
3
4
5
6
7
8

GND1
GND2

1

2

0V

0.25V

0.5V

0.82VR01 EVT

+3VS

12

R509

R509
10K_0402_5%

10K_0402_5%

@

@

C645

C645
1000P_0402_50V7K

1000P_0402_50V7K

For Cap sensor function

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

KB9012/Cap sensor

KB9012/Cap sensor

KB9012/Cap sensor

LA8611P

LA8611P

LA8611P

33 51Friday, November 04, 2011

33 51Friday, November 04, 2011

33 51Friday, November 04, 2011

0.1

0.1

0.1

of

of

of

5

4

3

2

1

D D

FAN CONN

+5VS

JFAN1

JFAN1

1

1

1

C626

C626
10U_0603_6.3V6M

10U_0603_6.3V6M

2

C C

B B

EC_TACH<33>

EC_FAN_PWM<33>

2

2

3

3

4

4

5

G5

6

G6

ACES_85205-04001

ACES_85205-04001

ME@

ME@

H1

H1
HOLEA

HOLEA

1

H_3P8

H_3P8

H6

H6
HOLEA

HOLEA

1

H_2P8

H_2P8

H2

H2
HOLEA

HOLEA

1

H_3P8

H_3P8

H7

H7
HOLEA

HOLEA

H_2P8

H_2P8

EC_TX_P80_DATA<32,33>
EC_RX_P80_CLK<32,33>

H3

H3
HOLEA

HOLEA

1

H_3P8

H_3P8

H8

H8

H9

H9

HOLEA

HOLEA

HOLEA

HOLEA

1

1

H_2P8

H_2P8

1

H_2P8

H_2P8

2P8 * 9 pcd

EC DEBUG PORT

+3VALW

VGA_L VGA_RCPU

H4

H4
HOLEA

HOLEA

1

H_3P3

H_3P3

BA

H10

H10

H11

H11

HOLEA

HOLEA

HOLEA

HOLEA

1

1

H_2P8

H_2P8

H_2P8

H_2P8

H5

H5
HOLEA

HOLEA

1

H_3P3

H_3P3

H12

H12
HOLEA

HOLEA

H_2P8

H_2P8

1

JECDP1

JECDP1

1

1

2

2

3

3

4

4

ACES_85205-0400

ACES_85205-0400

ME@

ME@

H13

H13

H14

H14

HOLEA

HOLEA

HOLEA

HOLEA

1

H_2P8

H_2P8

H_2P8

H_2P8

D

FD1FD1

FD2FD2

1

1

M/B

LR

H15

H15
HOLEA

HOLEA

1

1

H_3P0X4P0N

H_3P0X4P0N

FD3FD3

1

橢圓孔

H16

H16
HOLEA

HOLEA

1

H_3P0X4P0N

H_3P0X4P0N

FD4FD4

1

M/B

圓孔

H17

H17
HOLEA

HOLEA

1

H_3P0N

H_3P0N

E

A A

5

4

Security Classification

Security Classification

Security Classification

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

FAN/SCREW/EC Debug

FAN/SCREW/EC Debug

FAN/SCREW/EC Debug

LA8611P

LA8611P

LA8611P

34 51Friday, November 04, 2011

34 51Friday, November 04, 2011

34 51Friday, November 04, 2011

1

of

of

of

0.1

0.1

0.1

ON/OFF switch

Power Button

TOP Side

Bottom Side

EC_ON<33,42>

SW3

SW3
SMT1-05_4P

SMT1-05_4P

1
2

ON/OFFBTN#

5

6

J13

J13

1 2

SHORT PADS

SHORT PADS

3
4

1

DAN202UT106_SC70-3

DAN202UT106_SC70-3

@

@

R641

R641
10K_0402_5%

10K_0402_5%

1 2

R720

R720

1 2

0_0402_5%

0_0402_5%

D24

@D24

@

+3VLP +3VALW

R701

R701
100K_0402_5%

100K_0402_5%

1 2

3
2

13

D

D

@

@

2

G

Q106

G

Q106
2N7002_SOT23-3

2N7002_SOT23-3

S

S

R535
100K_0402_5%

100K_0402_5%

1 2

KSI[0..7]
KSO[0..17]

KSO2 KSO1

@R535

@

ON/OFF <33>

51_ON# <39>

KSO15
KSO6
KSO8
KSO13
KSO12
KSO11
KSO10
KSO3
KSO4
KSI0
KSO0

C940 100P_0402_50V8J@C940 100P_0402_50V8J@

1 2

C942 100P_0402_50V8J@C942 100P_0402_50V8J@

1 2

C944 100P_0402_50V8J@C944 100P_0402_50V8J@

1 2

C946 100P_0402_50V8J@C946 100P_0402_50V8J@

1 2

C948 100P_0402_50V8J@C948 100P_0402_50V8J@

1 2

C950 100P_0402_50V8J@C950 100P_0402_50V8J@

1 2

C952 100P_0402_50V8J@C952 100P_0402_50V8J@

1 2

C954 100P_0402_50V8J@C954 100P_0402_50V8J@

1 2

C956 100P_0402_50V8J@C956 100P_0402_50V8J@

1 2

C958 100P_0402_50V8J@C958 100P_0402_50V8J@

1 2

C960 100P_0402_50V8J@C960 100P_0402_50V8J@

1 2

C962 100P_0402_50V8J@C962 100P_0402_50V8J@

1 2

KSI[0..7] <33>
KSO[0..17] <33>

CONN PIN define need double check

INT_KBD Conn.

KSO16

C938 100P_0402_50V8J@C938 100P_0402_50V8J@

1 2

KSO17

C939 100P_0402_50V8J@C939 100P_0402_50V8J@

1 2

C941 100P_0402_50V8J@C941 100P_0402_50V8J@

1 2

KSO7

C943 100P_0402_50V8J@C943 100P_0402_50V8J@

1 2

KSI2

C945 100P_0402_50V8J@C945 100P_0402_50V8J@

1 2

KSO5

C947 100P_0402_50V8J@C947 100P_0402_50V8J@

1 2

KSI3

C949 100P_0402_50V8J@C949 100P_0402_50V8J@

1 2

KSO14

C951 100P_0402_50V8J@C951 100P_0402_50V8J@

1 2

KSI7

C953 100P_0402_50V8J@C953 100P_0402_50V8J@

1 2

KSI6

C955 100P_0402_50V8J@C955 100P_0402_50V8J@

1 2

KSI5

C957 100P_0402_50V8J@C957 100P_0402_50V8J@

1 2

KSI4

C959 100P_0402_50V8J@C959 100P_0402_50V8J@

1 2

KSO9

C961 100P_0402_50V8J@C961 100P_0402_50V8J@

1 2

KSI1

C963 100P_0402_50V8J@C963 100P_0402_50V8J@

1 2

Reserve for ESD.

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6

KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
KSO16
KSO17

JKB1

JKB1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

GND

29

30

GND

30

ACES_88514-3001

ACES_88514-3001

ME@

ME@

FOR 14"

JKB2

JKB2

26

GND2

25

GND1

KSI1

24

24

KSI7

23

23

KSI6

22

22

KSO9

21

21

KSI4

20

20

KSI5

19

19

KSO0

18

18

KSI2

17

17

KSI3

16

16

KSO5

15

15

KSO1

14

14

KSI0

13

13

KSO2

12

12

KSO4

11

11

KSO7

10

10

KSO8

9

9

KSO6

8

8

KSO3

7

7

KSO12

6

6

KSO13

5

5

KSO14

4

4

KSO11

3

3

KSO10

2

2

KSO15

31
32

1

1

ACES_88514-2401

ACES_88514-2401

ME@

ME@

Power Button Board Conn. 8pin

+3VALW+3VLP

R642

R642
100K_0402_5%

100K_0402_5%

1 2

1 2

D26

D26

2

1

3

DAN202UT106_SC70-3

DAN202UT106_SC70-3

NOVO_BTN#

NOVO#<33>

ON/OFF
51_ON#

R532

@R532

@

100K_0402_5%

100K_0402_5%

NOVO#

R725

R725

0_0402_5%

0_0402_5%

1 2
1 2

R722

@R722

@

0_0402_5%

0_0402_5%

FOR 14"

14@

14@

LED1

LED1

White

PWR_LED#<33>

BATT_LOW_LED#

BATT_LOW_LED#<33>

BATT_CHG_LED#

BATT_CHG_LED#<33>

CAPS_LED#<33>

+3VALW

Lid Switch

4
3

PWR_LED#

19-213A-T1D-CP2Q2HY-3T_WHITE

19-213A-T1D-CP2Q2HY-3T_WHITE
LED2

Orange

BATT_LOW_LED#

2nd source SC500005910 S
LED LTST-C191KFKT-5A 0603 ORANGE

BATT_CHG_LED#

CAPS_LED#

14@

14@

C716

C716

0.1U_0402_16V4Z

0.1U_0402_16V4Z

LR

SW4

14@SW4

14@

SMT1-05_4P

SMT1-05_4P

5

6

2

SW_L

1

HT-191UD5_AMBER

HT-191UD5_AMBER
LED5

White

19-213A-T1D-CP2Q2HY-3T_WHITE

19-213A-T1D-CP2Q2HY-3T_WHITE

White

19-213A-T1D-CP2Q2HY-3T_WHITE

19-213A-T1D-CP2Q2HY-3T_WHITE

2

1

OUTPUT

2

1

S-5711ACDL-M3T1S_SOT23-3

S-5711ACDL-M3T1S_SOT23-3

R628

nonBBH@R628

nonBBH@

0_0402_5%

0_0402_5%

12

R629

14@R629

14@

0_0402_5%

0_0402_5%

12

R644

14@R644

12

300_0402_5%

300_0402_5%

R764

12

470_0402_5%

470_0402_5%

R765

12

300_0402_5%

300_0402_5%

R8

12

300_0402_5%

300_0402_5%

LID_SW#

2

14@

14@

C717

C717
10P_0402_50V8J

10P_0402_50V8J

1

4
3

5

14@

14@R764

14@

14@R765

14@

14@R8

14@

6

+5VALW

+3VALW

+5VALW

+5VS

SW5
SMT1-05_4P

SMT1-05_4P

2
1

21

14@LED2

14@

21

14@LED5

14@

21

14@

14@

LED6

LED6

21

R616

R616

1 2

100K_0402_5%

100K_0402_5%

VDD

3

GND

U37

14@U37

14@

TP_2

TP_3 SW_R

LID_SW# <33>

14@SW5

14@

R626
0_0402_5%

0_0402_5%

R627
0_0402_5%

0_0402_5%

nonBBH@R626

nonBBH@

12

14@R627

14@

12

TP_1

TP_2

+5VALW

JPWRB1

JPWRB1

ME@

ME@

1

1

2

2

3

3

G1

4

4

G2

E-T_7182K-F04N-00R

E-T_7182K-F04N-00R

D25

@D25

@

PJSOT24C 3P C/A SOT-23

PJSOT24C 3P C/A SOT-23

5
6

3

1

NOVO_BTN#
ON/OFFBTN#

2

IO board USB port

+5VALW +USB_VCCB

U42

@L47

@

U42

1

GND

2

VIN3VOUT

4

EN

G547I2P81U_MSOP8

G547I2P81U_MSOP8

2

2

USB20_P1_R

3

3

8

VOUT
VOUT7VIN

6
5

FLG

EMI request

USB20_N5USB20_N1_R USB20_N5_RUSB20_N1

1

4

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C1020

C1020

12

USB_ON#<33,36,37>

L47

1

1

USB20_P1 USB20_P5 USB20_P5_R

4

4

WCM-2012-900T_4P

WCM-2012-900T_4P

FOR 15"

LED B/D Conn

+5VALW
+3VALW

+5VS

LID_SW#
PWR_LED#

BATT_LOW_LED#
BATT_CHG_LED#
CAPS_LED#
SW_R
SW_L

JLED1

JLED1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

GND

14

GND

ACES_88058-120N

ACES_88058-120N

ME@

ME@

2 1

check U40 !

USB_OC2# <14>

@

@

1

C1019

C1019
1000P_0402_50V7K

1000P_0402_50V7K

2

L57

@L57

@

1

4

WCM-2012-900T_4P

WCM-2012-900T_4P

pin 6 5 4 3 2 1

14 VDD CLK DAT L R GND

15 VDD CLK DAT GND L R

BB-H VDD CLK DAT GND NC NC

BB-L VDD CLK DAT GND L R

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

J14

2MM

2MM

2

2

3

3

Issued Date

Issued Date

Issued Date

+USB_VCCB+USB_VCCA

@J14

@

TP_CLK<33>
TP_DATA<33>

+5VS

C697

C697

100P_0402_50V8J

100P_0402_50V8J

Card Reader/Audio Jack SB CONN

+3VS

USB20_N1<14>
USB20_P1<14>

USB20_N5<14>
USB20_P5<14>

CX_GPIO0<30>

+MICBIASB

1

C733

C733
470P_0402_50V7K

470P_0402_50V7K

2

+5VS

+3VS

C696 0.1U_0402_16V4ZC696 0.1U_0402_16V4Z

2

3

1

Deciphered Date

Deciphered Date

Deciphered Date

HP_OUTR<30>
HP_OUTL<30>

EXT_MIC<30>

PLUG_IN<30>

R687 0_0402_5%R687 0_0402_5%
R686 0_0402_5%R686 0_0402_5%

R534 0_0402_5%R534 0_0402_5%
R533 0_0402_5%R533 0_0402_5%

R889 0_0402_5%

R889 0_0402_5%

12

nonBBH@

nonBBH@

R890 0_0402_5%

R890 0_0402_5%

12

BBH@

BBH@

15@

15@

R643

R643

12

0_0402_5%

0_0402_5%
R619

R619

12

0_0402_5%

0_0402_5%

14@

14@

AN@

AN@

R894 0_0402_5%

R894 0_0402_5%
R895 0_0402_5%

R895 0_0402_5%

A@

A@

6.3Φ * 5.9
SF000001500

1

@

@

2

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

12
12

+USB_VCCB

C734

C734

220U_6.3V_M

220U_6.3V_M

1

@

@

C698

C698
100P_0402_50V8J

100P_0402_50V8J

2

PSOT24C_SOT23-3

PSOT24C_SOT23-3

CR_GND

1

+

+

2

@

@

D15

D15

Compal Secret Data

Compal Secret Data

Compal Secret Data

JCR1

JCR1

1

1

2

2

3

3

4

4

5

5

6

USB20_N1_R

12

USB20_P1_R

12

CR_GND
USB20_N5_R

12

USB20_P5_R

12

R690 0_0402_5%AN@ R690 0_0402_5%AN@

12

R689 0_0402_5%AN@ R689 0_0402_5%AN@

12

R699 0_0402_5%A@ R699 0_0402_5%A@

12

R691 0_0402_5%A@ R691 0_0402_5%A@

12

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

GND

18

GND

ACES_51524-0160N-001

ACES_51524-0160N-001

ME@

ME@

To TP/B Conn.

JTP1

JTP1

8

GND

7

GND

6

6

5

5

4

4

3

3

2

2

1

1

ACES_88058-060N

ACES_88058-060N

ME@

ME@

1

1

C541

C541

C540

C540

@

@

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

KBD/PWR/CR/LED/TP Conn.

KBD/PWR/CR/LED/TP Conn.

KBD/PWR/CR/LED/TP Conn.

LA8611P

LA8611P

LA8611P

0.1

0.1

35 51Monday, November 07, 2011

35 51Monday, November 07, 2011

35 51Monday, November 07, 2011

0.1

of

of

of

TP_3

TP_1

TP_CLK
TP_DATA
TP_3
TP_2
TP_1

@

@

0.1U_0402_10V6K

0.1U_0402_10V6K

A

B

C

D

E

unpop this MOS, need to short J14 !

1 1

@

@

C976

2 2

C976

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

+5VALW +USB_VCCA

USB_ON#<33,35,37>

@

@

U40

U40

1

GND

VOUT

2

VOUT

VIN
VIN3VOUT

4

FLG

EN

G547I2P81U_MSOP8

G547I2P81U_MSOP8

8
7
6
5

@

@

1

C977

C977
1000P_0402_50V7K

1000P_0402_50V7K

2

USB_OC1# <14>

Right Ext.USB FFC Conn.

+USB_VCCA

+USB_VCCA

1

1

+

+

C974

C974

220U_6.3V_M

220U_6.3V_M

3 3

6.3Φ * 5.9
SF000001500

2

C975

C975
470P_0402_50V7K

470P_0402_50V7K

2

USB20_P0 USB20_P0_R

USB20_N0 USB20_N0_R

USB20_N0<14>
USB20_P0<14>

WCM-2012-900T_4P

WCM-2012-900T_4P

4

1

L69

L69

W=80mils

4

1

R835 0_0402_5%R835 0_0402_5%
R836 0_0402_5%R836 0_0402_5%

3

3

2

2

JUSB4

JUSB4

1
12
12

USB20_N0_R
USB20_P0_R

2

3

D40

@D40

@

1

PJDLC05_SOT23-3

PJDLC05_SOT23-3

1

2

2

3

4

E-T_7182K-F04N-00R

E-T_7182K-F04N-00R

3
4

ME@

ME@

5

G1

6

G2

Update to SM070001S00 for EMI request

4 4

Security Classification

Security Classification

Security Classification

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

USB cable port

USB cable port

USB cable port

LA8611P

LA8611P

LA8611P

36 51Monday, November 07, 2011

36 51Monday, November 07, 2011

36 51Monday, November 07, 2011

E

0.1

0.1

0.1

of

of

of

5

4

3

2

1

For EMI/ESD request

D23

D23

@

@

10

10

U3RXDN1 U3RXDN1

D D

0.1U_0402_16V7K

0.1U_0402_16V7K

C C

USB30_N10<14>

USB30_P10<14>

USB30_FTX_DRX_P0<14>

USB30_FTX_DRX_N0<14>

USB30_FRX_DTX_P0<14>

USB30_FRX_DTX_N0<14>

+USB3_VCCA +USB3_VCCA

B B

A A

U3TXDP1
U3TXDN1

U2DP1
U2DN1

U3RXDP1
U3RXDN1

+5VALW +USB3_VCCA

C692

C692

1 2

USB_ON#<33,35,36>

C847

C847
C849

C849

1
2

4

2A/Active Low

1 2

0.1U_0402_16V7K

0.1U_0402_16V7K

1 2

0.1U_0402_16V7K

0.1U_0402_16V7K

W=80mils

U39

U39

GND
VIN
VIN3VOUT
EN

G547I2P81U_MSOP8

G547I2P81U_MSOP8

VOUT
VOUT

FLG

U3TXDP1_L
U3TXDN1_L

8
7
6
5

USB_OC0# <14>

@

@

1

C1024

C1024
1000P_0402_50V7K

1000P_0402_50V7K

2

USB30_N11<14>

USB30_P11<14>

USB30_FTX_DRX_P1<14>

USB30_FTX_DRX_N1<14>

USB30_FRX_DTX_P1<14>

USB30_FRX_DTX_N1<14>

LP1

W=80mils W=80mils

JUSB2

JUSB2

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

TAITW_PUBAU1-09FNLSCNN4H0

TAITW_PUBAU1-09FNLSCNN4H0

ME@

ME@

GND
GND
GND
GND

10
11
12
13

U3TXDP2
U3TXDN2

U2DP2
U2DN2

U3RXDP2
U3RXDN2

C848

C848
C850

C850

LP2

+USB3_VCCA

1

C749

C749

C748

C748

1

+

+

2

2

470P_0402_50V7K

470P_0402_50V7K

220U_6.3V_M

220U_6.3V_M

1 2
1 2

JUSB3

JUSB3

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

TAITW_PUBAU1-09FNLSCNN4H0

TAITW_PUBAU1-09FNLSCNN4H0

ME@

ME@

U3TXDP2_L

0.1U_0402_16V7K

0.1U_0402_16V7K

U3TXDN2_L

0.1U_0402_16V7K

0.1U_0402_16V7K

10

GND

11

GND

12

GND

13

GND

USB30_FRX_DTX_P0 U3RXDP1

USB30_FRX_DTX_P0

9

U3RXDP1
U3TXDN1
U3TXDP1

U3RXDN2
U3RXDP2

U3TXDP2

9

9

8

7

7

7

6

6

6

YSCLAMP0524P_SLP2510P8-10-9

YSCLAMP0524P_SLP2510P8-10-9

10

10

9

9

9

8

7

7

7

6

6

6

YSCLAMP0524P_SLP2510P8-10-9

YSCLAMP0524P_SLP2510P8-10-9

U3TXDN1_L

U3TXDP1_L

USB30_N10

USB30_P10

1

4

1

4

1

4

U3TXDP1_L
U3TXDN1_L

USB30_P10
USB30_N10

1

1
2

2
4

4
5

5
3

3

8

8

D29

D29

@

@

1

1
2

2
4

4
5

5
3

3

8

8

WCM-2012-900T_4P

WCM-2012-900T_4P

1

4

L49

@L49

@

WCM-2012-900T_4P

WCM-2012-900T_4P

1

4

L50

@L50

@

WCM-2012-900T_4P

WCM-2012-900T_4P

1

4

L51

L51

@

@

U3TXDP1

R544

R544

1 2
1 2
1 2
1 2
1 2
1 2

R545

R545
R546

R546
R547

R547
R550

R550
R551

R551

0_0402_5%

0_0402_5%

U3TXDN1

0_0402_5%

0_0402_5%

U3RXDP1

0_0402_5%

0_0402_5%

U3RXDN1USB30_FRX_DTX_N0

0_0402_5%

0_0402_5%

U2DP1

0_0402_5%

0_0402_5%

U2DN1

0_0402_5%

0_0402_5%

1

U3RXDP1

2

U3TXDN1

4

U3TXDP1

5
3

U3RXDN2

1

U3RXDP2

2

U3TXDN2U3TXDN2

4

U3TXDP2

5
3

2

2

3

3

2

2

3

3

2

2

3

3

U2DP1

U2DP2

U3TXDN1

U3TXDP1

U3RXDN1USB30_FRX_DTX_N0

U2DN1

U2DP1

USB30_FRX_DTX_P1

D22

D22

@

@

3

I/O2

2

GND

1

I/O1

AZC099-04S.R7G_SOT23-6

AZC099-04S.R7G_SOT23-6

D30

D30

@

@

3

I/O2

2

GND

1

I/O1

AZC099-04S.R7G_SOT23-6

AZC099-04S.R7G_SOT23-6

U3TXDN2_L

U3TXDP2_L

USB30_FRX_DTX_P1 U3RXDP2

USB30_N11

USB30_P11

U3TXDP2_L
U3TXDN2_L

USB30_P11
USB30_N11

1 2
1 2
1 2
1 2
1 2
1 2

6

I/O4

5

VDD

4

I/O3

6

I/O4

5

VDD

4

I/O3

WCM-2012-900T_4P

WCM-2012-900T_4P

1

1

4

4

L53

@L53

@

WCM-2012-900T_4P

WCM-2012-900T_4P

1

1

4

4

L54

@L54

@

WCM-2012-900T_4P

WCM-2012-900T_4P

1

1

4

4

L55

L55

@

@

U3TXDP2

R631

R631

0_0402_5%

0_0402_5%

U3TXDN2

R632

R632

0_0402_5%

0_0402_5%

U3RXDP2

R633

R633

0_0402_5%

0_0402_5%

U3RXDN2USB30_FRX_DTX_N1

R634

R634

0_0402_5%

0_0402_5%

R635

R635

U2DP2

0_0402_5%

0_0402_5%

U2DN2

R636

R636

0_0402_5%

0_0402_5%

U2DN1

U2DN2

2

3

2

3

2

3

2

3

2

3

2

3

+5VALW

+5VALW

U3TXDN2

U3TXDP2

U3RXDN2USB30_FRX_DTX_N1

U2DN2

U2DP2

Security Classification

Security Classification

Security Classification

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Left USB3.0

Left USB3.0

Left USB3.0

LA8611P

LA8611P

LA8611P

37 51Friday, November 04, 2011

37 51Friday, November 04, 2011

37 51Friday, November 04, 2011

1

0.1

0.1

0.1

of

of

of

A

B

C

D

E

+3VALW TO +3VS+5VALW TO +5VS

U35

U34

+5VALW

DMN3030LSS-13_SOP8L-8

DMN3030LSS-13_SOP8L-8

8

1

C702

C702
10U_0603_6.3V6M

1 1

10U_0603_6.3V6M

2

+VSB

2

G

G

+1.1VALW to +1.1VS

SUSP

1

2

+VSB

2

G

G

2 2

7
5

R584

R584
20K_0402_5%

20K_0402_5%

5VS_GATE

10K_0402_5%

10K_0402_5%

13

D

D

Q59

Q59
2N7002K_SOT23-3

2N7002K_SOT23-3

S

S

+1.1VALW +1.1VS

C712

C712
10U_0603_6.3V6M

10U_0603_6.3V6M

12

75K_0402_5%

75K_0402_5%
R594

R594

1.1VS_GATE 1.1VS_GATE_R

13

D

D

Q65

Q65

2N7002K_SOT23-3

2N7002K_SOT23-3

S

S

U34

1
2
36

4

5VS_GATE_R

R587

R587

12

R688

R688

0_0402_5%

0_0402_5%

@

@

1 2

U36

R669

R669

12

U36

4

R596

R596
0_0402_5%

0_0402_5%

1 2

@

@

DMN3030LSS-13_SOP8L-8

DMN3030LSS-13_SOP8L-8

8
7

5

10K_0402_5%

10K_0402_5%

+5VS

1

C703

C703
10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

C708

C708

0.1U_0603_25V7K

0.1U_0603_25V7K

2

1
2

1

36

2

C713

C713
10U_0603_6.3V6M

10U_0603_6.3V6M

1

C715

C715

0.1U_0603_25V7K

0.1U_0603_25V7K

2

1

C704

C704
1U_0603_10V6K

1U_0603_10V6K

2

1

C714

C714
1U_0603_10V6K

1U_0603_10V6K

2

12

R582

R582
470_0603_5%

470_0603_5%

@

@

13

D

D

S

S

12

13

D

D

S

S

SUSP

2

G

G

Q56

Q56
2N7002_SOT23

2N7002_SOT23

@

@

R590

R590
470_0603_5%

470_0603_5%

@

@

SUSP

2

G

G

Q62

Q62
2N7002_SOT23

2N7002_SOT23

@

@

SUSP

+3VALW

DMN3030LSS-13_SOP8L-8

DMN3030LSS-13_SOP8L-8

8

1

C705

C705
10U_0603_6.3V6M

10U_0603_6.3V6M

2

2

G

G

7
5

+VSB

12

R585

R585
47K_0402_5%

47K_0402_5%

3VS_GATE 3VS_GATE_R

13

D

D

Q60

Q60

2N7002K_SOT23-3

2N7002K_SOT23-3

S

S

U35

+3VS

1
2

1

36

C706

C706
10U_0603_6.3V6M

10U_0603_6.3V6M

12

R589

R589
0_0402_5%

0_0402_5%

@

@

1 2

2

SUSP

1

2

DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

4

R668

R668

10K_0402_5%

10K_0402_5%

SUSP<45>

SUSP#<33,44,46> SYSON<33,43>

C709

C709

0.1U_0603_25V7K

0.1U_0603_25V7K

12

R591

R591
100K_0402_5%

100K_0402_5%

2

1

C707

C707
1U_0603_10V6K

1U_0603_10V6K

2

+5VALW+RTCBATT

Q63

Q63

IN

D

D

S

S

12

@

@

R592

R592
100K_0402_5%

100K_0402_5%

1

OUT

GND

3

12

R583

R583
470_0603_5%

470_0603_5%

@

@

13

2

G

G

Q57

Q57
2N7002_SOT23

2N7002_SOT23

@

@

SUSP

+1.5V to +1.5VS

C699

C699

10U_0603_6.3V6M

10U_0603_6.3V6M

+5VALW

12

100K_0402_5%

100K_0402_5%
R586

R586

1.5VS_GATE 1.5VS_GATE_R

13

D

SUSP#SUSP

D

2

G

G

S

S

+1.5V

1

AP2301GN-HF_SOT23-3

AP2301GN-HF_SOT23-3

2

R588

R588

1 2

75K_0402_5%

75K_0402_5%

Q61

Q61
2N7002K_SOT23-3

2N7002K_SOT23-3

SYSON#

SYSON

Q55

Q55

3 1

2

1

@

@

C710

C710

2

0.1U_0603_25V7K

0.1U_0603_25V7K

@

@

R593

R593

100K_0402_5%

100K_0402_5%

2

IN

+1.5VS

1

2

+5VALW

12

1

OUT

GND

3

1

@

@

C700

C700
10U_0603_6.3V6M

10U_0603_6.3V6M

2

C711

C711

0.1U_0402_25V6

0.1U_0402_25V6

Q64

Q64
DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

@

@

1

C701

C701
1U_0603_10V6K

1U_0603_10V6K

2

12

R581

R581
470_0603_5%

470_0603_5%

@

@

13

D

D

Q58

Q58

S

S

2N7002_SOT23

2N7002_SOT23

@

@

SUSP

2

G

G

3 3

+1.5V +0.75VS

12

R597

R597
470_0603_5%

470_0603_5%

@

@

13

D

D

SYSON# SUSP

2

G

G

Q66

Q66

S

S

2N7002_SOT23

2N7002_SOT23

@

@

4 4

12

R598

R598
470_0603_5%

470_0603_5%

@

@

13

D

D

2

G

G

Q67

Q67

S

S

2N7002_SOT23

2N7002_SOT23

@

@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DC Interface

DC Interface

DC Interface

LA8611P

LA8611P

LA8611P

38 51Tuesday, November 08, 2011

38 51Tuesday, November 08, 2011

38 51Tuesday, November 08, 2011

E

0.1

0.1

0.1

of

of

of

5

4

3

2

1

2

12

PQ104

@PQ104

@

2

VIN

12

100P_0402_50V8J

100P_0402_50V8J

PC103

PC103

PC104

PC104

1000P_0402_50V7K

1000P_0402_50V7K

VIN

@PD103

@

PD103

1 2

LL4148_LL34-2

LL4148_LL34-2

51ON-1

12

12

PR119

PR119

PR118

PR118

@

@

@

@

13

@

@

PC113

PC113

12

68_1206_5%

68_1206_5%

68_1206_5%

68_1206_5%

0.1U_0603_25V7K

0.1U_0603_25V7K

VS

DC030006J00

PF101

4

4

3

3

2

D D

2

1

1

4602-Q04C-09R 4P P2.5

4602-Q04C-09R 4P P2.5
JDCIN1

JDCIN1

ME@

ME@

APDIN1APDIN

21

12

PC101

PC101

PF101

7A_24VDC_429007.WRML

7A_24VDC_429007.WRML

SMB3025500YA_2P

SMB3025500YA_2P

12

1000P_0402_50V7K

1000P_0402_50V7K

PL101

PL101

1 2

100P_0402_50V8J

100P_0402_50V8J

PC102

PC102

Unpop for KB9012

PJ101

1 2

51ON-2

PC112

@PC112

@

0.22U_0603_25V7K

0.22U_0603_25V7K

51ON-3

PJ101
JUMP_43X39@

JUMP_43X39@

112

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

PD104

@PD104

@

LL4148_LL34-2

CHGRTCP

LL4148_LL34-2

PR120

@PR120

@

200_0603_5%

200_0603_5%

1 2

PR124

@PR124

@

22K_0402_1%

22K_0402_1%

1 2

12

12

@PR123

@

PR123

100K_0402_1%

100K_0402_1%

C C

+3VLP

BATT+

51_ON#<35>

PR127

0_0402_5%

0_0402_5%

1 2

B B

PC114

@PC114

@

3.3V

12

@PU102

@

APL5156-33DI-TRL_SOT89-3

APL5156-33DI-TRL_SOT89-3

3

VOUT

10U_0603_6.3V6M

10U_0603_6.3V6M

PU102

VIN

GND

1

PR127

RTCVREF

CHGRTCIN

2

PR128

@PR128

@

PC115

@PC115

@

12

200_0603_5%

200_0603_5%

12

1U_0805_25V6K

1U_0805_25V6K

+CHGRTC

PR131

JRTC2

JRTC2

-+

MAXEL_ML1220T10@

MAXEL_ML1220T10@

PR131

560_0603_5%

560_0603_5%

1 2

12

PR132

PR132

560_0603_5%

560_0603_5%

1 2

PD109

PD109

RB751V-40_SOD323-2

RB751V-40_SOD323-2

12

1 2

PD108

PD108

RB751V-40_SOD323-2

RB751V-40_SOD323-2

+RTCBATT

RTCVREF

RTC Battery

A A

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PWR DCIN / Vin Detector /Pre-charge

PWR DCIN / Vin Detector /Pre-charge

PWR DCIN / Vin Detector /Pre-charge

LA8611P

1

of

of

of

39 51Friday, November 04, 2011

39 51Friday, November 04, 2011

39 51Friday, November 04, 2011

0.1

0.1

0.1

5

4

3

2

1

JBATT1

VMB2

JBATT1

1

1

2

2
3
4
5
6
7

D D

C C

GND
GND

TYCO_1775789-1

TYCO_1775789-1

@

@

JBATT2

JBATT2

GND
GND

TYCO_1775789-1

TYCO_1775789-1

@

@

EC_SMCA

3

EC_SMDA

4
5
6
7
8
9

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8
9

12

PR201

100_0402_1%

PR201

100_0402_1%

12

PR202

100_0402_1%

PR202

100_0402_1%

1 2

PR203

PR203

6.49K_0402_1%

6.49K_0402_1%

1 2

PR204

PR204
10K_0402_5%

10K_0402_5%

PF201

PF201
12A_65V_451012MRL

12A_65V_451012MRL

21

VMB

SMB3025500YA_2P

SMB3025500YA_2P

1 2

12

PC201

PC201
1000P_0402_50V7K

1000P_0402_50V7K

EC_SMB_CK1 <33,41>

EC_SMB_DA1 <33,41>

+3VALW

BATT_TEMP <33>

PL201

PL201

A/D

BATT+

12

PC202

PC202

0.01U_0402_25V7K

0.01U_0402_25V7K

PH1 under CPU botten side :
CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C

VL

12

PC203

@PC203

@

0.1U_0603_16V7K

0.1U_0603_16V7K

H_PROCHOT#<7,33,47>

PROCHOT<33>

+3VS

PR208

PR208

@

@

1 2

PQ201

@

PQ201

@

13

D

D

ADP_OCP_1

2

G

G

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

PR212

PR212
0_0402_5%@

0_0402_5%@

1 2

100K_0402_1%

100K_0402_1%

OTP_N_003

PR213 0_0402_5%@PR213 0_0402_5%@

PU201

@PU201

@
1

VCC

TMSNS1

2

GND

RHYST1

3

OT1

TMSNS2

4

RHYST2

OT2

G718TM1U_SOT23-8

G718TM1U_SOT23-8

12

ADP_I need to write Charge Options Register (0x12H)=> bit6=1

0: IOUT is the 20x current amplifier output <default @ POR>
1: IOUT is the 40x current amplifier output

For KB930 --> Keep PU201 circuit
(Vth = 0.825V)

For KB9012 (Red square) --> Remove PU201 circuit, but keep PR206
PH201, PR205, PR211,PQ201,PR208,PR212

8

OTP_N_002

7
6

ADP_OCP_2

5

29.4K_0402_1%@

29.4K_0402_1%@

MAINPWON <7,33,42>

ADP_I<33,41>

PR210

PR210

1 2

PR205

PR205

Turbo_V

90W(DIS) : 6.65K
65W(UMA) : 1.65K

1 2

6.65K_0402_1%

6.65K_0402_1%

Turbo_V

+3VLP

PR209

@PR209

@

10K_0402_1%

10K_0402_1%

12

PH201

PH201

100K_0402_1%_NCP15WF104F03RC

100K_0402_1%_NCP15WF104F03RC

12

@

@

12

PR207

PR207

21.5K_0402_1%

21.5K_0402_1%

12

PR206

PR206

12.7K_0402_1%

12.7K_0402_1%

NTC_V

PR211

PR211

1 2

<33>

10K_0402_1%

10K_0402_1%

NTC_V

<33>

B B

VMB2

PR217

PR217
768K_0402_1%

768K_0402_1%

PR219

PR219

10K_0402_1%

10K_0402_1%

1 2

1 2

PR221

PR221
221K_0402_1%

221K_0402_1%

1 2

A A

5

12

PC204

PC204

3
2

PR223

PR223
10K_0402_1%

10K_0402_1%

PR225

@PR225

@

10K_0402_1%

10K_0402_1%

0.01U_0402_25V7K

0.01U_0402_25V7K

P2

+

-

10M_0402_5%

10M_0402_5%

8

P

O

G

LM393DG_SO8

LM393DG_SO8

4

12

12

PR218

PR218

1 2

1

PU202A

PU202A

2VREF_8205

RTCVREF

BATT_LEN#<33>

PR214

PR214
100K_0402_1%

100K_0402_1%

<BOM Structure>

<BOM Structure>

1 2

PR226

PR226

100K_0402_1%

100K_0402_1%

+3VLP

1 2

+3VALW+3VLP

1 2

13

2

G

G

2

G

G

PR215

PR215
100K_0402_1%

100K_0402_1%

PQ202

PQ202

D

D

2N7002KW_SOT323-3

2N7002KW_SOT323-3

S

S

PQ203

PQ203

13

D

D

2N7002KW_SOT323-3

2N7002KW_SOT323-3

S

S

4

BATT_OUT <41>

PQ205

PQ205

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

B+

VL

PR222

PR222

100K_0402_1%

100K_0402_1%

SPOK<42,44>

PR224

PR224

1 2

1K_0402_5%

1K_0402_5%

1 2

12

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

22K_0402_1%

22K_0402_1%

13

D

D

2

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

G

G

S

S

PC207

PC207

1U_0402_6.3V6K

1U_0402_6.3V6K

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

PR220

PR220

1 2

PQ204

PQ204

12

12

PC205

PC205

PR216

PR216

100K_0402_1%

100K_0402_1%

0.22U_0603_25V7K

0.22U_0603_25V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

13

2

12

PC206

PC206

0.1U_0603_25V7K

0.1U_0603_25V7K

+VSBP

+VSBP

PJ201

PJ201
JUMP_43X39@

JUMP_43X39@

2

112

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PWR-BATTERY CONN/OTP

PWR-BATTERY CONN/OTP

PWR-BATTERY CONN/OTP

+VSB

LA8611P

1

0.1

0.1

0.1

of

of

of

40 51Friday, November 04, 2011

40 51Friday, November 04, 2011

40 51Friday, November 04, 2011

5

13

1
2
36

12

PC301

PC301

PQ307B

PQ307B

5

P2

12

PR303

PR303

200K_0402_1%

200K_0402_1%

0.1U_0603_25V7K

0.1U_0603_25V7K

P2-1

12

PR308

PR308

150K_0402_1%

150K_0402_1%

P2-2

34

2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

PQ302

PQ302

SI4459_SO8

SI4459_SO8

1
2
3 6

4

5600P_0402_25V7K

5600P_0402_25V7K

12

PR307

PR307
20K_0402_1%

20K_0402_1%

PQ308

PQ308

13

D

D

2N7002KW_SOT323-3

2N7002KW_SOT323-3

2

G

G

S

S

PR314

PR314

PR317

PR317

1 2

64.9K_0603_1%

64.9K_0603_1%

EC_SMB_DA1<33,40>

EC_SMB_CK1<33,40>

PQ301

PQ301
AO4407A_SO8

AO4407A_SO8

VIN

D D

C C

B B

12

PR301

PR301

61

2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

2

PACIN

ACON

ACOFF<33>

BATT_OUT<40>

DTA144EUA_SC70-3

DTA144EUA_SC70-3

47K_0402_5%

47K_0402_5%

13

2

PQ307A

PQ307A

PACIN

PQ311

PQ311

DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR321

PR321

1 2

10K_0402_5%

10K_0402_5%

8
7

5

PQ304

PQ304

2

1 3

PQ305

PQ305

DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR318

PR318

47K_0402_1%

47K_0402_1%

1 2

ACOFF-1

2

12

PR325

PR325
0_0402_5%

0_0402_5%

PQ313

PQ313

13

D

D

2

G

G

S

S

4

2N7002KW_SOT323-3

2N7002KW_SOT323-3

CHGVADJ=(Vcell-4)/0.10627

Vcell
4V

4.2V

4.35V

CC=0.25A~3A
IREF=1.016*Icharge
IREF=0.254V~3.048V
VCHLIM need over 95mV

A A

CHGVADJ

0V

1.882V

3.2935V

PR335

PR335

47K_0402_1%

47K_0402_1%

ACPRN <42>

DTC115EUA_SC70-3

DTC115EUA_SC70-3

12

PQ316

PQ316

BQ24727VDD

2

4

P3

8
7

5

1UH_PCMB061H-1R0MS_7A_20%

1UH_PCMB061H-1R0MS_7A_20%

1 2

PC304

PC304

BATT_OUT <40>

VIN

12

PR315

PR315

@

@

@

@

10K_0402_5%

10K_0402_5%

PC323

PC323

0.1U_0603_25V7K

0.1U_0603_25V7K

+3VALW

1 2

12

390K_0603_1%

390K_0603_1%

12

12

PR336

PR336
10K_0402_1%

10K_0402_1%

13

SH00000AA00

1 2

PL301

PL301

1 2

PC302

PC302

10U_0805_25V6K

10U_0805_25V6K

+3VALW

PR316

PR316

10K_0402_5%

10K_0402_5%

1 2

ADP_I<33,40>

PC312

PC312

1 2

100P_0603_50V8

100P_0603_50V8

PR323

PR323

1 2

316K_0402_1%

316K_0402_1%

PR337

PR337

10K_0402_1%

10K_0402_1%

1 2

PACIN

PR339

PR339

12K_0402_1%

12K_0402_1%

ACPRN<42>

39.2K_0402_1%

39.2K_0402_1%

10

12

PR302

PR302

0.01_1206_1%

0.01_1206_1%

1
2

1 2

PC315

PC315

10U_0805_25V6K

10U_0805_25V6K

ACP

PR309

PR309

@

@

PR313

PR313

@

@

PR312

@PR312

@

6

7

8

9

PR326

PR326
100K_0402_1%

100K_0402_1%

1 2

1 2

12

4.7M_0603_1%

4.7M_0603_1%

5

ACOK

ACDET

IOUT

SDA

BQ24727RGRR_VQFN20_3P5X3P5

BQ24727RGRR_VQFN20_3P5X3P5

SA000051W00

SCL

ILIM

BM

11

6.8_0603_5%

6.8_0603_5%

0.1U_0603_25V7K

0.1U_0603_25V7K

ACIN <18,33>

B+

4
3

PC308

PC308

+3VALW

1 2

12

PR310

PR310

100K_0402_1%

100K_0402_1%

10K_0603_1%

10K_0603_1%

@

@

3

4

CMPIN

CMPOUT

PU301

PU301

SRN

SRP

12

12

13

12

PR328

PR328

PR327

PR327

PC320

PC320

12

12

PC321

PC321

0.1U_0603_25V7K

0.1U_0603_25V7K

ACN

0.1U_0603_25V7K

0.1U_0603_25V7K

PC310

PC310

0.1U_0603_25V7K

0.1U_0603_25V7K

12

2

1

ACP

ACN

PHASE

LODRV

GND

15

14

10_0603_5%

10_0603_5%

3

PC309

PC309

12

0.1U_0603_25V7K

0.1U_0603_25V7K

<BOM Structure>

<BOM Structure>

21

TP

20

VCC

19

18

HIDRV

17

BTST

16

REGN

12

PC322

@PC322

@

0.1U_0603_25V7K

0.1U_0603_25V7K

BQ24727VCC

DH_CHG

BST_CHG

PD303

PD303

RB751V-40_SOD323-2

RB751V-40_SOD323-2

12

PC318

PC318
1U_0603_25V6K

1U_0603_25V6K

DL_CHG

P2

PR319

PR319

10_1206_5%

10_1206_5%

1 2

12

PC313

PC313

1 2

1U_0603_25V6K

1U_0603_25V6K

PR324

PR324

2.2_0603_5%

2.2_0603_5%

1 2

2

Need EC write ChargeOption() bit[8]=0
Setting (ACP to PHASE Rising Threshold)=1350mV(min)

B+

1
2
3 6

DISCHG_G

PC307

PC307

1 2

1 2

1 2

1 2

PC303

PC303

LX_CHG

0.047U_0603_25V7M

0.047U_0603_25V7M

BQ24727VDD

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PC314

PC314

PC306

PC306

PC305

PC305

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

4.7U_0805_25V6-K

4.7U_0805_25V6-K

2200P_0402_50V7K

2200P_0402_50V7K

6

578

4

6

578

4

PR304

PR304

47K_0402_1%

47K_0402_1%

1 2

PR305

PR305
10K_0402_1%

10K_0402_1%

1 2

DISCHG_G-1

PQ306

PQ306

13

DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

PQ310

PQ310

AO4466L_SO8

AO4466L_SO8

SH000005Y80

4.7UH_PCMB104E-4R7MS_10A_20%

4.7UH_PCMB104E-4R7MS_10A_20%

123

12

PQ312

PQ312

123

PR322

PR322

AO4466L_SO8

AO4466L_SO8

6251_SN

12

PC319

PC319

PD301

PD301

PL302

PL302

1 2

4.7_1206_5%

4.7_1206_5%

680P_0603_50V7K

680P_0603_50V7K

PQ303

PQ303

AO4407A_SO8

AO4407A_SO8

4

ACOFF-1

1SS355_SOD323-2

1SS355_SOD323-2

1 2

PD302

PD302
1SS355_SOD323-2

1SS355_SOD323-2

1 2

0.01_1206_1%

0.01_1206_1%

CHGCHG

1
2

SRP

1 2

12

PC311

PC311

0.1U_0603_25V7K

0.1U_0603_25V7K

PR320

PR320

1

8
7

5

PR306

PR306
200K_0402_1%

200K_0402_1%

PQ309

PQ309

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

13

D

D

2

G

G

S

S

4
3

SRN

VIN

PACIN

12

PC317

PC317

PC316

PC316

10U_0805_25V6K

10U_0805_25V6K

BATT+

12

10U_0805_25V6K

10U_0805_25V6K

5

For disable pre-charge circuit.

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2013/10/122011/10/12

2013/10/122011/10/12

2013/10/122011/10/12

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

CHARGER

LA8611P

41 51Friday, November 04, 2011

41 51Friday, November 04, 2011

41 51Friday, November 04, 2011

1

of

of

of

0.1

0.1

0.1

5

Note:
Use TPS51125 IC can remove RTC refernece LDO
Use TPS51427 IC must keep RTC refernece LDO

4

3

2

1

D D

RT8205_B+

PJ401

B+

PC405

PC405

C C

B B

2

12

0.1U_0603_25V7K

0.1U_0603_25V7K

EC_ON<33,35>

MAINPWON<7,33,40>

PJ401

112

JUMP_43X118@

JUMP_43X118@

PC402

PC402

0.1U_0603_25V7K

0.1U_0603_25V7K

For KB9012

12

12

PC403

PC403

4.7U_0805_25V6-K

4.7U_0805_25V6-K

+3VALWP

PR418

PR418
10K_0402_5%

10K_0402_5%

PR413

PR413
0_0402_5%

0_0402_5%

12

PC406

PC406

PC404

PC404

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

12

12

2200P_0402_50V7K

2200P_0402_50V7K

4.7UH +-20% PCMC063T-4R7MN 5.5A

4.7UH +-20% PCMC063T-4R7MN 5.5A

1

+

+

PC415

PC415
150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

2

AO4466L_SO8

AO4466L_SO8

PL401

PL401

1 2

PQ405A

PQ405A

PR409

PR409

4.7_1206_5%

4.7_1206_5%

PC418

PC418

680P_0603_50V7K

680P_0603_50V7K

61

100K_0402_1%

100K_0402_1%

VL

PQ401

PQ401

12

12

2

123

PR414

PR414

241

12

6

578

578

3 6

4

PQ403

PQ403
AO4712_SO8

AO4712_SO8

Typ: 175mA

34

5

+3VLP

12

PC411

PC411

4.7U_0805_10V6K

4.7U_0805_10V6K

1 2

1 2

2.2_0603_5%

2.2_0603_5%

PC412

PC412

0.1U_0603_25V7K

0.1U_0603_25V7K

PR411

PR411

499K_0402_1%

499K_0402_1%

1 2

B+

ENTRIP2ENTRIP1

PQ405B

PQ405B
2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

PR407

PR407

PR412

PR412

100K_0402_1%

100K_0402_1%

BST_3V
UG_3V
LX_3V
LG_3V

12

2VREF_8205

2VREF_8205

PR401

PR401

13K_0402_1%

13K_0402_1%

1 2

PR403

PR403

20K_0402_1%

20K_0402_1%

1 2

PR405

PR405

130K_0402_1%

130K_0402_1%

1 2

PU401

PU401

25

P PAD

7

VO2

8

VREG3

9

BOOT2

10

UGATE2

11

PHASE2

12

LGATE2

12

PC420

PC420

1U_0603_10V6K

1U_0603_10V6K

12

PC401

PC401

1U_0603_10V6K

1U_0603_10V6K

ENTRIP2

6

5

FB2

ENTRIP2

VFB=2.0V

SKIPSEL

EN

14

13

RT8205_B+

4

15

TONSEL

3

2

REF

VIN16GND

17

12

12

PC422

PC422

0.1U_0603_25V7K

0.1U_0603_25V7K

FB1

1

PGOOD

UGATE1
PHASE1

LGATE1

PC421

PC421

PR402

PR402

30K_0402_1%

30K_0402_1%

1 2

PR404

PR404

19.6K_0402_1%

19.6K_0402_1%

1 2

PR406

PR406

66.5K_0402_1%

66.5K_0402_1%

ENTRIP1

1 2

ENTRIP1

24

VO1

23
22

BOOT1

21
20
19

RT8205EGQW_WQFN24_4X4

RT8205EGQW_WQFN24_4X4

NC18VREG5

VL

Typ: 175mA

4.7U_0805_10V6K

4.7U_0805_10V6K

BST_5V
UG_5V
LX_5V
LG_5V

PC407

PC407

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PR408

PR408

2.2_0603_5%

2.2_0603_5%

1 2

RT8205_B+

12

12

PC409

PC409

PC408

PC408

4.7U_0805_25V6-K

4.7U_0805_25V6-K

2200P_0402_50V7K

2200P_0402_50V7K

SPOK <40,44>

PC413

PC413

0.1U_0603_25V7K

0.1U_0603_25V7K

1 2

12

PJ402

PJ402

+3VALWP +3VALW

+5VALWP +5VALW

12

PC410

PC410

0.1U_0603_25V7K

0.1U_0603_25V7K

PQ402

PQ402

PQ404TPC8A03-H_SO8 PQ404TPC8A03-H_SO8

4

+3.3VALWP OCP(min)=5.81A
+5VALWP OCP(min)=8.44A

2

JUMP_43X118@

JUMP_43X118@

PJ403

PJ403

2

JUMP_43X118@

JUMP_43X118@

678

TPC8065-H_SO8

TPC8065-H_SO8

35241

4.7UH_PCMB104E-4R7MS_10A_20%

4.7UH_PCMB104E-4R7MS_10A_20%

12

786

5

PR410

PR410

12

123

PC419

PC419

112

112

PL402

PL402

1 2

4.7_1206_5%

4.7_1206_5%

680P_0603_50V7K

680P_0603_50V7K

+5VALWP

1

+

+

PC417

PC417
150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

2

13

PR415

@PR415

@

200K_0402_1%

ACPRN<41>

A A

200K_0402_1%

EC_ON<33,35>

12

2

5

2

G

G

13

@

@

13

D

D

VS

S

S

100K_0402_1%

PQ408

@PQ408

@

100K_0402_1%

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

PQ407

PQ407

DTC115EUA_SC70-3

DTC115EUA_SC70-3

1 2

PR416

@PR416

@

2

12

12

PC423

PC423

PR417

PR417

@

@

40.2K_0402_1%

40.2K_0402_1%

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

For KB9012

4

PQ406

PQ406
DTC115EUA_SC70-3

DTC115EUA_SC70-3

Security Classification

Security Classification

Security Classification

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

3VALWP/5VALWP

3VALWP/5VALWP

3VALWP/5VALWP

LA8611P

42 51Friday, November 04, 2011

42 51Friday, November 04, 2011

42 51Friday, November 04, 2011

1

of

of

of

0.1

0.1

0.1

A

1 1

PR501

PR501

0_0402_5%

0_0402_5%

SYSON<33,38>

2 2

1 2

PR502

PR502

1 2

47K_0402_5%

47K_0402_5%

12

@

@

PC501

PC501

.1U_0402_16V7K

.1U_0402_16V7K

12

PR507

PR507

1 2

11.5K_0402_1%

11.5K_0402_1%

PR508

PR508
10K_0402_1%

10K_0402_1%

100K_0402_1%

100K_0402_1%

PR505

PR505

PR506

PR506

1 2

470K_0402_1%

470K_0402_1%

12

B

PU501

PU501

1

VBST

PGOOD

2

TRIP

DRVH

3

EN

4
5

SW

V5IN

VFB

DRVL

RF

TPS51212DSCR_SON10_3X3

TPS51212DSCR_SON10_3X3

TP

VFB=0.7V

C

1.5V_B+

678

PQ501

PQ501
TPC8065-H_SO8

TPC8065-H_SO8

PC506

PR503

PR503

0_0603_5%

0_0603_5%

BST_1.5V
DH_1.5V
LX_1.5V

DL_1.5V

1 2

12

10
9
8
7
6
11

0.22U_0603_16V7K

0.22U_0603_16V7K

BST_1.5V-1

+5VALW

PC508

PC508

1U_0603_10V6K

1U_0603_10V6K

PC506

1 2

35241

786

5

PQ502

PQ502

4

TPC8A03-H_SO8

TPC8A03-H_SO8

123

PC502

PC502

1UH_PCMC063T-1R0MN_11A_20%

1UH_PCMC063T-1R0MN_11A_20%

12

PR504

PR504

4.7_1206_5%

4.7_1206_5%

12

PC509

PC509

1000P_0603_50V7K

1000P_0603_50V7K

12

PC503

PC503

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

PL501

PL501

1 2

12

12

PC504

PC504

0.1U_0402_25V6

0.1U_0402_25V6

12

PC505

PC505

2200P_0402_50V7K

2200P_0402_50V7K

1

+

+

2

PJ501

PJ501

2

JUMP_43X118@

JUMP_43X118@

PC507

PC507
220U_6.3V_M

220U_6.3V_M

+1.5VP

112

D

B+

+1.5VP

+1.5VP OCP(min)=15.6A

PJ502

PJ502

2

112

JUMP_43X118@

JUMP_43X118@
PJ503

PJ503

2

112

JUMP_43X118@

JUMP_43X118@

+1.5V

PU502

PU502

PJ505

PJ505

+5VALW

3 3

2

112

JUMP_43X118@

JUMP_43X118@

PXS_PWREN<14,19,46>

4 4

1.8VSP_VIN

12

PC510

PC510

22U_0603_6.3V6K

22U_0603_6.3V6K

PR511

PR511

1 2

0_0402_5%

0_0402_5%

EN_1.8VSP

PR512

PR512
1M_0402_5%

1M_0402_5%

@PC515

@

12

PC515

1 2

10

PVIN

9

PVIN

8

SVIN

5

EN

0.1U_0402_10V7K

0.1U_0402_10V7K

4

2

LX

PG

3

LX

6

FB

TP

NC

NC

7

1

11

SY8033BDBC_DFN10_3X3

SY8033BDBC_DFN10_3X3

1.8VSP_LX

FB=0.6Volt

PL503

PL503

1UH_PH041H-1R0MS_3.8A_20%

1UH_PH041H-1R0MS_3.8A_20%

1 2

12

PR510

PR510

20K_0402_1%

20K_0402_1%

PR509

PR509

4.7_1206_5%

4.7_1206_5%

12

PC512

PC512

680P_0603_50V7K

680P_0603_50V7K

1.8VSP_FB

PR513

PR513

10K_0402_1%

10K_0402_1%

12

12

12

PC511

PC511

68P_0402_50V8J

68P_0402_50V8J

PC513

PC513

22U_0603_6.3V6K

22U_0603_6.3V6K

+1.8VSP

12

12

PC514

PC514

22U_0603_6.3V6K

22U_0603_6.3V6K

1.8VSP max current=4A

PJ504

PJ504

2

112

JUMP_43X118@

JUMP_43X118@

+1.8VGS+1.8VSP

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PWR-+1.5VP/+1.8VSP

PWR-+1.5VP/+1.8VSP

PWR-+1.5VP/+1.8VSP

LA8611P

D

43 51Friday, November 04, 2011

43 51Friday, November 04, 2011

43 51Friday, November 04, 2011

of

of

of

0.1

0.1

0.1

5

4

3

2

1

D D

PJ601

@PJ601

@

2

112

JUMP_43X118

JUMP_43X118

PC605

PC605

4.7U_0805_25V6-K

4.7U_0805_25V6-K

B+

+1.1VALWP

1

12

+

+

PC608

PC608

PC609

PC609

2

1U_0603_10V6K

1U_0603_10V6K

220U_D2_4VY_R15M

220U_D2_4VY_R15M

PJ602

@PJ602

@
2

JUMP_43X118

JUMP_43X118

+1.1VALW+1.1VALWP

112

123

+1.1VALWP_B+

PQ601

PQ601
TPC8065-H_SO8

TPC8065-H_SO8

@

@

TPC8A03-H_SO8

TPC8A03-H_SO8

@

@

PR605

PR605

PC610

PC610

12

12

PC603

PC603

PC602

PC602

0.1U_0402_25V6

0.1U_0402_25V6

2200P_0402_50V7K

2200P_0402_50V7K

PL601

PL601

1UH_PCMC063T-1R0MN_11A_20%

1UH_PCMC063T-1R0MN_11A_20%

1 2

12

4.7_1206_5%

4.7_1206_5%

12

680P_0603_50V7K

680P_0603_50V7K

12

12

PC604

PC604

4.7U_0805_25V6-K

4.7U_0805_25V6-K

678

PC606

PC606

0.1U_0603_25V7K

0.1U_0603_25V7K

PR602

PR602

1 2

0_0603_5%

PU601

PU601

1

PR601

PR601

TRIP_+1.1VALWP

1 2

34K_0402_1%

34K_0402_1%

PC601

PC601

12

0.1U_0402_16V7K

0.1U_0402_16V7K

EN_+1.1VALWP

FB_+1.1VALWP
RF_+1.1VALWP

12

PR606

PR606

470K_0402_1%

470K_0402_1%

PR603

PR603

0_0402_5%

0_0402_5%

SPOK<40,42>

C C

1 2

12

PR604

PR604

@

@

47K_0402_1%

47K_0402_1%

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

TPS51212DSCR_SON10_3X3

TPS51212DSCR_SON10_3X3

PR607

PR607

5.76K_0402_1%

5.76K_0402_1%

12

VBST
DRVH

DRVL

BST_+1.1VALWP

10

UG_+1.1VALWP

9

SW_+1.1VALWP

8

SW

+1.1VALWP_5V

7

V5IN

LG_+1.1VALWP

6
11

TP

0_0603_5%

12

PC607

PC607
1U_0603_6.3V6M

1U_0603_6.3V6M

1 2

+5VALW

35241

786

5

4

PQ602

PQ602

PR608

PR608
10K_0402_1%

10K_0402_1%

1 2

678

B B

PU602

PR617

@PR617

@

0_0402_5%

0_0402_5%

VLDT_EN<33>

SUSP#<33,38,46>

A A

1 2

PR611

PR611

91K_0402_1%

91K_0402_1%

1 2

PR612

PR612

@

@

5

12

1 2

75K_0402_1%

75K_0402_1%

12

PC616

PC616

47K_0402_1%

47K_0402_1%

PR610

PR610

0.1U_0402_16V7K

0.1U_0402_16V7K

1 2

TRIP_+1.2VSP
EN_+1.2VSP

FB_+1.2VSP
RF_+1.2VSP

12

470K_0402_1%

470K_0402_1%

PR616

PR616
10K_0402_1%

10K_0402_1%

PR613

PR613

1
2
3
4
5

PR615

PR615

7.15K_0402_1%

7.15K_0402_1%

PU602

PGOOD
TRIP
EN
VFB
RF

TPS51212DSCR_SON10_3X3

TPS51212DSCR_SON10_3X3

12

4

VBST

DRVH

DRVL

BST_+1.2VSP

10

UG_+1.2VSP

9

SW_+1.2VSP

8

SW

+1.2VSP_5V

7

V5IN

LG_+1.2VSP

6
11

TP

PR609

PR609

1 2

0_0603_5%

0_0603_5%

0.1U_0603_25V7K

0.1U_0603_25V7K

12

PC617

PC617
1U_0603_6.3V6M

1U_0603_6.3V6M

PC615

PC615

1 2

+5VALW

35241

786

5

PQ604

PQ604

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

123

+1.2VSP_B+

PQ603

PQ603
TPC8065-H_SO8

TPC8065-H_SO8

PR614

PR614

@

@

TPC8A03-H_SO8

TPC8A03-H_SO8

PC620

PC620

@

@

12

PC612

PC612

2200P_0402_50V7K

2200P_0402_50V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

12

PC613

PC613

4.7U_0805_25V6-K

4.7U_0805_25V6-K

Deciphered Date

Deciphered Date

Deciphered Date

12

12

PC611

PC611

0.1U_0402_25V6

0.1U_0402_25V6

PL602

PL602

1UH_PCMC063T-1R0MN_11A_20%

1UH_PCMC063T-1R0MN_11A_20%

1 2

12

4.7_1206_5%

4.7_1206_5%

12

680P_0603_50V7K

680P_0603_50V7K

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

PC614

PC614

PJ603

@PJ603

@
2

112

JUMP_43X118

JUMP_43X118

4.7U_0805_25V6-K

4.7U_0805_25V6-K

B+

+1.2VSP

1

12

+

+

PC619

PC619

PC618

PC618

2

2

1U_0603_10V6K

1U_0603_10V6K

220U_D2_4VY_R15M

220U_D2_4VY_R15M

PJ604

@PJ604

@

2

JUMP_43X118

JUMP_43X118

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PWR +1.1VALWP/+1.2VSP

PWR +1.1VALWP/+1.2VSP

PWR +1.1VALWP/+1.2VSP

+1.2VS+1.2VSP

112

0.1

0.1

LA8611P

1

44 51Friday, November 04, 2011

44 51Friday, November 04, 2011

44 51Friday, November 04, 2011

0.1

of

of

of

5

4

3

2

1

D D

PQ701

PQ701
2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

PR701

PR701

49.9K_0402_1%

49.9K_0402_1%

C C

B B

SUSP<38>

1 2

12

PC701

PC701

0.1U_0402_10V7K

0.1U_0402_10V7K

13

D

D

2

G

G

S

S

+3VS

+1.5V

1

1

2

2

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K

1 2

PJ703

PJ703

112

JUMP_43X39@

JUMP_43X39@

PJ701

PJ701
JUMP_43X118

JUMP_43X118

@

@

PC702

PC702

PR702

PR702

1K_0402_1%

1K_0402_1%

PR703

PR703

2

1U_0603_10V6K

1U_0603_10V6K

PC707

PC707

12

12

1K_0402_1%

1K_0402_1%

12

PC704

PC704

PC705

PC705

.1U_0402_16V7K

.1U_0402_16V7K

10U_0603_6.3V6M

10U_0603_6.3V6M

APL5508-25DC-TRL_SOT89-3

APL5508-25DC-TRL_SOT89-3

2

IN

12

PU701

PU701

1

VIN

2

GND

3

VREF

4

VOUT

APL5336KAI-TRL_SOP8P8

APL5336KAI-TRL_SOP8P8

+0.75VSP

12

12

PC706

PC706

PU702

PU702

OUT

GND

1

NC
NC

VCNTL

NC
TP

10U_0603_6.3V6M

10U_0603_6.3V6M

3

PC708

PC708

PJ702

PJ702

2

112

JUMP_43X118@

JUMP_43X118@

PJ704

PJ704

2

112

JUMP_43X39@

JUMP_43X39@

+0.75VS+0.75VSP

+2.5VS+2.5VSP

12

PR704

@PR704

@

10K_1206_5%

10K_1206_5%

+3VALW

PC703

PC703
1U_0603_10V6K

1U_0603_10V6K

+2.5VSP

(0.38A,20mils ,Via NO.=1)

8
7
6
5
9

12

12

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K

A A

5

4

Security Classification

Security Classification

Security Classification

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PWR +0.75VSP/2.5VSP

PWR +0.75VSP/2.5VSP

PWR +0.75VSP/2.5VSP

LA8611P

45 51Friday, November 04, 2011

45 51Friday, November 04, 2011

45 51Friday, November 04, 2011

1

of

of

of

0.1

0.1

0.1

A

B

C

D

1 1

12

PR805

PR805

PR809

PR809

1 2

1 2

10P_0402_25V8J

10P_0402_25V8J

1 2

11K_0402_1%

11K_0402_1%

PR807

PR807

1 2

1 2
12

5.62K_0402_1%

5.62K_0402_1%

PR810

PR810

+3VS

12

PR811

PR811

PC818

@PC818

@

0.1U_0402_16V7K

0.1U_0402_16V7K

PR801

PR801

0_0402_5%

0_0402_5%

PR813

PR813
0_0402_5%

0_0402_5%

1 2

PR814

@PR814

@

0_0402_5%

0_0402_5%

1 2

1 2

PR804

PR804

102K_0402_1%

102K_0402_1%

PR812

PR812

0_0402_5%

0_0402_5%

1 2

VRON_VGA

VSSSENSE_VGA<21>

2 2

VGA_PWRGD<14,17,19>

PX_MODE<19>

SUSP#<33,38,44>

10P_0402_25V8J

10P_0402_25V8J

PC801

PC801

1

2

3

4

5.62K_0402_1%

5.62K_0402_1%

5

100K_0402_1%

100K_0402_1%

10K_0402_1%

10K_0402_1%

VCCSENSE_VGA<21>

12

PC806

PC806

12

21

20

PU801

PU801

PAD

VSNS

GSNS

V3

V2

TPS51518RUKR_QFN20_3X3

TPS51518RUKR_QFN20_3X3

V1

V0

VREF

6

12

PC817

PC817

0.1U_0402_10V7K

0.1U_0402_10V7K

<18>

PR802

PR802
0_0402_5%

0_0402_5%

1 2

1 2

PC807

PC807

19

4700P_0402_25V7K

4700P_0402_25V7K

18

TRIP

SLEW

VID08PGOOD

7

GPU_VID0

PR803

PR803

41.2K_0402_1%

41.2K_0402_1%

17

GND

VID19EN

10

GPU_VID1

DRVL

DRVH

PJ801

@ PJ801

PC805

PC805

1

+

+

2

4.7U_0805_25V6-K

4.7U_0805_25V6-K

1

+

+

PC809

PC809

2

@

@

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

+VGA_COREP
Iocp=32.5A

@
2

JUMP_43X118

JUMP_43X118

1

+

+

PC810

PC810

2

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

PJ802

PJ802

2

JUMP_43X118@

JUMP_43X118@

PJ803

PJ803

2

JUMP_43X118@

JUMP_43X118@

112

PC811

PC811

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

112

112

1

2

B+

1

PC812

PC812

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

PC813

PC813

2

10U_0603_6.3V6M

10U_0603_6.3V6M

+VGA_COREP

PC814

PC814

10U_0603_6.3V6M

10U_0603_6.3V6M

VGA_CORE_B+

12

5

PQ801

PQ801

4

123

TPCA8065-H_SOP-ADV8-5

16

MODE

15

V5IN

14

13

12

SW

11

BST

<18>

GPU_VID1

1

1

0

0

12

PR808

PR808

2.2_0603_5%

2.2_0603_5%

GPU_VID0

+5VALW

PC808

PC808

1U_0603_10V6K

1U_0603_10V6K

UGATE2_VGA

BOOT2_2_VGABOOT2_VGA

12

LGATE2_VGA

1

0

1

0

PC816

PC816

0.1U_0603_25V7K

0.1U_0603_25V7K

1 2

Seymour

Core Voltage Level

0.9V

1.0V

1.05V

1.1V

4

TPCA8065-H_SOP-ADV8-5

PQ802

PQ802

4

123 5

TPCA8057-H 1N PPAK56-8

TPCA8057-H 1N PPAK56-8

PC802

PC802

0.1U_0402_25V6

0.1U_0402_25V6

0.36UH_PCMC104T-R36MN1R17_30A_20%

0.36UH_PCMC104T-R36MN1R17_30A_20%

PQ803

PQ803

123 5

TPCA8057-H 1N PPAK56-8

TPCA8057-H 1N PPAK56-8

@

@

12

12

PC803

PC803

2200P_0402_50V7K

2200P_0402_50V7K

1 2

12

PR806

PR806

4.7_1206_5%

4.7_1206_5%

12

PC815

PC815

680P_0603_50V7K

680P_0603_50V7K

PL801

PL801

PC804

PC804

12

4.7U_0805_25V6-K

4.7U_0805_25V6-K

+VGA_COREP +VGA_CORE

3 3

PR815

PR815

0_0402_5%

0_0402_5%

12

PC822

PC822

0.1U_0603_25V7K

0.1U_0603_25V7K

+5VALW

12

PR818

PR818
20K_0402_1%

20K_0402_1%

PR820

@PR820

@

10K_0402_5%

10K_0402_5%

GPU_VID0

1 2

+3VS

PR821

@PR821

@

10K_0402_5%

10K_0402_5%

GPU_VID1

1 2

+3VS

PR822

@PR822

@

10K_0402_5%

10K_0402_5%

GPU_VID0

1 2

PR823

@PR823

@

10K_0402_5%

10K_0402_5%

GPU_VID1

1 2

4 4

PXS_PWREN<14,19,43>

PXS_PWREN

PD801

@PD801

@

RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

PR816

PR816

40.2K_0402_1%

40.2K_0402_1%

1 2

+5VALW

12

PC819

PC819
1U_0402_6.3V6K

1U_0402_6.3V6K

12

6

PU802

PU802

7

POK

8

EN

5

VIN

4

VOUT

VCNTL

3

VOUT

2

FB

9

VIN

GND

APL5912-KAC-TRL_SO8

APL5912-KAC-TRL_SO8

1

+1.5V

1

PJ804

1

JUMP_43X79

JUMP_43X79

2

2

12

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K

PR817

PR817

1.15K_0402_1%

1.15K_0402_1%

PR819

PR819

4.53K_0402_1%

4.53K_0402_1%

PC820

PC820

PJ805

PJ805

@PJ804

@

12

12

0.01U_0402_25V7K

0.01U_0402_25V7K

+VGA_PCIEP +1.0VGS

+VGA_PCIEP

12

12

PC823

PC823

22U_0603_6.3V6K

22U_0603_6.3V6K

PC821

PC821

2

112

JUMP_43X79

JUMP_43X79

@

@

1.0VVGA_PCIE

PR819 4.53K

1.1 V

3K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

PWR-VGA_CORE/VGA_PCIE

PWR-VGA_CORE/VGA_PCIE

PWR-VGA_CORE/VGA_PCIE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

LA8611P

D

of

46 51Friday, November 04, 2011

of

46 51Friday, November 04, 2011

of

46 51Friday, November 04, 2011

0.1

0.1

0.1

5

PC901

PC901

330P_0402_50V7K

PR906

PR906

0_0402_5%

0_0402_5%

PC905

@ PC905

@

1000P_0402_50V7K

1000P_0402_50V7K

PR910

PR910

590_0402_1%

590_0402_1%

@

@

220P_0402_50V7K

220P_0402_50V7K

12

330P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

12

12

12

PC914

PC914

12

APU_VDDNB_SEN_H<7>

+APU_CORE_NB

VSUMP_NB

D D

VSUMN_NB

12

12

PH901

PH901

10K_0402_5%_ERTJ0ER103J

10K_0402_5%_ERTJ0ER103J

12

PR908

PR908

2.61K_0402_1%

2.61K_0402_1%
PR909

PR909

1 2

PC913

PC913

0.1U_0603_25V7K

0.1U_0603_25V7K

1 2

11K_0402_1%

11K_0402_1%

PC911

PC911

10_0402_5%

10_0402_5%

1 2

0.047U_0402_16V7-K

0.047U_0402_16V7-K

PR905

PR905

PC912

PC912

0.1U_0402_25V6

0.1U_0402_25V6

12

PR912

@PR912

@

100_0402_1%

100_0402_1%

PC903

PC903

12

PR902

PR902

2.74K_0402_1%

2.74K_0402_1%

12

PR901

PR901

2K_0402_1%

2K_0402_1%

12

PR907

PR907

301_0402_1%

301_0402_1%

PR916

PR916

10K_0402_1%

10K_0402_1%

12

12

PR903

PR903

137K_0402_1%

137K_0402_1%

12

After rev1.1 must change to 133k

PU901

12

SVC

12
12

SVD

12

VDDIO

12

SVT

12

ENABLE

12

PWROK

12

12

12

PC927

PC927

PR949

PR949

1 2

10
11
12

12

PC928

PC928

0.22U_0402_10V6K

0.22U_0402_10V6K

0.22U_0402_10V6K

0.22U_0402_10V6K

1 2

11K_0402_1%

11K_0402_1%

PU901

1

ISEN2_NB

2

NTC_NB

3

IMON_NB

4

SVC

5

VR_HOT_L

6

SVD

7

VDDIO

8

SVT

9

ENABLE
PWROK
IMON
NTC

ISEN3
ISEN2
ISEN1

PR944
10K_0402_1%

10K_0402_1%

1 2

PC933

PC933

0.022U_0402_16V7K

0.022U_0402_16V7K

PR955

@ PR955

@

100_0402_1%

100_0402_1%

PC934

PC934

0.22U_0402_10V6K

0.22U_0402_10V6K
560_0402_1%

560_0402_1%

12

PR918

PR918

PC917

12

12

1000P_0402_25V6K

1000P_0402_25V6K

1 2

1 2

PR926

@PR926

@

100K_0402_5%

100K_0402_5%

+3VS

PC917

APU_SVC<7>H_PROCHOT#<7,33,40>

APU_SVD<7>

+1.5VS

1 2

APU_SVT<7>

VR_ON<33>

APU_PWRGD<7,12>

FCH_PWRGD<14,33>

+5VS

0_0402_5%

0_0402_5%

@PR940

@

10_0402_5%

10_0402_5%

VSUM-

VSUM+

VSUM-

107K_0402_1%

107K_0402_1%

PR919 27.4K_0402_1%PR919 27.4K_0402_1%

12

PH902

PH902

470K_0402_5%_TSM0B474J4702RE

470K_0402_5%_TSM0B474J4702RE

C C

After rev1.1 must change to 133k

B B

12

12

PR924

PR924

10K_0402_1%

10K_0402_1%

PR965

PR965

APU_IMON

0_0402_5%

0_0402_5%

PR932

PR932

107K_0402_1%

107K_0402_1%

1 2

PC925

PC925

1000P_0402_25V6K

1000P_0402_25V6K

1 2

PR934 27.4K_0402_1%PR934 27.4K_0402_1%

PH903

PH903

470K_0402_5%_TSM0B474J4702RE

470K_0402_5%_TSM0B474J4702RE

12

PR943

PR943
10K_0402_1%

10K_0402_1%

12

PR936

PR936

PR940

+5VS

PR921

PR921

10_0402_5%

10_0402_5%

PR920 0_0402_5%PR920 0_0402_5%
PR923 0_0402_5%PR923 0_0402_5%
PR925 0_0402_5%PR925 0_0402_5%
PR927 0_0402_5%PR927 0_0402_5%
PR928 0_0402_5%PR928 0_0402_5%
PR930 0_0402_5%PR930 0_0402_5%
PR931 0_0402_5%PR931 0_0402_5%

PR933 0_0402_5%@PR933 0_0402_5%@

12
12

12

PR946

PR946

12

2.61K_0402_1%

2.61K_0402_1%

PH904

PH904

10K_0402_5%_ERTJ0ER103J

10K_0402_5%_ERTJ0ER103J

12

PC942

PC942

0.1U_0603_25V7K

0.1U_0603_25V7K

PC902

PC902

390P_0402_50V7K

390P_0402_50V7K

12

PC904

PC904

100P_0402_50V8J

100P_0402_50V8J

12

48

46

47

ISEN1_NB

ISUMP_NB

ISUMN_NB

ISL6277HRTZ-T_TQFN48_6X6

ISL6277HRTZ-T_TQFN48_6X6

ISEN3

15

14

13

12

@PR944

@

PR953

PR953

12

PC943

@ PC943

@

820P_0402_50V7K

820P_0402_50V7K

12

4

45

VSEN_NB

ISUMP16ISEN2

12

44

FB_NB

@ PR904

@

32.4K_0402_1%

32.4K_0402_1%

43

42

COMP_NB

PGOOD_NB

RTN19ISUMN17ISEN1

VSEN

18

1 2

PC935

PC935

330P_0402_50V7K

330P_0402_50V7K

1 2

PR904

12

40

41

FCCM_NB

PWM2_NB

FB21PGOOD

FB2

20

1000P_0402_50V7K

1000P_0402_50V7K

PC946

PC946

0.01U_0402_25V7K

0.01U_0402_25V7K

39

LGATEX

COMP

22

PC931

PC931

FCCM_NB

37

38

PHASEX

UGATEX

BOOT1

23

24

12

PR950

PR950

1.8K_0402_1%

1.8K_0402_1%

LGATE_NB1
PHASE_NB1
UGATE_NB1

BOOTX

VIN

BOOT2
UGATE2
PHASE2

LGATE2

VDDP

VDD
PWM_Y
LGATE1

PHASE1
UGATE1

TP

49

BOOT1

PR947

PR947

301_0402_1%

301_0402_1%

12

10_0402_5%

10_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

10_0402_5%

10_0402_5%

12

PR954

PR954

PR960

PR960

PR963

PR963

PR964

PR964

36
35
34
33
32
31
30
29
28
27
26
25

12

12

12

12

12

PR911

PR911

0_0402_5%

0_0402_5%

BOOT_NB1

BOOT2
UGATE2
PHASE2
LGATE2

LGATE1
PHASE1
UGATE1

PR939

PR939

100K_0402_5%

100K_0402_5%

PC930

PC930

10P_0402_25V8K

10P_0402_25V8K

PC932

PC932

100P_0402_50V8J

100P_0402_50V8J

PR951

PR951

137K_0402_1%

137K_0402_1%

PR952

PR952

2K_0402_1%

2K_0402_1%

+APU_CORE

PR922

PR922

0_0603_5%

0_0603_5%

12

PC918

PC918

0.22U_0603_25V7K

0.22U_0603_25V7K

PR929

PR929

1_0603_5%

1_0603_5%

12

PC923

PC923

1U_0603_16V6K

1U_0603_16V6K

+3VS

12

12

12

PC939

PC939

390P_0402_50V7K

390P_0402_50V7K

12

12

PC941

PC941

680P_0402_50V7K

680P_0402_50V7K

12

12

APU_VDD_SEN_H <7>

APU_VDD_SEN_L <7>

CPU_B+

12

+5VS

12

12

VGATE <33>

PR948

@ PR948

@

32.4K_0402_1%

32.4K_0402_1%

PC924

PC924

1U_0603_16V6K

1U_0603_16V6K

12

3

5

PQ901

PQ901

UGATE_NB1

PHASE_NB1

BOOT_NB1

PR913

PR913

1 2

2.2_0603_5%

2.2_0603_5%

LGATE_NB1

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

UGATE1

PHASE1

BOOT1

1 2

LGATE1

UGATE2

PHASE2

PR958

PR958

BOOT2

1 2

4

PC915

PC915

0.22U_0603_25V7K

0.22U_0603_25V7K

12

4

PQ902

PQ902

PC926

PC926

0.22U_0603_25V7K

0.22U_0603_25V7K

PR938

PR938

12

2.2_0603_5%

2.2_0603_5%

PQ904

PQ904

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

PQ905

PQ905

PC944

PC944

0.22U_0603_25V7K

0.22U_0603_25V7K

12

2.2_0603_5%

2.2_0603_5%

LGATE2

PQ906

PQ906

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

PQ903

PQ903

4

4

123

5

123

4

4

5

5

TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

<BOM Structure>

<BOM Structure>

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

5

123

5

123

TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

123

123

2

12

PC907

PC907

10U_0805_25V6K

10U_0805_25V6K

4

PQ907

PQ907

TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

12

PR941

PR941

4.7_1206_5%

4.7_1206_5%

PC929

PC929

12

680P_0603_50V7K

680P_0603_50V7K

ISEN2

12

PR959

PR959

4.7_1206_5%

4.7_1206_5%

VSUM+

12

PC945

PC945

680P_0603_50V7K

680P_0603_50V7K

VSUM-

CPU_B+

12

PC908

PC908

10U_0805_25V6K

10U_0805_25V6K

5

123

ISEN1

VSUM+

VSUM-

10K_0402_1%

10K_0402_1%

3.65K_0402_1%

3.65K_0402_1%

1_0402_1%

1_0402_1%

12

12

PC910

PC910

PC909

PC909

0.01U_0402_25V7K

0.01U_0402_25V7K

2200P_0402_50V7K

2200P_0402_50V7K

12

4.7_1206_5%

4.7_1206_5%

VSUMP_NB

PR914

PR914

12

PC916

PC916

680P_0603_50V7K

680P_0603_50V7K

CPU_B+

12

12

PC919

PC919

PC920

PC920

PC921

PC921

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

0.01U_0402_25V7K

0.01U_0402_25V7K

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

PR935

PR935

12

10K_0402_1%

10K_0402_1%

PR942

PR942

3.65K_0402_1%

3.65K_0402_1%

12

PR945

PR945

1_0402_1%

1_0402_1%

12

CPU_B+

12

12

PC938

PC938

PC937

PC937

PC936

PC936

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

PR956

PR956

PR961

PR961

PR962

PR962

1

12

2

12

12

VSUMN_NB

12

PC922

PC922

1
2

12

0.01U_0402_25V7K

0.01U_0402_25V7K

PL904

PL904

3.65K_0402_1%

3.65K_0402_1%

12

2200P_0402_50V7K

2200P_0402_50V7K

PL903

PL903

PC940

PC940

2200P_0402_50V7K

2200P_0402_50V7K

PL901

PL901

FBMA-L11-453215-800LMA90T 1812

FBMA-L11-453215-800LMA90T 1812

PR915

PR915

1_0402_1%

1_0402_1%

4
3

12

4
3

1 2

12

PL902

PL902

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

1
2

12

PR917

PR917

12

ISEN2

1 2

PR937

PR937
10K_0402_1%

10K_0402_1%

ISEN1

PR957

PR957
10K_0402_1%

10K_0402_1%

4
3

1

1

+

+

PC906

PC906

2

220U_25V_M

220U_25V_M

+APU_CORE_NB

+APU_CORE_NB
Iocp=39A

+APU_CORE

+APU_CORE
Iocp=49A

+APU_CORE

B+

A A

5

4

3

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom
Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PWR-CPU_CORE/CPU_CORE_NB

PWR-CPU_CORE/CPU_CORE_NB

PWR-CPU_CORE/CPU_CORE_NB

LA8611P

1

of

of

of

47 51Friday, November 04, 2011

47 51Friday, November 04, 2011

47 51Friday, November 04, 2011

0.1

0.1

0.1

5

4

3

2

1

+CPU_CORE_NB

D D

+APU_CORE

12

12

12

12

PC1002

PC1001

PC1001

22U_0603_6.3V6K

22U_0603_6.3V6K

12

PC1012

PC1012

22U_0603_6.3V6K

22U_0603_6.3V6K

C C

PC1002

22U_0603_6.3V6K

22U_0603_6.3V6K

PC1013

PC1013

22U_0603_6.3V6K

22U_0603_6.3V6K

PC1017

PC1017

@

@

22U_0603_6.3V6K

22U_0603_6.3V6K

12

12

PC1003

PC1003

22U_0603_6.3V6K

22U_0603_6.3V6K

PC1014

PC1014

22U_0603_6.3V6K

22U_0603_6.3V6K

PC1018

PC1018

@

@

22U_0603_6.3V6K

22U_0603_6.3V6K

PC1004

PC1004

22U_0603_6.3V6K

22U_0603_6.3V6K

12

12

PC1015

PC1015

22U_0603_6.3V6K

22U_0603_6.3V6K

PC1019

PC1019

@

@

22U_0603_6.3V6K

22U_0603_6.3V6K

12

12

+APU_CORE

1

+

+

PC1022

PC1022

2

330U_D2_2VM_R7M

330U_D2_2VM_R7M

1

+

+

PC1026

PC1026

2

B B

330U_D2_2VM_R7M

330U_D2_2VM_R7M

1

+

+

PC1023

PC1023

2

330U_D2_2VM_R7M

330U_D2_2VM_R7M

1

+

+

PC1024

PC1024

2

330U_D2_2VM_R7M

330U_D2_2VM_R7M

PC1005

PC1005

PC1016

PC1016

1

+

+

PC1025

PC1025

2

@

@

330U_D2_2VM_R7M

330U_D2_2VM_R7M

+CPU_CORE

12

22U_0603_6.3V6K

22U_0603_6.3V6K

12

22U_0603_6.3V6K

22U_0603_6.3V6K

+APU_CORE_NB

12

12

@

@

PC1006

PC1006

22U_0603_6.3V6K

22U_0603_6.3V6K

1

+

+

2

PC1007

PC1007

22U_0603_6.3V6K

22U_0603_6.3V6K

PC1020

PC1020

330U_D2_2VM_R7M

330U_D2_2VM_R7M

@

@

PC1008

PC1008

22U_0603_6.3V6K

22U_0603_6.3V6K

1

+

+

PC1021

PC1021

2

@

@

12

@

@

330U_D2_2VM_R7M

330U_D2_2VM_R7M

+1.2VS

12

12

PC1028

PC1028

PC1027

PC1027

10U_0603_6.3V6K

22U_0603_6.3V6K

22U_0603_6.3V6K

10U_0603_6.3V6K

12

PC1009

PC1009

22U_0603_6.3V6K

22U_0603_6.3V6K

1

+

+

2

12

PC1029

PC1029

10U_0603_6.3V6K

10U_0603_6.3V6K

12

PC1010

PC1010

10U_0603_6.3V6K

10U_0603_6.3V6K

PC1034

PC1034

330U_D2_2VM_R7M

330U_D2_2VM_R7M

12

PC1030

PC1030

10U_0603_6.3V6K

10U_0603_6.3V6K

12

PC1011

PC1011

22U_0603_6.3V6K

22U_0603_6.3V6K

12

PC1031

PC1031

10U_0603_6.3V6K

10U_0603_6.3V6K

12

PC1032

PC1032

10U_0603_6.3V6K

10U_0603_6.3V6K

12

PC1033

PC1033

10U_0603_6.3V6K

10U_0603_6.3V6K

+1.2VS

A A

5

4

Security Classification

Security Classification

Security Classification

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PWR - PROCESSOR DECOUPLING

PWR - PROCESSOR DECOUPLING

PWR - PROCESSOR DECOUPLING

LA8611P

1

of

48 51Friday, November 04, 2011

of

48 51Friday, November 04, 2011

of

48 51Friday, November 04, 2011

0.1

0.1

0.1

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

for PWR

Reason for change PG# Modify List Date PhaseItem

1

D D

2

3

4

5

6

7

8

C C

9

10

11

12

13

14

B B

15

16

17

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PIR (PWR)

PIR (PWR)

PIR (PWR)

LA8611P

49 51Friday, November 04, 2011

49 51Friday, November 04, 2011

49 51Friday, November 04, 2011

1

0.1

0.1

0.1

of

of

of

5

A

+3VALW
+5VALW

D D

EC->FCH

FCH -> EC

SPOK

+1.1VALW

EC_ON

ON/OFFBTN#

EC_RSMRST#

RTC_CLK

T1

4

3

2

1

1ms< T1 < 100ms : +3VALW rising time, for LAN chip request

+3VALW need rampe up before +1.1VALW or at the same time.

T2 < 50ms : EC_RSMRST# rising time

T2

T3

+3VALW need rampe up before EC_RSMRST# de-assertion at least 10ms
+1.1VALW need rampe up before EC_RSMRST# de-assertion

T3 > 16ms : EC_RSMRST# de-assert to start RTCCLK

EC->FCH

FCH -> EC

EC -> PWR

EC -> PWR

C C

EC -> PWR

PWR -> EC

B B

EC->FCH

FCH -> APU

FCH -> APU

FCH -> EC

FCH -> Device

FCH -> APU

PBTN_OUT#

SLP_S5#
SLP_S3#

SYSON

1.5V

SUSP#

+0.75VS

+1.1VS

+1.5VS

+2.5VS

+3VS

+5VS

VR_ON

+APU_CORE

+APU_CORE_NB

VGATE

FCH_POK
(FCH_PWRGD)

APU_CLK
DISP_CLK

APU_PWRGD

KB_RST#

PLT_RST#
A_RST#

APU_RST#

T13

T11

T13 > 200ns : PBTN_OUT# to SLP_S3#/S5# de-assertion

T11< 32ms : FCH_POK assertion to clock out

T7

98ms< T7< 150ms : FCH_POK assertion to APU_PWRGD

KB_RST# should be de-asserted before FCH_POK

T9

101ms< T9< 113ms : FCH_POK assertion to A_RST# de-assertion

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Power sequence

Power sequence

Power sequence
LA8611P

LA8611P

LA8611P

50 51Friday, November 04, 2011

50 51Friday, November 04, 2011

50 51Friday, November 04, 2011

of

of

of

0.1

0.1

0.1

5

4

3

2

1

PXS_PWREN

+1.8VSP +1.8VGS

SY8033

D D

ADAPTER

Charger

B+

+5VALWP

+3VALWP

RT8205E

+5VALW

+5VS

+3VS+3VALW

PXS_PWREN

+2.5VSP

APL5508

+3VGS

+2.5VS

+1.5VS

BATTERY

C C

PX_MODE

+1.5VP +1.5V

SYSON

SUSP#

TPS51212

+1.2VSP +1.2VS

TPS51212

SUSP

PXS_PWREN

+1.1VALWP +1.1VALW

SPOK

TPS51212

+1.5VGS

+0.75VSP

APL5336

+VGA_PCIEP

APL5912

+1.1VS

+0.75VS

+1.0VGS

B B

+APU_CORE_NB

+APU_CORE

VR_ON

PX_MODE

A A

ISL6277

+VGA_COREP

TPS51518

+VGA_CORE

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/12 2013/10/12

2011/10/12 2013/10/12

2011/10/12 2013/10/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

Power diagram

Power diagram

Power diagram
LA8611P

LA8611P

LA8611P

1

of

of

of

51 51Wednesday, November 09, 2011

51 51Wednesday, November 09, 2011

51 51Wednesday, November 09, 2011

0.1

0.1

0.1