Compal LA-8581P QAQ10, G585, LA-8581P QAQ11 Schematic

5

D D

4

3

2

1

Compal Confidential

C C

QAQ10/11

LA-8581P

B B

SchematicREV0.1

Intel Ivy Bridge/Pather Point

UMA&OPT

2011-09-28 Rev 0.1

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Wednesday, November 23, 2011

1

1 59

1 59

1 59

0.1

0.1

0.1

5

4

3

2

1

Compal Confidential
Model Name : QAQ10/11
File Name : LA-8581P

PEG(DIS)

PCI-E 2.0x16 5GT/s PER LANE100MHz

133MHz

Mobile

Ivy Bridge

Fan Control

page 6

CPU Dual Core

D D

VGA (DDR3)

Socket-rPGA988B

37.5mm*37.5mm

page 5,6,7,8,9,10

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 1066/1333

204pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

page 11,12

NVIDIA N13P-GLP, 128bit with 1GB/2GB

page 13,14,15,16,17,18,19,20,21

page 22

OPT & UMA

CRT

HDMI Conn.

page 24

page 23

OPT & UMA

LCD Conn.

C C

port 4

PCIeMini Card
WLAN &BT

USB Port 13

PCIe Port 2

port 2 port 1

port 6

PCIe Mini Card WWAN
&SIM

PCIe Port 3

USB Port 12

page 36

PCI-Express x 8 (ARD PCIE2.0 2.5GT/s)

port 3

port 5

RTL8111E&Intel 82579

PCIe port 1

page 36

100MHz

page 35,42

page 25 ~ 32

25mm*25mm

DMI X4

Intel
Panther Point-M

989pin FCBGA

HM76

RJ45

JMB385/388 Card Reader
&1394
PCIe Port 6

B B

page 37

Express Card
PCIe Port 5

USB port 8

page 39

page 39

LPC BUS

33MHz

FDI

USB/B Right

USB port 3,4

USB

Smart Card

SATA port 0

5V 1.5GHz(150MB/s)

SATA port 2

5V 1.5GHz(150MB/s)

SATA port 4

5V 1.5GHz(150MB/s)

page 44

USB port 9

page 39

SATA HDD0

SATA ODD

E-SATA

USB port 3

HD Audio

USB Left Port

USB port 1,2

page 43

Int. Camera

USB port 10

page 23

page 34

page 34

page 43

3.3V 24.576MHz/48Mhz

USB3.0

USB port 0

Finger Print

USB port 11

HDA Codec

ALC259

page 38

page 40

page 40

BIOS ROM

page 33

USB&Function/B

Power/B

Touch Pad/B

page 43

page 43

page 43

SIO

Page 47

Touch Pad

ENE KB9012

page 43

page 41

Int.KBD

page 40

TPM 1.2

page 34

MIC

Int.

page 38

MIC CONN

page 38

HP CONN

page 38

SPK CONN

page 38

RTC CKT.

page 25,47

A A

DC/DC Interface

page 45

Security Classification

Security Classification

Power Circuit DC/DC

page 51,52,53,54,55,56,57,58,59,60

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EC ROM

page 33

Compal Secret Data

Compal Secret Data

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

Block Diagrams

Block Diagrams

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

2 59Wednesday, November 23, 2011

2 59Wednesday, November 23, 2011

2 59Wednesday, November 23, 2011

1

0.1

0.1

0.1

B+

5

Ipeak=5A, Imax=3.5A, Iocp min=7.9

4

DESIGN CURRENT 5A

3

+5VALW

2

1

SUSP

N-CHANNEL

SI4800

DESIGN CURRENT 4A

+5VS

SUSP#

D D

SY8033BDBC

DESIGN CURRENT 2A

+1.8VS

RT8205

Ipeak=5A, Imax=3.5A, Iocp min=7.7

WOL_EN#

P-CHANNEL

AO-3413

SUSP

N-CHANNEL

SI4800

P-CHANNEL

AO-3413

P-CHANNEL

AO-3413

C C

P-CHANNEL

AO-3413

VR_ON

ISL95831CRZ

DESIGN CURRENT 5A

DESIGN CURRENT 330mA

DESIGN CURRENT 4A

VGA_ENVDD

DESIGN CURRENT 1.5A

BT_PWR#

DESIGN CURRENT 180mA

PCIE_OK

DESIGN CURRENT 100mA

DESIGN CURRENT 52A

+3VALW

+3V_LAN

+3VS

+LCD_VDD

+BT_VCC

+3VS_DELAY

+CPU_CORE

DESIGN CURRENT 30A

+GFX_CORE

DGPU_PWR_EN / SUSP#

APW7138

DESIGN CURRENT 26A

+VGA_CORE

SUSP#

B B

G5603RU1U

SYSON

Ipeak=18A, Imax=12.6A, Iocp min=19.8

Ipeak=15A, Imax=10.5A, Iocp min=16.5

DESIGN CURRENT 18A

DESIGN CURRENT 15A

+1.05VS_VCCP

+1.5V

+1.5V_CPU

G5603RU1U

CPU1.5V_S3_GATE / SUSP

APL5336

DESIGN CURRENT 2A

SUSP

SI4856

DESIGN CURRENT 12A

SUSP#

A A

G5603RU1U

5

4

DESIGN CURRENT 6A

+0.75VS

+1.5VS

+VCCSA

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Power Map

Power Map

Power Map

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

3 59Wednesday, November 23, 2011

3 59Wednesday, November 23, 2011

3 59Wednesday, November 23, 2011

1

0.1

0.1

0.1

5

Voltage Rails

Power Plane Description

VIN

BATT+ Battery power supply (12.6V) N/A N/A N/A

B+

D D

+CPU_CORE

+VGA_CORE

+VGFX_CORE Core voltage for UMA graphic ON OFF OFF

+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator

+1.0VSDGPU +1.0VSPDGPU to +1.0VSDGPU switched power rail for GPU

+1.05VS_VCCP

+1.05VS_PCH +1.05VS_VCCP to +1.05VS_PCH power for PCH

+1.5V

+1.5VS

+1.5VSDGPU +1.5VS to +1.5VSDGPU switched power rail for GPU ON OFF OFF

+1.8VS (+5VALW or +3VALW) to 1.8V switched power rail to PCH & GPU

+3VALW +3VALW always on power rail

+3VALW_EC +3VALW always to KBC ON ON ON*

+3V_LAN

+3VALW_PCH

C C

+3VS

+5VALW

+5VALW_PCH

+5VS +5VALW to +5VS switched power rail OFFON OFF

+VSB +VSBP to +VSB always on power rail for sequence control ON ON*

+RTCVCC RTC power

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

Core voltage for GPU

+1.05VS_VCCPP to +1.05VS_VCCP switched power rail for CPU

+1.5VP to +1.5V power rail for DDRIII ON ON OFF

+1.5V to +1.5VS switched power rail

+3VALW to +3V_LAN power rail for LAN

+3VALW to +3VALW_PCH power rail for PCH (Short Jumper)

+3VALW to +3VS power rail

+5VALWP to +5VALW power rail

+5VALW to +5VALW_PCH power rail for PCH (Short resister)

4

S1

S3 S5

N/A N/A N/A

N/AN/AN/A

ON

ON

OFF

OFF

OFF

OFF

ON OFF OFF

ON OFF OFF

ON OFF OFF

ON OFF OFF

ON OFF OFF

OFF

ON

ON

ON ON

ON ON

ON

ON

ON ON

OFF

ON ON*

ON*

ON*

OFF

OFF

ON ON*

ON*

ON

ON

ONON

3

2

BOM configu table

SKU Description Bom config

QAQ00 UMA GIGA W/HDMI

1

QAQ01 DIS DU N12GE2G W/HDMI

2

QAQ02 UMA VPRO W/HDMI

3

4

5

6

7

8

DA8@/8111E@/PCH@/UMA@/385@/IN_TPM@/TPM@/SM@/USB30@/OPT@/388@/USB20@/VPRO@/WB_TPM@

DA8@/8111E@/PCH@/UMA@/385@/IN_TPM@
TPM@/SM@/USB30@ 4619F230L01

DA8@/8111E@/PCH@/OPT@/388@/USB20@/12GE@

DA8@/VPRO@/385@/USB20@/TPM@/IN_TPM@/SM@

4619F230L11

4619F230L21

X76 AND VGA configu table

SKU Description Config

1

4619F230L11
2
3
4

SAM1G8@ ZZZ

SAM 1G
ZZZ

SAM1G8@ ZZZ

SAM 1G
ZZZ

SAM2G@

SAM 2G

Hynix 1G

Hynix 1G
ZZZ
Hynix 2G

5
6
7

HY1G8@

HY1G8@

HY2G@

UV1

12GE@ZZZ

N12P-GE
UV1

12GV2@

N12P-GV2
UV1

12GE@

N12P-GE

QAQ01 DIS DU N12GE2G W/HDMI

1

Device

Device

PCH

Clock Generator

DDR DIMMA

DDR DIMMB

Slot#1--WLAN

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

ON

HIGH HIGH HIGH HIGH

LOW

LOW

LOW

HIGH

LOWLOWLOW

HIGHHIGHHIGH

HIGH

HIGH

LOW LOW LOW LOW

ON

ON

ON

ON

ON

ON

OFF

ON

OFF

EC SM Bus2 address

+3VS EC KB930+3VL EC KB930

0001 011x b

+3VS GPU Thermal Sensor

Address

1101 001x b

1001 000x b

1001 010x b

5

Device

PCH+3VALW

4

AddressAddress

ON ON

ON

OFF

OFF

OFF

LOW

OFF

OFF

OFF

Board ID Table

Board ID Rb / Rd / Rf V min Vtyp Vmax PCB Revision

0

1

2

3

4

5

6

7

0

8.2K +/- 5%

18K +/- 5%

33K +/- 5%

56K +/- 5%

100K +/- 5%

200K +/- 5%

NC

Ra/Rc/Re VCC

100K +/- 5% 3.3V +/- 5%

100K +/- 5%

100K +/- 5%

100K +/- 5%

100K +/- 5%

100K +/- 5%

100K +/- 5%

100K +/- 5%

3.3V +/- 5%

3.3V +/- 5%

3.3V +/- 5%

3.3V +/- 5%

3.3V +/- 5%

3.3V +/- 5%

3.3V +/- 5%

0V

0.216 V0V0.250 V

0.436 V

0.712 V

1.036 V

1.453 V

1.935 V

2.500 V

0.503 V

0.819 V

1.185 V

1.650 V

2.200 V

3.300 V

0V

0.289 V

0.538 V

0.875 V

1.264 V

1.759 V

2.341 V

3.300 V

0.1

0.2

0.3

0.4

1.0

VPRO

PCH And PCBA table

UPCH1

PCH

BD82HM65 SLH9D B2 FCBGA 989P PCH

PCH@

PCB

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

UPCH1
BD82QM67 SLJ4M B3 FCBGA 989P PCH

VPRO@

ZZZ

DA8@

PCB LA-7661P REV01

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date:

Date:

Date:

Compal Electronics, Inc.

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Notes List

Notes List

Notes List

1

Sheet

Sheet

Sheet

of

of

of

4 59

4 59

4 59

0.1

0.1

0.1

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

B B

S4 (Suspend to Disk)

S5 (Soft OFF)

EC SM Bus1 address

Power Power

+3VL Smart Battery

PCH SM Bus address

Power

A A

+3VALW

+3VS

+3VS

+3VS

+3VS

V

VY BRIDGE

SS

1

F22

VSS234

F19

V

SS235

E30

SS236

V

E27

V

SS237

E24

SS238

V

E21

V

SS239

E18

SS240

V
VSS241
V

SS242

SS243

V
V

SS244

SS245

V
V

SS246

SS247

V

SS248

V
V

SS249

SS250

V
V

SS251

SS252

V
V

SS253

SS254

V

SS255

V
V

SS256

SS257

V
V

SS258

SS259

V
VSS260

SS261

V

SS262

V
V

SS263

SS264

V
V

SS265

SS266

V
VSS267
V

SS268

SS269

V
V

SS270

SS271

V
V

SS272

SS273

V
VSS274
V

V
V

V
V

V
VSS281
V

V
V

V

SS275

SS276
SS277

SS278
SS279

SS280

SS282

SS283
SS284

SS285

D

E15
E13

E10
E9

E8
E7

E6
E5
E4

E3
E2

E1
D35

D32
D29
D26

D20
D17

C34
C31

C28
C27
C25

C23
C10

C1
B22
B19

B17
B15

B13
B11

C

B9
B8
B7

B5
B3

B2
A35

A32
A29
A26

A23
A20

A3

B

5

CPU1A

J

D

C

+

1.05VS_VCCP

1.05VS_VCCP

+

B

DMI_CRX_PTX_N0<27>

D

MI_CRX_PTX_N1<27>

D

MI_CRX_PTX_N2<27>

D

MI_CRX_PTX_N3<27>

D

MI_CRX_PTX_P0<27>

MI_CRX_PTX_P1<27>

D

MI_CRX_PTX_P2<27>

D

D

MI_CRX_PTX_P3<27>

MI_CTX_PRX_N0<27>

D

MI_CTX_PRX_N1<27>

D

D

MI_CTX_PRX_N2<27>

D

MI_CTX_PRX_N3<27>

DMI_CTX_PRX_P0<27>

MI_CTX_PRX_P1<27>

D

MI_CTX_PRX_P2<27>

D

MI_CTX_PRX_P3<27>

D

DI_CTX_PRX_N0<27>

F
F

DI_CTX_PRX_N1<27>

DI_CTX_PRX_N2<27

>

F

DI_CTX_PRX_N3<27>

F
F

DI_CTX_PRX_N4<27>

DI_CTX_PRX_N5<27>

F
F

DI_CTX_PRX_N6<27>

DI_CTX_PRX_N7<27>

F

FDI_CTX_PRX_P0<27 >
F

DI_CTX_PRX_P1<27>

DI_CTX_PRX_P2<27>

F
F

DI_CTX_PRX_P3<27>

DI_CTX_PRX_P4<27>

F
F

DI_CTX_PRX_P5<27>

DI_CTX_PRX_P6<27>

F
FDI_CTX_PRX_P7<27 >

F

DI_FSYNC0<27>

DI_FSYNC1<27>

F

F

DI_INT<27>

DI_LSYNC0<27>

F
F

DI_LSYNC1<27>

R

C4 24.9_0402_1%

1

2

10K_0402_5%
R

88

@

DI_CTX_PRX_N0

F

F

DI_CTX_PRX_N1

FDI_CTX_PRX_N2
F

DI_CTX_PRX_N3

DI_CTX_PRX_N4

F

DI_CTX_PRX_N5

F

DI_CTX_PRX_N6

F

F

DI_CTX_PRX_N7

DI_CTX_PRX_P0

F

F

DI_CTX_PRX_P1

F

DI_CTX_PRX_P2

DI_CTX_PRX_P3

F

DI_CTX_PRX_P4

F
F

DI_CTX_PRX_P5

DI_CTX_PRX_P6

F

DI_CTX_PRX_P7

F

F

DI_FSYNC0

FDI_FSYNC1

F

DI_INT

F

DI_LSYNC0

DI_LSYNC1

F

2

DP_COMP

E

1

E

DP_HPD#

B27

D

B25

D

A25

D

B24

D

B28

D

B26

DMI_RX[1]

A24

D

B23

D

G21

D

E22

D

F21

D

D21

D

G22

DMI_TX[0]

D22

D

F20

D

C21

D

A21

F

H19

F

E19

F

F18

F

B21

F

C20

F

D18

F

E17

F

A22

FDI0_TX[0]

G19

F

E20

F

G18

F

B20

F

C19

F

D19

F

F17

FDI1_TX[3]

J18

F

J17

F

H20

F

J19

F

H17

F

A18

eDP_COMPIO

A17

e

B16

e

C15

e

D15

e

C17

e

F16

eDP_TX[1]

C16

e

G15

e

C18

e

E16

e

D16

e

F15

e

TYCO_2013620-2_I

CONN@

MI_RX#[0]
MI_RX#[1]

MI_RX#[2]
MI_RX#[3]

MI_RX[0]

MI_RX[2]

MI_RX[3]

MI_TX#[0]

MI_TX#[1]
MI_TX#[2]

MI_TX#[3]

MI_TX[1]

MI_TX[2]
MI_TX[3]

DI0_TX#[0]
DI0_TX#[1]

DI0_TX#[2]
DI0_TX#[3]
DI1_TX#[0]

DI1_TX#[1]
DI1_TX#[2]

DI1_TX#[3]

DI0_TX[1]

DI0_TX[2]
DI0_TX[3]

DI1_TX[0]
DI1_TX[1]

DI1_TX[2]

DI0_FSYNC

DI1_FSYNC

DI_INT

DI0_LSYNC
DI1_LSYNC

DP_ICOMPO

DP_HPD#

DP_AUX
DP_AUX#

DP_TX[0]

DP_TX[2]
DP_TX[3]

DP_TX#[0]

DP_TX#[1]
DP_TX#[2]

DP_TX#[3]

4

EG_ICOMPI

P
EG_ICOMPO

P

P

EG_RCOMPO

P
P

P
PEG_RX#[3]
P

P
P

P

DMI

P

P
PEG_RX#[10]
P

EG_RX#[11]

EG_RX#[12]

P
P

EG_RX#[13]

EG_RX#[14]

P
P

EG_RX#[15]

P

CS

P
P

P
P

P
PEG_RX[6]
P

P

P

P

P

PEG_RX[13]

P

P

P

P

P

P

P
P

Intel(R) FDI

P
P

P
PEG_TX#[9]

EG_TX#[10]

P

EG_TX#[11]

P

CI EXPRESS* - GRAPHI

P

EG_TX#[12]

P

EG_TX#[13]

P
P

EG_TX#[14]

EG_TX#[15]

P

DP

P

e

P
P

P
P
P

VY BRIDGE

EG_RX#[0]
EG_RX#[1]

EG_RX#[2]

EG_RX#[4]

EG_RX#[5]
EG_RX#[6]

EG_RX#[7]
EG_RX#[8]

EG_RX#[9]

EG_RX[0]
EG_RX[1]
EG_RX[2]

EG_RX[3]
EG_RX[4]

EG_RX[5]

EG_RX[7]

EG_RX[8]

P

EG_RX[9]

EG_RX[10]
EG_RX[11]

EG_RX[12]

EG_RX[14]

EG_RX[15]

EG_TX#[0]

EG_TX#[1]
EG_TX#[2]

EG_TX#[3]
EG_TX#[4]
EG_TX#[5]

EG_TX#[6]
EG_TX#[7]

EG_TX#[8]

PEG_TX[0]
P

EG_TX[1]

EG_TX[2]

P
P

EG_TX[3]

EG_TX[4]

P
P

EG_TX[5]

EG_TX[6]

P
PEG_TX[7]
P

EG_TX[8]

EG_TX[9]

P
EG_TX[10]

EG_TX[11]
EG_TX[12]

EG_TX[13]
EG_TX[14]
EG_TX[15]

J22
J21
H22

K33
M35

L34

P

CIE_GTX_C_CRX_N0

J35

CIE_GTX_C_CRX_N1

P

J32

P

CIE_GTX_C_CRX_N2

H34

P

CIE_GTX_C_CRX_N3

H31

CIE_GTX_C_CRX_N4

P

G33

CIE_GTX_C_CRX_N5

P

G30

CIE_GTX_C_CRX_N6

P

F35

CIE_GTX_C_CRX_N7

P

E34

P

CIE_GTX_C_CRX_N8

E32

CIE_GTX_C_CRX_N9

P

D33

CIE_GTX_C_CRX_N10

P

D31

P

CIE_GTX_C_CRX_N11

B33

CIE_GTX_C_CRX_N12

P

C32

CIE_GTX_C_CRX_N13

P

PCIE_GTX_C_CRX_N14

J33

P

CIE_GTX_C_CRX_N15

L35
K34

P

CIE_GTX_C_CRX_P0

H35

P

CIE_GTX_C_CRX_P1

H32

CIE_GTX_C_CRX_P2

P

G34

P

CIE_GTX_C_CRX_P3

G31

CIE_GTX_C_CRX_P4

P

F33

P

CIE_GTX_C_CRX_P5

F30

CIE_GTX_C_CRX_P6

P

E35

CIE_GTX_C_CRX_P7

P

E33

PCIE_GTX_C_CRX_P8

F32

P

CIE_GTX_C_CRX_P9

D34

P

CIE_GTX_C_CRX_P10

E31

CIE_GTX_C_CRX_P11

P

C33

CIE_GTX_C_CRX_P12

P

B32

CIE_GTX_C_CRX_P13

P
P

CIE_GTX_C_CRX_P14

M29

CIE_GTX_C_CRX_P15

P

M32
M31

CIE_CTX_GRX_N0

P

L32

CIE_CTX_GRX_N1

P

L29

P

CIE_CTX_GRX_N2

K31

CIE_CTX_GRX_N3

P

K28

P

CIE_CTX_GRX_N4

J30

PCIE_CTX_GRX_N5

J28

CIE_CTX_GRX_N6

P

H29

CIE_CTX_GRX_N7

P

CIE_CTX_GRX_N8

G27

P

E29

P

CIE_CTX_GRX_N9

PCIE_CTX_GRX_N10

F27

D28

P

CIE_CTX_GRX_N11

CIE_CTX_GRX_N12

P

F26

P

CIE_CTX_GRX_N13

E25

CIE_CTX_GRX_N14

P
PCIE_CTX_GRX_N15

M28
M33

CIE_CTX_GRX_P0

P

M30

CIE_CTX_GRX_P1

P

L31

CIE_CTX_GRX_P2

P

L28

P

CIE_CTX_GRX_P3

K30

P

CIE_CTX_GRX_P4

K27

PCIE_CTX_GRX_P5

J29

CIE_CTX_GRX_P6

P

J27

P

CIE_CTX_GRX_P7

H28

P

CIE_CTX_GRX_P8

G28

CIE_CTX_GRX_P9

P

E28

P

CIE_CTX_GRX_P10

F28

CIE_CTX_GRX_P11

P

D27

PCIE_CTX_GRX_P12

E26

P

CIE_CTX_GRX_P13

D25

CIE_CTX_GRX_P14

P
P

CIE_CTX_GRX_P15

EG_COMP

P

24.9_0402_1%

3

+1.05VS_VCCP

1

R

C2

2

P

EG_ICOMPI and RCOMPO signals should be shorted and routed
with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils

- typical impedance = 14.5 mohms

CIE_GTX_C_CRX_N[0..1

P

CIE_GTX_C_CRX_P[0..1

P

2

1

222 0.1U_0402_16 V7KOPT@

C

2

136 0.1U_0402_16V7KOPT@

1

C

2

1

C

60 0.1U_0402_16V7 KOPT@

2

1

75 0.1U_0402_16V7 KOPT@

C

2

1

67 0.1U_0402_16V7KOPT@

C

2

1

C220 0.1U_0402_16V7KOPT@

2

1

C

118 0.1U_0402_16V7KOPT@

2

1

C

62 0.1U_0402_16 V7KOPT@

2

1

59 0.1U_0402_16V7KOPT@

C

2

1

115 0.1U_0402 _16V7KOPT@

C

2

70 0.1U_0402_16V7KOPT@

1

C

2

1

C

197 0.1U_0402_16V7 KOPT@

2

61 0.1U_0402_16 V7KOPT@

1

C

2

1

C

223 0.1U_0402_16V7KOPT@

2

1

C88 0.1U_0402_16V7 KOPT@

2

1

68 0.1U_0402_16V7KOPT@

C

2

1

209 0.1U_0402_16V7 KOPT@

C

2

1

66 0.1U_0402_16 V7KOPT@

C

2

1

C

224 0.1U_0402_16V7KOPT@

2

1

C

89 0.1U_0402_16 V7KOPT@

2

1

C

69 0.1U_0402_16V7KOPT@

2

1

C

221 0.1U_0402 _16V7KOPT@

2

1

C

135 0.1U_0402_16V7KOPT@

2

1

71 0.1U_0402_16 V7KOPT@

C

2

1

C

74 0.1U_0402_16 V7KOPT@

2

1

72 0.1U_0402_16V7KOPT@

C

2

1

C

214 0.1U_0402_16V7 KOPT@

2

1

C117 0.1U_0402_16V7KOPT@

2

1

C78 0.1U_0402_16V7KOPT@

2

1

87 0.1U_0402_16V7 KOPT@

C

2

1

79 0.1U_0402_16V7KOPT@

C

2

1

111 0.1U_0402_16V7KOPT@

C

5] <13>

nals swapped at VGA side.

PEG sig

5] <13>

P

CIE_CTX_C_GRX_N0

P

CIE_CTX_C_GRX_N1

PCIE_CTX_C_GRX_N2

CIE_CTX_C_GRX_N3

P

CIE_CTX_C_GRX_N4

P

P

CIE_CTX_C_GRX_N5

CIE_CTX_C_GRX_N6

P

CIE_CTX_C_GRX_N7

P

P

CIE_CTX_C_GRX_N8

CIE_CTX_C_GRX_N9

P

CIE_CTX_C_GRX_N10

P

P

CIE_CTX_C_GRX_N11

P

CIE_CTX_C_GRX_N12

P

CIE_CTX_C_GRX_N13

CIE_CTX_C_GRX_N14

P

CIE_CTX_C_GRX_N15

P

P

CIE_CTX_C_GRX_P0

CIE_CTX_C_GRX_P1

P

P

CIE_CTX_C_GRX_P2

CIE_CTX_C_GRX_P3

P

CIE_CTX_C_GRX_P4

P

CIE_CTX_C_GRX_P5

P

PCIE_CTX_C_GRX_P6

CIE_CTX_C_GRX_P7

P

CIE_CTX_C_GRX_P8

P

CIE_CTX_C_GRX_P9

P

CIE_CTX_C_GRX_P10

P

P

CIE_CTX_C_GRX_P11

P

CIE_CTX_C_GRX_P12
CIE_CTX_C_GRX_P13

P

P

CIE_CTX_C_GRX_P14
CIE_CTX_C_GRX_P15

P

2

P

CIE_CTX_C_GRX_N[0..1

CIE_CTX_C_GRX_P[0..15] <13>

P

5] <13>

CPU1I

J

T35

VSS161

T34

V

T33

V

T32

V

T31

V

T30

V

T29

V

T28

VSS168

T27

V

T26

V

P9

V

P8

V

P6

V

P5

V

P3

V

P2

V

N35

V

N34

V

N33

V

N32

V

N31

V

N30

V

N29

V

N28

V

N27

V

N26

V

M34

VSS187

L33

V

L30

V

L27

V

L9

V

L8

V

L6

V

L5

VSS194

L4

V

L3

V

L2

V

L1

V

K35

V

K32

V

K29

VSS201

K26

V

J34

V

J31

V

H33

V

H30

V

H27

V

H24

V

H21

V

H18

V

H15

V

H13

V

H10

V

H9

V

H8

V

H7

V

H6

V

H5

V

H4

V

H3

VSS220

H2

V

H1

V

G35

V

G32

V

G29

V

G26

V

G23

VSS227

G20

V

G17

V

G11

V

F34

V

F31

V

F29

V

TYCO_2013620-2_I

CONN@

SS162

SS163
SS164

SS165
SS166

SS167

SS169

SS170
SS171

SS172
SS173

SS174
SS175
SS176

SS177
SS178

SS179
SS180

SS181
SS182
SS183

SS184
SS185

SS186

SS188
SS189
SS190

SS191
SS192

SS193

SS195

SS196
SS197

SS198
SS199

SS200

SS202

SS203
SS204

SS205
SS206

SS207
SS208
SS209

SS210
SS211

SS212
SS213

SS214
SS215
SS216

SS217
SS218

SS219

SS221
SS222
SS223

SS224
SS225

SS226

SS228

SS229

SS230

SS231
SS232

SS233

A

ecurity Classificati

ecurity Classificati

ecurity Classificati

Issued Date

I

ssued Date

ssued Date

I

HIS SHEET OF ENGINEE

HIS SHEET OF ENGINEE

3

on

on

on

011/09/23 2012/12/31

2

011/09/23 2012/12/31

2

2

011/09/23 2012/12/31

RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

RING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

ompal Secret Data

C

ompal Secret Data

C

C

ompal Secret Data

Deciphered Date

D

eciphered Date

eciphered Date

D

2

C

ompal Elec

itle

T

T

itle

T

itle

Size Document Number

Custom

QAQ10 LA-8581P M/B

Date: Sheet

Date: Sheet

Date: Sheet

Wednesday, November 23, 2011

tronics, Inc.

1

5 60

5 60

5 60

S

S

S

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

T

T

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

Rev

0.1

o

f

f

o

f

o

5

D D

4

3

PM_DRAM_PWRGD<27>

SYSTEM_PWROK<27>

2

R289

200_0402_1%

+3VALW +3VS

12

R104

0_0402_5%

RC21 0_0402_5%

D_PWG

RUN_ON_CPU1.5VS3#<10,45>

RC13

@

10K_0402_5%

SUSP<11,40,43,45>

+3VALW

U5

5

74AHC1G08DCKR_SC70-5

1

P

B

O

2

A

G

3

1 2

RC17

0_0402_5%

1 2

RC16

0_0402_5%

1

0.1U_0402_16V4Z

C85

4

@

@

2

G

+1.5V_CPU_VDDQ

R110
39_0402_1%

@

13

D

@

Q5
2N7002_SOT23-3

S

R81
200_0402_1%

VDDPWRGOOD

+3VS

0.1U_0402_16V4Z

5

C C

PLT_RST#<28,34,35,36,37,39,41,42,44>

PROC_SELECT#:
Sandy Bridge---output high;

Processor Pullups

H_PROCHOT#

B B

A A

1 2

220P_0402_25V8J

R47
62_0402_5%

CC62

@

H_CPUPWRGD_R

+1.05VS_VCCP

H_PROCHOT#<41,47>

H_THERMTRIP#<29>

220P_0402_25V8J

Ivy Bridge---output low.

H_SNB_IVB#<29>

T0501

H_PECI<29,41>

H_PROCHOT#

Place R58 close to CPU.

H_PM_SYNC<27>

H_CPUPWRGD<29>

VDDPWRGOOD

H_CATERR#

1 2

RC44
43_0402_1%

R58

1 2

56_0402_5%

1 2

R14 0_0402_5%

R15

1 2

0_0402_5%

R16

1 2

0_0402_5%

R79

1 2

130_0402_1%

R5010K_0402_5%

C379

@

H_PECI_R

H_PROCHOT#_R

H_THERMTRIP#_R

H_PM_SYNC_R

H_CPUPWRGD_R

VDDPWRGOOD_R

BUF_CPU_RST#

JCPU1B

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

TYCO_2013620-2_IVY BRIDGE

CONN@

BCLK

BCLK#

MISCTHERMALPWR MANAGEMENT

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

DDR3

MISC

PRDY#

PREQ#

TCK

TMS

TRST#

TDI

TDO

DBR#

BPM#[0]
BPM#[1]

JTAG & BPM

BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

A28
A27

A16
A15

R8

AK1
A5
A4

AP29
AP27

AR26
AR27
AP30

AR28
AP26

AL35

XDP_DBRESET#

AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32

CLK_CPU_DMI_R
CLK_CPU_DMI#_R

CLK_CPU_DPLL_R
CLK_CPU_DPLL#_R

H_DRAMRST#

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

XDP_PRDY#_R
XDP_PREQ#_R

XDP_TCK_R
XDP_TMS_R
XDP_TRST#_R

XDP_TDI_R
XDP_TDO_R

1 2

R138 0_0402_5%

1 2

R139 0_0402_5%

1 2

R126 1K_0402_5%

1 2

R115 1K_0402_5%

H_DRAMRST# <7>

DDR3 Compensation Signals

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

EN_DFAN1<41>

CLK_CPU_DMI <26>
CLK_CPU_DMI# <26>

+1.05VS_VCCP

1A

+5VS

+FAN1

1

10mil

2

1 2

1 2

1 2

U58

1

EN

2

VIN

3

VOUT

4

VSET

G996P11U SOP 8P
C1
10U_0805_10V4Z

RC42140_0402_1%

RC4325.5_0402_1%

RC45200_0402_1%

10U_0805_10V4Z

GND
GND
GND
GND

8
7
6
5

U3

1

P

NC

4

Y

2

A

G

SN74LVC1G07DCKR_SC70-5

3

PU/PD for JTAG signals

XDP_TMS_R

XDP_TDI_R

XDP_PREQ#_R

XDP_TDO_R

XDP_TCK_R

XDP_TRST#_R

FAN Control Circuit

2

C863

1

+1.05VS_VCCP

12

C84

BUFO_CPU_RST# BUF_CPU_RST#

+FAN1

2

C864

@

1000P_0402_50V7K

1

R64
75_0402_5%

R72

43_0402_1%

RC4651_0402_5%

RC4751_0402_5%

RC4851_0402_5% @

RC4951_0402_5%

RC5751_0402_5%

RC5551_0402_5%

JFAN

1
2
3

4
5

R3 10K_0402_5%

1

C865

@

0.01U_0402_25V7K

2

12

+1.05VS_VCCP

1
2
3

GND
GND

ACES_85205-03001

CONN@

12

FAN_SPEED <41>

@

R73
0_0402_5%

+3VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(2/6) PM,XDP,CLK

PROCESSOR(2/6) PM,XDP,CLK

PROCESSOR(2/6) PM,XDP,CLK

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

1

6 59Wednesday, November 23, 2011

6 59Wednesday, November 23, 2011

6 59Wednesday, November 23, 2011

0.1

0.1

0.1

5

4

3

2

1

JCPU1C

DDR_A_D[0..63]<11>

D D

C C

B B

DDR_A_BS0<11>
DDR_A_BS1<11>
DDR_A_BS2<11>

DDR_A_CAS#<11>
DDR_A_RAS#<11>
DDR_A_WE#<11>

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

C5

SA_DQ[0]

D5

SA_DQ[1]

D3

SA_DQ[2]

D2

SA_DQ[3]

D6

SA_DQ[4]

C6

SA_DQ[5]

C2

SA_DQ[6]

C3

SA_DQ[7]

F10

SA_DQ[8]

F8

SA_DQ[9]

G10

SA_DQ[10]

G9

SA_DQ[11]

F9

SA_DQ[12]

F7

SA_DQ[13]

G8

SA_DQ[14]

G7

SA_DQ[15]

K4

SA_DQ[16]

K5

SA_DQ[17]

K1

SA_DQ[18]

J1

SA_DQ[19]

J5

SA_DQ[20]

J4

SA_DQ[21]

J2

SA_DQ[22]

K2

SA_DQ[23]

M8

SA_DQ[24]

N10

SA_DQ[25]

N8

SA_DQ[26]

N7

SA_DQ[27]

M10

SA_DQ[28]

M9

SA_DQ[29]

N9

SA_DQ[30]

M7

SA_DQ[31]

AG6

SA_DQ[32]

AG5

SA_DQ[33]

AK6

SA_DQ[34]

AK5

SA_DQ[35]

AH5

SA_DQ[36]

AH6

SA_DQ[37]

AJ5

SA_DQ[38]

AJ6

SA_DQ[39]

AJ8

SA_DQ[40]

AK8

SA_DQ[41]

AJ9

SA_DQ[42]

AK9

SA_DQ[43]

AH8

SA_DQ[44]

AH9

SA_DQ[45]

AL9

SA_DQ[46]

AL8

SA_DQ[47]

AP11

SA_DQ[48]

AN11

SA_DQ[49]

AL12

SA_DQ[50]

AM12

SA_DQ[51]

AM11

SA_DQ[52]

AL11

SA_DQ[53]

AP12

SA_DQ[54]

AN12

SA_DQ[55]

AJ14

SA_DQ[56]

AH14

SA_DQ[57]

AL15

SA_DQ[58]

AK15

SA_DQ[59]

AL14

SA_DQ[60]

AK14

SA_DQ[61]

AJ15

SA_DQ[62]

AH15

SA_DQ[63]

AE10

SA_BS[0]

AF10

SA_BS[1]

V6

SA_BS[2]

AE8

SA_CAS#

AD9

SA_RAS#

AF9

SA_WE#

TYCO_2013620-2_IVY BRIDGE

CONN@

DDR SYSTEM MEMORY A

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]

RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]

SA_CS#[0]

SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]

SA_ODT[0]
SA_ODT[1]

RSVD_TP[9]

RSVD_TP[10]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AB6
AA6
V9

AA5
AB5
V10

AB4
AA4
W9

AB3
AA3
W10

AK3
AL3
AG1
AH1

AH3
AG3
AG2
AH2

C4
G6
J3
M6
AL6
AM8
AR12
AM15

D4
F6
K3
N6
AL5
AM9
AR11
AM14

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

DDRA_CLK0 <11>
DDRA_CLK0# <11>
DDRA_CKE0 <11>

DDRA_CLK1 <11>
DDRA_CLK1# <11>
DDRA_CKE1 <11>

DDRA_SCS0# <11>
DDRA_SCS1# <11>

DDRA_ODT0 <11>
DDRA_ODT1 <11>

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

DDR_A_MA[0..15] <11>

DDR_B_D[0..63]<12>

DDR_B_BS0<12>
DDR_B_BS1<12>
DDR_B_BS2<12>

DDR_B_CAS#<12>
DDR_B_RAS#<12>
DDR_B_WE#<12>

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

JCPU1D

C9

SB_DQ[0]

A7

SB_DQ[1]

D10

SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10]

G1

SB_DQ[11]

G5

SB_DQ[12]

F5

SB_DQ[13]

F2

SB_DQ[14]

G2

SB_DQ[15]

J7

SB_DQ[16]

J8

SB_DQ[17]

K10

SB_DQ[18]

K9

SB_DQ[19]

J9

SB_DQ[20]

J10

SB_DQ[21]

K8

SB_DQ[22]

K7

SB_DQ[23]

M5

SB_DQ[24]

N4

SB_DQ[25]

N2

SB_DQ[26]

N1

SB_DQ[27]

M4

SB_DQ[28]

N5

SB_DQ[29]

M2

SB_DQ[30]

M1

SB_DQ[31]

AM5

SB_DQ[32]

AM6

SB_DQ[33]

AR3

SB_DQ[34]

AP3

SB_DQ[35]

AN3

SB_DQ[36]

AN2

SB_DQ[37]

AN1

SB_DQ[38]

AP2

SB_DQ[39]

AP5

SB_DQ[40]

AN9

SB_DQ[41]

AT5

SB_DQ[42]

AT6

SB_DQ[43]

AP6

SB_DQ[44]

AN8

SB_DQ[45]

AR6

SB_DQ[46]

AR5

SB_DQ[47]

AR9

SB_DQ[48]

AJ11

SB_DQ[49]

AT8

SB_DQ[50]

AT9

SB_DQ[51]

AH11

SB_DQ[52]

AR8

SB_DQ[53]

AJ12

SB_DQ[54]

AH12

SB_DQ[55]

AT11

SB_DQ[56]

AN14

SB_DQ[57]

AR14

SB_DQ[58]

AT14

SB_DQ[59]

AT12

SB_DQ[60]

AN15

SB_DQ[61]

AR15

SB_DQ[62]

AT15

SB_DQ[63]

AA9

SB_BS[0]

AA7

SB_BS[1]

R6

SB_BS[2]

AA10

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE#

TYCO_2013620-2_IVY BRIDGE

CONN@

AE2

SB_CLK[0]

AD2

SB_CLK#[0]

R9

SB_CKE[0]

AE1

SB_CLK[1]

AD1

SB_CLK#[1]

R10

SB_CKE[1]

AB2

RSVD_TP[11]

AA2

RSVD_TP[12]

T9

RSVD_TP[13]

AA1

RSVD_TP[14]

AB1

RSVD_TP[15]

T10

RSVD_TP[16]

AD3

SB_CS#[0]

AE3

SB_CS#[1]

AD6

RSVD_TP[17]

AE6

RSVD_TP[18]

AE4

SB_ODT[0]

AD4

SB_ODT[1]

AD5

RSVD_TP[19]

AE5

RSVD_TP[20]

D7
F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

DDR SYSTEM MEMORY B

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

DDRB_CLK0 <12>
DDRB_CLK0# <12>
DDRB_CKE0 <12>

DDRB_CLK1 <12>
DDRB_CLK1# <12>
DDRB_CKE1 <12>

DDRB_SCS0# <12>
DDRB_SCS1# <12>

DDRB_ODT0 <12>
DDRB_ODT1 <12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

DDR_B_MA[0..15] <12>

+1.5V

@

R124 0_0402_5%

QC3

BSS138_SOT23

D

S

13

H_DRAMRST#<6>

A A

R119

4.99K_0402_1%

5

G

2

C86

0.047U_0402_16V4Z

DDR3_DRAMRST#_RH_DRAMRST#

DRAMRST_CNTRL

R123
1K_0402_5%

R129 1K_0402_5%

R118 0_0402_5%

4

SM_DRAMRST# <11,12>

DRAMRST_CNTRL_PCH <10,26>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(3/6) DDRIII

PROCESSOR(3/6) DDRIII

PROCESSOR(3/6) DDRIII

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

1

of

of

of

7 59Wednesday, November 23, 2011

7 59Wednesday, November 23, 2011

7 59Wednesday, November 23, 2011

0.1

0.1

0.1

5

4

3

2

1

CFG Straps for Processor

D D

JCPU1E

CFG[1:0]: reserved configuration lane.

CFG[3]: reserved

CFG[17:7]: reserved configuration lanes.

CFG[17:0]:
Processor internal pull up 5~15Kohm to VCCIO

C C

B B

T266 PAD
T251 PAD
T252 PAD
T253 PAD
T254 PAD
T255 PAD
T256 PAD
T257 PAD
T258 PAD
T259 PAD
T260 PAD
T261 PAD
T267 PAD
T268 PAD
T269 PAD
T270 PAD
T262 PAD
T263 PAD

T245 PAD
T246 PAD
T247 PAD
T248 PAD

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

TYCO_2013620-2_IVY BRIDGE

CONN@

CFG

RESERVED

VCC_DIE_SENSE
VSS_DIE_SENSE

RSVD_NCTF10

RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13

RSVD28
RSVD29
RSVD30
RSVD31

RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
RSVD_NCTF5

RSVD_NCTF6
RSVD_NCTF7
RSVD_NCTF8
RSVD_NCTF9

RSVD51
RSVD52

BCLK_ITP

BCLK_ITP#

KEY

AH27
AH26

L7
AG7
AE7
AK2

W8

AT26
AM33
AJ27

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AN35
AM35

AT2
AT1
AR1

B1

CLK_RES_ITP <26>
CLK_RES_ITP# <26>

CFG[6:5]

CFG2

RC51
1K_0402_1%

PEG Static Lane Reversal - CFG2 is for the 16x

1:(Default) Normal Operation; Lane #

CFG2

definition matches socket pin map definition
0:Lane Reversed

CFG4

RC52

@

1K_0402_1%

Display Port Presence Strap

1 : Disabled; No Physical Display Port

CFG4

attached to Embedded Display Port

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

CFG6

CFG5

RC53

@

RC54

@

1K_0402_1%

1K_0402_1%

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled

01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

CFG7

RC56

@

1K_0402_1%

PEG DEFER TRAINING

1: (Default) PEG Train immediately

CFG7

following RESETB de assertion

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

0: PEG Wait for BIOS for training

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(4/6) RSVD,CFG

PROCESSOR(4/6) RSVD,CFG

PROCESSOR(4/6) RSVD,CFG

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

8 59Wednesday, November 23, 2011

8 59Wednesday, November 23, 2011

8 59Wednesday, November 23, 2011

1

0.1

0.1

0.1

of

of

of

5

4

3

2

1

JCPU1H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

D D

C C

B B

A A

VSS6

AT19

VSS7

AT16

VSS8

AT13

VSS9

AT10

VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13

AR25

VSS14

AR22

VSS15

AR19

VSS16

AR16

VSS17

AR13

VSS18

AR10

VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22

AP34

VSS23

AP31

VSS24

AP28

VSS25

AP25

VSS26

AP22

VSS27

AP19

VSS28

AP16

VSS29

AP13

VSS30

AP10

VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34

AN30

VSS35

AN27

VSS36

AN25

VSS37

AN22

VSS38

AN19

VSS39

AN16

VSS40

AN13

VSS41

AN10

VSS42

AN7

VSS43

AN4

VSS44

AM29

VSS45

AM25

VSS46

AM22

VSS47

AM19

VSS48

AM16

VSS49

AM13

VSS50

AM10

VSS51

AM7

VSS52

AM4

VSS53

AM3

VSS54

AM2

VSS55

AM1

VSS56

AL34

VSS57

AL31

VSS58

AL28

VSS59

AL25

VSS60

AL22

VSS61

AL19

VSS62

AL16

VSS63

AL13

VSS64

AL10

VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68

AK33

VSS69

AK30

VSS70

AK27

VSS71

AK25

VSS72

AK22

VSS73

AK19

VSS74

AK16

VSS75

AK13

VSS76

AK10

VSS77

AK7

VSS78

AK4

VSS79

AJ25

VSS80

TYCO_2013620-2_IVY BRIDGE

CONN@

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

+VCC_CORE

97A

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26

AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27

AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27

V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26

P35

P34

P33

P32

P31

P30

P29

P28

P27

P26

JCPU1F

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

TYCO_2013620-2_IVY BRIDGE

CONN@

POWER

PEG AND DDR

CORE SUPPLY

VSS_SENSE_VCCIO

SENSE LINES SVID

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8

VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE
VSS_SENSE

VCCIO_SENSE

8.5A

AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

AJ29
AJ30
AJ28

AJ35
AJ34

B10
A10

+1.05VS_VCCP

VCCSENSE_R
VSSSENSE_R

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

+1.05VS_VCCP

0.1U_0402_16V4Z

CC49

12

RC61

43_0402_1%

+1.05VS_VCCP

RC137

130_0402_1%

H_CPU_SVIDDAT

Place the PU resistors
R53, R54 close to CPU

R51 0_0402_5%
R52 0_0402_5%

R168

1 2

10_0402_1%

12

R158
10_0402_1%

Package Sensing Recommendations--PDDG P30

Sense Trace Impedance Trace Length Match

VCC_SENSE /
VSS_SENSE

VCCAXG_SENSE /
VSSAXG_SENSE

VCCIO_SENSE /
VSS_SENSE_VCCIO

VCCSA

H_CPU_SVIDCLK

RC60
75_0402_5%

+1.05VS_VCCP

VCCIO_SENSE <51>

RC59 0_0402_5%

Place the PU resistors
RC60, RC137 close to CPU.

0.1U_0402_16V4Z

CC50

RC65 0_0402_5%

+VCC_CORE

12

12

R53
100_0402_1%

R54
100_0402_1%

25.5-34.5ohm

55ohm

VR_SVID_ALRT# <54>

VR_SVID_DAT <54>

VCCSENSE <54>
VSSSENSE <54>

<25 mils

VR_SVID_CLK <54>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(5/6) PWR,BYPASS

PROCESSOR(5/6) PWR,BYPASS

PROCESSOR(5/6) PWR,BYPASS

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

9 59Wednesday, November 23, 2011

9 59Wednesday, November 23, 2011

9 59Wednesday, November 23, 2011

1

0.1

0.1

0.1

5

4

3

2

1

+1.5V_CPU_VDDQ

+1.5V +1.5V_CPU_VDDQ

Q7

+VSB+3VALW

12

SM_VREF

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

VCCIO_SEL

R135
100K_0402_5%

3

Q208B

5

2N7002DW-T/R7_SOT363-6

4

AK35
AK34

AL1

B4
D1

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

M27
M26
L26
J26
J25
J24
H26
H25

H23

C22
C24

A19

RUN_ON_CPU1.5VS3

VCC_AXG_SENSE

VSS_AXG_SENSE

VCC_AXG_SENSE
VSS_AXG_SENSE

+V_SM_VREF_CNT

VREFDQ_DIMMA_CPU
VREFDQ_DIMMB_CPU

+1.5V_CPU_VDDQ

6A

12

D D

R132

SUSP#<39,41,45,50,51,52,57>

CPU1.5V_S3_GATE<41>

+GFX_CORE

C C

B B

R133

@

0_0402_5%

0_0402_5%

33A

AR24
AR23
AR21
AR20
AR18
AR17

AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17

AH24
AH23
AH21
AH20
AH18
AH17

AT24
AT23
AT21
AT20
AT18
AT17

AP24
AP23
AP21
AP20
AP18
AP17

AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17

+1.8VS +1.8VS_VCCPLL

RC120

0_0805_5%

A A

10U_0805_6.3V6M

1U_0402_6.3V6K

1

1

CC58

CC59

2

2

1.5A

B6
A6

330U_X_2VM_R6M

1U_0402_6.3V6K

CC60

A2

1

CC61

+

2

R134
100K_0402_5%

61

Q208A

2

2N7002DW-T/R7_SOT363-6

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54

VCCPLL1
VCCPLL2
VCCPLL3

POWER

GRAPHICS

1.8V RAIL

JCPU1G

TYCO_2013620-2_IVY BRIDGE

CONN@

RUN_ON_CPU1.5VS3#

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SA_DIMM_VREFDQ
SB_DIMM_VREFDQ

VREFMISC

DDR3 -1.5V RAILS

SA RAIL

VCCSA_SENSE

VCCSA_VID[0]
VCCSA_VID[1]

8
7
6
5

Close to CPU

1 2

R89 10_0402_5%

1 2

R86 10_0402_5%

CC178

10A

10U_0805_6.3V6M

CC51

10U_0805_6.3V6M

H_VCCSA_VID0 <53>
H_VCCSA_VID1 <53>

RC113

@

0_0402_5%

AO4728L_SO8

1
2
3

4

12

C196

R136

0.1U_0603_50V7K

330K_0402_1%

+GFX_CORE

VCC_AXG_SENSE <54>
VSS_AXG_SENSE <54>

RC76 0_0402_5%

2

1

2

0.1U_0402_16V4Z

10U_0805_6.3V6M

10U_0805_6.3V6M

CC53

CC52

3

@

QC5

1

AP2302GN-HF_SOT23-3

RUN_ON_CPU1.5VS3

10U_0805_6.3V6M

10U_0805_6.3V6M

CC54

CC55

12

@

@

C107

CC38

10U_0805_10V4Z

+V_SM_VREF should
have 20 mil trace width

+V_SM_VREF

10U_0805_6.3V6M

1

CC56

+

CC57
330U_X_2VM_R6M

2

0.1U_0402_10V6K

+1.5V_CPU_VDDQ

check Confirm QC6, QC7 is low Rdson or not--Joyce 0929

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0603_6.3V6M

1

@

+

CC41

CC40

RC111

@

0_0402_5%

CC44

CC42

CC43

330U_X_2VM_R6M

2

+VCCSA_SENSE <53>

VCCSA_VID Configuration --CPU EDS Page99.

+VCCSA

VCCSA_VID[0] output default logic state is low for Sandy Bridge processors

+3VS

RC112

10K_0402_5%

@

1 2

+1.5V_CPU_VDDQ

R131
220_0402_5%

13

D

2

RUN_ON_CPU1.5VS3#

G

Q8

S

2N7002E-T1-GE3_SOT23-3

+1.5V_CPU_VDDQ +1.5V

C199 0.1U_0402_10V7K

C201 0.1U_0402_10V7K

CC47 0.1U_0402_10V7K

CC48 0.1U_0402_10V7K

Intel future processor compatibility design. --DG1.5 P113

RC118
1K_0402_1%

RC119
1K_0402_1%

VREFDQ_DIMMA_CPU

VREFDQ_DIMMB_CPU

@

RC121
1K_0402_1%

RC122
1K_0402_1%@

VCCSA: 0.675V (Min) ~ 0.9V (Max)

SA: System Agent
(Memory controller, DMI, PCIE controllers, and display engine)

R92

+VCCSA_SENSE

@

1 2

100_0402_1%

+VCCSA

RC77 0_0402_5%

@

2

QC6

1

AP2302GN-HF_SOT23-3

DRAMRST_CNT

RC78 0_0402_5%

@

2

QC7

1

AP2302GN-HF_SOT23-3

DRAMRST_CNT

RUN_ON_CPU1.5VS3# <6,45>

+1.5V_CPU_VDDQ

J3

2

JUMP_43X118@
J2

2

JUMP_43X118@

+V_DDR_REFA

RC79

3

0_0402_5%

R120

0_0402_5%

+V_DDR_REFB +VREF_CB

RC80

3

0_0402_5%

+1.5VS

112

+1.5V

112

+VREF_CA

RC83

@

0_0402_5%

DRAMRST_CNTRL_PCH <7,26>

RC84

@

0_0402_5%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(6/6) PWR,VSS

PROCESSOR(6/6) PWR,VSS

PROCESSOR(6/6) PWR,VSS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

10 59Wednesday, November 23, 2011

10 59Wednesday, November 23, 2011

10 59Wednesday, November 23, 2011

1

0.1

0.1

0.1

D

C

B

A

+

V_DDR_REF

5

1

1.5V

+

55

R

K_0402_1%

2

1

1

1

%

A

R57

2

1K_0402_1

>

>

7>

>

>

7>

7>

1

1

0V6K

_10V6K

33

2

C1

D

DRA_CKE0<7

DR_A_BS2<7

D

DDRA_CLK0<7>

DRA_CLK0#<

D

D

DR_A_BS0<7

DR_A_WE#<7

D

D

DR_A_CAS#<

DRA_SCS1#<

D

+

_6.3V4Z

34

2

2

C1

CD1

0.1U_0402

.1U_0402_1

2.2U_0603

0

1

3VS

_6.3V4Z

1

_10V6K

60

2

C1

61

2

C1

2.2U_0603

0.1U_0402

5

DDR_

A_D0

DDR_A_D1

A_DM0

DDR_

D

DR_A_D2

DR_A_D3

D

DR_A_D8

D

DDR_A_D9

DR_A_DQS#

D

DDR_A_DQS1

DR_A_D1

D

D

DR_A_D11

DR_A_D16

D

D

DR_A_D17

DR_A_DQS#

D

A_DQS2

DDR_

D

DR_A_D18

A_D19

DDR_

DR_A_D24

D

D

DR_A_D25

DR_A_DM3

D

DR_A_D26

D

D

DR_A_D27

_CKE0

DDRA

D

DR_A_BS2

D

DR_A_MA12

D

DR_A_MA9

D

DR_A_MA8

DDR_A_MA5

A_MA3

DDR_

DR_A_MA1

D

DRA_CLK0

D

D

DRA_CLK0#

D

DR_A_MA10

DDR_A_BS0

DDR_

A_WE#

D

DR_A_CAS#

DR_A_MA13

D

_SCS1#

DDRA

D

DR_A_D32

DDR_

A_D33

DR_A_DQS#

D

D

DR_A_DQS4

D

DR_A_D34

DR_A_D35

D

DR_A_D40

D

D

DR_A_D41

DDR_A_DM5

DDR_A_D42

DR_A_D43

D

DR_A_D48

D

DR_A_D49

D

DR_A_DQS#

D

DR_A_DQS6

D

DR_A_D50

D

DDR_

A_D51

DR_A_D56

D

DDR_

A_D57

DR_A_DM7

D

DDR_

A_D58

DDR_

A_D59

1

5%

7
R6

2

10K_0402_

1

0

2

4

6

1

5%

8
R6

2

10K_0402_

1.5V

+

3A@1.5V

3A@1.5V

3A@1.5V3A@1.5V

D

DR3 SO-DIM

11

13

15

17
19

21

23

25

27

29

31
33

35

37

39

41

43
45

47

49

51

53

55
57

59

61

63

65

67

69
71

73
75

77

7

81

83

85

87

89

91

93

95
97

99

101

103

105

107
109

111

113

115

117

119

121
123

125

127

129

131

133
135

137

139

141

143

145

147
149

151

153

155

157

159
161

163

165

167

169

171

173
175

177

179

181

183

185
187

189

191

193

195

197

199
201

203

205

4

1.5V

+

J

DDRL

1

REF_DQ

V

3

SS2

V

5

Q0

D

7

D

Q1

9

V

SS4

D

M0

SS5

V

Q2

D

Q3

D
V

SS7

D

Q8

D

Q9

VSS9

QS#1

D

QS1

D

SS11

V
D

Q10

D

Q11

VSS13

Q16

D

Q17

D

SS15

V
D

QS#2

D

QS2

V

SS18

Q18

D

Q19

D

SS20

V
D

Q24

D

Q25

V

SS22

DM3

SS23

V

Q26

D

Q27

D
V

SS25

KE0

C
V

DD1

N

C1

9

B

A

DD3

V

A

12/BC#

A9

DD5

V

8

A

5

A

DD7

V

3

A
A

1

V

DD9

CK0

K0#

C

DD11

V

10/AP

A
B

A0

V

DD13

W

AS#

C

DD15

V

13

A

1#

S
V

DD17

N

CTEST

VSS27

Q32

D

Q33

D

SS29

V
D

QS#4

D

QS4

V

SS32

Q34

D

Q35

D

SS34

V

Q40

D
D

Q41

V

SS36

DM5

SS37

V

Q42

D

Q43

D
V

SS39

D

Q48

D

Q49

SS41

V

QS#6

D

QS6

D

SS44

V
D

Q50

D

Q51

VSS46

Q56

D

Q57

D

SS48

V
D

V

SS49

D

D

SS51

V

A0

S

DDSPD

V
S

A1

V

TT1

G1

CONN@

2

E#

M7

Q58

Q59

LCN_DA

V

SS1

D

Q4

DQ5

SS3

V

QS#0

D

QS0

D
V

SS6

D

Q6

DQ7

SS8

V

Q12

D

Q13

D

V

SS10

D

M1

R

ESET#

SS12

V

Q14

D

Q15

D

V

SS14

D

Q20

D

Q21

VSS16

M2

D

SS17

V

Q22

D
D

Q23

V

SS19

DQ28

Q29

D

SS21

V

QS#3

D

D

QS3

V

SS24

D

Q30

Q31

D

SS26

V

CKE1

DD2

V

15

A

14

A

V

DD4

11

A

A

V

DD6

A

A

VDD8

A

A

DD10

V

C

K1

C

K1#

V

DD12

BA1

AS#

R

DD14

V

0#

S

O

DT0

V

DD16

ODT1

C2

N

DD18

V

REF_CA

V

V

SS28

D

Q36

D

Q37

VSS30

M4

D

SS31

V

Q38

D
D

Q39

V

SS33

DQ44

Q45

D

SS35

V

QS#5

D

D

QS5

V

SS38

D

Q46

DQ47

SS40

V

Q52

D

Q53

D

V

SS42

D

M6

VSS43

Q54

D

Q55

D

SS45

V

D

Q60

D

Q61

V

SS47

DQS#7

QS7

D

SS50

V

Q62

D
D

Q63

V

SS52

E

VENT#

DA

S

S

TT2

V

G

N06-K4526-0101

4

M A

7

6

4

2

0

CL

2

2

4

6

A_D4

DDR_

8

DDR_A_D5

10

12
14

16

18

20

22

24
26

28

30

32

34

36
38

40

42

44

46

48

0

5
52

54

56

58

60

62
64

66

68

70

72

74

76

78

80
82

84
86

88

90

92

94

96

98

100

102

104

106

108

110

112

114
116

118

120

122

124

126
128

130

132

134

136

138

140
142

144

146

148

150

152
154

156

158

160

162

164

166
168

170

172

174

176

178
180

182

184

186

188

190

192
194

196

198

200

202

204

206

DR_A_DQS#

D

A_DQS0

DDR_

DDR_

A_D6

D

DR_A_D7

A_D12

DDR_

DR_A_D13

D

DDR_

A_DM1

S

M_DRAMRST#

DR_A_D14

D

D

DR_A_D15

D

DR_A_D20

DR_A_D21

D

A_DM2

DDR_

DR_A_D22

D

DDR_A_D23

A_D28

DDR_

D

DR_A_D29

DR_A_DQS#

D

A_DQS3

DDR_

DDR_

A_D30

DDR_

A_D31

DRA_CKE1

D

A_MA15

DDR_

DR_A_MA14

D

D

DR_A_MA11

DDR_

A_MA7

DR_A_MA6

D

D

DR_A_MA4

DR_A_MA2

D

A_MA0

DDR_

DRA_CLK1

D

DDRA_CLK1#

DDR_

A_BS1

A_RAS#

DDR_

DRA_SCS0#

D

DRA_ODT0

D

D

DRA_ODT1

DR_A_D36

D

DR_A_D37

D

A_DM4

DDR_

DR_A_D38

D

A_D39

DDR_

A_D44

DDR_

DR_A_D45

D

DDR_

A_DQS#5

DR_A_DQS5

D

DDR_A_D46

DR_A_D47

D

D

DR_A_D52

D

DR_A_D53

D

DR_A_DM6

D

DR_A_D54

D

DR_A_D55

D

DR_A_D60

D

DR_A_D61

D

DR_A_DQS#

A_DQS7

DDR_

DR_A_D62

D

DR_A_D63

D

P

M_SMBDATA

PM_SMBCLK

0

3

7

+

0.65A@0.75V

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

0.75VS

SM_DRAMRST

D

DRA_CKE1 <

D

DRA_CLK1 <
DRA_CLK1#

D

DR_A_BS1 <

D

D

DR_A_RAS#

DRA_SCS0# <7>

D

DRA_ODT0 <

D

D

DRA_ODT1 <

P

M_SMBDATA
M_SMBCLK <

P

3

DR_A_D[0..63]<7>

D

0..7]< 7>

DR_A_DQS[

D

D

DR_A_DQS#[0..7]<7>

D

..15]<7>

DR_A_MA[0

# <7,12>

V_DDR_REF

A

+

R

C81 0_0402

VREF_CA

+

R

C82 0_0402_5%

7>

7>
<7>

+

1.5V

1

R

7>

<7>

7>

7>

1

_10V6K

38

2

C1

39

0.1U_0402

C1

<12,26,36,39>
12,26,36,39>

lassification

ecurity C

S

S

lassification

ecurity C

lassification

ecurity C

S

I

ssued Dat

ssued Dat

I

ssued Dat

I

T

HIS SHEET O

F ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

HIS SHEET O

F ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

T

F ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

HIS SHEET O

T

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

56

1%

1K_0402_

2

+

VREF_CA

1

1

_6.3V4Z

60

R
1K_0402_

2

2.2U_0603

e

e

e

3

1%

2

+

1.05VSP_P

011/09/23 2012/12/31

2

2011/09/23 2

2

011/09/23 2

+

V_DDR_REF

_5%

@

+

VREF_CB

@

.75VR_EN#

0

2>

.75VR_EN<5

0

WRGOOD<51,53>

SUSP<6,40,43,45>

ompal Sec

C

C

ompal Sec

ompal Sec

C

100K_0

2N700

2DW-T/R7_SOT363-6

ret Data

ret Data

ret Data

D

eciphered

eciphered

D

eciphered

D

2

L

ayout Not

e:

10U_0603_

Place near JDDRL

C1

10U_0603_

1.5V

+

B

+3VALW

5

0

.75VR_EN

5535

R

402_5%

6

Q

5520A

2

USP

S

1

012/12/31

012/12/31

Date

Date

Date

2

1

43

1

6.3V6M

+

2

D2 LESR9M

40

2

C1

330U 2V Y

R

6

553

100K_

402_5%

0

3

Q

5520B

2DW-T/R7_SOT363-6

2N700

4

r

efer to QAL51, need confirm. --Joyce 0929/2011

10U_0603_

C1

C1

1

44

1

45

6.3V6M

6.3V6M

2

2

L

ayout Not

Command and Control signals of JDDRL

+

1.5V

Layout Note:
Place near JDD RL.203,204

0.75VS

+

C

Compal Electronics, Inc.

C

Title

T

itle

Title

cument Number Rev

Size Do

cument Number Rev

Size Do

Size Docum ent Number Rev

ustom

C

Custom

C

ustom

Date: Sheet

Date: Sheet

Date: Sheet

Wednesday, November 23, 2011

1

10U_0603_

10U_0603_

C1

1

46

6.3V6M

2

10U_0603_

C1

C1

1

47

1

48

47P_0402

C1

6.3V6M

2

CD1

53

6.3V6M

5

1

2

_50V8J

@

2

e: Place these 4 Caps near

0.1U_0402

1

C1

1

51

2

_10V6K

2

1U_0402_6.3V6K

C362

C3
60

1

1

2

2

ctronics, Inc.

11 60

11 60

11 60

1

0.1U_0402
C1
52

_10V6K

1U_0402_6

.3V6K

0.1U_0402

0.1U_0402

C1

C1

1

49

1

50

_10V6K

_10V6K

2

2

C3

1U_0402_6.3V6K

1U_0402_6

61

1

1

.3V6K

2

2

ompal Electronics, Inc.

ompal Ele

QAQ10 LA-8581P M/B

D

10U_0603_6

1

.3V6M

2

C

C3
59

C3

22U_0805_

69

1

6.3V6M

2

B

A

0.1

f

o

f

o

o

f

1

10U_0603_

C1

1

75

6.3V6M

2

0.1U_0402

C1

C1

79

1

80

_10V6K

2

1U_0603_1

C1

C183

1

84

0V4Z

2

ctronics, Inc.

ctronics, Inc.

1

10U_0603_

C1

CD4

1

76

8

6.3V6M

@

2

22U_0805_

C3
70

1

6.3V6M

2

2 60

1

2 60

1

1

2 60

10U_0603_

C174

1

6.3V6M

2

0.1U_0402

1

_10V6K

2

1U_0603_1

1U_0603_1

C1

1

82

1

0V4Z

0V4Z

2

2

ompal Electronics, Inc.

ompal Ele

ompal Ele

QAQ10 LA-8581P M/B

10U_0603_6

10U_0603_6

CD4

1

1

9

.3V6M

.3V6M

@

2

2

D

C

B

A

Rev

0.1

o

f

f

o

f

o

Date

Date

Date

2

2

012/12/31

012/12/31

+

1.5V

10U_0603_

1

C1

C1

+

1

71

D2 LESR9M

41
C1

330U 2V Y

72

6.3V6M

2

2

Layout Note: Place these 4 Caps near
Command and Control signals of JDDRH

Layout Note:
Place near JDDRH.203 and 204

L

ayout Note:

10U_0603_

Place near JDDRH

C1

10U_0603_

1

73

6.3V6M

1

2

6.3V6M

2

1.5V

+

0.1U_0402
C1

0.1U_0402

1

77

C178

1

_10V6K

2

_10V6K

2

+

0.75VS

1U_0603_1

C1

1

81

0V4Z

2

C

C

C

itle

T

T

e

itl

Tit

le

cument Number

Size Do

SizeD

cument Number

o

Size Docume nt Number

Date: Sheet

Date: Sheet

Date: Sheet

Wednesday, November 23, 2011

3

D

DR_B_D[0.

.63]<7>

0..7]<7>

DR_B_DQS[

D

DR_B_DQS#

[0..7]<7>

D

DR_B_MA[0

..15]<7>

D

+

1.5V

1

R

D12

_1%

1K_0402

2

VREF_CB

+

1

D13

R
1K_0402

_1%

2

ecurity C

lassification

S

Security C

lassification

S

lassification

ecurity C

I

ssued Dat

e

I

e

ssued Dat

ssued Dat

e

I

T

HIS SHEET O

F ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

T

F ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

HIS SHEET O

F ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

HIS SHEET O

T

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV ISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

011/09/23 2012/12/31

2

011/09/23 2

2

2

011/09/23 2

3

ompal Sec

ret Data

C

Compal Secret Data

C

ret Data

ompal Sec

D

eciphered

D

eciphered

eciphered

D

V_DDR_REFB

+

1

10V6K

7

2

CD2

0.1U_0402_

C1
85

5

1.5V

+

3A@1.5V

3A@1.5V

3A@1.5V3A@1.5V

J

DDRH

1

REF_DQ

1

6.3V4Z

8

DR_B_D0

D

2

DR_B_D1

D

CD2

DR_B_DM0

D

2.2U_0603_

D

DR_B_D2

DR_B_D3

D

DR_B_D8

D

DR_B_D9

D

DR_B_DQS#

D

DR_B_DQS1

D

D

DR_B_D10

DR_B_D11

D

D

DR_B_D16

DR_B_D17

D

DR_B_DQS#

D

D

DR_B_DQS2

DR_B_D18

D

DR_B_D19

D

D

DR_B_D24

DDR_B_D25

DDR_B_DM3

DR_B_D26

D

DDR_B_D27

DDRB_CKE0

DR_B_BS2

D

DR_B_MA12

D

DDR_B_MA9

D

DR_B_MA8

D

DR_B_MA5

D

DR_B_MA3

DR_B_MA1

D

DRB_CLK0

D
D

DRB_CLK0#

DR_B_MA10

D

DR_B_BS0

D

D

DR_B_WE#

DR_B_CAS#

D

D

DR_B_MA13

DRB_SCS1#

D

DDR_B_D32

DR_B_D33

D

D

DR_B_DQS#

DR_B_DQS4

D

DR_B_D34

D

DR_B_D35

D

DR_B_D40

D

D

DR_B_D41

DR_B_DM5

D

D

DR_B_D42

D

DR_B_D43

D

DR_B_D48

D

DR_B_D49

D

DR_B_DQS#6

D

DR_B_DQS6

D

DR_B_D50

DR_B_D51

D

D

DR_B_D56

D

DR_B_D57

DDR_B_DM7

D

DR_B_D58

D

DR_B_D59

2

1

76

R

0.1U_0402

2.2U_0603

10K_0402

_5%

1

1

_6.3V4Z

2

1

C1

77 10K_040

R

_10V6K

86

2

5

V

3

SS2

V

5

D

Q0

7

D

Q1

9

D

VSS4

11

M0

D

13

SS5

V

15

Q2

D

17

D

Q3

19

V

SS7

21

D

Q8

23

Q9

D

25

SS9

V

27

QS#1

D

29

1

31

33

35

37

39

41
43

45

47

2

49

51

53
55

57

59

61

63

65
67

69

71

73

75

77

79

81

83

85

87

8

91
93

95

97

99

101

103
105

107

109

111

113

115

117
119

121

123

125

127

129
131

133

135

137

4

139

141

143
145

147

149

151

153

155
157

159

161

163

165

167

169
171

173

175

177

179

181
183

185

187

189

191

193

195
197

199

201

203

2

205

2_5%

R

D

QS1

V

SS11

D

Q10

DQ11

SS13

V

Q16

D

Q17

D
V

SS15

D

QS#2

DQS2

SS18

V

Q18

D

Q19

D
V

SS20

D

Q24

D

Q25

D

SS22

V

M3

D

SS23

V
D

Q26

D

Q27

V

SS25

C

KE0

V

DD1

NC1

A2

B

DD3

V

A12/BC#

9

A

DD5

V

9

8

A

5

A
V

DD7

A

3

A

1

DD9

V

K0

C

K0#

C
V

DD11

A

10/AP

B

A0

VDD13

E#

W

AS#

C

DD15

V
A

13

S

1#

VDD17

V

CTEST

REF_CA

N

SS27

V

Q32

D
D

Q33

V

SS29

D

QS#4

DQS4

SS32

V

Q34

D

Q35

D
V

SS34

D

Q40

DQ41

SS36

V

M5

D

SS37

V
D

Q42

D

Q43

V

SS39

DQ48

Q49

D

SS41

V

QS#6

D
D

QS6

V

SS44

DQ50

Q51

D

SS46

V

Q56

D
D

Q57

V

SS48

D

M7

VSS49

Q58

D

Q59

D

SS51

V

E

S

A0

V

DDSPD

SA1

TT1

V

1

G

N06-K4926-0101

LCN_DA

CONN@

1

+

1.5V

R

D10

2

1K_0402_1%

1

%

1

10V6K

1

RD11

2

2

CD5

1K_0402_1

D

0.1U_0402_

C

DRB_CKE0<7>

D

D

DR_B_BS2<7

>

>

DRB_CLK0<7

D
D

DRB_CLK0#<

7>

>

DR_B_BS0<7

D

D

>

DR_B_WE#<7

DR_B_CAS#<

7>

D

DDRB_SCS1#<7>

B

A

+

3VS

V

V
QS#0

D

V

V

D
D

V

SS10

ESET#

SS12

V

D
D

V

SS14

D

D

SS16

V

V

D

D

VSS19

D

D

V

QS#3

D

VSS24

D

D

V

C

V

V

V

V

V

V

R

V

V

V

V

V

V

V

V
D

D

VSS38

V

V

V

V

V

D

V

V

VENT#

4

+1.5V

2

SS1

4

Q4

D

6

D

DR_B_D4

Q5

D

8

SS3

D

DR_B_D5

10

12

QS0

D

0

DR_B_DQS#

14

DR_B_DQS0

D

SS6

16

DQ6

18

Q7

D

DM1

D

SS17

SS21

SS26

DD10

CK1#

DD12

DD14

O

DD16

O

DD18

SS28

DQ36

D

SS30

SS31

D

D

SS33

D

D

SS35
QS#5

D

D

SS40

D

D

SS42

SS43

D

D

SS45

D

DQ61

SS47

QS#7

D

SS50

D

D

SS52

V

DR_B_D6

D

20

D

DR_B_D7

SS8

22

Q12

24

Q13

DR_B_D12

D

26

D

DR_B_D13

28

30

DDR_B_DM1

32

34

Q14

36

Q15

38

40

Q20

42

Q21

44

46

M2

48

50

Q22

52

Q23

54

56

Q28

58

Q29

60
62

64

QS3

66

68

Q30

70

Q31

72

74

KE1

76

DD2

78

A

15

80

A

14

82

DD4

84

A

11

86

A

7

88

DD6

90

6

A

92

A4

94

DD8

96

2

A

98

0

A

100

102

C

K1

104

106

108

A1

B

110

AS#

112

114

S

0#

116

DT0

118

120

DT1

122

C2

N

124
126

128

130

132

Q37

134

136

M4

D

138

140

Q38

142

Q39

144

146

Q44

148

Q45

150
152

154

QS5

156

158

Q46

160

Q47

162
164

Q52

166

Q53

168

170

M6

D

172

174

Q54

176

Q55

178

180

Q60

182

184

186

188

QS7

190

192

Q62

194

Q63

196

198

200

DA

S

202

CL

S

204

TT2

206

G

2

M_DRAMRST

S

D

DR_B_D14

DR_B_D15

D

DR_B_D20

D

D

DR_B_D21

DR_B_DM2

D

DR_B_D22

D

DR_B_D23

D

D

DR_B_D28

DR_B_D29

D

DR_B_DQS#

D

DR_B_DQS3

D

DDR_B_D30

D

DR_B_D31

DRB_CKE1

D

DR_B_MA15

D

DDR_B_MA14

DR_B_MA11

D

DR_B_MA7

D

DR_B_MA6

D

DR_B_MA4

D

DDR_B_MA2

D

DR_B_MA0

D

DRB_CLK1

DRB_CLK1#

D

DR_B_BS1

D

D

DR_B_RAS#

DRB_SCS0#

D

D

DRB_ODT0

DDRB_ODT1

+

VREF_CB

D

DR_B_D36

DR_B_D37

D

DR_B_DM4

D

D

DR_B_D38

D

DR_B_D39

DR_B_D44

D

D

DR_B_D45

D

DR_B_DQS#

DR_B_DQS5

D

DR_B_D46

D

D

DR_B_D47

DR_B_D52

D

DR_B_D53

D

DR_B_DM6

D

DR_B_D54

D

D

DR_B_D55

D

DR_B_D60

DR_B_D61

D

D

DR_B_DQS#

D

DR_B_DQS7

DR_B_D62

D

DR_B_D63

D

M_SMBDATA

P

P

M_SMBCLK

4

#

3

5

7

0.65A@0.75V

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

S

DRB_CKE1 <

D

D

DRB_CLK1 <

DRB_CLK1#

D

DDR_B_BS1 <
D

DR_B_RAS# <7>

DRB_SCS0#

D
D

DRB_ODT0 <

DRB_ODT1 <

D

1

C1
67

2

P

M_SMBDATA

M_SMBCLK <

P

0.75VS

+

M_DRAMRST

7>

7>

<7>

7>

<7>
7>

7>

0.1U_0402

_10V6K

C1
68

<11,26,36,39>

11,26,36,39>

# <7,11>

2.2U_0603

1

_6.3V4Z

2

A

PCIE_GTX_C_CRX_P[0..15]<5>

PCIE_GTX_C_CRX_N[0..15]<5>

PCIE_CTX_C_GRX_P[0..15]<5>

PCIE_CTX_C_GRX_N[0..15]<5>

1 1

PCIE:80ohm+_10%
45~50ohm+_10%

PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_N12

2 2

PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_N0

+3VS_DGPU

termination

3 3

RV36 default unmount

1 2

RV48 10K_0402_5%

PEG_CLKREQ#<26>

PCIE_GTX_C_CRX_P[0..15]

PCIE_GTX_C_CRX_N[0..15]

PCIE_CTX_C_GRX_P[0..15]

PCIE_CTX_C_GRX_N[0..15]

C16 0.1U_0402_16V7KOPT@
C17 0.1U_0402_16V7KOPT@
C18 0.1U_0402_16V7KOPT@
C19 0.1U_0402_16V7KOPT@
C20 0.1U_0402_16V7KOPT@
C21 0.1U_0402_16V7KOPT@
C22 0.1U_0402_16V7KOPT@
C23 0.1U_0402_16V7KOPT@
C24 0.1U_0402_16V7KOPT@
C25 0.1U_0402_16V7KOPT@
C26 0.1U_0402_16V7KOPT@
C27 0.1U_0402_16V7KOPT@
C28 0.1U_0402_16V7KOPT@
C29 0.1U_0402_16V7KOPT@
C30 0.1U_0402_16V7KOPT@
C31 0.1U_0402_16V7KOPT@
C32 0.1U_0402_16V7KOPT@
C33 0.1U_0402_16V7KOPT@
C34 0.1U_0402_16V7KOPT@
C35 0.1U_0402_16V7KOPT@
C36 0.1U_0402_16V7KOPT@
C37 0.1U_0402_16V7KOPT@
C38 0.1U_0402_16V7KOPT@
C39 0.1U_0402_16V7KOPT@
C40 0.1U_0402_16V7KOPT@
C45 0.1U_0402_16V7KOPT@
C46 0.1U_0402_16V7KOPT@
C48 0.1U_0402_16V7KOPT@
C116 0.1U_0402_16V7KOPT@
C213 0.1U_0402_16V7KOPT@
C226 0.1U_0402_16V7KOPT@
C47 0.1U_0402_16V7KOPT@

OPT@

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

PLTRST_VGA#<28>

CLK_PCIE_VGA<26>

CLK_PCIE_VGA#<26>

RV36 200_0402_1%@

RV37 2.49K_0402_1%OPT@

PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0

PCIE_GTX_CRX_P15
PCIE_GTX_CRX_N15
PCIE_GTX_CRX_P14
PCIE_GTX_CRX_N14
PCIE_GTX_CRX_P13
PCIE_GTX_CRX_N13
PCIE_GTX_CRX_P12
PCIE_GTX_CRX_N12
PCIE_GTX_CRX_P11PCIE_GTX_C_CRX_P11
PCIE_GTX_CRX_N11
PCIE_GTX_CRX_P10
PCIE_GTX_CRX_N10
PCIE_GTX_CRX_P9
PCIE_GTX_CRX_N9
PCIE_GTX_CRX_P8
PCIE_GTX_CRX_N8
PCIE_GTX_CRX_P7
PCIE_GTX_CRX_N7
PCIE_GTX_CRX_P6
PCIE_GTX_CRX_N6
PCIE_GTX_CRX_P5
PCIE_GTX_CRX_N5
PCIE_GTX_CRX_P4
PCIE_GTX_CRX_N4
PCIE_GTX_CRX_P3
PCIE_GTX_CRX_N3
PCIE_GTX_CRX_P2
PCIE_GTX_CRX_N2
PCIE_GTX_CRX_P1
PCIE_GTX_CRX_N1
PCIE_GTX_CRX_P0
PCIE_GTX_CRX_N0

PEX_TSTCLK_OUT+
PEX_TSTCLK_OUT-

PEX_TREMP

PEX_TERMP: used for internal calibration.

VID Default setup is

+3VS_DGPU

for boot voltage 0.9V

12

12

12

@

VID_0
VID_1
VID_2
VID_3
VID_4
VID_5

4 4

1 2

RV165 0_0402_5%OPT@

1 2

RV166 0_0402_5%OPT@

1 2

RV167 0_0402_5%OPT@

1 2

RV168 0_0402_5%OPT@

1 2

RV169 0_0402_5%OPT@

1 2

RV170 0_0402_5%OPT@

RV159 10K_0402_5%

12

RV17110K_0402_5%

OPT@

A

12

12

@

RV160 10K_0402_5%

12

RV17210K_0402_5%

OPT@

12

@

@

OPT@

OPT@

RV162 10K_0402_5%

RV161 10K_0402_5%

RV163 10K_0402_5%

RV164 10K_0402_5%

GPU_VID0 <57>
GPU_VID1 <57>
GPU_VID2 <57>
GPU_VID3 <57>
GPU_VID4 <57>
GPU_VID5 <57>

12

12

12

12

RV17610K_0402_5%

RV17310K_0402_5%

RV17510K_0402_5%

RV17410K_0402_5%

@

@

OPT@

OPT@

B

UV1A

AN12

PEX_RX0

AM12

PEX_RX0_N

AN14

PEX_RX1

AM14

PEX_RX1_N

AP14

PEX_RX2

AP15

PEX_RX2_N

AN15

PEX_RX3

AM15

PEX_RX3_N

AN17

PEX_RX4

AM17

PEX_RX4_N

AP17

PEX_RX5

AP18

PEX_RX5_N

AN18

PEX_RX6

AM18

PEX_RX6_N

AN20

PEX_RX7

AM20

PEX_RX7_N

AP20

PEX_RX8

AP21

PEX_RX8_N

AN21

PEX_RX9

AM21

PEX_RX9_N

AN23

PEX_RX10

AM23

PEX_RX10_N

AP23

PEX_RX11

AP24

PEX_RX11_N

AN24

PEX_RX12

AM24

PEX_RX12_N

AN26

PEX_RX13

AM26

PEX_RX13_N

AP26

PEX_RX14

AP27

PEX_RX14_N

AN27

PEX_RX15

AM27

PEX_RX15_N

AK14

PEX_TX0

AJ14

PEX_TX0_N

AH14

PEX_TX1

AG14

PEX_TX1_N

AK15

PEX_TX2

AJ15

PEX_TX2_N

AL16

PEX_TX3

AK16

PEX_TX3_N

AK17

PEX_TX4

AJ17

PEX_TX4_N

AH17

PEX_TX5

AG17

PEX_TX5_N

AK18

PEX_TX6

AJ18

PEX_TX6_N

AL19

PEX_TX7

AK19

PEX_TX7_N

AK20

PEX_TX8

AJ20

PEX_TX8_N

AH20

PEX_TX9

AG20

PEX_TX9_N

AK21

PEX_TX10

AJ21

PEX_TX10_N

AL22

PEX_TX11

AK22

PEX_TX11_N

AK23

PEX_TX12

AJ23

PEX_TX12_N

AH23

PEX_TX13

AG23

PEX_TX13_N

AK24

PEX_TX14

AJ24

PEX_TX14_N

AL25

PEX_TX15

AK25

PEX_TX15_N

AJ11

PEX_WAKE_N

AL13

PEX_REFCLK

AK13

PEX_REFCLK_N

AK12

PEX_CLKREQ_N

AJ26

PEX_TSTCLK_OUT

AK26

PEX_TSTCLK_OUT_N

AJ12

PEX_RST_N

AP29

PEX_TERMP

N13P-GLP-A1 FCBGA 908P GPU

OPT@

CV46

18P_0402_50V8J

I2CS_SCL

DMN66D0LDW-7_SOT363-6

OPT@

I2CS_SDA

B

Part 1 of 7

PCI EXPRESS

RV55 1M_0402_5%

1

OPT@

+3VS_DGPU

2

OPT@

61

QV6A

+3VS_DGPU

@

5

34

QV6B

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14

GPIO

GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21

DACA_RED

DACA_GREEN

DACA_BLUE

DACA_HSYNC
DACA_VSYNC

DACs

DACA_VDD
DACA_VREF
DACA_RSET

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL

I2C

I2CC_SDA

I2CS_SCL

I2CS_SDA

PLLVDD

SP_PLLVDD

VID_PLLVDD

XTAL_IN

CLK

XTAL_OUT

XTAL_OUTBUFF

XTAL_SSIN

@

GND

2

OPT@

I2CS_SCL

I2CS_SDA

0_0402_5%

3

GND

4

EC_SMB_CK2 <26,41>

EC_SMB_DA2 <26,41>

1

YV1
27MHZ_16PF_7V27000011

RV35 0_0402_5%@

RV40

P6
M3
L6
P5
P7
L7
M7
N8
M1
M2
L1
M5
N3
M4
N4
P2
R8
M6
R1
P3
P4
P1

AK9
AL10
AL9

AM9
AN9

AG10
AP9
AP8

R4
R5

R7
R6

R2
R3

T4
T3

AD8

AE8

AD7

H3
H2

J4
H1

XTALINXTALOUT XTALIN

3

OPT@

C

猁ㄩ

LV10

+PLLVDD

60mA

CV41 under GPU
close to ball : AD8

LV18

猁ㄩ

+GPU_PLLVDD

ACIN_BUF

OPT@

CH751H-40PT_SOD323-2

VGA_PWROK <26,29,45,57>

VGA_HDMI_HPD <24>

VGA_CRT_CLK
VGA_CRT_DATA

I2CB_SCL
I2CB_SDA

VGA_LCD_CLK
VGA_LCD_DATA

I2CS_SCL
I2CS_SDA

30ohm, ESR=0.05

CV41

OPT@

0.1U_0402_16V4Z

180ohm, ESR=0.2

VID_4
VID_3

VID_1
VID_2

VID_0
ACIN_BUF
VID_5

dGPU_HDMI_HPD

RH172

10K_0402_5%

VGA_CRT_CLK
VGA_CRT_DATA

I2CB_SCL
I2CB_SDA

VGA_LCD_CLK
VGA_LCD_DATA

I2CS_SCL
I2CS_SDA

+PLLVDD

XTALIN
XTALOUT

XTAL_OUTBUFF
XTAL_SSIN

RV29 10K_0402_5%OPT@
RV30 10K_0402_5%OPT@

RH168 330K_0402_5%OPT@

@

U13

4

Y

OPT@

12

+PLLVDD

+GPU_PLLVDD

+3VS_DGPU

@

1 2

0.1U_0402_16V4Z

5

2

P

B

1

A

G

3

NC7SZ08P5X_NL_SC70-5

+3VS_DGPU

+3VS_DGPU

CV197

I2CA/B/C: Master
I2CS: Slaver (for Internal Thermal Sensor)

+GPU_PLLVDD

90mA

CV40

CV38,CV40 under
GPU
close to ball :
AE8,AD7

CV47

18P_0402_50V8J

XTAL_OUTBUFF
XTAL_SSIN

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

1 2

RV45 10K_0402_5%OPT@

1 2

RV52 10K_0402_5%OPT@

CV38

OPT@

OPT@

0.1U_0402_16V4Z

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

0.1U_0402_16V4Z

D

UV2

4

Y

2 1

DV6

RV38 2.2K_0402_5%OPT@

RV39 2.2K_0402_5%OPT@

RV41 2.2K_0402_5%OPT@
RV42 2.2K_0402_5%OPT@

RV43 2.2K_0402_5%OPT@
RV44

RV46 2.2K_0402_5%OPT@
RV47

CV42

@

OPT@

4.7U_0402_6.3V6M

CV311

OPT@

4.7U_0402_6.3V6M

D

5

3

CV43

OPT@

+3VS_DGPU

2

P

B

1

A

G

NC7SZ08P5X_NL_SC70-5@

ACIN <27,41,48>

PSI: Phase shedding

+3VS_DGPU

2.2K_0402_5%OPT@

2.2K_0402_5%OPT@

SM010018510--­SM01000FE00-­SM010007W00--

30R@100MHz(ESR=0.5)

LV10

OPT@

1 2

BLM18PG330SN1D_0603

CV42, CV43,
CV44
LV10

22U_0805_6.3V6M

Near GPU

拸

DG

1 2

BLM18PG181SN1D_2P

CV310

22U_0805_6.3V6M

PFH: Pixel-Clock Frequency Hopping Interface.
PFH can be implemented in system software with
NVAPI to reduce interference between graphic
and wireless networking modems.
Refer to SP-04941-001

+1.05VS_DGPU

CV44

OPT@

CV42ㄛCV44

LV18

OPT@

+1.05VS_DGPU

CV311,
CV310,
LV18
Near GPU

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

GPIO I/O USAGE

O

GPIO0

GPIO1

O

O

GPIO2

O

GPIO3

O

GPIO4

GPIO5

O

O

GPIO6

O

GPIO7

GPIO8

I/O

I/O

GPIO9

O

GPIO10

O

GPIO11

GPIO12

I

GPIO13

O

GPIO14

I

GPIO15

I

GPIO16

O

GPIO17

I

GPIO18

I

GPIO19

I

GPIO20

GPIO21

22U_0805_6.3V6M

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

N13P PEG 1/9

N13P PEG 1/9

N13P PEG 1/9

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

E

GPU Core VID4

GPU Core VID3

LCD_BL_PWM

LCD_VCC or PSI

LCD_BLEN

GPU Core VID1

GPU Core VID2

3D Vision

OVERT

ALERT

MEM_VREF_CTL

GPU Core VID0

PWR_LEVEL

GPU Core VID5

HPD_AB

HPD_C

MEM_VDD_CTL or PSI

HPD_D

HPD_E

HPD_F

Reserved

Reserved

13 59Wednesday, November 23, 2011

13 59Wednesday, November 23, 2011

E

13 59Wednesday, November 23, 2011

0.1

0.1

0.1

A

MDA[15..0]

MDA[31..16]

MDA[47..32]

MDA[63..48]

U30

CMDA0

T31

CMDA1

U29

CMDA2

R34

CMDA3

R33

CMDA4

U32

CMDA5

U33

CMDA6

U28

CMDA7

V28

CMDA8

V29

CMDA9

V30

CMDA10

U34

CMDA11

U31

CMDA12

V34

CMDA13

V33

CMDA14

Y32

CMDA15

AA31

CMDA16

AA29

CMDA17

AA28

CMDA18

AC34

CMDA19

AC33

CMDA20

AA32

CMDA21

AA33

CMDA22

Y28

CMDA23

Y29

CMDA24

W31

CMDA25

Y30

CMDA26

AA34

CMDA27

Y31

CMDA28

Y34

CMDA29

Y33

CMDA30

V31

R32
AC32

R28

FBA_DEBUG0

AC28

FBA_DEBUG1

R30
R31
AB31
AC31

K31
L30
H34

FB_CLAMP:

J34

Leave as NC for N13P-PES/-GL/-GLP/-NS1

AG30

and N13M-GE1/NS1;

AG31
AJ34

Pull down with a 10K on N13P-GV, N13M-GS,

AK34

N13E-GE,N13P-GT/-GS/-LP and N14-Q1/-Q3.

J30
J31
J32
J33
AH31
AJ31
AJ32
AJ33

E1

K27

U27

H26

@

66mA

CV49

0.1U_0402_16V4Z

OPT@

CV49 Under GPU
close to ball : U27

CMDA[30..0] <18,19>

RV57, RV58, RV59, RV60 change BS from
"OPT@" to "@".--Design Guide. Joyce 1018

RV57 60.4_0402_1%@

RV59 60.4_0402_1%@

CLKA0 <18>
CLKA0# <18>

CLKA1# <19>

RV152

10K_0402_5%

+FB_PLLAVDD

12
12

+1.5VSDGPU

+FB_PLLAVDD

CV50

OPT@

0.1U_0402_16V4Z

CV50 Under GPU
close to ball : K27

MDC[15..0]<20>

MDC[31..16]<20>

MDC[47..32]<21>

MDC[63..48]<21>

UV1C

MDC0
MDC1
MDC2
MDC3
MDC4
MDC5
MDC6
MDC7
MDC8
MDC9
MDC10
MDC11
MDC12
MDC13
MDC14
MDC15
MDC16
MDC17
MDC18
MDC19
MDC20
MDC21
MDC22
MDC23
MDC24
MDC25
MDC26
MDC27
MDC28
MDC29
MDC30
MDC31
MDC32
MDC33
MDC34
MDC35
MDC36
MDC37
MDC38
MDC39
MDC40
MDC41
MDC42
MDC43
MDC44
MDC45
MDC46
MDC47
MDC48
MDC49
MDC50
MDC51
MDC52
MDC53
MDC54
MDC55
MDC56
MDC57
MDC58
MDC59
MDC60
MDC61
MDC62

DQMC[3..0]<20>

DQMC[7..4]<21>

DQSC[3..0]<20>

DQSC[7..4]<21>

DQSC#[3..0]<20>

DQSC#[7..4]<21>

MDC63

DQMC0
DQMC1
DQMC2
DQMC3
DQMC4
DQMC5
DQMC6
DQMC7

DQSC0
DQSC1
DQSC2
DQSC3
DQSC4
DQSC5
DQSC6
DQSC7

DQSC#0
DQSC#1
DQSC#2
DQSC#3
DQSC#4
DQSC#5
DQSC#6
DQSC#7

G9

FBB_D0

E9

FBB_D1

G8

FBB_D2

F9

FBB_D3

F11

FBB_D4

G11

FBB_D5

F12

FBB_D6

G12

FBB_D7

G6

FBB_D8

F5

FBB_D9

E6

FBB_D10

F6

FBB_D11

F4

FBB_D12

G4

FBB_D13

E2

FBB_D14

F3

FBB_D15

C2

FBB_D16

D4

FBB_D17

D3

FBB_D18

C1

FBB_D19

B3

FBB_D20

C4

FBB_D21

B5

FBB_D22

C5

FBB_D23

A11

FBB_D24

C11

FBB_D25

D11

FBB_D26

B11

FBB_D27

D8

FBB_D28

A8

FBB_D29

C8

FBB_D30

B8

FBB_D31

F24

FBB_D32

G23

FBB_D33

E24

FBB_D34

G24

FBB_D35

D21

FBB_D36

E21

FBB_D37

G21

FBB_D38

F21

FBB_D39

G27

FBB_D40

D27

FBB_D41

G26

FBB_D42

E27

FBB_D43

E29

FBB_D44

F29

FBB_D45

E30

FBB_D46

D30

FBB_D47

A32

FBB_D48

C31

FBB_D49

C32

FBB_D50

B32

FBB_D51

D29

FBB_D52

A29

FBB_D53

C29

FBB_D54

B29

FBB_D55

B21

FBB_D56

C23

FBB_D57

A21

FBB_D58

C21

FBB_D59

B24

FBB_D60

C24

FBB_D61

B26

FBB_D62

C26

FBB_D63

E11

FBB_DQM0

E3

FBB_DQM1

A3

FBB_DQM2

C9

FBB_DQM3

F23

FBB_DQM4

F27

FBB_DQM5

C30

FBB_DQM6

A24

FBB_DQM7

D10

FBB_DQS_WP0

D5

FBB_DQS_WP1

C3

FBB_DQS_WP2

B9

FBB_DQS_WP3

E23

FBB_DQS_WP4

E28

FBB_DQS_WP5

B30

FBB_DQS_WP6

A23

FBB_DQS_WP7

D9

FBB_DQS_RN0

E4

FBB_DQS_RN1

B2

FBB_DQS_RN2

A9

FBB_DQS_RN3

D22

FBB_DQS_RN4

D28

FBB_DQS_RN5

A30

FBB_DQS_RN6

B23

FBB_DQS_RN7

N13P-GLP-A1 FCBGA 908P

OPT@

Part 2 of 7

MEMORY INTERFACE

A

MDA[15..0]<18>

MDA[31..16]<18>

MDA[47..32]<19>

MDA[63..48]<19>

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_CMD_RFU0
FBA_CMD_RFU1

FBA_DEBUG0
FBA_DEBUG1

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_WCK01

FBA_WCK01_N

FBA_WCK23

FBA_WCK23_N

FBA_WCK45

FBA_WCK45_N

FBA_WCK67

FBA_WCK67_N

FBA_WCKB01

FBA_WCKB01_N

FBA_WCKB23

FBA_WCKB23_N

FBA_WCKB45

FBA_WCKB45_N

FBA_WCKB67

FBA_WCKB67_N

FB_CLAMP

FB_DLL_AVDD

FBA_PLL_AVDD

FB_VREF

VRAM Interface

UV1B

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45

1 1

DQMA[3..0]<18>

DQMA[7..4]<19>

DQSA[3..0]<18>

DQSA[7..4]<19>

DQSA#[3..0]<18>

DQSA#[7..4]<19>

MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

DQMA0
DQMA1
DQMA2DQMA2
DQMA3
DQMA4DQMA4
DQMA5
DQMA6
DQMA7

DQSA0
DQSA1
DQSA2
DQSA3
DQSA4
DQSA5
DQSA6
DQSA7

DQSA#0
DQSA#1
DQSA#2
DQSA#3
DQSA#4
DQSA#5
DQSA#6
DQSA#7

L28

FBA_D0

M29

FBA_D1

L29

FBA_D2

M28

FBA_D3

N31

FBA_D4

P29

FBA_D5

R29

FBA_D6

P28

FBA_D7

J28

FBA_D8

H29

FBA_D9

J29

FBA_D10

H28

FBA_D11

G29

FBA_D12

E31

FBA_D13

E32

FBA_D14

F30

FBA_D15

C34

FBA_D16

D32

FBA_D17

B33

FBA_D18

C33

FBA_D19

F33

FBA_D20

F32

FBA_D21

H33

FBA_D22

H32

FBA_D23

P34

FBA_D24

P32

FBA_D25

P31

FBA_D26

P33

FBA_D27

L31

FBA_D28

L34

FBA_D29

L32

FBA_D30

L33

FBA_D31

AG28

FBA_D32

AF29

FBA_D33

AG29

FBA_D34

AF28

FBA_D35

AD30

FBA_D36

AD29

FBA_D37

AC29

FBA_D38

AD28

FBA_D39

AJ29

FBA_D40

AK29

FBA_D41

AJ30

FBA_D42

AK28

FBA_D43

AM29

FBA_D44

AM31

FBA_D45

AN29

FBA_D46

AM30

FBA_D47

AN31

FBA_D48

AN32

FBA_D49

AP30

FBA_D50

AP32

FBA_D51

AM33

FBA_D52

AL31

FBA_D53

AK33

FBA_D54

AK32

FBA_D55

AD34

FBA_D56

AD32

FBA_D57

AC30

FBA_D58

AD33

FBA_D59

AF31

FBA_D60

AG34

FBA_D61

AG32

FBA_D62

AG33

FBA_D63

P30

FBA_DQM0

F31

FBA_DQM1

F34

FBA_DQM2

M32

FBA_DQM3

AD31

FBA_DQM4

AL29

FBA_DQM5

AM32

FBA_DQM6

AF34

FBA_DQM7

M31

FBA_DQS_WP0

G31

FBA_DQS_WP1

E33

FBA_DQS_WP2

M33

FBA_DQS_WP3

AE31

FBA_DQS_WP4

AK30

FBA_DQS_WP5

AN33

FBA_DQS_WP6

AF33

FBA_DQS_WP7

M30

FBA_DQS_RN0

H30

FBA_DQS_RN1

E34

FBA_DQS_RN2

M34

FBA_DQS_RN3

AF30

FBA_DQS_RN4

AK31

FBA_DQS_RN5

AM34

FBA_DQS_RN6

AF32

FBA_DQS_RN7

N13P-GLP-A1 FCBGA 908P GPU

OPT@

Part 3 of 7

MDC[15..0]

MDC[31..16]

MDC[47..32]

MDC[63..48]

FBB_CMD_RFU0
FBB_CMD_RFU1

FBB_DEBUG0

FBB_DEBUG1

MEMORY INTERFACE B

FBB_CLK0_N

FBB_CLK1_N

FBB_WCK01_N

FBB_WCK23_N

FBB_WCK45_N

FBB_WCK67_N

FBB_WCKB01

FBB_WCKB01_N

FBB_WCKB23

FBB_WCKB23_N

FBB_WCKB45

FBB_WCKB45_N

FBB_WCKB67

FBB_WCKB67_N

FBB_PLL_AVDD

FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8

FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31

FBB_CLK0

FBB_CLK1

FBB_WCK01

FBB_WCK23

FBB_WCK45

FBB_WCK67

D13
E14
F14
A12
B12
C14
B14
G15
F15
E15
D15
A14
D14
A15
B15
C17
D18
E18
F18
A20
B20
C18
B18
G18
G17
F17
D16
A18
D17
A17
B17
E17

C12
C20

G14
G20

D12
E12
E20
F20

F8
E8
A5
A6
D24
D25
B27
C27

D6
D7
C6
B6
F26
E26
A26
A27

H17

CMDC0
CMDC1

CMDC2
CMDC3

CMDC4
CMDC5
CMDC6
CMDC7

CMDC8

CMDC9

CMDC10
CMDC11
CMDC12
CMDC13
CMDC14

CMDC15

CMDC16

CMDC17
CMDC18
CMDC19
CMDC20

CMDC21

CMDC22

CMDC23
CMDC24
CMDC25
CMDC26

CMDC27

CMDC28
CMDC29
CMDC30

FBB_DEBUG0
FBB_DEBUG1

+FB_PLLAVDD

66mA35mA

OPT@

CMDC[30..0] <20,21>

12

RV58 60.4_0402_1%@

12

RV60 60.4_0402_1%@

CLKC0 <20>
CLKC0# <20>
CLKC1 <21>
CLKC1# <21>CLKA1 <19>

+FB_PLLAVDD

+FB_PLLAVDD

CV48

CV48 Under GPU
close to ball : H17

0.1U_0402_16V4Z

+1.5VSDGPU

+FB_PLLAVDD

FBB_PLL_AVDD Design Guide:

100nF X7R 0402 1pcs per pin under GPU

22uF X5R 0805 1pcs per pin Near GPU

300mA

LV11

1 2

MPZ1608S300AT 0603

1

CV51

CV52

2

OPT@

OPT@

1U_0402_6.3V6K

22U_0805_6.3V6M

+1.05VS_DGPU

OPT@

CV53

OPT@

1U_0402_6.3V6K

30ohm@100M // ESR=0.01
SM01000EQ00-­SM010031100--

bead--30ohm@100MHz (ESR=0.01ohm) 0603 1pcs Near GPU

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

N13P VRAM 2/9

N13P VRAM 2/9

N13P VRAM 2/9

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

14 59Wednesday, November 23, 2011

14 59Wednesday, November 23, 2011

14 59Wednesday, November 23, 2011

0.1

0.1

0.1

5

UV1D

AM6

IFPA_TXC

AN6

IFPA_TXC_N

AP3

IFPA_TXD0

AN3

IFPA_TXD0_N

AN5

IFPA_TXD1

AM5

IFPA_TXD1_N

AL6

IFPA_TXD2

AK6

IFPA_TXD2_N

AJ6

IFPA_TXD3

AH6

D D

RV140

@

VGA_HDMI_TX2+
VGA_HDMI_TX2­VGA_HDMI_TX1+

VGA_HDMI_TX1-

VGA_HDMI_TX0+
VGA_HDMI_TX0­VGA_HDMI_TXC+

VGA_HDMI_TXC-

+3VS_DGPU

12

12

RV149

4.7K_0402_5%

@

VGA_HDMI_TX2+<24>
VGA_HDMI_TX2-<24>

VGA_HDMI_TX1+<24>

VGA_HDMI_TX1-<24>

VGA_HDMI_TX0+<24>
VGA_HDMI_TX0-<24>
VGA_HDMI_TXC+<24>
VGA_HDMI_TXC-<24>

C C

4.7K_0402_5%

VGA_HDMI_CLK<24>

VGA_HDMI_DATA<24>

B B

IFPA_TXD3_N

AJ9

IFPB_TXC

AH9

IFPB_TXC_N

AP6

IFPB_TXD4

AP5

IFPB_TXD4_N

AM7

IFPB_TXD5

AL7

IFPB_TXD5_N

AN8

IFPB_TXD6

AM8

IFPB_TXD6_N

AK8

IFPB_TXD7

AL8

IFPB_TXD7_N

AK1

IFPC_L0

AJ1

IFPC_L0_N

AJ3

IFPC_L1

AJ2

IFPC_L1_N

AH3

IFPC_L2

AH4

IFPC_L2_N

AG5

IFPC_L3

AG4

IFPC_L3_N

AM1

IFPD_L0

AM2

IFPD_L0_N

AM3

IFPD_L1

AM4

IFPD_L1_N

AL3

IFPD_L2

AL4

IFPD_L2_N

AK4

IFPD_L3

AK5

IFPD_L3_N

AD2

IFPE_L0

AD3

IFPE_L0_N

AD1

IFPE_L1

AC1

IFPE_L1_N

AC2

IFPE_L2

AC3

IFPE_L2_N

AC4

IFPE_L3

AC5

IFPE_L3_N

AE3

IFPF_L0

AE4

IFPF_L0_N

AF4

IFPF_L1

AF5

IFPF_L1_N

AD4

IFPF_L2

AD5

IFPF_L2_N

AG1

IFPF_L3

AF1

IFPF_L3_N

AG3

IFPC_AUX_I2CW_SCL

AG2

IFPC_AUX_I2CW_SDA_N

AK3

IFPD_AUX_I2CX_SCL

AK2

IFPD_AUX_I2CX_SDA_N

AB3

IFPE_AUX_I2CY_SCL

AB4

IFPE_AUX_I2CY_SDA_N

AF3

IFPF_AUX_I2CZ_SCL

AF2

IFPF_AUX_I2CZ_SDA_N

N13P-GLP-A1 FCBGA 908P

OPT@

Part 4 of 7

LVDS/TMDS

MULTI_STRAP_REF0_GND

NC

VDD_SENSE

GND_SENSE

TEST

TESTMODE

JTAG_TCK

JTAG_TDI

JTAG_TDO

JTAG_TMS

JTAG_TRST_N

SERIAL

ROM_CS_N
ROM_SCLK

ROM_SI

ROM_SO

GENERAL

BUFRST_N

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

THERMDP

THERMDN

4

P8

NC

AC6

NC

AJ28

NC

AJ4

NC

AJ5

NC

AL11

NC

C15

NC

D19

NC

D20

NC

D23

NC

D26

NC

H31

NC

T8

NC

V32

NC

L4

L5

@

PAD

TV5

1 2

RV177 0_0402_5%OPT@

1 2

RV178 0_0402_5%OPT@

RV88 10K_0402_5%@

DG: 󱃦󰜧RV88 for XOR tree testing. --Joyce 1026

AK11

AM10
AM11
AP12
AP11
AN11

H6
H4
H5
H7

ROM_CS#
ROM_SCLK
ROM_SI
ROM_SO

JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST

RV84 10K_0402_5%

RV82 10K_0402_5%OPT@

RV83 10K_0402_5%OPT@

OPT@

RV85 10K_0402_5%

OPT@

ROM support: 512Kbit or greater, up to 50MHz.

CEC: Place a 10K pull up resistor to 3.3V on
N13P-PES/-GL/-GLP/-NS1 and N13M-NS1

CEC

L2

L3

J1

J2
J7
J6
J5
J3

K3
K4

MULTI_STRAP_REF0_GND

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

RV153 10K_0402_5%@

RV86 10K_0402_5%OPT@

1 2

RV87 40.2K_0402_1%OPT@

PAD

TV1

PAD

TV2

PAD

TV3

PAD

TV4

+3VS_DGPU

3

VCCSENSE_VGA <57>

VSSSENSE_VGA <57>

+3VS_DGPU

@
@
@
@

+3VS_DGPU

STRAP1
STRAP2

12

Straps

12

MULTI LEVEL STRAPS

RV64

45.3K_0402_1%

RV72

@

4.99K_0402_1%

12

12

Physical
strapping pin

ROM_SCLK

ROM_SI

ROM_SO

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

SUB_VENDOR

01No VBIOS ROM

BIOS ROM is present (Default)

FB [1:0]: N13x FB Aperture Size

0

RESERVED

1

RESERVED

256 MB (Default)

2

3 RESERVED

USER Straps

1111

EDID is used

others: DG-05587 Page195

3GIO_PAD_CFG

0000--0101 RESERVED

0110 Notebook (default)

0111--1111 RESERVED

2

+3VS_DGPU

RV65

@

4.99K_0402_1%

RV73

45.3K_0402_1%

12

RV66

4.99K_0402_1%

12

RV74

10K_0402_1%

12

12

@

RV68

@

30K_0402_1%

RV67

34.8K_0402_1%

STRAP3
STRAP4

12

12

@

RV76

RV75

20K_0402_1%

4.99K_0402_1%

@

@

ROM_SISTRAP0
ROM_SO
ROM_SCLK

12

RV69

@

4.99K_0402_1%

12

RV77

@

45.3K_0402_1%

X76-

Logical
Strapping Bit3

PCI_DEVID[4] SUB_VENDOR SLOT_CLK_CFG PEX_PLL_EN_TERM

RAM_CFG[3]

FB [1]

USER [3]

3GIO_PAD_CFG_ADR[3]

PCI-DEVID [3]

SOR3_EXPOSED

RESERVED PCIE_SPEED_

Logical
Strapping Bit2

RAM_CFG[2] RAM_CFG[1] RAM_CFG[0]

FB [0] VGA_DEVICE

USER [2] USER [1] USER [0]

3GIO_PAD_CFG_ADR[2] 3GIO_PAD_CFG_ADR[1] 3GIO_PAD_CFG_ADR[0]

PCI-DEVID [2] PCI-DEVID [1] PCI-DEVID [0]

SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED

CHANGE_GEN3

PEX_PLL_EN_TERM:
PLL termination setting

0

Disable (Default)

1 Enable

Logical
Strapping Bit1

SMB_ALT_ADDR

PCIE_MAX_SPEED DP_PLL_VDD33V

Logical
Strapping Bit0

PCIE_MAX_SPEED

01Limited to PCIE GEN 1

PCIE GEN 2/3 capable

1

12

RV70

@

4.99K_0402_1%

12

RV78

10K_0402_1%

Resistor
Values

5K

10K

15K

20K

25K

30K

35K

45K

+3VS_DGPU

12

RV71

@

4.99K_0402_1%

12

RV79

15K_0402_1%

Pull up

Pull down

to 3V

to GND

1000 0000

1001 0001

1010 0010

1011 0011

1100 0100

1101 0101

1110 0110

1111 0111

For N13P-GLP strap table

For N13P-PES :
Strap 0 : PU45
Strap 1 : PD35
Strap 2 : PU35
ROM_SCLK : PU15

A A

5

4

ROM_SI : PD35
ROM_SO : PD10

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

N13P-GLP

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Memory SizeFrenq. strap4strap3GPU

64M* 16* 8

900 MHz

1GB

64M* 16* 8

900 MHz

1GB

128M* 16* 8

900 MHz

2GB

128M* 16* 8

900 MHz

2GB

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Memory Config

Hynix
SA000041S20

Samsung
SA00004GS00

Hynix
SA00003YO00

Samsung
SA000047Q00

RV64

PD 45K

PU 45K

RV64

RV73

PU 45K

PD 45K

RV64

RV73

PU 45K

PD 45K

RV64

RV73

PU 45K

PD 45K

2

NC

PU 5K

RV74

NC

PU 5K

RV74

NC

PU 5K

RV74

NC

PU 5K

Title

Title

Title

N13P LVDS 3/9

N13P LVDS 3/9

N13P LVDS 3/9

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

Date: Sheet

Date: Sheet

Date: Sheet of

RV74

RV73

ROM_SIstrap2strap1strap0 ROM_SCLKROM_SO

RV77
PD 15K

RV77
PD 20K

RV77
PD 35K

RV77
PD 45K

RV70
PD 30K

RV70
PD 30K

RV70
PD 30K

RV70
PD 30K

1

NC

NC

NC

NC

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

RV71
PD 15K

RV71
PD 15K

RV71
PD 15K

RV71
PD 15K

15 59Wednesday, November 23, 2011

15 59Wednesday, November 23, 2011

15 59Wednesday, November 23, 2011

0.1

0.1

0.1

of

of

5

+1.5VSDGPU

FBVDDQ Decouping Design Guide:

D D

0.1uF X7R 0402 8pcs under GPU
1uF X7R 0603 2pcs under GPU

4.7uF X6S 0603 2pcs under GPU
10uF X5R 0805 4pcs Near GPU

CV61

OPT@

4.7U_0603_6.3V6K

CV69

OPT@

4.7U_0603_6.3V6K

Near GPU

1

1

2

OPT@

C C

+1.5VSDGPU

+1.5VSDGPU

Calibration Pin

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

B B

DDR3 GDDR5

40.2ohm

42.2ohm

51.1ohm

40.2ohm

40.2ohm

60.4ohm

1

CV84

CV83

2

2

OPT@

OPT@

10U_0603_6.3V6M

10U_0603_6.3V6M

4

Design guide no define

Under GPU

CV64

CV63

CV62

OPT@

OPT@

OPT@

1U_0402_6.3V6K

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

7200mA

CV66

CV65

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Under GPU

CV70

OPT@

1U_0402_6.3V6K

CV85

10U_0603_6.3V6M

CV71

CV79

OPT@

OPT@

0.1U_0402_16V4Z

1

CV86

2

OPT@

10U_0603_6.3V6M

RV91 10_0402_5%

RV93 10_0402_5%

RV96 40.2_0402_1%

RV98 42.2_0402_1%

RV101 51.1_0402_1%

0.1U_0402_16V4Z

OPT@

OPT@

OPT@

OPT@

OPT@

CV72

OPT@

0.1U_0402_16V4Z

12

12

12

12

12

CV73

OPT@

0.1U_0402_16V4Z

FB_VDDQ_SENSE

FB_GND_SENSE

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

AA27
AA30
AB27
AB33
AC27
AD27
AE27
AF27
AG27

M27
N27

R27

W27
W30
W33

H27

H25

UV1E

B13
B16
B19
E13
E16
E19
H10
H11
H12
H13
H14
H15
H16
H18
H19
H20
H21
H22
H23
H24

H8
H9

L27

P27

T27
T30
T33
V27

Y27

F1

F2

J27

Part 5 of 7

FBVDDQ_0
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26
FBVDDQ_27
FBVDDQ_28
FBVDDQ_29
FBVDDQ_30
FBVDDQ_31
FBVDDQ_32
FBVDDQ_33
FBVDDQ_34
FBVDDQ_35
FBVDDQ_36
FBVDDQ_37
FBVDDQ_38
FBVDDQ_39
FBVDDQ_40
FBVDDQ_41
FBVDDQ_42
FBVDDQ_43

FB_VDDQ_SENSE

FB_GND_SENSE

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

3

PEX_IOVDD_0
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5

PEX_IOVDDQ_0
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8

PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13

PEX_PLL_HVDD

PEX_SVDD_3V3

POWER

PEX_PLLVDD

IFPAB_PLLVDD

IFPAB_RSET

IFPA_IOVDD
IFPB_IOVDD

IFPC_PLLVDD

IFPC_IOVDD

IFPD_PLLVDD

IFPD_IOVDD

IFPEF_PLVDD

IFPEF_RSET

IFPE_IOVDD

VDD33_0
VDD33_1
VDD33_2
VDD33_3

IFPC_RSET

IFPD_RSET

IFPF_IOVDD

AG19
AG21
AG22
AG24
AH21
AH25

AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28

AH12

AG12

AG26

J8
K8
L8
M8

AH8
AJ8

AG8
AG9

AF7
AF8

AF6

AG7
AN2

AG6

AB8
AD6

AC7
AC8

3300 mA

CV80,CV198 Under GPU
close to ball

@

CV80 0.1U_0402_16V4Z

OPT@

CV198 0.1U_0402_16V4Z

+PEX_PLLVDD

+VDD33

+VDD33

120mA

Design guide no define

+IFPAB_PLLVDD

+IFPAB_IOVDD

+IFPC_PLLVDD

+IFPC_IOVDD

+IFPD_PLLVDD

+IFPD_IOVDD

+IFPEF_PLLVDD

+IFPEF_IOVDD

+IFPEF_IOVDD

Under GPU

CV54

OPT@

1 2

RV102 10K_0402_5%OPT@
RV90 1K_0402_5%@

1 2

RV104 10K_0402_5%OPT@

1 2

RV92 10K_0402_5%OPT@
RV94 1K_0402_5%@

1 2

RV95 10K_0402_5%OPT@

1 2

RV97 10K_0402_5%OPT@
RV99 1K_0402_5%@

1 2

RV100 10K_0402_5%OPT@

1 2

RV114 10K_0402_5%OPT@

@

RV103 1K_0402_5%

1 2

RV126 10K_0402_5%OPT@

1U_0402_6.3V6K

210mA

150mA

CV55

OPT@

1U_0402_6.3V6K

210mA

Near GPU

2

1

1

CV58

CV57

CV56

2

2

OPT@

OPT@

OPT@

Under GPU

PEX_PLL_HVDD:
N13P-GLP/PES :NC
N13P-LP : power.

10U_0603_6.3V6M

4.7U_0603_6.3V6K

Near GPU

CV75

CV74

OPT@

OPT@

1U_0402_6.3V6K

OPT@

1U_0402_6.3V6K

Under GPU

OPT@

Under GPU

OPT@

10U_0603_6.3V6M

CV87

CV90

OPT@

CV76

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CV59

22U_0805_6.3V6M

1

2

OPT@

Near GPU

CV88

OPT@

CV91

OPT@

+1.05VS_DGPU

CV68

OPT@

22U_0805_6.3V6M

1

+1.05VS_DGPU

CV60

OPT@

22U_0805_6.3V6M

1

CV77

2

OPT@

10U_0603_6.3V6M

CV78

CV67

OPT@

22U_0805_6.3V6M

10U_0603_6.3V6M

Near GPU

CV82

CV81

OPT@

OPT@

LV12

BLM18PG121SN1D_0603

CV89

OPT@

1U_0402_6.3V6K

CV92

OPT@

0.1U_0402_16V4Z

OPT@

猁

:120ohm@100MHz, ESR=0.18ohm 0603

LV12

LV12 stuff a 0ohm resistor instead for
N13E-GE, N13P-GT/-GS/-LP/-GV, N13M-GS,

4.7U_0603_6.3V6K

N14P-Q1/-Q3

CV95

OPT@

OPT@

1U_0402_6.3V6K

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

12

CV96

CV97

OPT@

1U_0402_6.3V6K

4.7U_0603_6.3V6K

+3VS_DGPU

420mA

+1.05VS_DGPU

OPT@

RV89

0_0603_5%

+3VS_DGPU

PEX_IOVVD/Q

N13P-GLP-A1 FCBGA 908P

OPT@

+IFPC_PLLVDD

1

CV215

0.1U_0402_16V4Z

@

2

+IFPC_IOVDD

110mA

50mA

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

LV7

@

LV13

@

Near GPU

12

1

CV203

@

2

4.7U_0603_6.3V6K

12

4.7U_0603_6.3V6K

1

CV205

@

2

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

+3VS_DGPU

BLM18PG181SN1D_0603

300ohm 100MHz, ESR=0.25ohm

+1.05VS_DGPU

A A

BLM18PG181SN1D_0603

220ohm 100MHz, ESR=0.05ohm

5

Under GPU

0.1U_0402_16V4Z

1

2

CV199

@

1

CV200

@

2

0.1U_0402_16V4Z

1

2

CV202

@

Under GPU(below 150mils)

0.1U_0402_16V4Z

1

1

2

CV204

@

CV206

0.1U_0402_16V4Z

@

2

CV201

@

4

Capacitor Type Footprint Population Location

1.0uF X6S 0402 4

4.7uF

10uF

22uF

X6S

X5R

X5R

0603

0805

0805

2

4

4

PEX_PLLVDD

Capacitor Type Footprint Population Location

100nF X6S 0402 1

X5R

1.0uF

4.7uF X5R

0603

0805

1

1

PEX_SVDD/PLL_HVDD

Capacitor Type Footprint Population Location

X5R

0.1uF 0402 1

X5R

4.7uF 0603 2 Near GPU

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Under GPU

Near GPU

Midway between GPU and Power Supply

Midway between GPU and Power Supply

Under GPU

Near GPU

Near GPU

Near GPU

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

N13P POWER & GND 4/9

N13P POWER & GND 4/9

N13P POWER & GND 4/9

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

1

16 59Wednesday, November 23, 2011

16 59Wednesday, November 23, 2011

16 59Wednesday, November 23, 2011

0.1

0.1

0.1

5

4

3

2

1

UV1F

D D

C C

B B

A A

5

A2
AA17
AA18
AA20
AA22
AB12
AB14
AB16
AB19

AB2

AB21

A33
AB23
AB28
AB30
AB32

AB5

AB7
AC13
AC15
AC17
AC18
AA13
AC20
AC22

AE2
AE28
AE30
AE32
AE33

AE5

AE7
AH10
AA15
AH13
AH16
AH19

AH2
AH22
AH24
AH28
AH29
AH30
AH32
AH33

AH5

AH7

AJ7

AK10

AK7

AL12
AL14
AL15
AL17
AL18

AL2
AL20
AL21
AL23
AL24
AL26
AL28
AL30
AL32
AL33

AL5

AM13
AM16
AM19
AM22
AM25

AN1
AN10
AN13
AN16
AN19
AN22
AN25
AN30
AN34

AN4

AN7

AP2
AP33

B1
B10
B22
B25
B28
B31
B34

B4

B7

C10
C13
C19
C22
C25
C28

C7

N13P-GLP-A1 FCBGA 908P

OPT@

GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99

Part 6 of 7

GND

GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198

GND_199
GND_OPT
GND_OPT

D2
D31
D33
E10
E22
E25
E5
E7
F28
F7
G10
G13
G16
G19
G2
G22
G25
G28
G3
G30
G32
G33
G5
G7
K2
K28
K30
K32
K33
K5
K7
M13
M15
M17
M18
M20
M22
N12
N14
N16
N19
N2
N21
N23
N28
N30
N32
N33
N5
N7
P13
P15
P17
P18
P20
P22
R12
R14
R16
R19
R21
R23
T13
T15
T17
T18
T2
T20
T22
AG11
T28
T32
T5
T7
U12
U14
U16
U19
U21
U23
V12
V14
V16
V19
V21
V23
W13
W15
W17
W18
W20
W22
W28
Y12
Y14
Y16
Y19
Y21
Y23
AH11
C16
W32

60A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

UV1G

AA12

VDD_0

AA14

VDD_1

AA16

VDD_2

AA19

VDD_3

AA21

VDD_4

AA23

VDD_5

AB13

VDD_6

AB15

VDD_7

AB17

VDD_8

AB18

VDD_9

AB20

VDD_10

AB22

VDD_11

AC12

VDD_12

AC14

VDD_13

AC16

VDD_14

AC19

VDD_15

AC21

VDD_16

AC23

VDD_17

M12

VDD_18

M14

VDD_19

M16

VDD_20

M19

VDD_21

M21

VDD_22

M23

VDD_23

N13

VDD_24

N15

VDD_25

N17

VDD_26

N18

VDD_27

N20

VDD_28

N22

VDD_29

P12

VDD_30

P14

VDD_31

P16

VDD_32

P19

VDD_33

P21

VDD_34

P23

VDD_35

R13

VDD_36

R15

VDD_37

R17

VDD_38

R18

VDD_39

R20

VDD_40

R22

VDD_41

T12

VDD_42

T14

VDD_43

T16

VDD_44

T19

VDD_45

T21

VDD_46

T23

VDD_47

U13

VDD_48

U15

VDD_49

U17

VDD_50

U18

VDD_51

U20

VDD_52

U22

VDD_53

V13

VDD_54

V15

VDD_55

N13P-GLP-A1 FCBGA 908P GPU

OPT@

Part 7 of 7

VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDD_64
VDD_65
VDD_66
VDD_67
VDD_68
VDD_69
VDD_70
VDD_71

XVDD_1
XVDD_2
XVDD_3
XVDD_4
XVDD_5
XVDD_6
XVDD_7
XVDD_8

XVDD_9
XVDD_10
XVDD_11
XVDD_12
XVDD_13
XVDD_14

POWER

XVDD_15
XVDD_16

XVDD_17
XVDD_18
XVDD_19
XVDD_20
XVDD_21
XVDD_22

XVDD_23
XVDD_24
XVDD_25
XVDD_26
XVDD_27
XVDD_28
XVDD_29
XVDD_30

XVDD_31
XVDD_32
XVDD_33
XVDD_34
XVDD_35
XVDD_36
XVDD_37
XVDD_38

Title

Title

Title

N13P POWER & GND 5/9

N13P POWER & GND 5/9

N13P POWER & GND 5/9

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

Date: Sheet

Date: Sheet of

Date: Sheet of

+VGA_CORE+VGA_CORE

V17
V18
V20
V22
W12
W14
W16
W19
W21
W23
Y13
Y15
Y17
Y18
Y20
Y22

U1
U2
U3
U4
U5
U6
U7
U8

V1
V2
V3
V4
V5
V6
V7
V8

W2
W3
W4
W5
W7
W8

Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8

AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

0.1

0.1

0.1

of

17 59Wednesday, November 23, 2011

17 59Wednesday, November 23, 2011

17 59Wednesday, November 23, 2011

5

4

3

2

1

VRAM DDR3 chips (1GB)

D D

C C

B B

64Mx16 DDR3 *8==>1GB
128Mx16 DDR3 *8==>2GB

OPT@

OPT@

OPT@

OPT@

CLKA0

12

RV15

OPT@

160_0402_1%

CLKA0#

DQSA[7..0]

DQSA#[7..0]

DQMA[7..0]

MDA[63..0]

CMDA[30..0]

+MEM_VREF0

OPT@

+MEM_VREF1

OPT@

1 2

RV109

@

80.6_0402_1%

1 2

RV118

@

80.6_0402_1%

DQSA[7..0]<14,19>

DQSA#[7..0]<14,19>

DQMA[7..0]<14,19>

MDA[63..0]<14,19>

CMDA[30..0]<14,19>

+1.5VSDGPU

RV105

1.33K_0402_1%

RV106

1.33K_0402_1%

+1.5VSDGPU

RV107

1.33K_0402_1%

RV108

1.33K_0402_1%

CLKA0<14>

CLKA0#<14>

NV recommand 0720

UV3

X76@

CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4
CMDA14

CMDA12
CMDA27
CMDA26

CLKA0
CLKA0#
CMDA3

CMDA2
CMDA0
CMDA30
CMDA15
CMDA13

DQSA1
DQSA2

DQMA1
DQMA2

DQSA#1
DQSA#2

CMDA5

12

OPT@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

+MEM_VREF0

1

2

CV109

0.1U_0402_16V4Z

1

2

CV110

0.1U_0402_16V4Z

RV110

243_0402_1%

1

@

CV111

0.01U_0402_16V7K

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

MDA12
MDA14
MDA8
MDA15
MDA9
MDA13
MDA10
MDA11

MDA17
MDA21
MDA18
MDA23
MDA19
MDA22
MDA16
MDA20

+1.5VSDGPU

+1.5VSDGPU

swap 0329

Group1

Group2

RV111

243_0402_1%

+MEM_VREF1

CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4
CMDA14

CMDA12
CMDA27
CMDA26

CLKA0
CLKA0#
CMDA3

CMDA2
CMDA0
CMDA30
CMDA15
CMDA13

DQSA0
DQSA3

DQMA0
DQMA3

DQSA#0
DQSA#3

CMDA5

ZQ1ZQ0

12

OPT@

UV4

M8

H1

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7

M7

M2

N8

M3

J7
K7
K9

K1
L2

J3
K3
L3

F3
C7

E7
D3

G3
B7

T2

L8

J1
L1

J9
L9

X76@

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

310mA

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

E3

MDA3

F7

MDA4

F2

MDA2

F8

MDA7

H3

MDA0

H8

MDA5

G2

MDA1

H7

MDA6

D7

MDA27

C3

MDA29

C8

MDA25

C2

MDA30

A7

MDA24

A2

MDA28

B8

MDA26

A3

MDA31

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

CMDA2
CMDA3
CMDA5
CMDA18
CMDA19

Group0

Group3

RV112 10K_0402_5%OPT@
RV113 10K_0402_5%OPT@
RV115 10K_0402_5%OPT@
RV116 10K_0402_5%OPT@
RV117 10K_0402_5%OPT@

1 2
1 2
1 2
1 2
1 2

Mode D
Address

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21 A8

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

Not Available

Command Bit Default Pull-down

ODTx 10k

CKEx

DDR3

RST 10k

CS* No Termination

0..31

32..63

CS0_L#

ODT_L

CKE

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

CS0_H#

ODT_H

CKE_H

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

LOW HIGH

10k

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

A13

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

+1.5VSDGPU

1

1

CV112

2

A A

2

OPT@

0.1U_0402_16V4Z

5

close to UV3 close to UV4

1

CV113

OPT@

0.1U_0402_16V4Z

CV115

CV114

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

CV117

CV116

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CV118

CV119

2

OPT@

0.1U_0402_16V4Z

4

CV120

2

OPT@

OPT@

0.1U_0402_16V4Z
1U_0402_6.3V6K

CV122

CV121

OPT@

1U_0402_6.3V6K

CV123

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.5VSDGPU

1

1U_0402_6.3V6K

Deciphered Date

Deciphered Date

Deciphered Date

1

CV134

CV130

2

OPT@

0.1U_0402_16V4Z

CV135

2

OPT@

0.1U_0402_16V4Z

2

CV136

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CV124

CV125

CV126

CV127

CV128

2

2

OPT@

OPT@

OPT@

0.1U_0402_16V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

OPT@

0.1U_0402_16V4Z
1U_0402_6.3V6K

1U_0402_6.3V6K

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

CV129

OPT@

OPT@

1U_0402_6.3V6K

Compal Secret Data

Compal Secret Data

Compal Secret Data

CV137

CV138

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

N13P DDR3 6/9

N13P DDR3 6/9

N13P DDR3 6/9

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

1

0.1

0.1

18 59Wednesday, November 23, 2011

18 59Wednesday, November 23, 2011

18 59Wednesday, November 23, 2011

0.1

of

of

5

4

3

2

1

VRAM DDR3 chips (1GB)

64Mx16 DDR3 *8==>1GB

D D

C C

B B

128Mx16 DDR3 *8==>2GB

DQMA[7..0]<14,18>

CMDA[30..0]<14,18>

DQSA#[7..0]<14,18>

DQSA[7..0]<14,18>

MDA[63..0]<14,18>

+1.5VSDGPU

RV119

1.33K_0402_1%

1.33K_0402_1%

1.33K_0402_1%

1.33K_0402_1%

CLKA1<14>

CLKA1#<14>

NV recommand 0720

RV120

+1.5VSDGPU

RV121

RV122

CLKA1

12

RV16

OPT@

160_0402_1%

CLKA1#

OPT@

OPT@

OPT@

+MEM_VREF3

OPT@

1 2

RV125

@

80.6_0402_1%

1 2

RV127

@

80.6_0402_1%

DQMA[7..0]

CMDA[30..0]

DQSA#[7..0]

DQSA[7..0]

MDA[63..0]

+MEM_VREF2

1

2

OPT@

CV131

0.1U_0402_16V4Z

1

2

OPT@

CV132

0.1U_0402_16V4Z

1

@

CV133

0.01U_0402_16V7K

2

UV5

X76@

CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4
CMDA14

CMDA12
CMDA27
CMDA26

CLKA1
CLKA1#
CMDA19

CMDA18
CMDA16
CMDA30
CMDA15
CMDA13

DQSA4
DQSA7

DQMA4
DQMA7

DQSA#4
DQSA#7

CMDA5

12

M8
H1

N3

P7
P3

N2

P8

P2
R8
R2

T8
R3

L7
R7
N7

T3

T7
M7

M2
N8
M3

J7
K7
K9

K1
L2

J3
K3
L3

F3

C7

E7

D3

G3

B7

T2

L8

ZQ2

J1
L1

J9

OPT@

L9

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

310mA 310mA

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

+MEM_VREF2 +MEM_VREF3

RV123

243_0402_1%

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3

MDA39

F7

MDA35

F2

MDA37

F8

MDA33

H3

MDA38

H8

MDA32

G2

MDA36

H7

MDA34

D7

MDA61

C3

MDA59

C8

MDA60

C2

MDA57

A7

MDA63

A2

MDA56

B8

MDA62

A3

MDA58

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

Group4

RV124

243_0402_1%

CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4
CMDA14

CMDA12
CMDA27
CMDA26

CLKA1
CLKA1#
CMDA19

CMDA18
CMDA16
CMDA30
CMDA15
CMDA13

DQSA5
DQSA6

DQMA5
DQMA6

DQSA#5
DQSA#6

CMDA5

12

M8
H1

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3

L7
R7
N7
T3
T7
M7

M2
N8
M3

J7
K7
K9

K1

L2

J3
K3

L3

F3
C7

E7
D3

G3
B7

T2

L8

ZQ3

J1

L1

OPT@

J9

L9

UV6

X76@

96-BALL
SDRAM DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

K4B1G1646E-HC12_FBGA96

E3

MDA45

F7

MDA40

F2

MDA46

F8

MDA41

H3

MDA47

H8

MDA43

G2

MDA44

H7

MDA42

D7

MDA53

C3

MDA49

C8

MDA55

C2

MDA50

A7

MDA52

A2

MDA48

B8

MDA54

A3

MDA51

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

Group5

Group6Group7

Mode D
Address

CMD0

0..31

CS0_L#

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

ODT_L

CKE

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21 A8

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

Not Available

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

LOW HIGH

32..63

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

CS0_H#

ODT_H

CKE_H

A13

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

Issued Date

Issued Date

Issued Date

3

+1.5VSDGPU

1

2

close to UV6

1

CV159

CV160

CV161

CV162

CV163

2

OPT@

OPT@

OPT@

0.1U_0402_16V4Z

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

OPT@

0.1U_0402_16V4Z
1U_0402_6.3V6K

1U_0402_6.3V6K

Compal Secret Data

Compal Secret Data

Compal Secret Data

OPT@

1U_0402_6.3V6K

Deciphered Date

Deciphered Date

Deciphered Date

CV164

OPT@

1

2

1U_0402_6.3V6K

1

CV151

CV165

OPT@

0.1U_0402_16V4Z

2

CV152

CV156

CV157

2

OPT@

OPT@

OPT@

0.1U_0402_16V4Z
1U_0402_6.3V6K

1U_0402_6.3V6K

CV158

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

N13P DDR3 7/9

N13P DDR3 7/9

N13P DDR3 7/9

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

1

19 59Wednesday, November 23, 2011

19 59Wednesday, November 23, 2011

19 59Wednesday, November 23, 2011

0.1

0.1

0.1

+1.5VSDGPU

A A

5

1

CV144

2

OPT@

close to UV5

1

CV145

2

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

CV150

CV146

CV147

CV148

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

CV149

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

4

CV139

2

2

OPT@

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CV141

CV142

CV140

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

CV143

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

1

VRAM DDR3 chips (1GB)

Mode D
Address

CMD0

0..31

CS0_L#

32..63

CMD1

D D

C C

B B

CLKC0<14>

CLKC0#<14>

A A

64Mx16 DDR3 *8==>1GB
128Mx16 DDR3 *8==>2GB

OPT@

OPT@

OPT@

+MEM_VREF5

OPT@

1 2

RV139

@

80.6_0402_1%

1 2

RV141

@

80.6_0402_1%

DQSC[7..0]

DQSC#[7..0]

DQMC[7..0]

MDC[63..0]

CMDC[30..0]

+MEM_VREF4

1

2

OPT@

CV153

0.1U_0402_16V4Z

1

2

OPT@

CV154

0.1U_0402_16V4Z

1

@

CV155

0.01U_0402_16V7K

2

DQSC[7..0]<14,21>

DQSC#[7..0]<14,21>

DQMC[7..0]<14,21>

MDC[63..0]<14,21>

CMDC[30..0]<14,21>

+1.5VSDGPU

RV128

1.33K_0402_1%

RV129

1.33K_0402_1%

+1.5VSDGPU

RV130

1.33K_0402_1%

RV131

1.33K_0402_1%

CLKC0

12

RV17
160_0402_1%

OPT@

CLKC0#

NV recommand 0720

UV7

X76@

+MEM_VREF4

RV151

243_0402_1%

+1.5VSDGPU +1.5VSDGPU

M8

VREFCA

H1

VREFDQ

N3

CMDC9
CMDC11
CMDC8
CMDC25
CMDC10
CMDC24
CMDC22
CMDC7
CMDC21
CMDC6
CMDC29
CMDC23
CMDC28
CMDC20
CMDC4
CMDC14

CMDC12
CMDC27
CMDC26

CLKC0
CLKC0#
CMDC3

CMDC2
CMDC0
CMDC30
CMDC15
CMDC13

DQSC1
DQSC2

DQMC1
DQMC2

DQSC#1
DQSC#2

CMDC5

ZQ4 ZQ5

12

OPT@

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

close to UV7 close to UV8

1

1

CV171

CV172

2

OPT@

0.1U_0402_16V4Z

CV173

2

OPT@

OPT@

0.1U_0402_16V4Z
1U_0402_6.3V6K

E3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

1U_0402_6.3V6K

MDC8

F7

MDC12

F2

MDC11

F8

MDC13

H3

MDC9

H8

MDC14

G2

MDC10

H7

MDC15

D7

MDC18

C3

MDC20

C8

MDC17

C2

MDC22

A7

MDC16

A2

MDC23

B8

MDC19

A3

MDC21

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

CV178

CV179

OPT@

OPT@

1U_0402_6.3V6K

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

CV174

OPT@

swap 0329

Group1

Group2

1

CV180

2

1U_0402_6.3V6K

OPT@

243_0402_1%

1

2

0.1U_0402_16V4Z

CV166

OPT@

RV133

0.1U_0402_16V4Z

+MEM_VREF5

CMDC9
CMDC11
CMDC8
CMDC25
CMDC10
CMDC24
CMDC22
CMDC7
CMDC21
CMDC6
CMDC29
CMDC23
CMDC28
CMDC20
CMDC4
CMDC14

CMDC12
CMDC27
CMDC26

CLKC0
CLKC0#
CMDC3

CMDC2
CMDC0
CMDC30
CMDC15
CMDC13

DQSC0
DQSC3

DQMC0
DQMC3

DQSC#0
DQSC#3

CMDC5

12

CV167

OPT@

1U_0402_6.3V6K

OPT@

CV168

OPT@

1U_0402_6.3V6K

UV8

M8

H1

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7

M7

M2

N8

M3

J7
K7
K9

K1
L2

J3
K3
L3

F3
C7

E7
D3

G3
B7

T2

L8

J1
L1

J9
L9

X76@

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

310mA

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

CV169

CV170

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3

MDC3

F7

MDC7

F2

MDC1

F8

MDC4

H3

MDC2

H8

MDC6

G2

MDC0

H7

MDC5

D7

MDC26

C3

MDC31

C8

MDC25

C2

MDC30

A7

MDC27

A2

MDC28

B8

MDC24

A3

MDC29

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

1

CV186

2

OPT@

0.1U_0402_16V4Z

Group0

Group3

1U_0402_6.3V6K

1 2

RV134 10K_0402_5%OPT@

1 2

RV135 10K_0402_5%OPT@

1 2

RV136 10K_0402_5%OPT@

1 2

RV137 10K_0402_5%OPT@

1 2

RV138 10K_0402_5%OPT@

CV189

OPT@

OPT@

1U_0402_6.3V6K

CV191

CV190

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

CMDC2
CMDC3
CMDC5
CMDC18
CMDC19

1

CV187

CV188

2

OPT@

OPT@

0.1U_0402_16V4Z

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21 A8

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

Not Available

DDR3

1

1

CV181

CV192

2

2

OPT@

OPT@

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

ODT_L

CKE

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

CS0_H#

ODT_H

CKE_H

A13

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

LOW HIGH

Command Bit Default Pull-down

ODTx

CKEx

RST

CS* No Termination

CV182

1U_0402_6.3V6K

10k

10k

10k

CV183

CV184

OPT@

1U_0402_6.3V6K

CV185

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet of

Compal Electronics, Inc.

N13P DDR3 8/9

N13P DDR3 8/9

N13P DDR3 8/9

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

1

0.1

0.1

20 59Wednesday, November 23, 2011

20 59Wednesday, November 23, 2011

20 59Wednesday, November 23, 2011

0.1

of

of

5

4

3

2

1

VRAM DDR3 chips (1GB)

64Mx16 DDR3 *8==>1GB

D D

C C

B B

CLKC1<14>

CLKC1#<14>

128Mx16 DDR3 *8==>2GB

DQMC[7..0]

CMDC[30..0]

DQSC#[7..0]

DQSC[7..0]

MDC[63..0]

+MEM_VREF6

1

2

OPT@

CV175

0.1U_0402_16V4Z

+MEM_VREF7

1

2

OPT@

CV176

0.1U_0402_16V4Z

1

2

@

CV177

0.01U_0402_16V7K

RV142

1.33K_0402_1%

RV143

1.33K_0402_1%

+1.5VSDGPU

RV144

1.33K_0402_1%

RV145

1.33K_0402_1%

1 2

CLKC1

12

80.6_0402_1%
RV18
160_0402_1%

OPT@

1 2

CLKC1#

80.6_0402_1%

NV recommand 0720

DQMC[7..0]<14,20>

CMDC[30..0]<14,20>

DQSC#[7..0]<14,20>

DQSC[7..0]<14,20>

MDC[63..0]<14,20>

+1.5VSDGPU

RV148

@

RV150

@

OPT@

OPT@

OPT@

OPT@

RV146

243_0402_1%

+MEM_VREF6

CMDC9
CMDC11
CMDC8
CMDC25
CMDC10
CMDC24
CMDC22
CMDC7
CMDC21
CMDC6
CMDC29
CMDC23
CMDC28
CMDC20
CMDC4
CMDC14

CMDC12
CMDC27
CMDC26

CLKC1
CLKC1#
CMDC19

CMDC18
CMDC16
CMDC30
CMDC15
CMDC13

DQSC4
DQSC5

DQMC4
DQMC5

DQSC#4
DQSC#5

ZQ6

12

OPT@

UV10

X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA 310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL
SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

E3

MDC39

F7

MDC33

F2

MDC38

F8

MDC32

H3

MDC36

H8

MDC34

G2

MDC37

H7

MDC35

D7

MDC44

C3

MDC43

C8

MDC47

C2

MDC40

A7

MDC45

A2

MDC42

B8

MDC46

A3

MDC41

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

Group4

Group5

+MEM_VREF7

RV147

243_0402_1%

CMDC9
CMDC11
CMDC8
CMDC25
CMDC10
CMDC24
CMDC22
CMDC7
CMDC21
CMDC6
CMDC29
CMDC23
CMDC28
CMDC20
CMDC4
CMDC14

CMDC12
CMDC27
CMDC26

CLKC1
CLKC1#
CMDC19

CMDC18
CMDC16
CMDC30
CMDC15
CMDC13

DQSC7
DQSC6

DQMC7
DQMC6

DQSC#7
DQSC#6

CMDC5CMDC5

12

M8

H1

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3

L7
R7
N7
T3
T7

M7

M2

N8

M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

ZQ7

J1

L1

J9

OPT@

L9

UV9

X76@

96-BALL
SDRAM DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS/CS0
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

K4B1G1646E-HC12_FBGA96

Mode D
Address

E3

MDC63

F7

MDC58

F2

MDC62

F8

MDC59

H3

MDC60

H8

MDC61

G2

MDC57

H7

MDC56

D7

MDC54

C3

MDC48

C8

MDC52

C2

MDC50

A7

MDC53

A2

MDC51

B8

MDC55

A3

MDC49

+1.5VSDGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VSDGPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

Group7

Group6

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21 A8

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

Not Available

0..31

CS0_L#

ODT_L

32..63

CKE

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

A14

RST

A9

A7

A2

A0

A4

A1

BA0

WE*

A15

CAS*

CS0_H#

ODT_H

CKE_H

A13

A13

A8

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

A6

A11

A5

A3

BA2

BA1

A12

A10

RAS*

LOW HIGH

+1.5VSDGPU +1.5VSDGPU

A A

5

close to UV10 close to UV9

1

1

1

CV208

CV209

CV210

2

2

OPT@

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CV211

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

4

CV213

CV212

OPT@

OPT@

1U_0402_6.3V6K

1

CV193

CV214

2

OPT@

1U_0402_6.3V6K

0.1U_0402_16V4Z

CV194

CV195

CV196

2

OPT@

OPT@

OPT@

0.1U_0402_16V4Z
1U_0402_6.3V6K

1U_0402_6.3V6K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CV207

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

3

1

CV221

2

OPT@

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

1

CV222

CV223

2

OPT@

OPT@

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1U_0402_6.3V6K

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

1

CV216

CV224

CV225

OPT@

1U_0402_6.3V6K

CV226

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

2

CV227

2

OPT@

0.1U_0402_16V4Z

CV217

CV218

CV219

2

OPT@

OPT@

OPT@

0.1U_0402_16V4Z
1U_0402_6.3V6K

1U_0402_6.3V6K

Title

Title

Title

N13P DDR3 9/9

N13P DDR3 9/9

N13P DDR3 9/9

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

Date: Sheet of

Date: Sheet of

Date: Sheet of

CV220

OPT@

OPT@

1U_0402_6.3V6K

1U_0402_6.3V6K

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

0.1

0.1

21 59Wednesday, November 23, 2011

21 59Wednesday, November 23, 2011

21 59Wednesday, November 23, 2011

0.1

5

4

3

2

1

40mil

+5VS

+CRT_VCC_R +CRT_VCC

D58

2

3

If=1A

RB491D_SOT23-3

F3

1

1.1A_6V_MINISMDC110F-2

40mil

21

0.1U_0402_16V4Z

CRT CONNECTOR

JCRT

6

RGND

CRT11
CRT_R_L

CRT_DDC_DAT
CRT_G_L

HSYNC
CRT_B_L

VSYNC
CRT12

CRT_DDC_CK

11

ID0

1

Red

7

GGND

12

SDA

2

Green

8

BGND

13

Hsync

3

Blue

9

+5V

14

Vsync

4

res

10

SGND

15

SCL

5

GND

16

GND

17

GND

SUYIN_070546FR015S293ZR

CONN@

1

C679

2

1

@

1

C684

2

2.2P_0402_50V8C

R678

4.7K_0402_5%

1 2

1

C690

@

470P_0402_50V8J

2

D29

2

1

C685

2

2.2P_0402_50V8C

PESD5V0U2BT_SOT23-3

D D

L18

PCH_CRT_R<27>

PCH_CRT_G<27>

PCH_CRT_B<27>

12

R671

R672

150_0402_1%

C C

PCH_CRT_DATA<27>

PCH_CRT_CLK<27>

33P_0402_50V8K

1

C850

@

2

PCH_CRT_R

PCH_CRT_G

PCH_CRT_B

1

12

R670

150_0402_1%

1

@

33P_0402_50V8K

2

1

12

C849

C681

C680

2

150_0402_1%

PCH_CRT_DATA CRT_DDC_DAT

C682

2

2.2P_0402_50V8C

2.2P_0402_50V8C

+3VS

5

4

2N7002DW-T/R7_SOT363-6

1 2

NBQ100505T-800Y_0402

L19

1 2

NBQ100505T-800Y_0402

L20

1 2

NBQ100505T-800Y_0402

1

2

2.2P_0402_50V8C

R677

2

Q157A

2N7002DW-T/R7_SOT363-6

61

3

Q157B

470P_0402_50V8J

C689

@

C683

+CRT_VCC

4.7K_0402_5%

1 2

1

2

1

@

D30

PESD5V0U2BT_SOT23-3

3

2

3

CRT_R_L

CRT_G_L

CRT_B_L

1

2

2.2P_0402_50V8C

CRT_DDC_CKPCH_CRT_CLK

T264 PAD

+CRT_VCC

T265 PAD

B B

1 2

C686

0.1U_0402_16V4Z

PCH_CRT_HSYNC<27>

PCH_CRT_VSYNC<27>

A A

5

PCH_CRT_HSYNC D_CRT_HSYNC

1 2

C851

0.1U_0402_16V4Z

PCH_CRT_VSYNC

+CRT_VCC

+CRT_VCC

R1436 10K_0402_5%

1

5

P

4

OE#

A2Y

G

U38

SN74AHCT1G125GW_SOT353-5

3

5

1

P

OE#

A2Y

G

SN74AHCT1G125GW_SOT353-5

3

4

4

D_CRT_VSYNC

U39

12

1 2

L21 10_0402_5%

1 2

L22 10_0402_5%

1

1

C688

@

C687

@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

2

10P_0402_50V8J

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

VSYNC

10P_0402_50V8J

HSYNC

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CRT

CRT

CRT

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

22 59Wednesday, November 23, 2011

22 59Wednesday, November 23, 2011

22 59Wednesday, November 23, 2011

1

0.1

0.1

0.1

5

4

3

2

1

+LCD_VDD

Q17A

12

12

R621
300_0603_5%

61

2

5

R1440
0_0402_5%

BKOFF#

1 2

1 2

1 2

R14410_0402_5% @

R103
33_0402_5%

R1421

10K_0402_5%

1

C958
180P_0402_50V8J

2

12

PCH_BL_PWM<27>

INVT_PWM<41>

D D

BKOFF#<41>

C C

LCD_BL_PWM

BKOFF#_R

2N7002DW-T/R7_SOT363-6

PCH_ENVDD<27>

R1379
0_0402_5%

+3VS

12

R627
100K_0402_5%

0.1U_0402_16V7K

3

4

1 2

R623 47K_0402_5%

Q17B

2N7002DW-T/R7_SOT363-6

0.01U_0402_25V7K

C908

C671

4.7U_0805_10V4Z

LCD/PANEL BD. Conn.

+5VS

12

TF@

R628
100K_0402_5%

1 2

R624 47K_0402_5%

13

CAMPWR_EN<41>

B B

CAMPWR_EN

R1422

10K_0402_5%

TF@

R1403 0_0402_5%TF@

12

12

D

2

G

S

C699

0.1U_0402_16V4Z

1

@

2

0.1U_0402_16V7K

TF@

CAMPWR_EN#

Q61

TF@

2N7002_SOT23-3

C909

TF@

+5VS

W=30mils

R1428 0_0603_5%

2

S

1

G

2

Q20
AO3413_SOT23

D

TF@

1 3

030@

12

W=30mils

+LVDS_CAM

Add on 7/27 for fn+f5 turn off camera.

R6 0_0402_5%

1 2

L4

USB20_P10<28>

USB20_N10<28>

A A

5

1

1

4

4

WCM-2012-900T_0805

1 2

R7 0_0402_5%

4

2

2

3

USB20_P10_R

@

3

USB20_N10_R

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Must close JLVDS pin 28、

DMIC_CLK

DMIC_DATA

1

C327

@

220P_0402_25V8J

USB20_P10_R
USB20_N10_R

3

2

PCH_TXOUT0+<27>
PCH_TXOUT0-<27>
PCH_TXOUT1+<27>
PCH_TXOUT1-<27>
PCH_TXOUT2+<27>
PCH_TXOUT2-<27>

PJDLC05_SOT23-3

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

1

@

2

+3VS

@

C328

220P_0402_25V8J

D14

、30

、

、

R1427 0_0603_5%

@

3

1

Compal Secret Data

Compal Secret Data

Compal Secret Data

C911
47P_0402_50V8J

1 2

12

USB20_P10_R
USB20_N10_R

PCH_TXOUT0+
PCH_TXOUT0­PCH_TXOUT1+
PCH_TXOUT1­PCH_TXOUT2+
PCH_TXOUT2-

DMIC_DATA_R

+LCD_INV
+LCD_INV
+LCD_INV

2

Deciphered Date

Deciphered Date

Deciphered Date

PCH_EDID_CLK
PCH_EDID_DATA

W=30mils

3
5
7

13
15
17
19
21
23
25
27
29

31
32

+3VS

2

G

1

2

2

1

C672

@

1

@

C758

100P_0402_50V8J

2

+LVDS_CAM

JP4

112

4

3
5

6
8

7
9910
111112

14

13

16

15

18

17

20

19
21

22
24

23
25

26

27

28

29

30

GND1
GND2

ACES_88242-3001

CONN@

2

S

Q18
AO3413_SOT23

D

1 3

W=60mils

1

2

1

@

C760

100P_0402_50V8J

2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

Vds=-20V
Id=-3A
Rds=130m ohm
Vgs=-4.5
Vth=-1

+LCD_VDD

1 2

0_0805_5%

1

C673

0.1U_0402_16V4Z

2

68P_0402_50V8J

PCH_TXCLK+
PCH_TXCLK-

PCH_EDID_CLK
PCH_EDID_DATA

1 2

CE_EN_R CE_EN
LCD_BL_PWM
BKOFF#_R

+LCDVDD_R

+LCDVDD_R

DMIC_CLK_R

R183
1K_0402_5%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

+LCDVDD_R

L24

1

C693

4.7U_0805_10V4Z

2

Close to JLVDS1

+LCD_INV B+

1.5A

1

C692

2

+LCDVDD_R

1

C678

0.1U_0402_16V4Z

2

L23

FBMA-L11-201209-221LMA30T_0805

1

C319

0.1U_0402_25V4K

2

Rated Current MAX:3000mA

12

@

R1401 0_0402_5%

@

R1402 0_0402_5%

PCH_TXCLK+ <27>

PCH_TXCLK- <27>

PCH_EDID_CLK <27>

PCH_EDID_DATA <27>

C399

0.1U_0402_16V4Z

C691

1

2

0.1U_0402_16V4Z

1

12

@

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

LVDS

LVDS

LVDS

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

DMIC_CLK

12

DMIC_DATA

DMIC_DATA_R

DMIC_CLK_R

CE_EN <29>

CE_EN: reserve for special panel,
controlled by PCH--Joyce 0921-2011

+3VS

R1191

100K_0402_5%

1

12

1

C400

@

680P_0402_50V7K

2

DMIC_DATA <38>

of

23 59Wednesday, November 23, 2011

of

23 59Wednesday, November 23, 2011

of

23 59Wednesday, November 23, 2011

DMIC_CLK <38>

0.1

0.1

0.1

5

HDMI Source Select

12

@

VGA_HDMI_TXC+<15>

VGA_HDMI_TXC-<15>

VGA_HDMI_TX0+<15>

VGA_HDMI_TX0-<15>

D D

VGA_HDMI_TX1+<15>

VGA_HDMI_TX1-<15>

VGA_HDMI_TX2+<15>

VGA_HDMI_TX2-<15>

PCH_HDMI_TXC+<27>

PCH_HDMI_TXC-<27>

PCH_HDMI_TX0+<27>

PCH_HDMI_TX0-<27>

PCH_HDMI_TX1+<27>

PCH_HDMI_TX1-<27>

PCH_HDMI_TX2+<27>

PCH_HDMI_TX2-<27>

C C

C4300.1U_0402_16V7K

12

C3780.1U_0402_16V7K

12

C4550.1U_0402_16V7K

12

C3770.1U_0402_16V7K

12

C3760.1U_0402_16V7K

12

C4340.1U_0402_16V7K

12

C4560.1U_0402_16V7K

12

C4320.1U_0402_16V7K

12

C4330.1U_0402_16V7K

12

C4010.1U_0402_16V7K

12

C4580.1U_0402_16V7K

12

C3920.1U_0402_16V7K

12

C4020.1U_0402_16V7K

12

C4350.1U_0402_16V7K

12

C4570.1U_0402_16V7K

12

C4360.1U_0402_16V7K

HDMI_CK+

@

HDMI_CK-

@

HDMI_D0+

@

HDMI_D0-

HDMI_D1+

@

@

HDMI_D1-

HDMI_D2+

@

HDMI_D2-

@

HDMI_CK+

HDMI_CK-

HDMI_D0+

HDMI_D0-

HDMI_D1+

HDMI_D1-

HDMI_D2+

HDMI_D2-

VGA Video Chanel

DISO and OPT Channel

Internal Graphic Video Chanel

UMAO Channel

4

HDMI_CK+

HDMI_CK-

HDMI_D0+

HDMI_D0-

HDMI_D1+

HDMI_D1-

HDMI_D2+

HDMI_D2-

3

1 2

@

0_0402_5%

WCM-2012-121T_0805

4

4

1

1

L9

1 2

@

0_0402_5%

1 2

@

0_0402_5%

WCM-2012-121T_0805

4

4

1

1

L10

1 2

@

0_0402_5%

1 2

@

0_0402_5%

WCM-2012-121T_0805

4

4

1

1

L11

1 2

@

0_0402_5%

@

1 2

0_0402_5%

WCM-2012-121T_0805

4

4

1

1

L12

1 2

@

0_0402_5%

R164

3

2

R166

R167

3

2

R172

R173

3

2

R176

R177

3

2

R178

3

2

3

2

3

2

3

2

HDMI_R_CK+

HDMI_R_CK-

HDMI_R_D0+

HDMI_R_D0-

HDMI_R_D1+

HDMI_R_D1-

HDMI_R_D2+

HDMI_R_D2-

HOT PLUG1

HDMI_L_HPD

100K_0402_5%

1 2

R439 0_0402_5%@

2

2N7002_SOT23-3

Q16

1 3

2

R573

C729

0.1U_0402_16V4Z

1

1 2

RV132

10K_0402_1%

12

@

1 2

R437 0_0402_5%

12

2

G

D

S

2

C730

@

0.1U_0402_16V4Z

1

L88

BLM18PG181SN1D_0603

@

VGA_HDMI_HPD <13>

+3VS

R1568
1M_0402_5%

1 2

R438 0_0402_5%

12

S

2N7002E-T1-GE3_SOT23-3

G

2

@

D34

1

BAV99_SOT23-3

13

D

Q65

1

PCH_HDMI_HPD <27>

3

+HDMI_5V_OUT

2

HDMI_HPDHDMI_L_HPD

DGPU_HPD_INT# <29>

EVT mount chock, DVT mount resistor

HDMI Connector

B B

D53RB161M-20_SOD123-2

HDMI_HPD

+HDMI_5V_OUT

HDMI_SDATA
HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

2 1

+5VS +HDMI_5V_OUT

A A

+5VS_HDMI

19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

5

40mil

1.1A_6V_MINISMDC110F-2
F2

2 1

JHDMI

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CK­CK_shield
CK+
D0­D0_shield
D0+
D1­D1_shield
D1+
D2­D2_shield
D2+

LOTES_ABA-HDM-029-P01

CONN@

GND
GND
GND
GND

20
21
22
23

1

C250

0.1U_0402_16V4Z

2

HDMI_R_CK+

HDMI_R_CK-

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D2+

HDMI_R_D2-

+5VS

4

if use VGA_HDMI,
R690~R697 should be 499ohm+/-1%.

1 2

R690 680 +-5% 0402

1 2

R691 680 +-5% 0402

1 2

R692 680 +-5% 0402

1 2

R693 680 +-5% 0402

1 2

R694 680 +-5% 0402

1 2

R695 680 +-5% 0402

1 2

R696 680 +-5% 0402

1 2

R697 680 +-5% 0402

1 2

R698 100K_0402_5%

1

C266

2

0.1U_0402_16V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

G

13

D

Q2
2N7002_SOT23-3

S

Compal Secret Data

Compal Secret Data

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Compal Secret Data

EDID SELECT

Deciphered Date

Deciphered Date

Deciphered Date

+3VS_DGPU+3VS

1 2

@

R443 0_0402_5%

1 2

R434 0_0402_5%

3 1

Q183

2

2

3 1

SGD

BSH111_SOT23-3

HDMI_R_DATA HDMI_SDATA

HDMI_R_CLK

HDMI_R_DATA

+HDMI_5V_OUT

12

12

R1329

2

2.2K_0402_5%

SGD

1 2

@

R432 0_0402_5%

1 2

@

R435 0_0402_5%

1 2

R433 0_0402_5%

1 2

R436 0_0402_5%

R1328

2.2K_0402_5%

Q182

BSH111_SOT23-3

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

HDMI_SCLKHDMI_R_CLK

VGA_HDMI_CLK <15>

VGA_HDMI_DATA <15>

PCH_HDMI_CLK <27>

PCH_HDMI_DATA <27>

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

HDMI Connector

HDMI Connector

HDMI Connector

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

24 59Wednesday, November 23, 2011

24 59Wednesday, November 23, 2011

24 59Wednesday, November 23, 2011

1

0.1

0.1

0.1

5

4

3

2

1

12

C204 15P_0402_50V8J

12

32.768KHZ_12.5PF_CM31532768DZFT

C205 15P_0402_50V8J

D D

far away hot spot

Y2

12

PCH_RTCX1

12

R94

PCH_RTCX2

10M_0402_5%

JCMOS & JME1 place near DIMM

+3VS

G

2

Q10
BSS138_NL_SOT23-3

13

D

1 2

1 2

PCH_SPI_CS#<33>

PCH_SPI_CS1#<33>

PCH_SPI_MOSI<33>

@

CMOS

@

JCOMS
SHORT PADS

1 2

@

JME1
SHORT PADS

ME CMOS

PCH_SPKR<38>

AZ_SDIN0_HD<38>

T1512 PAD

T1513 PAD

T1514 PAD

T1515 PAD

PCH_SPI_CLK<33>

PCH_SPI_MISO<33>

HDA_SYNC

R1880_0402_5%

+RTCVCC

ME_EN from EC.
Please place close to RH29 aviod the branch.

HDA_SDO<41>

AZ_BITCLK_HD<38>

AZ_RST_HD#<38>

AZ_SDOUT_HD<38>

C C

PCH_SPKR

HDA_SDO

ME debug mode , this signal has a weak internal PD

L=>security measures defined in the Flash
Descriptor will be in effect (default)

H=>Flash Descriptor Security will be overridden

HDA_SDOUT

B B

AZ_SYNC_HD<38>

R180 0_0402_5%

R101 33_0402_5%

R106 33_0402_5%

R108 33_0402_5%

R1299 1K_0402_5%@

LOW=Default
HIGH=No Reboot

*

R182 1K_0402_5%@

Low = Disabled

*

High = Enabled

R145 33_0402_5%

1 2

1 2

1 2

1 2

HDA_BIT_CLK

+3VALW_PCH

AZ_SYNC_HD_R

1M_0402_5%

1U_0603_10V4Z

1 2

R97 20K_0402_5%

R98 20K_0402_5%

1U_0603_10V4Z

HDA_SDOUT

HDA_RST#

HDA_SDOUT

+3VS

12

R418

C206

C207

S

Intel recommend

HDA_SYNC

This signal has a weak internal pull-down
On Die PLL VR is supplied by

A A

1.5V when smapled high

1.8V when sampled low
Needs to be pulled High for Chief River platfrom

HDA_SYNC

R181 1K_0402_5%

5

+3VALW_PCH

Integrated SUS 1.05V VRM Enable

PCH_INTVRMEN

+RTCVCC

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

PCH_SPKR

HDA_RST#

AZ_SDIN0_HD

HDA_SDOUT

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

High - Enable Internal VRs
(must be always pulled high)

1 2

R95

1 2

R96

PCH_SPI_CLK

PCH_SPI_CS#

PCH_SPI_CS1#

PCH_SPI_MOSI

PCH_SPI_MISO

+3VALW +3VALW+3VALW

4

1M_0402_5%

330K_0402_5%

UPCH1A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

PANTHER-POINT_FCBGA989

12

RH38

XDP@

200_0402_5%

12

RH44

XDP@

100_0402_1%

RH50

Intel DPDG Rev1.2 requirement.

SM_INTRUDER#

PCH_INTVRMEN

PCH_INTVRMEN

RH37 330K_0402_5%@

LPC

RTCIHDA

SATA

JTAG

SPI

SATA0GP / GPIO21

SATA1GP / GPIO19

SATA1GP/GPIO19: Integrated 20K pull up.

12

RH39

XDP@

200_0402_5%

PCH_JTAG_TMSPCH_JTAG_TDO PCH_JTAG_TDI

12

RH45

XDP@

100_0402_1%

12

51_0402_5%

PCH_JTAG_TCK

XDP@

INTVRMEN: check list Rev1.5 P63, P64 error

C38

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN

SATA0TXP

SATA1RXN
SATA1RXP

SATA 6G

SATA1TXN

SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN

SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN

SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN

SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

12

RH40

XDP@

200_0402_5%

12

RH47

XDP@

100_0402_1%

LPC_AD0

A38

LPC_AD1

B37

LPC_AD2

C37

LPC_AD3

D36

LPC_FRAME#

E36
K36

V5

AM3

SATA_PRX_C_DTX_N0

AM1

SATA_PRX_C_DTX_P0

AP7

SATA_PTX_DRX_N0

AP5

SATA_PTX_DRX_P0

AM10
AM8
AP11
AP10

AD7

SATA_PRX_C_DTX_N2

AD5

SATA_PRX_C_DTX_P2

AH5

SATA_PTX_DRX_N2

AH4

SATA_PTX_DRX_P2

AB8
AB10
AF3
AF1

Y7

SATA_PRX_C_DTX_N4

Y5

SATA_PRX_C_DTX_P4

AD3

SATA_PTX_DRX_N4

AD1

SATA_PTX_DRX_P4

Y3
Y1
AB3
AB1

Y11

Y10

AB12

AB13

AH1

P3

SATA_LED#

V14

PCH_GPIO21

P1

BBS_BIT0_R

12

R99 10K_0402_5%

SATA_PRX_C_DTX_N0 <34>
SATA_PRX_C_DTX_P0 <34>
SATA_PTX_DRX_N0 <34>
SATA_PTX_DRX_P0 <34>

SATA_COMP

R1202 37.4_0402_1%

1 2

SATA3_COMP

RH42 49.9_0402_1%

RBIAS_SATA3

RH46 750_0402_1%

SATA_LED# <43>

SATA0GP / GPIO21: Serial ATA 0 General Purpose.
This is an input pin which can be configured as an
interlock switch corresponding to SATA Port 0.
When used as an interlock switch status indication,

s signal should be drive to

thi
that
the switch is closed and to
the switch is open.
If interlock switches are not required,
this pin can be configured as
GPIO21.

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

LPC_AD0 <34,41,44>
LPC_AD1 <34,41,44>
LPC_AD2 <34,41,44>
LPC_AD3 <34,41,44>

LPC_FRAME# <34,41,44>

+3VS

SERIRQ <34,41,44>

SATA_PRX_C_DTX_N2 <34>
SATA_PRX_C_DTX_P2 <34>
SATA_PTX_DRX_N2 <34>
SATA_PTX_DRX_P2 <34>

SATA_PRX_C_DTX_N4 <43>
SATA_PRX_C_DTX_P4 <43>
SATA_PTX_DRX_N4 <43>
SATA_PTX_DRX_P4 <43>

+1.05VS_VCC_SATA

+1.05VS_SATA3

HDD

ODD

E-Sata

+3VS

SATA_LED#

BBS_BIT0_R

PCH_GPIO21

＆0＊

＆1＊

to indicate that

to indicate

R113 10K_0402_5%

R208 4.7K_0402_5%@

R205 10K_0402_5%

12

@

12

R207
10K_0402_5%

SATA1GP/GPIO19: Boot BIOS Strap bit 0 (BBS0)

GNT1#/GPIO51: Boot BIOS Strap bit 1 (BBS1)

Bit 11
(BBS1)

GPIO19 => BBS_BIT0
GPIO51 => BBS_BIT1

Boot BIOS Strap

0

1

0

PCH EDS Rev1.5 P99, P98

Compal Secret Data

Compal Secret Data

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Bit 10
(BBS0)

1

0

1

0

Place near PCH

+RTCVCC

W=20mils

C363

0.1U_0402_16V4Z

Boot BIOS
Destination

Reserved

PCI

SPI1

*

LPC

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

W=20mils

1

2

1 2

R1300 1K_0402_5%

1

D2
BAS40-04_SOT23-3

2

3

+RTCBATT

+CHGRTC

Compal Electronics, Inc.

PCH (1/8) SATA,HDA,SPI, LPC

PCH (1/8) SATA,HDA,SPI, LPC

PCH (1/8) SATA,HDA,SPI, LPC

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

1

25 59Wednesday, November 23, 2011

25 59Wednesday, November 23, 2011

25 59Wednesday, November 23, 2011

0.1

0.1

0.1

of

of

of

5

D D

LAN

WLAN

Express Card

WWAN

Card Reader

C C

+3VALW_PCH

1 2

@

R1523 10K_0402_5%

1 2

R1521 10K_0402_5%

1 2

R1527 10K_0402_5%

1 2

R1530 10K_0402_5%

1 2

R1531 10K_0402_5%

1 2

R1522 10K_0402_5%

1 2

R1529 10K_0402_5%

R1217 10K_0402_5%

B B

+3VS

1 2

R1520 10K_0402_5%

1 2

R1532 10K_0402_5%

A A

PEG_CLKREQ#_R

for safe

12

12

RN72

@

2.2K_0402_5%

CLK_REQ_CARD#

PCH_GPIO46

CLKREQ_LAN#

PEG_CLKREQ#_R

CLKREQ_R_WWAN#

PCH_GPIO44

PCH_GPIO45

PCH_GPIO56

CLKREQ_WLAN#

CLKREQ_EXPCARD#

RN192 0_0402_5%OPT@

RN193 0_0402_5%

2

G

1 3

D

1 2

RN188 0_0402_5%@

5

WLAN

Express Card

Card Reader

1 2

1 2

@

Add RN192,RN193 5/12

QN4

OPT@

SSM3K7002F_SC59-3

1 2

RN71 0_0402_5%OPT@

S

12

RN73

@

2.2K_0402_5%

PCIE_PRX_C_LANTX_N1<35,42>
PCIE_PRX_C_LANTX_P1<35,42>
PCIE_PTX_C_LANRX_N1<35,42>
PCIE_PTX_C_LANRX_P1<35,42>

PCIE_PRX_WLANTX_N2<36>
PCIE_PRX_WLANTX_P2<36>
PCIE_PTX_C_WLANRX_N2<36>
PCIE_PTX_C_WLANRX_P2<36>

PCIE_PRX_C_EXPTX_N3<39>
PCIE_PRX_C_EXPTX_P3<39>
PCIE_PTX_C_EXPRX_N3<39>
PCIE_PTX_C_EXPRX_P3<39>

PCIE_PRX_C_WWANTX_N5<36>
PCIE_PRX_C_WWANTX_P5<36>
PCIE_PTX_C_WWANRX_N5<36>
PCIE_PTX_C_WWANRX_P5<36>

PCIE_PRX_C_CARDTX_N6<37>
PCIE_PRX_C_CARDTX_P6<37>
PCIE_PTX_C_CARDRX_N6<37>
PCIE_PTX_C_CARDRX_P6<37>

WWAN

LAN

CLK_LAN#<35,42>
CLK_LAN<35,42>

CLKREQ_LAN#<35,42>

CLK_WLAN#<36>
CLK_WLAN<36>

CLKREQ_WLAN#<36>

CLK_PCIE_EXPCARD#<39>
CLK_PCIE_EXPCARD<39>

CLKREQ_EXPCARD#<39>

CLK_PCIE_READER#<37>

CLK_PCIE_READER<37>

CLK_WWAN#<36>
CLK_WWAN<36>

CLKREQ_WWAN#<36>

CLK_RES_ITP#<8>
CLK_RES_ITP<8>

1 2

C217 0.1U_0402_16V7K

1 2

C218 0.1U_0402_16V7K

1 2

C215 0.1U_0402_16V7K

1 2

C216 0.1U_0402_16V7K

1 2

C391 0.1U_0402_16V7K

1 2

C386 0.1U_0402_16V7K

1 2

C385 0.1U_0402_16V7K

1 2

C384 0.1U_0402_16V7K

1 2

C404 0.1U_0402_16V7K

1 2

C403 0.1U_0402_16V7K

1 2

R1213 0_0402_5%

1 2

R1214 0_0402_5%

1 2

R140 0_0402_5%

1 2

R1212 0_0402_5%

1 2

R1227 0_0402_5%

1 2

R1228 0_0402_5%

1 2

R264 0_0402_5%

1 2

R260 0_0402_5%

1 2

R255 10K_0402_5%

1 2

R144 0_0402_5%

1 2

R1220 0_0402_5%

1 2

R1226 0_0402_5%

RH108 0_0402_5%@
RH109 0_0402_5%@

DGPU_PWR_EN <28,45,57>

VGA_PWROK <13,29,45,57>

Pull high @ VGA side

PEG_CLKREQ# <13>

4

PCIE_PTX_LANRX_N1
PCIE_PTX_LANRX_P1

PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2

PCIE_PTX_EXPRX_N3
PCIE_PTX_EXPRX_P3

PCIE_PTX_WWANRX_N5
PCIE_PTX_WWANRX_P5

PCIE_PTX_CARDRX_N6
PCIE_PTX_CARDRX_P6

CLK_R_LAN#
CLK_R_LAN

CLKREQ_LAN#

CLK_R_WLAN#
CLK_R_WLAN

CLKREQ_WLAN#

CLK_R_CARD#
CLK_R_CARD

CLKREQ_EXPCARD#

CLK_CARD#
CLK_CARD

CLK_REQ_CARD#

CLK_R_WWAN#
CLK_R_WWAN

CLKREQ_R_WWAN#

PCH_GPIO44

PCH_GPIO56

PCH_GPIO45

CLK_BCLK_ITP#
CLK_BCLK_ITP

4

PCH_GPIO46

UPCH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

PANTHER-POINT_FCBGA989

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

CLOCKS

3

E12

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

Link

FLEX CLOCKS

CL_RST1#

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLKOUT_DMI_P

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_GND1_N
CLKIN_GND1_P

CLKIN_DOT_96N
CLKIN_DOT_96P

CLKIN_SATA_N
CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PCH_GPIO11

H14

PCH_SMBCLK

C9

PCH_SMBDATA

A12

DRAMRST_CNTRL_PCH

C8

PCH_SMLCLK0

G12

PCH_SMLDATA0

C13

PCH_HOT#

E14

PCH_SMLCLK1

M16

PCH_SMLDATA1

M7

CL_CLK_DMC

R219 2.2K_0402_5%

T11

CL_DATA_DMC

R222 2.2K_0402_5%

P10

CL_RST#_DMC

R223 10K_0402_5%

M10

PEG_CLKREQ#_R

AB37

CLK_VGA#

AB38

AV22
AU22

AM12
AM13

BF18
BE18

BJ30
BG30

G24
E24

AK7
AK5

K45

H45

V47
V49

Y47

K43

F47

H47

K49

T15, T16 reserve 27M_CLK and 27M_SSC for VGA.
we have crystal at VGA side.

0_0402_5%
0_0402_5%

CLK_VGA

CLK_CPU_DMI#
CLK_CPU_DMI

CLK_DP#
CLK_DP

PCH_CLK_DMI#
PCH_CLK_DMI

CLKIN_DMI2#
CLKIN_DMI2

CLK_DOT#
CLK_DOT

CLK_SATA#
CLK_SATA

CLK_14M_PCH

CLK_PCILOOP

PCH_X1
PCH_X2

XCLK_RCOMP

CLK_FLEX1

CLK_FLEX2

DGPU_PRSNT#

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

DRAMRST_CNTRL_PCH <7,10>

PCH_HOT# <41>

To EC SM BUS 2

1 2

@

1 2

@

1 2

@

R253

12
12

R254

CLK_CPU_DMI# <6>
CLK_CPU_DMI <6>

T13 PAD

@

T14 PAD

@

CLK_PCILOOP <28>

1 2

R1221 90.9_0402_1%

@

1 2

R257 0_0402_5%

1 2

R258 0_0402_5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

PCH_SMLCLK0 <42>

PCH_SMLDATA0 <42>

add port to EC--Joyce

CL_CLK_DMC <36>

CL_DATA_DMC <36>

CL_RST#_DMC <36>

VGA

CLK_PCIE_VGA# <13>
CLK_PCIE_VGA <13>

+1.05VS_VCCDIFFCLKN

T15 PAD

@

CLK_SIO_48M <44>

Deciphered Date

Deciphered Date

Deciphered Date

2

+5VALW_PCH

+3VS

UMA@

OPT@

+3VALW_PCH

PM_SMBCLK<11,12,36,39>

PM_SMBDATA<11,12,36,39>

+3VS

R1533
10K_0402_5%

1 2

R1534
10K_0402_5%

1 2

PCH_GPIO11

DRAMRST_CNTRL_PCH

PCH_HOT#

PCH_SMBCLK

PCH_SMBDATA

PCH_SMLCLK0

PCH_SMLDATA0

PCH_CLK_DMI#
PCH_CLK_DMI

CLKIN_DMI2#
CLKIN_DMI2

CLK_DOT#
CLK_DOT

CLK_SATA#
CLK_SATA

CLK_14M_PCH

If use extenal CLK gen, please place close to
CLK gen, else, please place close to PCH

CLK_14M_PCH

CLK_PCILOOP

1 2

R1207 10K_0402_5%

1 2

R1319 1K_0402_5%

1 2

R1320 10K_0402_5%

R1322 2.2K_0402_5%

R1222 2.2K_0402_5%

R1224 2.2K_0402_5%

R1229 2.2K_0402_5%

1 2

RH92 10K_0402_5%

1 2

RH90 10K_0402_5%

1 2

RH91 10K_0402_5%

1 2

RH89 10K_0402_5%

1 2

RH76 10K_0402_5%

1 2

RH77 10K_0402_5%

1 2

RH78 10K_0402_5%

1 2

RH79 10K_0402_5%

1 2

RH183 10K_0402_5%

R265

@

33_0402_5%

12

R269

@

33_0402_5%

12

Reserve for EMI please close to UPCH1

R130

2.2K_0402_5%

R1206

2.2K_0402_5%

2N7002DW T/R7_SOT-363-6

12

PCH_SMLCLK1

+3VS

12

PCH_SMLDATA1 EC_SMB_DA2

2N7002DW T/R7_SOT-363-6

2N7002DW T/R7_SOT-363-6

PM_SMBCLK

12

R12084.7K_0402_5%

12

R12094.7K_0402_5%

PM_SMBDATA

2N7002DW T/R7_SOT-363-6

C869

Q4A

6 1

2

5

3

Q4B

Q3A

2

+3VS

5

4

Q3B

Y3

1

1

GND

15P_0402_50V8J

2

1

25MHZ_20PF_7V25000016

2

EC_SMB_CK2

4

61

R1225 0_0402_5%

3

R1223 0_0402_5%

R12161M_0402_5%

3

GND

4

C225

FROM CLK GEN FOR: 133/100/96/14.318 MHZ

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

PCH (2/8) PCIE, SMBUS, CLK

PCH (2/8) PCIE, SMBUS, CLK

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

1

12

12

12

12

@

22P_0402_50V8J

@

22P_0402_50V8J

1 2

1 2

3

12P_0402_50V8J

1

2

1

+3VALW_PCH

+3VALW_PCH

C368

1 2

C367

1 2

EC_SMB_CK2 <13,41>

EC_SMB_DA2 <13,41>

PCH_SMBCLK

PCH_SMBDATA

PCH_X1

PCH_X2

26 59Wednesday, November 23, 2011

26 59Wednesday, November 23, 2011

26 59Wednesday, November 23, 2011

0.1

0.1

0.1

5

4

3

2

1

UPCH1C

SUSACK#

SYS_RST#

PM_PWROK

PCH_GPIO72

RI#

+3VALW_PCH

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

PANTHER-POINT_FCBGA989

SYSTEM_PWROK <6>

12

R1255
10K_0402_5%

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

SLP_LAN# / GPIO29

󴡢

support deep S4 /S5:

"SUSWARN#'

SUSWARN# /SUSPWRDNACK/ GPIO30 (Mobile Only):
Used by Intel@ME as either SUSWARN#
in Deep S4/S5 state supported platforms
or as SUSPWRDNACK in non Deep S4/S5
state supported platforms.

4

DMI_CTX_PRX_N0<5>
DMI_CTX_PRX_N1<5>
DMI_CTX_PRX_N2<5>
DMI_CTX_PRX_N3<5>

DMI_CTX_PRX_P0<5>

RH118 0_0402_5%

SUSWARN#<41>

PBTN_OUT#<41>

ACIN<13,41,48>

C953 180P_0402_50V8J@

PCH_GPIO72

RI#

EC_SWI#

AC_PRESENT_R

SUSWARN#_R

SLP_R_LAN#

PCH_RSMRST#_R

PM_PWROK

DMI_CTX_PRX_P1<5>
DMI_CTX_PRX_P2<5>
DMI_CTX_PRX_P3<5>

DMI_CRX_PTX_N0<5>
DMI_CRX_PTX_N1<5>
DMI_CRX_PTX_N2<5>
DMI_CRX_PTX_N3<5>

DMI_CRX_PTX_P0<5>
DMI_CRX_PTX_P1<5>
DMI_CRX_PTX_P2<5>
DMI_CRX_PTX_P3<5>

+1.05VS_PCH

R1236 49.9_0402_1%

RH112 750_0402_1%

4mil width and place
within 500mil of the PCH

+3VS

R35 10K_0402_5%

VPRO@

1 2

PCH_RSMRST# PCH_RSMRST#_R

R291 0_0402_5%

RH137 0_0402_5%

CH751H-40PT_SOD323-2

12

R13140_0402_5%

PM_PWROK

TC7SH08FU(TE85L,F)

12

VGATE

R1251 10K_0402_5%

R1252 10K_0402_5%

R279 10K_0402_5%

R1244 330K_0402_5%

R1243 10K_0402_5%

R282 10K_0402_5%

R1257 10K_0402_5%

R1256 10K_0402_5%

5

D D

C C

PCH_APWROK<41>

PM_DRAM_PWRGD<6>

PCH_RSMRST#<41>

SUSACK# SUSWARN#

RH135 0_0402_5%@

B B

VGATE<54>

PM_PWROK<41>

A A

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

DMI_IRCOMP

RBIAS_CPY

SYSTEM_PWROK

8111E@

RH120 0_0402_5%

PM_DRAM_PWRGD

R2

0_0402_5%

1 2

SUSWARN#_R

D12

1

2

PBTN_OUT#_R

21

AC_PRESENT_R

+3VS

5

U12

P

IN1

4

SYSTEM_PWROK

O

IN2

G

3

R282 unmount for Vpro SKUs.

BJ14

FDI_RXN0

AY14

FDI_RXN1

BE14

FDI_RXN2

BH13

FDI_RXN3

BC12

FDI_RXN4

BJ12

FDI_RXN5

BG10

FDI_RXN6

BG9

FDI_RXN7

BG14

FDI_RXP0

BB14

FDI_RXP1

BF14

FDI_RXP2

BG13

FDI_RXP3

BE12

FDI_RXP4

BG12

FDI_RXP5

BJ10

FDI_RXP6

BH9

FDI_RXP7

AW16

FDI_INT

AV12

FDI_FSYNC0

BC10

FDI_FSYNC1

AV14

FDI_LSYNC0

BB10

FDI_LSYNC1

DSWVRMEN

󰫕󰏬󰩒󱁨󱌏

DSWVRMEN: must be always pulled-up to VCCRTC. --PCH EDS

A18

non Deep S4/S5: tied "DPWROK"to RSMRST#.

E22

DPWROK

B9

WAKE#

N3

G8

N14

D10

H4

SLP_S4#

F4

SLP_S3#

G10

SLP_A#

G16

SLP_SUS#

AP14

PMSYNCH

K14

Check EC for S3 S4 LED

"SUSPWRDNACK"

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWODVREN

EC_SWI#

PM_CLKRUN#

SUS_STAT#

SUSCLK

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

SLP_R_A#

H_PM_SYNC

SLP_R_LAN#

FDI_CTX_PRX_N0 <5>
FDI_CTX_PRX_N1 <5>
FDI_CTX_PRX_N2 <5>
FDI_CTX_PRX_N3 <5>
FDI_CTX_PRX_N4 <5>
FDI_CTX_PRX_N5 <5>
FDI_CTX_PRX_N6 <5>
FDI_CTX_PRX_N7 <5>

FDI_CTX_PRX_P0 <5>
FDI_CTX_PRX_P1 <5>
FDI_CTX_PRX_P2 <5>
FDI_CTX_PRX_P3 <5>
FDI_CTX_PRX_P4 <5>
FDI_CTX_PRX_P5 <5>
FDI_CTX_PRX_P6 <5>
FDI_CTX_PRX_P7 <5>

FDI_INT <5>

FDI_FSYNC0 <5>

FDI_FSYNC1 <5>

FDI_LSYNC0 <5>

FDI_LSYNC1 <5>

PM_CLKRUN# <34,44>

RH119 0_0402_5%

1 2

VPRO@

T21PAD

1 2

VPRO@

PCH_RSMRST#_RPCH_DPWROK

EC_SWI# <35,36,39>

SUS_STAT# <34>

12

T18

T19

T20

T22PAD

H_PM_SYNC <6>

PM_CLKRUN#

RH113 0_0402_5%

RH116 0_0402_5%

RH117 0_0402_5%

SUSCLK_R <41>

PM_SLP_S5# <41>

PM_SLP_S4# <41>

PM_SLP_S3# <41>

SLP_A# <41>

SLP_LAN# <41>

1 2

1 2
@

DSWODVREN

*

Can be left NC when IAMT is
not support on the platfrom

R284

R283

3

Pull high at LVDS conn side.

PCH_ENVDD<23>

PCH_BL_PWM<23>

PCH_EDID_CLK<23>

PCH_EDID_DATA<23>

RH244 2.37K_0402_1%

RH290 0_0402_5%

PCH_TXCLK-<23>
PCH_TXCLK+<23>

PCH_TXOUT0-<23>
PCH_TXOUT1-<23>
PCH_TXOUT2-<23>

PCH_TXOUT0+<23>
PCH_TXOUT1+<23>
PCH_TXOUT2+<23>

+RTCVCC

RH127 330K_0402_5%

RH129 330K_0402_5%@

DSWODVREN - On Die DSW VR Enable



Enable

H
LDisable

PCH_CRT_B<22>
PCH_CRT_G<22>
PCH_CRT_R<22>

PCH_CRT_CLK<22>

PCH_CRT_DATA<22>

PCH_CRT_HSYNC<22>
PCH_CRT_VSYNC<22>

+3VS

8.2K_0402_5%

10K_0402_5%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

PCH_ENBKL

PCH_EDID_CLK
PCH_EDID_DATA

CTRL_CLK
CTRL_DATA

12

LVDS_IBG

12

PCH_TXCLK­PCH_TXCLK+

PCH_TXOUT0­PCH_TXOUT1­PCH_TXOUT2-

PCH_TXOUT0+
PCH_TXOUT1+
PCH_TXOUT2+

PCH_CRT_B
PCH_CRT_G
PCH_CRT_R

PCH_CRT_CLK
PCH_CRT_DATA

PCH_CRT_HSYNC
PCH_CRT_VSYNC

CRT_IREF

R1250

1K_0402_0.5%

+3VS +3VS

R301 2.2K_0402_5%

R302 2.2K_0402_5%

R304 2.2K_0402_5%

R305 2.2K_0402_5%

R1438 4.7K_0402_5%

R1620 100K_0402_5%

PCH_ENBKL<41>

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

AM47

AM49

1 2

1 2

1 2

1 2

1 2

1 2

M45

AF37
AF36

AE48
AE47

AK39
AK40

AN48

AK47
AJ48

AN47

AK49
AJ47

AF40
AF39

AH45
AH47
AF49
AF45

AH43
AH49
AF47
AF43

M40

M47
M49

2

J47

P45

T40
K47

T45
P39

N48
P49
T49

T39

T43
T42

UPCH1D

L_BKLTEN
L_VDD_EN

L_BKLTCTL

L_DDC_CLK
L_DDC_DATA

L_CTRL_CLK
L_CTRL_DATA

LVD_IBG
LVD_VBG

LVD_VREFH
LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

DAC_IREF
CRT_IRTN

PANTHER-POINT_FCBGA989

1 2

PCH_ENBKL

R300
100K_0402_5%

LVDS

CRT

CTRL_CLK

CTRL_DATA

PCH_EDID_CLK

PCH_EDID_DATA

PCH_BL_PWM

PCH_ENVDD

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

AP43
AP45

AM42
AM40

AP39

SDVO_INTN

AP40

SDVO_INTP

P38
M39

AT49

DDPB_AUXN

AT47

DDPB_AUXP

AT40

DDPB_HPD

AV42

DDPB_0N

AV40

DDPB_0P

AV45

DDPB_1N

AV46

DDPB_1P

AU48

DDPB_2N

AU47

DDPB_2P

AV47

DDPB_3N

AV49

DDPB_3P

P46
P42

AP47

DDPC_AUXN

AP49

DDPC_AUXP

AT38

DDPC_HPD

AY47

DDPC_0N

AY49

DDPC_0P

AY43

DDPC_1N

AY45

DDPC_1P

BA47

DDPC_2N

BA48

DDPC_2P

BB47

DDPC_3N

BB49

DDPC_3P

M43
M36

AT45

DDPD_AUXN

AT43

DDPD_AUXP

BH41

DDPD_HPD

BB43

DDPD_0N

BB45

DDPD_0P

BF44

DDPD_1N

BE44

DDPD_1P

BF42

DDPD_2N

BE42

DDPD_2P

BJ42

DDPD_3N

BG42

DDPD_3P

1 2

RH291 2.2K_0402_5%

1 2

RH292 2.2K_0402_5%

1 2

RH131 150_0402_1%

1 2

RH132 150_0402_1%

1 2

RH133 150_0402_1%

Title

Title

Title

PCH (3/8) DMI,FDI,PM,GFX,DP

PCH (3/8) DMI,FDI,PM,GFX,DP

PCH (3/8) DMI,FDI,PM,GFX,DP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

Date: Sheet

Date: Sheet

Date: Sheet

+3VS

R1334

2.2K_0402_5%

PCH_HDMI_HPD

PCH_HDMI_TX2­PCH_HDMI_TX2+
PCH_HDMI_TX1­PCH_HDMI_TX1+
PCH_HDMI_TX0­PCH_HDMI_TX0+
PCH_HDMI_TXC­PCH_HDMI_TXC+

R1235 100K_0402_5%

1 2

@

100K_0402_5%

R1475

@

Compal Electronics, Inc.

12

12

12

1

R1335

2.2K_0402_5%

100K_0402_5%

PCH_HDMI_CLK <24>
PCH_HDMI_DATA <24>

12

RH142

PCH_HDMI_HPD <24>

PCH_HDMI_TX2- <24>
PCH_HDMI_TX2+ <24>
PCH_HDMI_TX1- <24>
PCH_HDMI_TX1+ <24>
PCH_HDMI_TX0- <24>
PCH_HDMI_TX0+ <24>
PCH_HDMI_TXC- <24>
PCH_HDMI_TXC+ <24>

PCH_CRT_CLK

PCH_CRT_DATA

PCH_CRT_B

PCH_CRT_G

PCH_CRT_R

of

of

of

27 59Wednesday, November 23, 2011

27 59Wednesday, November 23, 2011

27 59Wednesday, November 23, 2011

0.1

0.1

0.1

5

+3VS

RP1

18

D D

DEL RP5, ADD R316,R317,R318 FOR REMOVE
GPIO53 PU---0609

C C

B B

A A

27
36
45

8.2K_0804_8P4R_5%

RP3

18
27
36
45

8.2K_0804_8P4R_5%

1 2

@

R319 8.2K_0402_5%

1 2

R316 8.2K_0402_5%

1 2

R317 8.2K_0402_5%

1 2

R318 8.2K_0402_5%

1 2

1 2

R311 8.2K_0402_5%

12

@

R127710K_0402_5%

DGPU_PWR_EN<26,45,57>

BUF_PLT_RST#

100K_0402_5%

DGPU_HOLD_RST#

CLK_PCI_EC<41>
CLK_PCILOOP<26>
CLK_PCI_SIO<44>
CLK_PCI_TPM<34>

R157

PCH_GPIO55
PCH_GPIO51
PCH_GPIO52
PCI_PIRQA#

PCH_GPIO2
PCH_GPIO4
PCH_GPIO53
PCI_PIRQC#

DGPU_HOLD_RST#_R

PCI_PIRQB#

ODD_DA#

DGPU_PWR_EN_R

PCH_GPIO5

PCI_PIRQD#

DGPU_PWR_EN

DGPU_HOLD_RST#

PLT_RST#<6,34,35,36,37,39,41,42,44>

1 2

R413
1K_0402_5%

OPT@

1 2

5

USB3.0 Port0

OPT@

R262 0_0402_5%

1 2

OPT@

R161 0_0402_5%

PLT_RST#

+3VS

5

U8

1

P

IN1

O

2

IN2

G

TC7SH08FU(TE85L,F)

3

+3VS_DGPU

U20

5

OPT@

1

P

IN1

O

2

IN2

G

TC7SH08FU(TE85L,F)

3

12

ODD_DA#<34>

R259 0_0402_5%

4

2

C477

0.1U_0402_16V4Z

1

OPT@

4

R261 0_0402_5%OPT@

USB3_RX0_N<40>

USB3_RX0_P<40>

@

R28022_0402_5%
R28122_0402_5%
R28522_0402_5%
R28622_0402_5%

R151

100K_0402_5%

1 2

12

USB3_TX0_N<40>

USB3_TX0_P<40>

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

DGPU_HOLD_RST#_R
PCH_GPIO52
DGPU_PWR_EN_R

PCH_GPIO51
PCH_GPIO53
PCH_GPIO55

PCH_GPIO2
ODD_DA#
PCH_GPIO4
PCH_GPIO5

12

BUF_PLT_RST#

12

CLK_PCI_EC_R

12

CLK_PCI

12

CLK_SIO

12

CLK_TPM

PLT_RST#

100K_0402_5%

OPT@

+3VS_DGPU

R165

BG26

BJ26

BH25

BJ16

BG16

AH38
AH37
AK43
AK45

C18
N30

H3

AH12

AM4
AM5

Y13
K24

L24
AB46
AB45

B21

M20

AY16

BG46

BE28
BC30
BE32

BJ32
BC28
BE30
BF32

BG32

AV26
BB26
AU28
AY30
AU26
AY26
AV28

AW30

K40
K38
H38

G38

C46
C44
E40

D47
E42
F46

G42
G40

C42
D44

K10

C6

H49
H43
J48
K42
H40

PANTHER-POINT_FCBGA989

12

RV49
10K_0402_5%

@

1 2

4

UPCH1E

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20

TP21
TP22
TP23
TP24

USB3Rn1
USB3Rn2
USB3Rn3
USB3Rn4
USB3Rp1
USB3Rp2
USB3Rp3
USB3Rp4
USB3Tn1
USB3Tn2
USB3Tn3
USB3Tn4
USB3Tp1
USB3Tp2
USB3Tp3
USB3Tp4

PIRQA#
PIRQB#
PIRQC#
PIRQD#

REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

PME#

PLTRST#

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

PLTRST_VGA# <13>

4

RSVD

PCI

USB

RSVD1
RSVD2
RSVD3
RSVD4

RSVD5
RSVD6

RSVD7
RSVD8

RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

RSVD23
RSVD24

RSVD25

RSVD26
RSVD27

RSVD28
RSVD29

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

3

AY7
AV7
AU3
BG4

AT10
BC8

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5

NV_ALE

AV10

AT8

AY5
BA2

AT12
BF3

C24

USB20_N0

A24

USB20_P0

C25

USB20_N1

B25

USB20_P1

C26

USB20_N2

A26

USB20_P2

K28

USB20_N3

H28

USB20_P3

E28

USB20_N4

D28

USB20_P4

C28
A28
C29
B29
N28

USB port 6,7 are disabled on HM76 and HM75.

M28
L30

USB20_N8

K30

USB20_P8

G30

USB20_N9

E30

USB20_P9

C30

USB20_N10

A30

USB20_P10

L32

USB20_N11

K32

USB20_P11

G32

USB20_N12

E32

USB20_P12

C32

USB20_N13

A32

USB20_P13

C33

USBRBIAS

B33

A14

USB_OC0#

K20

USB_OC1#

B17

USB_OC2#

C16

USB_OC3#

L16

USB_OC4#

A16

PCH_GPIO9

D14

PCH_GPIO10

C14

CP_PE#

USB20_N0 <40>
USB20_P0 <40>
USB20_N1 <43>
USB20_P1 <43>
USB20_N2 <39>
USB20_P2 <39>
USB20_N3 <44>
USB20_P3 <44>
USB20_N4 <44>
USB20_P4 <44>

USB20_N8 <39>

USB20_P8 <39>
USB20_N9 <43>
USB20_P9 <43>
USB20_N10 <23>
USB20_P10 <23>

USB20_N11 <40>

USB20_P11 <40>

USB20_N12 <36>

USB20_P12 <36>
USB20_N13 <36>
USB20_P13 <36>

Within 500 mils

RH165 22.6_0402_1%

USB_OC0# <40>
USB_OC1# <44>

USB_OC4# <40,43>

CP_PE# <39>

3

2

SATA1GP/GPIO19: Boot BIOS Strap bit 0 (BBS0)

GNT1#/GPIO51: Boot BIOS Strap bit 1 (BBS1)

GPIO19 => BBS_BIT0
GPIO51 => BBS_BIT1

Boot BIOS Strap

Bit 11
(BBS1)

0

1

0

PCH EDS Rev1.5 P99, P98

USB30

L-CONN

Smart Card

R-CONN

R-CONN

New Card

USB port with Esata

Int. Camera

Finger Printer

WWAN

BT

For USB3.0, Left USB.
For Right power USB port

For USB port with eSATA.

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Bit 10
(BBS0)

1

0

1

0

Deciphered Date

Deciphered Date

Deciphered Date

Boot BIOS
Destination

Reserved

PCI

SPI1

*

LPC

2

USB_OC3#

USB_OC4#

USB_OC2#

USB_OC0#

USB_OC1#

CP_PE#

PCH_GPIO9

PCH_GPIO10

1

Intel Anti-Theft Techonlogy

High=Endabled

NV_ALE

Low=Disable(floating)

NV_ALE

RH164 1K_0402_5%@R310 8.2K_0402_5%

+3VALW_PCH

1 2

R1270 10K_0402_5%

1 2

R1271 10K_0402_5%

1 2

R1268 10K_0402_5%

1 2

R1267 10K_0402_5%

1 2

R1269 10K_0402_5%

1 2

@

R1306 10K_0402_5%

1 2

R1307 10K_0402_5%

1 2

R1308 10K_0402_5%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (4/8) PCI, USB, NVRAM

PCH (4/8) PCI, USB, NVRAM

PCH (4/8) PCI, USB, NVRAM

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

*

+1.8VS

1

0.1

0.1

28 59Wednesday, November 23, 2011

28 59Wednesday, November 23, 2011

28 59Wednesday, November 23, 2011

0.1

5

4

3

2

1

+3VALW_PCH

D D

C C

B B

1 2

1 2

+3VS

1 2

1 2

1 2

R34 200K_0402_5%

1 2

R36 200K_0402_5%

1 2

1 2

PCH_GPIO27 (Have internal Pull-High)
High: VCCVRM VR Enable
Low: VCCVRM VR Disable

Can be configured as wake input to allow wakes from
Deep Sleep.
If not used then use 8.2-kΩ to 10-kΩ pull-down to
GND.

R328 10K_0402_5%

GPIO28

On-Die PLL Voltage Regulator
This signal has a weak internal pull up

H：On-Die voltage regulator enable

*

L

：

R325 1K_0402_5%@

QAL50/51, PBL22: GPIO24 NC

@

12

PCH_GPIO24

R133210K_0402_5%

12

LID_SW#_R

R133010K_0402_5%

12

EC_SMI#

R6110K_0402_5%

12

PM_LANPHY_ENABLE

R128410K_0402_5%

PCH_GPIO28

R33710K_0402_5%

PCH_GPIO57

R33810K_0402_5%

12

R132510K_0402_5%

R132310K_0402_5%

R127410K_0402_5%

R127810K_0402_5%

R33910K_0402_5%

R35210K_0402_5%

R128010K_0402_5%

R128610K_0402_5%

R132410K_0402_5%

R129610K_0402_5%

R132610K_0402_5%

R35610K_0402_5%

R35510K_0402_5%

1 2

PCH_GPIO0

12

PCH_GPIO1

12

12

12

12

12

12

12

KB_RST#

VGA_PWROK_R

PCH_GPIO22

CR_WAKE#

CR_PE#

ODD_DETECT#

DGPU_HPD_INT#

WWAN_R_OFF#

CE_EN

EC_SCI#

PCH_GPIO39

PCH_GPIO48

WL_R_OFF#

@

@

WWAN_R_OFF#

R36510K_0402_5%

12

PCH_GPIO35

R127510K_0402_5%

*

1 2

@

On-Die PLL Voltage Regulator disa ble

1 2

PCH_GPIO27

PCH_GPIO28PCH_GPIO28PCH_GPIO28PCH_GPIO28

KEEP LOW XXMS ACTIVE,
NOT TAKE ACTIVE ON
RISE/FALL EDGE

VGA_PWROK<13,26,45,57>

WWAN_OFF#<36,41>

WL_OFF#<36,41>

DGPU_HPD_INT#<24>

PM_LANPHY_ENABLE<42>

ODD_DETECT#<34>

EC_SCI#<41>

EC_SMI#<41>

R147 0_0402_5%

CR_PE#<37>

1 2

RH170 0_0402_5%

CR_WAKE#<37>

1 2

RH167 0_0402_5%@

CE_EN<23>

1 2

RH166 0_0402_5%@

UPCH1F

PCH_GPIO0 ODD_EN#

PCH_GPIO1

DGPU_HPD_INT#

EC_SCI#

EC_SMI#

PM_LANPHY_ENABLE

12

LID_SW#_R

CR_PE#

VGA_PWROK_R

PCH_GPIO22

PCH_GPIO24

PCH_GPIO27

PCH_GPIO28

CR_WAKE#

PCH_GPIO35

ODD_DETECT#

WWAN_R_OFF#

CE_EN

PCH_GPIO39

PCH_GPIO48

WL_R_OFF#

PCH_GPIO57

T1911PAD @

T1913PAD @

T1927PAD @

T1929PAD @

T1931PAD @

T1933PAD @

PCH_GPIO28 needs to be connected to XDP_FN8
PCH_GPIO35 needs to be connected to XDP_FN9
PCH_GPIO15 needs to be connected to XDP_FN16

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

PANTHER-POINT_FCBGA989

GPIO

NCTF

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

PROCPWRGD

CPU/MISC

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

A20GATE

PECI

RCIN#

THRMTRIP#

INIT3_3V#

DF_TVS

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

C40

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

Please refer to Huron River Debug Board DG 1.2

PROJECT_ID0

PROJECT_ID1

PROJECT_ID2

GATEA20

PCH_PECI_R

PCH_THRMTRIP#

NV_CLE

T1908 PAD@

T1912 PAD@

T1914 PAD@

T1916 PAD@

T1926 PAD@

T1930 PAD@

1 2

R1259

10K_0402_5%

1 2

KB_RST# <41>

H_CPUPWRGD <6>

1 2

R1261 390_0402_5%

RH1590_0402_5% @

12

R128710K_0402_5%

+3VS

H_THERMTRIP#

+3VS

ODD_EN# <34>

GATEA20 <41>LID_SW_OUT#<41>

H_PECI <6,41>

INIT3_3V

This signal has weak internal
PU, can't pull low

H_THERMTRIP# <6>

DMI Termination Voltage

Set to Vcc when HIGH

NV_CLE

Set to Vss when LOW

Weak internal
PU,Do not pull low

NV_CLE

RH187

2.2K_0402_5%

12

RH1891K_0402_5%

+1.8VS

12

CLOSE TO THE BRANCHING POINT

PROJECT_ID2

PROJECT_ID2

PROJECT_ID0

PROJECT_ID1

1 2

R1279 10K_0402_5%

1 2

R1276 10K_0402_5%@

1 2

OPT@

1 2

UMA@

1 2

NM@

1 2

TF@

R33310K_0402_5%

R37010K_0402_5%

R40910K_0402_5%

R40810K_0402_5%

PROJECT_ID2 PROJECT_ID1 PROJECT_ID0

QAQ10 (UMA)

QAQ11 (Optimus)

0

0

QAQ12 (UMA) 0 0

0

0

1

QAQ13 (Optimus) 0 1

QAT10 (UMA) 0

QAQ11 (Optimus)

For TongFang: QAQ10 (UMA) / QAQ11 (Optimus)
For 030: QAQ12 (UMA) / QAQ13 (Optimus)

1

1

0

No Vpro-project code

H_SNB_IVB# <6>

+3VS

0

1

1

0

1

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PCH (5/8) GPIO, CPU, MISC

PCH (5/8) GPIO, CPU, MISC

PCH (5/8) GPIO, CPU, MISC

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

1

29 59Wednesday, November 23, 2011

29 59Wednesday, November 23, 2011

29 59Wednesday, November 23, 2011

0.1

0.1

0.1

5

+1.05VS_PCH

C246

1U_0402_6.3V6K

C245

10U_0603_6.3V6M

1

1

2

D D

+1.05VS_PCH

+1.05VS_PCH

RH210 0_0603_5%

+1.05VS_PCH

C C

PAD-OPEN 3x3m

+1.05VS_PCH

B B

@

0_0603_5%

@

PJPH1

@

+3VS

R367

1U_0402_6.3V6K

+VCCAPLLEXP_R

12

R369

0_0805_5%

1 2

12

C265

@

2

R357 0_0603_5%

10U_0603_6.3V6M

1

2

LH3

@

1 2

1UH_LB2012T1R0M_20%

+1.05VS_VCC_EXP

C269

1U_0402_6.3V6K

C256

1

2

+3VS_VCCA3GBG

1

C270

0.1U_0402_10V7K

2

Place C265 Near BG6 pin

1

+1.05VS_PCH

2

12

C258

1U_0402_6.3V6K

1

2

1 2

0_0805_5%

+VCCP_VCCDMI

C244

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

2

2

+1.05VS_VCCDPLLEXP

+VCCAPLLEXP

1

@

2

CH41

10U_0805_6.3V6M

C267

1U_0402_6.3V6K

1

1

2

2

+VCCAFDI_VRM

+1.05VS_VCCAPLL_FDI

R364

+1.05VS_VCCDPLL_FDI

C247

C264

1U_0402_6.3V6K

4

UPCH1G

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

PANTHER-POINT_FCBGA989

Intel recommand
VCCVRM==>1.5V FOR MOBILE

POWER

1300mA

VCC CORE

3709mA

VCCIO

FDI

1mA

CRTLVDS

1mA

VCCTX_LVDS[1]

VCCTX_LVDS[2]

40mA

VCCTX_LVDS[3]

VCCTX_LVDS[4]

75mA

DMI

VCCDFTERM[1]

2mA

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

DFT / SPI HVCMOS

10mA

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCSPI

+VCCADAC

U48

U47

AK36

+VCCALVDS

AK37

AM37

+VCCTX_LVDS

AM38

AP36

AP37

V33

+3VS_VCC3_3_6

V34

AT16

AT20

+VCCP_VCCDMI

AB36

+1.05VS_VCC_DMI_CCI

AG16

AG17

AJ16

AJ17

V1

+3V_VCCPSPI

C268

1U_0402_6.3V6K

3

1

C271

C309

2

0.01U_0402_16V7K

1 2

R423 0_0805_5%

1

C310

0.01U_0402_16V7K

2

1

C254

0.1U_0402_10V7K

2

+VCCAFDI_VRM

1

C262
1U_0402_6.3V6K

2

1

C263

0.1U_0402_10V7K

2

R362
0_0805_5%

1 2

VPRO@

1

1 2

8111E@

R414
0_0805_5%

2

1

2

+VCCAFDI_VRM

1

C308

2

0.1U_0402_10V7K

+3VS

1

C366

0.01U_0402_16V7K

2

R363

1 2

0_0805_5%

+VCCP_VCCDMI

R359
0_0805_5%

1 2

+VCCPNAND +1.8VS

+3V_M

+3VS

1

C249

2

10U_0603_6.3V6M

0.1UH_MLF1608DR10KT_10%_1608

1

C311
22U_0805_6.3V6M

2

+3VS

R366
0_0603_5%

1 2

+1.05VS_PCH

R360
0_0805_5%

1 2

L5

MBK1608221YZF_2P

10U_0603_6.3V6M

12

L6

12

0.1uH inductor, 200mA

+1.5VS

R361
0_0805_5%

1 2

1

C255
1U_0402_6.3V6K

2

2

+3VS

+1.8VS

+1.05VS_PCH

1

PCH Power Rail Table
Refer to PCH EDS R1.5

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05/1.0

3.3

3.3

1.05

1.05

1.05

1.1

S0 Iccmax
Current (A)

0.002

5

5

0.001

0.001

0.178

0.063

0.075

0.075

1.73

0.047

1.05VccIO 3.799

1.05VccASW 0.803

3.3VccSPI 0.01

3.3VccDSW 0.001

1.8 0.002VccDFTERM

3.3VccRTC N/A

3.3VccSus3_3

3.3VccSusHDA

0.065

0.01

VccVRM 1.5 0.147

1.05VccCLKDMI

0.075

VccSSC 1.05 0.095

VccDIFFCLKN 1.05 0.050

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.04

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2012/12/31

2011/09/23 2012/12/31

2011/09/23 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (6/8) PWR

PCH (6/8) PWR

PCH (6/8) PWR

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

1

0.1

0.1

30 59Wednesday, November 23, 2011

30 59Wednesday, November 23, 2011

30 59Wednesday, November 23, 2011

0.1

5

@

386

R

_5%

0_0805

2

1

+

3VS

L

7

012T100MR_20%

10UH_LB2

2

1

D

DcpSus and DcpSusByp do not require Decoupling.
Stuffing Decoupling Caps may cause voltage
oscillations, when Internal 1.05 Voltage
Regulator is used. By CPET

S

hort J6 When No VPRO

1.05VM_PCH

+

C

1.05VS_P

CH

+

+

CH

1.05VS_P

B

CH

1.05VS_P

+

+

1.05VS_P

CH

+1.05VM_PCH

A

6

J

1

@

PAD-OPEN

2x2m

16

L

10UH_LB2012T100MR_20%

1

1

L

14

10UH_LB

2012T100MR_20%

399

R

0_0603

_5%

2

R

417

_5%

0_0603

2

R

416

0_0603

_5%

2

@

398

R

_5%

0_0603

2

1

2

1.05VS_P

+

2

1

1

1

1

10U_0603_6.3V6M

C273

3VS_VCC_

+

+

1.05VS_PCH

1

2

1

2

1

2

1

2

2

2

C
1U_040

C
1U_040

C
1U_040

C
1U_040

CH

VCCDIFFC

+

315

+1.05VS_V

318

+

317

+

1.05VM_V

316

1.05VS_S

CLKF33

1

+

2

2_6.3V6K

2_6.3V6K

2_6.3V6K

2_6.3V6K

1

220U_B

C
286

2_2.5VM_R35

LK

CCDIFFCLKN

CCSUS

1

2

SCVCC

1U_040

2_6.3V6K

@

0_0805

+

1

2

C
278

R

372

1.05VS_V

1U_040

C

+

1.05VS_V

288

2_6.3V6K

1.05VS_V

+

2

_5%

3VALW

+

+

3VALW_PC

H

S

tuff C277 will make

voltage leakage

+

CPY

VCCAPLL_

10U_06

1.05VM_P

+

CCA_A_DPL

C

220U_B

312

1

CCA_B_DPL

+

1

2_2.5VM_R35

2

2

CCDIFFCLKN

+

1.05VS_P

CH

@

10UH_LB2

1

1U_040

2_6.3V6K

C
289

+

0_0603

1

1.05VS_P

L

R

0_0603

1

1

R

@

0_0603

8

@

03_6.3V6M

CH

395

R

382

415

CH

_5%

2

2

_5%

012T100MR_20%

2

C

274

379

R

_5%

0_0805

1

0.1U_0

402_10V7K

0.1U_0

_5%

2

@

0_0603

2

1

+1.05VS_PCH

2

2

402_10V7K

4.7U_0

1

603_6.3V6K

2

100_04

100_04

LL_R

R373

0_0603_5%

2

@

2

1382

R
0_040

@

5VALW_PC

+

377

R

02_5%

02_5%

R
0_0603

2

+

R

1

392

_5%

1

1

14

Q

SOT23-3

AO3413_

S

3

1

G

2_5%

2

1

677

C

0.1U_0

402_16V4Z

2

@

+

3VALW_PC

H

1

2

2

1

1

2

5VS

+

3VS

2

1

381

1

2

389

@

R

0_0805

_5%

1.05VS_PCH

+

2

1

D

1

@

5

D
CH751H-4

PCH_V5RE

+

294

C

0.1U_0

D4
CH751H-4

1

C284

+

PCH_V5RE

1U_060

2

H

0PT_SOD323-2

603_25V7K

0.1U_0

+

5VALW_PC

1

402_10V7K

2

F_SUS

0PT_SOD323-2

F_RUN

3_10V6K

C

H

272

R388

20K_0402_5%

1

@

D

2

C

B

A

2_6.3V6K

SB

+

@

1

2

385

R

0_0603

2

291

1.05VS_S

VCCSATAP

2

2

2

2

R371

0_0603_5%

2

3V_VCCAU

2

02_6.3V6K

283

C
1U_040

_5%

402_10V7K

ATA3

CC_SATA

2

1.05VS_P

+

1

2

R383 0_060

BG

1

C298

402_10V7K

0.1U_0

2

2

R

378 0_060

0402_10V7K

2_6.3V4Z

1

3VS

+

LL

2

R391 0_080

1

C

300

2_6.3V6K

1U_040

2

1

1

1

1

2

_5%

_5%

_5%

_5%

1

2

380

R
0_0603

1

C

285

0.1U_0

2

1

C

0.1U_0

2

+

1.05VS_P

1

+1.05VM_PCH

CH

1

R

_5%

290

5_5%

3_5%

376

0_0603

3_5%

+

1

402_10V7K

402_10V7K

+

1.05VS_S

CH

3VALW_PC

R
0_0805

2

2

+

P

CH_PWR_E

+

3VALW_PC

H

1

_5%

3VALW_PC

+

CH

1.05VS_P

+

H

390

+

3VS

_5%

1

R

384

3VS

+

0_0603

_5%

1

ATA3

1

C

297

2_6.3V6K

1U_040

2

L

13

@

10UH_LB

2012T100MR_20%

1

1

C

@

296

03_6.3V6M

10U_06

2

P

lace C296 Near AK1 pin

3VALW_PC

H

H

R

387

0_0805_5%

2

5VALW

+

N#<45>

+

1.05VS_PCH

2

1

+

VCCSATAP

903mA

2

75mA

75mA

mA

3mA

]

]

I2

]

]

]

]

]

]

]

]

]

]

KN[1]

KN[2]

KN[3]

55mA

P

OWER

Miscellaneous

lock and
C

CPURTC

3

119mA

V

1mA

1mA

PCI/GPIO/LPC

SATA USB

MISC

10mA

HDA

CCIO[29]

V

V

CCIO[30]

V

V

VCCIO[33]

CCSUS3_3

V

CCSUS3_3

V

V

CCSUS3_3

CCSUS3_3

CCSUS3_3[6]

V

VCCIO[34]

5REF_SUS

V

CPSUS[4]

D

V

CCSUS3_3

V

CCSUS3_3

CCSUS3_3

V

V

CCSUS3_3

CCSUS3_3

V

V

CC3_3[1]

CC3_3[8

V

CC3_3[4]

V

VCC3_3[2]

V

V

V

V

V

CCAPLLSA

CCVRM[1]

V

V

VCCIO[3]

V

V

CCASW[22

CCASW[23

V

VCCASW[21

V

CCSUSHDA

CCIO[31]

CCIO[32]

V

5REF

CCIO[5]

CCIO[12]

CCIO[13]

CCIO[6]

CCIO[2]

CCIO[4]

N

26

P

26

28

P

T

27

T

29

T23

[7]

T24

[8]

V23

[9]

V24

[10]

P24

T26

26

M

A

N23

AN24

[1]

P34

N20

[2]

N22

[3]

P20

[4]

P22

[5]

A

A16

W

]

34

T

AJ2

AF

H13

A

A

H14

AF14

AK1

TA

A

F11

AC

AC17

AD

T21

]

V21

]

T19

]

32

P

+

+

PCH_V5RE

+

16

13

16

17

+

+

+VCCME_21

+

+1.05VS_V

1.05VS_V

+

PCH_V5RE

VCCA_USB

+

3V_VCCPS

+

3V_VCCPS

3VS_VCCP

+

3VS_VCCP

+

+

VCC3_3_2

VCCAFDI_VRM

+

+

1.05VS_V

VCCME_22

VCCME_23

VCCSUSHD

1

CCUSBCORE

2

1

+

C

287

0.1U_0

2

CCAUPLL

F_SUS

SUS

US

F_RUN

US

CORE

PCI

+VCCAFDI_VRM

CC_SATA

A

1

C

307

0.1U_0

2

3V_VCCPU

C

295

1U_040

402_10V7K

1

314 1U_04

C

C

H66 0.1U_

1

C

0.1U_0

2

+

+

1.05VS_V

+

R

393 0_0603

394 0_0603

R

396 0_0603

R

397 0_0603

R

402_16V4Z

4

R

374

_5%

1

VCCACLK

+

1

+

VCCPDSW

C

293

277

C

402_10V7K

0.1U_0

2

1

402_10V7K@

0.1U_0

2

PCH_VCCD

SW

+

3VS_VCC_

CLKF33

+

2

1

+

VCCAPLL_

CPY_PCH

3_5%

375 0_060

R

VCCDPLL_

+

1

+

VCCSUS1

C

276

@

1U_040

2_6.3V6K

2

CCASW

1.05VM_V

+

C

22U_08

1

22U_08

C

1

280

279

05_6.3V6M

05_6.3V6M

2

2

1U_040

C

1

281

C292

1U_0402_6.3V6K

1

2

C306

299

C

C

0.1U_0

1

301

402_10V7K

2

1

2

1

2

C

0.1U_0

1

302

402_10V7K

2

1U_040

1

2_6.3V6K

2

2_6.3V6K

2

VCCRTCEX

+

+

VRM

VCCAFDI_

+1.05VS_VCCA_A_DPL

+

CCA_B_DPL

1.05VS_V

VCCDIFFC

LK

+

CCDIFFCLKN

1.05VS_V

+

+

1.05VS_S

SCVCC

+

VCCSST

1.05VM_V

CCSUS

+

+

V_CPU_IO

C
303

RTCVCC

+

1U_040

1

2_6.3V6K

2

C
282

T

0.1U_0

C
304

1

402_10V7K

2

U

PCH1J

9

AD4

V

CCACLK

16

T

V

CCDSW3_3

V

12

CPSUSBYP

D

38

T

CC3_3[5]

V

BH23

CCAPLLDM

V

L29

A

V

CCIO[14]

A

L24

CPSUS[3]

D

CPY

A19

A

VCCASW[1]

A

A21

CCASW[2

V

AA24

CCASW[3]

V

AA26

VCCASW[4]

A27

A

V

CCASW[5]

A29

A

CCASW[6

V

A

A31

CCASW[7]

V

A

C26

V

CCASW[8]

AC27

CCASW[9]

V

AC29

V

CCASW[10

AC31

CCASW[11

V

AD29

VCCASW[12

AD31

CCASW[13

V

W21

V

CCASW[14

W23

CCASW[15

V

W24

V

CCASW[16

W26

CCASW[17

V

W29

VCCASW[18

W31

V

CCASW[19]

W33

CCASW[20

V

N16

CPRTC

D

49

Y

CCVRM[4]

V

D47

B

V

CCADPLLA

F47

B

CCADPLLB

V

AF17

CCIO[7]

V

AF33

V

CCDIFFCL

AF34

V

CCDIFFCL

AG34

CCDIFFCL

V

AG33

CCSSC

V

V16

95mA

D

CPSST

17

T

CPSUS[1]

D

19

V

CPSUS[2]

D

B

J8

_PROC_IO

V

A22

V

CCRTC

0.1U_0

C

C

313

305

1

HER-POINT_FCBGA989

PANT

@

402_10V7K

2

ecurity

Classification

S

S

ecurity

Classification

S

Classification

ecurity

I

te

ssued Da

ssued Date

I

ssued Da

te

I

T

T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

HIS SHEE

HIS SHEE

T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

T

HIS SHEE

T OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

T

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

011/09/23 2012/12/31

2

011/09/2

2

2

011/09/2

ompal Se

cret Data

C

C

ompal Se

cret Data

C

cret Data

ompal Se

3 2012/12/31

3 2012/12/31

D

eciphere

eciphered Date

D

eciphere

D

d Date

d Date

2

C

ompal Electr

itle

T

T

itle

Title

Size Document Number
Custom

QAQ10 LA-8581P M/B

te: Sheet

Da

te: Sheet

Da

Date: Sheet

Wednesday, November 23, 2011

1

onics, Inc.

31 60

31 60

31 60

Rev

Rev

Rev

0.1

o

f

f

o

of

1

ompal Electron

1

ics, Inc.

32 60

32 60

32 60

D

C

B

A

Rev

Rev

Rev

0.1

f

o

f

o

o

f

ret Data

ret Data

ret Data

V
V

V
V

V
V

V

V
V

V
VSS[274]
V

V
V

V
V

V
V
V

V
V

V
VSS[286]

V
V
V

V
V

V
VSS[294]
V

V
V

V
V

V
V
V

V
V

V
VSS[306]
V

V
V

V
V

V

Date

Date

Date

SS[259]

V
V

SS[260]

SS[261]

V

SS[262]

V
V

SS[263]

SS[264]
SS[265]

SS[266]
SS[267]

SS[268]
SS[269]

SS[270]

SS[271]
SS[272]

SS[273]

SS[275]

SS[276]
SS[277]

SS[278]
SS[279]

SS[280]
SS[281]
SS[282]

SS[283]
SS[284]

SS[285]

SS[287]

V

SS[288]
SS[289]
SS[290]

SS[291]
SS[292]

SS[293]

SS[295]

SS[296]
SS[297]

SS[298]
SS[299]

SS[300]
SS[301]
SS[302]

SS[303]
SS[304]

SS[305]

SS[307]

SS[308]
SS[309]

SS[310]
SS[311]

SS[312]
SS[313]

V
V

SS[314]

SS[315]

V
V

SS[316]

SS[317]

V

SS[318]

V
V

SS[319]

SS[320]

V
V

SS[321]

SS[322]

V
VSS[323]
V

SS[324]

SS[325]

V
V

SS[328]

SS[329]

V
V

SS[330]

VSS[331]
V

SS[333]

SS[334]

V
V

SS[335]

SS[337]

V
V

SS[338]

SS[340]

V

SS[342]

V
V

SS[343]

SS[344]

V
V

SS[345]

V

SS[346]

SS[347]

V
V

SS[348]

SS[349]

V
V

SS[350]

SS[351]

V
VSS[352]

2

H46
K18

K26

K39
K46

K7
L18

L2
L20

L26
L28
L36

L48
M12

P16
M18
M22

M24
M30

M32

M34

M38
M4
M42

M46
M8

N18
P30

N47

P11
P18
T33

P40
P43

P47
P7
R2

R48
T12

T31
T37

T4
W34
T46

T47
T8

V11
V17
V26

V27
V29

V31
V36

V39
V43
V7

W17
W19

W2
W27
W48

Y12
Y38

Y4
Y42
Y46

Y8
BG2

9

N24
AJ3

AD47
B43

0

BE1
BG4

1

G14
H16

T36

2

BG2
BG2

4

C22

3

AP1

M14

AP3
AP1

BE1

6

BC1

6

BG2

8

BJ2

8

C

T

itle

itle

T

itle

012/12/31

012/12/31

2

T

Size Document Number
Custom

QAQ10 LA-8581P M/B

e: Sheet

Dat

e: Sheet

Dat

Dat

e: Sheet

Wednesday, November 23, 2011

5

H5

U

PCH1H

SS[0]

V

D

C

B

A

5

AA17

AA2

AA33

AA3

AA34

AB11
AB14
AB39

AB4

AB43

AB5
AB7

AC19

AC2

AC21

AC24
AC33

AC34
AC48
AD10

AD11
AD12

AD13
AD19

AD24
AD26
AD27

AD33
AD34

AD36

AD38

AD37

AD39

AD4

AD40

AD42
AD43

AD45
AD46

AD8

AE2

AE3

AF10

AF12

AD14

AD16

AF16
AF19

AF24
AF26
AF27

AF29
AF31

AF38

AF4

AF42

AF46

AF5

AF7

AF8

AG19

AG2
AG31
AG48

AH11

AH3

AH36
AH39

AH40
AH42
AH46

AH7
AJ19

AJ21

AJ24

AJ33
AJ34
AK12

AK3

SS[1]

V
V

SS[2]

V

SS[4]

SS[3]

V

V

SS[5]

SS[6]

V

SS[7]

V
V

SS[8]

SS[9]

V
V

SS[10]

SS[11]

V
VSS[12]
V

SS[13]

SS[14]

V
V

SS[15]

SS[16]

V
V

SS[17]

SS[18]

V
VSS[19]
V

SS[20]

SS[21]

V
V

SS[22]

SS[23]

V
V

SS[24]

SS[25]

V

SS[26]

V
V

SS[27]

SS[28]

V
V

SS[29]

SS[30]

V

SS[32]

V

VSS[31]

V

SS[33]

SS[34]

V
V

SS[35]

SS[36]

V
V

SS[37]

SS[38]

V
VSS[39]

V

SS[40]

V

SS[41]

SS[42]

V

V

SS[43]

SS[44]

V

VSS[45]

V

SS[46]

SS[47]

V
V

SS[48]

SS[49]

V

SS[50]

V
V

SS[51]

SS[52]

V
V

SS[53]

SS[54]

V
VSS[55]
V

SS[56]

SS[57]

V

V

SS[58]

V

SS[59]

SS[60]

V
V

SS[61]

SS[62]

V
VSS[63]
V

SS[64]

SS[65]

V
V

SS[66]

SS[67]

V
V

SS[68]

SS[69]

V

SS[70]

V
V

SS[71]

SS[72]

V
V

SS[73]

SS[74]

V

SS[75]

V

SS[76]

V
VSS[77]
V

SS[78]

SS[79]

V

PANTH

ER-POINT_FCBGA989

@

4

4

V

SS[80]

SS[81]

V
V

SS[82]

SS[83]

V
VSS[84]
V

SS[85]

SS[86]

V
V

SS[87]

SS[88]

V
V

SS[89]

SS[90]

V

SS[91]

V
V

SS[92]

SS[93]

V

SS[94]

V

VSS[95]

V

SS[96]

SS[97]

V
VSS[98]
V

SS[99]

SS[100]

V

SS[101]

V

V

SS[102]

SS[103]

V
V

SS[104]

SS[105]

V
VSS[106]
V

SS[107]

SS[108]

V
V

SS[109]

SS[110]

V
V

SS[111]

SS[112]

V

SS[113]

V
V

SS[114]

V

SS[115]

SS[116]

V
V

SS[117]

SS[118]

V
VSS[119]

SS[120]

V

SS[121]

V
V

SS[122]

SS[123]

V
V

SS[124]

SS[125]

V
VSS[126]
V

SS[127]

SS[128]

V

SS[129]

V
V

SS[130]

V

SS[131]

SS[132]

V
V

SS[133]

SS[134]

V
VSS[135]
V

SS[136]

SS[137]

V
V

SS[138]

SS[139]

V
V

SS[140]

SS[141]

V

SS[142]

V
V

SS[143]

SS[144]

V
V

SS[145]

SS[146]

V
VSS[147]

SS[148]

V

SS[149]

V
V

SS[150]

SS[151]

V
V

SS[152]

SS[153]

V
VSS[154]
V

SS[155]

SS[156]

V
V

SS[157]

SS[158]

V

AK38

AK4
AK42

AK46
AK8
AL16

AL17
AL19

AL2
AL21

AL23
AL26
AL27

AL31

AL33

AL34

AL48

AM11
AM14
AM36

9

AM3

AM4

3

5

AM4

AM4

6

AM7

AN2

9

AN2
AN3

AN3

1

AP1

2

9

AP1

8

AP2

0

AP3
AP3

2

AP3

8

AP4

AP4

2
6

AP4

AP8
AR2

AR4

8
1

AT1

3

AT1

AT1

8

AT2

2

AT2

6
8

AT2

0

AT3

2

AT3

4

AT3
AT3

9

AT4

2

AT46
AT7

AU2

4
AU30
AV1

6

AV2

0

4

AV2

0

AV3

8

AV3

AV4
AV4

3
AV8

4

AW1
AW1

8

AW2
AW22

6

AW2

8

AW2
AW3

2

4

AW3
AW3

6

0

AW4
AW48
AV11

2

AY1

2

AY2

AY2

8

3

U

PCH1I

AY4

SS[159]

V

2

AY4

V

SS[160]

6

AY4

SS[161]

V

AY8

SS[162]

V

B11

V

SS[163]

B15

SS[164]

V

B19

V

SS[165]

B23

SS[166]

V

B27

VSS[167]

B31

V

SS[168]

B35

SS[169]

V

B39

F45

V

SS[170]

B7

SS[172]

V

SS[171]

V

BB1

2

V

SS[173]

6

BB1

SS[174]

V

0

BB2

SS[175]

V

2

BB2

V

SS[176]

BB2

4

SS[177]

V

8

BB2

V

SS[178]

0

BB3

SS[179]

V

8

BB3

VSS[180]

BB4

V

SS[181]

6

BB4

SS[182]

V

BC1

4

V

SS[183]

8

BC1

SS[184]

V

BC2

V

SS[185]

2

BC2

SS[186]

V

BC26

SS[187]

V

BC32

V

SS[188]

BC3

4

SS[189]

V

6

BC3

V

SS[190]

BC4

0

SS[191]

V

BC42

VSS[192]

BC4

8

V

SS[193]

BD4

6

SS[194]

V

BD5

V

SS[195]

2

BE2

SS[196]

V

6

BE2

V

SS[197]

0

BE4

SS[198]

V

BF1

0

SS[199]

V

BF1

2

V

SS[200]

6

BF1

SS[201]

V

BF20

V

SS[202]

2

BF2

SS[203]

V

BF24

VSS[204]

6

BF2

SS[205]

V

8

BF2

SS[206]

V

BD3

V

SS[207]

0

BF3

SS[208]

V

BF3

8

V

SS[209]

0

BF4

SS[210]

V

BF8

VSS[211]

7

BG1

V

SS[212]

1

BG2

SS[213]

V

BG3

3

V

SS[214]

4

BG4

SS[215]

V

BG8

VSS[216]

1

BH1

SS[217]

V

BH15

SS[218]

V

7

BH1

V

SS[219]

BH1

9

H10

SS[220]

V

VSS[221]

7

BH2

V

SS[222]

1

BH3

SS[223]

V

BH33

VSS[224]

BH3

5

V

SS[225]

BH3

9

SS[226]

V

BH4

3

V

SS[227]

BH7

SS[228]

V

D3

V

SS[229]

D12

SS[230]

V

D16

SS[231]

V

D18

V

SS[232]

D22

SS[233]

V

D24

V

SS[234]

D26

SS[235]

V

D30

VSS[236]

D32

D34

V

SS[237]

SS[238]

V

D38

VSS[239]

D42

V

SS[240]

D8

SS[241]

V

E18

V

SS[242]

E26

SS[243]

V

G18

V

SS[244]

G20

SS[245]

V

G26

VSS[246]

G28

V

SS[247]

G36

SS[248]

V

G48

V

SS[249]

H12

SS[250]

V

H18

V

SS[251]

H22

SS[252]

V

H24

V

SS[253]

H26

SS[254]

V

H30

V

SS[255]

H32

SS[256]

V

H34

VSS[257]

F3

SS[258]

V

PANTH

ER-POINT_FCBGA989

@

Security C

lassification

S

ecurity C

lassification

lassification

ecurity C

S

I

e

ssued Dat

ssued Dat

e

I

I

ssued Dat

e

T

HIS SHEET

OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

HIS SHEET

OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

T

T

HIS SHEET

OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

011/09/23 2012/12/31

2

2

011/09/23 2

011/09/23 2

2

Compal Sec

C

ompal Sec

ompal Sec

C

D

D

D

eciphered

eciphered

eciphered

5

4

3

2

1

SBIOS SPI Flash

U59

R4927

R4928

5

SI

6

SCLK

1

CS

7

HOLD

3

WP

8

VCC

MX25L3205AZMC-20G_SON8

PCH_SPI_MOSI<25>

D D

PCH_SPI_CLK<25>

PCH_SPI_CS#<25>

+3VS

+3V_M

PCH_SPI_MOSI SBIOS_SI

PCH_SPI_CLK

PCH_SPI_CS#

R405

0_0603_5%

12

8111E@

12

0_0603_5%

R411

VPRO@

12

R401 33_0402_5%

12

SBIOS_CLK

R402 33_0402_5%

1 2

4.7K_0402_5%

1 2

4.7K_0402_5%

C405

0.1U_0402_16V4Z

GND

2

SO

PCH_SPI_MISO_R

4

12

R403 33_0402_5%

PCH_SPI_MISO

PCH_SPI_MISO <25>

For EMI resuest.

12

C409

6P_0402_25V

C C

@

R419

@

10_0402_5%

C413
12P_0402_50V8J

SBIOS_CLK

U59:
Vpro--SA000039A00 8MB
non-Vpro--SA00003K80 4MB

BIOS SPI Flash (2MByte*1) For Win8

U60

WIN8@

12

PCH_SPI_MOSI

PCH_SPI_CLK

PCH_SPI_CS1#<25>

B B

PCH_SPI_CS1#

+3VS

WIN8@

33_0402_5%

WIN8@

33_0402_5%

R4932

4.7K_0402_5%
R4933

4.7K_0402_5%

C406

0.1U_0402_16V4Z

WIN8@

SBIOS_SI1

R404

12

SBIOS_CLK1

R406

1 2

WIN8@

1 2

WIN8@

5

SI

6

SCLK

1

CS

7

HOLD

3

WP

8

VCC

16M MX25L1606EM2I-12G SOP 8P ROM

P/N: SA000041N00

2

SBIOS_SO1 PCH_SPI_MISO

SO

4

GND

12

WIN8@

R407 33_0402_5%

For EMI resuest.

R420

@

C420

@

6P_0402_25V

@

C421 12P_0402_50V8J

A A

5

4

12

10_0402_5%

SBIOS_CLK1

Security Classification

Security Classification

Security Classification

2011/09/23 2011/12/30

2011/09/23 2011/12/30

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/09/23 2011/12/30

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

SBIOS/EC ROM

SBIOS/EC ROM

SBIOS/EC ROM

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Wednesday, November 23, 2011

1

33 59

33 59

33 59

0.1

0.1

0.1

5

SATA HDD Conn.

+5VS

D D

JHDD

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

C C

23

GND

24

GND

CONN@

GND

Reserved

GND

12V
12V
12V

5V

17
18
19
20
21
22

Place closely JP25 SATA CONN.

1.2A

1

C387
10U_0805_10V4Z

2

1

C388

0.1U_0402_16V4Z

2

SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0

1

C389

0.1U_0402_16V4Z

2

1 2

C512 0.01U_0402_25V7K

1 2

C513 0.01U_0402_25V7K

1 2

C410 0.01U_0402_25V7K

1 2

C412 0.01U_0402_25V7K

+5VS

SATA ODD Conn

+5VS_ODD

10U_0805_10V4Z

1

1

C952

C414

@

10U_0805_10V4Z

2

2

JODD

B B

SUYIN_127382FR013G109ZR_RV

CONN@

A A

GND

GND

GND

GND
GND

ODD_EN#<29>

13
12

A+

11

A-

10
9

B-

8

B+

7

6

DP

5

V5

4

V5

3

MD

2
1

470K_0402_5%

5

1

C415

10U_0805_10V4Z

2

Place component's closely ODD CONN.

SATA_PTX_C_DRX_P2
SATA_PTX_C_DRX_N2

SATA_PRX_DTX_N2
SATA_PRX_DTX_P2

ODD_DETECT#_R
+5VS_ODD

ODD_DA#_R

+VSB

R760

@

2

G

+5VS

1 2

ODD_EN

13

D

Q59
SSM3K7002FU_SC70-3

@

S

1

C416

@

1U_0402_6.3V4Z

2

C518 0.01U_0402_25V7K
C519 0.01U_0402_25V7K

C424 0.01U_0402_25V7K
C425 0.01U_0402_25V7K

CS27

1U_0402_6.3V6K

1

2

@

1

2

1 2
1 2

1 2
1 2

+5VS_ODD

R107

0_0805_5%

1 2

D

6

2
1

G

C417

0.1U_0402_16V4Z

3

1 2

12

12

S

45

Q55
SI3456BDV-T1-E3 1N TSOP6

@

1.5M_0402_5%

@

R7620_0402_5%

R7630_0402_5%

+5VS_ODD

R764

4

1

C390

0.1U_0402_16V4Z

2

1

C418

0.1U_0402_16V4Z

2

C818

0.1U_0402_16V4Z

1

@

2

4

SATA_PTX_DRX_P0 <25>

SATA_PTX_DRX_N0 <25>

SATA_PRX_C_DTX_N0 <25>
SATA_PRX_C_DTX_P0 <25>

SATA_PTX_DRX_P2 <25>
SATA_PTX_DRX_N2 <25>

SATA_PRX_C_DTX_N2 <25>

SATA_PRX_C_DTX_P2 <25>

ODD_DETECT# <29>

ODD_DA# <28>

3

2

TPM 1.2

+3VS +3VS_TPM

TPM@

1 2

R30 0_0603_5%

0.1U_0402_16V4Z

+3VALW +3VALW_TPM

TPM@

1 2

R49 0_0603_5%

0.1U_0402_16V4Z

LPC_AD0<25,41,44>
LPC_AD1<25,41,44>
LPC_AD2<25,41,44>
LPC_AD3<25,41,44>

CLK_PCI_TPM<28>
LPC_FRAME#<25,41,44>
PLT_RST#<6,28,35,36,37,39,41,42,44>
SERIRQ<25,41,44>

PM_CLKRUN#<27,44>

+3VS_TPM

IN_TPM:

if support physically access
the platform, connect the pin
to 3.3V.
If this feature is not used,
the pin can be left open (it
has an internal pull-down).

WB_TPM:

SERIRQ PU At Page29

GPIO_IF, GPX and PP are optional.
Leave them open if not used.

U37

S IC WPCT200AA0WG TSSOP 28P TPM

WB_TPM@

BOM
IN_TPM:IN_TPM@&TPM@
WB_TPM:WB_TPM@&TPM@

1 2

R773 0_0402_5%

R665 4.7K_0402_5%

IN_TPM@

For NON_TPM SKU Reserve

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C764

TPM@

1U_0402_6.3V4Z

2

1

C778

TPM@

1U_0402_6.3V4Z

2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

CLK_PCI_TPM
LPC_FRAME#
PLT_RST#
SERIRQ

12

@

PM_CLKRUN#_R
PP

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

1

C765

TPM@

10U_0805_10V4Z

2

1

C777

TPM@

2

+3VS_TPM

U37

26

LAD0

23

LAD1

20

LAD2

17

LAD3

21

LCLK

22

LFRAME#

16

LRESET#

27

SERIRQ

15

CLKRUN#

7

PP

R772

@

0_0402_5%

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

C419

TPM@

2

+3VALW_TPM

19

10

5

VSB

VDD24VDD

VDD

TESTB1/BADD

TPM
SLB 9635 TT 1.1

GND4GND11GND18GND

25

28

LPCPD#

9
8

TEST1

14

XTALO

13

XTALI

2

GPIO2

6

GPIO

1

NC

3

NC

12

NC

SLB-9635-TT-1.2_TSSOP28

IN_TPM@

2

SUS_STAT#_R
BADD
TPM_TEST1

TPM_XTALO_R
TPM_XTALI_R

1

1 2

PM_CLKRUN#_R

CLK_PCI_TPM

R669 10_0402_5%

EMI

BADD

R659 4.7K_0402_5%

BADD: IN_TPM PD, WB_TPM NC

Base I/O Address:

TEST:

R663 4.7K_0402_5%

TPM_TEST1

Default: Normal Mode, IN_TPM PD,
WB_TPM NC

WB_TPM@

R664 4.7K_0402_5%

12

@

1 2

IN_TPM@

1 2

@

IN_TPM:

WB_TPM:

Default:7EH-7FH

4.7K PD:EEH-EFH

1 2

@

R660 4.7K_0402_5%

1 2

IN_TPM@

R661 0_0402_5%

C768 15P_0402_50V8J

*0 = 02Eh

1 = 04Eh

@

4.7K PU: Test Mode

1 2

R727 4.7K_0402_5%

1 2

@

R726 0_0402_5%

IN_TPM@

1 2
1 2

R728 0_0402_5%
R729 0_0402_5%IN_TPM@

C766

TPM_XTALI

12

10M_0402_5%

R668

IN_TPM@

TPM_XTALO

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

15P_0402_50V8J

12

32.768KHZ_12.5PF_CM31532768DZFT
X3

IN_TPM@

C767
15P_0402_50V8J

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SATA-HDD/ODD

SATA-HDD/ODD

SATA-HDD/ODD

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

TPM_XTALO
TPM_XTALI

IN_TPM@

IN_TPM@

+3VS_TPM

SUS_STAT# <27>

1

34 59Wednesday, November 23, 2011

34 59Wednesday, November 23, 2011

34 59Wednesday, November 23, 2011

+3VS_TPM

12

+3VS_TPM

+3VS_TPM

of

0.1

0.1

0.1

A

IC function Part

PCIE_PRX_C_LANTX_P1<26,42>

PCIE_PRX_C_LANTX_N1<26,42>

PCIE_PTX_C_LANRX_P1<26,42>
PCIE_PTX_C_LANRX_N1<26,42>

CLKREQ_LAN#<26,42>

1 1

+3V_LAN

2 2

Crystal

27P_0402_50V8J

3 3

Transformer

4 4

Place CL34 colse
to LAN chip

@

1 2

RL3 100K_0402_5%

RTL8105E

Pin14

Pin15

Pin38

NC

NC 10K ohm PD

1K ohm Pull-high

+3V_LAN

RL4
0_0402_5%

ENSWREG

CL26

8111E@

LAN_MDI3­LAN_MDI3+

LAN_MDI2­LAN_MDI2+

LAN_MDI1­LAN_MDI1+

LAN_MDI0­LAN_MDI0+

8111E@

RL23
0_0402_5%

@

25MHZ_20PF_7V25000016

YL1

1

LAN_X1 LAN_X2

1

1

8111E@

2

1

CL34

0.1U_0402_25V4K

2

RTL8111E

NC

GND

2

UL5

1
2
3

4
5

7
8
9

10
11
12

NS892407 1G

A

3

GND

4

27P_0402_50V8J

TCT1

MCT1

TD1+

MX1+

TD1-

MX1-

TCT2

MCT2

TD2+

MX2+

TD2-6MX2-

TCT3

MCT3

TD3+

MX3+

TD3-

MX3-

TCT4

MCT4

TD4+

MX4+

TD4-

MX4-

1K_0402_1%

8111E@

15K_0402_5%

8111E@

LanWake O/D PU at Page31. Used
to reactivate PCIE slot's main
PWR rail and REF CLK

ISOLATEB used to isolate 8111E
from PCIE

CLKREQ O/D PU at PCH side

SMBDATA and GPO using EFuse
only without ASF function.

3

1

CL27

2

8111E@

CL39 1000P_0402_50V7K

24
23
22

CL40 1000P_0402_50V7K

21
20
19

CL41 1000P_0402_50V7K

18
17
16

CL42 1000P_0402_50V7K

15
14
13

8111E@

1 2

CL1 0.1U_0402_16V7K

8111E@

1 2

CL2 0.1U_0402_16V7K

RL20 0_0402_5%8111E@
RL24 0_0402_5%

8111E@

CLK_LAN<26,42>
CLK_LAN#<26,42>

+3VS

12

RL6

RL7

+3V_LAN

+3V_LAN

12

1 2

RL11 75_0402_1%

1 2

12

RL12 75_0402_1%

1 2

12

RL13 75_0402_1%

12

1 2

RL15 75_0402_1%

LAN_TX0+<42>
LAN_TX0-<42>
LAN_TX1+<42>
LAN_TX1-<42>
LAN_TX2+<42>
LAN_TX2-<42>
LAN_TX3+<42>
LAN_TX3-<42>

PLT_RST#<6,28,34,36,37,39,41,42,44>

EC_SWI#<27,36,39>

RL21 10K_0402_5%8111E@
RL22 1K_0402_5%

+LAN_VDDREG

CL11 close to pin42

1

CL11

0.1U_0402_16V4Z

2

8111E@

RJ45_MIDI3­RJ45_MIDI3+

RJ45_MIDI2­RJ45_MIDI2+

RJ45_MIDI1­RJ45_MIDI1+

RJ45_MIDI0­RJ45_MIDI0+

RJ45_GND

LAN_TX0+
LAN_TX0­LAN_TX1+
LAN_TX1­LAN_TX2+
LAN_TX2­LAN_TX3+
LAN_TX3-

B

PCIE_PRX_RTLANTX_P1

PCIE_PRX_RTLANTX_N1

PCIE_PTX_C_C_RTLANRX_P1
PCIE_PTX_C_C_RTLANRX_N1

CLKREQ_LAN#

PLT_RST#

CLK_LAN
CLK_LAN#

LAN_X1EC_SWI#

LAN_X2

EC_SWI#

ISOLATEB

12

1 2

8111E@

ENSWREG

1 2

RL5 2.49K_0402_1%

RL28 0_0402_5%VPRO@
RL29 0_0402_5%VPRO@
RL30 0_0402_5%VPRO@
RL31 0_0402_5%VPRO@
RL32 0_0402_5%VPRO@
RL33 0_0402_5%VPRO@
RL35 0_0402_5%VPRO@
RL34 0_0402_5%VPRO@

B

UL1

22

HSOP

23

HSON

17

HSIP

18

HSIN

16

CLKREQB

25

PERSTB

19

REFCLK_P

20

REFCLK_N

43

CKXTAL1

44

CKXTAL2

28

LANWAKEB

26

ISOLATEB

14

NC/SMBCLK

15

NC/SMBDATA

38

GPO/SMBALERT

33

ENSWREG

34

VDDREG

35

VDDREG

46

RSET

24

GND

49

PGND

RTL8111E-VL-CGT QFN 48P

LAN Conn.

LAN_1000_LED#<42>

LAN_10/100_ LED#<42>

LAN_ACT_LED#<42>

1

1

LAN_MDI0+
LAN_MDI0­LAN_MDI1+
LAN_MDI1­LAN_MDI2+
LAN_MDI2­LAN_MDI3+
LAN_MDI3-

8111E@

31

LED3/EEDO

37

LED1/EESK

40

LED0

30

EECS/SCL

32

EEDI/SDA

1

MDIP0

2

MDIN0

4

MDIP1

5

MDIN1

7

NC/MDIP2

8

NC/MDIN2

10

NC/MDIP3

11

NC/MDIN3

13

DVDD10

29

DVDD10

41

DVDD10

27

DVDD33

39

DVDD33

12

AVDD33

42

AVDD33

47

AVDD33

48

AVDD33

21

EVDD10

3

AVDD10

6

AVDD10

9

AVDD10

45

AVDD10

36

REGOUT

10/100_LINK_LED LAN_LINK#

RL36 0_0402_5%

@

L30ESDL5V0C3-2_SOT23-3

@

L30ESDL5V0C3-2_SOT23-3

8111E@

R1713 510_0402_5%

DL2

2

3

S DIO BAW56W SOT-323

VPRO@

DL4

2

3

Close to JLAN1.14

DL3

2

3

Close to JLAN1.13

C

10/100_LINK_LED
LAN_ACTIVITY#

RL2 10K_0402_5%
RL1 10K_0402_5%

8111E@
8111E@

LAN_MDI0+
LAN_MDI0­LAN_MDI1+
LAN_MDI1­LAN_MDI2+
LAN_MDI2­LAN_MDI3+
LAN_MDI3-

+LAN_VDD10

+3V_LAN

+LAN_EVDD10

+LAN_VDD10

+LAN_REGOUT

60 mils

12

LAN_LINK#

1

VPRO@

LAN_R_ACTIVITY#

LAN_GND

LAN_GND

LAN_GND

LAN_GND

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

PWR

LL1,CL13 will be changed to

12
12

+LAN_REGOUT

Layout Note: LL1 must be
within 200mil to Pin36,
CL13,CL9 must be within
200mil to LL1

+LAN_VDD10

+3V_LAN

2.2uH&4.7uF after EVT test

LL1

1 2

4.7UH_1008HC-472EJFS-A_5%_1008

8111E@

8111E@

22U_0805_6.3V6M

12

8111E@

LL20_0603_5%

CL18

1U_0402_6.3V4Z

8111E@

CL13

+LAN_EVDD10

1

2

1

2

2

CL17

0.1U_0402_16V4Z

1

8111E@

+LAN_VDD10

2

CL9

8111E@

0.1U_0402_16V4Z

1

+3VALW TO +3V_LAN

Vgs=-4.5V,Id=3A,Rds<97mohm

+3VALW +3V_LAN

4.7U_0805_10V4Z

Close to Pin 27,39,12,47,48

Close to Pin 21

+3V_LAN

8111E@

R1709 510_0402_5%

12

C2002 220P_0402_50V7K

+3V_M

+3V_LAN

+3V_M

+3V_LAN

RJ45_GND LAN_GND

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

VPRO@

R1711 510_0402_5%

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI1-

RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

LAN_LINK#

12

C2003 220P_0402_50V7K

VPRO@

R1712 510_0402_5%

CL36

Compal Secret Data

Compal Secret Data

Compal Secret Data

8111E@

4.7U_0603_6.3V6K

12

LAN_R_ACTIVITY#LAN_ACTIVITY#

12

12

1 2

RL38

0_0402_5%

Deciphered Date

Deciphered Date

Deciphered Date

12

LL30_0603_5%

1000P_1808_3KV7K

CL30

CL28

8111E@

4.7U_0603_6.3V6K

1

2

12

11

8

7

6

5

4

3

2

1

10

9

1

0_0402_5%

2

D

+LAN_VDDREG

2

CL29

0.1U_0402_16V4Z

1

8111E@

JLAN1

CONN@

Yellow LED-

Yellow LED+

PR4-

PR4+

PR2-

PR3-

PR3+

PR2+

PR1-

PR1+

Green LED-

Green LED+

LIYO_101002-00803-3

RL37

Close to Pin 3,6,9,13,29,41,45

BOM Structure

For P/N and footprint

14

SHLD2

SHLD1

2

CL31

1

0.1U_0402_16V4Z

Please place them to ISPD page

13

UL1

8105E 10/100M

8105E@

UL5

10/100M transformer

8105E@

8105:
RL22,CL39,RL11,CL40,RL12,CL23,CL24,CL25,CL7UNSTUFF

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PCIe-LAN-RTL8105E/8111E

PCIe-LAN-RTL8105E/8111E

PCIe-LAN-RTL8105E/8111E

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

E

J35

2

112

JUMP_43X79

@

1

1

2

E

C841
1U_0402_6.3V4Z

8111E@

2

1 2

CL100.1U_0402_16V4Z 8111E@

1 2

CL40.1U_0402_16V4Z 8111E@

1 2

CL50.1U_0402_16V4Z 8111E@

1 2

CL60.1U_0402_16V4Z 8111E@

1 2

CL70.1U_0402_16V4Z 8111E@

CL7 close to pin12

+LAN_VDD10

1 2

CL190.1U_0402_16V4Z 8111E@

1 2

CL200.1U_0402_16V4Z 8111E@

1 2

CL210.1U_0402_16V4Z 8111E@

1 2

CL220.1U_0402_16V4Z 8111E@

1 2

CL230.1U_0402_16V4Z 8111E@

1 2

CL240.1U_0402_16V4Z 8111E@

1 2

CL250.1U_0402_16V4Z 8111E@

35 59Wednesday, November 23, 2011

35 59Wednesday, November 23, 2011

35 59Wednesday, November 23, 2011

+3V_LAN

of

of

of

C840

@

CL23,CL24,CL25 close to pin6,9,41, respectively

0.1

0.1

0.1

Slot 1 Half PCIe Mini Card-WLAN & BT3.0

5

WLAN/ WiFi

JMINI1

1 2

EC_SWI#<27,35,39>

D D

CL_CLK_DMC<26>

CL_DATA_DMC<26>

CL_RST#_DMC<26>

E51_TXD_R
E51_RXD_R

BT_PWRON

C C

Vpro SKU: please delete E51_TXD_R /RXD connection on JMINI1.

EC_SWI# WLAN_WAKE

RH121 0_0402_5%

CLKREQ_WLAN#<26>

PCIE_PRX_WLANTX_N2<26>
PCIE_PRX_WLANTX_P2<26>

PCIE_PTX_C_WLANRX_N2<26>
PCIE_PTX_C_WLANRX_P2<26>

CLK_WLAN#<26>
CLK_WLAN<26>

+3VS_WLAN

BT_PWRON_R

1 2
1 2
1 2

12
12

12

R14371K_0402_5%

R14340_0402_5% VPRO@
R14310_0402_5% VPRO@
R14300_0402_5% VPRO@

R6840_0402_5%

R13360_0402_5%

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

ACES_88910-5204

CONN@

GND2

2
4
6

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

4

+3V_M +3VS

+1.5VS

+3VS_WLAN

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

PLT_RST#

R1435
0_0402_5%

1 2
1 2

R44 10K_0402_5%@

1 2

R42 10K_0402_5%@

WL_OFF# <29,41>

PLT_RST# <6,28,34,35,37,39,41,42,44>

PM_SMBCLK <11,12,26,39>
PM_SMBDATA <11,12,26,39>

USB20_N13 <28>
USB20_P13 <28>

@

Bluetooth 3.0

LED_WLAN# <43>

+3VS

3

1 2

8111E@

1 2

VPRO@

R870_0603_5%

R830_0603_5%

12

CM17

47P_0402_50V8J

+1.5VS

12

CM20

47P_0402_50V8J

+3VS_WLAN

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

1

CM18

2

0.1U_0402_16V4Z

1

CM21

2

EMI

1

C373

C374

2

@

@

0.1U_0402_16V4Z

+3VS_WLAN

1

CM19

2

4.7U_0805_10V4Z

1

CM22

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

1

C371

2

@

0.1U_0402_16V4Z

1

1

C372

2

2

@

0.1U_0402_16V4Z

2

BT_PWRON<41>

C380

@

1

1

C381

2

2

@

0.1U_0402_16V4Z

R1380
0_0402_5%

C382

0.1U_0402_16V4Z

@

12

BT_PWRON_R

1

C675

0.1U_0402_16V4Z

2

@

1

Slot 2 Half PCIe Mini Card-G/GPS (FULL Card)

D19

@

CM1293-04SO_SOT23-6

1

CH1

2

Vn

3

CH2

CH4

CH3

4

UIM_VPP

5

Vp

+UIM_PWR

6

UIM_RST

C634

150U_B2_6.3VM_R35M

+3VS_FULL +3VS_FULL

1

C667

+

0.1U_0402_16V4Z

2

+1.5VS

0.1U_0402_16V4Z

1

C637

1

C666

2

4.7U_0805_10V4Z

1

2

2

C615

1

2

0.1U_0402_16V4Z

1

C612

0.1U_0402_16V4Z

2

Peak: 2.75A
Normal: 1.1A

R662 0_1206_5%

12

1050mA

60mil

UIM_DATA

+3VS_FULL+3VS

UIM_CLK

B B

EC_SWI#

CLKREQ_WWAN#<26>

CLK_WWAN#<26>

CLK_WWAN<26>

PCIE_PRX_C_WWANTX_N5<26>

PCIE_PRX_C_WWANTX_P5<26>

PCIE_PTX_C_WWANRX_N5<26>
PCIE_PTX_C_WWANRX_P5<26>

+3VS_FULL

A A

1 2

E51_TXD<41>

E51_RXD<41>

R682 0_0402_5%

1 2

R1333 0_0402_5%

5

1 2

R701 0_0402_5%

1 2

R638 0_0402_5%

E51_TXD_R
E51_RXD_R

12

R683

100K_0402_5%

JMINI2

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

G153G254G355G3

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

ACES_88910-5204

56

CONN@

4

+UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP

WWAN_OFF#

1 2

R1375 0_0402_5%

MINI_SMBCLK
MINI_SMBDATA

USB20_N12
USB20_P12

1 2

R45 10K_0402_5%@

R1432 0_0402_5%
R1433 0_0402_5%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS_FULL

+1.5VS
+UIM_PWR

PLT_RST#

1 2
1 2

USB20_N12 <28>
USB20_P12 <28>

+3VS

3

WWAN_OFF# <29,41>

+3VS_FULL

PM_SMBCLK
PM_SMBDATA

Up to 150MA, Default 8-10MA

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

UIM_VPP
UIM_DATA

UIM_DATA

Compal Secret Data

Compal Secret Data

Compal Secret Data

@

12

C429 22P_0402_50V8J

Deciphered Date

Deciphered Date

Deciphered Date

4
5
6

2

GND
VPP
I/O

GND8GND

CONN@

JSIM

1

VCC

2

RST

3

CLK

7

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

WLAN/3G

WLAN/3G

WLAN/3G

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

UIM_RST

1

C132456P_0402_50V8

2

40mil

UIM_CLK

1

C42722P_0402_50V8J

@

@

2

+UIM_PWR

1

C42822P_0402_50V8J

@

2

1

1

C132556P_0402_50V8

C6651U_0402_6.3V4Z

@

2

2

36 59Wednesday, November 23, 2011

36 59Wednesday, November 23, 2011

36 59Wednesday, November 23, 2011

1

1

1

C42656P_0402_50V8

C6640.1U_0402_16V4Z

@

2

2

0.1

0.1

0.1

5

IC PWR

+3VS +3VS_READER

R11

1 2

0_0805_5%

40mil

C52

<BOM Structure>

0.1U_0402_16V4Z

1

C77

2

0.1U_0402_16V4Z

C41,C43,C97 close U4 Pin5.
Pin5 -> 1000pF -> 0.1uF -> 10uF.
C42 close U4 Pin10.
C77 close U4 Pin37.

D D

C52close U4 Pin18.

+1.8VS_APVDD

C41

10U_0805_10V4Z

10U_0805_10V4Z

0.1U_0402_16V4Z

1

C50

2

0.1U_0402_16V4Z

1

C53

2

40mil

0.1U_0402_16V4Z

1

C83

2

0.1U_0402_16V4Z

1

1

C42

C43

2

2

1000P_0402_50V7K

1

C44

2

0.1U_0402_16V4Z

IC Function Part

1

C97

2

PCIE_PRX_C_CARDTX_N6<26>

PCIE_PRX_C_CARDTX_P6<26>

External Crystal

C15
0_0402_5%

389@

C15

C C

24.576MHZ_12PF_X5H024576DC1H-H

388@

1 2

12P_0402_50V8J

388@

1 2

12P_0402_50V8J

C81
0_0402_5%

389@

Memory Card Power

B B

MC_PWREN#

MC_PWREN#

A A

1 2

R1677 0_0805_5%

1

C1962

4.7U_0805_10V4Z

2

C81

U49

1

GND

2

IN

3

IN

4

EN#

TPS2061DRG4_SO8

MC_PWREN#

12

7mil

X1

388@

7mil

@

XIN

12

R13
1M_0402_5%

388@

XOUT

24.576MHz:
main: SJ100009A00
second: SJ100009o00

+3V_MCVCC+3VS

8

OUT

7

OUT

6

OUT

5

FLG

R1676

@

300_0603_5%

2

G

C1960

C1959

1

10U_0805_10V4Z

2

0.1U_0402_16V4Z

40mil

12

13

D

Q116
2N7002_SOT23

S

C1961

1

0.1U_0402_16V4Z

2

@

+3V_MCVCC

1

2

Note:

Colay With JMB385; W/1394, mount JMB388;WO/1394, mount JMB385.
CR_PE# and CR_WAKE reserve for D3 mode

1394 Conn

1

C95
220P_0402_50V7K

388@

2

TPBIAS

4

PLT_RST#<6,28,34,35,36,39,41,42,44>

CLK_PCIE_READER#<26>

CLK_PCIE_READER<26>

APREXT: PCIE reference resistor

8.2Kused in JMB385C;
12Kused in JMB388A

PCIE_PTX_C_CARDRX_N6<26>
PCIE_PTX_C_CARDRX_P6<26>

CR_PE#<29>

CR_WAKE#<29>

5IN1_LED#<43>

R141 100_0402_1%

R24 0_0402_5%

D1
CH751H-40PT_SOD323-2

@

1 2

@

R26
0_0402_5%

10mil

12

1

C100

0.33U_0603_10V7K

388@

2

R27

4.99K_0402_1%

388@

10mil

R32 56_0402_5%

12

R28

56_0402_5%

388@

12

388@

12

388@

R38 56_0402_5%

3

U4
JMB388-QGAZ0A QFN 48P CARD READER

1 2

C73 0.1U_0402_16V4Z

1 2

1 2

C80 0.1U_0402_16V7K

1 2

C51 0.1U_0402_16V7K

1 2

@

21

XRSTN#

15mil

APREXT

PCIE_PRX_CARDTX_N6

PCIE_PRX_CARDTX_P6

CR_PE#_R

MSCD#
SDCD#

40 mil

MC_PWREN#

R29
56_0402_5%

388@

12

Close to Chip

WCM-2012-900T_4P

2

TPB-

2

L2

3

TPB+

3

R48 0_0402_5%

1 2

R43 0_0402_5%

2

TPA-

TPA+ SDCD#

2

L1

3

3

WCM-2012-900T_4P

1 2

R46 0_0402_5%

388@

U4

1

XRSTN

2

XTEST

3

APCLKN

4

APCLKP

7

APREXT

9

APRXN

8

APRXP

11

APTXN

12

APTXP

13

CPPE_N

15

CR1_CD1N/WAKEN

16

CR1_CD0N

17

CR1_PCTLN

21

CR1_LEDN

JMB389-QGAZ0C QFN 48P

389@

1 2

@

R41 0_0402_5%

1 2

@

1

1

388@

4

4

@

@

1

1

388@

4

4

JMB389 C

D20

@

2

3

PJDLC05C_SOT23-3

@

2

3

PJDLC05C_SOT23-3

5

APVDD

10

APV18

19

DV33

20

DV33

44

DV33

18

DV18

37

DV18

48

GND
GND

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

JP6

1
2
3
4

GND1
GND2

CONN@

XD_SD_MS_D0

47

XD_SD_MS_D1

46

XD_SD_MS_D2

45

XD_SD_MS_D3

43

SLE3

42

XDCE_SDCLK_MSCLK_R

41

SEL2

40

XD_CLE

29

XD_D4

28

XD_D5

27

XD_D6

26

XD_D7

25

XD_RE

23

XD_RB

22

XD_ALE

6
24

SEL1

49
30

TAV33

31

TPB-

32

TPB+

33

TPA-

34

TPA+

35
36

APWR

38
39
14

XD_CD#_R

1

1

MDIO0
MDIO1
MDIO2
MDIO3
MDIO4
MDIO5
MDIO6
MDIO7
MDIO8

MDIO9
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14

APGND

1
2
3
4

5
6

FOX_UV31413-WR50D-7F~N

D21

+1.8VS_APVDD

+3VS_READER

+1.8VS_APVDD

1 2

R66

389@

1 2

R65

389@

1 2

R63

385@

XIN
XOUT

1 2

R25 12K_0402_1%

XDCE_SDCLK_MSCLK_R XDCE_SDCLK_MSCLK

7 IN 1 Conn

+3V_MCVCC

0_0402_5%
0_0402_5%
0_0402_5%

TPBIAS

388@

XDCE_SDCLK_MSCLK
SDCMD_MSBS_XDWE#
SDCD#
XDWP_SDWP
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_D4
XD_D5
XD_D6
XD_D7

XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3

XDCE_SDCLK_MSCLK
MSCD#
SDCMD_MSBS_XDWE#

2

C49
22P_0402_50V8J

1

@

2

385@

1 2

0.1U_0402_16V4Z

12

R3722_0402_5%

R820_0402_5%

JREAD

13
22
43

10
19

1
2
4

3
25
23
21
17

8

5

12
11
14
18
20
16

9

TAITW_R013-P12-HM_NR

CONN@

MSCD#

C99

SD_VCC
MS_VCC
XD_VCC

SD_CLK
SD_CMD
SD_CD
SD_WP
SD/MMC_DAT0
SD/MMC_DAT1
SD/MMC_DAT2
SD/MMC_DAT3
MMC_DATA4
MMC_DATA5
MMC_DATA6
MMC_DATA7

MS_DATA0
MS_DATA1
MS_DATA2
MS_DATA3
MS_SCLK
MS_INS
MS_BS

2

1

Strap Pin Definition

SDCMD_MSBS_XDWE#

XDWP_SDWP

XD_RB

XD_CD#

XD_CLE

SDCD#

MSCD#

XD_RE

XD_ALE

SLE3 SDCMD_MSBS_XDWE#

C101 should be close to ChipSet for power
source for SDA3.0 3.3/1.8v signaling

SEL2

SEL1

TAV33

388@

R410 0_0603_5%

389@

APWR

R412 0_0603_5%

APREXT

35

XD_D0

36

XD_D1

37

XD_D2

38

XD_D3

39

XD_D4

40

XD_D5

41

XD_D6

42

XD_D7

26

XD_CD

27

XD_R/B

28

XD_RE

29

XD_CE

30

XD_CLE

31

XD_ALE

32

XD_WE

33

XD_WP

7

SD_GND

15

SD_GND

6

MS_GND

24

MS_GND

34

XD_GND

44

XD_GND

45

GND

46

GND

Card Detect

D7

@

2

1

3

DAN202UT106_SC70-3

2

C98

0.1U_0402_16V4Z

1

1 2

R12 10K_0402_5%

1 2

R22 1K_0402_5%

1 2

R17 1K_0402_5%

385@

R40 1K_0402_5%

385@

R20 1K_0402_5%

385@

R18 1K_0402_5%

385@

R31 1K_0402_5%

1 2

R21 200K_0402_5%@

1 2

385@

R23 200K_0402_5%

1 2

385@

R71 0_0402_5%

1 2

C101 2.2U_0603_6.3V4Z

1 2

R74 0_0402_5%

1 2

385@

R75 0_0402_5%

1 2

R78 0_0402_5%

1 2

385@

R80 0_0402_5%

12

12

385@

R19 9.1K_0402_5%

1 2

388@

R39 12K_0402_1%

XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3

XDCE_SDCLK_MSCLK

SDCMD_MSBS_XDWE#

XDWP_SDWP

1 2

XD_CD#XD_CD#

R33 0_0402_5%

2

C96

0.1U_0402_16V4Z

1

1

12

12

12

12

SDCMD_MSBS_XDWE#

XDWP_SDWP

XDWP_SDWP

1 2

C76 0.1U_0402_16V4Z

12

XD_D4
XD_D5
XD_D6
XD_D7

XD_CD#
XD_RB
XD_RE

XD_CLE
XD_ALE

XD_CD#_R

+3V_MCVCC

+3VS_READER

+3VS_READER

Note:

if use external PWR and change
+3V_MCPWR as control signal, Need BIOS
to change the Setting.

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Card Reader

Card Reader

Card Reader

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

1

of

37 59Wednesday, November 23, 2011

of

37 59Wednesday, November 23, 2011

of

37 59Wednesday, November 23, 2011

0.1

0.1

0.1

5

RA34

RA25
1K_0402_5%

1 2
1 2

RA26
1K_0402_5%

AZ_SYNC_HD<25>

AZ_RST_HD#<25>

1

CA18

2

EAPD<41>

EC_MUTE#<41>

39.2K

20K

10K

5.1K

39.2K

20K

10K

5.1K

0_0402_5%@

@

RA39
0_0402_5%

MIC2R_RMIC

MIC_SENSE

NBA_PLUG

CONN@

JMIC

1

1

2

2

3

GND

4

GND

ACES_88231-02001

Codec Signals

PORT-A (PIN 39, 41)

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

PORT-D (PIN 35, 36)

PORT-E (PIN 14, 15)

PORT-F (PIN 16, 17)

PORT-H (PIN 37)

PORT-I (PIN 32, 33)

1 2

CA9 4.7U_0603_6.3V6K

1 2

CA10 4.7U_0603_6.3V6K

CA26
1U_0402_6.3V4Z

1 2
1 2

CA28

1U_0402_6.3V4Z

CA12 100P_0402_50V8J

DMIC_DATA<23>
DMIC_CLK<23>

RA18 20K_0402_1%

RA16 39.2K_0402_1%

MIC1_LINE1_R

MIC1_LINE1_L

+MIC1_VREFO_L
+MIC1_VREFO_R
+MIC2_VREFO

1 2

1 2

CA35 10U_0805_10V4Z

1 2

CA16

2.2U_0603_6.3V4Z

1 2

1 2

MIC2_R
MIC2_LMIC2R_L

MONO_IN

AZ_SYNC_HD

AC_JDREF

RA1020K_0402_1%

12

AC_VREF

12

CA142.2U_0603_6.3V4Z

DMIC_DATA
DMIC_CLK

SENSE_A

EAPD
EC_MUTE#

Function

Headphone out

Ext. MIC

Ext. Mic/LINE IN

D D

MIC1_LINE1_R_R

MIC1_LINE1_R_L

C C

2

2.2U_0603_6.3V4Z

CA17

1

0.1U_0402_16V4Z

place close to chip

MIC CONN

+MIC2_VREFO

RA51

4.7K_0402_5%

B B

DA10

1

PESD5V0U2BT_SOT23-3

12

MIC

2

3

Sense Pin Impedance

SENSE A

A A

SENSE B

5

4

RA10_0603_5%

1 2

10U_0805_10V4Z

place close to chip

U143

22

MIC1_R

21

MIC1_L

17

MIC2_R

16

MIC2_L

31

MIC1_VREFO_L

30

MIC1_VREFO_R

29

MIC2_VREFO

15

LINE2_R

14

LINE2_L

20

MONO_OUT

12

PCBEEP_IN

10

SYNC

11

RESET#

19

JDREF

28

LDO_CAP

27

VREF

34

CPVEE

CPVEE

35

CBN

36

CBP

2

GPIO0/DMIC_DATA

3

GPIO1/DMIC_CLK

13

SENSE_A

18

SENSE_B

47

EAPD

4

PD#

ALC259-VB5-GR_QFN48_7X7

4

1

CA8

0.1U_0402_16V4Z

2

SPK_OUT_R+

SPK_OUT_R-

SPK_OUT_L+

SPK_OUT_L-

SDATA_OUT

THERMAL_PAD

Beep sound

3

+3VS_DVDD

35 mA

1

CA7

2

0.1U_0402_16V4Z

place close to chip

+AVDD

68 mA

1

DVDD

9

DVDD_IO

25

AVDD1

38

AVDD2

39

PVDD1

46

PVDD2

45
44

40
41

33

DVSS

32

5
8

6

24

NC

23

NC

48

NC

26
37
42
43
7

49

RA4 75_0402_1%
RA5 75_0402_1%

AZ_SDOUT_HD
AZ_SDIN0_HD_R

HPOUT_R

HPOUT_L

SDATA_IN

BITCLK

AVSS1
AVSS2
PVSS1
PVSS2

EC Beep

EC_BEEP#<41>

PCI Beep

PCH_SPKR<25>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AGND

+PVDD1
+PVDD2

SPKR+
SPKR-

SPKL+
SPKL-

RA6 33_0402_5%

DGND

RA8

1 2

47K_0402_5%

RA9

1 2

47K_0402_5%

10K_0402_5%

+DVDD_IO

1

CA1

10U_0805_10V4Z

2

CA3

10U_0805_10V4Z

10U_0805_10V4Z

1

CA4

2

1

CA2

2

1

CA5

2

0.1U_0402_16V4Z

place close to chip

30MIL/30MIL

HP_R
HP_L

AZ_SDOUT_HD <25>

12

AZ_SDIN0_HD <25>

AZ_BITCLK_HD <25>

@

RA7

10_0402_5%

@

10P_0402_50V8J

Close to Audio Chip

1 2

CA47 0.1U_0603_50V7K

1 2

CA48 0.1U_0603_50V7K

1 2

CA49 0.1U_0603_50V7K

1 2

CA50 0.1U_0603_50V7K

1 2

RA43 0_0603_5%

CA15

1 2

0.1U_0402_16V4Z

12

1

RA11

3

CA20

0.1U_0402_16V4Z

2

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

RA32 0_0603_5%

0.1U_0402_16V4Z

1

1

CA6

2

2

CA23

MONO_IN

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

12

+3VS+3VS

RA3

12

0_0603_1%

SPKL-

SPKL+

SPKR-

SPKR+

FBMA-L11-160808-121LMT_0603

HP_L

FBMA-L11-160808-121LMT_0603

HP_R

MIC1_LINE1_R_R
MIC1_LINE1_R_L

MIC1_L

MIC1_R

placement near Audio Codec

FBMA-L11-160808-121LMT_0603

FBMA-L11-160808-121LMT_0603

+5VS

RA13

0_0603_1%

RA14

0_0603_1%

RA15

0_0603_1%

RA44

0_0603_1%

LA3

1 2

LA4

1 2

1K_0402_5%

1K_0402_5%

LA2

1 2

1 2

LA8

2

+PVDD1

JA1

JUMP_43X39

+PVDD2

1

CA61

2

12

1

CA19 10U_0805_10V4Z

@

2

1

CA46 10U_0805_10V4Z

@

2

12

12

1

CA51 10U_0805_10V4Z

@

2

1

CA39 10U_0805_10V4Z

@

2

12

CA11

100P_0402_50V8J

@

4.7K_0402_5%

12
12

4.7K_0402_5%

CA21

100P_0402_50V8J

@

2

RA48

RA47

RA45

0.1U_0402_16V4Z

600 mA

CA57

2

2

1

@

place close to chip

1

0.1U_0402_16V4Z

SPK_L-

1U_0603_10V6K

1

@

2

SPK_L+

SPK_R-

1U_0603_10V6K

1

@

2

SPK_R+

HP_L_L

HP_R_R

1

1

CA13
100P_0402_50V8J

2

2

@

D9

1

@

PACDN042Y3R_SOT23-3

RA46

12

12

1

2

+MIC1_VREFO_R

MIC1_R
MIC1_L

+MIC1_VREFO_L

MIC1_L_L

MIC1_R_R

1

CA22
100P_0402_50V8J

2

@

D10

1

@

PACDN042Y3R_SOT23-3

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

RA2

BLM18PG181SN1D_0603

1

1

CA56

2

2

10U_0805_10V4Z

DVT NOT POP RA12, USE JA1

RA12

BLM18PG181SN1D_0603

1

CA60

@

2

10U_0805_10V4Z

Speaker Connector

CA42

CA45

3

2

3

2

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Wednesday, November 23, 2011

DA8

1

PESD5V0U2BT_SOT23-3

SPK_R­SPK_R+
SPK_L­SPK_L+

DA9

1

PESD5V0U2BT_SOT23-3

NBA_PLUG

MIC_SENSE

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

HD CODEC ALC259

HD CODEC ALC259

HD CODEC ALC259

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

1

12

0.1U_0402_16V4Z

CA44

12

0.1U_0402_16V4Z

CA59

@

2

3

2

3

1

1

CA43

2

2

10U_0805_10V4Z

1

1

CA58

@

2

2

10U_0805_10V4Z

1
2
3
4

ACES_85204-0400N

+5VS

+5VS

JSPK

1
2
3
4

CONN@

Head Phone JACK

JHP

1
2

AGND

6
3

4

5

SINGA_2SJ-S351-013

CONN@

Ex.MIC JACK

JEMIC

1
2

AGND

6
3

4

5

SINGA_2SJ-S351-012

CONN@

38 59

38 59

38 59

1

0.1

0.1

0.1

5

Express Card

+3VS

D D

C C

PLT_RST#<6,28,34,35,36,37,41,42,44>

SYSON<41,45,52>

SUSP#<10,41,45,50,51,52,57>

PLT_RST#

SYSON

SUSP#

CP_PE#

(Internal Pull High to AUXIN)

CP_USB#

(Internal Pull High to AUXIN)

RCLKEN1

PWR Switch

U52

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin

AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

Thermal_Pad

RCLKEN

G577NSR91U_TQFN20_4x4

1.5Vout

1.5Vout

3.3Vout

3.3Vout

OC#

PERST#

GND

11
13

3
5

15

19

8

16

NC

7

21

40mil

60mils

40mil

PERST1#

4

+3VALW_CARD +3VS_CARD +1.5VS_CARD

+1.5VS_CARD+1.5VS

+3VS_CARD

+3VALW_CARD+3VALW_PCH

C2027

1

1

C2028

C2029

2

2

10U_0805_10V4Z

0.1U_0402_16V4Z

R1726

10K_0402_5%

2

RCLKEN1

G

3

+3VS

Imax = 1.35A Imax = 0.75AImax = 0.275A

1

1

C2030

2

10U_0805_10V4Z

+3VS

12

13

D

Q118
2N7002_SOT23

S

1

1

C2031

2

2

0.1U_0402_16V4Z
10U_0805_10V4Z

+3VS

12

R1727

10K_0402_5%

CLKREQ1#

NC7SZ32P5X_NL_SC70-5

C2032

2

1

B

A

2

+3VS

5

3

0.1U_0402_16V4Z

U53

Vcc

G

1

2

4

Y

USB20_N8<28>
USB20_P8<28>

C2034

10U_0805_10V4Z

C2033

0.1U_0402_16V4Z

+3VALW_PCH

1

C2035

10U_0805_10V4Z

2

CLKREQ_EXPCARD# <26>

2

+1.5VS

1

1

C2036

10U_0805_10V4Z

2

2

R59 0_0402_5%

1 2

WCM-2012-900T_0805

4

4

1

1

L26

@

1 2

R84 0_0402_5%

1

New Card Socket (Left/TOP)

JEXP1

1

GND

USB20_R_N8
USB20_R_P8

CP_USB#

PM_SMBCLK<11,12,26,36>

PM_SMBDATA<11,12,26,36>

+1.5VS_CARD

EC_SWI#<27,35,36>

+3VALW_CARD

+3VS_CARD

CLK_PCIE_EXPCARD#<26>
CLK_PCIE_EXPCARD<26>

3

3

2

2

CP_PE#<28>

PCIE_PRX_C_EXPTX_N3<26>
PCIE_PRX_C_EXPTX_P3<26>

PCIE_PTX_C_EXPRX_N3<26>
PCIE_PTX_C_EXPRX_P3<26>

USB20_R_N8
USB20_R_P8

PERST1#

CLKREQ1#
CP_PE#

2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

27
28
29
30

USB_D­USB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLK­REFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND

GND
GND
GND
GND

CONN@

This pin1 define need check

+SC_PWR

+3V_SC

12

1

2

SC_RST
SCard0C6
SC_CLK
SC_DATA
SCard0Fcb
SCard0C8
ICCInsertN

RS16
100K_0402_5%

SM@

SM@

CS29

1U_0402_6.3V4K

Smart Card

1 2

RS14 0_0402_5%

SM@

1 2

RS20 0_0402_5%

SM@

3

2

LS2

US4

1

SCard0C8

2

SCard0C6

3

SCard0Fcb

4

SMIO_5VPWR

5

SCard0Rst

6

SCard0Clk

7

SCard0Data

8

DM

9

DP

10

AV33

11

SCPWR0

12

5VGND

13

5VInput

14

V33OUT

AU9540A51-GBS-GR SSOP28

SM@

@

4

4

USB20_N2_R
USB20_P2_R

1

1

28

XO

27

XI

LEDCRD
LEDPWR

RESET

EEPDATA

EEPCLK

P1(6)

ICCInsertN

VDDH
VDDP

VDD

V18OUT

26
25

RS21 0_0402_5%@

24
23
22
21
20
19
18
17
16
15

4

PWRSV_SEL

3

2

WCM2012F2S-900T04_0805

+5VS

USB20_N2_R
USB20_P2_R

+3V_SC

+SC_PWR

+5VS

+3V_SC

RS18 0_0402_5%

RS13 470_0402_5%

SM@
SM@

12

SC_DATA_R

5

USB20_N2

USB20_P2

12
12

USB20_N2<28>

USB20_P2<28>

B B

SCard0C8
SCard0C6
SCard0Fcb

SC_RST
SC_CLK
SC_DATA

+SC_PWR

A A

RS12

4.7K_0402_5%

SM@

SM@

SC_XTAL_Out
SC_XTAL_In

1 2

SC_SDA
SC_SCL
EEPWP
ICCInsertN

+3V_SC
+1.8V_SC

1

CS32

2

0.1U_0402_10V6K

JSMART

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

GND

12

GND

ACES_88514-104N

CONN@

US3

1

A0

VCC

2

A1

WP

3

A2

SCL

4

GND

SDA

AT24C02BN-SH-T_SO8@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

+3V_SC

1

SM@

CS30

2

1U_0402_6.3V4K

1

2

8
7

EEPWP

6

SC_SCL

5

SC_SDA

+3V_SC

1

2

@

0.1U_0402_10V6K

1

SM@

CS24

2

0.1U_0402_10V6K

Layout note: Close to PIN14

+3V_SC

12

12

12

CS20

SM@

RS11

RS19

RS17

47K_0402_5%

47K_0402_5%

@

@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

SM@

CS18

0.1U_0402_10V6K

47K_0402_5%

+5VS

1

1

SM@

CS21

CS26

2

2

0.1U_0402_10V6K

Layout note: Close to PIN18

2

SM@

1U_0402_6.3V4K

+5VS

CS25

0.1U_0402_10V6K

Layout note: Close to PIN13

+SC_PWR

1

2

SM@

Layout note: Close to PIN4

SC_XTAL_In

SC_XTAL_Out

1

SM@

CS31

2

1U_0402_6.3V4K

RS15 1M_0402_5%

12MHZ_16PF_X5H012000FG1H-X

18P_0402_50V8J

CS16

1

SM@

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

+1.8V_SC

1

SM@

YS2

SM@

1

SM@

CS17

CS22

2

2

1U_0402_6.3V4K

0.1U_0402_10V6K

2

18P_0402_50V8J

1

2

1

SM@

Layout note: Close to PIN11

1 2

112

Express Card

Express Card

Express Card

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

Layout note: Close to PIN15

CS23

SM@

CS28

+3V_SC

1

2

0.1U_0402_10V6K

39 59Wednesday, November 23, 2011

39 59Wednesday, November 23, 2011

39 59Wednesday, November 23, 2011

SM@

Layout note: Close to PIN10

0.1

0.1

0.1

5

For EMC

KSO10

KSO11

KSO12

KSO15

D D

C C

KSI7

KSI2

KSI3

KSI4

KSI0

KSI5

KSI6

KSI1

KSO2

KSO1

KSO0

KSO4

KSO3

KSO5

KSO14

KSO6

KSO7

KSO13

KSO8

KSO9

1 2

C803 100P_0402_50V8J

1 2

@

C804 100P_0402_50V8J

1 2

@

C805 100P_0402_50V8J

1 2

@

C807 100P_0402_50V8J

1 2

@

C808 100P_0402_50V8J

1 2

@

C810 100P_0402_50V8J

1 2

@

C811 100P_0402_50V8J

1 2

@

C812 100P_0402_50V8J

1 2

@

C813 100P_0402_50V8J

1 2

@

C814 100P_0402_50V8J

1 2

@

C815 100P_0402_50V8J

1 2

@

C816 100P_0402_50V8J

1 2

@

C793 100P_0402_50V8J

1 2

@

C790 100P_0402_50V8J

1 2

@

C791 100P_0402_50V8J

1 2

@

C792 100P_0402_50V8J

1 2

@

C795 100P_0402_50V8J

1 2

@

C796 100P_0402_50V8J

1 2

@

C797 100P_0402_50V8J

1 2

@

C798 100P_0402_50V8J

1 2

@

C799 100P_0402_50V8J

1 2

@

C800 100P_0402_50V8J

1 2

@

C801 100P_0402_50V8J

1 2

@

C802 100P_0402_50V8J

@

KEYBOARD CONN.

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0

KSI[0..7]

KSO[0..15]

4

JKB

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

GND1

26

GND2

ACES_85208-24071

CONN@

KSI[0..7] <41,43>

KSO[0..15] <41,43>

3

+5VALW +USB_VCCB

CU6

0.1U_0402_16V4Z
RU27

SUSP<6,11,43,45>

SYSON#<43,45>

+USB_VCCB

USB20_N0<28>

USB20_P0<28>

1

+

CU5

2

150U_B2_6.3VM_R35M

0_0402_5%

1 2

R90 0_0402_5%@

U3TXDP0_L

U3TXDN0_L
USB20_P0_L

USB20_N0_L
U3RXDP0_L

U3RXDN0_L

USB20_P0

12

2.5A

UU1

1

GND

VOUT

2

VOUT

VIN
VIN3VOUT

4

FLG

EN

AP2301SG-13

1

@

C13

2

0.1U_0402_16V4Z

JUSB31

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

SANTA_371394-1

RU9 0_0402_5%@

3

3

2

2

LU3 WCM-2012-900T_0805

RU8 0_0402_5%@

4

1

1000P_0402_50V7K

CONN@

GND
GND

4

1

8
7
6
5

@

C3606

10
11

USB20_N0_LUSB20_N0

USB20_P0_L

CU1

@

USB_OC0#

1 2

R91 0_0402_5%@

USB30_GND
USB30_GND

CU4

4.7U_0805_10V4Z

RU2
0_0603_5%

USB20_P0_L

USB20_N0_L

2

W=100mils

CU3

0.1U_0402_16V4Z

4.7U_0805_10V4Z

USB_OC0# <28>

USB_OC4# <28,43>

USB3_TX0_P<28>

USB3_TX0_N<28>

2

3

YSDA0502C 3P C/A SOT-23

DU2

1

3

2

3

2

9

8

7

6

U3RXDP0_L

3

2

U3RXDN0_L

3

2

U3TXDN0_L

U3RXDN0_L

U3RXDP0_L

U3TXDN0_L

U3TXDP0_L

USB3_RX0_P<28>

CU2

1000P_0402_50V7K

USB3_RX0_N<28>

CU11

1 2

USB3_TX0_P_C U3TXDP0_L

0.1U_0402_16V7K

CU12

1 2

USB3_TX0_N_C

0.1U_0402_16V7K

U3RXDN0_L

U3RXDP0_L

U3TXDN0_L

1

U3TXDP0_L

RU7 0_0402_5%@

LU2 WCM-2012-121T_0805

4

4

1

1

RU6 0_0402_5%@

RU5 0_0402_5%@

LU1 WCM-2012-121T_0805

4

4

1

1

RU4 0_0402_5%@

DU1

1

1

2

2

4

4

5

3

3

8

L15ESDL5V0NA-4 SLP2510P8

10

9

7

65

Finger Print

+3VALW

B B

U34
APX9132ATI-TRL_SOT23-3

1

C645

0.1U_0402_16V4Z

2

VDD2VOUT

GND

1

3

LID_SW# <41>

1

C647

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

Kill Switch

+3VALW

2

3

D24

@

A A

11223

SW5
1BS003-1211L_3P

1

3

DAN217_SC59

KILL_SW#

+3VALW

R580

100K_0402_5%

1 2

5

KILL_SW# <41>

+3VS_FP

USB20_N11<28>

USB20_P11<28>

C128

1

1U_0402_6.3V4Z

2

1

C122

2

R160 0_0402_5%

1 2

WCM-2012-900T_0805

4

4

1

1

L56

@

1 2

R159 0_0402_5%

+3VS +3VS_FP

+3VALW

3

2

Diode added on Finger Print small board

USB20_R_N11

USB20_R_P11

PJDLC05_SOT23-3

4

D15

@

2

3

Security Classification

Security Classification

1

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

R62 0_0603_5%

1 2

R69 0_0603_5%@

+3VS_FP

3

USB20_R_N11
USB20_R_P11

2

Issued Date

Issued Date

Issued Date

JFP

1

1

2

2

3

3

4

4

E&T_6905-F04N-00R

CONN@

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Screw HoleLid SW

H3

H2

1

@

H_3P0

1

@

H_3P0

H4

1

@

H_3P0

Break hole CPU

H31

@

H_2P3

H30

1

1

@

H_2P3

H19

1

@

H_4P5

PCB Fiducial Mark PAD

FD1

@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

H6

1

@

H_3P0

H11

1

@

H_4P5

1

@

2

H7

@

H_3P0

H21

1

@

H_4P5

FD2

1

H1

H8

H16

1

1

@

H_3P0

1

@

H_3P0

1

@

H_3P0

H18

1

@

H_3P0

H9

1

@

H_3P0

H33

1

@

H_3P0X5P0N

JWLAN VGA

1

H10

1

@

H_4P5

H24

@

H_3P3

1

H13

1

@

H_4P5

H23

H22

1

1

@

@

H_3P3

H_3P3

40 59

40 59

40 59

0.1

0.1

0.1

H12

1

@

H_4P5

FD3

@

H32

1

@

H_3P0N

FD4

@

1

1

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

KB/USB3.0/FP/LID/KW/PAD

KB/USB3.0/FP/LID/KW/PAD

KB/USB3.0/FP/LID/KW/PAD

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Wednesday, November 23, 2011

H26

1

@

H_4P5

H25

@

H_3P3

1

5

+3VL

R745

+3VALW

D D

R738

@

10_0402_5%

C787

@

22P_0402_50V8J

+3VALW

R739 47K_0402_5%

C789 0.1U_0402_16V4Z

KSI[0..7]<40,43>

KSO[0..15]<40,43>

C C

+3VL

R755 2.2K_0402_5%

R756 2.2K_0402_5%

+3VS

R758 2.2K_0402_5%

R759 2.2K_0402_5%

12

1

2

12

12

1 2

1 2

1 2

1 2

CLK_PCI_EC

ECRST#

KSI[0..7]

KSO[0..15]

EC_SMB_CK1

EC_SMB_DA1

EC_SMB_CK2

EC_SMB_DA2

0_0805_5%

R746
0_0805_5% @

To battery & charger

To PCH & VGA

12

PCH_PWR_EN<45>

+3VALW

B B

R326

1 2

@

1K_0402_5%

EC_SMI#

PCH_PWR_EN_R PCH_PWR_EN_R

R7540_0402_5%

new added pin--Joyce 0928-2011

0.1U_0402_16V4Z
C771

1

1

C770

2

0.1U_0402_16V4Z

pin38 AOAC_ON: just reserve

EC_SMB_CK1<47,48>
EC_SMB_DA1<47,48>
EC_SMB_CK2<13,26>
EC_SMB_DA2<13,26>

PM_SLP_S3#<27>
PM_SLP_S5#<27>

WL_BT_LED#<43>
SLP_LAN#<27>

SUSWARN#<27>

INVT_PWM<23>
FAN_SPEED<6>
PM_SLP_LAN#<42,50>

PM_PWROK<27>

GREEN_PWR<48>

NUM_LED#<44>

SUSCLK_R<27>

1

2

2

0.1U_0402_16V4Z

GATEA20<29>
KB_RST#<29>

SERIRQ<25,34,44>

LPC_FRAME#<25,34,44>

LPC_AD3<25,34,44>
LPC_AD2<25,34,44>
LPC_AD1<25,34,44>
LPC_AD0<25,34,44>

CLK_PCI_EC<28>

PLT_RST#<6,28,34,35,36,37,39,42,44>

EC_SCI#<29>

T23PAD @

SLP_A#<27>

EC_SMI#<29>

E51_TXD<36>

E51_RXD<36>

1 2

R753 0_0402_5%

R757 100K_0402_5%

1 2

C783 20P_0402_50V8

reserve for ENE_CS board

R749

1 2

CRY2CRY1

20M_0603_5%@

1

C784

@

A A

1

2

2

15P_0402_50V8J

Y5

@

32.768KHZ_12.5PF_Q13MC14610002

1

C785

@

2

OSC4OSC

NC3NC

15P_0402_50V8J

5

0.1U_0402_16V4Z

1

C773

C772

2

GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_EC
PLT_RST#
ECRST#
EC_SCI#
AOAC_ON

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

WL_OFF_EC#

SLP_A#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

PM_SLP_S3#
PM_SLP_S5#
EC_SMI#

WL_BT_LED#
SLP_LAN#
SUSWARN#
INVT_PWM
FAN_SPEED
PM_SLP_LAN#
E51_TXD
E51_RXD

PM_PWROK
GREEN_PWR
NUM_LED#

CRY1

CRY2

4

2

1

4

2

C774
1000P_0402_50V7K

1

UE1

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

10

LPC & MISC

LPC_AD0

12

CLK_PCI_EC

13

PCIRST#/GPIO05

37

EC_RST#

20

EC_SCII#/GPIO0E

38

GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/GPIO44

78

EC_SMB_DA1/GPIO45

79

EC_SMB_CK2/GPIO46

80

EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

GPIO0D

25

EC_INVT_PWM/GPIO11

28

FAN_SPEED1/GPIO14

29

EC_PME#/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

PCH_PWROK/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLKI/GPIO5D

123

XCLKO/GPIO5E

+3VALW_EC +3VL +EC_VCCA+3VALW_EC

FBMA-L11-160808-800LMT_0603

C775
1000P_0402_50V7K

33

96

125

111

EC_VDD0

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

PWM Output

67

EC_VDD/AVCC

BATT_TEMP/GPIO38

9

22

EC_VDD/VCC

AD Input

DA Output

PS2 Interface

Int. K/B
Matrix

CPU1.5V_S3_GATE/GPXIOA00

HDA_SDO/GPXIOA02

SPI Device Interface

VCIN0_PH/GPXIOD00

SPI Flash ROM

PECI_KB930/GPIO41

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

GPIO

SM Bus

BATT_LOW_LED#/GPIO55

EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

H_PROCHOT#_EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

GPIO

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

PM_SLP_S4#/GPIO59

GPI

PECI_KB9012/GPXIOD07

GND/GND

GND/GND

GND/GND

GND/GND

GND0

11

24

AGND/AGND

35

94

69

113

20mil

ECAGND

FBMA-L11-160808-800LMT_0603

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LE1

1 2

GPIO0F

BEEP#/GPIO10

GPIO12

ACOFF/GPIO13

GPIO39

ADP_I/GPIO3A

GPIO3B
GPIO42

IMON/GPIO43

DAC_BRIG/GPIO3C

EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01

SPIDI/GPIO5B

SPIDO/GPIO5C
SPICLK/GPIO58
SPICS#/GPIO5A

ENBKL/GPIO40

FSTCHG/GPIO50

PWR_LED#/GPIO54

SYSON/GPIO56

VR_ON/GPIO57

BKOFF#/GPXIOA08

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

GPXIOD06

V18R

KB9012QF A3 LQFP 128P

LE2

Issued Date

Issued Date

Issued Date

3

C4907

ECAGND

0.1U_0402_16V4Z

21

WWAN_OFF_EC#

23

EC_BEEP#

26

PM_SLP_A#

27

PWR_GPS_DOWN#

63

BATT_TEMPA

64

Project_ID

65

ADP_I

66

Board_ID

75

PCH_HOT#_R PCH_HOT#

76

PWRMOS_TEMP

68
70

EN_DFAN1

71

BT_PWRON

72

TP_ON/OFF#

83

EC_MUTE#

84

USB_EN#

85

TP_LED#

86
87
88

97
98
99
109

119
120
126
128

73
74
89
90
91
92
93
95
121
127

100
101
102
103
104
105
106
107
108

110
112
114
115
116
117
118

124

12

3

EAPD
TP_CLK
TP_DATA

CPU1.5V_S3_GATE

DRAMRST_GATE
HDA_SDO
VCIN0_PH

PCH_ENBKL
KILL_SW#
PWR_USB_EN#

BATT_FULL_LED#
CAPS_LED#
PWR_ON_LED
BATT_CHG/LOW_LED#
SYSON
VR_ON
PM_SLP_S4#

PCH_RSMRST#
LID_SW_OUT#
VCIN1_PH

H_PROCHOT#_EC

VCOUT0_PH
BKOFF#
PBTN_OUT#
PCH_APWROK
SA_PGOOD

EC_ACIN
EC_ON
ON/OFFBTN#
LID_SW#
SUSP#
CAMPWR_EN

H_PECI

+EC_V18R

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

C782

4.7U_0805_10V4Z

EC_BEEP# <38>
PM_SLP_A# <42>
PWR_GPS_DOWN# <57>

BATT_TEMPA <47>

ADP_I <47,48>

PWRMOS_TEMP <57>

EN_DFAN1 <6>

BT_PWRON <36>

TP_ON/OFF# <43>

EC_MUTE# <38>

USB_EN# <44>

TP_LED# <43>

TP_CLK <43>

TP_DATA <43>

CPU1.5V_S3_GATE <10>

HDA_SDO <25>

KILL_SW# <40>

BATT_FULL_LED# <43>

CAPS_LED# <44>

PWR_ON_LED <43>
BATT_CHG/LOW_LED# <43>
SYSON <39,45,52>

VR_ON <54>

PM_SLP_S4# <27>

PBTN_OUT# <27>

SA_PGOOD <53>

EC_ON <43,49>

ON/OFFBTN# <43>

LID_SW# <40>
SUSP# <10,39,45,50,51,52,57>

CAMPWR_EN <23>

H_PECI <6,29>

Compal Secret Data

Compal Secret Data

Compal Secret Data

H_PROCHOT#_EC<47>

R4934 0_0402_5%

EAPD <38>

VCIN0_PH <47>

PCH_ENBKL <27>

PWR_USB_EN# <44>

PCH_RSMRST# <27>
LID_SW_OUT# <29>
VCIN1_PH <47>

VCOUT0_PH <49>
BKOFF# <23>

PCH_APWROK <27>

Deciphered Date

Deciphered Date

Deciphered Date

2

VR_HOT#<54>

VR_HOT#

H_PROCHOT#_EC

R737

0_0402_5%

Q38

2N7002_SOT23

--new pin for power --Joyce 1114

new added pin --Joyce 0922-2011

PCH_HOT# <26>

EC_MUTE#

1 2

R1211 10K_0402_5%

T24PAD@

+3VL

2

+3VALW

R742 330K_0402_5%

R747 330K_0402_5%

EC_ACIN

WL_OFF_EC#

WWAN_OFF_EC#

1

12

2

G

13

D

S

LID_SW#

Board_ID

Project_ID

Rd
0_0402_5%

10@

H_PROCHOT# <6,47>

WWAN_OFF_EC#

WL_OFF_EC#

PWR_GPS_DOWN#

PCH_HOT#_R

BKOFF#

TP_CLK

TP_DATA

R732 100K_0402_5%

R730 10K_0402_5%

R724 10K_0402_5%

R740 4.7K_0402_5%

1 2

1 2

R741 4.7K_0402_5%

1 2

R1210 10K_0402_5%

1 2

Ra 100K_0402_5%

1 2

@

Rb 100K_0402_5%

Rb1
100K_0402_1%

VPRO@

1 2

Rc 100K_0402_5%

1 2

@

Rd 100K_0402_5%

Rd

8.2K_0402_5%

11@

1 2

R731 10K_0402_5%

1 2

R725 10K_0402_5%

1 2

@

1 2

1 2

@

Rd
18K_0402_5%

12@

+5VS

+3VL

+3VL

Rd Vmin VmaxProject_ID Vtype

0V

0 (QAQ10)

1 (QAQ11)

2 (QAQ12)

3 (QAQ13)

0 0.155V

8.2K+/-5% 0.362V

18K+/-5% 0.503V

33K+/-5% 0.634V 0.819V

56K+/-5%

0V

0.168V

0.250V

0.375V

0.958V 1.185V 1.359V

100K+/-5%

BATT_TEMPA

EC_ACIN

EMI request
close U43

@

12

12

2 1

CH751H-40PT_SOD323-2

1 2

R748 0_0402_5%

1 2

R752 0_0402_5%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Date: Sheet of

Date: Sheet of

Date: Sheet of

1 2

C776 100P_0402_50V8J

1 2

C788 100P_0402_50V8J

KB_RST#

PLT_RST#

D64

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

12

C820 0.1U_0402_16V4Z

@

12

C794 330P_0402_16V4Z

ACIN <13,27,48>

WL_OFF# <29,36>

WWAN_OFF# <29,36>

ENE-KB9012

ENE-KB9012

ENE-KB9012

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

41 59

41 59

41 59

1

+3VS

Rd
33K_0402_5%

13@

0.621V

0.945V

1.838V1.372V 1.650V

0.1

0.1

0.1

5

4

3

2

1

+3V_M

0.1U_0402_10V7K~D

C472

12

12

12

1

VPRO@

2

VPRO@

0.1U_0402_10V7K~D

1

C471

2

*

STUFF: L29
NO STUFF: R548

+1.0V_LAN

10U_0805_6.3V6M~D

0.1U_0402_10V7K~D

C470

C468

1

VPRO@

2

+3V_M

VPRO@

0.1U_0402_10V7K~D

1

1

C486

2

2

Internal SRV

22U_0805_6.3V6M~D

C1177

R548
0_0805_5%~D

1 2

VPRO@

VPRO@

0.1U_0402_16V4Z~D

2

C487

1

VPRO@

2

1

+1.05V_M

0.1U_0402_16V4Z~D

C494

VPRO@

2

1

0.1U_0402_16V4Z~D

VPRO@

C483

22U_0805_6.3V6M~D

C1178

1

2

U31

CLKREQ_LAN#<26,35>

PCH_SMLCLK0<26>

PCH_SMLDATA0<26>

R557

@

1 2
1 2

R545 10K_0402_5%@
R546 10K_0402_5%@

1 2

3

3

VPRO@

CLK_LAN<26,35>
CLK_LAN#<26,35>

12

VPRO@

PLT_RST#<6,28,34,35,36,37,39,41,44>

LAN_1000_LED#<35>

D D

PCIE_PRX_C_LANTX_P1<26,35>

PCIE_PRX_C_LANTX_N1<26,35>

PCIE_PTX_C_LANRX_P1<26,35>

PCIE_PTX_C_LANRX_N1<26,35>

1 2

+3V_M

PM_LANPHY_ENABLE<29>

C C

LAN_X1 LAN_X2

2

1

@

R549 10K_0402_5%

1 2

R555 0_0402_5%VPRO@

10K_0402_5%

+3V_M

R1144 0_0402_5%VPRO@

25MHZ_20PF_7V25000016

Y4

1

1

33P_0402_50V8J

GND

GND

2

C485

VPRO@

Need to verify A3 silicon drive
power before removing C427
KDS crystal vender verify
driving level in A3

4

1 2

R564 0_0402_5% VPRO@

1 2
1 2

R563 0_0402_5% VPRO@
R560 0_0402_5% VPRO@

C469 0.1U_0402_10V7K VPRO@

C482 0.1U_0402_10V7K VPRO@

1 2

R556 0_0402_5% VPRO@

1 2

R558 0_0402_5% VPRO@

SMBus Device Address 0xC8

LAN_ACT_LED#<35>

LAN_10/100_ LED#<35>

T142 PAD
T143 PAD

12

33P_0402_50V8J

VPRO@

2

C493

1

1K_0402_5%

R561

PLT_RST#

12

12

CLKREQ_LAN#_R

CLK_LAN_R

PCIE_PRX_VLANTX_P1

PCIE_PRX_VLANTX_N1

PCIE_PTX_C_C_VLANRX_P1

PCIE_PTX_C_C_VLANRX_N1

PCH_SMLCLK0
PCH_SMLDATA0

LAN_DISABLE#_R

LAN_ACT_LED#
LAN_1000_LED#
LAN_10/100_ LED#

CLK_LAN#_R

TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK

XTALO
XTALI

LAN_TEST_EN

RES_BIAS

3.01K_0402_1%

12

R562

VPRO@

R1200 Resistor Value:

3.01 kohm for Hanksville-M LOM

2.37 kohm for Hanksville-D LOM

48

CLK_REQ_N

36

PE_RST_N

44

PE_CLKP

45

PE_CLKN

38

PETp

39

PETn

41

PERp

42

PERn

28

SMB_CLK

31

SMB_DATA

3

LAN_DISABLE_N

26

LED0

27

LED1

25

LED2

32

JTAG_TDI

34

JTAG_TDO

33

JTAG_TMS

35

JTAG_TCK

9

XTAL_OUT

10

XTAL_IN

30

TEST_EN

12

RBIAS

MDI_MINUS0

MDI_MINUS1

MDI

PCIE

MDI_MINUS2

MDI_MINUS3

RSVD_VCC3P3_1
RSVD_VCC3P3_2

SMBUS

VDD3P3_OUT

JTAG LED

82579_QFN48_6X6~D

VPRO@

MDI_PLUS0

MDI_PLUS1

MDI_PLUS2

MDI_PLUS3

RSVD_NC

VDD3P3_IN

VDD3P3_15
VDD3P3_19
VDD3P3_29

VDD1P0_47
VDD1P0_46
VDD1P0_37

VDD1P0_43

VDD1P0_11

VDD1P0_40
VDD1P0_22
VDD1P0_16

VDD1P0_8

CTRL_1P0

VSS_EPAD

13
14

17
18

20
21

23
24

6

1

+RSVD_VCC3P3_1

2

+RSVD_VCC3P3_2

5

4

15
19
29

47
46
37

43

11

40
22
16
8

7

REGCTL_PNP10

49

LAN_TX0+
LAN_TX0-

LAN_TX1+
LAN_TX1-

LAN_TX2+
LAN_TX2-

LAN_TX3+
LAN_TX3-

VPRO@

R553 4.7K_0402_1%~D

VPRO@

R554 4.7K_0402_1%~D

+3.3V_M_OUT

1

+1.0V_LAN

C490
1U_0603_10V6K~D

2

VPRO@

LAN_TX0+ <35>

LAN_TX0- <35>

LAN_TX1+ <35>

LAN_TX1- <35>

LAN_TX2+ <35>

LAN_TX2- <35>

LAN_TX3+ <35>

LAN_TX3- <35>

12
12

+3V_M

CLKREQ_LAN#

PCH_SMLCLK0

PCH_SMLDATA0

REGCTL_PNP10

Idc max=330mA

+1.0V_LAN

VPRO@

R1232 2.2K_0402_5%@

R1230 2.2K_0402_5%@

R1231 2.2K_0402_5%@

L29

@

1 2

4.7UH_CBC2012T4R7M_20%~D

Place R548, C462, C463 and L29 close to U31

VPRO@

VPRO@

0.1U_0402_10V7K~D

1

1

C488

2

2

Place C1178 close to pin5

Note:
+1.0V_LAN will work at 0.95V to 1.15V

+1.0V_LAN POWER OPTIONS

Shared with PCH

1.05V SVR

STUFF: R548
NO STUFF: L29

B B

+5VALW

R814
100K_0402_5%

VPRO@

1 2

2N7002E-T1-GE3_SOT23-3

PM_SLP_LAN#<41,50>

PM_SLP_LAN<45>

A A

Q50

13

D

VPRO@

2

G

S

5

PM_SLP_LAN

2N7002_SOT23-3

+3V_M

2

G

VPRO@

R462

470_0603_5%

VPRO@

1 2
13

D

Q60

S

+5VALW

R442
47K_0402_5%

VPRO@

1 2

PM_SLP_A

61

Q44A

PM_SLP_A#<41>

4

2

2N7002DW-T/R7_SOT363-6

+1.05VM_PCH

R461

470_0603_5%

VPRO@

1 2
3

Q44B

5

4

2N7002DW-T/R7_SOT363-6

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

PM_SLP_A#

2

C495

0.1U_0402_16V7K

@

1

2

C496

VPRO@
1

0.01U_0402_25V7K

4.7U_0805_10V4Z

+1.05V_M

13

D

2

Q56

G

VPRO@

S

AO3416_SOT23-3

1

C694

2

@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

C695
1U_0402_6.3V4Z

2

VPRO@

2

+1.05VM_PCH

2

C497

0.1U_0402_16V7K

VPRO@

1

PM_SLP_LAN

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

AO3413_SOT23

2

C498

@

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

+3VALW

S

Q57

G

2

D

1 3

VPRO@

1

1

C696

@

INTEL 82579

INTEL 82579

INTEL 82579

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

C698
1U_0402_6.3V4Z

2

2

VPRO@

42 59Wednesday, November 23, 2011

42 59Wednesday, November 23, 2011

1

42 59Wednesday, November 23, 2011

+3V_M

0.1

0.1

0.1

5

4

3

2

1

Power Button/ PWR/B Touch/B Connector

1

2

LEFT_BTN#

RIGHT_BTN#

D16

PJDLC05C_SOT23-3

1
2

4

1

C12

0.1U_0402_16V4Z

2

+3VS

+5VS

LEFT_BTN#
RIGHT_BTN#

2

3

1

1

C7

0.1U_0402_16V4Z

2

U6

GND

VOUT
VOUT

VIN
VIN3VOUT

FLG

EN

RT9715BGS_SO8

ESATA

+USB_VCCB

@

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS

TP_ON/OFF#<41>

PJDLC05C_SOT23-3

+USB_VCCE+5VALW

8
7
6
5

W=40mils

1

+

C9
220U_6.3V_M

2

Issued Date

Issued Date

Issued Date

C755

1 2

0.1U_0402_16V4Z

1

2

W=80mils

1

C4

2

4.7U_0805_10V4Z

3

TP_CLK <41>

TP_DATA <41>

1

1

@

@

C759

100P_0402_50V8J

C757

100P_0402_50V8J

2

2

SW7
SMT1-05-A_4P

3

4

5

12

R214

10K_0402_5%

TP_ON/OFF#

C8
1000P_0402_50V7K

1 2

R4
0_0402_5%

C14

0.1U_0402_16V4Z

1

C10

0.1U_0402_16V4Z

2

SW6
SMT1-05-A_4P

3

4

1

2

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

RIGHT_BTN#LEFT_BTN#

1

2

6

1

2

5

6

USB20_N1<28>

USB20_P1<28>

USB_OC4# <28,40>

C11
1000P_0402_50V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

1

4

USB20_N9<28>

USB20_P9<28>

SATA_PTX_DRX_P4<25>
SATA_PTX_DRX_N4<25>

SATA_PRX_C_DTX_N4<25>
SATA_PRX_C_DTX_P4<25>

Deciphered Date

Deciphered Date

Deciphered Date

R1 0_0402_5%

1 2

L3

1

2

3

4

WCM-2012-900T_0805

1 2

R5 0_0402_5%

2

2

USB20_N1_R

@

3

USB20_P1_R

PJDLC05_SOT23-3

R163 0_0402_5%

1 2

L57

1

1

4

4

WCM-2012-900T_0805

1 2

R162 0_0402_5%

C2055 0.01U_0402_25V7K
C2054 0.01U_0402_25V7K

C2052 0.01U_0402_25V7K
C2053 0.01U_0402_25V7K

2

USB20_N9_RMEDIA_LED#

2

@

3

USB20_P9_R

3

12
12

12
12

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+USB_VCCB

1
2
3
4

2

3

D11

@

1

+USB_VCCE

SATA_PTX_C_DRX_P4
SATA_PTX_C_DRX_N4

SATA_PRX_DTX_N4
SATA_PRX_DTX_P4

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PWR/TP/LED

PWR/TP/LED

PWR/TP/LED

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Wednesday, November 23, 2011

JUSB1

GND

VCC

GND

D-

GND

D+
GND

GND

SANTA_360117-1

CONN@

D13

2

3

PJDLC05_SOT23-3

@

JESATA

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

A+

7

A-

8

GND

9

B-

10

B+

11

GND

FOX_3Q318111-R33C3-7F

CONN@

1

5
6
7
8

1

USB

ESATA

SHIELD
SHIELD
SHIELD
SHIELD

43 59

43 59

43 59

12
13
14
15

0.1

0.1

0.1

+3VALW

TOP Side

12

R152 10K_0603_5%@

12

R153 10K_0603_5%@

Bottom Side

D D

C C

WL&BT LED

+3VS

+5VS

ON/OFFBTN#_R

JP7

1

1

2

2

3

3

4

4

5

5

6

9

6

G1

7

10

7

G2

8

8

ACES_51524-0080N-001

CONN@

1 2

R211 220_0402_5%

HT-191UYG5 0603 YELLOW GREEN

EC_ON<41,49>

10K_0402_5%

PWR_ON_LED#
ON/OFFBTN#_R
KSO0
KSI0
KSI2
KSI6

LED2

2 1

R154

100K_0402_5%

D8

1

CHN202UPT SC-70

2

G

R155

@

1 2

+5VALW

KSO0 <40,41>
KSI0 <40,41>
KSI2 <40,41>
KSI6 <40,41>

12

R210

10K_0402_5%

5

3

Q229B 2N7002DW-T/R7_SOT363-6

HDD LED

12

LED4

R199

10K_0402_5%

5

3

Q210B 2N7002DW-T/R7_SOT363-6

+3VS

1 2

+5VS

R200 220_0402_5%

B B

2 1

HT-191USD 0603 RED

BATT CHARGE/FULL LED

LED5

+5VALW

2 1

4 3

HT-297USD/UYG 0603 RED/YELLOW GREE

RED

B

A

1 2

R203 220_0402_5%

YELLOW GREEN

1 2

R204 220_0402_5%

PWR ON LED

LED6

+5VALW

A A

+5VS

2 1

HT-191UYG5 0603 YELLOW GREEN

1 2

R215 220_0402_5%

1 2

R202 220_0402_5%

LED8

2 1

LED 19-213A/T1D-CP2Q2HY/3T 0603 WHITE

5

+3VL

R156

@

100K_0402_5%

1 2

13

D

Q19
2N7002_SOT23-3

@

S

2

6 1

Q229A

4

2

6 1

Q210A

4

TP_LED#

1 2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

ON/OFFBTN# <41>

51_ON# <44,47>

1 2

R1442
0_0402_5%

MEDIA_LED#

BATT_CHG/LOW_LED# <41>

BATT_FULL_LED# <41>

PWR_ON_LED#

Q6

13

D

2N7002_SOT23-3

2

G

S

TP_LED# <41>

LED_WLAN# <36>

WL_BT_LED# <41>

2

3

Vf=2.1V(typ),2.4V(max) for amber
Vf=2.2V(typ),2.4V(max) for green
If=25mA(max)

Left USB

SYSON#<40,45>

5IN1_LED#<37>

SATA_LED#<25>

PWR_ON_LED <41>

4

SUSP<6,11,40,45>

5

4

@

2

1 2

R85 0_0402_5%

JTP

8

GND

7

GND

6

6

5

5

4

4

3

3

2

2

1

1

ACES_85201-0605N

CONN@

SW8
SMT1-05-A_4P

3

4

5

6

TP_CLK

TP_DATA

2

3

D18

1

+USB_VCCB

W=40mils

1

+

C2
220U_6.3V_M

2

C3

12

0.1U_0402_16V4Z

1 2

R9 0_0402_5%

1 2

R10 0_0402_5%@

@

2N7002DW-T/R7_SOT363-6@

3

Q230B

61

Q230A

2N7002DW-T/R7_SOT363-6

+3VS

5

4

3

2

1

EMI And ESD

Reserve R199,C207,R226,C208 <EMI> 0601

D D

CLK_SIO_48M CLK_PCI_SIO

CR7

10_0402_5%

4.7P_0402_50V8C

1 2

1

CC1

2

Place closely pin 1Place closely pin 18

10_0402_5%

4.7P_0402_50V8C

CR8

CC2

@

1 2

1

@

2

LPC_AD0<25,34,41>
LPC_AD1<25,34,41>
LPC_AD2<25,34,41>
LPC_AD3<25,34,41>

LPC_FRAME#<25,34,41>
CLK_PCI_SIO<28>
CLK_SIO_48M<26>
PM_CLKRUN#<27,34>

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#
CLK_PCI_SIO
CLK_SIO_48M
PM_CLKRUN#

Add CR7,CC1 for EMI test fail issue--0929-2011

Reserve C292 for SIO_RST# <ESD> 0608

PLT_RST#

C C

0.1U_0402_16V7K

PWR USB

R149 0_0402_5%

1 2

L54

B B

USB20_N3<28>

USB20_P3<28>

USB20_N4<28>

USB20_P4<28>

2

2

3

3

WCM-2012-900T_0805

1 2

R148 0_0402_5%
R137 0_0402_5%

1 2

2

2

3

3

WCM-2012-900T_0805

1 2

R127 0_0402_5%

1

1

@

4

4

L53

1

1

@

4

4

1

CC4

2

@

C5

12

0.1U_0402_16V4Z

USB_EN#<41>

USB20_N3_R

USB20_P3_R USB20_P3_R

USB20_N4_R

USB20_P4_R

PWR_USB_ON#

12

R1381
0_0402_5%

10K_0402_5%

1

BAV70W_SOT323-3

1

C676

0.1U_0402_16V4Z

2

@

D26

2

3

R582

12

1
2

4

51_ON#

U7

GND

VOUT
VOUT

VIN
VIN3VOUT
EN

RT9715BGS_SO8

4.7U_0805_10V4Z

+3VALW+3VL

12

R581

@

10K_0402_5%

CU13

COM@

3

LAD0

4

LAD1

5

LAD2

6

LAD3

2

LFRAME#

1

LCLK

18

CLKIN

9

CLKRUN#

22

DFT_EN

24

VSS

KC3820_QFN24

+USB_VCCA+5VALW

W=80mils

8
7
6
5

FLG

PWR_USB_EN#

1 2

R8

1

0_0402_5%

C6

2

change from +3VALW to +3VL
since EC power source changed.

--Joyce 1110

GPIO00
CTS0/GPIO01
RTS0/GPIO02
DSR0/GPIO03
DTR0/GPIO04

DCD0/GPIO05

RI0/GPIO06

SIN1/GPIO07

SOUT1/GPIO08

SOUT0

SIN0

SIRQ#

LRST#

VCC

0.1U_0402_16V4Z

USB_OC1# <28>

PWR_USB_EN# <41>

51_ON# <43,47>

21
12
13
14
15
16
17
19
20

11
10
8
7

23

SIO_GPIO00
CTS1#
RTS1#
DSR1#
DTR1#
DCD1#
RI1#

TXD1
RXD1
SERIRQ

PLT_RST#_R

1

CC3

2

1 2

CR9
0_0402_5% COM@

+3VS

COM@

PLT_RST#PLT_RST#PLT_RST#

SERIRQ <25,34,41>
PLT_RST# <6,28,34,35,36,37,39,41,42>

+3VS

1 2

CR1 4.7K_0402_5%@

1 2

CR2 4.7K_0402_5%@

1 2

CR3 4.7K_0402_5%@

1 2

CR4 4.7K_0402_5%@

1 2

CR5 4.7K_0402_5%COM@

1 2

CR6 4.7K_0402_5%@

Base Address Selection
mount : 4E unmount : 2E

SIO_GPIO00

CR10

@

470_0402_5%

1 2

W=60mils

USB20_N4_R
USB20_P4_R

USB20_N3_R

TXD1
RXD1
CTS1#
RTS1#

DSR1#
DTR1#
DCD1#
RI1#

NUM_LED#<41>
CAPS_LED#<41>

+3VS

NUM_LED#
CAPS_LED#

PWR_USB_ON#

LPC_AD0

LPC_AD1

LPC_AD2

LPC_AD3

LPC_FRAME#

SERIRQ

+USB_VCCA

JP1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

G1

26

G2

E&T_6916-Q26N-00R

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

POWER USB / COM

POWER USB / COM

POWER USB / COM

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

44 59Wednesday, November 23, 2011

44 59Wednesday, November 23, 2011

44 59Wednesday, November 23, 2011

1

0.1

0.1

of

0.1

5

+3VALW TO +3VS

Vgs=-0V,Id=9A,Rds=18.5mohm

+3VALW +3VS

1
2
3
4

1

2

0.022U_0402_25V7K

1

C824

2

1U_0402_6.3V4Z

C831

12

R787
330K_0402_5%

Q32

8

S

D

7

S

D

6

S

D

5

G

1

2

4.7U_0805_10V4Z

D

SI4800BDY_SO8

C830

D D

2

C847

1

0.1U_0402_16V7K

1

C825 4.7U_0805_10V4Z

2

1 2

R784

47K_0402_5%

61

2N7002DW-T/R7_SOT363-6

+VSB

Q35A

2

2N7002DW-T/R7_SOT363-6

R781

5

4

0.1U_0402_16V7K

0.1U_0402_16V7K

2

C843

1

470_0805_5%

1 2
3

Q35B

4

0.1U_0402_16V7K

3

+5VALW

2

C844

1

Q33

S

D

S

D

S

D

G

D

SI4800BDY_SO8

0.01U_0402_25V7K

1

1U_0402_6.3V4Z

2
3
4

1

C833

2

8
7
6
5

2

1

C846

C832

1

2

4.7U_0805_10V4Z

RUN_ON

+5VS

C826

12

R788
330K_0402_5%

1

2

1 2

47K_0402_5%

61

2N7002DW-T/R7_SOT363-6

1

C827

4.7U_0805_10V4Z

2

R785

+VSB

Q36A

2

2N7002DW-T/R7_SOT363-6

5

SUSPSUSP

R782

470_0805_5%

1 2
3

Q36B

4

2

2

C845

C842

1

1

0.1U_0402_16V7K

0.1U_0402_16V7K

Vgs=10V,Id=14.5A,Rds=6mohm

+1.5V

8
7
6
5

1

2

4.7U_0805_10V4Z

+1.5V to +1.5VS+5VALW TO +5VS

Q34

D
D
D
D

SI4856ADY_SO8

FDS6676AS

C834

2

+1.5VS

1

1

S
S
S

G

C828

2

1U_0402_6.3V4Z

2

3
4

12

1

2

0.1U_0603_25V7K

C835

R789
820K_0402_5%

1

C829

4.7U_0805_10V4Z

2

1 2

R786

220K_0402_5%

61

2N7002DW-T/R7_SOT363-6

+VSB

Q37A

2

SUSP

2N7002DW-T/R7_SOT363-6

R783

1

470_0805_5%

1 2
3

Q37B

5

4

+3VS to +3VS_DGPU

+3VS +3VS_DGPU

2

C491

0.1U_0402_16V7K

OPT@

C C

DGPU_PWR_EN#

1 2

R426

47K_0402_5%

OPT@

1

AO3413_SOT23

2

C492

0.01U_0402_25V7K

1

@

+1.05VS_DGPU

+1.05VS_PCH

1

C852

10U_0603_6.3V6M

B B

+VSB

A A

PM_SLP_LAN<42>

2

OPT@

OPT@

R808 200K_0402_5%

DGPU_PWR_EN#

DMN66D0LDW-7_SOT363-6

+1.05V_M

Q197A

8
7
6
5

12

2

Q227A

OPT@

2

J4

112

JUMP_43X79

Q40

1

S

D

2

S

D

3

S

D

4

G

D

SI4800BDY_SO8

OPT@

61

+1.05VS_VCCP

R1447

470_0805_5%

VPRO@

1 2

+1.05V_M_R

61

Q197B

5

SUSP SYSON#

2N7002DW-T/R7_SOT363-6

5

@

2

1

2

1 2

+VCCP_R

3

4

+1.05VS_DGPU

1

2

C848

0.1U_0603_25V7K

OPT@

R1445

470_0805_5%

2N7002DW-T/R7_SOT363-6

OPT@

10U_0603_6.3V6M

2

Q54

C854

OPT@

2

G

1

2

+1.5V

1 3

1U_0603_10V4Z

12

+1.5V_R

61

S

D

C853

OPT@

R1446
470_0805_5%

2N7002DW-T/R7_SOT363-6

1

C697
1U_0402_6.3V4Z

2

OPT@

R805
470_0603_5%

OPT@

1 2

34

5

DGPU_PWR_EN#

Q227B

DMN66D0LDW-7_SOT363-6

OPT@

RUN_ON_CPU1.5VS3#<6,10>

Q198A

SUSP

R463

0_0402_5%

4

+1.5V

4.7U_0805_10V4Z

PCH_PWR_EN#<31>

PCH_PWR_EN<41>

R460

@

+1.5V to +1.5VSDGPU

+1.5VSDGPU

Q43

8

S

D

7

S

D

6

S

D

5

G

D

FDS6676AS_SO8

OPT@

1

C473

OPT@

2

2N7002E-T1-GE3_SOT23-3

+0.75VS

12

+0.75VS_R

3

0_0402_5%

5

4

OPT@

R826
22_0603_5%

Q198B

C478

1
2
3
4

1U_0402_6.3V4Z

1

C481

2

0.1U_0402_25V6

100K_0402_5%

PCH_PWR_EN#

12

R816

100K_0402_5%

@

2N7002DW-T/R7_SOT363-6

1

OPT@

2

12

R430
820K_0402_5%

OPT@

VGA_PWROK<13,26,29,57>

+5VALW

R813

@

Q49

@

2

G

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Vgs=10V,Id=14.5A,Rds=6mohm

1

C475

OPT@

4.7U_0805_10V4Z

2

1 2

R431

OPT@

Q13A

2

VGA_PWROK#

OPT@

2

G

2

DGPU_PWR_EN#

3

+VSB

13

D

S

220K_0402_5%

61

2N7002DW-T/R7_SOT363-6

1 2

+3VS_DGPU

13

D

R458
470_0603_5%

S

Issued Date

Issued Date

Issued Date

OPT@

1 2

61

Q225A
2N7002DW-T/R7_SOT363-6

OPT@

R429

OPT@

470_0805_5%

1 2
3

Q13B

5

2N7002DW-T/R7_SOT363-6

OPT@

4

+5VALW

R146

1 2

OPT@

100K_0402_5%

Q188

2N7002_SOT23-3

OPT@

+VGA_CORE

R459

470_0603_5%

OPT@

1 2

3

5

4

2011/09/23 2011/12/30

2011/09/23 2011/12/30

2011/09/23 2011/12/30

DGPU_PWR_EN<26,28,57> SUSP# <10,39,41,50,51,52,57>

Q225B
2N7002DW-T/R7_SOT363-6

OPT@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

+3VALW TO +3VALW(PCH AUX Power)

Short J1 for PCH VCCSUS3.3

+3VALW

J1

112

JUMP_43X79

SI7326DN-T1-E3_PAK1212-8

U25

@

1

C837

10U_0603_6.3V6M

20mil 10mil

+VSB

DGPU_PWR_EN# SYSON# SUSP

2N7002_SOT23-3

R441

4.7K_0402_5%

@

2

@

@

R807 200K_0402_5%

PCH_PWR_EN#

DMN66D0LDW-7_SOT363-6

+5VALW +5VALW+5VALW

R797
100K_0402_5%

OPT@

1 2

OPT@

Q191

13

D

2

G

S

1 2

2

4

12

3V_GATE

61

2

Q46A

@

R1453
100K_0402_5%

SYSON#<40,43>

2N7002DW-T/R7_SOT363-6

SYSON<39,41,52>

12

R70

10K_0402_5%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+3VALW_PCH

@

2

1
2
35

Q201B

1

@

2

2

C836

0.1U_0402_16V7K

@

1

1 2

3

5

4

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DC-DC INTERFACE

DC-DC INTERFACE

DC-DC INTERFACE

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Wednesday, November 23, 2011

40mil

C839

10U_0603_6.3V6M

1

@

C838

2

1U_0402_6.3V4K

R796

100K_0402_5%

1 2

61

Q201A
2N7002DW-T/R7_SOT363-6

2

R440

12

R804
470_0402_5%

@

34

5

PCH_PWR_EN#

Q46B

DMN66D0LDW-7_SOT363-6

@

SUSP <6,11,40,43>

1 2

4.7K_0402_5%

45 59

45 59

45 59

1

0.1

0.1

0.1

5

4

3

2

1

Power block

CPU OTP

D D

B+

+3VALWP: TDC:6A
+5VALWP: TDC:6.1A

DC IN

Input
Switch

Page 57

RT8205LZQW(2) WQFN

Page 56

Turn Off

Always

Page 52

CHARGER
CC:0A~3.64A
CV:12.6V(6cell)
BQ24725RGRR

Page 57

C C

Battery

SUSP#

B B

+VGA_CORE
TDC:23A
TPS51212DSCR

Page 65

+1.8VP: TDC:1.2A
SY8033BDBC

+VCCPP: TDC:16.5A
TPS51212DSCR

+1.5VP: TDC:16A

0.75VS: TDC :2A
RT8207MZQW

Page 59

Page 60

Page 62

SUSP#

SUSP#

SYSON

SUSP#

+VCCSAP: TDC:4.2A

5

+VCC_CORE
TDC: 52A
NCP6132A

+GFX_CORE
TDC: 21.5A
NCP6132A

Page 64

Page 64

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VR_ON

A A

VR_ON

TPS51461RGER

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2011/10/31 2012/12/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Page 63

2

+V1.05S_VCCP_PWRGOOD

Compal Electronics, Inc.

Title

Title

Title

POWER BLOCK DIAGRAM

POWER BLOCK DIAGRAM

POWER BLOCK DIAGRAM

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

QAQ10, LA-8581P MB

QAQ10, LA-8581P MB

QAQ10, LA-8581P MB

Date: Sheet of

Date: Sheet of

Date: Sheet of

0.1

0.1

46 59Wednesday, November 23, 2011

46 59Wednesday, November 23, 2011

46 59Wednesday, November 23, 2011

1

0.1

A

DCIN jack P/N:DC301008L00,
need doble confirm P/N with ME

PJPDC1

V+

GND

1 1

2 2

GND
GND
GND

SANTA_322121-1

PJP1

11

GND

10

GND

SINGA_2BA1514-000111F

<BOM Structure>

9
8
7
6
5
4
3
2
1

ADPIN

1
2
3
4
5

9
8
7
6
5
4
3
2
1

EC_SMCA

PD1

PJSOT24CW_SOT323-3

2

12

PC1

1000P_0402_50V7K

1

EC_SMDA

3

PD2

2

TH

3

PJSOT24CW_SOT323-3

12

PR17
1K_0402_1%

PL1

HCB2012KF-121T50_0805

1 2

PL2

HCB2012KF-121T50_0805

1 2

12

PC2

100P_0402_50V8J

BATT_B/I

12

1

PR16

6.49K_0402_1%

PR12
1K_0402_1%

12

12

PC3

1000P_0402_50V7K

+3VL

B

VIN

12

HCB2012KF-121T50_0805

VMB

HCB2012KF-121T50_0805

12

PC6
1000P_0402_50V7K

PC4

100P_0402_50V8J

PL3

1 2

PL4

1 2

PH1 under CPU botten side :
CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C

H_PROCHOT#<6,41>

H_PROCHOT#_EC<41>

12

PC7

0.01U_0402_25V7K

BATT+

B+

VL

PR14

100K_0402_1%

SPOK<49>

1 2

PR15
0_0402_5%

1 2

VSB_N_002

12

PC10

.1U_0402_16V7K

C

PQ1

13

D

2

ADP_OCP_1

G

SSM3K7002FU_SC70-3

S

PR9
0_0402_5%

1 2

PR13

22K_0402_1%

1 2

VSB_N_003

13

D

2

PQ3

G

SSM3K7002FU_SC70-3

S

D

For KB930 --> Keep PU1 circuit
(Vth = 0.825V)

For KB9012 (Red square) --> Remove PU1 circuit, but keep
PH1, PR1, PR2,PR7,PR9,PQ1

PC503

0.1U_0402_10V7K

VCIN0_PH

+3VL

12

PR2

13.7K_0402_1%

12

<41>

ADP_I<41,48>

12

12

PC9

PR11

100K_0402_1%

VSB_N_001

PR1

12K_0402_1%

TP0610K-T1-E3_SOT23-3

0.22U_0603_25V7K

1 2

PR7

<41>

1 2

VCIN1_PH

13

2

PQ2

10K_0402_1%

+VSB

12

PC8

0.1U_0603_25V7K

12

PH1

100K_0402_1%_NCP15WF104F03RC

PR18

100_0402_1%

3 3

1 2

RTC Battery

PBJ1

- +

MAXEL_ML1220T10

4 4

SP093MX0000

Change RTC For Cost Down

PR19
100_0402_1%

1 2

PR24

12

560_0603_5%

1 2

+RTCBATT1 +RTCBATT2

Must close PBJ1

PR25

560_0603_5%

1 2

+RTCBATT

BATT_TEMPA <41>

EC_SMB_DA1 <41,48>

EC_SMB_CK1 <41,48>

BATT+

51_ON#<43,44>

PD21

LL4148_LL34-2

100K_0402_1%

1 2

PR303

22K_0402_1%

12

PR302

12

TP0610K-T1-E3_SOT23-3

N1

12

PC500

0.22U_0603_25V7K

VS_N_002

PQ100

VIN

PD20
RLS4148_LL34-2

1 2

VS_N_001

12

PR300

68_1206_5%

13

12

PC501

0.1U_0603_25V7K

2

12

PR301
68_1206_5%

VS

For KB9012 --> Remove all 51_ON# circuit

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

2012/12/312011/10/31

2012/12/312011/10/31

2012/12/312011/10/31

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR-DCIN / BATT CONN / OTP

PWR-DCIN / BATT CONN / OTP

PWR-DCIN / BATT CONN / OTP

QAQ10, LA-8581P MB

D

47 59Wednesday, November 23, 2011

47 59Wednesday, November 23, 2011

47 59Wednesday, November 23, 2011

0.1

0.1

0.1

A

B

C

D

for reverse input protection

1

D

PQ5

2

BQ24725_PROT

1 1

PQ9

BQ24725_VCC1

PR32

100K_0402_1%

2 2

BQ24725_VCC_EN1

13

GREEN_LATCH#

2

G

PR33

1 2

22K_0402_1%

D

PQ11
SSM3K7002FU_SC70-3

S

1 2

TP0610K-T1-E3_SOT23-3

1 2

PC28

0.22U_0603_25V7K

BQ24725_VCC_EN

IRF8707GTRPBF_SO8

VIN

8
7
6
5

12

PC24

2200P_0402_50V7K

2

12

PR39

0_0402_5%

PR26

1 2

1M_0402_5%

PQ7

13

BQ24725_VCC2

1
2
3

4

BQ24725_ACDRV_1

1 2

3M_0402_5%

Vin Dectector

Min. Typ Max.
H-->L 17.23V
L--> H 17.63V

ILIM and external DPM

3.97A

3 3

4 4

For KB930 --> Keep PR44

For KB9012 (Red square) --> Remove PR44
Keep PR45

PR27

P1

12

G

S

3

12

PR30

@0_0402_5%

12

SI1304BDL-T1-E3_SC70-3

PQ8

IRF8707GTRPBF_SO8

1
2
3

4

PC13

0.1U_0402_25V6

12

PR35

PR34

4.12K_0603_1%

4.12K_0603_1%

P3P2

PL5

1UH_VMPI0703AR-1R0M-Z01_11A_20%

8
7
6

1 2

5

12

PC14

ACIN<13,27,41>

10U_0805_25V6K

+3VALW

+3VL

PC15

10U_0805_25V6K

12

VIN

1 2

12

PR48

255K_0402_1%

PR28

0.01_2512_1%

1

2

PC27

PC25

1 2

0.1U_0402_25V6

0.1U_0603_25V7K

BQ24725_ACP

BQ24725_CMSRC

BQ24725_ACDRV

PR44

1 2

@10K_0402_1%

PR45

1 2

1M_0402_1%

PR46

1 2

10K_0402_1%

BQ24725_PRECHG

12

4

3

BQ24725_ACN

BQ24725_ACOK

12

12

PC43

0.1U_0402_25V6

B+

VIN

2

3

PD4

1

BAS40CW_SOT323-3

12

BQ24725_VCC1

PC26

0.1U_0402_25V6

BQ24725_VCC2

12

PR36

10_1206_1%

PC30

1 2

BQ24725_VCC

1U_0603_25V6K

20

PU3

21

VCC

PAD

1

ACN

2

ACP

BQ24725ARGRR_VQFN20_3P5X3P5

3

CMSRC

4

ACDRV

5

ACOK

ACDET

6

PR50

BQ24725_ACDET

154K_0402_1%

PR53

PR52

100_0402_5%

66.5K_0402_1%

12

PC44 .1U_0402_16V7K

Please locate the RC
Near EC chip

PC16

10U_0805_25V6K

0.047U_0402_25V7K

PC29

1 2

BQ24725_BST1

12

PR37

BQ24725_LX

DH_CHG

BQ24725_BST

17

18

19

BTST

HIDRV

PHASE

IOUT7SDA8SCL9ILIM

BQ24725_IOUT

1 2

12

PC17

12

0_0603_5%

BQ24725_REGN

16

REGN

LODRV

BATDRV

10

12

12

12

PC18

10U_0805_25V6K

@10U_0805_25V6K

PD5
RB751V-40_SOD323-2

DH_CHG

PC31

1 2

1U_0603_25V6K

15

DL_CHG

14

GND

13

SRP

SRP

12

SRN

SRN

11

BQ24725_BATDRV

BQ24725_ILIM

12

PC41

PR49

100K_0402_1%

0.01U_0402_25V7K

EC_SMB_CK1 <41,47>

EC_SMB_DA1 <41,47>

ADP_I <41,47>

12

1 2

PR38

0_0402_5%

10_0603_1%

1 2

6.8_0603_1%

1 2

1 2

316K_0402_1%

12

12

PC21

PC20

PC19

2200P_0402_25V7K

@10U_0805_25V6K

PR42

PR43

PR47

0.1U_0402_25V6

5

4

DH_CHG1

4

CSOP1

12

CSON1

PC39

+3VALW

0.1U_0603_16V7K

VIN

PR51
309K_0402_1%

1 2

GREEN_PWR3 GREEN_PWR4

1 2

PR55

47K_0402_1%

10K_0402_5%

12

PC45

0.1U_0402_10V7K

74LVC1G17GW TSSOP

12

PC22

BQ24725_BATDRV

@820P_0402_25V7

PQ10
SIS412DN-T1-GE3_POWERPAK8-5

4.7UH_ETQP3W4R7WFN_5.5A_20%

123

BQ24725_LX

5

PQ12

12

AON7406L_DFN8-5

123

BQ24725_SNUB

12

PR54

1 2

GREEN_PWR#

+3VL

1

5

PU7

P

NC

4

A2Y

G

3

PL6

1 2

PR41

@4.7_1206_5%

PC40

@680P_0402_50V7K

1

2

GREEN_PWR<41>

IRF8707GTRPBF_SO8

8
7
6
5

1 2

BQ24725_BATDRV_1

PR31

4.12K_0603_1%

1

CHG_OUT

2

CSOP1

12

PC35

0.1U_0402_25V6

PU4

MC74VHC1G08DFT2G_SC70-5

5

VCC

IN1

4

OUT

IN2

GND

3

PQ6

PR40

0.02_1206_1%

GREEN_PWR1

1
2
3

4

4

3

CSON1

12

1

INB

2

INA

PR56 @0_0402_5%

1 2

PR58
100K_0402_5%

1 2

12

PC23

0.01U_0402_50V7K

12

12

PC32

PC38

0.1U_0402_25V6
@820P_0402_25V7

5

PU5

P

4

GREEN_PWR2

O

G

74LVC1G02_04_SOT353

3

12

PR29

@0_0402_5%

BATT+

12

PC34

10U_0805_25V6K

+3VL

5

PU6

1

P

INB

2

INA

G

74LVC1G02_04_SOT353

3

GREEN_LATCH1

12

PC36

PC37

0.01U_0402_50V7K

2200P_0402_50V7K

12

PC42

@0.1U_0402_10V6K

4

O

PR57
0_0402_5%

1 2

GREEN_LATCH#

12

PC33

10U_0805_25V6K

GREEN_PWR5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2011/10/31 2012/12/31

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PWR-CHARGER

PWR-CHARGER

PWR-CHARGER

QAQ10, LA-8581P MB

D

of

48 59Wednesday, November 23, 2011

of

48 59Wednesday, November 23, 2011

of

48 59Wednesday, November 23, 2011

0.1

0.1

0.1

A

B

C

D

E

2VREF_51125

12

PC46

1 1

1U_0603_16V6K

PR59

13.7K_0402_1%

1 2

12

PC47

0.1U_0402_25V6

+3VALWP

B++

+3VLP

12

PC48

12

PC49

2200P_0402_50V7K

4.7U_0805_25V6-K
SIS412DN-T1-GE3_POWERPAK8-5

PL8

4.7UH_ETQP3W4R7WFN_5.5A_20%

1

+

PC56

2

150U_B_6.3VM_R35M

12

PR69

12

@4.7_1206_5%

SNUB_3V

12

PC58

@680P_0402_50V7K

PQ13

5

123

5

123

4

10U_0805_6.3V6M

UG_3V_1

PQ15

4

AON7406L_DFN8-5

PC53

PC54

0.1U_0402_10V7K

1 2

LX_3V

51125_PWR

12

PR67

1 2

0_0402_5%

1 2

95.3K_0402_1%

PR65

1 2

2.2_0402_5%

LG_3V

PR71

499K_0402_1%

PR72

B+

2 2

PL7

HCB2012KF-121T50_0805

1 2

154K_0402_1%

BST_3V

UG_3V

12

PR61

20K_0402_1%

1 2

PR63

1 2

25

7

8

9

10

11

12

12

PC59
1U_0603_10V6K

PU8

P PAD

VO2

VREG3

BOOT2

UGATE2

PHASE2

LGATE2

FB_3V

ENTRIP2

5

6

ENTRIP2

EN

14

13

51125_PWR

3

4

FB2

TONSEL

SKIPSEL

15

12

2VREF_51125

3 3

SSM6N7002FU_US6

2.2K_0402_1%

1 2

PR319

100K_0402_1%

1 2

1 2

0_0402_5%

EC_ON<41,43>

VCOUT0_PH<41>

VS

4 4

PQ17A

PR74

PR76

12

ENTRIP1

61

D

2

N_3_5V_001

G

S

N_3_5V_002

12

PR320

42.2K_0402_1%

13

2

PC63

4.7U_0805_25V6-K

ENTRIP2

34

D

5

G

PQ18
DRC5115E0L_SOD323-3

S

PR75

1 2

100K_0402_5%

PQ17B

SSM6N7002FU_US6

Vin

PD7

VL

BATT+

12

1SS355_SOD323-2

PD9

12

1SS355_SOD323-2

PD6

1SS355_SOD323-2

PR77

100_0805_5%

1 2

51125_PWR2

12

0.1U_0603_25V7K

PR60

30.9K_0402_1%

1 2

PR62
20K_0402_1%

1 2

FB_5V

1 2

ENTRIP1

2

1

FB1

REF

ENTRIP1

VO1

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

VIN16GND

17

RT8205LZQW(2)_WQFN24_4X4

12

PC61

4.7U_0805_10V6K

PC62

0.1U_0603_25V7K

51125_PWR1

12

PC64

PR64
137K_0402_1%

24

23

22

BST_5V

21

20

19

VL

PR73

0_0603_5%

1 2

12

PD8
GLZ27D_LL34-2

UG_5V

LX_5V

LG_5V

PR66

2.2_0402_5%

1 2

51125_PWRB+

PC50

PR68

B++

0.1U_0402_25V6

BST1_5VBST1_3V

12

PC51

2200P_0402_50V7K

1 2

0_0402_5%

SPOK <47>

+5VALWP

+3VALWP

12

12

PC52

10U_0805_25V6K

PC55

0.1U_0402_10V7K

1 2

4

UG_5V_1

4

AON7702L_DFN8-5

PJP2

1 2

PAD-OPEN 4x4m
PJP3

1 2

PAD-OPEN 4x4m

+3VLP +3VL

+3VLP

5

PQ14

SIS412DN-T1-GE3_POWERPAK8-5

123

5

PQ16

123

+5VALW

+3VALW

PJP4

2 1

PAD-OPEN 2x2m

PJP5

2 1

PAD-OPEN 2x2m

PL9

4.7UH_ETQP3W4R7WFN_5.5A_20%

1 2

12

1

PR70

@4.7_1206_5%

SNUB_5V

12

PC60

@680P_0402_50V7K

+

PC57

2

150U_B_6.3VM_R35M

(6A,200mils ,Via NO.= 12)

(4A,120mils ,Via NO.= 8)

+CHGRTC

+5VALWP

For KB930 --> Keep PR319, Remove PR74

For KB9012 (Red square) --> Remove PR319
Keep PR74

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2011/10/31 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PWR-3.3VALWP/5VALWP

PWR-3.3VALWP/5VALWP

PWR-3.3VALWP/5VALWP

QAQ10, LA-8581P MB

QAQ10, LA-8581P MB

QAQ10, LA-8581P MB

49 59Wednesday, November 23, 2011

49 59Wednesday, November 23, 2011

49 59Wednesday, November 23, 2011

E

0.1

0.1

0.1

A

1 1

B

C

D

+5VALW

2 2

PL12

VPRO@

HCB1608KF_0603

+5VALW

3 3

PM_SLP_LAN#<41,42>

1 2

PR85

1 2

100K_0402_1%

VPRO@

SUSP#<10,39,41,45,51,52,57>

12

PC71

VPRO@

22U_0805_6.3VAM

EN_+1.05V_MP

1 2

+1.05V_MP_VIN

PR87

@

300K_0402_5%

1 2

PR80 0_0402_5%

12

1 2

12

PC65
22U_0805_6.3VAM

EN_1.8VSP

@47K_0402_5%

PU10

VPRO@

10

9

8

5

PC75

@

0.1U_0402_10V7K

VIN_1.8VSP

12

PR81

4

LX

PVIN

PG

LX

PVIN

SVIN

FB

EN

TP

NC

7

1

11

SY8033BDBC_DFN10_3X3

2

3

6

NC

PL10

HCB1608KF-121T30_0603

12

PC69

@0.1U_0402_10V7K

+1.05V_MP_LX

+1.05V_MP_FB

PU9

10

PVIN

9

PVIN

8

SVIN

5

EN

11

4

2

LX_1.8VSP

LX

PG

3

LX

6

FB

TP

NC

NC

7

1

SY8033BDBC_DFN10_3X3

PJP7

1 2

VPRO@

PR83

4.7_1206_5%

PC76

1 2

PL13

VPRO@

7.5K_0402_1%

VPRO@

10K_0402_1%

PAD-OPEN 3x3m

PR84

PR86

+1.8VSP

0.47UH_MMD-04AB-R47M-V2_6A_20%

12

SNUB_+1.05V_MP

12

12

SNUB_1.8VSP

12

12

PC72

VPRO@

12

PL11

0.47UH_MMD-04AB-R47M-V2_6A_20%

1 2

12

PR79

20K_0402_1%

PR78

4.7_1206_5%

FB_1.8VSP

12

PR82

10K_0402_1%

PC70

680P_0402_50V7K

(3A,120mils ,Via NO.= 6)

+1.8VS

12

68P_0402_50V

12

12

PC73

PC74

VPRO@

22U_0805_6.3VAM

22U_0805_6.3VAM

VPRO@

12

PC66

68P_0402_50V8J

+1.05V_MP

+1.8VSP

12

12

PC68

PC67

22U_0805_6.3VAM

22U_0805_6.3VAM

<Vo=1.05V> VFB=0.6V
Vo=VFB(1+PR401/PR402)=0.6*(1+7.5K/10K)=1.05V

VPRO@

680P_0603_50V7K

+1.05V_MP

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PJP8

1 2

PAD-OPEN 3x3m

C

(1.3A, 52mils, Via NO.= 3)

+1.05V_M

2012/12/312011/10/31

2012/12/312011/10/31

2012/12/312011/10/31

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR-1.8VSP,1.05V_MP

PWR-1.8VSP,1.05V_MP

PWR-1.8VSP,1.05V_MP

QAQ10, LA-8581P MB

D

50 59Wednesday, November 23, 2011

50 59Wednesday, November 23, 2011

50 59Wednesday, November 23, 2011

0.1

0.1

0.1

5

4

3

+1.05VSP_B+

2

PL14

HCB1608KF-121T30_0603

12

1

B+

D D

+3VS

5

123

786

5

PQ20

AO4456_SO8

123

PQ19

MDV1525URH_PDFN33-8-5

PR88
10K_0402_5%

1 2

+1.05VSP_PWRGOOD<11,53>

PR89

1 2

84.5K_0402_1%

PR92

0_0402_5%

SUSP#

C C

B B

1 2

PC84

@0.1U_0402_16V7K

12

PR99
10K_0402_1%

1 2

TRIP_+1.05VSP

EN_+1.05VSP

FB_+1.05VSP

RF_+1.05VSP

12

PR94

470K_0402_1%

PC86

@1000P_0402_50V7K

1 2

PU11

1

PGOOD

2

TRIP

3

EN

4

VFB

5

TST

TPS51212DSCR_SON10_3X3

+1.05VSP1 +1.05VSP

PR97 4.99K_0402_1%

1 2

@1.2K_0402_1%

PR96

12

VBST

DRVH

V5IN

DRVL

10

BST_+1.05VSP

9

UG_+1.05VSP

8

SW

TP

SW_+1.05VSP

7

6

LG_+1.05VSP

11

1 2

4.7_0402_5%

12

PC82
1U_0603_10V6K

PR90

+5VALW

BST1_+1.05VSP

PR91

1 2

2.2_0402_5%

VCCIO_SENSE1

PC81

0.22U_0402_10V6K

1 2

UG_+1.05VSP1

4

4

+1.05VSP

PC77

12

0.1U_0402_25V6

12

12

PC78

2200P_0402_50V7K

0.68UH_PCMC063T-R68MN_15.5A_20%

1 2

12

PR93

4.7_1206_5%

SNUB_+1.05VSP

12

PC85

680P_0402_50V7K

PJP9

1 2

PAD-OPEN 4x4m

PJP10

1 2

PAD-OPEN 4x4m

PC79

PL15

12

PC80

10U_0805_25V6K

4.7U_0805_25V6-K

+1.05VSP

1

+

PC83

2

12

PR95
0_0402_5%

+1.05VS_PCH

+1.05VS_VCCP

100_0402_1%

220U_6.3VM_R15

PR98

12

VCCIO_SENSE <9>

(12A,480mils ,Via NO.= 24)

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/31

2011/10/31

2011/10/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2012/12/31

2012/12/31

2012/12/31

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

PWR-+1.05VSP

PWR-+1.05VSP

PWR-+1.05VSP

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Wednesday, November 23, 2011

QAQ10, LA-8581P MB

1

of

51 59

51 59

51 59

0.1Custom

0.1Custom

0.1Custom

5

4

3

2

1

0.75Volt +/- 5%
TDC 0.525A

PL16

HCB1608KF-121T30_0603

B+

D D

1 2

1UH_VMPI0703AR-1R0M-Z01_11A_20%

+1.5VP

1

C C

Mode Level +0.75VSP VTTREF_1.5V
S5 L off off
S3 L off on
S0 H on on

Note: S3 - sleep ; S5 - power off

B B

+

PC95

2

220U_6.3VM_R15

PL17

PC87

1.5V_B+

12

0.1U_0402_25V6

12

PR100

0.22U_0402_10V6K

1 2

2.2_0402_5%

DH_1.5V_1

PR104

5.1_0603_5%

1 2

12

PC100
@0.1U_0402_10V7K

PR101

1 2

0_0402_5%

PR102

18.7K_0402_1%

1 2

12

BOOT_1.5V

SW_1.5V

DL_1.5V

PC94

1U_0603_10V6K

1 2

VDD_1.5V

PC96
1U_0603_10V6K

EN_1.5V

0.75VR_EN<11>

DH_1.5V

CS_1.5V

+5VALW

1.5V_B+

15

LGATE

14

PGND

13

CS

RT8207MZQW_WQFN20_3X3

12

VDDP

11

VDD

PR107

887K_0402_1%

1 2

16

17

PHASE

UGATE

PGOOD

TON

9

10

TON_1.5V

PR109

@0_0402_5%

+1.5VP

18

19

20

PU12

21

VTT

BOOT

S5

8

12

PAD

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

6

FB_1.5V

1

2

3

4

5

VTTREF_1.5V

10.2K_0402_1%

PR106
10K_0402_1%

1 2

+1.5VP

PR105

12

12

VLDOIN

S3

7

EN_0.75VSP

BST_1.5V

12

12

PC88

2200P_0402_50V7K

12

PC89

10U_0805_25V6K

12

PR103

@4.7_1206_5%

SNUB_+1.5VP

12

PC98

@680P_0402_50V7K

PC90

5

@4.7U_0805_25V6-K

123

5

123

SYSON<39,41,45>

1 2

PC91

PQ21

4

SIS412DN-T1-GE3_POWERPAK8-5

PQ22

4

AON7702L_DFN8-5

PR108

0_0402_5%

1 2

+5VALW

Peak Current 0.75A
OCP Current 0.9A

12

12

PC92

PC93

10U_0805_6.3V6M

10U_0805_6.3V6M

+1.5VP

PC99
.1U_0402_16V7K

+0.75VSP

12

PC97

0.033U_0402_16V7K

PR110

SUSP#<10,39,41,45,50,51,57>

PJP11

1 2

PAD-OPEN 4x4m

PJP12

+1.5VP

+0.75VSP

A A

5

1 2

PAD-OPEN 4x4m

PJP13

1 2

PAD-OPEN 3x3m

(13A,520mils ,Via NO.= 26)

+1.5V

(2A,80mils ,Via NO.= 4)

+0.75VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/31

2011/10/31

2011/10/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

0_0402_5%

12

12

PC101
@0.1U_0402_10V7K

2012/12/31

2012/12/31

2012/12/31

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

PWR-1.5VP / +0.75VSP

PWR-1.5VP / +0.75VSP

PWR-1.5VP / +0.75VSP

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Wednesday, November 23, 2011

QAQ10, LA-8581P MB

1

of

52 59

52 59

52 59

0.1Custom

0.1Custom

0.1Custom

5

4

3

2

1

VID [0] VID[1] VCCSA Vout

D D

+3VS

12

PR112

100K_0402_5%

The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.

PR111

1K_0402_5%

12

H_VCCSA_VID1 <10>

0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V

output voltage adjustable network

SA_PGOOD<41>

PR113

1K_0402_5%

H_VCCSA_VID0 <10>

12

+VCC_SAP
TDC 4.2A
Peak Current 6A
OCP current 7.2A

+5VALW

PC102

12

18

PU13

V5DRV

PGND

PGND

PGND

TPS51461RGER_QFN24_4X4

VIN

VIN

VIN

GND

1

PR121

10K_0402_5%

1 2

1U_0603_10V6K

+VCCSA_V5FILT

16

15

17

VID1

V5FILT

PGOOD

COMP

SLEW

VREF

3

4

2

+VCCSA_SLEW

+VCCSA_COMP

12

1 2

PC117

0.01U_0402_25V7K

13

14

VID0

VOUT

5

6

+VCCSA_VOUT

+VCCSA_EN

EN

12

BST

11

SW

10

SW

9

SW

8

SW

7

SW

25

TP

MODE

+VCCSA_MODE

PC104

+VCCSA_PHASE

@33K_0402_5%

PR115

0_0402_5%

1 2

12

@0.1U_0402_10V7K

PR116

2.2_0603_5%

1 2

+VCCSA_BT_1+VCCSA_BT

PR118

12

+1.05VSP_PWRGOOD <11,51>

PC105

0.22U_0603_10V7K

1 2

12

PR117

4.7_1206_5%

SNUB_VCCSA

12

PC114

1000P_0402_25V8J

PL18

0.47UH_PCMB042T-R47MN_6A_20%

1 2

PC106

22U_0805_6.3V6M

1 2

PR119

100_0402_5%

PR120

0_0402_5%

+VCCSAP

PC109

PC108

PC107

1 2

22U_0805_6.3V6M

12

12

1 2

22U_0805_6.3V6M

1 2

22U_0805_6.3V6M

+VCCSA_SENSE <10>

PR114

PC116

10_0402_1%

19

20

21

22

23

24

+VCCSA_VREF

12

+VCCSA_COMP1

PC103

2.2U_0603_10V7K

+VCCSA_PWR_SRC

0.22U_0402_10V6K

1 2

PC115

3300P_0402_50V7K

12

C C

1

PC111

PC112

PC110

1 2

0.1U_0402_25V6

2

PJP14

PAD-OPEN 4x4m

2200P_0402_50V7K

(6A,240mils ,Via NO.= 12)

+VCCSA

PL19

+5VALW

B B

1 2

HCB1608KF-121T30_0603

+VCCSAP

1 2

PC113

1 2

1 2

10U_0805_10V6M

10U_0805_10V6M

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/31

2011/10/31

2011/10/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2012/12/31

2012/12/31

2012/12/31

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet of

PWR-VCCSAP

PWR-VCCSAP

PWR-VCCSAP

QAQ10, LA-8581P MB

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Wednesday, November 23, 2011

53 59

53 59

53 59

of

1

of

0.1C

0.1C

0.1C

5

4

3

2

1

1 2

PR122 @0_0402_5%

FBA and COMPA are short.
CSCOMPA, CSSUMA, DROOPA are short.

1 2

PC118

@680P_0402_50V7K

FBA1

12

PC122

1 2

PR123

@10_0402_1%

1 2

@1.21K_0402_1%

+5VS

FBA3

PR125

@4700P_0402_25V7K

CSP1A, CSP2A to +5VS.

LGA, SWA, HGA, BSTA, DIFFA, TRBSTA#, ILIMA, PWMA are float.

D D

C C

VSPA, VSNA to GND (HW side).
CSREFA, TSNSA, IOUTA to GND.

TRBSTA#

VCC_AXG_SENSE<10>

VSS_AXG_SENSE<10>

+1.05VS_VCCP

PR141

1 2

12

PC133

54.9_0402_1%

1 2

PR144

PR158

1 2

10_0402_1%

.1U_0402_16V7K

0_0402_5%

VR_SVID_DAT1

+3VS

12

3P: 330p
2P: 1000p

FB_CPU3

PR161

1 2

1.21K_0402_1%

3P: 348
2P: 1.21K

PR168

1 2

1K_0402_1%

3P: 806
2P: 1K

12

PC132

PR140

.1U_0402_16V7K

130_0402_1%

VR_SVID_DAT<9>

VR_SVID_ALRT#<9>

VR_SVID_CLK<9>

1 2

+1.05VS_VCCP

12

PR150
75_0402_1%

VR_HOT#<41>

VSSSENSE<9>

B B

A A

VCCSENSE<9>

VGATE<27>

TRBST#

PR126

1 2

@10.7K_0402_1%

CPU_B+

PR151
10K_0402_5%

PC145

1 2

680P_0402_50V7K

DROOP

CSP1A

PR129

1 2

10_0402_1%

VR_ON<41>

95.3K_0402_1%

1 2

PR147 1K_0402_1%

PR156

1 2

49.9_0402_1%

FB_CPU2

12

PC148

1000P_0402_50V7K

1 2

PR131

1K_0402_1%

+5VS

PR145

1 2

PC137

12

PC139
1000P_0402_50V7K

1 2

9.53K_0402_1%

4700P_0402_25V7K

PC152

1 2

FBA2

1 2

2_0603_5%

1 2

2.2U_0603_10V7K

1 2

0_0402_5%

1 2

PR154

1K_0402_1%

FB_CPU1

1000P_0402_50V7K

PR162

3P: 3.65K
2P: 9.53K

CSREFCSCOMP

PC124

1 2

330P_0402_50V7K

PR138

PC134

PR142

VR_ON_CPU

PR146

1 2

10K_0402_1%

12

0.01U_0402_25V7K

PC143

1 2

DIS only:
All AXG components are @.
Except
PR272 and PR273 are 0ohm.
PC223, PC226, PR202 are 0ohm.
PC220, PC215, PR206 are 0ohm.

PC119

1 2

.1U_0402_16V7K

1 2

PR124

PC125

1 2

10P_0402_50V8J

PC129

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15

PC141

10P_0402_50V8J

12

COMP_CPU1

24.9K_0402_1%

1 2

COMPA1

3300P_0402_25V7K

1 2

60

61

PU14

PAD

VCC
VDDBP
VRDYA
EN
SDIO
ALERT#
SCLK
VBOOT
ROSC
VRMP
VRHOT#
VRDY
VSN
VSP
DIFF

16

TRBST#

12

PC144

3300P_0402_50V7K

PR164

1 2

24.9K_0402_1%

PUT COLSE
TO VCORE
Phase 1
Inductor

VSNA

PC126

PR135

1 2

FBA

ILIMA

DIFFA

COMPA

TRBSTA#

IMONAIMONA

54

57

59

58

56

53

55

FBA

ILIMA

VSPA

DIFFA

IOUTA

COMPA

TRBSTA#

NCP6132AMNR2G_QFN60_7X7

<BOM Structure>

CSCOMP22CSP325CSREF24CSSUM

COMP

DROOP21FB

IOUT

ILIM20TRBST#

23

18

17

19

FB_CPU

COMP_CPU

DROOP

ILIM_CPU

IMONIMON

1 2

12

PR153 12.4K_0402_1%

CSCOMPCSCOMPCSCOMPCSCOMPCSCOMPCSCOMP

1 2

PC150

75K_0402_1%

.1U_0402_16V7K

2P: 24K
1P: 24.9K

PR132

1 2

5.11K_0402_1%

2P: 21.5K
1P: 15.8K

1000P_0402_50V7K

6132_VCC

VR_SVID_DAT1
VR_SVID_ALRT#
VR_SVID_CLK

VBOOT

ROSC_CPU
VRMP
VR_HOT#
VGATE

DIFF_CPU

3P: 22p
2P: 10p

PR157

4.32K_0402_1%

3P: 6.04K
2P: 4.32K

3P: 2200p
2P: 3300p

3P: 23.7K
2P: 24.9K

1 2

1 2

PC120

PC121

1200P_0402_50V7K

1 2

PR133

63.4K_0603_1%

PC128
1000P_0402_50V7K

1 2

+5VS

15.8K_0402_1%

CSP1A

CSSUMA

DROOPA

CSCOMPA

CSREFA

TSENSEA

46

48

51

47

52

49

50

CSP2A

CSP1A

TSNSA

CSREFA

CSSUMA

PWMA

DROOPA

CSCOMPA

BSTA

PVCC
PGND

CSP1

DRVEN

CSP2

TSNS

PWM

27

29

26

28

30

TSENSETSENSE

1 2

CSP1
CSP2

3P: 21K
2P: 12.4K

PC146
1000P_0402_50V7K

1 2

CSSUM

PC149

1 2

1200P_0402_50V7K

1 2

1 2

NTC_PH201

PR166

PH5

12

220K_0402_5%_ERTJ0EV224J

330P_0402_50V7K

PR130

165K_0402_1%

SW1A

PC130

1 2

.1U_0402_16V7K

45
44
43

HGA

42

SWA

41

LGA

40

BST2

39

HG2

38

SW2

37

LG2

36
35
34

LG1

33

SW1

32

HG1

31

BST1

1 2

PC140

.1U_0402_16V7K

PC151
330P_0402_50V7K

1 2

165K_0402_1%

PR127

75K_0402_1%

1 2

12

NTC_PH203

CSREFA <55>

BST2

6132P_VCCP

BST1

PR152

41.2K_0402_1%

+5VS

CSREF <55>

3P: 1500p
2P: 1200p

PR167

12

PH2

220K_0402_5%_ERTJ0EV224J

PR137

1 2

26.1K_0402_1%

BSTA1

HG1A <55>

LG1A <55>

HG2 <55>

LG2 <55>

LG1 <55>

HG1 <55>

3P: 73.2K
2P: 41.2K

CSREFA

CSP1A

PUT COLSE
TO GT
Inductor

PC127

0.047U_0402_16V7K

1 2

2P: 36K
1P: 26.1K

PR139

1 2

2.2_0603_5%

1 2

PR143

2.2_0603_5%

1 2

PR149

2.2_0603_5%

CSREF

CSREF

1 2

PR163

130K_0603_1%

1 2

PR165

130K_0603_1%

PR134 6.98K_0402_1%

1 2

BSTA1_1

BST2_1

PR148

0_0402_5%

BST1_1

CSP2

12

PC142

0.047U_0402_16V7K

CSP1

12

PC147

0.047U_0402_16V7K

PC131

1 2

0.22U_0402_10V6K

PC135

1 2

0.22U_0402_10V6K

PC136

1 2

2.2U_0603_10V7K

1 2

PC138

1 2

0.22U_0402_10V6K

1 2

6.98K_0402_1%

1 2

6.98K_0402_1%

SW1

SW2

SW1A

PR155

PR159

PR128

1 2

1K_0402_1%

2P: 1.65K
1P: 1K

SW1A <55>

SW2 <55>

+5VS

SW1 <55>

SW2

SW1

PC123

1 2

1000P_0402_50V7K

TSENSEA

12

PR136

8.25K_0402_1%

PUT COLSE
TO V_GT
HOT SPOT

TSENSE

12

PR160

8.25K_0402_1%

PUT COLSE
TO VCORE
HOT SPOT

CSREFACSCOMPA DROOPA

PH3

100K_0402_1%_TSM0B104F4251RZ

1 2

PH4

100K_0402_1%_TSM0B104F4251RZ

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2011/10/31 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Title

Title

Title

PWR-CPU_CORE

PWR-CPU_CORE

PWR-CPU_CORE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

QAQ10, LA-8581P MB

54 59Wednesday, November 23, 2011

54 59Wednesday, November 23, 2011

54 59Wednesday, November 23, 2011

1

0.1

0.1

0.1

5

D D

5

PR169

1 2

HG1<54>

0_0603_5%

SW1<54>

LG1<54>

S TR MDU1512RH 1N POWERDFN56-8

C C

GFX_B+

5

PR175

1 2

HG1A<54>

0_0603_5%

SW1A<54>

B B

LG1A<54>

HG1A_1

4

S TR MDU1516URH 1N POWERDFN56-8

123

5

4

123

4

HG1_1

PQ25

4

PQ27

PQ28

S TR MDU1512RH 1N POWERDFN56-8

PQ23

S TR MDU1516URH 1N POWERDFN56-8

123

5

123

12

PC168

PC167

10U_0805_25V6K

10U_0805_25V6K

0.36UH 20% FDUM0640J-H-R36M

12

PR176

@4.7_1206_5%

SNUB_GFX1

12

PC172

@680P_0402_50V7K

12

PL24

1 2

<BOM Structure>

4

CPU_B+ CPU_B+

B+

12

12

12

12

PC154

12

PC171

2200P_0402_25V7K

PC155

10U_0805_25V6K

10U_0805_25V6K

12

SNUB_CPU1

12

PL30

HCB2012KF-121T50_0805

12

@820P_0402_25V7

PC153

@820P_0402_25V7

12

PC170

PC169

0.1U_0402_25V6

12

PC156

PC160

0.1U_0402_25V6
2200P_0402_25V7K

PL22

0.36UH 20% FDUM0640J-H-R36M

1 2

<BOM Structure>

PR171

@4.7_1206_5%

PC165

@680P_0402_50V7K

12

B+

+VCC_CORE

100U_25V_M

PR173

12

10_0402_1%

SW1

PC162

+GFX_CORE

12

PR177

10_0402_1%

SW1A

CSREFA <54>

1

+

2

3

1

+

PC163

@100U_25V_M

2

PL20

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

PL21

12

12

CPU_B+

1 2

HG2<54>

0_0603_5%

SW2<54>

LG2<54>CSREF <54>

S TR MDU1512RH 1N POWERDFN56-8

PR170

HG2_1

PQ26

QC 45W CPU
VID1=0.9V
IccMax=94A
Icc_Dyn=66A
Icc_TDC=52A
R_LL=1.9m ohm
OCP~110A

2

5

PQ24

4

S TR MDU1516URH 1N POWERDFN56-8

123

5

4

123

DC 35W CPU
VID1=1.05V
IccMax=53A
Icc_Dyn=43A
Icc_TDC=36A
R_LL=1.9m ohm
OCP~65A

1

12

12

PC157

@820P_0402_25V7

12

PC158

PC161

10U_0805_25V6K

10U_0805_25V6K

0.36UH 20% FDUM0640J-H-R36M

12

PR172

@4.7_1206_5%

SNUB_CPU2

12

PC166

@680P_0402_50V7K

12

PC164

PC159

0.1U_0402_25V6

PL23

1 2

<BOM Structure>

12

2200P_0402_25V7K

+VCC_CORE

PR174

10_0402_1%

SW2

12

CSREF

DC 35W GT2
VID1=1.23V
IccMax=33A
Icc_Dyn=20.2A
Icc_TDC=21.5A
R_LL=3.9m ohm
OCP~40A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

A A

5

4

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2011/10/31 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

PWR-VCC_CORE

PWR-VCC_CORE

PWR-VCC_CORE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

QAQ10, LA-8581P MB

QAQ10, LA-8581P MB

QAQ10, LA-8581P MB

1

55 59Wednesday, November 23, 2011

55 59Wednesday, November 23, 2011

55 59Wednesday, November 23, 2011

0.1

0.1

0.1

5

4

3

2

1

+VCC_CORE

12

PC173

D D

10U_0805_6.3V6M

12

PC174
10U_0805_6.3V6M

12

PC175
10U_0805_6.3V6M

12

PC176
10U_0805_6.3V6M

+VCC_CORE

12

PC177
10U_0805_6.3V6M

+GFX_CORE

+GFX_CORE

Below is 458544_CRV_PDDG_0.5 Table 5-8.

5 x 22 µF (0805)

Socket Bottom

5 x (0805) no-stuff
sites

7 x 22 µF (0805)

12

PC178
10U_0805_6.3V6M

12

PC179
10U_0805_6.3V6M

12

PC180
10U_0805_6.3V6M

12

PC181
10U_0805_6.3V6M

12

PC182
10U_0805_6.3V6M

@22U_0805_6.3V6M

PC183

1

2

@22U_0805_6.3V6M

PC184

1

2

PC185

1

2

@22U_0805_6.3V6M

@22U_0805_6.3V6M

PC186

1

2

@22U_0805_6.3V6M

PC187

1

2

PC188

1

2

+VCC_CORE

1

PC191
22U_0805_6.3V6M

2

1

PC211
22U_0805_6.3V6M

C C

2

1

PC221
22U_0805_6.3V6M

2

1

PC192
22U_0805_6.3V6M

2

1

PC212
22U_0805_6.3V6M

2

1

PC222
22U_0805_6.3V6M

2

1

PC193
22U_0805_6.3V6M

2

1

PC213
22U_0805_6.3V6M

2

1

PC223
22U_0805_6.3V6M

2

1

PC194
22U_0805_6.3V6M

2

1

PC214
22U_0805_6.3V6M

2

1

PC224
22U_0805_6.3V6M

2

1

PC195
22U_0805_6.3V6M

2

1

PC215
22U_0805_6.3V6M

2

1

PC225
22U_0805_6.3V6M

2

1

PC226
22U_0805_6.3V6M

2

@22U_0805_6.3V6M

PC208

PC207

1

2

@330U_D2_2V_Y

1

PC219

+

2

1

1

2

2

@330U_D2_2V_Y

1

PC220

+

2

PC210

PC209

1

2

@22U_0805_6.3V6M

@22U_0805_6.3V6M

@22U_0805_6.3V6M

@22U_0805_6.3V6M

@22U_0805_6.3V6M

PC190

PC189

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

PC196

PC197

2

2

22U_0805_6.3V6M

1

1

PC198

2

2

0_0805_5%

Socket Top

2 x (0805) no-stuff
sites

+1.05VS_VCCP

22U_0805_6.3V6M

1

PC200

PC199

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

PC201

2

2

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

1

PC202

PC203

2

330U_D2_2V_Y

1

PC217

+

2

+1.05VS_VCCP

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

2

PC216

1

PC205

PC204

2

2

330U_D2_2V_Y

1

PC218

+

2

22U_0805_6.3V6M

PC206

+VCC_CORE

1

+

PC227

470U_D2_2VM_R4.5M

2

B B

A A

5

1

+

PC228
330U_D2_2V_Y

2

1

+

PC229
330U_D2_2V_Y

2

1

+

PC230
330U_D2_2V_Y

2

Security Classification

Security Classification

Security Classification

2011/10/31 2012/12/31

2011/10/31 2012/12/31

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/10/31 2012/12/31

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR - PROCESSOR DECOUPLING

PWR - PROCESSOR DECOUPLING

PWR - PROCESSOR DECOUPLING

QAQ10, LA-8581P MB

QAQ10, LA-8581P MB

QAQ10, LA-8581P MB

56 59Wednesday, November 23, 2011

56 59Wednesday, November 23, 2011

56 59Wednesday, November 23, 2011

1

0.1

0.1

0.1

5

4

3

2

1

<26,28,45>

DGPU_PWR_EN

PR808

SUSP#<10,39,41,45,50,51,52>

PR809

D D

VGA_PWROK<13,26,29,45>

1 2

PR193

@

OPT@

PC241

1 2

1000P_0402_50V7K

C C

6.65K_0402_1%

1 2

PC242

OPT@

1500P_0402_50V7K

1 2

PR196

OPT@

1K_0402_1%

0_0402_5%

1 2

PC246

OPT@

1000P_0402_50V8J

12

OPT@

0_0402_5%

3211_COMP-1

PR192

OPT@

10P_0402_50V8J

1 2

OPT@

12

39.2K_0402_1%

0_0402_5%

3211_PWRGD

PC244

PR197

OPT@

4.22K_0402_1%

12

10K_0402_1%

OPT@

12

PR198

Avoid high dV/dt

PR202

0_0402_5%

B B

+VGA_CORE

12

OPT@

12

A A

OPT@

12

OPT@

PR203
0_0402_5%

1 2

1 2

OPT@

OPT@

<15>

VSSSENSE_VGA

VCCSENSE_VGA

Under VGA Chip

12

12

PC255

4.7U_0603_6.3V6M

OPT@

12

PC273

4.7U_0603_6.3V6M

OPT@

12

PC280

0.1U_0402_10V7K

OPT@

12

PC257

PC256

PC274

PC281

4.7U_0603_6.3V6M

OPT@

4.7U_0603_6.3V6M

0.1U_0402_10V7K

OPT@

PC258

4.7U_0603_6.3V6M

OPT@

12

12

PC276

PC275

@

@

4.7U_0603_6.3V6M

12

12

PC282

PC283

0.1U_0402_10V7K

OPT@

5

<15>

4.7U_0603_6.3V6M

OPT@

4.7U_0603_6.3V6M

0.1U_0402_10V7K

+VGA_B+

Connect to input caps

12

12

PC259

4.7U_0603_6.3V6M

OPT@

12

12

PC277

@

4.7U_0603_6.3V6M

12

12

PC284

@

0.1U_0402_10V7K

12

12

PC265

PC278

@

PC285

@

4.7U_0603_6.3V6M

OPT@

4.7U_0603_6.3V6M

0.1U_0402_10V7K

PC267

PC266

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

OPT@

12

PC279

@

4.7U_0603_6.3V6M

12

12

PC286

PC287

@

@

0.1U_0402_10V7K

0.1U_0402_10V7K

+3VS

12

PR191

3211_FB

3211_COMP

3211_VCC

3211_ILIM

1 2

3211_CSCOMP

OPT@

100P_0402_50V8J

1

PWRGD

2

IMON

3

CLKEN#

4

FBRTN

5

FB

6

COMP

7

GPU

8

ILIM

3211_IREF

PR199

80.6K_0402_1%

1 2

OPT@

PR207

1K_0402_1%

1000P_0402_50V7K

12

PC233

OPT@

PR200

OPT@

12

OPT@

3211_EN

32

3211_RPM

1 2

200K_0402_1%

3211_RAMP-1

<13>

GPU_VID1

GPU_VID2

GPU_VID0

PR184 0_0402_5%OPT@

PR185 0_0402_5%OPT@

PR183 0_0402_5%OPT@

1 2

1 2

1 2

1 2

VID0

VID1

VID2

VID3

EN

VID031VID130VID229VID328VID427VID526VID6

ADP3211AMNR2G_QFN32_5X5

PU15

OPT@

IREF9RPM10RT11RAMP12LLINE13CSREF14CSFB15CSCOMP

3211_RT

3211_RAMP

PR201

12

1 2

274K_0402_1%

OPT@

PR204

OPT@

12

PC250

12

3211_CSCOMP

4

GPU_VID3

PR186 0_0402_5%OPT@

499K_0402_1%

@

<13>

GPU_VID4

1 2

VID4

12

PR209
0_0402_5%

<13>

<13>

<13>

GPU_VID5

PR188 0_0402_5%OPT@

PR189 0_0402_5%OPT@

PR187 0_0402_5%OPT@

1 2

1 2

VID5

VID6

25

VCC

BST

DRVH

PVCC

DRVL

PGND

AGND

AGND

16

3211_CSCOMP

3211_CSFB

PC251

OPT@

1000P_0402_50V7K

PR208

OPT@

0_0402_5%

<13>

+5VS

24

23

CPU_BOOST

22

21

SW

20

19

18

17

33

12

PC248

@

680P_0402_50V7K

Shortest the
net trace

12

PR190
10_0603_1%

1 2

12

3211_VCC

OPT@

3211_DRVH

3211_SW

3211_DRVL

OPT@

OPT@

PC239

OPT@

1U_0805_25V6K

PR194
0_0603_5%

1 2

OPT@

12

PC249
2200P_0402_50V7K

OPT@

0.22U_0603_25V7K

CPU_BOOST-1

12

PC243

2.2U_0603_10V6K

OPT@

PC240

1 2

+5VS

12

PR205
220K_0402_1%

+VGA_CORE

12

PQ33

4

4

OPT@

PR206

80.6K_0603_1%

OPT@

5

TPCA8065-H_PPAK56-8-5

123

123 5

12

12

PC234

12

PR195

@

4.7_1206_5%

12

@

PC247

680P_0603_50V7K

OPT@

5

PQ32

OPT@

4

TPCA8065-H_PPAK56-8-5

123

4

PQ34

TPCA8057-H_SOP-ADVANCE8-5

OPT@

PQ35

123 5

TPCA8057-H_SOP-ADVANCE8-5

OPT@

12

PC235

4.7U_0805_25V6M

4700P_0402_25V7K

OPT@

PL32

0.36UH_PCMC104T-R36MN1R17_30A_20%

1 2

Near VGA Core

PC252

330U_D2_2V_Y

OPT@

1

PC261

2

OPT@

12

PC268

OPT@

Issued Date

Issued Date

Issued Date

1

+

PC254

2

330U_D2_2V_Y

OPT@

1

2

22U_0805_6.3V6M

12

4.7U_0603_6.3V6M

1

1

PC262

OPT@

PC269

OPT@

PC264

PC263

2

2

@

@

22U_0805_6.3V6M

4.7U_0603_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

12

12

12

PC270

PC271

PC272

@

@

OPT@

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

VL

PC716

0.1U_0603_25V7K

PWR_GPS_DOWN#<41>

12

GPU Skin temperature protection:

Requlator temperature protection:

Compal Secret Data

Compal Secret Data

Compal Secret Data

2011/10/31

2011/10/31

2011/10/31

Deciphered Date

Deciphered Date

Deciphered Date

2

1

+

2

1

PC260

2

OPT@

22U_0805_6.3V6M

1

PC502

2

47U_0805_6.3V6M

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+VGA_B+

12

12

PC237

PC236

4.7U_0805_25V6M

OPT@

PC238

0.1U_0402_25V6

2200P_0402_50V7K

OPT@

OPT@

PL31

OPT@

HCB2012KF-121T50_0805

1 2

B+

+VGA_CORE

1

+

PC245

2

@330U_D2_2V_Y

OPT@

1 2

PR741

19.6K_0402_1%

PU701

1

2

3

4

G718TM1U_SOT23-8

2012/12/31

2012/12/31

2012/12/31

8

VCC

TMSNS1

7

GND

RHYST1

6

OT1

TMSNS2

5

RHYST2

OT2

Protection at 90 degree C

Recoveyr at 90 degree C

Protection at 90 degree C

Recoveyr at 90 degree C

1 2

PH702

@

100K_0402_1%_NCP15WF104F03RC

VL

PR742

@

1 2

1 2

PR743

@

15.8K_0402_1%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

12

8.66K_0402_1%

Wednesday, November 23, 2011

Wednesday, November 23, 2011

Wednesday, November 23, 2011

PR744

3.48K_0402_1%

1 2

PR749

@

0_0402_5%

PH703

@

1 2

100K_0402_1%_NCP15WF104F03RC

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PWR-VGA_CORE

PWR-VGA_CORE

PWR-VGA_CORE

QAQ10, LA-8581P MB

QAQ10, LA-8581P MB

QAQ10, LA-8581P MB

1

PWRMOS_TEMP<41>

57 59

57 59

57 59

of

of

of

0.1C

0.1C

0.1C

5

Request

Request

Request

Item

Item Issue Description

ItemItem

D D

C C

Page#

Page#Page#

Title

Title

TitleTitle

Date

DateDate

Request
Owner

Owner

OwnerOwner

4

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Issue DescriptionDate

Issue DescriptionIssue Description

3

Page 1

Page 1

Page 1Page 1

2

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

1

Rev.Page#

Rev.Rev.

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/10/31 2012/12/31

2011/10/31 2012/12/31

2011/10/31 2012/12/31

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PWR - PIR

PWR - PIR

PWR - PIR

QAQ10, LA-8581P MB

QAQ10, LA-8581P MB

QAQ10, LA-8581P MB

58 59Wednesday, November 23, 2011

58 59Wednesday, November 23, 2011

58 59Wednesday, November 23, 2011

1

0.1

0.1

0.1

5

D D

C C

4

3

2

1

B B

A A

Security Classification

Security Classification

Security Classification

2011/09/23 2011/12/30

2011/09/23 2011/12/30

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

2011/09/23 2011/12/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

4

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

3

Date: Sheet of

Wednesday, November 23, 2011

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

QAQ10 LA-8581P M/B

2

59 59

59 59Wednesday, November 23, 2011

59 59Wednesday, November 23, 2011

1

0.1

0.1

0.1