Compal LA-8511P QAJA0 PICASSO M Schematic

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Compal Confidential
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PICASSO M Schematics Document
Nvdia(T30S) + LPDDRII
QAJA0-LA-8511P
2012-01-18
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The content in this document contains confidential information of Compal Electronics, Inc. that is protected under all applicable trade secrets laws and regulations. If you are not the intended recipient or otherwise authorized to receive such information, please do not copy, distribute or otherwise use the information contained herein and please destroy this communication accordingly.
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REV: 1.0
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
Picasso 2 R04
Picasso 2 R04
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Picasso 2 R04
E
1.0
1.0
1
1
1
1.0
38
38
38
Page 2
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Compal Confidential
Model Name : NVIDIA T30S System Block Diagram
26MHz
32KHz
1 1
PMIC T
PS659110
Power ON
VIN
P.31~P.33
2 2
Micro HDMI
P.19
HDMI Switch (1.8V/3.3V)
CORE_PWR_REQ
CPU_PWR_REQ
SYS_RESET_N
PMU_32K_IN
PWR_I2C
HDMI_DDC
P.13
Nvidia
T30S
JTAG
I
2S
UART4
UART2
LPDDR2 512MB/1GB
Debug Test Point
Audience eS305
Broadcom BCM47511
P.9
P.7
Audio Codec WM8903
P.14 P.15
GPS Antenna
P.21
BT/WLAN Antenna
Audio AMP APA2010
P.15
MIC & Audio Jack
P.15
Speaker x 2 (1W)
P.15
UART3
SDIO
DAP
USB2
10.1" LCD 1920*1200
Touch Panel Control
P.13
LVDS Transmitter (V105A)
P.12
Client
Micro USB
3 3
P.20
Signal Switch
P.20
Host
AzureWave AW-AH660
P.22
3G Modem Module
P.18
P-Senser
3G Modem Antenna
SIM Card
P.18
IQS12800100TSR
P.16
Dock/B
Light Sensor STK2203
Func/B
E-Compass AKM8975
Dock/B
CAMERA 5M(CJAA525) 2M(CBFA152)
P.17
EEPROM
P.10
CIS(MIPI)
CAM_I2C
eMMC
SDIO4 (1.8V)
P.11
SDIO1 (3.3V)
Micro SD slot
P.20
I2C
CAM_I2C CAM_I2C CAM_I2C
GYRO Sensor MPU-3050
IME
4 4
A
B
G-Sensor KXTF9-4100
P.16
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SYSTEM BLOCK
SYSTEM BLOCK
SYSTEM BLOCK
Picasso 2 R04
Picasso 2 R04
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Picasso 2 R04
E
1.0
1.0
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2
2
1.0
38
38
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5
4
3
2
1
Voltage Rails
Power Plane Description
VIN
B+
+VDD_1V2_RTC_TEGRA
VDD_1V2_SOC
D D
+AVDD_1V1_PLL_TEGRA
+VDD_1V8_PMU_VRTC
+VDD_1V8_SYS_TEGRA System power rail
+AVDD_3V3_USB_TEGRA
+VDD_2V85_EMMC Core voltage for EMMC
+VDD_1V8_CAM_TEGRA
+AVDD_3V3_HDMI_S
VDD_1V8_GEN
+VDD_3V3_DDR_RX_TEGRA DDR RX power rail
+3VS 3.3V switched power rail for standby mode
+5VS
+VDD_LED_BL
+VDD_3V3_SDMMC1_TEGRA
+VDD_VCM_3V3
+VDD_1V2_DDR_MEM DDR power rail
C C
Adapter power supply (19V)
AC or battery power rail for power circuit.
Power for RTC and always-on core logic.
Power for remainder of core logic
AVDD_PLL power rail
RTC power rail
USB power rail
Core voltage for CAMERA
HDMI power rail
1.8V switched power rail for standby mode
5V switched power rail for standby mode
LED power rail
Micro SD power rail
CAMERA power rail
Board ID
PICASSO 2
GEN1_I2C <+VDD_1V8_SENSOR >
Device
Gyro E Compass Light Senser
Address<Write,Read>
0xD0 , 0xD1 0x18 , 0x19 0x38 , 0x39
PICASSO M
LPDDR2
B B
GEN2_I2C / TS_I2C < +VDD_3V3_GMI_TEGRA >
Device Address<Write,Read>
Touch Screen
0x98 , 0x99
CAM_I2C < +VDD_1V8_CAM_TEGRA >
Camera 5M Camera 2M Flash LED
Address<Write,Read>Device
0x78 , 0x79 0x20 , 0x21 0x66 , 0x67
LVDS strap pin
PWR_I2C < +VDD_1V8_SYS_TEGRA>
Address<Write,Read>Device
Thermal Senser ES305
A A
Codec PMU TPS62361 BATT Conn EEPROM (Low level) 0xA0 , 0xA1
5
0x98 , 0x99
0x3E
0x34 , 0x35
0x2D 0x60
0xAA , 0xAB
xA2 , 0xA3EEPROM (High level)
0
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Notes List
Notes List
Notes List
Picasso 2 R04
Picasso 2 R04
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso 2 R04
1
1.0
1.0
3
3
3
1.0
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5
R453
NV_LCD_PCLK LCD_PCLK_R
+VDD_3V3_LCD_TEGRA
D D
C C
B B
2
1
C2
C2
C1
1
2
4.7U_0402_6.3V6MC14.7U_0402_6.3V6M
R453
12
47_0402_5%
47_0402_5%
U1I
U1I
8/21 LCD
8/21 LCD
(1.8/3.3V)
(1.8/3.3V)
AG23
VDDIO_LCD_1
AH24
VDDIO_LCD_2
0.1U_0201_10V6K
0.1U_0201_10V6K
+AVDD_3V3_HDMI_S
VDD_1V8_GEN
L49 27NH_LQG15HS27NJ02D_5%_0402L49 27NH_LQG15HS27NJ02D_5%_0402
1 2
1
C165
C165
12P_0201_50V8J
12P_0201_50V8J
2
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
L1
L1
AVDD_HDMI_R
1 2
MPZ1005S300CT_2P
MPZ1005S300CT_2P
C7
C7
0.1U_0201_10V6K
0.1U_0201_10V6K
L2
L2
AVDD_HDMI_PLL
1 2
MPZ1005S300CT_2P
MPZ1005S300CT_2P
C8
C8
0.1U_0201_10V6K
0.1U_0201_10V6K
1
C164
C164
12P_0201_50V8J
12P_0201_50V8J
2
LCD_PCLK
LCD_WR*
LCD_HSYNC LCD_VSYNC
LCD_D00 LCD_D01 LCD_D02 LCD_D03 LCD_D04 LCD_D05 LCD_D06 LCD_D07 LCD_D08 LCD_D09 LCD_D10 LCD_D11 LCD_D12 LCD_D13 LCD_D14 LCD_D15 LCD_D16 LCD_D17 LCD_D18 LCD_D19 LCD_D20 LCD_D21 LCD_D22 LCD_D23
LCD_PWR0 LCD_PWR1 LCD_PWR2
LCD_SCK LCD_CS0* LCD_CS1*
LCD_SDOUT
LCD_SDIN
LCD_DC0
LCD_DC1
CRT_HSYNC CRT_VSYNC
DDC_SCL
DDC_SDA
HDMI_INT
2
1
2
1
LCD_DE
LCD_M1
AP8
AT8
10/03 Co-lay SOT-23 and SC-7 0
SB93413000000 and SB000009O0 0
Q6
Q6
AO3413_SOT23-3
AO3413_SOT23-3
D
S
D
S
1 3
G
G
+3VS
A A
VDD_1V8_GEN
2
2
G
G
Q2
Q2
D
D
1 3
2
13
G
G
D
D
S
S
@
@
NTS4101PT1G_SC70-3
NTS4101PT1G_SC70-3
S
S
10MIL
0.1A
EN_HDMI_3V3#
Q3
Q3 BSS138W-7-F_SOT323-3
BSS138W-7-F_SOT323-3
5
3.3V
+AVDD_3V3_HDMI_S
12
R27
R27 1M_0201_1%
1M_0201_1%
AD2
4
LCD_PCLK <12>
+VDD_3V3_GMI_TEGRA
RF
PD
NV_LCD_PCLK
AN21
PU
AK24
PD
AR19
PU
AK20
PU
AL17
PD
AR17
PD
AP26
PD
AM18
PD
AN19
PD
AJ23
PD
AR23
PD
AK16
PD
AK22
PD
AU21
PD
AM26
PD
AR21
PD
AU27
PD
AT18
PD
AJ17
PD
AH18
PD
AL21
PD
AM22
PD
AJ19
PD
AT20
PD
AT24
PD
AN27
PD
AU23
PD
AR27
PD
AM24
PD
AM20
PD
AN17
PD
AP20
PD
AN25
PU
AK26
PU
AL23
PU
AP18
PU
AM28
PU
AR25
PD
AL27
PD
AP24
PU
AK18
PU
AJ21
Z
AH20
Z
AT26
Z
AN23
U1K
U1K
10/21 HDMI
10/21 HDMI
AVDD_HDMI
(3.3V)
(3.3V)
AVDD_HDMI_PLL
(1.8V)
(1.8V)
U1J
U1J
9/21 VDAC
9/21 VDAC
(2.8V)
(2.8V)
AVDD_VDAC
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
LCD_DE <12> LCD_HSYNC <12> LCD_VSYNC <12>
LCD_D00 <12> LCD_D01 <12> LCD_D02 <12> LCD_D03 <12> LCD_D04 <12> LCD_D05 <12> LCD_D06 <12> LCD_D07 <12> LCD_D08 <12> LCD_D09 <12> LCD_D10 <12> LCD_D11 <12> LCD_D12 <12> LCD_D13 <12> LCD_D14 <12> LCD_D15 <12> LCD_D16 <12> LCD_D17 <12> LCD_D18 <12> LCD_D19 <12> LCD_D20 <12> LCD_D21 <12> LCD_D22 <12> LCD_D23 <12>
DDC_SCL_R <19> DDC_SDA_R <19>
HDMI_DET_T30S < 19>
9/29 Leakage Issue
Modify R10&R11 from mount to unmount
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
4
U1E
U1E
4/21 GMI
4/21 GMI
(1.8/3.3V)
(1.8/3.3V)
P12
VDDIO_GMI_1
T12
2
C147
C147
1
C4
C3
1
2
3300P_0201_16V6K
3300P_0201_16V6K
4.7U_0402_6.3V6MC34.7U_0402_6.3V6M
VDDIO_GMI_2
2
1
0.1U_0201_10V6KC40.1U_0201_10V6K
11/6 Add for COMPAL EMI request.
2.2K_0201_1%
2.2K_0201_1%
GEN2_I2C_SCL GEN2_I2C_SDA
AR9
HDMI_TXCN
AN9
HDMI_TXCP
AP12
HDMI_TXD0N
AN13
HDMI_TXD0P
AR13
HDMI_TXD1N
AP14
HDMI_TXD1P
AU11
HDMI_TXD2N
AT12
HDMI_TXD2P
HDMI_PROBE
HDMI_RSET
VDAC_R VDAC_G VDAC_B
VDAC_VREF
VDAC_RSET
AR11
AM8
AH14 AJ13 AH12
AN11
AM12
HDMI_PROBE
HDMI_RSET
12
R26
R26 1K_0201_1%
1K_0201_1%
3
Z
NAND_D0
J7
GMI_AD00
Z
BOOT_PD
K6
GMI_AD01
Z
J3
GMI_AD02
Z
H2
GMI_AD03
Z
NAND_D4
P4
GMI_AD04
Z
NAND_D5
P6
GMI_AD05
Z
NAND_D6
N3
GMI_AD06
Z
NAND_D7
R3
GMI_AD07
PD
G3
GMI_AD08
PD
E1
GMI_AD09
PD
J5
GMI_AD10
PD
J1
GMI_AD11
Z
PCB_ID0
F2
GMI_AD12
Z
PCB_ID1
F4
GMI_AD13
Z
PCB_ID2
P2
GMI_AD14
Z
R5
GMI_AD15
P8
GMI_A16
M8
GMI_A17
N9
GMI_A18
R9
GMI_A19
PU
R11
GMI_CS0* GMI_CS1* GMI_CS2* GMI_CS3* GMI_CS4* GMI_CS6* GMI_CS7*
GMI_ADV*
GMI_RST*
GMI_WAIT
GMI_IORDY
GEN2_I2C_SCL GEN2_I2C_SDA
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
+VDD_3V3_GMI_TEGRA
12
12
R11
@ R11
@
T1PAD@ T1PAD@
R10
@R10
@
2.2K_0201_1%
2.2K_0201_1%
HDMI_TXCN <19> HDMI_TXCP <19>
HDMI_TXD0N <19> HDMI_TXD0P <19>
HDMI_TXD1N <19> HDMI_TXD1P <19>
HDMI_TXD2N <19> HDMI_TXD2P <19>
+VDD_1V8_SDMMC4_TEGRA
2
1
C6
C5
C5
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
2
0.1U_0201_10V6KC60.1U_0201_10V6K
GMI_CLK
GMI_WP*
GMI_OE*
GMI_WR*
GMI_DQS
P10 G5 K8 H4 M10 L9
M4
L1
L5 N5 L3
R7
M2 M6
L7
D2 E3
E7
VDDIO_SDMMC4
PU 1 1 PU PU PU
1
0
0 PU PU
PU
1 1
Z
Z Z
U1F
U1F
5/21 SDMM4
5/21 SDMM4
(1.2/1.8V)
(1.2/1.8V)
BOARD_ID0 BOARD_ID1
BOOT_PD
FORCE_RECOVERY# NOR_BOOT
LCD_PWM_OUT <13>
DISPOFF# <13,31> EN_T30S_FUSE_3V3 <23> LCD_DCR <13>
EN_SENSOR_3V3 <23>
VIB_EN_T30S <20> TS_PWR_EN <13>
EN_VDDLCD_T30S <13> EN_WIFI_VDD <22>
TS_INT# <13> CHARGER_STAT <27>
R158 0_0201_5%R158 0_0201_5%
12
POUT_3G_1 <20> TEMP_ALERT# <7> POUT_WIFI < 16>
EN_HDMI_5V0 <19> 3G_DISABLE# <18> 3G_WAKE# <18>
POUT_3G <20>
TS_RST# <13>LVDS_SHTDN# <12>
GEN2_I2C_SCL <13>
GEN2_I2C_SDA <13>
VOL_UP#<7,20>
VOL_DOWN#<7,20>
SDMMC4 : eMMC
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
EN_P_SENSOR
SDMMC4_DAT0 SDMMC4_DAT1 SDMMC4_DAT2 SDMMC4_DAT3 SDMMC4_DAT4 SDMMC4_DAT5 SDMMC4_DAT6 SDMMC4_DAT7
SDMMC4_CLK
SDMMC4_CMD
SDMMC4_RST*
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
2
8/22 Change BOM structure to LPDDR2 & EMMC
EN_SENSOR_3V3
EN_P_SENSOR <20>
100K_0201_5%
100K_0201_5%
100K_0201_5%
100K_0201_5%
100K_0201_5%
100K_0201_5%
+VDD_1V8_SYS_TEGRA
1
2
74AUP1G02GW_TSSOP5
74AUP1G02GW_TSSOP5
08/16 Change U55 footprint 08/16 Delete U56 footprint Add
Z
B6
Z
G9
Z
C5
Z
B4
Z
A5
Z
D6
Z
C7
Z
D8
PU
F8
PU
H10
Z
B8
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
12
R18
R18
TS_PWR_EN
12
R12
R12
EN_WIFI_VDD
12
R17
R17
9/15 Modify R23 from 100K to 47K. 9/15 Add R90 for FORCE_RECOVERY issue 9/19 Modify Q44 part number to SB00000J500 .
5
U55
U55
B
4
Vcc
Y
A
G
3
EMMC_DA0 <11> EMMC_DA1 <11> EMMC_DA2 <11> EMMC_DA3 <11> EMMC_DA4 <11> EMMC_DA5 <11> EMMC_DA6 <11> EMMC_DA7 <11>
EMMC_CLK <11> EMMC_CMD <11>
EMMC_RST# <11>
1
NAND_D0
BOOT_PD
NAND_D4
NAND_D5
NAND_D6
NAND_D7
NAND_D4
NAND_D5
NAND_D6
NAND_D7
R1 100K_0201_5%R1 100K_0201_5%
R2 100K_0201_5%R2 100K_0201_5%
X76_SAM_1GB@
X76_SAM_1GB@
R38 100K_0201_5%
R38 100K_0201_5%
R43 100K_0201_5%@R43 100K_0201_5%@
R84 100K_0201_5%@R84 100K_0201_5%@
R85 100K_0201_5%@R85 100K_0201_5%@
X76_ELP_1GB@
X76_ELP_1GB@
R5 100K_0201_5%
R5 100K_0201_5%
R6 100K_0201_5%
R6 100K_0201_5%
R7 100K_0201_5%
R7 100K_0201_5%
R8 100K_0201_5%
R8 100K_0201_5%
8/22 Change BOM structure
PCB_ID0
PCB_ID1
PCB_ID2
BOARD_ID0
BOARD_ID1
PCB_ID0
PCB_ID1
PCB_ID2
BOARD_ID0
BOARD_ID1
NOR_BOOT
12
R54
R54 1M_0201_1%
1M_0201_1%
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
R63 100K_0201_5%
R63 100K_0201_5%
QAJ70@
QAJ70@
R87 100K_0201_5%
R87 100K_0201_5%
NH660@
NH660@
R100 100K_0201_5%
R100 100K_0201_5%
LTE@
LTE@
R78 100K_0201_5%
R78 100K_0201_5%
R88 100K_0201_5%
R88 100K_0201_5%
R152 100K_0201_5%
R152 100K_0201_5%
QAJ50@
QAJ50@
R153 100K_0201_5%
R153 100K_0201_5%
AH663@
AH663@
R154 100K_0201_5%
R154 100K_0201_5%
NONLTE@
NONLTE@
R79 100K_0201_5%
R79 100K_0201_5%
@
@
R89 100K_0201_5%
R89 100K_0201_5%
@
@
R22 100K_0201_5%R22 100K_0201_5%
+VDD_3V3_GMI_TEGRA
12
R23
R23 47K_0201_1%
47K_0201_1%
R90 47K_0201_1%
R90 47K_0201_1%
1 2
13
D
D
Q44
Q44
2
G
S TR DMN3150LW-7 1N SOT-323-3
G
S TR DMN3150LW-7 1N SOT-323-3
S
S
Vth=1.4V
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
T30S(1/5)LCD/CRT/HDMI/NAND
T30S(1/5)LCD/CRT/HDMI/NAND
T30S(1/5)LCD/CRT/HDMI/NAND
Picasso 2 R04
Picasso 2 R04
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso 2 R04
1
12
12
+VDD_3V3_GMI_TEGRA
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
FORCE_RECOVERY#
+VDD_3V3_GMI_TEGRA
+VDD_3V3_GMI_TEGRA
+VDD_3V3_GMI_TEGRA
T21 PAD@T21 PAD
@
4
38
4
38
4
38
1.0
1.0
1.0
Page 5
5
4
3
2
1
Acer request
VDD_1V2_MEM
U1D
1
D D
SDMMC1 : SD card
U1P
+VDD_3V3_SDMMC1_TEGRA
C17
C17
1
2
C C
U1P
17/21 SDMMC1
17/21 SDMMC1
(1.8/2.8~3.3V)
(1.8/2.8~3.3V)
R1
VDDIO_SDMMC1
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
SDMMC1_DAT0 SDMMC1_DAT1 SDMMC1_DAT2 SDMMC1_DAT3
SDMMC1_CLK
SDMMC1_CMD
SDMMC1_COMP_PU
SDMMC1_COMP_PD
GPIO_PV2 GPIO_PV3
CLK2_OUT CLK2_REQ
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
PU
U7
PU
W11
PU
U1
PU
Y10
PU
T6
PU
T8
SDMMC1_COMP_PU
AF10
SDMMC1_COMP_PD
U9
Z
Y6
Z
W9
PD
U3
Z
U5
9/22 Add U1.U3 GPIO to control Power CP function.
SDMMC_DAT0 <20> SDMMC_DAT1 <20> SDMMC_DAT2 <20> SDMMC_DAT3 <20>
SDMMC_CLK <20> SDMMC_CMD <20>
+VDD_3V3_SDMMC1_TEGRA
R29 33.2_0402_1%R29 33.2_0402_1%
1 2
R30 33.2_0402_1%R30 33.2_0402_1%
1 2
CP_GPIO <27>
SDMMC3 : WIFI
U1O
+VDD_1V8_SDMMC3_TEGRA
C26
C26
1
1
C25
C25
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
<BOM Structure>
<BOM Structure>
<BOM Structure>
B B
A A
<BOM Structure>
U1O
6/21 SDMMC3
6/21 SDMMC3
M36
VDDIO_SDMMC3
(1.8/2.8~3.3V)
(1.8/2.8~3.3V)
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
<BOM Structure>
<BOM Structure>
U1M
U1M
15/21 HSIC
15/21 HSIC
(1.2V)
(1.2V)
Y2
VDDIO_HSIC
U1N
U1N
16/21 IC_USB
16/21 IC_USB
AB8
AVDD_IC_USB
(1.8/3.0V)
(1.8/3.0V)
5
SDMMC3_DAT0 SDMMC3_DAT1 SDMMC3_DAT2 SDMMC3_DAT3 SDMMC3_DAT4 SDMMC3_DAT5 SDMMC3_DAT6 SDMMC3_DAT7
SDMMC3_CLK
SDMMC3_CMD
SDMMC3_COMP_PU
SDMMC3_COMP_PD
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
HSIC_DATA
HSIC_STROBE
HSIC_REXT
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
IC_USB_DN IC_USB_DP
IC_USB_REXT
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
PU
N33
PU
L37
PU
M34
PU
P34
PU
J37
PU
N29
PU
M32
PU
M28
9/26 Modify BOARD_ID3 from U1.J37 to U1.R37
PU
J35
PU
M30
L35
N35
AC5 AD6
AD10
AD4 AE3
AD8
SDMMC3_COMP_PU
SDMMC3_COMP_PD
4
WFMMC_DAT0 <22> WFMMC_DAT1 <22> WFMMC_DAT2 <22> WFMMC_DAT3 <22>
T17PAD@ T17PAD@
WFMMC_CLK <22> WFMMC_CMD <22>
R31 33.2_0402_1%
R31 33.2_0402_1%
1 2
R32 33.2_0402_1%
R32 33.2_0402_1%
1 2
1
C10
C10
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
C14
C14
2
0.1U_0201_10V6K
0.1U_0201_10V6K
1
C18
C18
2
0.1U_0201_10V6K
0.1U_0201_10V6K
1
C30
C30
2
0.1U_0201_10V6K
0.1U_0201_10V6K
2
C205
C205
1
33P 50V J NPO 0201
33P 50V J NPO 0201
+VDD_1V8_SDMMC3_TEGRA
1
1
C11
C11
C12
C12
C13
2
1
C22
C22
2
1
C19
C19
2
1
C108
C108
2
2
C215
C215
1
3
C13
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
33P 50V J NPO 0201
33P 50V J NPO 0201
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
1
C15
C15
C16
C16
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
C20
C20
C21
C21
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
C110
C110
2
Issued Date
Issued Date
Issued Date
+VDD_1V0_DDR_HS_TEGRA
0.1U_0201_10V6K
0.1U_0201_10V6K
C109
C109
2
0.1U_0201_10V6K
0.1U_0201_10V6K
Security Classification
Security Classification
Security Classification
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VDD_1V2_MEM
+VDD_3V3_DDR_RX_TEGRA
U1D
3/21 DDR MEMORY
3/21 DDR MEMORY
(1.2/1.25/1.35/1.5V)
(1.2/1.25/1.35/1.5V)
M14
VDDIO_DDR_01
M16
VDDIO_DDR_02
M18
VDDIO_DDR_03
M20
VDDIO_DDR_04
M22
VDDIO_DDR_05
M24
VDDIO_DDR_06
N15
VDDIO_DDR_07
N17
VDDIO_DDR_08
N19
VDDIO_DDR_09
N21
VDDIO_DDR_10
N23
VDDIO_DDR_11
P26
VDDIO_DDR_12
R25
VDDIO_DDR_13
T26
VDDIO_DDR_14
(2.8/3.3V)
(2.8/3.3V)
A15
VDD_DDR_RX
1
C23
C23
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
(1.05V)
(1.05V)
K12
VDD_DDR_HS_1
L23
VDD_DDR_HS_2
1
C24
C24
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
E29
DDR_DQ00
F28
DDR_DQ01
B30
DDR_DQ02
E25
DDR_DQ03
A29
DDR_DQ04
C25
DDR_DQ05
D24
DDR_DQ06
F24
DDR_DQ07
F14
DDR_DQ08
C15
DDR_DQ09
D14
DDR_DQ10
H14
DDR_DQ11
C13
DDR_DQ12
C11
DDR_DQ13
D12
DDR_DQ14
A9
DDR_DQ15
D30
DDR_DQ16
K24
DDR_DQ17
G27
DDR_DQ18
H24
DDR_DQ19
E27
DDR_DQ20
G29
DDR_DQ21
H28
DDR_DQ22
J25
DDR_DQ23
K14
DDR_DQ24
F10
DDR_DQ25
L15
DDR_DQ26
J15
DDR_DQ27
H12
DDR_DQ28
G11
DDR_DQ29
C9
DDR_DQ30
E9
DDR_DQ31
F26
DDR_DM0
E13
DDR_DM1
C29
DDR_DM2
J13
DDR_DM3
B26
DDR_DQS0N
A27
DDR_DQS0P
A11
DDR_DQS1N
B12
DDR_DQS1P
K26
DDR_DQS2N
H26
DDR_DQS2P
E11
DDR_DQS3N
F12
DDR_DQS3P
J23
DDR_A00
C23
DDR_A01
E21
DDR_A02
A23
DDR_A03
E23
DDR_A04
B18
DDR_A05
A17
DDR_A06
F18
DDR_A07
B14
DDR_A08
C17
DDR_A09
F16
DDR_A10
G17
DDR_A11
J17
DDR_A12
H18
DDR_A13
J19
DDR_A14
J21
DDR_RAS*
H20
DDR_CAS*
H22
DDR_WE*
F20
DDR_BA0
G21
DDR_BA1
F22
DDR_BA2
C21
DDR_CS0*
D20
DDR_CS1*
G23
DDR_ODT0
L19
DDR_ODT1
B20
DDR_CKE0
E19
DDR_CKE1
D18
DDR_CLK*
C19
DDR_CLK
K20
DDR_RESET
C27
DDR_QUSE0
D26
DDR_QUSE1
G15
DDR_QUSE2
H16
DDR_QUSE3
DDR_COMP_PU
DDR_COMP_PU
DDR_COMP_PD
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
2
E17
DDR_COMP_PD
E15
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Tuesday, January 17, 2012
Date: Sheet of
Tuesday, January 17, 2012
Date: Sheet of
Tuesday, January 17, 2012
DDR_A_D0 <9> DDR_A_D1 <9> DDR_A_D2 <9> DDR_A_D3 <9> DDR_A_D4 <9> DDR_A_D5 <9> DDR_A_D6 <9> DDR_A_D7 <9> DDR_A_D8 <9> DDR_A_D9 <9> DDR_A_D10 < 9> DDR_A_D11 < 9> DDR_A_D12 < 9> DDR_A_D13 < 9> DDR_A_D14 < 9> DDR_A_D15 < 9> DDR_A_D16 < 9> DDR_A_D17 < 9> DDR_A_D18 < 9> DDR_A_D19 < 9> DDR_A_D20 < 9> DDR_A_D21 < 9> DDR_A_D22 < 9> DDR_A_D23 < 9> DDR_A_D24 < 9> DDR_A_D25 < 9> DDR_A_D26 < 9> DDR_A_D27 < 9> DDR_A_D28 < 9> DDR_A_D29 < 9> DDR_A_D30 < 9> DDR_A_D31 < 9>
DDR_A_DM0 <9> DDR_A_DM1 <9> DDR_A_DM2 <9> DDR_A_DM3 <9>
DDR_A_DQS#0 <9> DDR_A_DQS0 <9>
DDR_A_DQS#1 <9> DDR_A_DQS1 <9>
DDR_A_DQS#2 <9> DDR_A_DQS2 <9>
DDR_A_DQS#3 <9> DDR_A_DQS3 <9>
DDR_A_MA0 <9> DDR_A_MA1 <9> DDR_A_MA2 <9> DDR_A_MA3 <9> DDR_A_MA4 <9> DDR_A_MA5 <9> DDR_A_MA6 <9> DDR_A_MA7 <9> DDR_A_MA8 <9> DDR_A_MA9 <9>
M_CS#0 <9> M_CS#1 <9>
M_CKE0 <9> M_CKE1 <9>
M_CLK_DDR#0 <9> M_CLK_DDR0 <9>
DDR_RESET
QUSE0 QUSE1 QUSE2 QUSE3
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
T30S(2/5)OSC/PLL/SYS/DDR
T30S(2/5)OSC/PLL/SYS/DDR
T30S(2/5)OSC/PLL/SYS/DDR
T3PAD@ T3PAD@
R33 0_0201_5%R33 0_0201_5%
1 2
R34 0_0201_5%R34 0_0201_5%
1 2
R35 49.9_0402_1%R35 49.9_0402_1%
1 2
R36 49.9_0402_1%R36 49.9_0402_1%
1 2
Picasso 2 R04
Picasso 2 R04
Picasso 2 R04
1
5
5
5
VDD_1V2_MEM
38
38
38
1.0
1.0
1.0
Page 6
A
U1Q is not place on grid , need check connection
1 1
+VDD_1V8_AUDIO_TEGRA
1
C28
C28
2
0.1U_0201_10V6K
0.1U_0201_10V6K
2 2
+AVDD_1V2_DSI_CSI_TEGRA
3 3
1
C31
C31
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
U1Q
U1Q
13/21 AUDIO
13/21 AUDIO
(1.8/3.3V)
(1.8/3.3V)
G33
VDDIO_AUDIO
U1H
U1H
7/21 DSI/CSI
7/21 DSI/CSI
(1.2V)
(1.2V)
AF2
AVDD_DSI_CSI
1
C32
C32
2
0.1U_0201_10V6K
0.1U_0201_10V6K
CLK1_OUT
DAP1_SCLK
DAP1_FS
DAP1_DOUT
DAP1_DIN
DAP2_SCLK
DAP2_FS
DAP2_DOUT
DAP2_DIN
SPDIF_IN
SPDIF_OUT
SPI1_SCK SPI1_CS0* SPI1_MOSI SPI1_MISO
SPI2_SCK SPI2_CS0* SPI2_CS1* SPI2_CS2* SPI2_MOSI SPI2_MISO
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
CSI_CLKAN
CSI_CLKAP
CSI_D1AN
CSI_D1AP
CSI_D2AN
CSI_D2AP
CSI_CLKBN
CSI_CLKBP
CSI_D1BN
CSI_D1BP
CSI_D2BN
CSI_D2BP
E35
L29 B34 D32 A33
H34 K30 F34 C33
L31 J31
G35 H36 L33 F36
K32 J33 B32 F30 D36 E37
AP2 AN3
AJ5 AJ3
AL9 AK10
AR7 AN7
AK4 AL3
AT6 AP6
AUDIO_CLK
PD PD PD PD
PD PD PD PD
PU PU
PU PU PU PD
PU PU PU PU PD PD
B
RF note
R37 0_0201_5%R37 0_0201_5%
1 2
AUDIO_SEL <14>
AUDIO_RST# <14>
ES305_INT_R <14>
ENABLE_USB_HOST <20,27>
8/24 Modify Off-Page type.
AUDIO_SCLK2 <14> AUDIO_FS2 < 14> AUDIO_DOUT2 <14>
AUDIO_DIN2 <14>
AUDIO_CLK_R <15>
10/24 Add BATT_LEARN GPIO to Power request.
10/03 Add D18 on +T30S_USB1 to protect CPU.
BATT_LEARN <27>
COMPASS_DRDY <20>
10/19 Modify D18 from +T30S_ USB1 to VBUS_USB
12/2 Modify D18 from moun to @,Add Zener on samll board.
SC400003Z00
LIGHT_INT <20> HP_DET# <20> CDC_IRQ# <15> EN_ES305_OSC <14> GYRO_INT_R <16>
+T30S_USB1
+AVDD_3V3_USB_TEGRA
USB VBUS overvoltage protection
5M_CAM_CLK#_R <17> 5M_CAM_CLK_R <17>
5M_CAM_DA1#_R < 17> 5M_CAM_DA1_R <17>
5M_CAM_DA2#_R < 17> 5M_CAM_DA2_R <17>
2M_CAM_CLK#_R <17> 2M_CAM_CLK_R <17>
2M_CAM_DA1#_R < 17> 2M_CAM_DA1_R <17>
2M_CAM_DA2#_R < 17> 2M_CAM_DA2_R <17>
+VDD_1V8_CAM_TEGRA
AO3413_SOT23-3
AO3413_SOT23-3
2
G
G
1
C34
C34
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
C
Q18
Q18
D
D
1 3
2
13
1
C35
C35
2
G
G
D
D
S
S
0.1U_0201_10V6K
0.1U_0201_10V6K
S
S
10MIL
3.3V
0.1A
R42
R42
1M_0201_1%
1M_0201_1%
EN_T30S_USB1
Q5
Q5 BSS138W-7-F_SOT323-3
BSS138W-7-F_SOT323-3
U1G
U1G
18/21 CAM
18/21 CAM
(1.8/2.8 ~ 3.3V)
(1.8/2.8 ~ 3.3V)
AL11
VDDIO_CAM
+AVDD_3V3_USB_TEGRA
+AVDD_1V8_USB_PLL_TEGRA
VBUS_USB
12
D18
D18
BZT52-B5V6S_SOD323-2
BZT52-B5V6S_SOD323-2
2 1
D
U1L
U1L
11/21 USB
11/21 USB
(3.3V)
(3.3V)
AB6
AVDD_USB
1
C27
C27
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
(1.8V)
(1.8V)
V2
AVDD_USB_PLL
1
C29
C29
2
0.1U_0201_10V6K
0.1U_0201_10V6K
@
@
+VDD_1V8_CAM_TEGRA
12
12
R40
CAM_I2C_SCL CAM_I2C_SDA
CAM_MCLK
GPIO_PBB0 GPIO_PBB3 GPIO_PBB4 GPIO_PBB5 GPIO_PBB6 GPIO_PBB7
GPIO_PCC1 GPIO_PCC2
R40
2.2K_0201_1%
2.2K_0201_1%
Z
AK14
Z
AN15
Z
R72 0_0201_5%R72 0_0201_5%
AG15
Z
AM10
Z
AM14
Z
AL15
Z
AJ15
Z
AM16
Z
AT14
PU
AU15
PU
AR15
R41
R41
2.2K_0201_1%
2.2K_0201_1%
CAM_I2C_SCL <17,26,35>
1 2
CAM_I2C_SDA <17,26,35>
2M_CAM_RST# <17> 5M_CAM_PWDN <17> 5M_CAM_RST# <17> 2M_CAM_PWDN <17> DOCK_DET# <20>
9/26 Swap U1.AM16 to U1.AM10 for WAKE UP issue
AF8
USB1_VBUS
AL5
USB1_DN
AM4
USB1_DP
AU5
USB1_ID
AH6
USB2_VBUS
AG3
USB2_DN
AG1
USB2_DP
AJ7
USB2_ID
AR5
USB3_VBUS
AF4
USB3_DN
AE5
USB3_DP
AK12
USB3_ID
AE9
USB_REXT
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
1
C372
C372
2
10P_0201_50V8J
10P_0201_50V8J
USB_REXT
CAM_MCLK <17>
E
+T30S_USB1
USB1_DN <20> USB1_DP <20>
USB1_ID <20>
3G_USB_DN <18> 3G_USB_DP <18>
+T30S_USB1
USB_HOST_DN <20> USB_HOST_DP <20>
R39
R39
12
1K_0201_1%
1K_0201_1%
CAM_I2C_SCL CAM_I2C_SDA
RF note
1
C186
C186
2
39P_0201_50V8J
39P_0201_50V8J
1
C187
C187
2
39P_0201_50V8J
39P_0201_50V8J
T30S-R-A3-1.4G_FCCSP681
AJ1
DSI_CLKAN
AK2
DSI_CLKAP
AN1
DSI_D1AN
AM2
DSI_D1AP
AH8
DSI_D2AN
AG9
4 4
A
DSI_D2AP
AG7
DSI_CSI_RUP
AT4
DSI_CSI_RDN
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
+AVDD_1V2_DSI_CSI_TEGRA
DSI_CSI_RUP
DSI_CSI_RDN
12
R44
R44 453_0402_1%
453_0402_1%
12
R45
R45
49.9_0402_1%
49.9_0402_1%
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
T30S-R-A3-1.4G_FCCSP681
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
T30S(3/5)USB/SDIO/UART/AUDIO
T30S(3/5)USB/SDIO/UART/AUDIO
T30S(3/5)USB/SDIO/UART/AUDIO
Picasso 2 R04
Picasso 2 R04
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso 2 R04
E
6
6
6
1.0
1.0
1.0
38
38
38
Page 7
A
+VDD_1V8_UART_TEGRA
U1R
U1R
14/21 UART
14/21 UART
(1.8/3.3V)
(1.8/3.3V)
AC37
1
C38
C38
2
0.1U_0201_10V6K
0.1U_0201_10V6K
+VDD_1V8_BB_TEGRA
V6
1
2
0.1U_0201_10V6K
0.1U_0201_10V6K
NV_THERM_DP
NV_THERM_DN
VDDIO_UART
U1S
U1S
12/21 BB
12/21 BB
VDDIO_BB
(1.8/3.3V)
(1.8/3.3V)
max current is 350uA VR1 =17mV
R59 100_0201_1%R59 100_0201_1%
12
1000P_0201_16V7K
1000P_0201_16V7K
R61 100_0201_1%R61 100_0201_1%
12
PWR_I2C_SCL<10,14,15,26,32,34> PWR_I2C_SDA<10,14,15,26,32,34>
A
1 1
2 2
C43
C43
3 3
4 4
GEN1_I2C_SCL GEN1_I2C_SDA
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
ULPI_DATA0 ULPI_DATA1 ULPI_DATA2 ULPI_DATA3 ULPI_DATA4 ULPI_DATA5 ULPI_DATA6 ULPI_DATA7
ULPI_CLK
ULPI_DIR ULPI_NXT ULPI_STP
DAP3_DIN
DAP3_DOUT
DAP3_FS
DAP3_SCLK
GPIO_PV0 GPIO_PV1
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
+3VS
C46
C46
UART2_TXD
UART2_RXD UART2_RTS* UART2_CTS*
UART3_TXD
UART3_RXD UART3_RTS* UART3_CTS*
GPIO_PU0 GPIO_PU1 GPIO_PU2 GPIO_PU3 GPIO_PU4 GPIO_PU5 GPIO_PU6
DAP4_DIN
DAP4_DOUT
DAP4_FS
DAP4_SCLK
CLK3_OUT CLK3_REQ
THERMD_F_P
12
THERMD_F_N PWR_I2C_SCL PWR_I2C_SDA
AA7 AC7 V8 AC3 V4 AC11 AF6 AA9
AC1 W3 AC9 V10
AA1 W5 Y4 AA3
Y8 AA5
PU PU PU PU PU PU PU PU
Z Z Z
PD PD PD PD
Z Z
1 2
49.9_0402_1%
49.9_0402_1%
Open Drain
AH30 AE29
AN35 AG29 AG31 AJ31
AE33 AJ35 AK36 AJ37
AK34 AF36 AN37 AG33 AM36 AG37 AJ33
AF34 AG35 AF28 AL35
AH32 AF32
ON_KEY#
+VDD_1V8_BB_TEGRA
ON_KEY#
R57
R57
2.2K_0201_1%
2.2K_0201_1%
Z Z
PU PU PU PU
PU PU PU PU
Z Z Z Z Z Z
DEBUG_UART1_RX_R
Z
PD PD PD PD
0 Z
100K_0201_5%
100K_0201_5%
EN_SENSOR_1V8#
DEBUG_UART1_TX <20> DEBUG_UART1_RX <20>
WAKE_UP_ACIN <27> SIM_DET <18>
AUDIO_UART4_TX <14> AUDIO_UART4_RX <14> EN_VDD_GPS <21> EN_SENSOR_1V8# <23>
CAM_LED_EN_NV <35>
WF_RST# <22> BT_WAKEUP <22>
EN_SENSOR_3V3_2 <23>
9/27 ADD EN_SENSOR_3V3_2 to U1.AA3
WAKE_UP_VBUS <27>
12
R164
R164 100K_0201_5%
100K_0201_5%
1
C45
C45
2
0.1U_0201_10V6K
0.1U_0201_10V6K
U4
U4
2
VDD
D+
3
D-
THERM#
ALERT#
8
SCL
7
SDA
GND
NCT1008CMT3R2G_WDFN8_2X2
NCT1008CMT3R2G_WDFN8_2X2
B
+VDD_1V8_SENSOR
12
R46
R46
GPS_UART_TXD <21>
GPS_UART_RXD < 21>
GPS_UART_RTS# < 21>
GPS_UART_CTS# <21>
BT_UART_TXD <22>
BT_UART_RXD <22>
BT_UART_RTS# <22>
BT_UART_CTS# <22>
BT_RST# <22>
GPS_PWRON <21> GPS_RESET# <18,21>
R149
R149
1 2
0_0201_5%
0_0201_5%
BT_PCM_IN <22>
BT_PCM_OUT <22> BT_PCM_SYNC <22> BT_PCM_CLK <22>
CLK_12M_ES305 <14>
+VDD_1V8_BB_TEGRA
12
R77
R77
D20
D20 RB751V-40_SOD323-2
RB751V-40_SOD323-2
12
+3VS_TH
100K_0201_5%
100K_0201_5%
1
4 6
5
B
12
R47
R47
2.2K_0201_1%
2.2K_0201_1%
GEN1_I2C_SCL <16,20> GEN1_I2C_SDA <16,20>
9/22 C
hange EN_3V3_MODEM from AE35 to AF36. 9/26 Change BT_PD# from Y36 to AJ33
EN_3V3_MODEM <18,30>
DEBUG_UART1_RX <20>
BT_PD# <22>
ONKEY# <20,32>
VDD_1V8_PMU_VRTC
+3VS
12
12
R58
R58
R60
R60
100K_0201_5%
100K_0201_5%
AP_OVERHEAT# < 32> TEMP_ALERT# <4>
Thermal
19/21 PEX
19/21 PEX
(1.05V)
(1.05V)
AN29
AVDD_PEXB
(1.05V)
(1.05V)
AM30
VDD_PEXB
(1.05V)
(1.05V)
AN31
AVDD_PEX_PLL
(3.3V)
(3.3V)
AL29
HVDD_PEX
(3.3V)
(3.3V)
AK28
VDDIO_PEX_CTL
U1U
U1U
20/21 SPARE
20/21 SPARE
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
BT_RST# GPS_RESET#
12
R56
R56
100K_0201_5%
100K_0201_5%
100K_0201_5%
100K_0201_5%
U1T
U1T
JTAG_TDI
JTAG_TMS
JTAG_RTCK
JTAG_TCK
JTAG_TRST#
C
Y1
12
R75
R75
For PMU RTCCLK , Load BOM
VDD_1V8_GEN
PEX_L5_TXN PEX_L5_TXP
PEX_L5_RXN PEX_L5_RXP
PEX_CLK3N
PEX_CLK3P
PEX_L2_CLKREQ*
PEX_L2_PRSNT*
PEX_L2_RST*
PEX_WAKE*
PEX_TERMP
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
SPARE_1 SPARE_2 SPARE_3 SPARE_4 SPARE_5
HOT_RST#<20>
R155
R155
1 2
10K_0201_5%
10K_0201_5%
R159
R159
1 2
10K_0201_5%
10K_0201_5%
R160
R160
1 2
10K_0201_5%
10K_0201_5%
R161 100K_0201_5%R161 100K_0201_5%
R162 100K_0201_5%@R162 100K_0201_5%@
Security Classification
Security Classification
Security Classification
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
MPZ1005S300CT_2P
MPZ1005S300CT_2P
AC27 AD28 AG19 AL33 AM34
12
12
Issued Date
Issued Date
Issued Date
L3
L3
1 2
AT30 AU29
AP30 AR29
AT34 AR33
AR31 AT32 AU33
AP32
AP36
JTAG_TRST# JTAG_TDI JTAG_TMS JTAG_TCK JTAG_RTCK JTAG_TDO
ONKEY#
+VDD_1V8_SYS_TEGRA
Y1
1 2
32.768KHZ_12.5P_1TJF125DP1A000D
32.768KHZ_12.5P_1TJF125DP1A000D
AVDD_OSC
C39
C39
+AVDD_1V1_PLL_TEGRA
1
1
C41
C41
C42
C42
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0_0201_5%
0_0201_5%
Z Z
+VDD_1V8_SYS_TEGRA
Z
Z
+VDD_1V8_SYS_TEGRA
JDBUG1
JDBUG1
1 2 3 4 5 6 7 8 9
10 11 12
ACES_87036-1001-CP
ACES_87036-1001-CP
CONN@
CONN@
1 2 3 4 5 6 7 8 9 10 GND GND
1
2
0.1U_0201_10V6K
0.1U_0201_10V6K
R53
R53
HW
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1 2
1
C44
C44
2
PMU_OSC32KOUT <32>PMU_OSC32KIN<32>
P36
B24
K18
A21
AG5
AF30
Y32
0.1U_0201_10V6K
0.1U_0201_10V6K
Compal Secret Data
Compal Secret Data
Compal Secret Data
D
.
CORE_PWR_REQ
CPU_PWR_REQ
U1C
U1C
2/21 OSC, PLL & SYS
2/21 OSC, PLL & SYS
AVDD_OSC
(1.8V)
(1.8V)
D
eep Sleep : OFF
AVDD_PLLA_P_C_S
(1.1V)
(1.1V)
AVDD_PLLX
(1.1V)
(1.1V)
AVDD_PLLM
(1.1V)
(1.1V)
AVDD_PLLU_D
(1.05V)
(1.05V)
AVDD_PLLE
(1.8V)
(1.8V)
VDDIO_SYS
Deep Sleep : ON
Deciphered Date
Deciphered Date
Deciphered Date
D
100K_0201_5%
100K_0201_5%
(1.1V)
(1.1V)
+VDD_1V8_SYS_TEGRA
12
12
R48
R48
R49
R49
100K_0201_5%
100K_0201_5%
CORE_PWR_REQ
TEST_MODE_EN
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
E
14
G
G
09/15 Add for Acer request.
12
12
R51
R51
PMU_RESET_OUT_1V8# <32>
PMU_INT# <32>
PMU_CLK_32K <32>
SC_LOCK# <20>
VOL_UP# <4,20> VOL_DOWN# <4,20> EN_CAM_2V8 <17> BOARD_ID_WP <10>
9/26 Change BT_PD# to AJ33
SD_DET# <20>
LINE_OUT_DET# <20> BT_IRQ# <22>
HDMI_CEC <19>
9/26
Change from J37 to R37.
XTAL_IN
XTAL_OUT
PLL_S_PLL_LF
PWR_I2C_SCL PWR_I2C_SDA
SYS_RESET*
PWR_INT*
CPU_PWR_REQ
SYS_CLK_REQ
CLK_32K_IN
CLK_32K_OUT
KB_COL00 KB_COL01 KB_COL02 KB_COL03 KB_COL04 KB_COL05 KB_COL06 KB_COL07
KB_ROW00 KB_ROW01 KB_ROW02 KB_ROW03 KB_ROW04 KB_ROW05 KB_ROW06 KB_ROW07 KB_ROW08 KB_ROW09 KB_ROW10 KB_ROW11 KB_ROW12 KB_ROW13 KB_ROW14 KB_ROW15
JTAG_TCK
JTAG_TDI JTAG_TDO JTAG_TMS
JTAG_TRST*
JTAG_RTCK
THERM_DN THERM_DP
OWR
HDMI_CEC
8/25 Modify C36&C37 from 12P to 8P.
10/11 Modify C36&C37 from 8P to 10P.
T30S_XTAL_IN
12
R50
R50
2M_0201_5%
2M_0201_5%
T30S_XTAL_OUT
T30S_XTAL_IN
R33
T30S_XTAL_OUT
R35
PLL_S_PLL_LF
R27
10/19 Modify R51 and R52 to 1K ohm
V36 V30
U31
P28
T32 Y34
W27
T30 AB32
U37 U29 AD32 AD36 AC31 Y30 AD30 W35
AC33 R37 W29 R31 U35 V34 U33 AE35 AA35 AA37 AA29 Y36 P30 AC29 P32 AB30
AA31 AC35 Y28 AA33 W33 AD34
E31 C31
R29
V32
V28
+VDD_1V8_SYS_TEGRA
1K_0201_1%
1K_0201_1%
Z Z
Z
SYS_CLK_REQ
0
PU PU PU PU PU PU PU PU
9/22 Swap AD36 & W29 GPIO function. Default pull up& pull down swap
PD PD PD PD
we not use Audio LDO
PD PD PD
9/22 Change EN_3V3_MODEM to AF36
PD
T10PAD@ T10PAD@
PD PD
08/12 Delete EN_ACER_USB_CHARGE
PD PD
T14PAD@ T14PAD@
PD PD PD PD
JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST# JTAG_RTCK
NV_THERM_DN NV_THERM_DP
Z
TEST_MODE_EN
0_0201_5%
0_0201_5%
R62
R62
1 2
9/28 Change Net name from Board_ID3 to PCB_ID3
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
T30S(4/5) UART/OSC/PLL
T30S(4/5) UART/OSC/PLL
T30S(4/5) UART/OSC/PLL
Picasso 2 R04
Picasso 2 R04
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso 2 R04
E
C36
C36
1 2
10P_0201_50V8J
10P_0201_50V8J
G
G
Y10
Y10
26MHZ_10PF_7M26000039
26MHZ_10PF_7M26000039
3 2
C37
C37
1 2
10P_0201_50V8J
10P_0201_50V8J
+VDD_1V8_SYS_TEGRA
12
R91
R91
100K_0201_5%
100K_0201_5%
LINE_OUT_DET#
1
C40
C40
2
@
@
R52
R52 1K_0201_1%
1K_0201_1%
PWR_I2C_SCL <10,14,15,26,32,34> PWR_I2C_SDA <10,14,15,26,32,34>
CORE_PWR_REQ <27,32> CPU_PWR_REQ < 32>
T2PAD@ T2PAD@
CLK_32K_OUT <22>
+VDD_1V8_SYS_TEGRA
WAKEUP_LED <27>
EN_CAM_1V8# <23>
UART_SW <20>
SHORT_DET <15>
WF_WAKE# <22>
G_ACC_INT <16>
T4PAD@ T4PAD@ T5PAD@ T5PAD@ T6PAD@ T6PAD@ T7PAD@ T7PAD@ T8PAD@ T8PAD@ T9PAD@ T9PAD@
PCB_ID3
PICASSO_M PICASSO_2
H LPCB_ID3
7
7
7
0.1U_0201_10V6K
0.1U_0201_10V6K
10K_0201_5%
10K_0201_5%
PICASSO_M@
PICASSO_M@
R195
R195
1 2
10K_0201_5%
10K_0201_5%
PICASSO_2@
PICASSO_2@
R163
R163
1 2
1.0
1.0
1.0
38
38
38
Page 8
5
U1A
U1A
1/21 CORE POWER
1/21 CORE POWER
D D
C C
B B
(1.0 ~ 1.2V)
(1.0 ~ 1.2V)
VDD_RTC_1 VDD_RTC_2
(0.9 ~ 1.0V)
(0.9 ~ 1.0V)
VDD_CPU_01 VDD_CPU_02 VDD_CPU_03 VDD_CPU_04 VDD_CPU_05 VDD_CPU_06 VDD_CPU_07 VDD_CPU_08 VDD_CPU_09 VDD_CPU_10 VDD_CPU_11 VDD_CPU_12 VDD_CPU_13 VDD_CPU_14 VDD_CPU_15 VDD_CPU_16
(1.0 ~ 1.2V)
(1.0 ~ 1.2V)
VDD_CORE_01 VDD_CORE_02 VDD_CORE_03 VDD_CORE_04 VDD_CORE_05 VDD_CORE_06 VDD_CORE_07 VDD_CORE_08 VDD_CORE_09 VDD_CORE_10 VDD_CORE_11 VDD_CORE_12 VDD_CORE_13 VDD_CORE_14 VDD_CORE_15 VDD_CORE_16 VDD_CORE_17 VDD_CORE_18 VDD_CORE_19 VDD_CORE_20 VDD_CORE_21 VDD_CORE_22 VDD_CORE_23 VDD_CORE_24 VDD_CORE_25 VDD_CORE_26 VDD_CORE_27 VDD_CORE_28 VDD_CORE_29 VDD_CORE_30 VDD_CORE_31 VDD_CORE_32 VDD_CORE_33 VDD_CORE_34
(3.3V)
(3.3V)
VPP_FUSE
(3.3V)
(3.3V)
VPP_KFUSE
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
AH26 AJ25
AB12 AB14 AB16 AB18 AB20 AD12 AD14 AD16 AD18 AF14 AF16 T20 V18 V20 Y18 Y20
AB22 AB24 AB26 AD20 AD22 AD24 AD26 AF18 AF20 AF22 AF24 P14 P16 P18 P20 P22 T14 T16 T18 T22 T24 V12 V14 V16 V22 V24 V26 W25 Y12 Y14 Y16 Y22 Y24 Y26
AU17 AU9
+VDD_1V2_RTC_TEGRA
C47
C47
C49
C49
C53
C53
VPP_KFUSE
R64
R64
10K_0201_5%
10K_0201_5%
4
1
2
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
1
C51
C51
C52
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
C55
C55
2
0.1U_0201_10V6K
0.1U_0201_10V6K
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
C61
C61
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
+VDD_3V3_FUSE_TEGRA
C65
C65
C52
C56
C56
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
2
0.1U_0201_10V6K
0.1U_0201_10V6K
C50
C50
2
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
1
C54
C54
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
C59
C59
C60
C60
2
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1 2
VDD_1V0_GEN
1
1
C48
C48
2
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
C57
C57
2
C63
C63
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
R65
R65 10K_0201_5%
10K_0201_5%
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
VDD_1V2_SOC
1
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
C58
C58
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
C64
C64
2
0.1U_0201_10V6K
0.1U_0201_10V6K
1
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
C62
C62
2
12
12/12 Modify R65 from @ to mount.
3
Acer request 07/04
1
1
C88
C88
C101
C101
C102
C102
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
Acer request 07/04
1
1
C104
C104
C105
C105
C106
2
C106
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
2
U1B
U1B
21/21 GND
21/21 GND
AU7
GND_100
B10
GND_101
B16
GND_102
B2
GND_103
B22
GND_104
B28
GND_105
B36
GND_106
C1
GND_107
C3
GND_108
C35
GND_109
C37
GND_110
D10
GND_111
D16
GND_112
D22
GND_113
D28
GND_114
D34
GND_115
D4
GND_116
E33
GND_117
1
1
C103
C103
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
C107
C107
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
E5
GND_118
F32
GND_119
F6
GND_120
G1
GND_121
G13
GND_122
G19
GND_123
G25
GND_124
G31
GND_125
G37
GND_126
G7
GND_127
H30
GND_128
H32
GND_129
H6
GND_130
H8
GND_131
J11
GND_132
J27
GND_133
J29
GND_134
J9
GND_135
K10
GND_136
K16
GND_137
K2
GND_138
K22
GND_139
K28
GND_140
K34
GND_141
K36
GND_142
K4
GND_143
L11
GND_144
L13
GND_145
L17
GND_146
L21
GND_147
L25
GND_148
L27
GND_149
M12
GND_150
M26
GND_151
N1
GND_152
N11
GND_153
N13
GND_154
N25
GND_155
N27
GND_156
N31
GND_157
N37
GND_158
N7
GND_159
P24
GND_160
R13
GND_161
R15
GND_162
R17
GND_163
R19
GND_164
R21
GND_165
R23
GND_166
T10
GND_167
T2
GND_168
T28
GND_169
T34
GND_170
T36
GND_171
T4
GND_172
U11
GND_173
U13
GND_174
U15
GND_175
U17
GND_176
U19
GND_177
U21
GND_178
U23
GND_179
U25
GND_180
U27
GND_181
W1
GND_182
W13
GND_183
W15
GND_184
W17
GND_185
W19
GND_186
W21
GND_187
W23
GND_188
W31
GND_189
W37
GND_190
W7
GND_191
A13
GND_1
A19
GND_2
A25
GND_3
A3
GND_4
A31
GND_5
A35
GND_6
A7
GND_7
AA11
GND_8
AA13
GND_9
AA15
GND_10
AA17
GND_11
AA19
GND_12
AA21
GND_13
AA23
GND_14
AA25
GND_15
AA27
GND_16
AB10
GND_17
AB2
GND_18
AB28
GND_19
AB34
GND_20
AB36
GND_21
AB4
GND_22
AC13
GND_23
AC15
GND_24
AC17
GND_25
AC19
GND_26
AC21
GND_27
AC23
GND_28
AC25
GND_29
AE1
GND_30
AE11
GND_31
AE13
GND_32
AE15
GND_33
AE17
GND_34
AE19
GND_35
AE21
GND_36
AE23
GND_37
AE25
GND_38
AE27
GND_39
AE31
GND_40
AE37
GND_41
AE7
GND_42
AF12
GND_43
AF26
GND_44
AG11
GND_45
AG13
GND_46
AG17
GND_47
AG21
GND_48
AG25
GND_49
AG27
GND_50
AH10
GND_51
AH16
GND_52
AH2
GND_53
AH22
GND_54
AH28
GND_55
AH34
GND_56
AH36
GND_57
AH4
GND_58
AJ11
GND_59
AJ27
GND_60
AJ29
GND_61
AJ9
GND_62
AK30
GND_63
AK32
GND_64
AK6
GND_65
AK8
GND_66
AL1
GND_67
AL13
GND_68
AL19
GND_69
AL25
GND_70
AL31
GND_71
AL37
GND_72
AL7
GND_73
AM32
GND_74
AM6
GND_75
AN33
GND_76
AN5
GND_77
AP10
GND_78
AP16
GND_79
AP22
GND_80
AP28
GND_81
AP34
GND_82
AP4
GND_83
AR1
GND_84
AR3
GND_85
AR35
GND_86
AR37
GND_87
AT10
GND_88
AT16
GND_89
AT2
GND_90
AT22
GND_91
AT28
GND_92
AT36
GND_93
AU13
GND_94
AU19
GND_95
AU25
GND_96
AU3
GND_97
AU31
GND_98
AU35
GND_99
T30S-R-A3-1.4G_FCCSP681
T30S-R-A3-1.4G_FCCSP681
1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
T30S(5/5)PWR_GND_NC
T30S(5/5)PWR_GND_NC
T30S(5/5)PWR_GND_NC
Picasso 2 R04
Picasso 2 R04
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso 2 R04
1
1.0
1.0
8
8
8
1.0
38
38
38
Page 9
5
4
3
2
1
Follow NV design
ET NAME BALL NAME
N A0 P3 A1 N3 A2 M3 A3 M2 A4 M1 A5 G2
D D
C C
B B
A A
A6 F2 A7 F3 A8 E3 A9 E2 CKE0 K1 CKE1 K2 CLK J3 CLK# H3 CS0 L1 CS1 L2 DM0 K5 DM1 H5 DQ0 M9 DQ1 N8 DQ10 F7 DQ11 F9 DQ12 F6 DQ13 G9 DQ14 F8 DQ15 E8 DQ2 M8 DQ3 M7 DQ4 L9 DQ5 L7 DQ6 L8 DQ7 M6 DQ8 G7 DQ9 G8 DQS0 L6 DQS0# L5 DQS1 G6 DQS1# G5
Layer 2
DM2 N7 DM3 E7 DQ16 T8 DQ17 N6 DQ18 P7 DQ19 N5 DQ20 T7 DQ21 T9 DQ22 R8 DQ23 P6 DQ24 D6 DQ25 B8 DQ26 E5 DQ27 E6 DQ28 D7 DQ29 B7 DQ30 C8 DQ31 B9 DQS2 P8 DQS2# P9 DQS3 D8 DQS3# D9
U7
U7
X76_SAM_1GB@
X76_SAM_1GB@
SA00004YY20
SA00004YY20
U7
U7
X76_ELP_1GB@
X76_ELP_1GB@
SA000050Z10
SA000050Z10
+VDD_1V2_DDR_MEM
12
R68
R68
100K_0201_5%
100K_0201_5%
100K_0201_5%
100K_0201_5%
+VRAM_VREFA
12
R69
R69
( 1GB Samsung )
( 1GB Elpida )
1
C68
C68
0.1U_0201_10V6K
0.1U_0201_10V6K
2
DDR_A_D29<5> DDR_A_D25<5> DDR_A_D31<5>
DDR_A_D30<5>
DDR_A_D24<5>
DDR_A_D28<5> DDR_A_DQS3<5> DDR_A_DQS#3<5>
DDR_A_MA9<5> DDR_A_MA8<5>
DDR_A_D26<5>
DDR_A_D27<5>
DDR_A_DM3<5>
DDR_A_D15<5>
DDR_A_MA6<5> DDR_A_MA7<5>
DDR_A_D12<5>
DDR_A_D10<5>
DDR_A_D14<5>
DDR_A_D11<5>
DDR_A_MA5<5>
DDR_A_DQS#1<5>
DDR_A_DQS1<5>
DDR_A_D8<5>
DDR_A_D9<5>
DDR_A_D13<5>
M_CLK_DDR#0<5>
DDR_A_DM1<5>
M_CLK_DDR0<5>
+VDD_1V8_DDR_MEM +VDD_1V8_DDR_MEM
R70
R70
1 2
240_0402_1%
240_0402_1%
R71
R71
1 2
240_0402_1%
240_0402_1%
+VDD_1V2_DDR_MEM
A1 A2 A9
A10
B1 B2 B3 B5 B6 B7 B8 B9
B10
C1 C2 C3 C5 C6 C7 C8 C9
C10
D1 D2 D3 D5 D6 D7 D8 D9
D10
E1 E2 E3
E5 E6 E7 E8 E9
E10
F1 F2 F3 F5 F6 F7
F8
F9
F10
G1
G2
G3 G5
G6 G7 G8 G9
G10
H1 H2 H3
H5 H6 J1 J2
J3
J5
J6
J7
U7
U7
NU NU NU NU NU NC NC VDD2 VDD1 DQ31 DQ29 DQ26 NU VDD1 VSS ZQ1 Vss VSS VDDQ DQ25 VSS VDDQ VSS VDD2 ZQ0 VDDQ DQ30 DQ27 DQS3 /DQS3 VSS
VSS CA9 CA8
DQ28 DQ24 DM3 DQ15 VDDQ VSS NC CA6 CA7 VSS DQ11 DQ13
DQ14
DQ12
VDDQ
VDD2
CA5
VREFCA /DQS1
DQS1 DQ10 DQ9 DQ8
VSS NC VSS /CK
DM1 VDDQ VSS NC
CK
VSS
VDDQ
VDD2
EDB8132B2MA-6D-F_FBGA134
EDB8132B2MA-6D-F_FBGA134
X76_ELP_512M@
X76_ELP_512M@
VREFDQ
CKE0 CKE1
VDDQ
/DQS0
DQS0
VDDQ
DQ19 DQ23
VDDQ
VDD2
VDDQ
DQ17 DQ20 DQS2
/DQS2
VDD1
VDDQ
DQ22
VDDQ
VDD2 VDD1 DQ16
DQ18 DQ21
VSS
NC
DM0
/CS0 /CS1
NC
DQ5 DQ6 DQ7
VSS CA4 CA3 CA2
VSS DQ4 DQ2
DQ1 DQ3
VSS
NC
CA1
DM2 DQ0
VSS
VSS
CA0
VSS
VSS
NC VSS VSS
VSS
NU
NC
NC
NU
NU
NU
NU
NU
+VDD_1V2_DDR_MEM
J8 J9 K1 K2 K3 K5 K6 L1 L2 L3 L5 L6 L7 L8 L9 L10 M1 M2 M3 M5 M6 M7
M8 M9 M10 N1 N2 N3 N5 N6
N7 N8 N9 N10 P1 P2 P3 P5 P6 P7 P8 P9 P10 R1 R2 R3 R5 R6 R7 R8
R9 R10 T1 T2 T3 T5 T6 T7
T8 T9
T10 U1
U2 U9
U10
M_CKE0 <5> M_CKE1 <5>
DDR_A_DM0 <5>
M_CS#0 <5> M_CS#1 <5>
DDR_A_DQS#0 <5>
DDR_A_DQS0 <5>
DDR_A_D5 <5> DDR_A_D6 <5> DDR_A_D4 <5>
DDR_A_MA4 <5> DDR_A_MA3 <5> DDR_A_MA2 <5>
DDR_A_D7 <5> DDR_A_D3 <5>
DDR_A_D2 <5> DDR_A_D0 <5>
DDR_A_MA1 <5>
DDR_A_D19 < 5> DDR_A_D17 < 5>
DDR_A_DM2 <5>
DDR_A_D1 <5>
DDR_A_MA0 <5>
DDR_A_D23 < 5> DDR_A_D18 < 5>
DDR_A_DQS2 <5>
DDR_A_DQS#2 <5>
DDR_A_D22 < 5>
DDR_A_D20 < 5>
DDR_A_D16 < 5> DDR_A_D21 < 5>
+VRAM_VREDQ
C66
C66
+VDD_1V2_DDR_MEM
12
12
1
2
0.1U_0201_10V6K
0.1U_0201_10V6K
R66
R66 100K_0201_5%
100K_0201_5%
R67
R67 100K_0201_5%
100K_0201_5%
+VDD_1V8_DDR_MEM
0.1U_0201_10V6K
0.1U_0201_10V6K
C69
C69
1
2
0.01U_0201_16V7
0.01U_0201_16V7
+VDD_1V8_DDR_MEM
0.1U_0201_10V6K
0.1U_0201_10V6K
C77
C77
1
2
0.01U_0201_16V7
0.01U_0201_16V7
+VDD_1V8_DDR_MEM
0.1U_0201_10V6K
0.1U_0201_10V6K
C85
C85
1
2
0.01U_0201_16V7
0.01U_0201_16V7
+VDD_1V8_DDR_MEM
0.1U_0201_10V6K
0.1U_0201_10V6K
C93
C93
1
2
0.01U_0201_16V7
0.01U_0201_16V7
F1,H1,N2 are the NC pins which assembled/embedded the interconnection into ELP Vdd sources already. due to co-layout the LPDDR2, it is need to apply 1.2 volt on F1, H1 and N2 pins.
Acer request
+VDD_1V2_DDR_MEM
1
C70
C70
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C78
C78
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C86
C86
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C94
C94
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1
C72
C72
C71
C71
0.1U_0201_10V6K
0.1U_0201_10V6K
2
2
1
1
C79
C79
C80
C80
0.1U_0201_10V6K
0.1U_0201_10V6K
2
2
1
1
C87
C87
C92
C92
0.1U_0201_10V6K
0.1U_0201_10V6K
2
2
1
1
C95
C95
C96
C96
0.1U_0201_10V6K
0.1U_0201_10V6K
2
2
1
1
C73
C73
C74
C74
2
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
1
C82
C82
C81
C81
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
C89
C89
C178
C178
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
C98
C98
C97
C97
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
2
2
C260
C260
C252
C252
1
1
33P 50V J NPO 0201
33P 50V J NPO 0201
33P 50V J NPO 0201
33P 50V J NPO 0201
1
1
C75
C75
C76
C76
2
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
1
C83
C83
C84
C84
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
C90
C90
C91
C91
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1
1
C99
C99
C100
C100
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LPDDRII-DEVICE DOWN
LPDDRII-DEVICE DOWN
LPDDRII-DEVICE DOWN
Picasso 2 R04
Picasso 2 R04
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Picasso 2 R04
1
1.0
1.0
9
9
9
1.0
38
38
38
Page 10
5
D D
C C
4
3
2
1
Remove EC
+VDD_1V8_SYS_TEGRA
PN:SA00004KS00 2k bit
U54
U54
1
A0
2
A1
B B
A A
5
4
3
A2 GND4SDA
AT24C02C-XHM-T_TSSOP8
AT24C02C-XHM-T_TSSOP8
need check with SW Roger
08/04 Change U54 and C115 to @ 08/12 Change U54 to SA000056G00 08/12 Change U54 footprint to AT24C64A-10TQ-2P7_TSSOP8 08/12 Change U54 footprint to AT24C64A-10TQ-2P7_TSSO 08/20 Change U54 to SA00004KS00
11/30 Change U54 to SA00005GV00
12/16 Change U54 to SA00004KS00(2K).
8
VCC
7
WP
6
SCL
5
BOARD_ID_WP <7> PWR_I2C_SCL <7,14,15,26,32,34> PWR_I2C_SDA <7,14,15,26,32,34>
2
C115
C115
1
need check with WC of GPIO
0.1U_0201_10V6K
0.1U_0201_10V6K
P9
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EC(Reserved)
EC(Reserved)
EC(Reserved)
Picasso 2 R04
Picasso 2 R04
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso 2 R04
1
1.0
1.0
10
10
10
1.0
38
38
38
Page 11
5
4
3
2
1
EMMC_CLK_R
1
C122
C122
12P_0201_50V8J
12P_0201_50V8J
D D
close U13
C C
B B
A A
5
2
A4 A6 A9
A11
B2
B13
D1
D14
H1 H2 H6 H7 H8
H9 H10 H11 H12 H13 H14
J1 J7 J8
J9 J10 J11 J12 J13 J14
K1
K3
K5
K7
K8
K9 K10 K11 K12 K13 K14
L1
L2
L3
L4 L12 L13 L14
M1 M2 M3 M5 M8
M9 M10 M12 M13 M14
N1
N2
N3 N10 N12 N13 N14
P1 P2
P3 P10 P12 P13 P14
R1 R2 R3
R5 R12 R13 R14
T1 T2 T3
T5 T12 T13 T14
13
14
15
16
17
18
19
20
21
22
23
24
U13
U13
NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
NC NC NC NC NC NC NC NC NC NC NC NC
SAND64GB@
SAND64GB@
4
+VDD_2V85_EMMC
VCCM6VCCN5VCC
T10
AA6
VSSQ
U9
VCC
VSSQ
AA4
VSSQY5VSSQY2VSSQ
K4
+VDDIO_1V8_EMMC
AA3
VCCQK6VCCQW4VCCQY4VCCQ
VSSU8VSS
R10
AA5
VCCQ
VSSP5VSS
M7
W5
CMD
W6
CLK
H3
DAT0
H4
DAT1
H5
DAT2
J2
DAT3
J3
DAT4
J4
DAT5
J5
DAT6
J6
DAT7
K2
VDDi
U1
NC
U2
NC
U3
NC
U5
RSTN
U6
NC
U7
NC
U10
NC
U12
NC
U13
NC
U14
NC
V1
NC
V2
NC
V3
NC
V12
NC
V13
NC
V14
NC
W1
NC
W2
NC
W3
NC
W7
NC
W8
NC
W9
NC
W10
NC
W11
NC
W12
NC
W13
NC
W14
NC
Y1
NC
Y3
NC
Y6
NC
Y7
NC
Y8
NC
Y9
NC
Y10
NC
Y11
NC
Y12
NC
Y13
NC
Y14
NC
AA1
NC
AA2
NC
AA7
NC
AA8
NC
AA9
NC
AA10
NC
AA11
NC
AA12
NC
AA13
NC
AA14
NC
AE1
NC
AE14
NC
AG2
NC
AG13
NC
AH4
NC
AH6
NC
AH9
NC
AH11
NC
1
NC
2
NC
3
NC
4
NC
5
NC
6
NC
7
NC
8
NC
9
NC
10
NC
11
NC
12
NC
SDIN5F1-64G_TFBGA169
SDIN5F1-64G_TFBGA169
EMMC_CMD_R
EMMC_CLK_R
EMMC_DAT0_R EMMC_DAT1_R EMMC_DAT2_R EMMC_DAT3_R EMMC_DAT4_R EMMC_DAT5_R EMMC_DAT6_R EMMC_DAT7_R
C123
C123
1 2
0.1U_0201_10V6K
0.1U_0201_10V6K
MMC_RST#
+VDDIO_1V8_EMMC
C149
C148
@ C148
@
C119
C119
1
2.2U_0402_6.3VM
2.2U_0402_6.3VM
2
1 2
R102 33_0201_1%R102 33_0201_1%
R103 0_0201_5%R103 0_0201_5%
1 2
R104 33_0201_1%R104 33_0201_1%
1 2
R105 33_0201_1%R105 33_0201_1%
1 2
R106 33_0201_1%R106 33_0201_1%
1 2
R107 33_0201_1%R107 33_0201_1%
1 2
R108 33_0201_1%R108 33_0201_1%
1 2
R109 33_0201_1%R109 33_0201_1%
1 2
R110 33_0201_1%R110 33_0201_1%
1 2
R111 33_0201_1%R111 33_0201_1%
1 2
R112 0_0201_5%R112 0_0201_5%
1 2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
2
C120
C120
0.1U_0201_10V6K
0.1U_0201_10V6K
1
2
C121
C121
0.1U_0201_10V6K
0.1U_0201_10V6K
EMMC_CMD <4>
EMMC_CLK <4>
EMMC_DA0 <4> EMMC_DA1 <4> EMMC_DA2 <4> EMMC_DA3 <4> EMMC_DA4 <4> EMMC_DA5 <4> EMMC_DA6 <4> EMMC_DA7 <4>
EMMC_RST# <4>
Compal Secret Data
Compal Secret Data
Compal Secret Data
12
22U_0603_6.3V6M
22U_0603_6.3V6M
Deciphered Date
Deciphered Date
Deciphered Date
2
C149
2
1
11/23 Reserver C148,C149 and C150 for Acer HW request.
11/23 Modify C117 from 2.2U 0402 to 10U 0402. 12/7 Modify C148,C149,C150 from @ to mount
12/16 Modify C148 and c150 from mount to @ for LDO solution.
+VDD_2V85_EMMC
C117
C117
C118
1
2
10U_0402_6.3V6M
10U_0402_6.3V6M
EMMC_CMD_R
MMC_RST#
C118
1
2
0.1U_0201_10V6K
0.1U_0201_10V6K
U13
U13
U13
U13
U13
U13
U13
U13
U13
U13
U13
U13
U13
U13
U13
U13
+VDDIO_1V8_EMMC
R113
R113
R114
R114
4.7K_0201_5%
4.7K_0201_5%
1 2
KING16GB@
KING16GB@
SA00004O610
SA00004O610
SAND16GB@
SAND16GB@
SA00004XA00
SA00004XA00
SAM16GB@
SAM16GB@
SA00004FN20
SA00004FN20
KING32GB@
KING32GB@
SA00004TD00
SA00004TD00
SAM32GB@
SAM32GB@
SA00004FO40
SA00004FO40
SAND32GB@
SAND32GB@
SA000052910
SA000052910
SAND432GB@
SAND432GB@
SA000042X20
SA000042X20
SAND64GB@
SAND64GB@
SA00004XQ10
SA00004XQ10
4.7K_0201_5%
4.7K_0201_5%
1 2
C150
@ C150
@
2
1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
8/26 ADD for SKU control.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
eMMC
eMMC
eMMC
Picasso 2 R04
Picasso 2 R04
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Picasso 2 R04
1
1.0
1.0
11
11
11
1.0
38
38
38
Page 12
5
D D
10/19 Modify U20 PN from SA000050500 to SA000059A00
LCD_D22<4> LCD_D23<4> LCD_D12<4> LCD_D13<4> LCD_D14<4> LCD_D15<4> LCD_D16<4> LCD_D17<4>
LCD_D20<4> LCD_D21<4> LCD_D06<4> LCD_D07<4> LCD_D08<4> LCD_D09<4> LCD_D10<4> LCD_D11<4>
LCD_D18<4> LCD_D19<4> LCD_D00<4> LCD_D01<4> LCD_D02<4> LCD_D03<4> LCD_D04<4>
C C
LCD_D05<4>
R0 R1 R2 R3 R4 R5 R6 R7
G0 G1 G2 G3 G4 G5 G6 G7
B0 B1 B2 B3 B4 B5 B6 B7
09/21 swap LCD_D00~LCD_D23 for colay.
+VDD_LVDS
R139
R139 10K_0201_5%
10K_0201_5%
PICASSO_M@
PICASSO_M@
1 2
1 2
R193
R193 10K_0201_5%
10K_0201_5%
PICASSO_2@
PICASSO_2@
LVDS_MAP
09/21 Add R165 select pin for Picasso M.
LVDS_MAP configuration: High: Picasso M Low: Picasso 2
B B
need check for single in single out
+VDD_LVDS +VDD_LVDS
R144
@R144
@
10K_0201_5%
10K_0201_5%
1 2
LVDS_CTRL2 LVDS_CT RL0
R143
R143 10K_0201_5%
10K_0201_5%
1 2
A A
1 2
R140
R140 10K_0201_5%
10K_0201_5%
LVDS_CTRL1
+VDD_LVDS
1 2
1 2
R147
PICASSO_M@R147
PICASSO_M@
10K_0201_5%
10K_0201_5%
R141
PICASSO_2@R141
PICASSO_2@
10K_0201_5%
10K_0201_5%
LCD_VSYNC<4> LCD_HSYNC<4>
LCD_DE<4>
LCD_PCLK<4>
LVDS_SHTDN#<4>
LVDS_MAP LVDS_CTRL0 LVDS_CTRL1 LVDS_CTRL2
LVDS_RF
LVDS_RS
R148
R148
10K_0201_5% @
10K_0201_5% @
08/12 Add R148 PD LVDS_SHTDN# to GND
CTRL[2:0] = HHL Single-In, Dual-Out (DDR On)
Single-In, Single-Out (Distribution Off)CTRL[2:0] = LHH
CTRL[2:0] = HHH Single-In, Single-Out (Distribution On)
5
4
10/03 Modify C125,C126,C128,C129,C132,C139,C140,C141 and C142 from +VDD_LVDS to LB_VCC power domain.
LB_VCC
U20
U20
B36
TA10
A43
TA11
B37
TA12
A44
TA13
B38
TA14
A45
TA15
B40
TA16
A47
TA17
A48
TA18
B41
TA19
A49
TB10
B42
TB11
A50
TB12
B43
TB13
CH 1 Input
TB14 TB15 TB16 TB17 TB18 TB19 TC10 TC11 TC12 TC13 TC14 TC15 TC16 TC17 TC18 TC19 RES11 RES12
TA20 TA21 TA22 TA23 TA24 TA25 TA26 TA27 TA28 TA29 TB20 TB21 TB22 TB23 TB24 TB25 TB26 TB27 TB28 TB29 TC20 TC21 TC22 TC23 TC24 TC25 TC26 TC27 TC28 TC29 RES21 RES22
VSYNC HSYNC DE
CLKIN
MAP CTRL0 CTRL1 CTRL2
R/F
RS
PD#
+VDD_LVDS
1 2
1 2
CH 1 Input
CH 2 Input
CH 2 Input
Input control
Input control
GND_1B2GND_2A8GND_3
A52
A46
R188
R188 10K_0201_5%
10K_0201_5%
R145
@R145
@
0_0201_5%
0_0201_5%
GND_4
GND_5
A58
LVDS_RF
GND_6
GND_7
GND_8
PGND_1
B54
A70
B65
A41
A42
C135
C135
A51 B45 A53 B46 A54 A55 B47 A56 B48 A57 B50 A59 B51 B52 A62 B53
B8
A10
A64 B55 A65 B56 A66 A67 B57 A68 B58 A69 B60 A71 B61 A72 B62 A73 B63 A74 A75 B64 A77 B66 A78 B67 A79 B68
A1 B1 A3 B3 B9
A11
B4 A4 A5
B7
A13 A14 B12 A15
B10
A12
B14
1 2
4
PGND_2
PGND_3
A20
1
2
PGND_5
PGND_4
B16
B17
+VDD_LVDS
0.1U_0201_10V6K
0.1U_0201_10V6K
C131
C131
1
2
LGND_1
A21
B20
12
12
C134
C134
2
1
0.1U_0201_10V6K
0.1U_0201_10V6K
(3.3V)
(3.3V)
LVDS CH1
LVDS CH1
LVDS CH2
LVDS CH2
LGND_2
LGND_3
LGND_4
LGND_5
A27
A30
A33
R146
200K _0201_1%
200K _0201_1%
LVDS_RS
R142
100K_0201_5%
100K_0201_5%
C125
C125
C124
C124
1
2
0.01U_0201_16V7
0.01U_0201_16V7 10U_0402_6.3V6M
10U_0402_6.3V6M
A2
VCC_1
A7
VCC_2
B39
VCC_3
B44
VCC_4
B49
VCC_5
A63
VCC_6
B59
VCC_7
A76
VCC_8
A24
LVCC_1
B23
LVCC_2
B26
LVCC_3
B29
LVCC_4
A37
LVCC_5
A19
PVCC_1
B35
PVCC_2
B33
TXA1+
A39
TXA1-
B32
TXB1+
A38
TXB1-
B30
TXC1+
A36
TXC1-
A32
TXD1+
B28
TXD1-
A31
TXE1+
B27
TXE1-
A29
TXA2+
B25
TXA2-
A28
TXB2+
B24
TXB2-
B22
TXC2+
A26
TXC2-
B19
TXD2+
A23
TXD2-
B18
TXE2+
A22
TXE2-
A34
TCLK1+
A35
TCLK1-
B21
TCLK2+
A25
TCLK2-
A17
TEST
B5
NC_1
A6
NC_2
B6
NC_3
A9
NC_4
B11
NC_5
B13
NC_6
A16
NC_7
B15
NC_8
A18
NC_9
A60
NC_10
A61
NC_11
A80
NC_12
LGND_6
LGND_7
LGND_8
GND_PAD
1RLP105ANQG8_QFN148_11X11
1RLP105ANQG8_QFN148_11X11
Z1
B31
B34
A40
R146
@R142
@
10/14 Modify LVDS_RS from pull up to pull dow n to reduce power consumption.
11/1 Modify LVDS_RS from pull down to pull up to meet SPEC
3
08/09 Add C139-C140 for +VDD_LVDS
C141
C141
C142
C139
C139
C132
1
2
0.1U_0201_10V6K
0.1U_0201_10V6K
R192
R192
1 2
0_0402_5%
0_0402_5%
C132
C129
C129
2
1
1
2
0.1U_0201_10V6K
0.1U_0201_10V6K
+VDD_LVDS
12
33P_0201_50V8J
33P_0201_50V8J
10U_0402_6.3V6M
10U_0402_6.3V6M
C140
C140
12
R122 0_0402_5%
R122 0_0402_5%
R156 0_0402_5%@R156 0_0402_5%@
C128
C128
C126
C126
1
1
2
2
0.01U_0201_16V7
0.01U_0201_16V7
0.01U_0201_16V7
0.01U_0201_16V7
LB_VCC
C142
12
12
33P_0201_50V8J
33P_0201_50V8J
33P_0201_50V8J
33P_0201_50V8J
33P_0201_50V8J
33P_0201_50V8J
12
12
09/21 Isolated LB_VCC and PLLVCC.
PLLVCC
R189
R189
1 2
0_0402_5%
0_0402_5%
LVDS_A0 LVDS_A0#
LVDS_A1 LVDS_A1#
LVDS_A2 LVDS_A2#
LVDS_A3 LVDS_A3#
12
R73 100_0201_1%R73 100_0201_1%
LVDS_A4 LVDS_A4#
LVDS_A5 LVDS_A5#
LVDS_A6 LVDS_A6#
LVDS_A7 LVDS_A7#
12
R74 100_0201_1%R74 100_0201_1%
LVDS_ACLK1 LVDS_ACLK1#
LVDS_ACLK2 LVDS_ACLK2#
C338
10P_0201_50V8J
C338
10P_0201_50V8J
10P_0201_50V8J
10P_0201_50V8J
C328
10P_0201_50V8J
C328
10P_0201_50V8J
1
1
2
2
C360
C360
C364
10P_0201_50V8J
C364
10P_0201_50V8J
1
1
2
2
LVDS_ACLK2
R125 0_0201_5%
R125 0_0201_5%
L5
L5
4
4
1
1
S COM FI_ ICT ICM F112P900MFR
S COM FI_ ICT ICM F112P900MFR
LVDS_ACLK2#
R123 0_0201_5%
R123 0_0201_5%
LVDS_A4
R127 0_0201_5%
R127 0_0201_5%
L8
L8
4
4
1
1
S COM FI_ ICT ICM F112P900MFR
LVDS_A4#
LVDS_A5
LVDS_A5#
LVDS_A6
LVDS_A6#
LVDS_A7 LVDS_A3
LVDS_A7#
S COM FI_ ICT ICM F112P900MFR
R129 0_0201_5%
R129 0_0201_5%
R131 0_0201_5%
R131 0_0201_5%
L10
L10
4
4
1
1
S COM FI_ ICT ICM F112P900MFR
S COM FI_ ICT ICM F112P900MFR
R133 0_0201_5%
R133 0_0201_5%
R135 0_0201_5%
R135 0_0201_5%
L11
L11
4
4
1
1
S COM FI_ ICT ICM F112P900MFR
S COM FI_ ICT ICM F112P900MFR
R137 0_0201_5%
R137 0_0201_5%
R249 0_0201_5%
R249 0_0201_5%
L45
L45
4
4
1
1
S COM FI_ ICT ICM F112P900MFR
S COM FI_ ICT ICM F112P900MFR
R252 0_0201_5%
R252 0_0201_5%
11/11 Add C328,C338,C360 and C364 for Acer RF request.
RS Input Voltage
VCC
0.6 ~ 1.4 V
GNDSingle-In, Dual-Out (DDR Off)CTRL[2:0] = LHL
3
LVDS Output Swing
350 mV
350 mV
200 mV
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CMOS/TTL Input Configuration ( Input Voltage Swing
Standard Input and Output Configuration
Small Input Swing, Standard Output Swing Configuration
Standard Input Swing, Reduced Output Swing Configuration
+LCDVDD
+3VS
1 2
@
@
3
2
1 2
@
@
1 2
@
@
3
2
1 2
@
@
1 2
@
@
3
2
1 2
@
@
1 2
@
@
3
2
1 2
@
@
1 2
@
@
3
2
1 2
@
@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
C130
1
2
0.01U_0201_16V7
0.01U_0201_16V7
LVDS_ACLK1
LVDS_ACLK1#
LVDS_A0
LVDS_A0#
LVDS_A1
LVDS_A1#
LVDS_A2
LVDS_A2#
LVDS_A3#
C130
C133
C133
1
2
0.1U_0201_10V6K
0.1U_0201_10V6K
R126 0_0201_5%
R126 0_0201_5%
1 2
@
@
L6
L6
4
4
1
1
S COM FI_ ICT ICM F112P900MFR
S COM FI_ ICT ICM F112P900MFR
R124 0_0201_5%
R124 0_0201_5%
1 2
@
@
R128 0_0201_5%
R128 0_0201_5%
1 2
@
@
L7
L7
4
4
1
1
S COM FI_ ICT ICM F112P900MFR
S COM FI_ ICT ICM F112P900MFR
R130 0_0201_5%
R130 0_0201_5%
1 2
@
@
R132 0_0201_5%
R132 0_0201_5%
1 2
@
@
L9
L9
4
4
1
1
S COM FI_ ICT ICM F112P900MFR
S COM FI_ ICT ICM F112P900MFR
R134 0_0201_5%
R134 0_0201_5%
1 2
@
@
R136 0_0201_5%
R136 0_0201_5%
1 2
@
@
L12
L12
4
4
1
1
S COM FI_ ICT ICM F112P900MFR
S COM FI_ ICT ICM F112P900MFR
R138 0_0201_5%
R138 0_0201_5%
1 2
@
@
R247 0_0201_5%
R247 0_0201_5%
1 2
@
@
L46
L46
4
4
1
1
S COM FI_ ICT ICM F112P900MFR
S COM FI_ ICT ICM F112P900MFR
R250 0_0201_5%
R250 0_0201_5%
1 2
@
@
C127
C127
PLLVCC
09/26
Change R122 & R156 package from 0201 to 0402
LVDS_ACLK2_R <13>
3
SM070002I00
2
LVDS_ACLK2#_R <13>
LVDS_A4_R <13>
3
S
M070002I00 SM070002I00
2
LVDS_A4#_R <13>
LVDS_A5_R <13>
3
SM070002I00 SM070002I00
2
LVDS_A5#_R <13>
LVDS_A6_R <13>
3
SM070002I00 SM070002I00
2
LVDS_A6#_R <13>
LVDS_A7_R <13>
3
SM070002I00
2
LVDS_A7#_R <13>
08/05 Change L5-L12,L45,L46 to mount
08/12 Change L5-L12,L45,L46 to SM070002N00
10/17 Chanfe Bead P/N from SM070002N00 to SM070002I0
1
2
1
10U_0402_6.3V6M
10U_0402_6.3V6M
3
3
2
2
3
3
2
2
3
3
2
2
3
3
2
2
3
3
2
2
Close LVDS Transmitter (U20)
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LVDS Transmitter
LVDS Transmitter
LVDS Transmitter
Picasso 2 R04
Picasso 2 R04
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso 2 R04
1
LVDS_ACLK1_R <13>
SM070002I00
LVDS_ACLK1#_R <13>
LVDS_A0_R <13>
LVDS_A0#_R <13>
LVDS_A1_R <13>
LVDS_A1#_R <13>
LVDS_A2_R <13>
LVDS_A2#_R <13>
LVDS_A3_R <13>
SM070002I00
LVDS_A3#_R <13>
0
12
12
12
1.0
1.0
1.0
38
38
38
Page 13
5
D D
0.1U_0201_10V6K
0.1U_0201_10V6K
C179
C179
+LCDVDD
4
1
1
C185
C185 1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
3
+3VS
R279 0_0201_5%R279 0_0201_5%
EN_VDDLCD_T30S<4>
1 2
R150
R150
100K_0201_5%
100K_0201_5%
2
U21
U21
5
VIN
4
EN
APL3511CBI-TRG_SOT23-5
APL3511CBI-TRG_SOT23-5
12
08/01 Change L13 to SM010031680 08/01 Change L13 footprint to
KC_FBMA-L11-160808-121LMT_2P
+LCDVDD_L
VOUT
1
2
GND
3
OCB
1 2
FBMA-L11-160808-301LMA20T_0603~D
FBMA-L11-160808-301LMA20T_0603~D
1
L13
L13
1
C180
C180
C181
C181
2
0.1U_0201_10V6K
0.1U_0201_10V6K
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
+LCDVDD
C188
C188
1
1
1
C182
C182
2
2
2
39P_0201_50V8J
39P_0201_50V8J
3300P_0201_16V6K
3300P_0201_16V6K
11/06 Add for COMPAL EMI request.
LCD POWER CIRCUIT
JLVDS1
JLVDS1
1
1
2
2
3
3
Panel SPEC
2 VDD Power Supply +3.3V 3 VDD Power Supply +3.3V 4 VDDEDID EDID +3.3V
C C
38 DCR_EN (CABC_EN) Dynamic backlight control 39 PWM_IN System PWM signal input for dimming 40 PWM_OUT Panel PWM signal output to system
43 LED_CA5 LED Cathode 5 44 LED_CA4 LED Cathode 4 45 LED_CA3 LED Cathode 3 46 LED_CA2 LED Cathode 2 47 LED_CA1 LED Cathode 1
49 VLED Output LED Backlight power 50 VLED Output LED Backlight power
51 52 53
B B
54
LTCX003KB00
07/28 Change JLVDS1 footprint
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
41
41
42
42
43
43
44
44
45
45
46
46
GND
47
47
GND
48
48
GND
49
49
GND
50
50
STARC_300E50-0010RA-G3
STARC_300E50-0010RA-G3
CONN@
CONN@
Remove LVDS I2C
+LCDVDD
LVDS_A0#_R <12> LVDS_A0_R <12>
LVDS_A1#_R <12> LVDS_A1_R <12>
LVDS_A2#_R <12> LVDS_A2_R <12>
LVDS_ACLK1#_R <12> LVDS_ACLK1_R <12>
LVDS_A3#_R <12> LVDS_A3_R <12>
LVDS_A4#_R <12> LVDS_A4_R <12>
R83 0_0201_5%@R83 0_0201_5%@ R82 0_0201_5%@R82 0_0201_5%@
12 12
+VDD_LED_BL
LVDS_A5#_R <12> LVDS_A5_R <12>
LVDS_A6#_R <12> LVDS_A6_R <12>
LVDS_ACLK2#_R <12> LVDS_ACLK2_R <12>
LVDS_A7#_R <12> LVDS_A7_R <12>
LCD_DCR <4>
LCD_PWM_OUT <4>
INVTPWM <31> DISPOFF# <4,31> FB5 <31> FB4 <31> FB3 <31> FB2 <31> FB1 <31>
8/25 Acer request
Add R86,R83&R82 to panel back light.
Remove C188 , due to PC57,PC55 is close to pin 48
LCD_PWM_OUT INVTPWM
40 . to LED power IC 41 . For Picasso 1 Pannel backlight
R86 0_0201_5%R86 0_0201_5%
12
10/19 Add for Discharge +5VS
EN_5V0_BUCKBOOST<28,32>
C169
C169
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
Q48
Q48
5
S1
G1
D1 D2
2
S2
G2
DMN2004DWK-7_SOT363-6
DMN2004DWK-7_SOT363-6
+5VS
1
1
C184
C184
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
100K_0201_5%
100K_0201_5%
4 3 6 1
L14
L14
1 2
MPZ1005S300CT_2P
MPZ1005S300CT_2P
B+ +5VS
12
R95
R95
12
R96
R96 1K_0201_1%
1K_0201_1%
1
C168
C168
C183
C183
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
0.1U_0201_10V6K
0.1U_0201_10V6K
2
JTP1
JTP1
1
1
GEN2_I2C_SCL<4>
GEN2_I2C_SDA<4>
TS_INT#<4>
TS_RST#<4>
TS_PWR_EN<4>
10/02 Modify R166 BOM Structure from Mount to Unmount
+3VS
12
R166
R166
100K_0201_5%
100K_0201_5%
@
@
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
TS_RST#
TS_INT# TS_RST#
2
3
D12
@D12
@
TVNST52302AB0_SOT523-3
TVNST52302AB0_SOT523-3
SCA00001W00 SCA00001W00
1
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
2
3
D13 TVNST52302AB0_SOT523-3
TVNST52302AB0_SOT523-3
1
GEN2_I2C_SCL GEN2_I2C_SDA
@D13
@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
C
C
C
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
T15PAD @T15PAD @ T16PAD @T16PAD @
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
LCD Panel/Touch Panel
LCD Panel/Touch Panel
LCD Panel/Touch Panel
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
GND1
12
GND2
ACES_50506-01041-001
ACES_50506-01041-001
CONN@
CONN@
LTCX003HG00
Touch Panel
Picasso 2 R04
Picasso 2 R04
Picasso 2 R04
1
1.0
1.0
13
13
13
1.0
38
38
38
Page 14
5
+VDD_1V8_AUDIO
R168
R168
1 2
0_0201_5%
0_0201_5%
D D
C C
R182 0_0201_5%R182 0_0201_5%
EN_ES305_OSC<6>
1 2
Vcount Output
H OSC out OPEN OSC out L High Z
@ R184
@
10K_0201_5%
10K_0201_5%
470K_0402_5%
470K_0402_5%
1
C193
C193
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
C196
C196
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
C198
C198
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
R184
R183
R183
1
2
1
2
1
2
12
1 2
SW
B B
DAP2_DIN
DAP2_DOUT
DAP2_SCLK
DAP2_FS
AUDIO_DIN2
AUDIO_DOUT2
AUDIO_SCLK2
AUDIO_FS2
T30S
A A
C_DO
C_DI
C_CLK
C_FS
B_DO
B_DI
B_CLK
B_FS
A_DI
A_DO
A_CLK
A_FS
ES305 WM8903
D_DO
D_DI
D_CLK
D_FS
4
VDD_IO_305
C194
C194
0.1U_0201_10V6K
0.1U_0201_10V6K
VDD_DAL_305
C197
C197
0.1U_0201_10V6K
0.1U_0201_10V6K
VDD_P_305
C199
C199
0.1U_0201_10V6K
0.1U_0201_10V6K
0_0201_5%
0_0201_5%
X5
X5
1
OE
GND2OUTPUT
12MHZ_15PF_FK1200007
12MHZ_15PF_FK1200007
SJ000004400
07/27 Change X5 footprint
4
VDD
ES305_CLK_12M
3
CODEC_OUT
CODEC_IN
AUDIO_SCLK2_VOICE
AUDIO_FS2_VOICE
+VDD_1V8_AUDIO
R187
R187
3
+VDD_1V8_AUDIO
12
R167
@R167
@
10K_0201_5%
R169
R169
AUDIO_SEL<6>
1
C380
C380
0.01U_0201_16V7
0.01U_0201_16V7
12
2
ADC
1 2
0_0201_5%
0_0201_5%
+VDD_1V8_AUDIO
12
R180
@R180
@
10K_0201_5%
10K_0201_5%
UART_SOUT
Support for input clock frequencies of 24 MHz and 26 MHz requires a 10k pull-up resistor on the UART_SOUT pin.
ES305_INT
R205
R205 470K_0402_5%
470K_0402_5%
1 2
ES305_CLK_12M
AUDIO_UART4_TX<7>
AUDIO_UART4_RX<7>
ES305_INT_R<6>
AUDIO_RST#<6>
10K_0201_5%
AUDIO_SEL_R
R170
R170 470K_0402_5%
470K_0402_5%
1 2
CLK_12M_ES305<7>
R185 0_0201_5%@R185 0_0201_5%@
R186 0_0201_5%R186 0_0201_5%
R172 0_0201_5%R172 0_0201_5%
R175 0_0201_5%R175 0_0201_5%
R176 0_0201_5%R176 0_0201_5%
R179 0_0201_5%R179 0_0201_5%
1 2
1 2
1 2
1 2
1 2
1 2
AUDIO_DOUT2
AUDIO_DIN2
DAC
CLK
LRC
R226 0_0201_5%R226 0_0201_5%
PWR_I2C_SDA<7,10,15,26,32,34>
PWR_I2C_SCL<7,10,15,26,32,34>
1 2
R246 0_0201_5%R246 0_0201_5%
1 2
2
U23
U23
1
IN1
COM1
2
NO1
3
GND
4
NO2 IN25COM2
TS5A23157RSER_QFN10_2X1P5
TS5A23157RSER_QFN10_2X1P5
SA000039100
20110823 Modify for Acer request
AUDIO_FS2_VOICE connect to portA and CODEC,
AUDIO_FS2 connect to portB, portC and CPU.
AUDIO_SCLK2_VOICE connect to portA and CODEC
AUDIO_SCLK2 connect to portB, portC and CPU.
VDD_IO_305
VDD_DAL_305
VDD_P_305
ES305_CLK_IN AUDIO_DOUT2_R
UART_SIN
UART_SOUT
ES305_INT
ES305_I2C_SDA
ES305_I2C_SCL
AUDIO_RST#_R
NC1
V+
NC2
D6
C6
B6
A6
A4
A3
B4
B3
B5
C5
D5
F5
A5
E5
E6
F6
10 9 8 7 6
AUDIO_SCLK2_VOICE<15>
AUDIO_FS2_VOICE<15>
U24
U24
VDD_IO
VDD_DAL
VDD_DPD
VDD_P
CLK_IN
UART_SIN
UART_SOUT
GPIO_A
I2C_DATA
I2C_CLK
RESET_
TEST
GND_P
GND
GND
GND
ES305_BGA32
ES305_BGA32
CODEC_IN
CODEC_OUT
AUDIO_DOUT2_R
AUDIO_DIN2_R
Active --> 17 mA Sleep --> 35 uA
12M ~ 16M
low active
+VDD_1V8_AUDIO
1
C195
C195
0.1U_0201_10V6K
0.1U_0201_10V6K
2
R177
R177
1 2
0_0201_5%
0_0201_5%
R178
R178
1 2
0_0201_5%
0_0201_5%
R171
R171
1 2
0_0201_5%
0_0201_5%
R174
R174
1 2
0_0201_5%
0_0201_5%
20110823 Modify for Acer request
A2
PORTA_DI
B2
PORTA_DO
PORTA_CLK
PORTA_FS
PORTB_DI
PORTB_DO
PORTB_CLK
PORTB_FS
PORTC_DI
PORTC_DO
PORTC_CLK
PORTC_FS
PORTD_DI
PORTD_DO
PORTD_CLK
PORTD_FS
AUDIO_SCLK2_VOICE
A1
AUDIO_FS2_VOICE
B1
F3
R173 100K_0201_5%R173 100K_0201_5%
F4
AUDIO_SCLK2
E4
AUDIO_FS2
E3
AUDIO_DOUT2_R
F2
AUDIO_DIN2_R
E2
AUDIO_SCLK2
E1
AUDIO_FS2
F1
D1
C1
C2
D2
10/11 Change P/N from SA00004Y400 to SA00004Y410
ES305_I2C_SDA
ES305_I2C_SCL
1
AUDIO_DOUT2 <6>
AUDIO_DIN2 <6>
AUDIO_SCLK2 <6>
AUDIO_FS2 < 6>
CODEC_OUT <15>
CODEC_IN <15>
12
1 2
R181
R181 100K_0201_5%
100K_0201_5%
Security Classification
Security Classification
Audio Block Diagram
5
4
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ES305
ES305
ES305
Picasso 2 R04
Picasso 2 R04
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso 2 R04
1
1.0
1.0
14
14
14
1.0
38
38
38
Page 15
5
AUDIO_CLK_R
12
C236
C236
33P_0201_50V8J
33P_0201_50V8J
D D
08/09 Add C236 for AUDIO_CLK_R
PWR_I2C_SDA<7,10,14,26,32,34>
PWR_I2C_SCL<7,10,14,26,32,34>
EN_SPEK
12
R457
R457 300K_0201_1%
300K_0201_1%
AUDIO_SCLK2_VOICE
12
R190
@R190
@
0_0201_5%
0_0201_5%
2
C218
C218 68P_0201_25V8
68P_0201_25V8
1
@
@
R256 0_0201_5%R256 0_0201_5%
1 2
R322 0_0201_5%R322 0_0201_5%
1 2
12
R191 0_0201_5%
0_0201_5%
2
C219
C219 68P_0201_25V8
68P_0201_25V8
1
@
@
CODEC_I2C_SDA
CODEC_I2C_SCL
@R191
@
8/24 Modify Net Name for Ace r request.
10/13 Modify R392 from 0 ohm to 1K for noise issue.
R392 1K_0402_5% R392 1K_0402_5%
COM_MIC<20>
C C
CDC_HP_R
CDC_HP_L
11/17 Modify C210&C211 form 100P to 33P for Acer AUDIO request. 12/2 Modify R409 and R423 from 0ohm to 68nH for Acer AUDIO request.
+MIC_BIAS
1 2
68NH_5% LQG15HS68NJ02D
68NH_5% LQG15HS68NJ02D
68NH_5% LQG15HS68NJ02D
68NH_5% LQG15HS68NJ02D
13
D
D
Q23
Q23
2
BSS138W-7-F_SOT323-3
BSS138W-7-F_SOT323-3
G
G
S
S
100P_0201_25V8J
100P_0201_25V8J
R409
R409
1 2
R423
R423
1 2
33P_0201_50V8J
33P_0201_50V8J
NONLDO@
NONLDO@
Vth (Max) = 1.5
B B
SPKR_LEFT# SPKR_LEFT SPKR_RIGHT# SPKR_RIGHT
L20 FBMA-101_0402L20 FBMA-101_0402 L21 FBMA-101_0402L21 FBMA-101_0402 L22 FBMA-101_0402L22 FBMA-101_0402 L23 FBMA-101_0402L23 FBMA-101_0402
12 12 12 12
08/01 Change L20-L23 to SM01000DI00
SPK_R# SPK_L#
2
3
D6
TVNST52302AB0_SOT523-3
TVNST52302AB0_SOT523-3
CDC_LEFT_P CDC_LEFT_N
A A
D6
1U_0402_6.3V4Z
1U_0402_6.3V4Z C250
C250
1 2 1 2
C251
C251 1U_0402_6.3V4Z
1U_0402_6.3V4Z
TVNST52302AB0_SOT523-3
TVNST52302AB0_SOT523-3
SCA00001W00SCA00001W00
1
C261 10U_0402_6.3V6MC261 10U_0402_6.3V6M
150K_0201_5%
150K_0201_5%
1 2
R259
R259
1 2
R263
R263
150K_0201_5%
150K_0201_5%
EN_SPEK
12
resistor is for gain setting resistor is for gain setting close to 8903 for psudo differential
5
CDC_COM_MIC
2
C209
C209
1
C210
C210
1 2
NONLDO@
NONLDO@
2
D7
D7
1
+AMP_VDD
B2
B1
U2
U2
A1
IN+
VDD
C1
PVDD
IN-
VO+
VO-
C2
SHUTDOWN#
GND
GND
A2
B3
APA2010HAI-TRG WLCSP 9P CLASS D AMP
APA2010HAI-TRG WLCSP 9P CLASS D AMP
HP_R
HP_L
1 2
C237
C237
C211
C211 33P_0201_50V8J
33P_0201_50V8J
1
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
HP_R <20>
HP_L <20>
C237
C237
0_0402_5%
0_0402_5%
MIC_GND
LDO@
LDO@
SD028000080
SD028000080
Int. Speaker Conn.
C241
C241
C240
C240
C242
C242
C243
C243
2
2
2
2
1
1
1
100P_0201_25V8J
100P_0201_25V8J
100P_0201_25V8J
100P_0201_25V8J
SPKR_LEFT SPKR_LEFT#
1
100P_0201_25V8J
100P_0201_25V8J
SPK_LSPK_R
3
C3 A3
100P_0201_25V8J
100P_0201_25V8J
+VDD_1V8_AUDIO
SPK_L# SPK_L SPK_R# SPK_R
4
1
C213
C213 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
SHORT_DET<7>
+VDD_1V8_AUDIO_LDO
1 2 3 4
ACES_50281-0040N-001
ACES_50281-0040N-001
SP02000SC00
C248 1U_0402_6.3V4ZC248 1U_0402_6.3V4Z
CDC_RIGHT_P CDC_RIGHT_N
C249 1U_0402_6.3V4ZC249 1U_0402_6.3V4Z
4
1
C214
C214
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
L41
L17
L17
1 2
FBMA-10-100505-121T_0402
FBMA-10-100505-121T_0402
CDC_COM_MIC
AMIC_RIGHT+ AMIC_LEFT+
AMIC_RIGHT­AMIC_LEFT-
L41
1 2
FBMA-10-100505-121T_0402
FBMA-10-100505-121T_0402
CDC_IRQ#<6>
AUDIO_CLK_R<6> AUDIO_SCLK2_VOICE<14> AUDIO_FS2_VOICE<14>
CODEC_IN<14> CODEC_OUT<14>
R430 0_0201_5%R430 0_0201_5%
1 2
C230 1U_0402_10V6KC 230 1U_0402_10V6K C231 1U_0402_10V6KC 231 1U_0402_10V6K
C224 1U_0402_10V6KC 224 1U_0402_10V6K C225 1U_0402_10V6KC 225 1U_0402_10V6K
C269 1U_0402_10V6KC 269 1U_0402_10V6K C258 1U_0402_10V6KC 258 1U_0402_10V6K
8/25 Modify Value for Acer r equest.
+VDD_1V8_AUDIO
MIC_GND
R151 0_0402_5%
R151 0_0402_5%
R165 0_0402_5%
R165 0_0402_5%
R265
R265
620_0402_5%
620_0402_5%
620_0402_5%
620_0402_5%
9/22 Add R151&R165 for MIC noise issue
1 2
NONLDO@
NONLDO@
1 2
LDO@
LDO@
12
R260
R260
10U_0402_6.3V6M
10U_0402_6.3V6M
1 2
C270
C270
1 2
R243
R243 620_0402_5%
620_0402_5%
1 2
C399 2.2U_0402_6.3VMC399 2.2U_0402_6.3VM
R221
R221 620_0402_5%
620_0402_5%
1 2
10/04 Add R269,C206 and C207 for Main Mic issue.
JSPK1
JSPK1
1 2
5
3
G1
6
4
G2
CONN@
CONN@
B+
1 2 1 2
APA2010HAI-TRG WLCSP 9P CLASS D AMP
APA2010HAI-TRG WLCSP 9P CLASS D AMP
33P 50V J NPO 0201
33P 50V J NPO 0201
R445 0_0402_5%R445 0_0402_5%
1 2
C238 10U_0402_6.3V6MC238 10U_0402_6.3V6M
1 2
C239 1U_0402_6.3V4ZC239 1U_0402_6.3V4Z
150K_0201_5%
150K_0201_5%
1 2
R267
R267
1 2
R268
R268
150K_0201_5%
150K_0201_5%
EN_SPEK
12
AMIC_L+
AMIC_L-
C207
C207
A1
C1
C2
R269 620_0402_5%R269 620_0402_5%
2
1
U5
U5
IN+ IN-
SHUTDOWN#
3
+AVDD_CDC
1
2
Audio Codec
U25
U25
39
DCVDD
40
DBVDD
10
CPVDD
24
AVDD
37
SCLK
36
SDIN
5
INTERRUPT
2
MCLK
6
BCLK
8
LRC
7
DACDAT
9
ADCDAT
38
GPIO3/ADDR
3
DMIC_DAT/GPIO2
4
DMIC_LR/GPIO1
32
IN1R
35
IN1L
31
IN2R
34
IN2L
30
IN3R
33
IN3L
WM8903LGEFK-RV_QFN40_5X5
WM8903LGEFK-RV_QFN40_5X5
C216
C216 1U_0402_6.3V4Z
1U_0402_6.3V4Z
Close U113.24
HPOUTR
HPOUTL
HPGND
LINEOUTR LINEOUTL
LINEGND
MICBIAS
CPGND
GNDPAD
CFB1 CFB2
VMID VPOS VNEG
AGND
DGND
16 18
R443 0_0201_5% @R443 0_0201_5% @
17
19 21 20
22
LOP
23
LON
28
ROP
27
RON
11 13
29
25 14 15
12 26 41 1
1 2
R446 0_0201_5%
R446 0_0201_5%
1 2
R447 0_0201_5% @R447 0_0201_5% @
1 2
R452 0_0201_5%R452 0_0201_5%
1 2
CDC_LEFT_P CDC_LEFT_N CDC_RIGHT_P CDC_RIGHT_N
CFB1 CFB2
C223 2.2U_0402_6.3VMC223 2.2U_0402_6.3VM
+MIC_BIAS
+VMID_CDC +VPOS_CDC +VNEG_CDC
CODEC_I2C_SCL CODEC_I2C_SDA
1 2 1 2
1 2 1 2
1 2 1 2
+CPVDD+VDD_1V8_AUDIO +VDD_1V8_AUDIO
1
C212
C212 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
Close U113.10Close U113.39Close U113.40
+VDD_1V8_AUDIO
+CPVDD +AVDD_CDC
EN_SPEK SHORT_DETECT
SA00003MP00
10/2 Modify C398&C399 from 1u to 2.2u for Acer AUDIO 10/2 Modify C257&C270 from 1u to 10u for Acer AUDIO
+VDD_1V8_MIC
Main MIC Second MIC
1 2
AMIC_LEFT+ AMIC_RIGHT+
AMIC_LEFT-
12
C206
C206
12
33P 50V J NPO 0201
33P 50V J NPO 0201
TVNST52302AB0_SOT523-3
TVNST52302AB0_SOT523-3
SCA00001W00
+AMP_VDD
B2
B1
VDD
PVDD
C3
VO+
A3
VO-
GND
GND
A2
B3
3
R213
R213
MIC_GND
2
3
D8
D8
1
SPKR_RIGHT SPKR_RIGHT#
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AMIC_L+_R
620_0402_5%
620_0402_5%
620_0402_5%
620_0402_5%
12
10U_0402_6.3V6M
10U_0402_6.3V6M
R209
R209
1 2
JMIC1
JMIC1
1
1
2
2
3
GND1
4
GND2
ACES_50281-0020N-001
ACES_50281-0020N-001
CONN@
CONN@
SP02000S000
2.2K_0201_1%
2.2K_0201_1%
COM_MIC
C257
C257
1 2
0_0201_5%
0_0201_5%
R198
R198
R200 0_0201_5%R200 0_0201_5%
R197
R197
R212
R212 620_0402_5%
620_0402_5%
1 2
1 2
C398 2.2U_0402_6.3VMC398 2.2U_0402_6.3VM
R206
R206 620_0402_5%
620_0402_5%
1 2
AMIC_RIGHT-
referece to Acer
10/7 Change L51 and L50 from 60ohm to 68 ohm. 10/7 Change C2531,C2541,C2551 and C2561 from 100P to 47P
+MIC_BIAS+AMP_VDD
1
C202
C202
1 2
12
12
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
C217
C217
1 2
0.1U_0201_10V6K
0.1U_0201_10V6K
C220
C220
1 2
0.1U_0201_10V6K
0.1U_0201_10V6K
CDC_HP_R CDC_HP_L
1 2
9/19 Modify Value from 1u to 0.1u Acer Request.
HPGND <20>
LINEGND <20>
9/22 Add for MIC noise issue 01/18 Change to current symbol
+MIC_BIAS
C221 0.1U_0402_10V7KC221 0.1U_0402_10V7K
L43
L43 L42
L42
S SUPPRE_ KC FBMA-11-100505-601T 0402
S SUPPRE_ KC FBMA-11-100505-601T 0402 S SUPPRE_ KC FBMA-11-100505-601T 0402
S SUPPRE_ KC FBMA-11-100505-601T 0402
C222 0.1U_0402_10V7KC222 0.1U_0402_10V7K
AMIC_RIGHT+ AMIC_RIGHT-
AMIC_LEFT-
U8
U8
1 2 3
RP114Q182D-TR-FE_SC-88A5
RP114Q182D-TR-FE_SC-88A5
LDO@
LDO@
CE NC GND
C2531
C2531
R194
R194
20_0402_5%
20_0402_5%
R196
R196
20_0402_5%
20_0402_5%
1 2
12 12
1 2
C232
C232
C233
C233
2
2
1
1
100P_0201_25V8J
100P_0201_25V8J
S SUPPRE_ KC FBMA-11-100505-680T 0402
S SUPPRE_ KC FBMA-11-100505-680T 0402 S SUPPRE_ KC FBMA-11-100505-680T 0402
S SUPPRE_ KC FBMA-11-100505-680T 0402
2
2
C2541
C2541
1
1
47P 25V J NPO 0201
47P 25V J NPO 0201
47P 25V J NPO 0201
47P 25V J NPO 0201
+VDD_1V8_AUDIO_LDO
5
VDD
4
VOUT
LDO@
LDO@
C145
C145
1U_0402_6.3V4Z
1U_0402_6.3V4Z
SA000059P00
EAR_JACK_GND <20>
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
2
1
12
12
R199
R199
1 2
20_0402_5%
20_0402_5%
1 2
20_0402_5%
20_0402_5%
S SUPPRE_ KC FBMA-11-100505-601T 0402
S SUPPRE_ KC FBMA-11-100505-601T 0402 S SUPPRE_ KC FBMA-11-100505-601T 0402
S SUPPRE_ KC FBMA-11-100505-601T 0402
L18
L18 L19
L19
100P_0201_25V8J
100P_0201_25V8J
L50
L50 L51
L51
1
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
LINE_DOCK_R <20> LINE_DOCK_L <20>
R204
R204
+VMID_CDC+MIC_BIAS +VPOS_CDC +VNEG_CDC
C227
C227
C226
C226
12 12
2
LDO@
LDO@
C144
C144
0.1U_0201_10V6K
0.1U_0201_10V6K
1
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Wednesday, January 18, 2012
1
1
2
2
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
12 12
C234
C234
2
1
100P_0201_25V8J
100P_0201_25V8J
2
2
C2551
C2551
1
1
47P 25V J NPO 0201
47P 25V J NPO 0201
47P 25V J NPO 0201
47P 25V J NPO 0201
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Audio Codec / AMP
Audio Codec / AMP
Audio Codec / AMP
Picasso 2 R04
Picasso 2 R04
Picasso 2 R04
1
2
1
C2561
C2561
LDO@
LDO@
C143
C143
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
C235
C235
AMIC_L+AMIC_LEFT+ AMIC_L-
100P_0201_25V8J
100P_0201_25V8J
+3VS
1
C228
C228
2
2.2U_0402_6.3VM
2.2U_0402_6.3VM
from Docking/B
1
2
2
1
15
15
15
C229
C229
2.2U_0402_6.3VM
2.2U_0402_6.3VM
AMIC_R+ <20> AMIC_R- <20>
LDO@
LDO@
C116
C116
0.1U_0201_10V6K
0.1U_0201_10V6K
1
2
1.0
1.0
1.0
38
38
38
Page 16
5
4
3
2
1
@R253
@
+VDD_1V8_SENSOR
0.1U_0201_10V6K
0.1U_0201_10V6K
AD0
+VDD_1V8_SENSOR
GYRO_FSYNC
12
R255 10K_0201_5%
10K_0201_5%
C256
C256
@R255
@
GYRO
1
2
G Sensor
0.1U_0201_10V6K
0.1U_0201_10V6K
V_logic must be <= VDD at all time
+VDD_3V3_SENSOR
U29
GYRO_CLKIN
C259
C259
U29
1 6 7 8 9
2 3 4
5 14 15 16 17
1
2
CLKIN IME_DA IME_CL VLOGIC AD0
NC NC NC NC NC NC NC NC
MPU-3050_QFN24_4X4
MPU-3050_QFN24_4X4
1 2 3 4
KXTF9-4100_LGA10_3X3
KXTF9-4100_LGA10_3X3
REGOUT
FSYNC
CPOUT
CLKOUT
RESV RESV
U31
U31
IO VDD DNC DNC GND VDD5DNC
IME_DA IME_CL
AD0 GYRO_INT
13
VDD
10 11 12
INT
20 22
23
SCL
24
SDA
18
GND
19 21
10
SDA
9
SCL
8
DNC
7
INT
6
C253 0.1U_0201_10V6KC253 0.1U_0201_10V6K
1 2
C254 0.1U_0201_10V6KC254 0.1U_0201_10V6K
1 2
GYRO_FSYNC
1 2
C255 2200P_0201_50V7KC255 2200P_0201_50V7K
IME_DA IME_CL
G_INT
1 2
0_0201_5%
0_0201_5%
07/28 Change C255 to SE00000TE00
GEN1_I2C_SCL <7,20>
GEN1_I2C_SDA <7,20>
1 2
R231 0_0201_5%R231 0_0201_5%
R220
R220
GYRO_INT_R <6>
G_ACC_INT <7>
GYRO_CLKIN
12
R253
10K_0201_5%
10K_0201_5%
D D
12
R224
R224
10K_0201_5%
10K_0201_5%
C C
07/28 Change R224 to 10K
B B
P Sensor
POUT_WIFI<4>
R15 0_0402_5%
0_0402_5%
R14
4.7K_0402_5%
4.7K_0402_5%
@R15
@
12
+VDD_3V3_SENSOR
@R14
@
U6
@U6
1 2
POUTL_R CAP3
CTRL CAP_VREG
1 2
@
1
OUT
2
VSS
3
CTRL
IQS12800100TSR_TSOT23-6
IQS12800100TSR_TSOT23-6
R13
R13 10K_0402_5%
10K_0402_5%
@
@
VDDHI
VREG
6
CX
5 4
@ C114
@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
C111
1
C114
@C111
@
2P_0402_50V8C
2P_0402_50V8C
R16
470_0402_5%
470_0402_5%
1
2
@R16
@
12
2
C112
100P_0402_50V8J
100P_0402_50V8J
1
08/09 Change PAD2 to CLIP_1P8X3P2
08/12 Change PAD2 footprint to EMIST_SQ-21G_1P
+VDD_3V3_SENSOR
1
@C112
@
C113 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
@C113
@
D11
D11
TP
TP PAD2
PAD2
2
3
TVNST52302AB0_SOT523-3
TVNST52302AB0_SOT523-3
close to PAD2
1
1
SCA00001W00
CONN@
CONN@
@
@
9/15 Add D11 to Compal ESD request.
10/13 Modify R14,U6,C111,R16,D11,C113,C112 and C114 from WIFI @ to @ .
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
GYRO/P-Sen/G-Sen
GYRO/P-Sen/G-Sen
GYRO/P-Sen/G-Sen
Picasso 2 R04
Picasso 2 R04
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso 2 R04
1
1.0
1.0
16
16
16
1.0
38
38
38
Page 17
5
+3VS
C276
C276
2.2U_0402_6.3VM
2.2U_0402_6.3VM
D D
10/17 Change L24-L28,L34 to 0 ohm
08/05 Change L24-L28,L34 to mount
8/05 Change L24-L28,L34 to SM070002N00
0
R258
R258
5M_CAM_CLK#_R<6>
5M_CAM_CLK_R<6>
5M_CAM_DA1#_R<6>
C C
5M_CAM_DA1_R<6>
5M_CAM_DA2#_R<6>
5M_CAM_DA2_R<6>
2M_CAM_CLK#_R<6>
B B
2M_CAM_CLK_R<6>
2M_CAM_DA1#_R<6>
2M_CAM_DA1_R<6>
2M_CAM_DA2#_R<6>
A A
2M_CAM_DA2_R<6>
5
1 2
0_0201_5%
0_0201_5%
L24
@L24
@
4
4
1
1
OCF1210900YZF_4P
OCF1210900YZF_4P
R261
R261
1 2
0_0201_5%
0_0201_5%
R262
R262
1 2
0_0201_5%
0_0201_5%
L25
@L25
@
4
4
1
1
OCF1210900YZF_4P
OCF1210900YZF_4P
R264
R264
1 2
0_0201_5%
0_0201_5%
R266
R266
1 2
0_0201_5%
0_0201_5%
L26
@L26
@
4
4
1
1
OCF1210900YZF_4P
OCF1210900YZF_4P
R270
R270
1 2
0_0201_5%
0_0201_5%
R277
R277
1 2
0_0201_5%
0_0201_5%
L27
@L27
@
4
4
1
1
OCF1210900YZF_4P
OCF1210900YZF_4P
R280
R280
1 2
0_0201_5%
0_0201_5%
R281
R281
1 2
0_0201_5%
0_0201_5%
L28
@L28
@
4
4
1
1
OCF1210900YZF_4P
OCF1210900YZF_4P
R283
R283
1 2
0_0201_5%
0_0201_5%
R425
R425
1 2
0_0201_5%
0_0201_5%
L34
@L34
@
4
4
1
1
OCF1210900YZF_4P
OCF1210900YZF_4P
R386
R386
1 2
0_0201_5%
0_0201_5%
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
5M_CAM_CLK#
SM070002N00
5M_CAM_CLK
5M_CAM_DA1#
SM070002N00
5M_CAM_DA1
5M_CAM_DA2#
SM070002N00
5M_CAM_DA2
2M_CAM_CLK#
SM070002N00
2M_CAM_CLK
2M_CAM_DA1#
SM070002N00
2M_CAM_DA1
2M_CAM_DA2#
SM070002N00
2M_CAM_DA2
4
1
2
EN_CAM_2V8<7>
100K_0201_5%
100K_0201_5%
@ R257
@
Vth=1.6V
12
R257
08/09 Add C373,C374,R271 for CAM_MCLK
CAM_MCLK<6>
22P_0201_25V8
22P_0201_25V8
4
1 2
1
C373
C373
33P_0201_50V8J
33P_0201_50V8J
2
3
U39
U39
1
VIN
2
GND
3
EN
APL5603-28BI-TRG_SOT23-5
APL5603-28BI-TRG_SOT23-5
SA00004BW00
VOUT
5
4
NC
1
C281
C281
0.1U_0201_10V6K
0.1U_0201_10V6K
2
+VDD_CAM_2V8
0.1U_0201_10V6K
0.1U_0201_10V6K
11/3 Modify R257 to unmount for panel garbage issue.
JCAM1
JCAM1
1
1
3
3
5
5
7
7 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 GND45GND GND47GND
PANAS_AXK8L44124BG
PANAS_AXK8L44124BG
CONN@
CONN@
2
2
4
4
6
6
8
8
10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48
R271
R271
0_0201_5%
0_0201_5%
2M_CAM_DA2 2M_CAM_DA2#
2M_CAM_CLK 2M_CAM_CLK#
2M_CAM_DA1# 2M_CAM_DA1
CAM_MCLK_R
5M_CAM_DA2
12
C374
C374
5M_CAM_DA2#
5M_CAM_CLK 5M_CAM_CLK#
5M_CAM_DA1 5M_CAM_DA1#
LTCX003I300
Camera Board
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
+VDD_VCM_3V3 +VDD_CAM_2V8_R +VDD_CAM_1V8_R
1
1
C277
C277
2
C278
C278
2.2U_0402_6.3VM
2.2U_0402_6.3VM
2
2M_CAM_PWDN <6>
2M_CAM_RST# <6> CAM_I2C_SCL <6,26,35> CAM_I2C_SDA <6,26,35>
5M_CAM_RST# <6>
CAM_LED_EN <35>
5M_CAM_PWDN <6>
+VDD_VCM_3V3
0.1U_0201_10V6K
0.1U_0201_10V6K
+VDD_CAM_2V8_R
+VDD_CAM_1V8_R
1
C279
C279
2
1 2
R274 0_0402_5%R274 0_0402_5%
1 2
R275 0_0402_5%R275 0_0402_5%
12
C280
C280 47U_0805_4V6
47U_0805_4V6
+VDD_CAM_2V8
+VDD_CAM_1V8
0.1U_0201_10V6K
0.1U_0201_10V6K
1
C282
C282
2
reference Acer schematic
CAM_LED_EN 5M_CAM_RST# CAM_I2C_SCL CAM_I2C_SDA 5M_CAM_PWDN
1
C321
C321 10P_0201_50V8J
10P_0201_50V8J
2
1
C327
C327 10P_0201_50V8J
10P_0201_50V8J
2
1
C334
C334 10P_0201_50V8J
10P_0201_50V8J
2
1
C361
C361 10P_0201_50V8J
10P_0201_50V8J
2
reference Acer schematic
2M_CAM_RST# 2M_CAM_PWDN
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
1
C363
C363 10P_0201_50V8J
10P_0201_50V8J
2
1
C366
C366 10P_0201_50V8J
10P_0201_50V8J
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
1
1
C283
C283
2.2U_0402_6.3VM
2.2U_0402_6.3VM
2
1
C362
C362 10P_0201_50V8J
10P_0201_50V8J
2
5M Camera/ 2M Camera
5M Camera/ 2M Camera
5M Camera/ 2M Camera
Picasso 2 R04
Picasso 2 R04
Picasso 2 R04
1
17
17
17
1.0
1.0
1.0
38
38
38
Page 18
5
4
3
2
1
12/16 Modify R454 from 3G@ to LTE@ to meet SPEC.
8/23 Modify for Leakage issue.
+VDD_1V8_BB_TEGRA
R285
R285 100K_0201_5%
SIM_DET
100K_0201_5%
3G@
3G@
1 2
D D
T30 internal PU , reserve
1
C285
3G@ C285
3G@
10P_0201_50V8J
10P_0201_50V8J
C C
2
+UIM_PWR
R454
R454 15K_0201_5%
15K_0201_5%
LTE@
LTE@
1 2
UIM_DATA
SIM_DET<7>
1
C297
3G@ C297
3G@
10P_0201_50V8J
10P_0201_50V8J
Detect pin Normal : short GND Insert Card : Open
2
UIM_RST
SIM_DET
2
3
1
JSIM1
JSIM1
4
GND
5
VPP
6
I/O
7
DET
8
D+
9
D-
TAITW_PMPAT7-08GLBS1N14H0
TAITW_PMPAT7-08GLBS1N14H0
CONN@
CONN@
SP07000NX00
UIM_CLK
UIM_DATA
2
3
D15
@D15
D14
@D14
@
TVNST52302AB0_SOT523-3
TVNST52302AB0_SOT523-3
SCA00001W00 SCA00001W00
1
VCC
RST CLK
GND GND
UIM_RST
2
UIM_CLKUIM_DATA
3
3G@ C287
3G@
10
39P_0201_50V8J
39P_0201_50V8J
11
TVNST52302AB0_SOT523-3
TVNST52302AB0_SOT523-3
1
1
C287
2
@
3G@ C286
3G@
10P_0201_50V8J
10P_0201_50V8J
+UIM_PWR
C286
1
@ C288
@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
C288
1
1
2
2
SIM CARD
C289
3G@C289
3G@
0.1U_0201_10V6K
0.1U_0201_10V6K
SIM_DET
R76
3G@R76
3G@
1 2
10K_0201_5%
10K_0201_5%
1
C301
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
V_MINCARD_3V3
2
3G@C301
3G@
G
G
R287
R287 100K_0201_5%
100K_0201_5%
3G@
3G@
1 2
13
D
D
Q21
Q21 BSS138W-7-F_SOT323-3
BSS138W-7-F_SOT323-3
3G@
3G@
S
S
AO3413_SOT23-3
AO3413_SOT23-3
R286
3G@R286
3G@
1 2
47K_0201_1%
47K_0201_1%
Q15
Q15
D
S
D
S
3G@
3G@
G
G
13
2
1
C290
0.047U_0201_10V6K
0.047U_0201_10V6K
2
+UIM_PWR+UIM_PWR_R
3G@C290
3G@
V_MINCARD_3V3 V_M INCARD_3V3 V_MINCARD_3V3 V_MINCARD _3V3
SGA00006500
V_MINCARD_3V3
0.1U_0201_10V6K
2
C293
C293
3G@
3G@
1
10U_0402_6.3V6M
10U_0402_6.3V6M
B B
0.1U_0201_10V6K
1
C292
C292
3G@
3G@
2
1
2
0.01U_0201_16V7
0.01U_0201_16V7
V_MINCARD_3V3
R288
100K_0201_5%
100K_0201_5%
C295
C295
3G@
3G@
T30 internal PU , reserve
3G_WAKE#<4>
V_MINCARD_3V3
12
2
G
G
LTE_GPS_RESET
13
D
D
LTE@
LTE@
Q49
Q49
S TR DMN3150LW-7 1N SOT-323-3
S TR DMN3150LW-7 1N SOT-323-3
S
S
Vth=1.4V
A A
R92
LTE@R92
GPS_RESET#<7,21>
0_0201_5%
0_0201_5%
LTE@
2200P_0201_16V7K
2200P_0201_16V7K
12
C291
C291
@
@
12
@R288
@
2
C294
C294
3G@
3G@
1
22P_0201_25V8
22P_0201_25V8
JMIN1
JMIN1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND
ACES_50709-0524W-001
ACES_50709-0524W-001
CONN@
CONN@
V_MINCARD_3V3
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
GND
LTCX003HC00
WWAN Card
Add R92 and Q49 to GPS_RESET of LTE module .
5
4
1
2
C298
3G@C298
3G@
22P_0201_25V8
22P_0201_25V8
12
UIM_DATA UIM_CLK UIM_RST
+
+
C296
3G@
C296
3G@
100U_A_6.3VM_R70M
100U_A_6.3VM_R70M
3G_DISABLE# <4>
+UIM_PWR_R
1
+
+
C305
3G@
C305
3G@
100U_A_6.3VM_R70M
100U_A_6.3VM_R70M
2
change Cap value to 100U
need check module internal PU or not , All vender.
3
R291
R291 100K_0201_5%
100K_0201_5%
@
@
1 2
1
2
@
@
R292
R292
1 2
0_0402_5%
0_0402_5%
WCM-2012-900T_4P
WCM-2012-900T_4P
2
2
3
3
L29
L29
1 2
0_0402_5%
0_0402_5%
R295
R295
@
@
+
+
C306
3G@
C306
3G@
100U_A_6.3VM_R70M
100U_A_6.3VM_R70M
1
4
8/23 Add for Discharge V_MINCARD_3V3 8/25 Modify part form SB00000EO10 to SB00000IV00
EN_3V3_MODEM<7,30>
R81
R81
1M_0201_1%
1M_0201_1%
3G@
3G@
3G_USB_DN <6>
1
3G@
3G@
4
3G_USB_DP <6>
1
+
+
2
3G_DISABLE#
USB2_N2_COMM
USB2_P2_COMM
C307
3G@
C307
3G@
100U_A_6.3VM_R70M
100U_A_6.3VM_R70M
V_MINCARD_3V3
08/05 Change L29 to mount
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
10/04 Modify R55 from 2.2K to 1K.
+3VS V_MINCARD_3V3
12
R80
R80
100K_0201_5%
100K_0201_5%
3G@
Q45
3G@Q45
3G@
5
G1
2
G2
DMN2004DWK-7_SOT363-6
12
DMN2004DWK-7_SOT363-6
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Tuesday, January 17, 2012
Date: Sheet of
Tuesday, January 17, 2012
Date: Sheet of
Tuesday, January 17, 2012
3G@
4
S1
3
D1
6
D2
1
S2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
3G card
3G card
3G card
Picasso 2 R04
Picasso 2 R04
Picasso 2 R04
1
12
18
18
18
R55
R55 1K_0201_1%
1K_0201_1%
3G@
3G@
1.0
1.0
1.0
38
38
38
Page 19
5
4
3
2
1
8/25 Modify R451&R455 from 47K 1% to 4.7K 5%
D D
DDC_SCL_R<4>
DDC_SDA_R<4>
+VDD_3V3_LCD_TEGRA
R451
R451
4.7K_0402_5%
4.7K_0402_5%
+VDD_3V3_LCD_TEGRA
12
12
R455
R455
4.7K_0402_5%
4.7K_0402_5%
5
G
G
S
S
Q43B
Q43B 2N7002KDWH 2N SOT363-6
2N7002KDWH 2N SOT363-6
34
D
D
2
G
G
S
S
Q43A
Q43A 2N7002KDWH 2N SOT363-6
2N7002KDWH 2N SOT363-6
4.7K_0201_5%
4.7K_0201_5%
61
D
D
R449
R449
+VDDIO_HDMI
1 2
1 2
R450
R450
4.7K_0201_5%
4.7K_0201_5%
DDC_SCL
Reserved
R420
R420
1 2
0_0402_5%
0_0402_5%
R426
R426
1 2
0_0402_5%
0_0402_5%
C400
C400
4.7P_0402_50V8C
4.7P_0402_50V8C
1
2
HDMI_DDC_SCL
HDMI_DDC_SDADDC_SDA
1
C401
C401
4.7P_0402_50V8C
4.7P_0402_50V8C
2
C299
C299
12
0.1U_0201_10V6K
0.1U_0201_10V6K
C300
C300
U40
U40
6
5
EN_HDMI_5V0<4>
Vth=2.0 3.3V
4
1
OUT
IN
2
GND
IN
3
DIS
EN
7
TMLPAD
G5287RR1U_TDFN6_1P6X1P6
G5287RR1U_TDFN6_1P6X1P6
0.1U_0201_10V6K
0.1U_0201_10V6K
R323
R323
1 2
0_0201_5%
0_0201_5%
12
+VDDIO_HDMI+5VS
08/04 Change U40 to SA000055200 (TDFN6)
07/28 Change C400,C401 to SE07147AC80
JHDMI1
JHDMI1
1
HP_DET
2
Utility
3
D2+
4
D2_Shield
5
D2-
6
D1+
7
D1_Shield
8
D1-
9
D0+
10
D0_Shield
11
D0-
12
CK+
13
CK_Shield
14
CK-
15
CEC
16
DDC/CEC_GND
17
SCL
18
SDA
19
+5V
BELLW_80082-5021
BELLW_80082-5021
CONN@
CONN@
GND0 GND1 GND2 GND3
20 21 22 23
DC232001M10
100K_0201_5%
100K_0201_5%
+VDD_3V3_LCD_TEGRA
12
R448
R448
2
G
G
1 3
D
S
D
S
Q39
Q39
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
12
R436
R436 1M_0201_1%
1M_0201_1%
HDMI_DET_T30S < 4>
HDMI_DET
HDMI_TXD2P_R
HDMI_TXD2N_R HDMI_TXD1P_R
HDMI_TXD1N_R HDMI_TXD0P_R
HDMI_TXD0N_R HDMI_TXCP_R
HDMI_TXCN_R
+VDDIO_HDMI
HDMI_CEC_CON
HDMI_DDC_SCL HDMI_DDC_SDA
+3VS
12/2 Modify Q1 from SB503010010 to SB503010020 for HF request.
12
R24
R24
32.4K_0402_1%
32.4K_0402_1%
21
SC100000S00
D1
D1 RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
HDMI_CEC_CON
HDMI_DET
@ C67
@
1000P_0201_16V7K
1000P_0201_16V7K
12
C67
162K_0402_1%
162K_0402_1%
12
G
G
2
Q1
Q1
FDV301N_G 1N SOT23-3
R25
R25
FDV301N_G 1N SOT23-3
13
D
S
D
S
D2
D2
2 1
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
C C
HDMI_CEC<7>
SC100000S00
HDMI Type D Connector
08/05 Change L30-L33 to SM070002N00
3
2
3
2
HDMI_TXD0P_R
SM070002N00
HDMI_TXD0N_R
HDMI_TXD1P<4>
HDMI_TXD1N<4>
R310
R310
HDMI_TXD0P<4>
B B
HDMI_TXD0N<4>
1 2
0_0201_5%@
0_0201_5%@
L30
L30
4
4
1
1
OCF1210900YZF_4P
OCF1210900YZF_4P
R312
R312
1 2
0_0201_5%@
0_0201_5%@
R311
R311
1 2
0_0201_5%@
0_0201_5%@
L31
L31
4
4
1
1
OCF1210900YZF_4P
OCF1210900YZF_4P
R313
R313
1 2
0_0201_5%@
0_0201_5%@
3
2
3
2
HDMI_TXD1P_R
SM070002N00
HDMI_TXD1N_R
R314
R314
HDMI_TXCP<4>
HDMI_TXCN<4>
A A
5
1 2
@
@
0_0201_5%
0_0201_5%
L32
L32
4
4
1
1
OCF1210900YZF_4P
OCF1210900YZF_4P
R317
R317
1 2
0_0201_5%@
0_0201_5%@
HDMI_TXCP_R
3
3
SM070002N00 SM070002N00
2
2
HDMI_TXCN_R
4
HDMI_TXD2P<4>
HDMI_TXD2N<4>
R315
R315
1 2
0_0201_5%@
0_0201_5%@
L33
L33
4
4
1
1
OCF1210900YZF_4P
OCF1210900YZF_4P
R318
R318
1 2
0_0201_5%@
0_0201_5%@
3
HDMI_TXD2P_R
3
3
2
2
HDMI_TXD2N_R
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HDMI
HDMI
HDMI
Picasso 2 R04
Picasso 2 R04
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso 2 R04
1
19
38
19
38
19
38
1.0
1.0
1.0
Page 20
5
C38333P_0201_50V8J C38333P_0201_50V8J
12
C3770.1U_0201_10V6K C3770.1U_0201_10V6K
12
08/09 Add C377,C383 for +5VS
USB1_ID<6>
ENABLE_USB_HOST<6,27>
USB_HOST_DN<6>
USB_HOST_DP<6>
USB1_DN<6>
D D
+VDD_1V8_SENSOR
+VDD_3V3_SENSOR
+3VS_VB
remove POUT_WIFI net on JFUN1
+VDD_3V3_SENSOR
C C
+VDD_1V8_SENSOR
Function / Board
USB1_DP<6>
COMPASS_DRDY<6>
GEN1_I2C_SCL<7,16>
GEN1_I2C_SDA<7,16>
DOCK_DET_R#<27>
POUT_3G_1<4>
C37627P_0201_25V8 C37627P_0201_25V8
12
C3750.1U_0201_10V6K C3750.1U_0201_10V6K
12
B+
O_LED_CTL<27>
W_LED_CTL<27>
EN_P_SENSOR<4>
VOL_UP#<4,7>
VOL_DOWN#<4,7>
POUT_3G<4>
ONKEY#<7, 32>
SC_LOCK#<7>
LIGHT_INT<6>
COM_MIC<15>
EAR_JACK_GND<15>
GEN1_I2C_SCL GEN1_I2C_SDA
HOT_RST#
08/09 Add C375,C376 for B+ 08/13 Add EN_P_SENSOR for P-sensor PWR Switch
VB_N EN_P_SENSOR
T19 PAD@T19 PAD@
T20 PAD@T20 PAD@
GEN1_I2C_SDA GEN1_I2C_SCL
HP_IN
HP_LEFT
HP_RIGHT
12
R347
R347
0_0201_5%
0_0201_5%
@
@
1A (Max)
JDOCK1
JDOCK1
112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 GND45GND GND47GND
PANAS_AXK8L44124BG
PANAS_AXK8L44124BG
CONN@
CONN@
LTCX003I300
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
12
R345 0_0201_5%
0_0201_5%
JFUN1
JFUN1
1 2 3
SP01000QQ00
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 G1 G2
ACES_88196-3041
ACES_88196-3041
CONN@
CONN@
@R345
@
2 4 6 8 10 12 14 16 18 20 22
DEBUG_UART1_RX
24 26 28 30 32 34 36 38 40 42 44 46 48
4
C382 33P_0201_50V8JC 382 33P_0201_50V8J
1 2
C381 0.1U_0201_10V6KC381 0.1U_0201_10V6K
1 2
1A (Max)
VBUS_USB+5VS
1.5 A
DC_IN
C386 33P_0201_50V8JC 386 33P_0201_50V8J
1 2
for IR function
Docking / Board
HPGND <15>
08/09 Add C381,C382 for VBUS_USB
08/09 Add C385,C386 for DC_IN 08/12 Delete C385
LINE_OUT_DET# <7> DEBUG_UART1_RX <7>
LINE_DOCK_L <15> LINEGND <15>
LINE_DOCK_R <15>
AMIC_R+ <15> AMIC_R- <15>
+VDD_1V8_AUDIO
12
R9
R9 100K_0201_5%
100K_0201_5%
2
C9
C9
0.1U_0201_10V6K
0.1U_0201_10V6K
1
HP_IN
R28
R28
1 2
1K_0201_1%
1K_0201_1%
Flash LED / Board
LED+<35> LED-<35>
2
3
D16
D16
close to JLED1
1
TVNST52302AB0_SOT523-3
TVNST52302AB0_SOT523-3
SCA00001W00
9/15 Add D16 to Compal ESD request.
3
VDD_1V8_PMU_VRTCVDD_1V8_PMU_VRTC
2
G
G
R429
R429
100K_0201_5%
100K_0201_5%
D21
D21
1 2
RB751V-40_SOD323-2
RB751V-40_SOD323-2
C146
C146
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
DEBUG_UART1_RX<7>
12
R433
R433 56K_0201_1%
56K_0201_1%
13
D
D
Q4
Q4 BSS138W-7-F_SOT323-3
BSS138W-7-F_SOT323-3
S
S
+VDD_1V8_CAM_TEGRA
12
R431
R431 100K_0201_5%
100K_0201_5%
HDRST <32>
DOCK_DET# <6>
+VDD_1V8_BB_TEGRA
R234
R234
100K_0201_5%
100K_0201_5%
DEBUG_UART1_RX
12
For debug port leakage
D19
D19 RB751V-40_SOD323-2
RB751V-40_SOD323-2
UART_SW<7>
12
R432
R432 100K_0201_5%
100K_0201_5%
HOT_RST#<7>
VDD_1V8_PMU_VRTC
12
R324
1 2
0_0201_5%
0_0201_5%
HP_DET# <6>
JLED1
JLED1
1
1
2
2
3
GND1
4
GND2
ACES_50281-0020N-001
ACES_50281-0020N-001
CONN@
CONN@
R324
2
1
DOCK_DET_R#
10/19 Add R324 and C146 to Dock_DET# for debouncing. 10/19 Change power domain from +VDD_1V8_CAM_TEGRA to VDD_1V8_PMU_VRTC 10/31 Modify C146 from 0.1U to 4.7U for Acer HW request.
11/7 Add D21 R431 to DOCK_DET_R# leakage issue.
SP02000S000
2
12
HP_L<15>
BSS138W-7-F_SOT323-3
BSS138W-7-F_SOT323-3
+VDD_3V3_GMI_TEGRA
HP_LEFT
100K_0201_5%
100K_0201_5%
R210
R210
+3VS
12
R316
R316 0_0201_5%
0_0201_5%
+3VS_VB
2
C303
C303
0.1U_0201_10V6K
0.1U_0201_10V6K
1
VB_N
13
D
D
Q20
Q20
S
S
2
G
G
R321
R321
100K_0201_5%
100K_0201_5%
R320 0_0201_5%R320 0_0201_5%
12
12
VIBRATOR
1
C397
C397
0.1U_0201_10V6K
0.1U_0201_10V6K
2
U3
U3
A2
B3
D3
12
A1
V+
NO2 NO1A3COM2 COM1
NC2 NC1C3IN2 IN1
GND
TS5A22362YZPR_DSBGA10
TS5A22362YZPR_DSBGA10
SA00005AE00 9/29 Modify U3 from TS5A22364 to TS5A22362. SA00004ON00------>SA00005AE00
HP_RIGHT
B1 C1 D1 D2
HP_R <15>
1
VIB_EN_T30S <4>
DEBUG_UART1_TX <7>
HP Switch
10/13 Modify R345 from mount to @ for Acer AUDIO request.
Micro SD
B B
Remove R332
reference PBJ20 reserve for 33 0hm
R343 0_0201_5%R343 0_0201_5%
SDMMC_DAT2<5> SDMMC_DAT3<5>
Detect pin Normal : Open Insert Card : Short GND
SDMMC_CMD<5>
SDMMC_CLK<5>
SDMMC_DAT0<5> SDMMC_DAT1<5> SD_DET#<7>
reference Acer schematic
SDMMC_CLK_R SDMMC_DAT0_R SDMMC_DAT1_R SDMMC_DAT2_R
A A
SDMMC_DAT3_R SDMMC_CMD_R
1
C367
C367 10P_0201_50V8J
10P_0201_50V8J
2
5
1
C368
C368 10P_0201_50V8J
10P_0201_50V8J
2
1
C369
C369 10P_0201_50V8J
10P_0201_50V8J
2
1
C370
C370 10P_0201_50V8J
10P_0201_50V8J
2
1
C371
C371 10P_0201_50V8J
10P_0201_50V8J
2
4
12
R342 0_0201_5%R342 0_0201_5%
12
R341 0_0201_5%R341 0_0201_5%
12
R368 0_0201_5%R368 0_0201_5%
12
R340 0_0201_5%R340 0_0201_5%
12
R339 0_0201_5%R339 0_0201_5%
12
1
C310
C310 10P_0201_50V8J
10P_0201_50V8J
2
+VDD_3V_SD
reference NV schematic
@
@
12
R337
R337
47K_0402_1%
47K_0402_1%
SDMMC_DAT2_R SDMMC_DAT3_R SDMMC_CMD_R
SDMMC_CLK_R
SDMMC_DAT0_R SDMMC_DAT1_R
R344
1
C325
C325 10P_0201_50V8J
10P_0201_50V8J
2
R344
+VDD_3V_SD
1
C311
C311
0.01U_0201_16V7
0_0201_5%
0_0201_5%
0.01U_0201_16V7
12
1 2
2
JMSD1
JMSD1
1
DAT2
2
DAT3
3
CMD
4
VDD
5
CLK
6
Vss
7
DAT0
8
DAT1
9
DETECT1
10
DETECT2
PROCO_879S-R010-00A0
PROCO_879S-R010-00A0
CONN@
CONN@
C312
C312 1U_0402_6.3V4Z
1U_0402_6.3V4Z
11
G1
12
G2
13
G3
14
G4
15
G5
11/28 Change JMSD1 form SP07000GQ00 to SP07000TV00
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
S/B conn / Vibrator / Micro SD
S/B conn / Vibrator / Micro SD
S/B conn / Vibrator / Micro SD
Picasso 2 R04
Picasso 2 R04
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso 2 R04
1
1.0
1.0
20
20
20
1.0
38
38
38
Page 21
5
+2V8_GPS
1
12
L39
C322
C322
GPS@
GPS@
0.1U_0201_10V6K
Antenna
D D
07/27 Change GPSANT from LTCX003HH00 to SP060004L00
0.1U_0201_10V6K
GPSANT
GPSANT
Ground
Ground
2 3 4
I-PEX_20429-001E
I-PEX_20429-001E
CONN@
CONN@
SP060004L00
2
1
L39
GPS@
GPS@
47NH_LQG15HN47NJ02D_5%
47NH_LQG15HN47NJ02D_5%
2
D9
@D9
@
1P_0402_50V NPO
1P_0402_50V NPO
1
close to GPSANT
GPS_ANT1 GPS_ANT2
C314
1 2
22P_0402_50V8J
22P_0402_50V8J
9/15 Add D9 to Compal ESD request.
+GPS_AUX_OUT
C316
1
C379
C379
0.1U_0201_10V6K
0.1U_0201_10V6K
C C
B B
A A
GPS@
GPS@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C323
C323
C330
C330
GPS@
GPS@
GPS@
GPS@
EN_VDD_GPS<7>
1.8V
GPS@
GPS@
X2
X2
2
ENABLE/DISABLE
5
NC
1
NC
VDD_1V8_GEN
12
+3VS
12
6
VCC
GND
3
OUTPUT
GPS_CLK_26M
4
26MHZ_10PF_TX5651
26MHZ_10PF_TX5651
R303
R303
1M_0402_1%
1M_0402_1%
GPS@
GPS@
R305
R305
1M_0402_1%
1M_0402_1%
GPS@
GPS@
EN_VDD_GPS
1.8V
1 2
R352 0_0402_5%GPS@R352 0_0402_5%GPS@
4
5
12
6
Vth = 1.5
12
R304
R304 1M_0402_5%
1M_0402_5%
10/06 Modify R304 from @ to mount.
4
5
12
6
Vth = 1.5
0.01U_0201_16V7
0.01U_0201_16V7
GPS@
GPS@
GPS_CLK_26M_R
SB00000SM00
Q28
Q28
FDG6331L_SC70-6
FDG6331L_SC70-6
GPS@
GPS@
SB00000SM00
Q29
Q29
FDG6331L_SC70-6
FDG6331L_SC70-6
GPS@
GPS@
C316
3
2
1
3
2
1
GPS@C314
GPS@
4
9/02 Modify C315 from GPS@ to @ for RF team request. 9/10 Modify C315 from 1.8P to 2.2P for RF team request.
9/14 Modify L38 from 6.2NH to 7.5P for RF team request.
12/7 Modify L38 from 7.5P to 0 ohm for RF team request.
L37
GPS@L37
GPS@
SAFFB1G58KA0F0AR14_5P
SAFFB1G58KA0F0AR14_5P
Input1Output
GND2GND3GND
5
12/7 Modify C315 from 2.2P to 5.1nH for RF team request.
GPS_ANT3
4
L38
1 2
0_0201_5%
0_0201_5%
1
C315
C315
5.1NH_0.3NH_LQG15HN5N1S02D
5.1NH_0.3NH_LQG15HN5N1S02D
2
GPS@
GPS@
9/15 Add D17 to Compal ESD request.
+1V8_GPS
1
2
4
X3
X3
GPS@
GPS@
VDD
1
OE
Clock Output
GND
2
32.768KHZ_15PF_KK3270032
32.768KHZ_15PF_KK3270032
12
C332
C332 1U_0402_6.3V4Z
1U_0402_6.3V4Z
GPS@
GPS@
12
C331
C331 1U_0402_6.3V4Z
1U_0402_6.3V4Z
GPS@
GPS@
remove reserve 32K from T30S
3
+1V8_GPS
+3V3_GPS
GPS_CLK_32K
1
C326
C326
0.1U_0201_10V6K
0.1U_0201_10V6K
2
GPS@
GPS@
1
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2
GPS@
GPS@
R351 0_0402_5%GPS@R351 0_0402_5%GPS@
GPS_RESET#<7,18>
GPS_PWRON<7>
Acer request
2
1
C333
C333
1 2
C353
C353 68P_0201_25V8
68P_0201_25V8
GPS@
GPS@
+3V3_GPS
2
C347
C347 68P_0201_25V8
68P_0201_25V8
1
GPS@
GPS@
GPS_PWRON_R
3
GPS@L38
GPS@
GPS_CLK_32K_R
R383 0_0201_5%R383 0_0201_5%
1 2
R416 0_0201_5%R416 0_0201_5%
1 2
12
R348
GPS@R348
GPS@
100K_0201_5%
100K_0201_5%
1
C324
C324
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
2
GPS@
GPS@
R428
GPS@R428
GPS@
1 2
0_0402_5%
0_0402_5%
2
D17
1P_0402_50V NPO
1P_0402_50V NPO
1
GPS_CLK_26M_R
GPS_CLK_32K_R
GPS_RESET#_R
GPS_PWRON_R
VDD_PRE
GPS_VDDC
+1V8_GPS
2
C313
GPS@
GPS@
L35 BLM15AG601SN1D_2P
L35 BLM15AG601SN1D_2P
1 2
U47
U47
GPS_ANT4
K9
GPS_RFIP
@D17
@
K10 E10
G10
F10
C10
1
C319
C319
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2
@
@
J8
GPS_VSSIF
J9
GPS_VSSPLL
K8
GPS_VSSLNA GPS_VSSLNA GND_IFP
A4
GPS_CAL
TCXO
K2
LPO_IN
NC
F8
NC
G9
NC
A8
GPS_SYNC/PPS_OUT
A7
IFVALID
A5
RST_N
J4
REGPU
H2
TM1
K1
TM2
B3
TM3
D2
C_GPIO_2
C1
C_GPIO_3
F2
NC
F7
NC
H3
NC
H4
NC
J2
NC
G8
NC
G7
NC
J1
NC
G6
NC
G4
NC
G1
NC
F1
NC
G5
NC NC
C8
NC
D5
NC
D8
NC
D6
NC
D9
NC
J5
VDD_BAT
H5
VDD_PRE
E9
VDDIFP
G2
VDDC
C7
VDDC
C3
VDDC
K5
VDD1P2_CORE
C6
VDDIO
D7
VDDIO
F3
VDDIO
BCM47511IFBG_FBGA100
BCM47511IFBG_FBGA100
GPS@
GPS@
SA00004YJ00
1
2
H10
K7
J10
GPS_VDDIF
GPS_VDDPL
GPS_VDDLNA
RF
RF
GPS_AUXOP
GPS_AUXON
CLK IF
CLK IF
CAL_REQ
SYS IF
SYS IF
UART/I2C IF
UART/I2C IF
GPS_VDDCVDD_PRE
C320
C320
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
GPS@
GPS@
MEMORY
MEMORY
PWR
PWR
VDD_AUX_O
VDD_AUX_IN
HOST_REQ
C_GPIO_6 C_GPIO_7
D_GPIO_5 D_GPIO_6
SCL2/UART_TX
SDA2/UART_RX
UART_nRTS UART_nCTS
K6
VDD1P2_GRF
AUX_HI
LNA_EN
REF_CAP
AVSS AVSS
VSSC VSSC VSSC VSSC VSSC
NC NC
NC NC NC NC NC NC NC NC
NC NC NC NC NC NC NC NC
NC NC NC
NC
J7
H8
B7
H9 F9
K4
H6
H7
A6
B6
A3 B5
A2 H1
J6
E1 D1 B2 A1
E5 B1 E6 D4 C4 E3 F6 E7
C2 D10 B4 A9 A10 B9 C9 B10
F5 E4 E2
E8
J3 K3
G3 F4 B8 C5 D3
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+GPS_AUX_OUT
GPS_REF_CAP
R417 0_0201_5%R417 0_0201_5%
1 2
R421 0_0201_5%R421 0_0201_5%
1 2
R434 0_0201_5%R434 0_0201_5%
1 2
R435 0_0201_5%R435 0_0201_5%
1 2
+3V3_GPS
C329
C329
GPS@
GPS@
C313
1 2
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
GPS@
GPS@
GPS@
GPS@
C318 0.22U_0201_6.3V6M
C318 0.22U_0201_6.3V6M
C317
C317
1 2
0.01U_0201_16V7
0.01U_0201_16V7
GPS@
GPS@
12
GPS_UART_RXD < 7> GPS_UART_TXD <7> GPS_UART_CTS# <7> GPS_UART_RTS# <7>
+3V3_GPS
9/25 Modify R346 from @ to mount for leakage issue.
+1V8_GPS
12
100K_0201_5%
100K_0201_5%
GPS_UART_RXD
U50
U50
Vth=1.6V
1
2
3
APL5603-28BI-TRG_SOT23-5
APL5603-28BI-TRG_SOT23-5
1
2
GPS_PWRON_R
SA00004BW00
1
R346
R346
VIN
GND
EN
GPS@
GPS@
VOUT
5
4
NC
C335
C335
1
GPS@
GPS@
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
2
+2V8_GPS
For Antenna circuit
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
GPS POWER SOURCE
5
4
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
GPS BCM47511
GPS BCM47511
GPS BCM47511
Picasso 2 R04
Picasso 2 R04
Picasso 2 R04
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
1
1.0
1.0
21
21
21
1.0
38
38
38
Page 22
5
SB00000SM00
Q31
Q31
FDG6331L_SC70-6
FDG6331L_SC70-6
WIFI@
WIFI@
3
2
1
3
2
12
1
WIFI@
WIFI@
12
R307
R307 1M_0402_5%
1M_0402_5%
@
@
4
5
6
Vth = 1.5
4
5
6
SB00000SM00
Q32
Q32
FDG6331L_SC70-6
FDG6331L_SC70-6
WIFI@
WIFI@
12
C337
C337
1U_0402_6.3V4Z
1U_0402_6.3V4Z
WIFI@
WIFI@
D D
EN_WIFI_VDD<4>
VDD_1V8_GEN +1.8VS_WIFI
12
C348
C348
1U_0402_6.3V4Z
1U_0402_6.3V4Z
WIFI@
WIFI@
EN_WIFI_VDD
R308
R308
1M_0402_1%
1M_0402_1%
WIFI@
WIFI@
R319
R319
1M_0402_1%
1M_0402_1%
WIFI@
WIFI@
12
12
Vth = 1.5
12
C339
C339
1U_0402_6.3V4Z
1U_0402_6.3V4Z
WIFI@
WIFI@
C349
C349 1U_0402_6.3V4Z
1U_0402_6.3V4Z
4
+3VS_WIFI+3VS
1
C342
C342
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
2
WIFI@
WIFI@
1
C354
C354
0.1U_0201_10V6K
0.1U_0201_10V6K
2
WIFI@
WIFI@
1
C341
C341
0.1U_0201_10V6K
0.1U_0201_10V6K
2
WIFI@
WIFI@
1
C352
C352
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
2
WIFI@
WIFI@
2
C340
C340 68P_0201_25V8
68P_0201_25V8
1
WIFI@
WIFI@
2
C351
C351 68P_0201_25V8
68P_0201_25V8
1
WIFI@
WIFI@
3
9/10 Modify C136 from 100P to 1P for RF request.
AH662 use 1U, AH663 use 0.1U
+VDD_WL_PA+SR_PA_OUT
C356
C356 1U_0402_6.3V4Z
1U_0402_6.3V4Z
1 2
NH660@
NH660@
close to H2 close to G9
+SR_PA_OUT
2
dual-Band wifi RF matching , Reserve " 2 Pi " filter
2.4RF_IN_L 2.4RF_IN
R375 0_0402_5%WIFI@R375 0_0402_5%WIFI@
2
C136
1P_0402_50V NPO
1P_0402_50V NPO
1
@C136
@
1 2
2.4RF_IN_R
2
C137
100P_0402_50V8J
100P_0402_50V8J
1
R387 0_0402_5%WIFI@R387 0_0402_5%WIFI@
@C137
@
1 2
8/23 Add for AH663.
C356
C356
AH663@
0.1U 16V V4Z
0.1U 16V V4Z
AH663@
SE070104Z80
SE070104Z80
C359
C359 1U_0402_6.3V4Z
1U_0402_6.3V4Z
1 2
WIFI@
WIFI@
+VDD_LN
1
WIFANT
WIFANT
Ground
Ground
2
1
3
2
C138
100P_0402_50V8J
100P_0402_50V8J
1
@C138
@
07/27 Change WIFANT from LTCX003HH00 to SP060004L00
4
I-PEX_20429-001E
I-PEX_20429-001E
CONN@
CONN@
SP060004L00
9/21 Add D10 to Compal ESD request.
2.4RF_IN
2
D10
@D10
@
1P_0402_50V NPO
1P_0402_50V NPO
1
close to WIFANT
100K_0201_5%
100K_0201_5%
4 3 6 1
1 2
R373 0_0201_5%WIFI@R373 0_0201_5%WIFI@ R374 0_0201_5%WIFI@R374 0_0201_5%WIFI@ R376 0_0201_5%WIFI@R376 0_0201_5%WIFI@ R377 0_0201_5%WIFI@R377 0_0201_5%WIFI@ R378 0_0201_5%WIFI@R378 0_0201_5%WIFI@
10U_0402_6.3V6M
10U_0402_6.3V6M
+3VS +3VS_WIFI
12
R93
R93
1 2 1 2 1 2 1 2 1 2
R382 0_0201_5%WIFI@R382 0_0201_5%WIFI@
1 2
R384 0_0402_5%WIFI@R384 0_0402_5%WIFI@
1 2
C336
12
12
R94
R94 1K_0201_1%
1K_0201_1%
+1.8VS_WIFI
WFMMC_CLK_R WFMMC_CMD_R WFMMC_DAT0_R WFMMC_DAT1_R WFMMC_DAT2_R WFMMC_DAT3_R
TP36TP36
TP34TP34 TP35TP35
L40
WIFI@L40
WIFI@
1 2
2.2UH_VLS252012T-2R2M1R3_1.8A_20%
2.2UH_VLS252012T-2R2M1R3_1.8A_20%
WIFI@C336
WIFI@
4
WF_RST#_R
RTC_32K_WIFI
U53
U53
G1
SDIO_CLK_SPI_CLK
G3
SDIO_CMD_SPI_DI
F2
SDIO_DATA0_SPI_DO
F1
SDIO_DATA1_SPI_IRQ
G2
SDIO_DATA2_SPI_NC
F3
SDIO_DATA3_SPI_CS
E6
WL_GPIO_1
E4
WL_GPIO_2
D6
WL_GPIO_5
C6
WL_GPIO_6
D2
WL_SHUTDOWN#_RST#
F6
WL_HOST_WAKE
E3
WL_UART_TX
G7
WL_UART_RX
H3
HSIC_DATA
J2
HSIC_STROBE
D3
RTC_CLK
H8
NC
D9
NC
+3VS_WIFI
+VDD_WL_PA
+VDD_WL_PA
+CBUCK_OUT
FM power
A3
A2
VBAT_IN
GNDA1GNDA4GNDA9GNDB2GNDB5GNDB8GNDC5GNDC9GNDD4GNDD8GNDE1GNDE5GNDE9GNDF9GNDG6GNDG8GNDH5GNDH7GNDJ1GNDJ4GNDJ5GNDJ6GNDJ8GNDJ9GND
B1
H9
H2
B9
G9
VDDIO_RF
VDD_BT_PA
SR_PA_OUT
VDD_WL_PA_A_MODE
B4
VDD_WL_PA
CBUCK_OUT
VOUT_2P5_IN
Security Classification
Security Classification
Security Classification
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+VDD1P4_WIFI
B3
VOUT_2P5_OUT
Issued Date
Issued Date
Issued Date
+VDD_CORE
+1.8VS_WIFI
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
+VDD_LN
C2
H1
D1
J3
C1
E2
VIN_LDO
GND
GND
A10
E10
C10
VDDIO
VDD_LN_IN
VDD_CORE
VDD_LN_OUT
VDD1P2_CLDO_OUT
GND
GND
J10
G10
PK29S003200
PK29S003200
Footprint use AH662 co-lay
BT_DEVICE_WAKE
BT_SHUTDOWN#
C343
C343
WIFI@
WIFI@
EN_WIFI_VDD<4>
FM_AUDIO_L
FM_AUDIO_R
ANT_FM_TX ANT_FM_RX
ANT_2G4_5G
ANT_MAIN_EN
ANT_AUX_EN
BT_I2S_DI
BT_I2S_DO BT_I2S_WS BT_I2S_CLK
BT_PCM_SYNC
BT_PCM_CLK
BT_PCM_IN
BT_PCM_OUT
BT_HOST_WAKE
BT_RST#
BT_UART_RTS# BT_UART_CTS#
BT_UART_TXD BT_UART_RXD
AW-NH660NH660@
AW-NH660NH660@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
B+
1
0.1U_0201_10V6K
0.1U_0201_10V6K
2
A8 A7
A6 A5
J7
H4 H6
D7 D5 C7 B6
G4 F5 F4 G5
C8 B7 C3 C4
E7 F7
F8 E8
1
C350
C350
2
WIFI@
WIFI@
12
2.4RF_IN_L
T11PAD@ T11PAD@ T12PAD@ T12PAD@ T13PAD@ T13PAD@
R365 0_0201_5%WIFI@R365 0_0201_5%WIFI@
1 2
R370 0_0201_5%WIFI@R370 0_0201_5%WIFI@
1 2
R371 0_0201_5%WIFI@R371 0_0201_5%WIFI@
1 2
R369 0_0201_5%WIFI@R369 0_0201_5%WIFI@
1 2
8/22 Change BOM structure
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
2
R389
R389
1M_0201_1%
1M_0201_1%
WIFI@
WIFI@
BT_PCM_SYNC <7> BT_PCM_CLK <7> BT_PCM_OUT <7>
BT_PCM_IN <7>
BT_WAKEUP <7> BT_IRQ# <7> BT_PD# <7>
Q37
Q37
1
VDD
5
VOUT
2
GND
4
VFB
3
CE
RP111N331D-TR-FE_SOT23-5
RP111N331D-TR-FE_SOT23-5
WIFI@
WIFI@
R381 0_0201_5%WIFI@R381 0_0201_5%WIFI@
1 2
BT_UART_CTS# <7>
BT_UART_RTS# <7>
BT_UART_RXD <7>
BT_UART_TXD <7>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
R356
R356 0_0201_5%
0_0201_5%
WIFI@
WIFI@
1 2
12
R456 15K_0402_5%
15K_0402_5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Wednesday, January 18, 2012
C C
10/19 Add for Discharge +3VS_WIFI
Q47
Q47
5
S1
G1
D1
EN_WIFI_VDD
WFMMC_CMD_R
F1,F2,F3,G2,G3 internal weak pull up resister to VDDIO
R272
R272
C387
C387
1
2
C345 0.01U_0201_16V7WIF I@C345 0.01U_0201_16V7WIFI@
1 2
C344 4.7U_0402_6.3V6MWIFI@C344 4.7U_0402_6.3V6MWIFI@
1 2
C355
WIFI@C355
WIFI@
1 2
C358 0.01U_0201_16V7WIFI@C358 0.01U_0201_16V7WIFI@
1 2
C357 4.7U_0402_6.3V6MWIFI@C357 4.7U_0402_6.3V6MWIFI@
1 2
5
1 2
0_0201_5%
0_0201_5%
@ C388
@
33P_0201_50V8J
33P_0201_50V8J
12
C388
WFMMC_CLK<5>
B B
08/09 Add C387,C388,R272 for WFMMC_CLK
08/25 Modify C387&C388 from mount to unmount
+SR_PA_OUT
A A
+VDD_CORE
+VDD_LN
@
@
22P_0201_25V8
22P_0201_25V8
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
D2
2
S2
G2
DMN2004DWK-7_SOT363-6
DMN2004DWK-7_SOT363-6
R367 100K_0201_5%@R367 100K_0201_5%@
WFMMC_CMD<5> WFMMC_DAT0<5> WFMMC_DAT1<5> WFMMC_DAT2<5> WFMMC_DAT3<5>
WF_RST#<7>
WF_WAKE#<7>
CLK_32K_OUT<7>
+VDD1P4_WIFI +CBUCK_OUT
reserve
R361 0_0402_5%@R361 0_0402_5%@
1 2
1
C378
C378
2
WIFI@
WIFI@
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
@R456
@
@ R366
@
100K_0201_5%
100K_0201_5%
BT_UART_RXD
BT_RST# <7>
8/22 Change BOM structure
U53
U53
AH663@
AH663@
PK29S003200
WIFI/BT AH662
WIFI/BT AH662
WIFI/BT AH662
Picasso 2 R04
Picasso 2 R04
Picasso 2 R04
1
1
2
+1.8VS_WIFI
R366
+VDD_WL_PA+3VS_WIFI
C346
C346
WIFI@
WIFI@
0.1U_0201_10V6K
0.1U_0201_10V6K
12
22
22
22
1.0
1.0
1.0
38
38
38
Page 23
5
R395 0_0201_5%R395 0_0201_5%
From PMU From PMU
D D
VDD_1V8_GEN
1 2
R397 0_0201_5%R397 0_0201_5%
1 2
R399 0_0201_5%R399 0_0201_5%
1 2
R401 0_0201_5%R401 0_0201_5%
1 2
R404 0_0201_5%R404 0_0201_5%
1 2
R406 0_0201_5%R406 0_0201_5%
1 2
R398 0_0402_5%R398 0_0402_5%
1 2
R101 0_0402_5%R101 0_0402_5%
1 2
R157 0_0402_5%R157 0_0402_5%
1 2
R390 0_0201_5%R390 0_0201_5%
1 2
R402 0_0201_5%R402 0_0201_5%
1 2
+VDD_1V8_SDMMC3_TEGRA
+VDD_1V8_AUDIO_TEGRA
+AVDD_1V8_USB_PLL_TEGRA
+VDD_1V8_CAM_TEGRA
+VDD_1V8_BB_TEGRA
+VDD_1V8_SYS_TEGRA
+VDD_1V8_DDR_MEM
+VDDIO_1V8_EMMC
+VDD_1V8_AUDIO
+VDD_1V8_SDMMC4_TEGRA
+VDD_1V8_UART_TEGRA
Q26 close to Camera Conn.
C C
EN_CAM_1V8#<7>
B B
VDD_1V8_GEN +VD D_CAM_1V8
R300
R300
100K_0201_5%
100K_0201_5%
VDD_1V8_GEN
9/2 Modify R330 to meet SPEC sequence
EN_SENSOR_1V8#<7>
12
47K_0201_1%
47K_0201_1%
Q26
Q26 ME2301A-G_SOT23-3
ME2301A-G_SOT23-3
S
S
G
G
2
1
2
R330
R330
12
D
D
13
SB00000JL00
C384
C384
0.1U_0201_10V6K
0.1U_0201_10V6K
Q35
Q35 ME2301A-G_SOT23-3
ME2301A-G_SOT23-3
S
S
G
G
2
SB00000JL00
1
2
10/04 Add R19 and Q46 to Discharge +VDD_CAM_1V8.
1
C33
C33 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
+VDD_1V8_SENSOR
D
D
13
1
2
C390
@C390
@
0.1U_0201_10V6K
0.1U_0201_10V6K
10/07 Modify C390 from mount to @.
A A
5
EN_SENSOR_3V3<4>
EN_SENSOR_3V3_2<7>
9/27 Add EN_SENSOR_3V3_2 from U1.AA3 9/29 Modify R424 from unmout to mount 9/29 Modify R427 from mout to unmount
12
13
D
D
2
G
G
S
S
EN_T30S_FUSE_3V3<4>
C160
C160 1U_0402_6.3V4Z
1U_0402_6.3V4Z
3.3V
1.8V
4
10mA
+3VS
10mA
10mA
10mA
10mA
10mA
20mA
200mA
33mA
10mA
10mA
12/08 Add U51, C365 , C385 a nd R437 for EMMC drop issue. 12/16 Modify U51, C365 , C38 5 and R437 from @ to mount.
C385
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
+3VS
1
C385
2
R391 0_0201_5%R391 0_0201_5%
1 2
R396 0_0201_5%R396 0_0201_5%
1 2
R419 0_0201_5%R419 0_0201_5%
1 2
R418 0_0201_5%R418 0_0201_5%
1 2
VDD_PMU_LDO1
G9001-300TO1U TSOT-23 5P LDO
G9001-300TO1U TSOT-23 5P LDO
U51
U51
1
2
3
SA00005II00
+VDD_3V3_GMI_TEGRA
+AVDD_3V3_USB_TEGRA
+VDD_3V3_DDR_RX_TEGRA
+VDD_3V3_LCD_TEGRA
VIN
VOUT
GND
EN
3
5
4
NC
Q33 close to T30S
R19
R19
2.2K_0201_1%
2.2K_0201_1%
Q46
Q46
S TR DMN3150LW-7 1N SOT-323-3
S TR DMN3150LW-7 1N SOT-323-3
3.3V
200K _0201_1%
200K _0201_1%
B+
12
R326
R326
34
5
R325
R325
100K_0201_5%
100K_0201_5%
Q25B
Q25B DMN2004DWK-7_SOT363-6
DMN2004DWK-7_SOT363-6
SB00000IV00
S
S
12
Q33
Q33 ME2301A-G_SOT23-3
ME2301A-G_SOT23-3
D
D
13
G
G
2
SB00000JL00
1
C389
C389
0.1U_0201_10V6K
0.1U_0201_10V6K
2
+VDD_3V3_FUSE_TEGRA+3VS
9/29 Modify Q25 from 2N7002KDWH to DMN2004DWK-7
R427 0_0201_5%@R427 0_0201_5%@
R424 0_0201_5% R424 0_0201_5%
4
1 2
1 2
B+
12
R414
R414 200K _0201_1%
200K _0201_1%
61
Q25A
Q25A DMN2004DWK-7_SOT363-6
DMN2004DWK-7_SOT363-6
2
+3VS
R415
R415
100K_0201_5%
100K_0201_5%
12
Q38
Q38 ME2301A-G_SOT23-3
ME2301A-G_SOT23-3
S
S
D
D
13
G
G
2
SB00000JL00
1
C391
C391
0.1U_0201_10V6K
0.1U_0201_10V6K
2
Security Classification
Security Classification
Security Classification
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
C365 1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1
2
+VDD_3V3_SENSOR
Issued Date
Issued Date
Issued Date
110mA
130mA
50mA
10mA
R437
1 2
0_0402_5%
0_0402_5%
C365
C159
C159 1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C163
C163 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
R437
+VDD_2V85_EMMC
2
R442 0_0402_5%R442 0_0402_5%
VDD_PMU_LDO3
VDD_PMU_LDO6
VDD_PMU_LDO7
VDD_PMU_LDO4 +VDD_1V2_RTC_TEGRA
VDD_PMU_LDO1
VDD_PMU_LDO5
VDD_PMU_LDO2 +VDD_3V_SD
VDD_1V2_MEM
TOP
CLP1
CLP1
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP2
CLP2
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP3
CLP3
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP4
CLP4
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP5
CLP5
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP6
CLP6
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
Compal Secret Data
Compal Secret Data
Compal Secret Data
CLP7
CLP7
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP8
CLP8
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP9
CLP9
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP10
CLP10
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
Deciphered Date
Deciphered Date
Deciphered Date
2
1 2
R412 0_0402_5%R412 0_0402_5%
1 2
R410 0_0402_5%R410 0_0402_5%
1 2
R411 0_0402_5%R411 0_0402_5%
1 2
R407 0_0402_5%R407 0_0402_5%
1 2
R422 0_0402_5%@R422 0_0402_5%@
1 2
R408 0_0402_5%R408 0_0402_5%
1 2
R441 0_0402_5%R441 0_0402_5%
1 2
R444 0_0402_5%R444 0_0402_5%
1 2
H1
H1
H_2P3
H_2P3
H_2P3 *6
H_2P0N *1
9/2 Add CLP22~CLP27
9/2 Add CLP28,CLP29
11/8 Del CLP22~CLP27 for ME request
1
@
@
H8
H8
H_2P0N
H_2P0N
@
@
1
FD1
FD1 FIDUCIAL_C40M80
FIDUCIAL_C40M80
@
@
1
Clip type conn
CLP28
CLP28
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP29
CLP29
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
1
H5
H5
1
@
@
FD3
FD3 FIDUCIAL_C40M80
FIDUCIAL_C40M80
10mA
30mA
56mA
54mA
20mA
200mA
135mA
45mA
475mA
H6
H6
H_2P3
H_2P3
1
@
@
FD4
FD4 FIDUCIAL_C40M80
FIDUCIAL_C40M80
@
@
@
1
@
1
+VDD_3V3_SDMMC1_TEGRA
+VDD_1V0_DDR_HS_TEGRAVDD_PMU_LDO8
+AVDD_1V2_DSI_CSI_TEGRA
+AVDD_1V1_PLL_TEGRA
+VDD_2V85_EMMC
+VDD_VCM_3V3
+VDD_1V2_DDR_MEM
H2
H2
H_2P3
H_2P3
1
@
@
FD2
FD2 FIDUCIAL_C40M80
FIDUCIAL_C40M80
1
H_2P3
H_2P3
@
@
BOTTOM
CLP17
CLP11
CLP11
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP12
CLP12
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP13
CLP13
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP14
CLP14
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP15
CLP15
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP16
CLP16
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
CLP17
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP18
CLP18
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP19
CLP19
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP20
CLP20
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
CLP21
CLP21
EC0M5000700
EC0M5000700
EMIST_SUL-12A2M_1P
EMIST_SUL-12A2M_1P
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DC interface/Power Button
DC interface/Power Button
DC interface/Power Button
Picasso 2 R04
Picasso 2 R04
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Picasso 2 R04
1
23
23
23
1.0
1.0
1.0
38
38
38
Page 24
5
4
3
2
1
AC Mode
PU1
VIN
DC_IN
D D
Charger IC BQ24171
PL3
Batt. Mode
Battery 1S2P
C C
Charge
PR19
BATT+
B+
BATT+
AMP
B B
A A
5V
5
+AMP_VDD
+3VS_TH
R445_0_0402
400mA
R57_49.9_0201
0.35mA
300+171mA
PU7
PTPS659110A2ZRCR T30 PWR RAIL PMU IC
PU2
TPS63020DSJR SYSTEM Boost-Buck IC
PU4
G5910-50RBU_TDFN6 Charge PUMP Boost IC
PU3
TPS61030RSAR SYSTEM Buck IC
PU2
TPS63020DSJR 3G Boost-Buck IC
PU6
OZ9979LN-A3-0-TR BACK LIGHT Boost IC
PU9
TPS61050YZGR LED flash Boost IC
NCT1008CMT3R2G
THERMAL
VDD3.3V
6.5mA
+VDD_3V3_SENSOR
Q38
+3VS
U21
LCD Panel
3.3V
+LCDVDD
0.07mA
R122_0_0201
4
Gyro Sensor
1.8V
3.3V
P Sensor
3.3V
171mA300mA
+VDD_LVDS
+3VS
VDD_5V0_SBY
+5VS
V_MINCARD_3V3
+VDD_LED_BL
LED+ LED-
G Sensor
1.8V
0.10mA
0.67mA
+VDD_1V8_SENSOR
DS90C387AVJD
LVDS Transmitter
Light Sensor
1.8V
LVDSVCC3.3V
2750mA
20mA
1500mA
0.4mA
Q28
U50
Q29
Q32
Q31
L14
Camera
1.8V
2.8V
180mA
+VDD_CAM_2V8_R
R274_0_0402
+VDD_CAM_2V8
U39
+VDD_1V8_AUDIO
ES305
1.8V
3
+1V8_GPS
0.37mA
+2V8_GPS
+3V3_GPS
250mA
+1.8VS_WIFI
800mA
+3VS_WIFI
20mA
180mA
+VDD_CAM_1V8_R
Q35
Codec
1.8V
44mA
GPS
1.8V
2.8V
3.3V
WIFI/BT
1.8V
3.3V
Touch Panel
5V
3G CARD
3.3V
LVDS Panel
12V
LED Board
3V
+VDD_CAM_1V8R275_0_0402
R157_0_0402
VDD_1V8_GEN
Q26
VDD_PMU_LDO4
VDD_1V0_GEN
VDD_1V2_SOC
+3VS
VDD_1V2_MEM
+3VS
+3VS
+3VS
+3VS
+3VS
VDD_PMU_LDO1 +VDD_2V85_EMMC
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
20mA
6100mA
2500mA
40mA
475mA
30mA
50mA
10mA
15mA
80mA
10mA
10mA
10mA
56mA
10mA
130mA
10mA
10mA
10mA
10mA
54mA
10mA
10mA
110mA
20mA
180mA
200mA
200mA
45mA
R407_0_0402
R412_0_0402
R419_0_0201
R418_0_0201
R442_0_0402
R395_0_0201
R397_0_0201
R410_0_0402
R401_0_0201
R396_0_0201
R399_0_0201
R390_0_0201
R406_0_0201
R411_0_0402
R404_0_0201
R402_0_0201
R391_0_0201
R398_0_0402
R444_0_0402
R422_0_0402
R101_0_0402
R441_0_0402
Compal Secret Data
Compal Secret Data
Compal Secret Data
+VDD_1V2_RTC_TEGRA
+VDD_3V3_FUSE_TEG RA
Q33
+VDD_1V0_DDR_HS_T EGRAVDD_PMU_LDO8
+VDD_3V3_DDR_RX_T EGRA
+VDD_3V3_LCD_TEGRA
Q2
+AVDD_3V3_HDMI_S
L2
AVDD_HDMI_PLL
+VDD_3V3_SDMMC1_TE GRAVDD_PMU_LDO3
+VDD_1V8_SDMMC3_TE GRA
+VDD_1V8_AUDIO_TEGRA
+AVDD_1V2_DSI_CSI_TEGRAVDD_PMU_LDO6
+VDD_1V8_CAM_TEGRA
+AVDD_3V3_USB_TEGR A
+AVDD_1V8_USB_PLL _TEGRA
L3
AVDD_OSC
+VDD_1V8_SDMMC4_TE GRA
+VDD_1V8_SYS_TEGRA
+AVDD_1V1_PLL_TE GRAVDD_PMU_LDO7
+VDD_1V8_BB_TEGRA
+VDD_1V8_UART_TEGR A
+VDD_3V3_GMI_TEGRA
+VDD_1V8_DDR_MEM
+VDD_1V2_DDR_MEMVDD_1V2_ MEM
+VDDIO_1V8_EMMC
Deciphered Date
Deciphered Date
Deciphered Date
2012/05/202011/05/20
2012/05/202011/05/20
2012/05/202011/05/20
T30S-R-A1-1.4G
Core Power
VDD_RTC
1.0V~1.2V
0.9V~1.0V VDD_CP U
VDD_CORE1.0V~1.2V
3.3V VPP_FUSE
DDR
1.2V VDDIO_DDR
1.05V VDD_DDR_HS
VDD_DDR_RX3.3V
LCD
VDDIO_LCD3.3V
HDMI
3.3V AVDD_HDMI
1.8V AVDD_HDMI_PLL
SD Card
3.3V VDDIO_SDMMC1
WiFi
VDDIO_SDMMC3
1.8V
Audio
1.8V VDDIO_AUDIO
Camera
1.2V AVDD_DSI_CSI
1.8V VDDIO_CAM
USB
3.3V AVDD_USB
1.8V AVDD_USB_ PLL
OSC
1.8V AVDD_OSC
eMMC
1.8V VDDIO_SDMMC4
SYSTEM
1.8V VDDIO_SYS
1.1V AVDD_PLL
1.8V VDDIO_BB
1.8V VDDIO_UART
1.8V VDDIO_GMI
MT46H64M32L2JG
DDR
VDD11.8V
VDD21.2V
eMMC
VCC2.85V
1.8V VCCQ
Micro SD+VDD_3V_SDVDD_PMU_LDO2
3.3V
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Tuesday, January 1 7, 2012
Tuesday, January 1 7, 2012
Tuesday, January 1 7, 2012
1
Power Tree
Power Tree
Power Tree
Picasso 2 R04
Picasso 2 R04
Picasso 2 R04
24
38
24
38
24
38
1.0
1.0
1.0
Page 25
5
4
3
2
1
VIN AC=12V
D D
+VIN_USB USB=5V
C C
SWITCH
Charger IC BQ24171
Battery 1S2P
B+
TPS61030 SYSTEM Boost-Buck IC
TPS63020 SYSTEM Boost-Buck IC
G5910 Charge PUMP Boost IC
TPS63020 3G Boost-Buck IC
Oz9979 BACK LIGHT Boost IC
TPS61050 LED flash Boost IC
+5VS
+3VS
+VDD_5V0_SBY
+V_MINICARD_3V3
+VDD_LED_BL
LED+
B B
PTPS6591102AA2ZRC T30 PWR RAIL PMU IC
A A
5
4
3
T30 CHIP
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
Picasso II/M
Picasso II/M
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso II/M
1
25
38
25
38
25
38
1.0
1.0
1.0
Page 26
5
4
3
2
1
SP02000V310
ACES_88231-09001
ACES_88231-09001
D D
@PJP1
@
11
GND
10
GND
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
PJP1
PR1 100_0402_1%PR1 100_0402_1%
1 2
PR2 0_0402_5%@ PR2 0_0402_5%@
1 2
PR3 100_0402_1%PR3 100_0402_1%
PR12 0_0402_5%@ PR12 0_0402_5%@
1 2
12
BATT_TEMP <27>
PWR_I2C_SCL <7,10,14,15,32,34>
CAM_I2C_SCL <6,17,35>
PWR_I2C_SDA <7,10,14,15,32,34>
CAM_I2C_SDA <6,17,35>
12
12
PC8
PC8
PC9
PC9
33P_0402_50V8J
33P_0402_50V8J
1000P_0402_50V7K
1000P_0402_50V7K
12
PC11
PC11
0.01UF_0402_25V7K
0.01UF_0402_25V7K
BATT+
12
12
PC1
PC1
PC2
PC2
2200P_0402_50V7K
2200P_0402_50V7K
0.033U_0402_16V7K
0.033U_0402_16V7K
Battery I2C re serve CAM_I2C- 10/31
VIN
PL1
C C
DC_IN
12
12
PC4
PC120
PC120
0.01UF_0402_25V7K
0.01UF_0402_25V7K
PC4
1000P_0402_50V7K
1000P_0402_50V7K
PL1
FBMA-L11-160808-301LMA20T
FBMA-L11-160808-301LMA20T
1 2
12
PC5
PC5
1000P_0402_50V7K
1000P_0402_50V7K
12
12
PC6
PC6
PC7
PC7
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
0.22U_0402_16V7K
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DC IN/BATT IN
DC IN/BATT IN
DC IN/BATT IN
Picasso II/M
Picasso II/M
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso II/M
1
1.0
1.0
26
26
26
1.0
38
38
38
Page 27
5
OVP UVP Range setting: ##OVPSET voltage is between 0.497~1.6V ##
1.6V*(768+100)/100=13.888V
PD1
PD1
IF=3A VF=0.5V VR=40V
1
3
PC89
PC89
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
VDD_3V3_BQ24171_VREF
34
D
D
PQ4B
PQ4B
5
G
G
S
S
PR20
PR20
1 2
21K_0402_1%
21K_0402_1%
34
D
D
S
S
PQ6B
PQ6B
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
PQ6A
PQ6A
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
2 1
SBR3U40P1-7_PO WERDI123-2
SBR3U40P1-7_PO WERDI123-2
12
PR10
PR10 100K_0402_1%
100K_0402_1%
PR16
PR16
@
@
1 2
1 2
100K_0402_1%
100K_0402_1%
PR40
PR40
100K_0402_1%
100K_0402_1%
DOCK_DET _R#<20>
CORE_PW R_REQ<7,32>
PR105
PR105
@
@
470K_0201_1%
470K_0201_1%
PR129
PR129
@
@
100K_0201_1%
100K_0201_1%
PQ2
PQ2 AON7403L_DFN 8-5
AON7403L_DFN 8-5
1
3
DOCK_CP
12
61
D
D
2
G
G
S
S
VIN
12
2.39V
12
@
@
4
PQ26A
PQ26A
SI1034CX-T1-GE3_SC89-6
SI1034CX-T1-GE3_SC89-6
12
PR48
PR48
@
@
61
D
D
2
G
G
S
S
34
D
D
5
G
G
S
S
12
PR133
PR133
0_0201_5%
0_0201_5%
VIN
Max Rds(on) 36mohm
PQ1
PQ1 AON7403L_DFN 8-5
AON7403L_DFN 8-5
VBUS_USB
D D
5 2
4
Change 0.22U*2 for VBUS_USB is sue 10/19
1 2
PR13
PR13
2.5V
1U_0603_25V6K
1U_0603_25V6K
1 2
VBUS_USB
PR23
PR23
PR24
PR24
1 2
100K_0402_1%
100K_0402_1%
VBUS_USB
1 2
10K_0402_5%
10K_0402_5%
PR15
PR15 100K_0402_1%
100K_0402_1%
PQ4A
PQ4A
2
G
G
1 2
100K_0402_1%
100K_0402_1%
USB500MA
2
G
G
SI1034CX-T1-GE3_S C89-6
SI1034CX-T1-GE3_S C89-6
1 2
61
D
D
SI1034CX-T1-GE3_S C89-6
SI1034CX-T1-GE3_S C89-6
S
S
5
G
G
61
D
D
S
S
PC101
PC101
@
@
ENABLE_USB_H OST
C C
PC29
PC29
0.1U_0402_25V6
0.1U_0402_25V6
ACIN_12V_OFF
Charge Current setting: ICHG=VISET/(20*PR352) <<AC adaptor charge>> VISET=VREF*[PR26/(PR26+(PR22//PR46))] =3.3*[11/(11+267//47.5)]= 0.707V ICHG=0.707/(20*0.01)=3.536A <<USB charge>> VISET=VREF*[PR26/(PR26+PR22)] =3.3*[11/(11 +267)]= 0.131V
B B
ICHG=VISET/(20*0.01)=0.653A
## VISET voltage is between 0.12~0.8V ##
34
D
D
5
G
PQ22B
G
PQ22B
S
S
SI1034CX-T1-GE3_S C89-6
SI1034CX-T1-GE3_S C89-6
VDD_3V3_BQ24171_VREF
SB00000SP00 use BSS8402DW foot print
1M_0402_1%
1M_0402_1%
12
VIN
PR39
PR42
PR42
PR43
PR43
12
402K_0402_1%
402K_0402_1%
12
100K_0402_5%
100K_0402_5%
ACIN_12V_OFF
12
PR39
PC33
PC33
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4
PQ18
PQ18
5
BSS8402DW_ SOT363-6
BSS8402DW_ SOT363-6
BQ24171_ISET
5
3 1
62
PR46
PR46
1 2
47.5K_0402_1%
47.5K_0402_1%
A A
2.39V
0.497V*(768+100)/100=4.314V Setting "OVP 13.888V" & "UVP 4.314V"
Max Rds(on) 16.5mohm
PQ17
PQ17
SI7716ADN-T1-G E3_POWERPAK8- 5
SI7716ADN-T1-G E3_POWERPAK8- 5
P2
52
12
3.3_1206_5%
3.3_1206_5% PR11
PR11
12
PC15
PC15
0.01U_0603_50V7K
0.01U_0603_50V7K
PQ26B
PQ26B
5
G
G
12
PR124
PR124
BTB_OFF
34
D
D
SI1034CX-T1-GE3_S C89-6
SI1034CX-T1-GE3_S C89-6
S
S
1M_0201_1%
1M_0201_1%
5
PQ23A
PQ23A
VDD_3V3_BQ24171_VREF
12
12
PR21
PR21
PR123
PR123
57.6K_0402_1%
73.2K_0402_1%
73.2K_0402_1%
PQ24A
PQ24A
@
@
PQ24B
PQ24B
@
@
PR130
@PR13 0
@
0_0201_5%
0_0201_5%
PR132
PR132
0_0201_5%
0_0201_5%
57.6K_0402_1%
1 2
SI1034CX-T1-GE3_SC89-6
SI1034CX-T1-GE3_SC89-6
SI1034CX-T1-GE3_SC89-6
SI1034CX-T1-GE3_SC89-6
12
12
DOCK_CP
100K_0402_1%
100K_0402_1%
12
PR25
PR25
73.2K_0402_1%
73.2K_0402_1%
12
PR1010
PR1010
PQ23B
PQ23B
4.99K_0402_1%
4.99K_0402_1%
5
PR135 49.9K_0402_1%PR135 49.9K_0402_1%
G
G
12
PR10120_0201_5% PR10120_020 1_5%
TTC_PREC H
CP_GPIO<5>
VDD_3V3_BQ24171_VREF
PR44
PR44
10K_0201_1%
10K_0201_1%
PR47
PR47
10K_0201_1%
10K_0201_1%
1 2
USB500MA
1 2 4
PQ19
PQ19
5
BSS8402DW_ SOT363-6
BSS8402DW_ SOT363-6
3 1
62
2
G
G
12
34
1 2 3
4
61
D
D
SI1034CX-T1-GE3_S C89-6
SI1034CX-T1-GE3_S C89-6
S
S
267K_0402_1%
267K_0402_1%
12
PR22
PR22
11K_0402_1%
11K_0402_1%
12
PR26
PR26
PR1009
PR1009
0_0402_5%
0_0402_5%
D
D
SI1034CX-T1-GE3_S C89-6
SI1034CX-T1-GE3_S C89-6
S
S
BATT_LEARN <6>
13
D
D
2
G
G
PQ28
PQ28
@
@
S
S
12
PR126
PR126
26.1K_0402_1%
26.1K_0402_1%
BQ24171_TTC
4
CHARGER BQ24171
P3
PQ3
PQ3 SI7716ADN-T1-G E3_POWERPAK8- 5
SI7716ADN-T1-G E3_POWERPAK8- 5
1 2 3
PR14
@PR14
@
1 2
499K_0402_1%
499K_0402_1%
PC18
PC18
1 2
0.047U_0402_25V7K
0.047U_0402_25V7K
BATT+
P2
12
PR31
PR31 768K_0402_1%
768K_0402_1%
12
PR33
PR33 100K_0402_1%
100K_0402_1%
+3VS
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
PR119
PR119 100K_0201_1%
100K_0201_1%
1
PC124
PC124
2
SI1034CX-T1-GE3_S C89-6
SI1034CX-T1-GE3_S C89-6
0.022U_0402_25V7K
0.022U_0402_25V7K
L: charge in progress H : charge is complete or in sleep mode Blink (0.5Hz): fault occur (charge suspend, input over-voltage, timer fault and battery absent)
CP setting: Idpm=Vacset/(20*PR9) <<AC adaptor>> Vacset=3.3*PR25/(PR21+PR25)=1.395V Iin=Vacset/(20*PR9)=1.395A <<USB>> Vacset=3.3*(PR25//PR20)/(PR21+PR25//PR20)=0.463V Iin=Vacset/(20*PR9)=0.463A <<Dock-in>> Vacset=3.3*(PR25//PR23)/(PR21+PR25//PR123)=0.804V Iin=Vacset/(20*PR9)=0.804A
4
5
4
PR17 4.02K_0402_1%PR17 4.02K_0402_1%
PR18 4.02K_0402_1%PR18 4.02K_0402_1%
PR28
PR28
2
10_0805_1%
10_0805_1%
1
1 2
PD6
PD6
3
BAT54CW_ SOT323-3
BAT54CW_ SOT323-3
VDD_3V3_BQ24171_VREF
PR34
@PR34
@
10K_0201_1%
10K_0201_1%
1 2
PC32
PC32
0.1U_0402_25V6
0.1U_0402_25V6
PR93
PR93
0_0201_5%
0_0201_5%
@
@
1 2
CHARGER _STAT<4>
12
34
D
D
PQ21B
PQ21B
5
G
G
DMN66D0LDW -7_SOT363-6
DMN66D0LDW -7_SOT363-6
S
S
WAKEUP_LE D
2
G
G
PQ22A
PQ22A
PR9
PR9
1
4
3
2
0.05_1206_1%
0.05_1206_1%
PC14
PC14
1 2
0.1U_0402_25V6
0.1U_0402_25V6
12
PC17
PC17
0.1U_0402_25V6
0.1U_0402_25V6
1 2
1 2
BQ24171 internal regulator
PC21
PC21 1U_0402_6.3V6K
1U_0402_6.3V6K
12
61
D
D
12
S
S
PC126
PC126
1 2
BQ24171_ISET
BQ24171_ACSET
PC30
PC30 1U_0603_25V6K
1U_0603_25V6K
1 2
BQ24171_AVCC
BQ24171_OVPSET
CHARGER _LED#
PR36
@PR36
@
1 2
10K_0402_5%
10K_0402_5%
1 2
PR1013
PR1013
51K_0402_1%
51K_0402_1%
PQ21A
PQ21A
2
G
G
12
PC127
PC127
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
BQ24171_ACN
BQ24171_ACP
BQ24171_TTC
61
D
D
DMN66D0LDW -7_SOT363-6
DMN66D0LDW -7_SOT363-6
S
S
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
12
5
6
7
8
12
13
17
4
18
11
9
PR38
PR38
100K_0402_1%
100K_0402_1%
2
G
G
3
PC16
PC16
0.1U_0402_25V6
0.1U_0402_25V6
PU1
PU1
ACN
ACP
CMSRC
ACDRV
VREF
ISET
ACSET
AVCC
OVPSET
TTC
STAT
BQ24171RGYR_VQF N24_3P5X5P5
BQ24171RGYR_VQF N24_3P5X5P5
VDD_3V3_BQ24171_VREF
PVCC
PVCC
BATDRV#
BTST
REGN
PGND
PGND
THERMALPAD
SRN
BATDRV#
12
VDD_3V3_BQ24171_VREF
Orange LED
34
D
D
5
G
G
SI1034CX-T1-GE3_S C89-6
SI1034CX-T1-GE3_S C89-6
S
S
61
D
D
USB500MAUSB50 0MA
S
S
PQ29A
PQ29A
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
3
AC Insert or remove --> Wake up T30S USB Insert or remove --> Wake up T30S SW to check if Acer USB --> Change charge current to 1A
Charge_in
BQ24171_SW
BQ24171_BTST
BQ24171_SRN
BQ24171_REGN
BQ24171_TS
BQ24171_FB
34
D
D
S
S
PQ29B
PQ29B
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
12
PD5
PD5
2 1
SBR3U40P1-7_PO WERDI123-2
SBR3U40P1-7_PO WERDI123-2
PR98
PR98
1 2
2.2_0603_5%
2.2_0603_5%
WAKEUP_LE D<7>
2
3
19
1
SW
24
SW
21
16
SRP
15
20
10
TS
14
FB
22
23
25
O_LED_CTL <20>
PQ7B
PQ7B
5
G
G
2
12
100K_0402_5%
100K_0402_5% PR5
12
CHARGER _LED#
SB000005N00
13
D
D
2
G
G
S
S
PQ27
PQ27
B+
1 2
PC25
PC25
12
1 2
PU18 @
PU18 @
1
IN+
VCC+
2
GND
OUT
3
IN-
LMV331IDCKRG4_SC 70-5
LMV331IDCKRG4_SC 70-5
PR5
PC12
PC12
0.01UF_0402_25V7K
0.01UF_0402_25V7K
BTB_OFF
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
1 2
PC24
PC24
0.01UF_0402_25V7K
0.01UF_0402_25V7K
1
2
PC27
PC27
0.1U_0402_16V4Z
0.1U_0402_16V4Z
BATT+
PR125
PR125
0_0402_5%
0_0402_5%
@
@
1 2
5
4
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
22U_0603_6.3V6M
22U_0603_6.3V6M
0.01_1206_1%
0.01_1206_1%
0_0402_5%
0_0402_5%
@
@
PD2
PD2
RB751V-40_SOD323-2
PR136
PR136
VIN VBUS_USB
12
4.02K_0402_1%
4.02K_0402_1%
PD4
PD4
@
@
1 2
RB751V-40_SOD323-2
RB751V-40_SOD323-2
PC121
PC121
1 2
2.2U_0603_16V6K
2.2U_0603_16V6K
12
PC19
PC19
PC20
PC20
10U_0805_25V6K
10U_0805_25V6K
0.01UF_0402_25V7K
0.01UF_0402_25V7K
BATDRV#
PL3
PL3
2.2UH_PCME051E -2R2MS_3.3A_20%
2.2UH_PCME051E -2R2MS_3.3A_20%
PC22
PC22
1 2
0.047U_0402_25V7K
0.047U_0402_25V7K
VDD_3V3_BQ24171_VREF
PC31
PC31
1 2
1U_0402_16V6K
1U_0402_16V6K
BQ24171_SRP
12
PR29
PR29
2.43K_0402_1%
2.43K_0402_1%
Charging 0-58C LNJT103F011-20
W_LED_C TL <20>
PR30
PR30
7.68K_0402_1%
7.68K_0402_1%
1 2
PR32
PR32 0_0402_5%
0_0402_5%
1 2
White LED
61
D
D
2
G
G
SI1034CX-T1-GE3_S C89-6
SI1034CX-T1-GE3_S C89-6
S
S
PQ7A
PQ7A
PD9
PD9
2
1
3
BAT54CW_ SOT323-3
BAT54CW_ SOT323-3
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
PR45
PR45
@
@
100K_0402_5%
100K_0402_5%
51K_0402_5%
51K_0402_5%
RB751V-40_SOD323-2
1 2
12
PC125
PC125
PR131
PR131
1 2
1K_0402_1%
1K_0402_1%
@
@
0.01UF_0402_25V7K
0.01UF_0402_25V7K
PR127
PR127 1M_0201_1%
1M_0201_1%
1 2
SH00000OD00
1 2
BATT_TEMP <26>
LED status: (AC/Dock station) No charge : LED off Fully charged : Static White LED Charging : Static Orange LED Charging error : Blink
LED status: (USB) All LED off
Boot : Static White LED 5sec Wake up : Static White LED 5sec
Pre-Charge reserved circuit
VDD_3V3_BQ24171_V REF
12
PR75
@PR75
@
100K_0402_5%
100K_0402_5%
12
PR61
@PR61
@
12
PR79
@PR 79
@
100K_0402_5%
100K_0402_5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
1
VDD_1V8_GENVDD_1V8_G EN
12
100K_0402_5%
100K_0402_5% PR6
PD3
PD3
WAKE_UP_A CIN <7> WAKE_UP_VBU S <7>
10K_0402_1%
10K_0402_1%
PR8
PR8
1 2
RB751V-40_SOD323-2
RB751V-40_SOD323-2
1 2
PR6
12
PC13
PC13
0.01UF_0402_25V7K
0.01UF_0402_25V7K
BATT+ BATT+
806K_0402_1%
806K_0402_1%
PR62
PR62
806K_0402_1%
806K_0402_1%
PR114
PR114
1 2
PR19
PR19
PC26
PC26
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
charger_out
4
3
Vbat=2.1*(1+R27/R37)
TTC setting: High:Disable charge timer,allow termination. Low:Disable charge termination & timer. Connect capacitor:Set fast charge timer.
PR92
PR92
charger_out
12
@
@
100K_0402_5%
100K_0402_5%
PR7
PR7
AON7403L_DFN 8-5
AON7403L_DFN 8-5
1
3
PR82
@PR82
@
100K_0402_5%
100K_0402_5%
1 2
2005/4/21
Battery OVP protect
PU17
PU17
1 2
2
RESET/RESET
12
RT9818A-36PV_SO T23-3
RT9818A-36PV_SO T23-3
PC118
PC118
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
12
PC28
PC28
0.1U_0402_16V4Z
0.1U_0402_16V4Z
PQ9
@ PQ9
@
52
4
PR41
@PR41
@
0_0201_5%
0_0201_5%
TTC_PREC H
12
BATT+
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Tuesday, January 17, 2012
Date: Sheet of
Tuesday, January 17, 2012
Date: Sheet of
Tuesday, January 17, 2012
1
VDD
3
GND
Batt OVP : Batt+ over 4.4V Back to back will turn off
PJ7
PJ7
112
JUMP_43X118
JUMP_43X118
PC23
PC23
22U_0603_6.3V6M
22U_0603_6.3V6M
12
PR27
@PR27
@
82K_0402_0.1%
82K_0402_0.1%
12
PR37
PR37
82.5K_0402_0.1%
82.5K_0402_0.1%
2
12
PR86
@PR 86
@
300_0402_1%
300_0402_1%
BATT+
BATT+ under 3.3V, Pre-charge will start
Charger
Charger
Charger
Picasso II/M
Picasso II/M
Picasso II/M
1
@
@
2
31
@
@
PQ5
PQ5 2SA1037AK_SC59-3~ D
2SA1037AK_SC59-3~ D
12
27
27
27
BATT+
PR35
PR35 82K_0402_0.1%
82K_0402_0.1%
PR67
PR67
1 2
38.3K_0402_1%
38.3K_0402_1%
PR68
PR68
1 2
200K_0402_1%
200K_0402_1%
1.0
1.0
1.0
38
38
38
Page 28
5
4
3
2
1
PR113
@PR113
@
1 2
10K_0402_1%
10K_0402_1%
PD11@
PD11@
PC56
PC56
@
@
0.1U_0402_25V6
0.1U_0402_25V6
1 2
2 1
1SS355_UMD2-2
1SS355_UMD2-2
D D
+3VS
Imax=1A
<Vo=3.3 VS> VFB=0.5V Vo=VFB(1+R12/R14)
3.3=0.5(1+560/100)
C C
spec: Ven >0.8 *VBAT
VBAT=5V-->Ven> 4V
B B
EN_5V0_BUCKBOOST<13,32>
12
12
PR57
PR57
1M_0402_1%
1M_0402_1%
SYNC High : disable power saving SYNC low : enable power saving
PC41
PC41
@
@
B+
PR49
PR49
1 2
100K_0402_1%
100K_0402_1%
+3VS_FB
1 2
0.1U_0402_25V6
0.1U_0402_25V6 PR58
PR58
PR96
PR96
0_0402_5%
0_0402_5%
@
@
1 2
1 2
PL7
PL7
1 2
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
Vfb = 0.5V
PR54
PR54
560K_0402_1%
560K_0402_1%
12
PC113
PC113 33P_0402_50V8K
33P_0402_50V8K
PC37
PC37
22U_0603_6.3V6M
22U_0603_6.3V6M
12
11
10
9
0_0402_5%
0_0402_5%
63020_B+
12
PC38
PC38
12
12
22U_0603_6.3V6M
22U_0603_6.3V6M
13
PU3
PU3
GND
LBO
EN
SYNC
LBI
VBAT
8
PC42
PC42
12
PU2
PU2
PC34
PC34
1
VINA
2
0.1U_0402_25V6
0.1U_0402_25V6
GND
3
FB VOUT4VIN
5
VOUT
6
L2
7
L2
TPS63020DSJR_QFN14_4X3
TPS63020DSJR_QFN14_4X3
1 2
1.5UH_TMPC0412HP-1R5M-Z02_3A_20%
1.5UH_TMPC0412HP-1R5M-Z02_3A_20%
+5VS_FB
15
14
FB
7
17
VOUT16VOUT
PADGND
PGND5PGND6PGND
TPS61030RSAR_QFN16_4X4
TPS61030RSAR_QFN16_4X4
PL5
PL5
VOUT
NC
SW
SW
PS/SYNC
PGND
15
1
2
3
4
14
PG
13 12
EN
11 10
VIN
9
L1
8
L1
FB: 0.5V
12
PL6
PL6
2.2UH_PCMB041B-2R2MS_2.75A_20%
2.2UH_PCMB041B-2R2MS_2.75A_20%
EN_3V3_SYS<32>
PR50
12
PR55
PR55
2.05K_0402_1%
2.05K_0402_1%
PR50
0_0402_5%
0_0402_5%
PR52
PR52
0_0201_5% @
0_0201_5% @
1 2
12
PC35
PC35
12
PR51
PR51
0_0201_5%
0_0201_5%
PR53 1M_0201_1%PR53 1M_0201_1%
1 2
PC36
PC36
12
12
10U_0603_6.3V6M
10U_0603_6.3V6M
Vout = 0.5* (1+PR56/PR55) = 5.158V
12
19.1K_0402_1%
19.1K_0402_1%
PR56
PR56
12
PC1007
PC1007 1000P_0402_25V8J
1000P_0402_25V8J
1
+
+
PC39
PC39
2
100U_B3_6.3VM_R45M
100U_B3_6.3VM_R45M
Change C_B3 footprint
PL4
63020_B+
10U_0603_6.3V6M
10U_0603_6.3V6M
PL4
1 2
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
5.045V
H/W maxloading:2A
B+
+5VS
12
PC40
PC40
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+3.3VALWP/+5VALWP
+3.3VALWP/+5VALWP
+3.3VALWP/+5VALWP
Picasso II/M
Picasso II/M
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso II/M
1
1.0
1.0
28
28
28
1.0
38
38
38
Page 29
5
4
3
2
1
D D
C C
B+
HCB1608KF-121T30_0603
HCB1608KF-121T30_0603
1 2
PU4
PU4
G5910_CP
PR59
PR59
0_0201_5%
0_0201_5%
4
C+
VOUT
5
VIN
GND
6
C-
7
SHDN
TP
G5910-50RBU_TDFN6_2X2
G5910-50RBU_TDFN6_2X2
12
PR60
@PR60
@
100K_0201_1%
100K_0201_1%
3
2
1
12
12
@
@
PC46
PC46
0.1U_0201_6.3V6K
0.1U_0201_6.3V6K
12
PC44
PC44 10U_0603_6.3V6M
10U_0603_6.3V6M
PL8
PL8
PC43
PC43
G5910_CP G5910_CN
1 2
1U_0603_25V6K
1U_0603_25V6K
EN_5V_CHARGEPUMP<32,34>
12
PC45
PC45 10U_0603_6.3V6M
10U_0603_6.3V6M
VDD_5V0_SBY
Imax=110mA Iocp(min)=250m A
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+5V_charge_pump
+5V_charge_pump
+5V_charge_pump
Picasso II/M
Picasso II/M
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso II/M
1
1.0
1.0
29
29
29
1.0
38
38
38
Page 30
5
D D
4
3
2
1
PC52
PC52
3G@
3G@
BATT+
PC1006
PC1006
1 2
10U_0603_6.3V6M
10U_0603_6.3V6M
EN_3V3_MODEM <7,18>
1U_0402_6.3V6K
1U_0402_6.3V6K
3G@
3G@
12
PC119
PC119
@
@
47U_0805_6.3V6M
47U_0805_6.3V6M
3G@
3G@
PL16
PL16
HCB1608KF-121T30_0603
HCB1608KF-121T30_0603
1 2
BATT+
3G@
3G@
PR85
PR85
0_0402_5%
0_0402_5%
12
12
22U_0603_6.3V6M
22U_0603_6.3V6M
PU5
3G@PU5
PC47
3G@ PC47
3G@
3G@
1
VINA
2
GND
3
0.1U_0402_25V6
0.1U_0402_25V6
FB VOUT4VIN
5
VOUT
6
L2
7
L2
TPS63020DSJR_QFN14_4X3
TPS63020DSJR_QFN14_4X3
PL9
PL9
1 2
1.5UH_TMPC0412HP-1R5M-Z02_3A_20%
1.5UH_TMPC0412HP-1R5M-Z02_3A_20%
PS/SYNC
15
3G@
3G@
14
PG
13 12
EN
11 10
VIN
9
L1
8
L1
PGND
PR64
@ PR64
@
0_0201_5%
0_0201_5%
1 2
12
3G@PC49
3G@
PC49
1 2
12
10U_0603_6.3V6M
10U_0603_6.3V6M
PR65
3G@PR65
3G@
100K_0402_5%
100K_0402_5%
12
3G@PC50
3G@
PC50
PR89
@PR89
@
1 2
10K_0201_1%
10K_0201_1%
PR63
3G@ PR63
3G@
1 2
100K_0201_1%
100K_0201_1%
PD10@
PD10@
2 1
1SS355_UMD2-2
1SS355_UMD2-2
PC48
PC48
@
@
0.1U_0201_10V6K
0.1U_0201_10V6K
PJ8
PJ8 JUMP_43X79@
JUMP_43X79@
2
C C
V_MINCARD_3V3
112
1 2
Imax=1A
<Vo=3.3 VS> VFB=0.5V Vo=VFB(1+R12/R14)
3.3=0.5(1+560/100)
B B
3G_FB
PR66
PR66
3G@
3G@
1 2
560K_0402_1%
560K_0402_1%
12
PC114
3G@PC114
3G@
33P_0402_50V8K
33P_0402_50V8K
PC51
PC51
12
22U_0603_6.3V6M
22U_0603_6.3V6M
3G@
3G@
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
3G PA(SY8033B/APL5916)
3G PA(SY8033B/APL5916)
3G PA(SY8033B/APL5916)
Picasso II/M
Picasso II/M
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso II/M
1
1.0
1.0
30
30
30
1.0
38
38
38
Page 31
5
D D
4
3
2
1
PL10
B+
12
12
PC53
PC53
0.1U_0603_25V7K
0.1U_0603_25V7K
C C
+5VS
DISPOFF#<4,13>
B B
PC54
PC54
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
PR69
PR69
1 2
10_0402_1%
10_0402_1%
0_0201_5%
0_0201_5%
PR70
PR70
1 2
PR103
PR103
1 2
4.7UH_PCME051E-4R7MS_3A_20%
4.7UH_PCME051E-4R7MS_3A_20%
12
PC58
PC58
0.1U_0402_25V6
0.1U_0402_25V6
9979_EN
@
@
12
PC59
PC59
1 2
100K_0201_1%
100K_0201_1%
1000P_0201_50V7K
1000P_0201_50V7K
PC1004
PC1004
1U_0402_6.3V6K
1U_0402_6.3V6K
1 2
PR97
@PR97
@
0_0201_5%
0_0201_5%
1 2
9979_VREF
PR1007
PR1007
0_0201_5%
0_0201_5%
1 2
PR1008
PR1008
100K_0201_1%
100K_0201_1%
1 2
DCTRL
SW
21
PU6
PU6
1
2
3
4
5
20
PAD
VIN
PWM
OZ9979LN-A3-0-TR _QFN20_4X4
OZ9979LN-A3-0-TR _QFN20_4X4
VREF
ADIM
RT
ISET6LRT7LPF
SW
PWM dimming frequency: 6K(TYP)
1K_0201_1%
1K_0201_1%
PR71
PR71
INVTPWM<13>
A A
1 2
100K_0201_1%
100K_0201_1%
DCTRL
PR99
PR99
PR72
PR72
56K_0201_1%
56K_0201_1%
24K_0402_1%
24K_0402_1%
1 2
PR73
PR73
12
PC62
@PC62
1 2
@
1000P_0201_50V7K
1000P_0201_50V7K
1 2
PD8
PD8
2 1
SBR3U40P1-7_POWERDI123-2
SBR3U40P1-7_POWERDI123-2
PR100 100_0402_1%PR100 100_0 402_1%
PR94
PR94 0_0201_5%
0_0201_5%
1 2
19
SYNC
PC60
PC60
17
18
SSTCMP
ENA
9
8
9979_EN
1 2
1U_0402_6.3V6K
1U_0402_6.3V6K
0.01UF_0402_25V7K
0.01UF_0402_25V7K
9979_OVP
SA000051D00
16
OVP
ISEN1
ISEN2
ISEN3
GNDA
ISEN4
ISEN5
ISEN6
10
TP2
TP2
PAD
PAD
PC61
PC61
12
12
PC110 0.47U_0402_10V4ZPC110 0.47U_040 2_10V4Z
15
14
13
12
11
PL10
VISHAY use DII footprint
Use other footprint
12
12
PC117
PC117
33P_0402_50V8J
33P_0402_50V8J
12
PC57
PC57
4.7U_0805_50V6K
4.7U_0805_50V6K
FB1 <13>
12
PC55
PC55
4.7U_0805_50V6K
4.7U_0805_50V6K
FB2 <13>
FB3 <13>
FB4 <13>
FB5 <13>
+VDD_LED_BL
12
PR107
PR107 1M_0201_1%
1M_0201_1%
9979_OVP
PC1005
PC1005
100P_0201_25V8J
100P_0201_25V8J
Picasso M: PR112 76.8K OVP :35.05V Picasso II : PR112 93.1K OVP :29.35V
12
PR112
P2@PR112
12
P2@
93.1K_0201_1%
93.1K_0201_1%
PR112
PM@ PR112
PM@
76.8K_0201_1%
76.8K_0201_1%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
2
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LED driver
LED driver
LED driver
Picasso II/M
Picasso II/M
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Wednesday, January 18, 2012
Picasso II/M
1.0
1.0
1.0
31
31
31
1
38
38
38
Page 32
5
PMU-TPS65911 1/3
PWR_I2C_SCL<7,10,14,15,26,34>
PR83
PR83
1 2
VDD_1V8_GEN
12
PWR_I2C_SDA<7,10,14,15,26,34>
CPU_PWR_REQ<7>
CORE_PWR_REQ<7,27>
AP_OVERHEAT#<7>
TP12
TP12
PAD
PAD
TP11
TP11
PAD
PAD
VDD_1V8_PMU_VRTC
1 2
D D
10K_0402_5%
10K_0402_5%
PMU_INT#<7>
C C
B+
PC181
PC181 1U_0402_6.3V6K
1U_0402_6.3V6K
PR95 0_0201_5%PR95 0_0201_5%
PR4
PR4
12
0_0402_5%
0_0402_5%
B B
A A
ONKEY#<7,20>
12
HDRST<20>
PR90
PR90 0_0201_5%
0_0201_5%
4
TP4
TP4
PAD
PAD
PMU_VCCS
0 = Hardcode
1
= EEPROM
PMU_ONKEY#
PR74 0_0201_5%PR74 0_0201_5%
1 2
PR76 0_0201_5%PR76 0_0201_5%
1 2
PR81 0_0201_5%PR81 0_0201_5%
1 2
TP1
TP1
PAD
PAD
PR84 0_0201_5%PR84 0_0201_5%
1 2
POWERHOLD
PR88 0_0201_5%PR88 0_0201_5%
1 2
HDRST
PMU_BOOT1
M4
M5
M7
M6
N1
N2
H7
G6
D6
G4 H6
H5
M8 N8
F1
L3
L6
E4
E8
J5
B8
E6 E5 F5
J3 J4 J6 K3
A1 B1 B2
PU7A
PU7A
SCL
SDA
EN1
EN2
SLEEP
INT1
PWRHOLD
PWRDN
HDRST
GPIO4
GPIO5
PWRON
VCCS
BOOT1
TESTV
AGND1 AGND2 AGND3 AGND4 AGND5 AGND6 AGND7 AGND8 AGND9 AGND10 AGND11
AGND21 AGND22
DGND1 DGND2 DGND3
3
PTPS659110A2ZRCR_BGA98
PTPS659110A2ZRCR_BGA98
OSC32KOUT
OSC32KIN
GPIO0
GPIO7
GPIO8
GPIO2
GPIO6
GPIO1
GPIO3
CLK32KOUT
NRESPWRON
NRESPWRON2
VBACKUP
VDDIO
VCC7
VRTC
VREF
REFGND
F7
PMU_OSC32KIN
F8
L5
L4
K5
L2
G3
F6
B7
TP5
TP5
PAD
PAD
F4
H4
C7
D7
N7
B6
B5
G8
G7
PMU_OSC32KOUT
PMU_VBACKUP
12
12
12
12
PMU_OSC32KIN <7>PMU_OSC32KOUT <7>
12
PC63
PC63
22P_0402_50V8J
22P_0402_50V8J
EN_5V_CHARGEPUMP <29,34>
1 2
PR87 33_0402_1%PR87 33_0402_1%
PR91 0_0201_5%PR91 0_0201_5%
1 2
PC66
PC66
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
PC67
PC67
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
10MIL
PC68
PC68
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
10MIL
PC69
PC69
0.1U_0402_25V6
0.1U_0402_25V6
2
a. GP0: EN_5V_CP b. GP2: EN_SOC c. GP6: EN_3V3_SYS d. GP7: EN_DDR (Optional on Cardhu S since we are using VDD2 for memory) e. GP8: EN_5V0
12
PC64
PC64
22P_0402_50V8J
22P_0402_50V8J
TP_PMU_GPIO8
PMU_CLK_32K <7>
TP6 PADTP6 PAD
VDD_1V8_GEN
B+
VDD_1V8_PMU_VRTC
1.8V
0.05A
VDD_0V85_PMU_VREF
0.85V
0.05A
VDD_1V8_PMU_VRTC
12
PR77
PR77
@
@
TP7
TP7 PAD
PAD
PR134
@ PR134
@
1 2
100K_0402_5%
100K_0402_5%
12
PC65
PC65 1U_0402_6.3V6K
1U_0402_6.3V6K
Always on
100K_0201_1%
100K_0201_1%
Follow ACER circuit 6/22
PR78
PR78
100K_0201_1%
100K_0201_1%
12
EN_5V0_BUCKBOOST <13, 28>
PMU_RESET_OUT_1V8# <7>
VDD_1V8_GEN
1
VDD_5V0_SBY
PR80
PR80
100K_0201_1%
100K_0201_1%
12
EN_VDD_SOC <34>
EN_3V3_SYS <28>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
5
4
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PMU part1
PMU part1
PMU part1
Picasso II/M
Picasso II/M
Picasso II/M
1
32 38Tuesday, January 17, 2012
32 38Tuesday, January 17, 2012
32 38Tuesday, January 17, 2012
1.0
1.0
1.0
Page 33
5
PMU-TPS65911 2/3
4
3
2
1
D D
+3VS
B+
C C
12
PC70
PC70
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
12
PC73
PC73
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
B+
5V
0.2A
B B
VDD_1V8_GEN VDD_PMU_LDO6
12
PC76
PC76
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
12
30MIL
PC78
PC78
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
PU7B
PU7B
N5
VCC6
D8
VCC5
L1
VCC4
N3
VCC3
Note: LDO1 & L DO2 need 4.7uF cap accordin g to TI on Jul y 6th
N6
LDO1
N4
LDO2
E7
LDO3
C8
LDO4
K1
LDO5
M2
LDO6
M3
LDO7
M1
LDO8
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
VDD_PMU_LDO2
VDD_PMU_LDO4
PC74
PC74
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
12
PC77
PC77
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
VDD_PMU_LDO6
VDD_PMU_LDO7
VDD_PMU_LDO8
12
PC79
PC79
30MIL
12
20MIL
12
20MIL
VDD_PMU_LDO2
PC71
PC71
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
VDD_PMU_LDO8
1.0V
0.02A
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
VDD_PMU_LDO1
3V
0.2A
VDD_PMU_LDO4
1.2V
0.1A
PR110
PR110
1 2
0_0402_5%
0_0402_5%
10MIL
PC80
PC80
12
VDD_PMU_LDO3
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
12
PC72
PC72 1U_0402_6.3V6K
1U_0402_6.3V6K
30MIL
12
PC75
PC75
VDD_PMU_LDO5
VDD_PMU_LDO7
1.2V
0.05A
PC81
PC81
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
12
PC122
PC122 1M_0402_5%
1M_0402_5%
VDD_PMU_LDO3
2.8V
0.2A
10MIL
12
VDD_PMU_LDO1
3V
0.2A
1.2V
0.1A
2.85V
0.5A
PTPS659110A2ZRCR_BGA98
PTPS659110A2ZRCR_BGA98
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
5
4
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PMU part2
PMU part2
PMU part2
Picasso II/M
Picasso II/M
Picasso II/M
1
33 38Tuesday, January 17, 2012
33 38Tuesday, January 17, 2012
33 38Tuesday, January 17, 2012
1.0
1.0
1.0
Page 34
5
PMU-TPS65911 3/3
PU7C
D D
B+
20MIL
12
12
PC86
PC86
PC108
PC108
0.1U_0402_25V6
0.1U_0402_25V6
10U_0603_6.3V6M
10U_0603_6.3V6M
B+
30MIL
12
12
PC87
PC87
PC90
PC90
10U_0603_6.3V6M
10U_0603_6.3V6M
C C
0.1U_0402_25V6
0.1U_0402_25V6
PU7C
E1
VCCA1
F2
VCCA2
F3
VCCA3
G2
VCCBB1
G1
VCCB2
4
SWA1 SWA2 SWA3
GNDSWA1 GNDSWA2 GNDSWA3
VFB1
SWB1
SWB2
GNDSWB1
GNDSWB2
VFB2
3
B+
PC82
PC82
10U_0603_6.3V6M
PR102
PR102
100K_0201_5%
100K_0201_5%
EN_VDD_SOC<32>
1 2
VDD_1V8_GEN
VDD_1V2_MEM
1.2V
2A
10U_0603_6.3V6M
PR101
PR101 100K_0201_5%
100K_0201_5%
EN_5V_CHARGEPUMP<29,32>
D2 D1 E2
C2 C1 D3
D4
2.2UH_VLS252012T-2R2M1R3_1.8A_20%
2.2UH_VLS252012T-2R2M1R3_1.8A_20% PL13
H2
H1
J2
J1
PMU_VFB2
K2
1.2V
50MIL
2A
1 2
50OHM_NETCLASS1
PL13
12
PR108
PR108
0_0402_5%
0_0402_5%
50MIL
1
12
PC91
PC91
PC102
PC102
2
0.1U_0402_25V6
0.1U_0402_25V6
10U_0603_6.3V6M
10U_0603_6.3V6M
12
1 2
PC88
PC88
12
0.1U_0402_25V6
0.1U_0402_25V6
2
FOR VDD_1V2_CORE_TEGRA
1
PC83
PC83
0.1U_0402_25V6
0.1U_0402_25V6
2
PR104 0_0201_5%PR104 0_0201_5%
PWR_I2C_SDA <7,10,14,15,26,32>
1 2 1 2
PWR_I2C_SCL <7,10,14,15,26,32>
PR106 0_0201_5%PR106 0_0201_5%
PU8
PU8
A4
VIN
A1
AVIN
B2
EN
D1
SENSE+
VDD
D2
SENSE -
SDA
D3
SCL
C2
VSEL0
A3
VSEL1
PGND PGND
A2
PGND
AGND
TPS62361YZHR_XBGA16
TPS62361YZHR_XBGA16
TPS62361B TPS62361YZHR_XBGA16
B3
SW
B4
SW
B1
C1
D4 C3 C4
TPS62361_SWTPS62361_SW
2.2UH_PCMB041B-2R2MS_2.75A_20%
2.2UH_PCMB041B-2R2MS_2.75A_20%
Close to CPU
1
PL11
PL11
1 2
VDD_1V2_SOC
Ipeak =2.5A( 6 us) Imax = 1.8A(60 us) sustained
VDD_1V2_SOC
12
PC85
PC85
PC84
PC84
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
12
2
PC100
PC100
12
12
PC112
PC112
PC111
PC111
0.1U_0402_25V6
0.1U_0402_25V6
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
VDD_5V0_SBY
PC92
A5
V5IN
1
12
PC93
PC93
1U_0402_16V6K
1U_0402_16V6K
B B
4.5 ~ 6.5V
PC107
PC107
2
0.1U_0402_25V6
0.1U_0402_25V6
A8
GNDC1
A7
GNDC2
VBST
DRVH
DRVL
VOUT
PGOOD
TRAN
A2
A3
A4
SW
A6
B4
C5
VFB
C4
D5
EN
C6
B3
TRIP
PMU_VBST
PMU_DRVH
PMU_SW
PMU_DRVL
PMU_VOUT
PMU_PGOOD
PMU_TRIP
PC92
1 2
0.1U_0402_25V6
0.1U_0402_25V6
PR109
PR109
1 2
0_0402_5%
0_0402_5%
1 2
PR111
PR111
90.9K_0402_1%
90.9K_0402_1%
PMU_DRVH_R
TP8PAD TP8PAD
4
3
2
D1
D1
D1
D110D2/S1
S2
S2
S2
6
7
5
PMU_DRVH_R
1
G1
PMU_SW
9
G2
FDMC7200_POWER33-8-10
FDMC7200_POWER33-8-10
8
PQ16
PQ16
PMU_DRVL
PC97
PC97
1 2
330P_0402_50V7K
330P_0402_50V7K
12
12
PC95
PC95
PC94
PC94
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
PL14
PL14
2.2UH_MMD-06AE-2R2M-M1L_6A_20%
2.2UH_MMD-06AE-2R2M-M1L_6A_20%
1 2
12
PR121
PR121
0_0402_5%
0_0402_5%
50OHM_NETCLASS1
B+
1
PC103
PC103
2
0.1U_0402_25V6
0.1U_0402_25V6
Tj<90 degree = =>6.1A Tj<70 degree = =>5.1A
200MIL
Change C_B3 footprint
1V
8A
1
1
+
+
PC96
PC96
PC104
PC104
2
2
@
@
0.1U_0402_25V6
0.1U_0402_25V6
X76 control X76376BOL11: NEC 220U_R35*2 X76376BOL12: NEC 220U_R70*2+Sanyo 100U_R45*1
1
1
+
+
+
+
2
220U_A_2.5VM_R35M
220U_A_2.5VM_R35M
PC123
PC123
PC109
PC109
2
@
@
@
@
150U_B_6.3VM_R35M
150U_B_6.3VM_R35M
220U_A_2.5VM_R35M
220U_A_2.5VM_R35M
ZZZ
ZZZ X76376BOL11
X76376BOL11
VDD_1V0_GEN
B+
2.2UH_VLS252012T-2R2M1R3_1.8A_20%
2.2UH_VLS252012T-2R2M1R3_1.8A_20% PL15
L8
VCCIO1
1
12
PC98
PC98
PC106
PC106
2
10U_0603_6.3V6M
A A
10U_0603_6.3V6M
5
L7
VCCIO2
0.1U_0402_25V6
0.1U_0402_25V6
PTPS659110A2ZRCR_BGA98
PTPS659110A2ZRCR_BGA98
4
SWIO1
SWIO2
GNDIO1
GNDIO2
VFBIO
PMU_SWIO
K8
K7
J7
J8
H8
PL15
1 2
50OHM_NETCLASS1
PR122
PR122
0_0402_5%
0_0402_5%
50MIL
12
12
PC99
PC99
10U_0603_6.3V6M
10U_0603_6.3V6M
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .
3
VDD_1V8_GEN
1.8V
2A
1
PC105
PC105
2
0.1U_0402_25V6
0.1U_0402_25V6
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PMU part3
PMU part3
PMU part3
Picasso II/M
Picasso II/M
Picasso II/M
1
34 38Tuesday, January 17, 2012
34 38Tuesday, January 17, 2012
34 38Tuesday, January 17, 2012
1.0
1.0
1.0
Page 35
5
D D
CAM_LED _EN_NV<7>
CAM_LED _EN<17>
C C
CAM_I2C_S DA<6,17,26>
CAM_I2C_S CL<6,17,26>
4
0_0402_ 5%
0_0402_ 5%
PR118
P2@ P R118
P2@
1 2
1 2
PR117
@P R117
@
0_0201_ 5%
0_0201_ 5%
LED+<2 0>
B+
PC115
PC115 10U_080 5_25V6KP2@
10U_080 5_25V6KP2@
1 2
2.2UH_VL S252012T-2R2M 1R3_1.8A_20%
2.2UH_VL S252012T-2R2M 1R3_1.8A_20%
1 2
0_0201_ 5%
0_0201_ 5%
PL17
P2@PL17
P2@
1 2
P2@PR12 8
P2@
@ PR12 0
@
1 2
PR116
PR128 0_0201_ 5%
0_0201_ 5%
PR120 1M_0402 _1%
1M_0402 _1%
P2@PR1 16
P2@
12
PU9
PU9
A1
FLASH_SYNC
A2
VOUT
A3
SDA
B1
SW
B2
SW
B3
SCL
TPS6105 0YZGR_DSBGA12
TPS6105 0YZGR_DSBGA12
P2@
P2@
PGND
PGND
ENVM
AGND
LED
AVIN
3
2
1
+3VS
C1
C2
C3
D1
D2
D3
PC116
PC116
P2@
P2@
12
10U_0603_6.3V6M
10U_0603_6.3V6M
PR115
PR115
@
@
1 2
indicator for TPS61050
100K_0402_1%
100K_0402_1%
B+
LED- <20>
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/ 202011/06/ 20
2012/06/ 202011/06/ 20
2012/06/ 202011/06/ 20
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LED FLASH
LED FLASH
LED FLASH
Picasso II/M
Picasso II/M
Tuesday, January 17, 201 2
Tuesday, January 17, 201 2
Tuesday, January 17, 201 2
Picasso II/M
1.0
1.0
1.0
35
35
35
1
38
38
38
Page 36
5
4
3
2
1
Version change list (P.I.R. List)
Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem
Ripple un-stable
1
D D
2
3
4
GPIO only support 1.8V
5
6
C C
7
Loop stable for TPS63020
charger CP setting for adaptor protect
Net name error
Material version change
Use low Vth dual N TR
material change for common use
No support Acer USB, delete related control circuit
01
02
02
02
02
02 20110809
02 26
28 30
26
35
35
26
26
change PL5, PL9 from PCMB041B-2R2MS 2.75A to PCMB041B-1R5MS 3 A,
change PR9 form 0.01_1206_1% to 0.05_1206_1% change PR25 form 10K to 73.2K change PR20 form 3.83K to 21K Remove ACER USB setting circuit
change net name from VDD_1V8_SYS to VDD_1V8_GEN
change PQ16 from FDMC7200 2N POWER33-8 to FDMC7200S 2N POWER33-8
change PQ4,PQ6,PQ7,PQ21,PQ21 from DMN66D0LDW-7_SOT363 to SI1034CX
change PQ18 from BSS8402DW 1P/1N SOT363-6 to SI1553CDL-T1-GE3 1P/1N SC70-6
Delete PQ19, PR40, PR44, PR47, PR41.
20110806
20110809
20110809
20110809
20110809
20110809
EVT (QAJ70)
DVT (QAJ50)
DVT (QAJ50)
DVT (QAJ50)
DVT (QAJ50)
DVT (QAJ50)
DVT (QAJ50)
Back-to-back MOS can't
8
fully turn on
Charger will terminate The TTC pull high 100K will cause wrong
9
10
11
B B
Pre-charge circuit can't
12
work normally
Sub/B +5VS will drop to
13
under 4.75V
14
15
16
A A
17
5
The BATDRV# pull low 1K will cause ACDRV abnormal
voltage level
STAT pull high 100K can't drive TROrange LED can't turn off
Modify Battery OVP circuit to avoid AC turn off when Battery over discharge
Modify Pre-charge circuit
Modify +5VS voltage setting to 5.15V
TPS63020 add 33P on feedback resistor for loop stable
V_MINCARD_3V3 sequence
modify crystal cap
Add LED control circuit for wake up/boot define
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
02 26
02 26
02 26
02 26
02 26 20110816
02 28
02 28
30
02 30
02 32
02 26
Issued Date
Issued Date
Issued Date
3
Change PR16, PR12, PD4 to reserve
Change PR34 from 100K to 10K
Change PR36 from 100K to 10Kohm
Add PC118, PR144,PQ23. Delete PD7
Change PR86,PR92,PR93 to PNP 2SA1037K
Change PU3 to TPS61030, PR56 to 19.1K, PR55 to 2.05K
Add PC113, PC114 33P
Change PR65 from 1M_0402_1% to 100K_0402_1% Add PC1006 1U_04 02_6.3V6K
Change PC63, PC64 from 12P_0402_50V8J to 22P_0402_50V8J
Add PQ22 to turn off O_LED
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
2
20110809
20110809
20110809
20110809
20110824
20110824
20110824
20110825
20110825
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PIR
PIR
PIR
Picasso II/M
Picasso II/M
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso II/M
DVT (QAJ50)
DVT (QAJ50)
DVT (QAJ50)
DVT (QAJ50)
DVT (QAJ50)
DVT (QAJ50)
DVT (QAJ50)
DVT (QAJ70)
DVT (QAJ70)
DVT (QAJ70)
1
1.0
1.0
36
36
36
1.0
38
38
38
Page 37
5
4
3
2
1
Version change list (P.I.R. List)
Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem
1
D D
Add for pre-charge and fast charge timeout
02 27
Add PQ19 ,PR44,PR47
20110826
DVT (QAJ70)
2
3
4
5
6
C C
7
8
9
10
11
B B
12
13
14
VBUS leakage
15
16
A A
17
BOM control
footprint control
Change CP setting for adaptor protect
Add VDD_1V0_GEN and VDD_1V8_GEN Fb resistor for test request
EMI request
Cancel the function
Reserve the CP control for thermal improve
Dock in CP setting
Solve White LED flash issue when AC plug in
Battery OTP change to 55C
remove pre-charge function
solve leakage current
Thermal over temperature
PQ1 will turn on when AC plug out
OTP change to 58C
Modify battery OVP to 4.4V
02 27,31
02 34,35
02 27
02 34
2703
03 27
03 27
2703 20110920
03 27
03 27
03
03
27,31
2804
04
26,27
04 27
04 27
Modify PD1, PD5, PD8 from SS3P4-M3-84A_SMP2 to SBR3U40P1
Modify PL13, PL15, PL17 footprint to TOKO_1239AS-H-2R2N-P2_2P
Add PQ23
Add PR121, PR122
Change PL1 to 300ohm bead, add PC120, PR11, PC15, PC20, PR98, PC1,PC2 for EMI request
Delete PR12, PR16, PD4
Add PR48, PQ24 for reserve
Add PQ26 PR93 PR96 PR124 PR123 PR40
Add PD4,PC121,PR126,PR127,PQ27
Change PR29 to 2.74K, PR30 to 8.87K
Reserved PU18, PQ9, PR7, PR61, PR79, PR86, PR41
Change PD1,PD5,PD8 from SBR3U40 to SS3P4; PR62, PR114 to 806K
Change PC39 to 100U_B3_6.3VM_R45
Change PC6, PC7 to 0.22U. Add PC89 2.2U
Change PR29 to 2.43K, PR30 to 7.68K
Change PR67 to 38.3K
20110826
20110826
20110826
20110826
20110920
20110920
20110920
20110920
20110920
20111006
20111006
20111027
20111027
20111027
20111105
DVT (QAJ70)
DVT (QAJ70)
DVT (QAJ70)
DVT (QAJ70) DVT2 (QAJ50)
DVT2 (QAJ50)
DVT2 (QAJ50)
DVT2 (QAJ50)
DVT2 (QAJ50)
DVT2 (QAJ50)
DVT2 (QAJ50) DVT2 (QAJ50)
DVT2 (QAJ70)
PVT (QAJ50)
PVT (QAJ50)
PVT (QAJ50)
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
27
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PIR
PIR
PIR
Picasso II/M
Picasso II/M
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso II/M
1.0
1.0
37
37
37
1
1.0
38
38
38
Page 38
5
4
3
2
1
Version change list (P.I.R. List)
Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem
1
D D
White LED can't light
2
when power on
3
Battery can't be charged
4
when dock in
T30S WAKE_UP_ACIN damage
5
6
C C
7
8
Turn off charge LED when USB in
Don't need the component
Adjust CP setting when power on for thermal issue
Modify the battery capacity control for EN_USB_HOST to BATT_LEARN
Avoid WAKE_UP_ACIN in-rush voltage
Modify charge output voltage to improve battery capacity
Avoid white LED will flash 1s when AC/USB plug in/out
Modify crystal cap value
04 27
04 27
04 27
04 27
04 27
04 27
04 27
04 32
Add PQ29, PC126, PC127
Change PR45 to reserve
Add PQ22, PR132, PR135
Add PR1012, change P135 to 4.99K
Add PR136, PR131
Change PR35 to 82K and PR31 to 82.5K
Change PD4 to reserve, Add PR1013, PR126, PC124
Change PC63, PC64 to 22P
20111210
20111210
20111210
20111210
20111210
20111210
20111210
20111210
PVT (QAJ50)
PVT (QAJ50)
PVT (QAJ50)
PVT (QAJ50)
PVT (QAJ50)
PVT (QAJ50)
PVT (QAJ50)
PVT (QAJ50)
PVT (QAJ50)
PVT (QAJ50)
10
EMMC voltage drop
9
PMIC LDO1 compensation
Avoid EMMC external LDO floating
04 33
3304
Change PC72 to 1U
Add PC122 1M
20111210
20111219
11
B B
12
13
14
15
16
A A
17
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2012/06/202011/06/20
2012/06/202011/06/20
2012/06/202011/06/20
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PIR
PIR
PIR
Picasso II/M
Picasso II/M
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Tuesday, January 17, 2012
Picasso II/M
1.0
1.0
38
38
38
1
1.0
38
38
38
Page 39
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