Compal LA-8291 Schematics
1
2
3
4
5
A
A
Compal Confidential
Schematics Document
B
Intel
U3CR
C
LA-8291
B
C
2012-02-20
REV:0.30
D
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
2
3
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
4
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Cover Sheet
Cover Sheet
Cover Sheet
LA-8291
LA-8291
LA-8291
5
1 58Monday, February 20, 2012
of
1 58Monday, February 20, 2012
of
1 58Monday, February 20, 2012
of
D
0.3
0.3
0.3
1
Compal Confidential
2
3
4
5
A
B
10/100/1000 LAN
Intel Lewisville GbE
C
AMT: 82579-LM
w/o AMT: 82579-V
+3VM_LAN, +1.0VM_LAN
port 0, 1
PHY
USB3.0 conn x 2
Page 25
Fan Control
WLAN Card
WLAN + PCIe x1
Page 33
Page 32
port 2 port 5port 6
Page 27
LCD conn
CRT
HDMI
USB3.0
Page 20
Page 20
Page 21
Re-Driver
Card Bus
RICOH R5U242
PCMCIA
LVDS, EDID, DISPOFF#, PWM
RGB, HV Sync, DDC
HDMI, DDC
USB3.0
Page 32
PCI-e BUS
Page 22, 23
U3CR
Mobile
Sandy Bridge: Cel-DC Processor
Ivy Bridge: Dual core Core i/ Cel-DC
rPGA 988B Socket
+VCC_CORE, +VCCP, +VCC_GFXCORE _AVG,
+1.5V_CPU_VDDQ, +1.8VS, _VCCSA
FDI x8
(UMA)
100MHz
2.7GT/s
Intel
Panther Point
PCH
AMT: QM77
w/o AMT: HM75
FCBGA 989 Balls
+1.05VS, +1.8VS, +3VS, +1.05VM ,
+3VM, +VCCP, +3V_PCH, +5V_PCH,
+RTCVCC, +VCCAFDI_VRM
LPC BUS
Page 4 ~ 9
DMI x4
100MHz
5GB/s
Page 13 ~ 19
DDR3 1600/1333MHz 1.5V
Dual Channel
USB2.0
Azalia
SATA
SPI
port 10
port 2
port 1
port 0
DDR3-SO-DIMM X 2
BANK 0, 1, 2, 3
+1.5V, +0.75VS
Page 10, 11
USB conn x 5
Page 31 ~ 32
Felica
Audio CKT
RT ALC269-VC
SATA ODD Connector
SATA Re-driver
TI SN75LVCP412RTJR
Page 31
Page 25
Page 28
Page 28
SSD Mini Card Connector
Page 27
SPI ROM 1
4MB / 8MB
Page 12
USB Board
SPI ROM 2
4MB
port 9, 12, 13
Audio Jack (HP)
Audio Jack (MIC)
Speaker Connector
2.5" SATA HDD Connector
Page 12
A
B
Page 25
Page 28
C
RJ45 CONN
TPM1.2
SLB 9635 TT
TPM Board DSUB Board
D
Page 26 page 29
Touch Pad CONN.
ENE KBC 9012/930
+3VALW
Int. KBD
Page 30Page 30
Human Sensor
CAPELLA CM3633A3OP-AD
SPI ROM
256KB
1
2
Page 33
3
SMSC Super I/O
LPC47N217N
Serial
Port
page 20
www.schematic-x.blogspot.com
Page 30
Human Sensor Board
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
4
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DC/DC Interface CKT.
Page 34
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Block Diagram
Block Diagram
Block Diagram
LA-8291
LA-8291
LA-8291
5
2 58Monday, February 20, 2012
of
2 58Monday, February 20, 2012
of
2 58Monday, February 20, 2012
of
D
0.3
0.3
0.3
Voltage Rails
1
( O MEANS ON X MEANS OFF )
State
S3 / DC & no WOL
S3 / DC & WOL
S3 / AC & PP1 & no WOL
S3 / AC & PP1 & WOL
S3 / AC & PP2(M3)
S3 / AC & PP2(Moff)
S4 S5 / DC & no WOL
S4 S5 / DC & WOL
A
S4 S5 / AC & PP1 & no WOL
S4 S5 / AC & PP1 & WOL
S4 S5 / AC & PP2(M3)
S4 S5 / AC & PP2(Moff)
S5 S4/AC & Battery
don't exist
SMBUS Control Table
SMB_EC_DA1
SMB_EC_DA2
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK
SML1DATA
S0
power
plane
SOURCE BATT
ECSMB_EC_CK1
ECSMB_EC_CK2
PCH
PCH
PCH
+RTCVCC
+B
+3VL
+5VALW
+3VALW
+3V_PCH
O OO
OO
O O
O O O
O
O
O
O O
O
O
O
O
O
O
O
Charger
V V V
X X X X X X
O
O
O
O
O
O
O
O
X
O
PCH
O
O
O
O O
X
SODIMM
O
O
O
O
X
Human
Sensor
X X X X
V
+1.05VM_LAN
+3VM
(SLP_LAN#) (SLP_A#)
O
O
X
O
O
O
O
O
X
OO
O
O
O
X
LAN CHIP
O
X
O
O
O
X
O
X
O
O
O
X
EC-KB930
/EC-KB9012
V
X X X X X X
V
X X X X X X
+1.05VM
O
X
X
X
X
O
X
X
X
X
X
O
X
X
+1.5V
+3V
O O
O
O
O
O
O
O
X
X
X
X
X
X
X X
+5VS
+3VS
+1.5VS
+VCC_GFXCORE
+VCCP
+CPU_CORE
+1.8VS
+1.05VS
+0.75VS
+VCCSA
X
X
X
X
X
X
X
X
X
X
X
X
Symbol Note :
: means Digital Ground
: means Analog Ground
Install below 45 level BOM structure for ver. 0.1
45@ : means just put it in the BOM of 45 level.
Install below 43 level BOM structure for ver. 0.10
VD: VD@+USB3@+KB@
VD: VD@+USB3@+KB@+ROM2@
VD/10key: VD@+USB3@+10KB@
VD/10key: VD@+USB3@+10KB@+ROM2@
VX: VX@+K B@
VX/10key: VX@ +10KB @
item 27
@ : means just reserve , no build
CONN@ : means ME part.
A
Board ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID
XXXXXX
V
100K +/- 5%Ra / Rc
0
1
2
3
4
5
6
7
Rb / Rd V min
0
3.3K +/- 5%
6.8K +/- 5%
10K +/- 5%
15K +/- 5%
20K +/- 5%
47K +/- 5% 0.935V 1.055 V 1.184 V
AD_BID
0 V
0.0908 V 0.1054 V 0.121 V
0.1817 V
0.2601 V
0.3746 V
0.4974 V 0.55 V 0.6076 V
V typ
AD_BID
0 V 0 V
0.2101 V
0.3 V
0.4304 V 0.4927 V
V
AD_BID
0.2422 V
0.3448 V
max
0x08
0x10
0x17
0x21
0x2A
0x3F
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Notes List
Notes List
Notes List
LA-8291
LA-8291
LA-8291
3 58Monday, February 20, 2012
of
3 58Monday, February 20, 2012
of
3 58Monday, February 20, 2012
of
0.3
0.3
0.3
5
4
3
2
JCPU1I
JCPU1I
1
T35
M34
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
H33
VSS205
H30
VSS206
H27
VSS207
H24
VSS208
H21
VSS209
H18
VSS210
H15
VSS211
H13
VSS212
H10
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
G35
VSS223
G32
VSS224
G29
VSS225
G26
VSS226
G23
VSS227
G20
VSS228
G17
VSS229
G11
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
VSS
VSS
JCPU1A
D
DMI_CRX_PTX_N014
DMI_CRX_PTX_N114
DMI_CRX_PTX_N214
DMI_CRX_PTX_N314
DMI_CRX_PTX_P014
DMI_CRX_PTX_P114
DMI_CRX_PTX_P214
DMI_CRX_PTX_P314
DMI_CTX_PRX_N014
DMI_CTX_PRX_N114
DMI_CTX_PRX_N214
DMI_CTX_PRX_N314
DMI_CTX_PRX_P014
DMI_CTX_PRX_P114
DMI_CTX_PRX_P214
DMI_CTX_PRX_P314
FDI_CTX_PRX_N014
FDI_CTX_PRX_N114
FDI_CTX_PRX_N214
FDI_CTX_PRX_N314
FDI_CTX_PRX_N414
FDI_CTX_PRX_N514
C
B
FDI_CTX_PRX_N614
FDI_CTX_PRX_N714
FDI_CTX_PRX_P014
FDI_CTX_PRX_P114
FDI_CTX_PRX_P214
FDI_CTX_PRX_P314
FDI_CTX_PRX_P414
FDI_CTX_PRX_P514
FDI_CTX_PRX_P614
FDI_CTX_PRX_P714
FDI_FSYNC014
FDI_FSYNC114
FDI_INT14
FDI_LSYNC014
FDI_LSYNC114
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
EDP_COMP
JCPU1A
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD#
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
PEG_COMP
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
J22
J21
H22
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
D
C
B
+VCCP
1
RC1
A
eDP_COMPIO and ICOMPO signals should be shor ted near
balls and route d with typical impedance <25 mohms
RC1
24.9_0402_1%
24.9_0402_1%
2
5
EDP_COMP
+VCCP
1
RC2
RC2
24.9_0402_1%
24.9_0402_1%
2
PEG_COMP
PEG_ICOMPI and RCOMPO signals should be shor ted and routed
with - max leng th = 500 mils - typical imped ance = 43 mohm s
PEG_ICOMPO sign als should be routed with - m ax length = 50 0 mils
- typical imped ance = 14.5 mo hms
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
A
Compal Secret Data
Compal Secret Data
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
3
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PROCESSOR(1/6) DMI,FDI,PEG
PROCESSOR(1/6) DMI,FDI,PEG
PROCESSOR(1/6) DMI,FDI,PEG
LA-8291
LA-8291
LA-8291
1
4 58Monday, February 20, 2012
of
4 58Monday, February 20, 2012
of
4 58Monday, February 20, 2012
of
0.3
0.3
0.3
5
4
3
2
1
Item 48
RC58
D
C
JCPU1B
JCPU1B
CLK_CPU_DMI
A28
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
MISC
MISC
BCLK
BCLK#
PRDY#
PREQ#
TRST#
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
H_SNB_IVB#16
RC57
RC57
2
RC22
RC22
2
0_0402_5%
0_0402_5%
RC25
RC25
2
0_0402_5%
0_0402_5%
RC28
RC28
2
130_0402_1%
130_0402_1%
H_CATERR#
H_PROCHOT#_R
H_THRMTRIP#
H_PM_SYNC_R
H_CPUPWRGD_R
VDDPWRGOOD_R
BUF_CPU_RST#
T137PAD~D @
T137PAD~D @
H_PECI16,29
B
A
H_PROCHOT#29,37,45
TBD check power team
H_THRMTRIP#16
H_PM_SYNC14
H_CPUPWRGD16
VDDPWRGOOD
1
56_0402_5%
56_0402_5%
1
1
1
C26
PROC_SELECT#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWR OK
AR33
RESET#
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
CLOCKS
CLOCKS
DDR3
DDR3
JTAG & BPM
JTAG & BPM
TCK
TMS
TDO
TDI
CLK_CPU_DMI#
A27
CLK_CPU_DPLL_R
A16
CLK_CPU_DPLL#_R
A15
H_DRAMRST#
R8
SM_RCOMP0
AK1
SM_RCOMP1
A5
SM_RCOMP2
A4
AP29
AP27
XDP_TCK
AR26
XDP_TMS
AR27
XDP_TRST#
AP30
AR28
AP26
XDP_DBRESET#_R
AL35
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
PM_DRAM_PWR GD14
XDP_TDI
XDP_TDO
SYSTEM_PWROK14,29
Item 126
Item 48
Item 112
+3V_PCH
H_DRAMRST# 6
RC26
RC26
1
0_0402_5%
0_0402_5%
RC18
RC18
1
200_0402_1%
200_0402_1%
CLK_CPU_DMI 13
CLK_CPU_DMI# 13
H_PROCHOT#
2
RC58
2
1
0_0402_5%
0_0402_5%
2
2
1
RC125 0_0402_5%
RC125 0_0402_5%
RUN_ON_CPU1.5VS3#9,34
DDR3 Compensation Signals
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
Processor Pullups
RC44 62_0402_5%
RC44 62_0402_5%
1
XDP_DBRESET#
D_PWG
+3V_PCH
S_PWG
2
B
1
A
RUN_ON_CPU1.5VS3#
RC42 140_0402_1%
RC42 140_0402_1%
RC43 25.5_0402_1%
RC43 25.5_0402_1%
RC45 200_0402_1%
RC45 200_0402_1%
2
XDP_DBRESET# 14
Item 63
1
RC62
RC62
0_0402_5%
0_0402_5%
2
0.1U_0402_16V7K
0.1U_0402_16V7K
1
CC156
CC156
2
5
UC1
UC1
P
4
Y
G
74AHC1G09GW TSSOP 5P
74AHC1G09GW TSSOP 5P
3
2
1
2
1
2
1
RC19 50 to 5k Intel Recommend
+VCCP
XDP_DBRESET#
H_CPUPWRGD_R
2
G
G
+1.5V_CPU_VDDQ
1
RC12
RC12
200_0402_1%
200_0402_1%
2
VDDPWRGOOD
2
@
@
RC64
RC64
39_0402_1%
39_0402_1%
1
1
D
D
@
@
QC1
QC1
2N7002_SOT23
2N7002_SOT23
S
S
3
PLT_RST#15,22,24,26,27,29
RC19 1K_0402_5%
RC19 1K_0402_5%
RC21 10K_0402_5%
RC21 10K_0402_5%
Item 112
Item 126
RC12
CRB 1.1K
CHECK LIST 0.7 --> 4.75K
INTEL recommand 1.1K
PDG 0.71 rev -->200
CLK_CPU_DPLL#_R
CLK_CPU_DPLL_R
2
1
2
1
+3VS
CC140
CC140
2
1
0.1U_0402_16V7K
0.1U_0402_16V7K
5
1
UC2
UC2
P
BUFO_CPU_RST#
2
RC17 1K_0402_1%
RC17 1K_0402_1%
RC16 1K_0402_1%
RC16 1K_0402_1%
+3VS
4
NC
Y
A
G
SN74LVC1G07DCKR_SC70-5
SN74LVC1G07DCKR_SC70-5
3
2
1
2
1
+VCCP
Item 112
Item 126
1
RC4
RC4
200_0402_1%
200_0402_1%
2
RC10
RC10
BUF_CPU_RST#
2
1
43_0402_1%
43_0402_1%
1
2
+VCCP
PU/PD for JTAG signals
XDP_TMS
XDP_TDI
XDP_TDO
XDP_TCK
XDP_TRST#
RC27 51_0402_5%
RC27 51_0402_5%
RC29 51_0402_5%
RC29 51_0402_5%
RC35 51_0402_5%
RC35 51_0402_5%
RC40 51_0402_5%
RC40 51_0402_5%
RC41 51_0402_5%
RC41 51_0402_5%
2
1
2
1
2
1
2
1
2
1
@
@
RC11
RC11
0_0402_5%
0_0402_5%
D
C
B
+VCCP
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PROCESSOR(2/6) PM,XDP,CLK
PROCESSOR(2/6) PM,XDP,CLK
PROCESSOR(2/6) PM,XDP,CLK
LA-8291
LA-8291
LA-8291
1
5 58Monday, February 20, 2012
of
5 58Monday, February 20, 2012
of
5 58Monday, February 20, 2012
of
0.3
0.3
0.3
3
DDR_B_D[0..63]11
DDR_B_BS011
DDR_B_BS111
DDR_B_BS211
DDR_B_CAS#11
DDR_B_RAS#11
DDR_B_WE#11
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
SA_CK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
4
AB6
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
M_CLK_DDR0 10
M_CLK_DDR#0 10
DDR_CKE0_DIMMA 10
M_CLK_DDR1 10
M_CLK_DDR#1 10
DDR_CKE1_DIMMA 10
DDR_CS0_DIMMA# 10
DDR_CS1_DIMMA# 10
M_ODT0 10
M_ODT1 10
DDR_A_DQS#[0..7] 10
DDR_A_DQS[0..7] 10
DDR_A_MA[0..15] 10
5
JCPU1C
JCPU1C
DDR_A_D[0..63]10
D
C
B
DDR_A_BS010
DDR_A_BS110
DDR_A_BS210
DDR_A_CAS#10
DDR_A_RAS#10
DDR_A_WE#10
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
C5
SA_DQ[0]
D5
SA_DQ[1]
D3
SA_DQ[2]
D2
SA_DQ[3]
D6
SA_DQ[4]
C6
SA_DQ[5]
C2
SA_DQ[6]
C3
SA_DQ[7]
F10
SA_DQ[8]
F8
SA_DQ[9]
G10
SA_DQ[10]
G9
SA_DQ[11]
F9
SA_DQ[12]
F7
SA_DQ[13]
G8
SA_DQ[14]
G7
SA_DQ[15]
K4
SA_DQ[16]
K5
SA_DQ[17]
K1
SA_DQ[18]
J1
SA_DQ[19]
J5
SA_DQ[20]
J4
SA_DQ[21]
J2
SA_DQ[22]
K2
SA_DQ[23]
M8
SA_DQ[24]
N10
SA_DQ[25]
N8
SA_DQ[26]
N7
SA_DQ[27]
M10
SA_DQ[28]
M9
SA_DQ[29]
N9
SA_DQ[30]
M7
SA_DQ[31]
AG6
SA_DQ[32]
AG5
SA_DQ[33]
AK6
SA_DQ[34]
AK5
SA_DQ[35]
AH5
SA_DQ[36]
AH6
SA_DQ[37]
AJ5
SA_DQ[38]
AJ6
SA_DQ[39]
AJ8
SA_DQ[40]
AK8
SA_DQ[41]
AJ9
SA_DQ[42]
AK9
SA_DQ[43]
AH8
SA_DQ[44]
AH9
SA_DQ[45]
AL9
SA_DQ[46]
AL8
SA_DQ[47]
AP11
SA_DQ[48]
AN11
SA_DQ[49]
AL12
SA_DQ[50]
AM12
SA_DQ[51]
AM11
SA_DQ[52]
AL11
SA_DQ[53]
AP12
SA_DQ[54]
AN12
SA_DQ[55]
AJ14
SA_DQ[56]
AH14
SA_DQ[57]
AL15
SA_DQ[58]
AK15
SA_DQ[59]
AL14
SA_DQ[60]
AK14
SA_DQ[61]
AJ15
SA_DQ[62]
AH15
SA_DQ[63]
AE10
SA_BS[0]
AF10
SA_BS[1]
V6
SA_BS[2]
AE8
SA_CAS#
AD9
SA_RAS#
AF9
SA_WE#
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
2
JCPU1D
JCPU1D
C9
SB_DQ[0]
A7
SB_DQ[1]
D10
SB_DQ[2]
C8
SB_DQ[3]
A9
SB_DQ[4]
A8
SB_DQ[5]
D9
SB_DQ[6]
D8
SB_DQ[7]
G4
SB_DQ[8]
F4
SB_DQ[9]
F1
SB_DQ[10]
G1
SB_DQ[11]
G5
SB_DQ[12]
F5
SB_DQ[13]
F2
SB_DQ[14]
G2
SB_DQ[15]
J7
SB_DQ[16]
J8
SB_DQ[17]
K10
SB_DQ[18]
K9
SB_DQ[19]
J9
SB_DQ[20]
J10
SB_DQ[21]
K8
SB_DQ[22]
K7
SB_DQ[23]
M5
SB_DQ[24]
N4
SB_DQ[25]
N2
SB_DQ[26]
N1
SB_DQ[27]
M4
SB_DQ[28]
N5
SB_DQ[29]
M2
SB_DQ[30]
M1
SB_DQ[31]
AM5
SB_DQ[32]
AM6
SB_DQ[33]
AR3
SB_DQ[34]
AP3
SB_DQ[35]
AN3
SB_DQ[36]
AN2
SB_DQ[37]
AN1
SB_DQ[38]
AP2
SB_DQ[39]
AP5
SB_DQ[40]
AN9
SB_DQ[41]
AT5
SB_DQ[42]
AT6
SB_DQ[43]
AP6
SB_DQ[44]
AN8
SB_DQ[45]
AR6
SB_DQ[46]
AR5
SB_DQ[47]
AR9
SB_DQ[48]
AJ11
SB_DQ[49]
AT8
SB_DQ[50]
AT9
SB_DQ[51]
AH11
SB_DQ[52]
AR8
SB_DQ[53]
AJ12
SB_DQ[54]
AH12
SB_DQ[55]
AT11
SB_DQ[56]
AN14
SB_DQ[57]
AR14
SB_DQ[58]
AT14
SB_DQ[59]
AT12
SB_DQ[60]
AN15
SB_DQ[61]
AR15
SB_DQ[62]
AT15
SB_DQ[63]
AA9
SB_BS[0]
AA7
SB_BS[1]
R6
SB_BS[2]
AA10
SB_CAS#
AB8
SB_RAS#
AB9
SB_WE#
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
AE2
SB_CK[0]
AD2
SB_CLK#[0]
R9
SB_CKE[0]
AE1
SB_CK[1]
AD1
SB_CLK#[1]
R10
SB_CKE[1]
AB2
SB_CK[2]
AA2
SB_CLK#[2]
T9
SB_CKE[2]
AA1
SB_CK[3]
AB1
SB_CLK#[3]
T10
SB_CKE[3]
AD3
SB_CS#[0]
AE3
SB_CS#[1]
AD6
SB_CS#[2]
AE6
SB_CS#[3]
AE4
SB_ODT[0]
AD4
SB_ODT[1]
AD5
SB_ODT[2]
AE5
SB_ODT[3]
DDR_B_DQS#0
D7
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
1
M_CLK_DDR2 11
M_CLK_DDR#2 11
DDR_CKE2_DIMMB 11
M_CLK_DDR3 11
M_CLK_DDR#3 11
DDR_CKE3_DIMMB 11
DDR_CS2_DIMMB# 11
DDR_CS3_DIMMB# 11
M_ODT2 11
M_ODT3 11
DDR_B_DQS#[0..7] 11
DDR_B_DQS[0..7] 11
DDR_B_MA[0..15] 11
D
C
B
+1.5V
1
RC49
@
@
2
1
RC48 0_0402_5%~D
RC48 0_0402_5%~D
QC2
QC2
BSS138_NL_SOT23-3
BSS138_NL_SOT23-3
D
S
D
RC50
RC50
4.99K_0402_1%
4.99K_0402_1%
S
3
G
G
2
1
2
DDR3_DRAMRST#_R
1
DRAMRST_CNTRL_PCH
CC177
CC177
0.047U_0402_16V7K
0.047U_0402_16V7K
H_DRAMRST#5
A
H_DRAMRST#
1
2
5
RC49
1K_0402_5%
1K_0402_5%
2
2
1
RC124 1K_0402_5%
RC124 1K_0402_5%
DG 0.7 Figure 57 RC124=1K
DRAMRST_CNTRL_PCH 10,11,13
4
DDR3_DRAMRST# 10,11
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PROCESSOR(3/6) DDRIII
PROCESSOR(3/6) DDRIII
PROCESSOR(3/6) DDRIII
LA-8291
LA-8291
LA-8291
1
6 58Monday, February 20, 2012
of
6 58Monday, February 20, 2012
of
6 58Monday, February 20, 2012
of
A
0.3
0.3
0.3
5
4
3
2
1
CFG Straps for Processor
D
JCPU1E
JCPU1E
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD37
RSVD38
RSVD39
RSVD40
RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
RSVD_NCTF5
RSVD_NCTF6
RSVD_NCTF7
RSVD_NCTF8
RSVD_NCTF9
RSVD51
RSVD52
BCLK_ITP
BCLK_ITP#
AH27
AH26
L7
AG7
AE7
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AN35
AM35
AT2
AT1
AR1
B1
KEY
Item 19
PEG Static Lane Reversal - CFG2 is for the 16x
Display Port Presence Strap
CFG4
PCIE Port Bifurcation Straps
CFG[6:5]
AK28
CFG[0]
AK29
CFG2
CFG4
CFG5
CFG6
2
1
+VCC_GFXCORE_AXG
2
@
@
RC122
RC122
50_0402_1%
50_0402_1%
1
VCC_AXG_VAL_SENSE
VCC_VAL_SENSE
TBD
VSS_AXG_VAL_SENSE
VSS_VAL_SENSE
+VCC_CORE
@
@
RC120
RC120
50_0402_1%
50_0402_1%
C
B
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
J15
RSVD27
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
VCC_DIE_SENSE
VSS_DIE_SENSE
CFG
CFG
RESERVED
RESERVED
RSVD_NCTF10
RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13
CFG2
1
RC51
@
RC51
@
1K_0402_1%~D
1K_0402_1%~D
2
1:(Default) Nor mal Operation; Lane #
CFG2
definition matc hes socket pin map definition
0:Lane Reversed
CFG4
1
RC82
@
RC82
@
1K_0402_1%
1K_0402_1%
2
1 : Disabled; N o Physical Dis play Port
attached to Emb edded Display Port
0 : Enabled; An external Disp lay Port device is
connected to th e Embedded Dis play Port
CFG6
CFG5
1
1
RC54
@
RC54
@
1K_0402_1%~D
1K_0402_1%~D
2
RC53
@
RC53
@
1K_0402_1%~D
1K_0402_1%~D
2
11: (Default) x 16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - De vice 1 functio n 1 enabled ; f unction 2
disabled
01: Reserved - (Device 1 func tion 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 funct ions 1 and 2 en abled
D
C
B
VSS_AXG_VAL_SENSE
VSS_VAL_SENSE
2
2
@
@
@
RC123
RC123
50_0402_1%
50_0402_1%
A
INTEL 12/28 rec ommand
to add RC120, R C121, RC122, R C123
Please place as close as JCPU 1
5
@
RC121
RC121
50_0402_1%
50_0402_1%
1
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
3
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PROCESSOR(4/6) RSVD,CFG
PROCESSOR(4/6) RSVD,CFG
PROCESSOR(4/6) RSVD,CFG
LA-8291
LA-8291
LA-8291
7 58Monday, February 20, 2012
7 58Monday, February 20, 2012
7 58Monday, February 20, 2012
1
of
of
of
A
0.3
0.3
0.3
5
4
JCPU1F
JCPU1F
3
POWER
POWER
2
1
+VCC_CORE
AG35
D
C
B
A
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
PEG AND DDR
PEG AND DDR
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VIDALERT#
VIDSCLK
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
SENSE LINES SVID
SENSE LINES SVID
VIDSOUT
CORE SUPPLY
CORE SUPPLY
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
8.5A53A
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
2
RC98
RC98
10_0402_1%
10_0402_1%
1
+VCCP
+VCCP
Place the PU
1
resistors close to CPU
RC63
RC63
130_0402_1%
130_0402_1%
2
RC61 43_0402_1%
RC61 43_0402_1%
1
RC59 0_0402_5%
RC59 0_0402_5%
1
RC65 0_0402_5%
RC65 0_0402_5%
1
RC102
RC102
2
1
10_0402_1%
10_0402_1%
+VCCP
Close to CPU
2
2
2
VCCIO_SENSE 41
VSSIO_SENSE 41
+VCCP
Place the PU
1
resistors close to CPU
RC60
RC60
75_0402_5%
75_0402_5%
2
+VCC_CORE
1
RC66
RC66
100_0402_1%
100_0402_1%
2
1
RC70
RC70
100_0402_1%
100_0402_1%
2
Close to CPU
VR_SVID_ALRT# 45
VCCSENSE 45
VSSSENSE 45
VR_SVID_CLK 45
VR_SVID_DAT 45
D
C
B
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PROCESSOR(5/6) PWR,BYPASS
PROCESSOR(5/6) PWR,BYPASS
PROCESSOR(5/6) PWR,BYPASS
LA-8291
LA-8291
LA-8291
8 58Monday, February 20, 2012
of
8 58Monday, February 20, 2012
of
8 58Monday, February 20, 2012
1
of
0.3
0.3
0.3
VSS
VSS
1
AJ22
VSS81
AJ19
VSS82
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
D
C
B
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
5
4
+1.5V_CPU_VDDQ Source
QC3
+5VALW
1
RC74
RC74
100K_0402_5%
100K_0402_5%
D
2
CPU1.5V_S3_GATE29
1
RC79 0_0402_5%
RC79 0_0402_5%
2
6
QC4A
QC4A
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
2
1
RUN_ON_CPU1.5VS3#
+5VALW
2
RC72
RC72
36.5K_0402_1%
36.5K_0402_1%
1
RUN_ON_CPU1.5VS3
3
QC4B
QC4B
5
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
4
RUN_ON_CPU1.5VS3# 5,34
+1.5V
QC3
AO4304L_SO8
AO4304L_SO8
8
7
6
5
10U_0805_4VAM
10U_0805_4VAM
4
2
CC136
CC136
2200P_0402_50V7K~N
2200P_0402_50V7K~N
1
<BOM Structure>
<BOM Structure>
NECP Recommend
+VCC_GFXCORE_AXG
C
B
+1.8VS
RC80
RC80
1
0_0805_5%
0_0805_5%
2
+1.8VS_VCCPLL
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0805_4VA
10U_0805_4VA
1
1
2
1
CC174
CC174
CC173
CC173
2
2
Item 51
330U_D2_2.5VM_LESR6M
330U_D2_2.5VM_LESR6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CC176
CC176
CC175
CC175
+
+
2
33A
1.2A
JCPU1G
JCPU1G
AT24
VAXG1
AT23
VAXG2
AT21
VAXG3
AT20
VAXG4
AT18
VAXG5
AT17
VAXG6
AR24
VAXG7
AR23
VAXG8
AR21
VAXG9
AR20
VAXG10
AR18
VAXG11
AR17
VAXG12
AP24
VAXG13
AP23
VAXG14
AP21
VAXG15
AP20
VAXG16
AP18
VAXG17
AP17
VAXG18
AN24
VAXG19
AN23
VAXG20
AN21
VAXG21
AN20
VAXG22
AN18
VAXG23
AN17
VAXG24
AM24
VAXG25
AM23
VAXG26
AM21
VAXG27
AM20
VAXG28
AM18
VAXG29
AM17
VAXG30
AL24
VAXG31
AL23
VAXG32
AL21
VAXG33
AL20
VAXG34
AL18
VAXG35
AL17
VAXG36
AK24
VAXG37
AK23
VAXG38
AK21
VAXG39
AK20
VAXG40
AK18
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
AJ21
VAXG45
AJ20
VAXG46
AJ18
VAXG47
AJ17
VAXG48
AH24
VAXG49
AH23
VAXG50
AH21
VAXG51
AH20
VAXG52
AH18
VAXG53
AH17
VAXG54
B6
VCCPLL1
A6
VCCPLL2
A2
VCCPLL3
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
POWER
POWER
SENSE
SENSE
GRAPHICS
GRAPHICS
1.8V RAIL
1.8V RAIL
VAXG_SENSE
VSSAXG_SENSE
LINES
LINES
SM_VREF
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
VREFMISC
VREFMISC
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VCCSA_SENSE
VCCSA_VID[0]
VCCSA_VID[1]
VCCIO_SEL
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
AK35
AK34
AL1
B4
D1
5A
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
M27
M26
L26
J26
J25
J24
H26
H25
H23
C22
C24
A19
+V_SM_VREF should
have 10 mil trace width
+V_SM_VREF_CNT
Item 51
6A
H_VCCP_SEL
3
Item 51
+1.5V_CPU_VDDQ
5A
1
2
3
CC135
CC135
1
1
RC73
RC73
20K_0402_5%
20K_0402_5%
2
2
resistors close to CPU
RC68 100_0402_1%
RC68 100_0402_1%
2
1
VCC_AXG_SENSE
VSS_AXG_SENSE
RC69 100_0402_1%
RC69 100_0402_1%
2
1
+V_DDR_CPU_REF0_R
+V_DDR_CPU_REF1_R
10U_0805_4VA
10U_0805_4VA
10U_0805_4VA
10U_0805_4VA
10U_0805_4VA
10U_0805_4VA
1
1
1
CC163
CC163
CC161
CC161
CC162
CC162
2
2
2
+VCCSA
10U_0805_4VA
10U_0805_4VA
10U_0805_4VA
10U_0805_4VA
1
1
@
@
CC169
CC169
CC168
CC168
2
2
1
@
RC55
RC55
2
0_0402_5%~D
0_0402_5%~D
@
@
1
@
0_0402_5%~D
0_0402_5%~D
2
10K_0402_5%
10K_0402_5%
H_VCCSA_VID0 44
H_VCCSA_VID1 44
Item 66
+VCC_GFXCORE_AXG
VCC_AXG_SENSE 45
VSS_AXG_SENSE 45
10U_0805_4VA
10U_0805_4VA
1
CC164
CC164
2
10U_0805_4VA
10U_0805_4VA
1
CC170
CC170
2
RC81
RC81
+3VS
1
RC71
RC71
@
@
2
AP2302GN-HF_SOT23-3
AP2302GN-HF_SOT23-3
RUN_ON_CPU1.5VS3
+1.5V_CPU_VDDQ
10U_0805_4VA
10U_0805_4VA
10U_0805_4VA
10U_0805_4VA
1
1
CC165
CC165
CC166
CC166
2
2
330U_D2_2VM_R6M
330U_D2_2VM_R6M
1
CC172
CC172
10U_0805_4VA
10U_0805_4VA
1
+
+
CC171
CC171
2
2
+VCCSA_SENSE 44
VCCP_PWRCTRL 41
1
CC151
CC151
2
330U_D2_2VM_R6M
330U_D2_2VM_R6M
1
CC167
CC167
+
+
2
Item 54
1
RC76 0_0402_5%@
RC76 0_0402_5%@
1
QC5
@
QC5
@
+1.5V_CPU_VDDQ
1
2
1
2
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
2
+1.5V
Item 54
2
3
2
RC126
RC126
1K_0402_5%
1K_0402_5%
RC127
RC127
1K_0402_5%
1K_0402_5%
1
PAD-OPEN 4x4m
PAD-OPEN 4x4m
SMT comment: keep open
Item 84
+VCCSA
+1.5V_CPU_VDDQ
1
2
+V_SM_VREF
1
2
+V_SM_VREF_CNT
PJP30
@
PJP30
@
2
CC149 0.1U_0402_16V7K
CC149 0.1U_0402_16V7K
2
CC150 0.1U_0402_16V7K
CC150 0.1U_0402_16V7K
2
CC178 0.1U_0402_16V7K
CC178 0.1U_0402_16V7K
2
CC179 0.1U_0402_16V7K
CC179 0.1U_0402_16V7K
2
RC118
RC118
1K_0402_5%
1K_0402_5%
@
@
RC119
RC119
1K_0402_5%
1K_0402_5%
@
@
1
1
1
1
+1.5V
JCPU1H
JCPU1H
AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
+1.5V
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
+V_DDR_CPU_REF0
+V_DDR_CPU_REF1
A
RC110 0_0402_5%
RC110 0_0402_5%
RC112 0_0402_5%
RC112 0_0402_5%
5
Item 54
1
2
1
RC97
RC97
1K_0402_1%
1K_0402_1%
@
@
2
+V_DDR_CPU_REF0_R
+V_DDR_CPU_REF1_R
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
PROCESSOR(6/6) PWR,VSS
PROCESSOR(6/6) PWR,VSS
PROCESSOR(6/6) PWR,VSS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-8291
LA-8291
LA-8291
Date: Sheet
Date: Sheet
Date: Sheet
9 58Monday, February 20, 2012
of
9 58Monday, February 20, 2012
of
9 58Monday, February 20, 2012
1
of
A
0.3
0.3
0.3
2
1
2
1
RC96
RC96
1K_0402_1%
1K_0402_1%
@
@
+1.5V
+V_DDR_CPU_REFA
@
@
1
1
RD7
RD7
1K_0402_1%
1K_0402_1%
2
1
RD8
RD8
1K_0402_1%
1K_0402_1%
2
+V_DDR_CPU_REF0
Item 54
CD45
CD45
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
DRAMRST_CNTRL_PCH 6,11,13
D
1
2
C
B
DDR_CKE1_DIMMA 6
M_CLK_DDR1 6
M_CLK_DDR#1 6
DDR_A_BS1 6
DDR_A_RAS# 6
DDR_CS0_DIMMA# 6
M_ODT0 6
M_ODT1 6
T68@
T68@
1
CD48
CD48
@
@
2
220P_0402_50V7K~N
220P_0402_50V7K~N
2
JDIMMA H=5.2
+VREF_CA
CD15
2.2U_0603_6.3V6K
CD15
2.2U_0603_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
1
2
Item 42
PCH_SMBDATA 11,13
PCH_SMBCLK 11,13
1
CD47
CD47
@
@
2
Close to pin200, 202
220P_0402_50V7K~N
220P_0402_50V7K~N
DDR3_DRAMRST# 6,11
+V_DDR_REFA
Item 54
CD16
CD16
1
2
RD15 0_0402_5%
RD15 0_0402_5%
M1 circuit
RD16 0_0402_5%
RD16 0_0402_5%
M3 circuit
+1.5V
1
RD9
RD9
1K_0402_1%
1K_0402_1%
2
1
RD10
RD10
1K_0402_1%
1K_0402_1%
2
+V_DDR_CPU_REFA
Item 54
1
1
BSS138_SOT23
BSS138_SOT23
D
D
1
2
2
S
S
3
QC7
QC7
G
G
2
5
DDR_A_DQS#[0..7]6
DDR_A_DQS[0..7]6
DDR_A_D[0..63]6
DDR_A_MA[0..15]6
D
Layout Note:
Place near JDIMM1
+1.5V
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD4
CD4
CD3
CD3
1
1
2
2
+1.5V
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
CD8
CD8
CD7
CD7
1
C
B
1
2
2
Layout Note:
Place near JDIMM1.203,204
+0.75VS
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD17
CD17
CD18
CD18
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD5
CD5
1
2
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
CD9
CD9
CD10
CD10
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD19
CD19
1
2
All VREF traces should
have 10 mil trace width
CD6
CD6
1
2
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
@
@
CD13
CD13
CD12
CD12
CD11
CD11
1
1
1
2
2
2
CD20
CD20
1
2
4
+V_DDR_REFA
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
CD1
CD1
CD2
CD2
1
1
2
2
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
DDR_CKE0_DIMMA6
DDR_A_BS26
Item 83
330U_D2_2VM_R6M
330U_D2_2VM_R6M
1
@
@
CD14
CD14
+
+
2
M_CLK_DDR06
M_CLK_DDR#06
DDR_A_BS06
DDR_A_WE#6
DDR_A_CAS#6
DDR_CS1_DIMMA#6
+3VS
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
CD21
CD21
1
1
2
2
+V_DDR_REFA
DDR_A_D0
DDR_A_D1
DDR_A_DM0
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_DM3
DDR_A_D26
DDR_A_D27
DDR_CKE0_DIMMA
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59
1
RD2 10K_0402_5%
RD2 10K_0402_5%
1
CD22
CD22
RD3 10K_0402_5%
RD3 10K_0402_5%
+0.75VS
3.56A
+1.5V
2
2
3
JDIMM1
JDIMM1
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
FOX_AS0A626-U2SN-7F_204P
FOX_AS0A626-U2SN-7F_204P
CONN@
CONN@
DQS0#
DQS0
DQ12
DQ13
RESET#
DQ14
DQ15
DQ20
DQ21
DQ22
DQ23
DQ28
DQ29
DQS3#
DQS3
DQ30
DQ31
CKE1
RAS#
ODT0
ODT1
VREF_CA
DQ36
DQ37
DQ38
DQ39
DQ44
DQ45
DQS5#
DQS5
DQ46
DQ47
DQ52
DQ53
DQ54
DQ55
DQ60
DQ61
DQS7#
DQS7
DQ62
DQ63
EVENT#
GND2
CK1#
+1.5V
2
VSS
DQ4
DQ5
VSS
VSS
DQ6
DQ7
VSS
VSS
DM1
VSS
VSS
VSS
DM2
VSS
VSS
VSS
VSS
VSS
VDD
A15
A14
VDD
A11
VDD
VDD
VDD
CK1
VDD
BA1
VDD
S0#
VDD
VDD
VSS
VSS
DM4
VSS
VSS
VSS
VSS
VSS
VSS
DM6
VSS
VSS
VSS
VSS
VSS
SDA
SCL
VTT
A7
A6
A4
A2
A0
NC
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
DDR_A_DM1
DDR3_DRAMRST#
DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_CKE1_DIMMA
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
PCH_SMBDATA
PCH_SMBCLK
+0.75VS
206
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Title
Title
Title
DDRIII DIMMA
DDRIII DIMMA
DDRIII DIMMA
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Custom
Custom
Custom
LA-8291
LA-8291
LA-8291
Date: Sheet
Date: Sheet
2
Date: Sheet
10 58Monday, February 20, 2012
10 58Monday, February 20, 2012
10 58Monday, February 20, 2012
1
A
0.3
0.3
0.3
of
of
of
RD13
RD13
1K_0402_1%
1K_0402_1%
RD14
RD14
1K_0402_1%
1K_0402_1%
+V_DDR_CPU_REFB
1
+V_DDR_CPU_REF1
Item 54
CD46
CD46
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
DRAMRST_CNTRL_PCH 6,10,13
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
+1.5V
1
RD11
RD11
1K_0402_1%
1K_0402_1%
2
1
RD12
RD12
1K_0402_1%
1K_0402_1%
2
1
2
D
C
B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
+1.5V
2
DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR_B_DM1
DDR3_DRAMRST#
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_DM2
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDR_CKE3_DIMMB
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
M_ODT3
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
PCH_SMBDATA
PCH_SMBCLK
+0.75VS
DDR3_DRAMRST# 6,10
DDR_CKE3_DIMMB 6
M_CLK_DDR3 6
M_CLK_DDR#3 6
DDR_B_BS1 6
DDR_B_RAS# 6
DDR_CS2_DIMMB# 6
M_ODT2 6
M_ODT3 6
T69@
T69@
1
CD49
CD49
@
@
2
220P_0402_50V7K~N
220P_0402_50V7K~N
+VREF_DQ_DIMMB
Item 54
+VREF_CB
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
1
2
Item 42
1
CD50
CD50
@
@
2
220P_0402_50V7K~N
220P_0402_50V7K~N
RD17 0_0402_5%
RD17 0_0402_5%
M1 circuit
RD18 0_0402_5%@
RD18 0_0402_5%@
1
BSS138_SOT23
BSS138_SOT23
QC6
QC6
M3 circuit
CD37
CD37
0.1U_0402_16V7K
0.1U_0402_16V7K
CD38
CD38
1
2
PCH_SMBDATA 10,13
PCH_SMBCLK 10,13
Close to pin200, 202
Item 54
1
D
D
1
G
G
2
+V_DDR_CPU_REFB
+1.5V
2
2
S
S
3
1
2
1
2
5
4
3
JDIMMB H=9.2
+VREF_DQ_DIMMB
DDR_B_D0
DDR_B_D1
DDR_B_DM0
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
+0.75VS
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
CD43
CD43
1
2
1
2
3.56A
+1.5V
CD44
CD44
JDIMM2
JDIMM2
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
FOX_AS0A626-JASG-7H
FOX_AS0A626-JASG-7H
CONN@
CONN@
VREF_CA
Item 70
DQS0#
DQS0
DQ12
DQ13
RESET#
DQ14
DQ15
DQ20
DQ21
DQ22
DQ23
DQ28
DQ29
DQS3#
DQS3
DQ30
DQ31
CKE1
CK1#
RAS#
ODT0
ODT1
DQ36
DQ37
DQ38
DQ39
DQ44
DQ45
DQS5#
DQS5
DQ46
DQ47
DQ52
DQ53
DQ54
DQ55
DQ60
DQ61
DQS7#
DQS7
DQ62
DQ63
EVENT#
GND2
VSS
DQ4
DQ5
VSS
VSS
DQ6
DQ7
VSS
VSS
DM1
VSS
VSS
VSS
DM2
VSS
VSS
VSS
VSS
VSS
VDD
A15
A14
VDD
A11
A7
VDD
A6
A4
VDD
A2
A0
VDD
CK1
VDD
BA1
VDD
S0#
VDD
NC
VDD
VSS
VSS
DM4
VSS
VSS
VSS
VSS
VSS
VSS
DM6
VSS
VSS
VSS
VSS
VSS
SDA
SCL
VTT
All VREF traces should
have 10 mil trace width
DDR_B_DQS#[0..7]6
DDR_B_DQS[0..7]6
DDR_B_D[0..63]6
D
DDR_B_MA[0..15]6
Layout Note:
Place near JDIMMB
+1.5V
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
2
C
+1.5V
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
CD29
CD29
1
2
Layout Note:
Place near JDIMMB.203,204
B
+0.75VS
1U_0402_6.3V6K
1U_0402_6.3V6K
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD25
CD25
1
2
10U_0603_6.3V6
10U_0603_6.3V6
CD30
CD30
1
1
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CD39
CD39
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CD27
CD27
CD26
CD26
10U_0603_6.3V6
10U_0603_6.3V6
CD31
CD31
CD40
CD40
CD28
CD28
1
1
2
2
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
10U_0603_6.3V6
CD34
CD34
CD33
CD33
CD32
CD32
1
1
1
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CD42
CD42
CD41
CD41
1
1
2
2
Populate R83 for Intel DDR3
VREFDQ multiple methods M1
330U_D2_2VM_R6M
330U_D2_2VM_R6M
1
@
@
CD35
CD35
CD36
CD36
1
+
+
2
2
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
+3VS
RD5 10K_0402_5%
RD5 10K_0402_5%
+VREF_DQ_DIMMB
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
CD24
CD24
CD23
CD23
1
1
2
2
DDR_CKE2_DIMMB6
DDR_B_BS26
M_CLK_DDR26
M_CLK_DDR#26
DDR_B_BS06
DDR_B_WE#6
DDR_B_CAS#6
DDR_CS3_DIMMB#6
+3VS
2
1
10K_0402_5%
10K_0402_5%
1
RD6
RD6
0.1U_0402_16V7K
0.1U_0402_16V7K
2
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Title
Title
Title
DDRIII DIMMB
DDRIII DIMMB
DDRIII DIMMB
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Custom
Custom
Custom
LA-8291
LA-8291
LA-8291
Date: Sheet
Date: Sheet
2
Date: Sheet
11 58Monday, February 20, 2012
11 58Monday, February 20, 2012
11 58Monday, February 20, 2012
1
A
0.3
0.3
0.3
of
of
of
D
C
B
A
15P_0402_50V8J
15P_0402_50V8J
1
CH2
CH2
2
far away hot spot
1
2
HDA_SYNC_CODEC25
2
1
RH2 10M_0402_5%
RH2 10M_0402_5%
4
1
YH1
32.768K_12.5PF_1TJS125BJ4A421P
YH1
32.768K_12.5PF_1TJS125BJ4A421P
3
2
NCNC
NCNC
+3V_PCH
1
RH59
RH59
51_0402_5%
51_0402_5%
2
PCH_SPI_CS1#
PCH_SPI_DIN
5
PCH_RTCX1
PCH_RTCX2
12P_0402_50V8J
12P_0402_50V8J
Item 69
1
CH3
CH3
2
+RTCVCC
HDA_BIT_CLK_CODEC25
HDA_SPKR26
HDA_RST#_CODEC25
HDA_SDIN025
HDA_SDOUT_CODEC25
Item 55
1
RH49
2
2
1
Item 39
ROM2@
ROM2@
RH267 0_0402_5%
RH267 0_0402_5%
2
1
2
1
RH268 33_0402_5%
RH268 33_0402_5%
ROM2@
ROM2@
5
RH49
100_0402_1%
100_0402_1%
1M_0402_5%
1M_0402_5%
RH48
RH48
100_0402_1%
100_0402_1%
RH26 33_0402_5%
RH26 33_0402_5%
+RTCVCC
RH11 1M_0402_5%
RH11 1M_0402_5%
1
PCH_RTCRST#26
CH4
CH4
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
RH22 20K_0402_5%
RH22 20K_0402_5%
2
1
RH23 20K_0402_5%
RH23 20K_0402_5%
CH5
CH5
1U_0402_6.3V6K
1U_0402_6.3V6K
ME_EN29
ME_FLASH_R26
Item 16
RH32 10K_0402_5%
RH32 10K_0402_5%
2
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
1
RH47
RH47
100_0402_1%
100_0402_1%
2
2
BSS138_NL_SOT23-3
1
Item 69
+3V_PCH
1
RH273
RH273
3.3K_0402_5%
3.3K_0402_5%
@
@
2
PCH_SPI_CS1#_R
PCH_SPI_DIN_R2
BSS138_NL_SOT23-3
SPI_WP#_SYS
RH25
RH25
SM_INTRUDER#
2
PCH_RTCRST#
SMT comment: keep open
1
2
1
2
RH168 33_0402_5%
RH168 33_0402_5%
RH266 33_0402_5%
RH266 33_0402_5%
RH265 33_0402_5%
RH265 33_0402_5%
RH269 0_0402_5%
RH269 0_0402_5%
RH270 0_0402_5%
RH270 0_0402_5%
T144 PAD~D @
T144 PAD~D @
+5VS
G
G
3
S
S
QH7
QH7
1
RH263 0_0402_5%~D
RH263 0_0402_5%~D
Item 84
1
CMOS
CLRP1
CLRP1
SHORT PADS
SHORT PADS
2
1
CLRP2
CLRP2
SHORT PADS
SHORT PADS
2
ME CMOS
CLP1 & CLP2 place near DIMM
2
1
2
1
2
1
2
1
2
1
1
2
@
@
PCH_GPIO13
HDA_SYNC
1
D
D
2
PCH_RTCX1
PCH_RTCX2
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
HDA_BIT_CLK
HDA_SYNC
HDA_SPKR
HDA_RST#
HDA_SDIN0
HDA_SDOUT
PCH_GPIO33
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_DO
PCH_SPI_DIN
BIOS ROM 2
SPI ROM FOR WIN8( 4MByte )
Item 88
UH68
UH68
1
/CS
2
DO
3
/WP
4
GND
W25Q32BVSSIG SOP 8P
W25Q32BVSSIG SOP 8P
ROM2@
ROM2@
/HOLD
3.3K_0402_5%
3.3K_0402_5%
8
VCC
ROM2@
ROM2@
7
PCH_SPI_CLK_R2
6
CLK
PCH_SPI_DO_R2
5
DIO
4
RH1208
RH1208
4
Item 69
A20
C20
D20
G22
K22
C17
N34
L34
T10
K34
E34
G34
C34
A34
A36
C36
N32
J3
H7
K5
H1
T3
Y14
T1
V4
U3
+3V_PCH
UH4A
UH4A
RTCX1
RTCX2
RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN
HDA_BCLK
HDA_SYNC
SPKR
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDO
HDA_DOCK_EN# / GPIO33
HDA_DOCK_RST # / GPIO13
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
SPI_CLK
SPI_CS0#
SPI_CS1#
SPI_MOSI
SPI_MISO
PANTHER-POINT_FCBGA989
PANTHER-POINT_FCBGA989
VD@
VD@
UH4
UH4
BD82HM65_FCBGA989P
BD82HM65_FCBGA989P
VX@
VX@
1
CH100
CH100
ROM2@
ROM2@
2
1
2
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
RH272 47_0402_5%
RH272 47_0402_5%
2
1
ROM2@
ROM2@
RH271 47_0402_5%
RH271 47_0402_5%
2
1
ROM2@
ROM2@
Item 96
RTC
RTC
IHDA
IHDA
JTAG
JTAG
SPI
SPI
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
LPC
LPC
FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
PCH_SPI_CLK
PCH_SPI_DO
PCH_SPI_CLK_R2
Item 2
3
LPC_LAD0
C38
LPC_LAD1
A38
LPC_LAD2
B37
LPC_LAD3
C37
LPC_FRAME#
D36
LPC_LDRQ#0
E36
RH274 0_0402_5%@
RH274 0_0402_5%@
1
K36
SERIRQ
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
check layout Item 1
AD3
AD1
Y3
Y1
AB3
AB1
Y11
SATA_COMP
Y10
AB12
SATA3_COMP
AB13
RBIAS_SATA3
AH1
SATA_LED#
P3
PCH_GPIO21
V14
BBS_BIT0_R
P1
GPIO51:BBS1 GPIO11:BBS0
SPI
*
LPC
Item 56
Item 81
RH2000
RH2000
2
1
0_0402_5%
0_0402_5%
1
@
@
@
@
CH1496
CH1496
2
LPC_LAD0 20,26,27,29
LPC_LAD1 20,26,27,29
LPC_LAD2 20,26,27,29
LPC_LAD3 20,26,27,29
LPC_FRAME# 20,26,27,29
LPC_LDRQ#0 20
2
SERIRQ 20,26,29
SATA_PRX_DTX_N0 27
SATA_PRX_DTX_P0 27
SATA_PTX_DRX_N0 27
SATA_PTX_DRX_P0 27
SATA_PRX_DTX_N1 28
SATA_PRX_DTX_P1 28
SATA_PTX_DRX_N1 28
SATA_PTX_DRX_P1 28
SATA_PRX_DTX_N2 28
SATA_PRX_DTX_P2 28
SATA_PTX_DRX_N2 28
SATA_PTX_DRX_P2 28
1
RH40 37.4_0402_1%
RH40 37.4_0402_1%
1
RH42 49.9_0402_1%
RH42 49.9_0402_1%
1
RH46 750_0402_1%
RH46 750_0402_1%
RH30 10K_0402_5%
RH30 10K_0402_5%
2
RH29 10K_0402_5%
RH29 10K_0402_5%
2
Boot BIOS Strap
1 1
0 0
PCH_SPI_CS0#
PCH_SPI_DIN
SPI_WP#_SYS29
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DR AWING IS THE PRO PRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL
THIS SHEET OF ENGINEERING DR AWING IS THE PRO PRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL
THIS SHEET OF ENGINEERING DR AWING IS THE PRO PRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS
DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS
DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.
3
+1.05VS_VCC_SATA
2
+1.05VS_SATA3
2
2
SATA_LED# 33
1
1
4.7K_0402_5%
4.7K_0402_5%
1
RH2100 33_0402_5%
RH2100 33_0402_5%
1
RH2101 33_0402_5%
RH2101 33_0402_5%
SPI_WP#_SYS
SW_CONFIG1
SW_CONFIG1 29
SSD
HDD
ODD
+3VS
BIOS ROM 1
200 MIL SO8
32Mb Flash ROM
item 38
+3V_PCH
1
RH1207
RH1207
@
@
1
RH1205
RH1205
3.3K_0402_5%
3.3K_0402_5%
UH67
2
item 99
UH67
1
/CS
2
DO
3
/WP
4
GND
W25Q64BVSSIG SOP 8P
W25Q64BVSSIG SOP 8P
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
PCH_SPI_CS0#_R
2
PCH_SPI_DIN_R
PCH_SPI_DIN_R
2
item 27
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2
Item 47
Item 62
Item 89
PCH_INTVRMEN
RH38 330K_0402_5%
RH38 330K_0402_5%
2
INTVRMEN
H：Integrated VRM enable
*
L
：
Integrated VRM disable
CH999 0.1U_0402_16V7K
CH999 0.1U_0402_16V7K
1
8
VCC
/HOLD
CLK
DIO
Deciphered Date
Deciphered Date
Deciphered Date
7
PCH_SPI_CLK_R
6
PCH_SPI_DO_R
5
Item 23
PCH_SPI_CLK_R
2
2
1
2
1
RH1206
RH1206
3.3K_0402_5%
3.3K_0402_5%
Item 96
1
RH2102 47_0402_5%
RH2102 47_0402_5%
1
RH2103 47_0402_5%
RH2103 47_0402_5%
RH1999
RH1999
2
1
0_0402_5%
0_0402_5%
@
@
Item 47
2
PCH_SPI_DO
2
1
@
@
CH1495
CH1495
2
PCH_SPI_CLK
1
+RTCVCC
0.1U_0402_16V7K~N
0.1U_0402_16V7K~N
SERIRQ
SATA_LED#
HDA_SYNC
This signal has a weak intern al pull-down
On Die PLL VR i s supplied by
1.5V when smapl ed high
1.8V when sampl ed low
Needs to be pul led High for H uron River plat from
HDA_SYNC
RTC Battery
BAS40-04_SOT23-3
BAS40-04_SOT23-3
+RTCVCC
1
CH7
CH7
1U_0402_6.3V6K
1U_0402_6.3V6K
Item 56
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
RH28 8.2K_0402_5%
RH28 8.2K_0402_5%
2
1
RH31 10K_0402_5%
RH31 10K_0402_5%
2
1
HDA_SPKR
RH35 1K_0402_5%@
RH35 1K_0402_5%@
2
1
LOW=Default
*
HIGH=No Reboot
RH66 1K_0402_5%
RH66 1K_0402_5%
2
1
+RTCBATT
2
RH54
RH54
1K_0402_5%
1K_0402_5%
1
1
W=20mils
DH1
DH1
CHGRTC
3
W=20mils
2
W=20mils
Compal Electronics, Inc.
PCH (1/8) SATA,HDA,SPI, LPC
PCH (1/8) SATA,HDA,SPI, LPC
PCH (1/8) SATA,HDA,SPI, LPC
LA-8291
LA-8291
LA-8291
1
+3V_PCH
+3VS
+3VS
D
C
B
A
0.3
0.3
12 58Monday, February 20, 2012
12 58Monday, February 20, 2012
12 58Monday, February 20, 2012
0.3
of
of
of
D
MiniWLAN (Mini Card 1)--->
CARD_bus --->
10/100/1G LAN --->
C
CLK_PCI_LPBACK
33_0402_5%
33_0402_5%
Reserve for EMI please close t o
UH4
MiniWLAN (Mini Card 1)--->
B
A
12P_0402_50V8J
12P_0402_50V8J
CH19
CH19
1
2
YH2
YH2
4
NC
1
OSC
25MHZ_12PF_X3G025000DC1H
25MHZ_12PF_X3G025000DC1H
5
@
@
@
@
CH99
1
1
22P_0402_50V8J
22P_0402_50V8J
CH99
2
RH251
RH251
2
Card BUS --->
10/100/1G LAN --->
RH991M_0402_5%
RH991M_0402_5%
2
1
Item 94
3
OSC
2
NC
5
PCIE_PRX_WLANTX_N227
PCIE_PRX_WLANTX_P227
PCIE_PTX_WLANRX_N227
PCIE_PTX_WLANRX_P227
PCIE_PRX_CARDTX_N522
PCIE_PRX_CARDTX_P522
PCIE_PTX_CARDRX_N522
PCIE_PTX_CARDRX_P522
PCIE_PRX_GLANTX_N624
PCIE_PRX_GLANTX_P624
PCIE_PTX_GLANRX_N624
PCIE_PTX_GLANRX_P624
CLK_PCH_14M
33_0402_5%
33_0402_5%
Reserve for EMI please close t o UH4
CLK_PCIE_MINI1#27
CLK_PCIE_MINI127
MINI1CLK_REQ#27
CLK_PCIE_CB#22
CLK_PCIE_CB22
CBCLK_REQ#23
CLK_PCIE_LAN#24
CLK_PCIE_LAN24
LANCLK_REQ#24
XTAL25_IN
XTAL25_OUT
12P_0402_50V8J
12P_0402_50V8J
1
CH18
CH18
2
CH8 0.1U_0402_16V7K
CH8 0.1U_0402_16V7K
1
CH9 0.1U_0402_16V7K
CH9 0.1U_0402_16V7K
1
CH14 0.1U_0402_16V7K
CH14 0.1U_0402_16V7K
1
CH15 0.1U_0402_16V7K
CH15 0.1U_0402_16V7K
1
CH12 0.1U_0402_16V7K
CH12 0.1U_0402_16V7K
1
CH13 0.1U_0402_16V7K
CH13 0.1U_0402_16V7K
1
@
@
RH250
RH250
2
1
22P_0402_50V8J
22P_0402_50V8J
RH81 10K_0402_5%
+3V_PCH
+3VS
+3VS
+3V_PCH
+3V_PCH
+3V_PCH
RH81 10K_0402_5%
RH97 10K_0402_5%
RH97 10K_0402_5%
RH82 0_0402_5%
RH82 0_0402_5%
RH83 0_0402_5%
RH83 0_0402_5%
RH84 10K_0402_5%
RH84 10K_0402_5%
RH2106 10K_0402_5%
RH2106 10K_0402_5%
RH87 10K_0402_5%
RH87 10K_0402_5%
+3V_PCH
RH92 0_0402_5%
RH92 0_0402_5%
RH93 0_0402_5%
RH93 0_0402_5%
RH94 10K_0402_5%
RH94 10K_0402_5%
RH95 10K_0402_5%
RH95 10K_0402_5%
+3V_PCH
RH88 0_0402_5%
RH88 0_0402_5%
RH90 0_0402_5%
RH90 0_0402_5%
RH138 10K_0402_5%
RH138 10K_0402_5%
4
UH4B
UH4B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
2
2
1
1
1
1
1
1
1
1
1
2
2
1
PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C
PCIE_PRX_CARDTX_N5
PCIE_PRX_CARDTX_P5
PCIE_PTX_CARDRX_N5_C
PCIE_PTX_CARDRX_P5_C
PCIE_PRX_GLANTX_N6
PCIE_PRX_GLANTX_P6
PCIE_PTX_GLANRX_N6_C
PCIE_PTX_GLANRX_P6_C
T91PAD~D @
T91PAD~D @
T92PAD~D @
T92PAD~D @
T93PAD~D @
T93PAD~D @
T94PAD~D @
T94PAD~D @
PCIECLKREQ0#
EXPCLK_REQ#
PCIE_MINI1#
PCIE_MINI1
MINI1CLK_REQ#
CLKREQ_USB3#
MINI2CLK_REQ#
PCIE_CB#
PCIE_CB
CBCLK_REQ#
PEG_B_CLKRQ#
PCIE_LAN#
PCIE_LAN
LANCLK_REQ#
CRCLK_REQ#
4
Item 19
2
2
2
2
2
2
@
@
CH98
CH98
2
1
1
1
2
2
2
2
2
2
2
2
2
1
1
2
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
PANTHER-POINT_FCBGA989
PANTHER-POINT_FCBGA989
VD@
VD@
PCI-E*
PCI-E*
CLOCKS
CLOCKS
3
SMBALERT# / GPIO11
SMBCLK
SMBDATA
SML0ALERT# / GPIO60
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
Link
Link
FLEX CLOCKS
FLEX CLOCKS
SML0CLK
SML0DATA
SML1CLK / GPIO58
SML1DATA / GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PCH_GPIO11
E12
SMBCLK
H14
SMBDATA
C9
DRAMRST_CNTRL_PCH
A12
SML0CLK
C8
SML0DATA
G12
PCHHOT#
C13
SML1CLK
E14
SML1DATA
M16
M7
T11
P10
PEG_A_CLKRQ#
M10
AB37
AB38
CLK_CPU_DMI#
AV22
CLK_CPU_DMI
AU22
AM12
AM13
CLKIN_DMI#
BF18
CLKIN_DMI
BE18
CLKIN_DMI2#
BJ30
CLKIN_DMI2
BG30
CLKIN_DOT96#
G24
CLKIN_DOT96
E24
CLKIN_SATA#
AK7
CLKIN_SATA
AK5
CLK_PCH_14M
K45
CLK_PCI_LPBACK
H45
XTAL25_IN
V47
XTAL25_OUT
V49
Y47
CLK_FLEX0
K43
F47
CLK_33M_PCH
H47
K49
2
1
RH72 10K_0402_5%
RH72 10K_0402_5%
MEMORY
DRAMRST_CNTRL_PCH 6,10,11
SML0CLK 24
SML0DATA 24
EC
PCH_CL_CLK1 27
PCH_CL_DATA1 27
PCH_CL_RST1# 27
1
CLK_CPU_DMI# 5
CLK_CPU_DMI 5
CLK_PCI_LPBACK 15
XCLK_RCOMP
RH100 90.9_0402_1%
RH100 90.9_0402_1%
PAD~D @
PAD~D @
PAD~D @
PAD~D @
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
1
T102
T102
T105
T105
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
CHA:A0h
CHB:A4h
LAN
RH9610K_0402_5%
RH9610K_0402_5%
2
+1.05VS_VCCDIFFCLKN
Deciphered Date
Deciphered Date
Deciphered Date
2
+3V_PCH
Item 12
SMBus Address:0xC8
+3V_PCH
SMBCLK
SMBDATA
Item 12
6
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
1
0_0402_5%
0_0402_5%
SML1CLK
SML1DATA
2
1
QH1A
QH1A
RH239
RH239
@
@
2
3
2N7002KDWH_SOT363-6
2N7002KDWH_SOT363-6
SML0CLK
SML0DATA
PCHHOT#
SMBCLK
SMBDATA
SML1CLK
SML1DATA
DRAMRST_CNTRL_PCH
CLKIN_DMI2#
CLKIN_DMI2
CLKIN_DMI#
CLKIN_DMI
CLKIN_DOT96#
CLKIN_DOT96
CLKIN_SATA#
CLKIN_SATA
CLK_PCH_14M
If use extenal CLK gen, please place close to CLK gen
else, please pl ace close to P CH
+3VS
5
QH1B
QH1B
RH252
RH252
@
@
1
0_0402_5%
0_0402_5%
2
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
+3VS
2
RH146
RH146
2.2K_0402_5%
2.2K_0402_5%
1
4
2
RH21080_0402_5%
RH21080_0402_5%
1
RH21090_0402_5%
RH21090_0402_5%
1
Compal Electronics, Inc.
PCH (2/8) PCIE, SMBUS, CLK
PCH (2/8) PCIE, SMBUS, CLK
PCH (2/8) PCIE, SMBUS, CLK
LA-8291
LA-8291
LA-8291
1
RH63 2.2K_0402_5%
RH63 2.2K_0402_5%
RH64 2.2K_0402_5%
RH64 2.2K_0402_5%
RH61 2.2K_0402_5%
RH61 2.2K_0402_5%
RH62 2.2K_0402_5%
RH62 2.2K_0402_5%
RH65 2.2K_0402_5%
RH65 2.2K_0402_5%
RH70 2.2K_0402_5%
RH70 2.2K_0402_5%
RH67 1K_0402_5%
RH67 1K_0402_5%
2
1
2
1
2
1
RH68 10K_0402_5%
RH68 10K_0402_5%
2
1
2
1
2
1
2
1
2
1
RH89 10K_0402_5%
RH89 10K_0402_5%
RH91 10K_0402_5%
RH91 10K_0402_5%
RH74 10K_0402_5%
RH74 10K_0402_5%
RH75 10K_0402_5%
RH75 10K_0402_5%
RH76 10K_0402_5%
RH76 10K_0402_5%
RH77 10K_0402_5%
RH77 10K_0402_5%
RH78 10K_0402_5%
RH78 10K_0402_5%
RH79 10K_0402_5%
RH79 10K_0402_5%
RH183 10K_0402_5%
RH183 10K_0402_5%
1
1
1
1
1
1
1
1
1
2
RH147
RH147
2.2K_0402_5%
2.2K_0402_5%
1
1
2
2
2
2
2
2
2
2
2
PCH_SMBCLK 10,11
PCH_SMBDATA 10,11
EC_SMB_CK2 29
EC_SMB_DA2 29
+3V_PCH
+3V_PCH
13 58Monday, February 20, 2012
of
13 58Monday, February 20, 2012
of
13 58Monday, February 20, 2012
of
D
C
B
A
0.3
0.3
0.3
HDMICLK_NB
HDMIDAT_NB
1
HDMICLK_NB 21
HDMIDAT_NB 21
TMDS_B_HPD_R 21
TMDS_B_DATA2#_C 21
TMDS_B_DATA2_C 21
TMDS_B_DATA1#_C 21
TMDS_B_DATA1_C 21
TMDS_B_DATA0#_C 21
TMDS_B_DATA0_C 21
TMDS_B_CLK#_C 21
TMDS_B_CLK_C 21
D
C
1
CRT_B
CRT_G
CRT_R
CRT_DDC_CLK
CRT_DDC_DATA
2
2
RH126
RH126
2
CTRL_CLK
CTRL_DATA
LVDS_IBG
CRT_IREF
1
2
HSYNC
VSYNC
UH4D
UH4D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
PANTHER-POINT_FCBGA989
PANTHER-POINT_FCBGA989
SDVO_INTN
SDVO_INTP
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
LVDS
LVDS
DDPC_CTRLCLK
DDPC_CTRLDATA
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
CRT
CRT
5
UH4C
DMI_CTX_PRX_N04
DMI_CTX_PRX_N14
DMI_CTX_PRX_N24
DMI_CTX_PRX_N34
DMI_CTX_PRX_P04
DMI_CTX_PRX_P14
DMI_CTX_PRX_P24
PBTN_OUT#29
AC_PRESENT29
DMI_CTX_PRX_P34
DMI_CRX_PTX_N04
DMI_CRX_PTX_N14
DMI_CRX_PTX_N24
DMI_CRX_PTX_N34
DMI_CRX_PTX_P04
DMI_CRX_PTX_P14
DMI_CRX_PTX_P24
DMI_CRX_PTX_P34
+1.05VS_VCC_EXP
XDP_DBRESET#5
PCH_APWROK
RH111 49.9_0402_1%
RH111 49.9_0402_1%
RH112 750_0402_1%
RH112 750_0402_1%
4mil width and place
within 500mil of the PCH
RH116
RH116
1
RH117
RH117
1
1
RH2112 0_0402_5%
RH2112 0_0402_5%
PM_DRAM_PWRGD
RH120
RH120
1
RH121
RH121
1
RH122
RH122
D
SYSTEM_PWROK5,29
C
PCH_PWROK29
PCH_APWROK29
PM_DRAM_PWRGD5
PCH_RSMRST#29
SUSPWRDNACK29
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
2
1
2
1
XDP_DBRESET#
SYS_PWROK
2
0_0402_5%
0_0402_5%
PM_PWROK_R
2
0_0402_5%
0_0402_5%
VD@
VD@
APWROK
2
PCH_RSMRST#_R
2
0_0402_5%
0_0402_5%
2
0_0402_5%
0_0402_5%
2
1
0_0402_5%
0_0402_5%
2
1
RH125 0_0402_5%
RH125 0_0402_5%
RI#20
DMI_IRCOMP
RBIAS_CPY
SUSACK#_R
Item 59
Item 60
SUSPWRDNACK_R
PBTN_OUT#_R
AC_PRESENT_R
PCH_GPIO72
RI#
UH4C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
PANTHER-POINT_FCBGA989
PANTHER-POINT_FCBGA989
VD@
VD@
4
FDI
DMI
FDI
DMI
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
System Power Management
System Power Management
SLP_LAN# / GPIO29
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWODVREN
PCH_DPWROK
WAKE#
PM_CLKRUN#
SUS_STAT#
SUSCLK_R
SLP_S5#
SLP_S4#
SLP_S3#
SLP_A#_R
1
RH118 0_0402_5%
RH118 0_0402_5%
SLP_SUS#
H_PM_SYNC
SLP_LAN#
RH113 0_0402_5%
RH113 0_0402_5%
1
RH115
RH115
1
VD@
VD@
2
SLP_A#
2
0_0402_5%
0_0402_5%
2
Item 21
PM_CLKRUN# 20,26,29
SUS_STAT# 20,26
T204PAD~D
T204PAD~D
H_PM_SYNC 5
SLP_LAN# 29
3
FDI_CTX_PRX_N0 4
FDI_CTX_PRX_N1 4
FDI_CTX_PRX_N2 4
FDI_CTX_PRX_N3 4
FDI_CTX_PRX_N4 4
FDI_CTX_PRX_N5 4
FDI_CTX_PRX_N6 4
FDI_CTX_PRX_N7 4
FDI_CTX_PRX_P0 4
FDI_CTX_PRX_P1 4
FDI_CTX_PRX_P2 4
FDI_CTX_PRX_P3 4
FDI_CTX_PRX_P4 4
FDI_CTX_PRX_P5 4
FDI_CTX_PRX_P6 4
FDI_CTX_PRX_P7 4
FDI_INT 4
FDI_FSYNC0 4
FDI_FSYNC1 4
FDI_LSYNC0 4
FDI_LSYNC1 4
PCH_RSMRST#_R
PCIE_WAKE# 27
SUSCLK_R 29
SLP_S5# 29
SLP_S4# 29
SLP_S3# 29
SLP_A# 29
NB_LCD_BKL_EN20,29
PCH_ENVDD20
PCH_INV_PWM20
EDID_CLK20
EDID_DATA20
GMCH_LVDSAC-20
GMCH_LVDSAC+20
GMCH_LVDSA0-20
GMCH_LVDSA1-20
GMCH_LVDSA2-20
GMCH_LVDSA0+20
GMCH_LVDSA1+20
GMCH_LVDSA2+20
GMCH_LVDSBC-20
GMCH_LVDSBC+20
GMCH_LVDSB0-20
GMCH_LVDSB1-20
GMCH_LVDSB2-20
GMCH_LVDSB0+20
GMCH_LVDSB1+20
GMCH_LVDSB2+20
CRT_DDC_CLK20
CRT_DDC_DATA20
RH123 33_0402_5%
CRT_HSYNC20
CRT_VSYNC20
RH123 33_0402_5%
RH124 33_0402_5%
RH124 33_0402_5%
NB_LCD_BKL_EN
2
RH244 2.37K_0402_1%
RH244 2.37K_0402_1%
T203 P AD~D
T203 P AD~D
CRT_B20
CRT_G20
CRT_R20
1
1
1K_0402_0.5%
1K_0402_0.5%
+RTCVCC
RH127 330K_0402_5%
B
PM_PWROK_R
PM_PWROK_R
RH2113 0_0402_5%
RH2113 0_0402_5%
SUSPWRDNACK
PM_CLKRUN#
A
PCH_GPIO72
RI#
WAKE#
AC_PRESENT
SUSPWRDNACK
PCH_RSMRST#
RH135 0_0402_5%@
RH135 0_0402_5%@
Item 37
RH137 8.2K_0402_5%
RH137 8.2K_0402_5%
RH139 10K_0402_5%
RH139 10K_0402_5%
RH140 10K_0402_5%
RH140 10K_0402_5%
RH142 10K_0402_5%
RH142 10K_0402_5%
RH143 10K_0402_5%@
RH143 10K_0402_5%@
RH144 10K_0402_5%
RH144 10K_0402_5%
RH145 10K_0402_5%
RH145 10K_0402_5%
2
1
RH136 100K_0402_5%
RH136 100K_0402_5%
APWROK
VX@
VX@
2
1
SUSACK#_R
2
1
2
1
2
1
2
1
2
1
2
1
2
1
@
@
2
1
5
Item 59
+3VS
+3V_PCH
Item 83
4
DSWODVREN
DSWODVREN
RH127 330K_0402_5%
2
RH129 330K_0402_5%@
RH129 330K_0402_5%@
DSWODVREN - On Die DSW VR Enab le
H：Enable
*
：
Disable
L
1
2
1
+3VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
1
RH153 2.2K_0402_5%
RH153 2.2K_0402_5%
2
1
RH166 2.2K_0402_5%
RH166 2.2K_0402_5%
1
RH110 100K_0402_5%
RH110 100K_0402_5%
1
RH131 150_0402_1%
RH131 150_0402_1%
1
RH132 150_0402_1%
RH132 150_0402_1%
1
RH133 150_0402_1%
RH133 150_0402_1%
1
R134 100K_0402_5%
R134 100K_0402_5%
CTRL_CLK
CTRL_DATA
NB_LCD_BKL_EN
2
CRT_B
2
CRT_G
2
CRT_R
2
PCH_ENVDD
2
Compal Secret Data
Compal Secret Data
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH (3/8) DMI,FDI,PM,GFX,DP
PCH (3/8) DMI,FDI,PM,GFX,DP
PCH (3/8) DMI,FDI,PM,GFX,DP
LA-8291
LA-8291
LA-8291
1
14 58Monday, February 20, 2012
of
14 58Monday, February 20, 2012
of
14 58Monday, February 20, 2012
of
B
A
0.3
0.3
0.3
5
D
Item 68
Item 3
2
1
1
1
1
ODD_DA#28
T206PAD~D @
T206PAD~D @
1
2
2
2
2
USB3_PRX_DTX_N1
USB3_PRX_DTX_N2
USB3_PRX_DTX_P1
USB3_PRX_DTX_P2
USB3_PTX_DRX_N1
USB3_PTX_DRX_N2
USB3_PTX_DRX_P1
USB3_PTX_DRX_P2
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
GPIO50
GPIO52
GPIO54
GPIO2
ODD_DA#
GPIO4
GPIO5
PCH_PLTRST#
CLK_PCI0
CLK_PCI1
CLK_PCI2
CLK_PCI3
CLK_PCI4
USB3_PRX_DTX_N132
USB3_PRX_DTX_N232
USB3_PRX_DTX_P132
USB3_PRX_DTX_P232
USB3_PTX_DRX_N132
USB3_PTX_DRX_N232
USB3_PTX_DRX_P132
C
B
CLK_PCI_LPBACK13
CLK_PCI_EC29
CLK_PCI_TPM26
CLK_LPC_DEBUG27
CLK_PCI_SIO20
USB3_PTX_DRX_P232
CLK_PCI_LPBACK
CLK_PCI_EC
CLK_PCI_TPM
CLK_LPC_DEBUG
CLK_PCI_SIO
RH160 22_0402_5%
RH160 22_0402_5%
RH102 22_0402_5%
RH102 22_0402_5%
RH103 22_0402_5%
RH103 22_0402_5%
RH105 22_0402_5%
RH105 22_0402_5%
RH264 22_0402_5%
RH264 22_0402_5%
4
UH4E
UH4E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
USB3Rn1
BC30
USB3Rn2
BE32
USB3Rn3
BJ32
USB3Rn4
BC28
USB3Rp1
BE30
USB3Rp2
BF32
USB3Rp3
BG32
USB3Rp4
AV26
USB3Tn1
BB26
USB3Tn2
AU28
USB3Tn3
AY30
USB3Tn4
AU26
USB3Tp1
AY26
USB3Tp2
AV28
USB3Tp3
AW30
USB3Tp4
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
PANTHER-POINT_FCBGA989
PANTHER-POINT_FCBGA989
VD@
VD@
AY7
RSVD1
AV7
RSVD2
AU3
RSVD3
BG4
RSVD4
AT10
RSVD5
BC8
RSVD6
AU2
RSVD7
AT4
RSVD8
AT3
RSVD9
AT1
RSVD10
AY3
RSVD11
AT5
RSVD12
AV3
RSVD13
AV1
RSVD14
BB1
RSVD15
BA3
RSVD16
BB5
RSVD17
BB3
RSVD18
BB7
RSVD19
BE8
RSVD20
BD4
RSVD21
BF6
RSVD22
RSVD
RSVD
PCI
PCI
USB
USB
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC6# / GPIO10
OC7# / GPIO14
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC5# / GPIO9
AV5
AV10
AT8
AY5
BA2
AT12
BF3
USB20_N0
C24
USB20_P0
A24
USB20_N1
C25
USB20_P1
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
USB ports 6 and 7 are disabled on 12 port SKUs.
N28
M28
L30
K30
USB20_N9
G30
USB20_P9
E30
USB20_N10
C30
USB20_P10
A30
L32
K32
USB20_N12
G32
USB20_P12
E32
USB20_N13
C32
USB20_P13
A32
USBRBIAS
C33
B33
USB_OC#0
A14
USB_OC#1
K20
USB_OC#2
B17
USB_OC#3
C16
USB_OC#4
L16
USB_OC#5
A16
USB_OC#6
D14
USB_OC#7
C14
3
USB20_N0 32
USB20_P0 32
USB20_N1 32
USB20_P1 32
USB20_N9 31
USB20_P9 31
USB20_N10 31
USB20_P10 31
USB20_N12 31
USB20_P12 31
USB20_N13 31
USB20_P13 31
Within 500 mils
2
1
RH151 22.6_0402_1%
RH151 22.6_0402_1%
USB_OC#0 32
USB_OC#4 31
USB_OC#6 31
USB3.0_A
USB3.0_B
USB Sub Card (single USB2.0)
Felica
Item 41
USB Sub Card (dual USB2.0)
Item 36
2
RPH1
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
RPH1
4
3
2
1
10K_1206_8P4R_5%
10K_1206_8P4R_5%
RPH2
RPH2
4
3
2
1
10K_1206_8P4R_5%
10K_1206_8P4R_5%
1
D
C
+3V_PCH
5
6
7
8
5
6
7
8
B
@
@
2
1
RH155 0_0402_5%
RPH3
RPH3
1
PCI_PIRQB#
2
PCI_PIRQD#
3
PCI_PIRQC#
4
8.2K_8P4R_5%
8.2K_8P4R_5%
RPH5
5
RPH5
1
2
3
4
8.2K_8P4R_5%
8.2K_8P4R_5%
RPH6
RPH6
1
2
3
4
8.2K_8P4R_5%
8.2K_8P4R_5%
GPIO2
PCI_PIRQA#
GPIO4
ODD_DA#
A
GPIO50
GPIO52
GPIO54
GPIO5
+3VS
10K_0402_5%
10K_0402_5%
4
@
@
RH262
RH262
+3VS
2
1
1
RH157
RH157
100K_0402_5%
100K_0402_5%
2
8
7
6
5
8
7
6
5
8
7
6
5
PLT_RST#5,22,24,26,27,29
+3VS
UH3
UH3
4
Y
RH155 0_0402_5%
Item 52
1
CH53
CH53
0.1U_0402_16V7K
0.1U_0402_16V7K
2
5
1
P
B
2
A
G
74AHC1G08GW
74AHC1G08GW
3
PCH_PLTRST#
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH (4/8) PCI, USB, NVRAM
PCH (4/8) PCI, USB, NVRAM
PCH (4/8) PCI, USB, NVRAM
LA-8291
LA-8291
LA-8291
1
15 58Monday, February 20, 2012
15 58Monday, February 20, 2012
15 58Monday, February 20, 2012
of
of
of
A
0.3
0.3
0.3
5
D
GPIO28
On-Die PLL Voltage Regulator
This signal has a weak internal pull up
H
：
On-Die voltage regulator enabl e
*
L：On-Die PLL Voltage Regulator d isable
PCH_GPIO37
C
B
FDI TERMINATION VOLTAGE OVERRIDE
LOW - Tx, Rx terminated
*
to same voltage
(DC Coupling Mode)
R174 100K_0402_5%
R174 100K_0402_5%
2
PCH_GPIO28
2
1
RH238 1K_0402_5%~D@
RH238 1K_0402_5%~D@
1
PCH_GPIO37
+3VS
+3VS
4
2
2
2
EC_SCI#29
EC_SMI#29
LAN_DIS#24
EC_LID_OUT#29
HDMI_DIS#26
2
2
T143 PAD~D @
T143 PAD~D @
1
T142 PAD~D @
T142 PAD~D @
ODD_DETECT#28
2
2
2
2
1
1
1
1
1
2
Item 15
1
1
1
1
check layout
RH23210K_0402_5%
RH23210K_0402_5%
RH16310K_0402_5%
RH16310K_0402_5%
RH16410K_0402_5%
RH16410K_0402_5%
RH17210K_0402_5%
RH17210K_0402_5%
RH17910K_0402_5%
RH17910K_0402_5%
RH24110K_0402_5% @
RH24110K_0402_5% @
PCH_GPIO28
PCH_GPIO34
PCH_GPIO35
ODD_DETECT#
PCH_GPIO37
RH18210K_0402_5%
RH18210K_0402_5%
RH16710K_0402_5%
RH16710K_0402_5%
RH17510K_0402_5%
RH17510K_0402_5%
RH18110K_0402_5%
RH18110K_0402_5%
PCH_GPIO0
PCH_GPIO1
PCH_GPIO6
EC_SCI#
EC_SMI#
EC_LID_OUT#
HDMI_DIS#
PCH_GPIO17
PCH_GPIO22
PCH_GPIO27
PCH_GPIO38
PCH_GPIO39
PCH_GPIO48
PCH_GPIO49
PCH_GPIO57
UH4F
UH4F
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL / GPIO12
G2
GPIO15
U2
SATA4GP / GPIO16
D40
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24
E16
GPIO27
P8
GPIO28
K1
STP_PCI# / GPIO34
K4
GPIO35
V8
SATA2GP / GPIO36
M5
SATA3GP / GPIO37
N2
SLOAD / GPIO38
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
V3
SATA5GP / GPIO49 / TEMP_ALERT#
D6
GPIO57
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
PANTHER-POINT_FCBGA989
PANTHER-POINT_FCBGA989
VD@
VD@
1
D
C
+3V_PCH
B
2
1
+3VS
2
RH158
RH158
10K_0402_5%
10K_0402_5%
1
WO/10-keyW/10-key
0 1
2
+3VS
RH18410K_0402_5%
RH18410K_0402_5%
RH162
RH162
1
0_0402_5%
0_0402_5%
2
DF_TVS
Item 33
GATEA20 29
H_THRMTRIP# 5
2
1
RH150 1K_0402_5%
RH150 1K_0402_5%
+1.8VS
1
2
RH149
RH149
2.2K_0402_5%
2.2K_0402_5%
H_SNB_IVB# 5
CLOSE TO THE BRANCHING POINT
Item 14
RH169 10K_0402_5%@
PCH_GPIO28
EC_LID_OUT#
EC_SMI#
PCH_GPIO57
RH169 10K_0402_5%@
RH177 1K_0402_5%
RH177 1K_0402_5%
RH71 10K_0402_5%
RH71 10K_0402_5%
RH170 10K_0402_5%
RH170 10K_0402_5%
KB@
KB@
RH173 0_0402_5%10KB@
RH173 0_0402_5%10KB@
2
1
2
1
2
1
2
1
2
1
PCH_GPIO57
3
A20GATE
PECI
RCIN#
THRMTRIP#
INIT3_3V#
DF_TVS
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
PROCPWRGD
GPIO
GPIO
CPU/MISC
CPU/MISC
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
NCTF
NCTF
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
ODD_EN#
GPIO69
GPIO70
GPIO71
PCH_PECI_R
KB_RST#
H_THERMTRIP#_R
DF_TVS
+3VS
2
RH176
RH176
10K_0402_5%
10K_0402_5%
1
T196 P AD~D@
T196 P AD~D@
T133 P AD~D@
T133 P AD~D@
@
@
1
RH1590_0402_5%
RH1590_0402_5%
KB_RST# 29
H_CPUPWRGD 5
1
RH161 390_0402_5%
RH161 390_0402_5%
NECP Recommend
T141 P AD~D@
T141 P AD~D@
check layout
PCH_GPIO57
2
2
ODD_EN# 28
H_PECI 5,29
H_THRMTRIP#
+3VS
RH171 200K_0402_1%
RH171 200K_0402_1%
ODD_DETECT#
RH249 10K_0402_5%
RH249 10K_0402_5%
HDMI_DIS#
Item 15
PCH_GPIO34
RH180 10K_0402_5%
RH180 10K_0402_5%
RH203 10K_0402_5%
RH203 10K_0402_5%
KB_RST#
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2
1
2
1
2
1
2
1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PCH (5/8) GPIO, CPU, MISC
PCH (5/8) GPIO, CPU, MISC
PCH (5/8) GPIO, CPU, MISC
LA-8291
LA-8291
LA-8291
1
16 58Monday, February 20, 2012
16 58Monday, February 20, 2012
16 58Monday, February 20, 2012
of
of
of
A
0.3
0.3
0.3
3
+VCCADAC
1
2
+VCCTX_LVDS
0.01U_0402_16V7K
0.01U_0402_16V7K
1
CH43
CH43
0.1U_0402_16V7K
0.1U_0402_16V7K
2
+1.5VS
+VCCP_VCCDMI
+1.05VS_VCC_DMI_CCI
1
1
2
2
1
2
+3VM
1
CH54
CH54
1U_0402_6.3V6K
1U_0402_6.3V6K
2
CH50
CH50
1U_0402_6.3V6K
1U_0402_6.3V6K
CH52
CH52
0.1U_0402_16V7K
0.1U_0402_16V7K
1
CH35
CH35
CH34
CH34
2
0.1U_0402_16V7K
0.1U_0402_16V7K
NECP Recommend
0.01U_0402_16V7K
0.01U_0402_16V7K
Near AP43
1
CH38
CH37
CH37
Item 74
CH38
0.01U_0402_16V7K
0.01U_0402_16V7K
2
+3VS
+VCCP_VCCDMI
LH9
LH9
1
10UH_LBR2012T100M_20%
10UH_LBR2012T100M_20%
+1.8VS
1
CH36
CH36
10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
2
2
+VCCP
1
CH41
@
CH41
@
22U_0805_6.3V6
22U_0805_6.3V6
2
+3VS
2
0.1UH_MLF1608DR10KT_10%_1608
0.1UH_MLF1608DR10KT_10%_1608
1
CH39
CH39
22U_0805_6.3V6
22U_0805_6.3V6
2
0.1uH inductor, 200mA
RH188
RH188
1
1
0_0805_5%
0_0805_5%
CH49
CH49
1U_0402_6.3V6K
1U_0402_6.3V6K
2
Item 5
Item 4
4
UH4G
UH4G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
PANTHER-POINT_FCBGA989
PANTHER-POINT_FCBGA989
VD@
VD@
POWER
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRTLVDS
CRTLVDS
HVCMOS
HVCMOS
DMI
DMI
DFT / SPI
DFT / SPI
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
VCCSPI
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
CH42
@
CH42
@
10U_0805_6.3V6M
10U_0805_6.3V6M
AG16
AG17
AJ16
AJ17
V1
5
Item 10
+VCCP
1
CH30
CH30
1
2
Item 10
2
10U_0805_4VA
10U_0805_4VA
1
1
CH45
CH45
CH44
CH44
2
2
10U_0805_4VA
10U_0805_4VA
D
+VCCP
RH187
RH187
0_0805_5%
0_0805_5%
C
B
1
2
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
CH32
CH32
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CH46
CH46
2
1U_0402_6.3V6K
1U_0402_6.3V6K
+3VS
1
CH51
CH51
0.1U_0402_16V7K
0.1U_0402_16V7K
2
Item 10
+VCCP_VCCDMI
1
CH33
CH33
2
1U_0402_6.3V6K
1U_0402_6.3V6K
Item 10
+1.05VS_VCC_EXP
1
CH47
CH47
2
1U_0402_6.3V6K
1U_0402_6.3V6K
+VCCP
CH48
CH48
1
2
CH31
CH31
+VCCP
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
+1.5VS
2
LH1
LH1
2
BLM18PG181SN1D_2P
BLM18PG181SN1D_2P
12/23
For CRT ripple issue
LH2
LH2
1
Item 10
+VCCP
2
+3VS
1
+1.8VS
PCH Power Rail Table
Voltage Rail
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC
VccADPLLA
VccADPLLB
VccCore
VccDMI
Voltage
1.05/1.0
3.3
3.3
1.05
1.05
1.05
1.05
5
5
1.05VccIO 3.799
1.05VccASW 0.803
3.3VccSPI 0.01
3.3VccDSW 0.001
1.8 0.002VccDFTERM
3.3VccRTC 6 uA
3.3VccSus3_3
3.3VccSusHDA
VccVRM 1.5 0.147
1.05VccCLKDMI
VccSSC 1.05 0.095
VccDIFFCLKN 1.05 0.050
VccALVDS 3.3
1.8VccTX_LVDS 0.04
1
S0 Iccmax
Current (A)
0.002
0.001
0.001
0.178
0.063
0.075
0.075
1.73
0.047
0.065
0.01
0.075
0.001
D
Item 46
C
B
A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PCH (6/8) PWR
PCH (6/8) PWR
PCH (6/8) PWR
LA-8291
LA-8291
LA-8291
1
17 58Monday, February 20, 2012
of
17 58Monday, February 20, 2012
of
17 58Monday, February 20, 2012
of
A
0.3
0.3
0.3
5
4
3
2
1
VCC3_3 = 2 66mA detal waiting for newest spec
+3V_PCH
D
C
Item 20
B
Item 11
A
Item 11
+VCCP
Item 11
Item 11
+VCCP
5
Item 22
+3VS
+VCCP
1
2
+VCCP
+VCCP
RH201
RH201
2
1
0_0603_5%
0_0603_5%
L65
L65
10UH_LBR2012T100M_20%
10UH_LBR2012T100M_20%
1
CH79
CH79
1U_0402_6.3V6K
1U_0402_6.3V6K
RH222
RH222
2
1
0_0603_5%
0_0603_5%
LH6
LH6
10UH_LBR2012T100M_20%
10UH_LBR2012T100M_20%
1
1
LH7
LH7
10UH_LBR2012T100M_20%
10UH_LBR2012T100M_20%
Item 11
2
1
2
1
CH96
CH96
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
2
2
2
+VCCP
+1.05VM
+3VS_VCC_CLKF33
1
1
CH73
CH73
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
+1.05VS_VCCDIFFCLKN
CH81
CH81
1U_0402_6.3V6K
1U_0402_6.3V6K
CH85
CH85
4.7U_0603_6.3V6
4.7U_0603_6.3V6
1
+
+
CH94
CH94
2
220U_B2_2.5VM_R35
220U_B2_2.5VM_R35
1
CH55
CH55
0.1U_0402_16V7K
0.1U_0402_16V7K
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
1
2
CH74
CH74
1U_0402_6.3V6K
1U_0402_6.3V6K
1
CH78
CH78
0.1U_0402_16V7K
0.1U_0402_16V7K
2
+1.05VS_VCCDIFFCLKN
1
CH84
CH84
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
1
CH86
CH86
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
1
1
+
+
CH92
CH92
CH95
CH95
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
220U_B2_2.5VM_R35
220U_B2_2.5VM_R35
CH57
@
CH57
@
CC64
CC64
CH67
CH67
CH87
CH87
1
2
1
2
22U_0805_6.3V6
22U_0805_6.3V6
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
+VCCRTCEXT
+RTCVCC
0.1U_0402_16V7K
0.1U_0402_16V7K
CH93
CH93
1U_0402_6.3V6K
1U_0402_6.3V6K
4
1
2
CC180
CC180
22U_0805_6.3V6
22U_0805_6.3V6
1
CH68
CH68
2
1U_0402_6.3V6K
1U_0402_6.3V6K
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
+VCCSST
1
CH88
CH88
2
Item 7
+VCCPDSW
+PCH_VCCDSW
+3VS_VCC_CLKF33
Item 6
Item 20
T211 PAD~D
T211 PAD~D
CH69
CH69
1U_0402_6.3V6K
1U_0402_6.3V6K
+1.5VS
T205 PAD~D
T205 PAD~D
Item 67
1
CH89
CH89
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
Item 20
1
2
UH4J
UH4J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCDIFFCLKN[1]
AF34
VCCDIFFCLKN[2]
AG34
VCCDIFFCLKN[3]
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
PANTHER-POINT_FCBGA989
PANTHER-POINT_FCBGA989
CH90
CH90
VD@
VD@
1U_0402_6.3V6K
1U_0402_6.3V6K
POWER
POWER
N26
VCCIO[29]
P26
VCCIO[30]
P28
VCCIO[31]
T27
VCCIO[32]
T29
VCCIO[33]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
V5REF
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
T23
T24
V23
V24
P24
T26
+PCH_V5REF_SUS
M26
AN23
AN24
+PCH_V5REF_RUN
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
Item 7
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
2010/09/30 2011/12/31
2010/09/30 2011/12/31
2010/09/30 2011/12/31
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPC
PCI/GPIO/LPC
VCCAPLLSATA
SATA USB
SATA USB
VCCASW[22]
VCCASW[23]
MISC
MISC
CPURTC
CPURTC
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VCCASW[21]
VCCSUSHDA
HDA
HDA
3
1
CH56
CH56
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
2
T212PAD~D
T212PAD~D
1
2
+1.5VS
+1.05VS_VCC_SATA
+VCCME_22
+VCCME_23
+VCCME_21
+VCCSUSHDA
1
CH91
CH91
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Item 11
+VCCP
+3V_PCH
CH59
CH59
CH64
CH64
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
1
CH60
CH60
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
Item 20
1
CH76
CH76
0.1U_0402_16V7K
0.1U_0402_16V7K
2
+1.05VS_VCC_SATA
RH224 0_0603_5%
RH224 0_0603_5%
RH225 0_0603_5%
RH225 0_0603_5%
RH227 0_0603_5%
RH227 0_0603_5%
+3V_PCH
+3VS
+1.05VS_SATA3
2
2
2
RH228 0_0603_5%
RH228 0_0603_5%
1
@
@
150_0402_1%
150_0402_1%
RH234
RH234
2
Deciphered Date
Deciphered Date
Deciphered Date
1
2
1
2
1
2
+3V_PCH
Item 11
+VCCP
+3V_PCH
CH66
CH66
0.1U_0402_16V7K
0.1U_0402_16V7K
+3VS
CH72
CH72
0.1U_0402_16V7K
0.1U_0402_16V7K
1
CH75
CH75
0.1U_0402_16V7K
0.1U_0402_16V7K
2
+1.05VS_SATA3
RH223
RH223
2
0_0805_5%
0_0805_5%
CH82
CH82
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
1
2
2
+3VS
2
1
CH77
CH77
1U_0402_6.3V6K
1U_0402_6.3V6K
2
1
+VCCP
+1.05VM
1
RH219
RH219
VCCDMI = 4 2mA detal waiting f or newest spec
+5V_PCH
1
RH208
RH208
100_0402_5%~D
100_0402_5%~D
2
+5VS
1
RH213
RH213
100_0402_5%~D
100_0402_5%~D
2
Item 11
1
+VCCP
Title
Title
Title
PCH (7/8) PWR
PCH (7/8) PWR
PCH (7/8) PWR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-8291
LA-8291
LA-8291
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Item 11
0_0805_5%
0_0805_5%
+3V_PCH
+3V_PCH
2
DH2
DH2
RB751V40_SC76-2
RB751V40_SC76-2
1
+PCH_V5REF_SUS
1
CH63
CH63
0.1U_0603_25V7K
0.1U_0603_25V7K
2
+3VS
2
DH3
DH3
RB751V40_SC76-2
RB751V40_SC76-2
1
+PCH_V5REF_RUN
1
CH71
CH71
1U_0603_10V6K~D
1U_0603_10V6K~D
2
1
D
C
B
A
0.3
0.3
18 58Monday, February 20, 2012
18 58Monday, February 20, 2012
18 58Monday, February 20, 2012
0.3
of
of
of
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