Compal LA-7903P Schematics

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COMPALCONFIDENTIAL
B
C
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PCBNO:
LA7903P(DA60000Q410)
BOMP/N:
MODELNAME:
GPIOMAP:
E4_VC_GPIO_map_rev_1.1
QXW00
4619FT31L01/L02
Korbel14UMA
IvyBridge+PantherPOINT(QM77w/Vpro)
2 2
20120322
REV:1.0(A00)
@:NopopComponent
CONN@:ConnectorComponent
MBType
TPM
BOMP/N
43*
1@
3@
5@
3 3
TPMDIS 2@
2@ 4@TCM
5@
3@
HM77w/oVpro
QM77w/Vpro
PCHXDP
HDMILOGO
4 4
PXDP@
46@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
MB PCB
MB PCB
Part Number Description
Part Number Description
A
PCB 0LH LA-7903P REV1 M/B UMA
PCB 0LH LA-7903P REV1 M/B UMA
DA60000Q410
DA60000Q410
B
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
161Monday, April 02, 2012
161Monday, April 02, 2012
161Monday, April 02, 2012
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Intel IvyBridge Processorr
MemoryBUS
1.5VDDRIII1333/1600MHz
DDRIIIDIMMX4
BANK0,1,2,3,4,5,6,7
P1213
rPGA989Socket
1 1
FDIx8 DMIGen2x4
LVDSCONN
P23
HDMICONN
P25
OnIOboard
CRTCONN
P37
2 2
VGA
DockingVGA
ForMB/DOCK VideoSwitch PI3V713AZLEX
DockingDPC
DockingDPD
PCIEBUS
1/2MiniCard WLAN/WiFi
SMSCSIO ECE5048
EMC4021PWMFAN
Port2Port5Port3Port6
P39
Port7
Hanksville Intel82579
CardReader
OZ600FJ0
Smartcard Expresscard
1/2MiniCard PP
P30~31
USBport6USBport10
DockingLAN
LANSWITCH PI3L720
3 3
RJ45
onIOboard
4 4
A
P31
P37
DC/DCInterface
SDXC/MMC
CPUXDPPort
PCHXDPPort
WiFiON/OFF
LED
FFSLNG3DM
P33
P7
P14
P37
P42
P43
www.schematic-x.blogspot.com
P27
B
LVDS
DPB
VGA
P23
Port1
FullMiniCard WWAN
USBport5USBport4
ChinaTCM1.2 SSX44B
P32
DiscreteTPM AT97SC3204
P32
Option
BCBUS
SMSCKBC ECE5055
TPCONN KBCONN
P41 P41
INTEL PantherPOINTM
BGA989Balls QM77
LPCBus
P34P34P34P35P33
P40P22P22
C
P14~21
SPIBus
P611
W25Q64BVSSIG
64M8Ksector
W25Q32BVSSIG
32M4Ksector
USB
SATA3.0
P14
P14
DockingDPC
DockingDPD
DAI
USB2.0[3,8]
SATAport5
DOCKLAN
USB3.0[4]
USBport11
USBport12
USBport13
USBport2
USBport1
USBport0.9
Port0
Port1
HDAudioI/F
MDC
P37
RJ11
onIOboard
DOCKING
D
P38
BT4.0
Camera
ThroughLVDSCable
Fingerprint CONN
SATAport4
USB3.0port3
USB3.0port2
HDDCONN
P27
ODDCONN
P28
HDACodec 92HD90B2
P29
Dig.MIC
ThroughLVDSCable
P41
P24
P41
ESATA
USB3.0Port
USB2.0Port
P36
USB3.0Port
USB2.0Port
P36
USB2.0
P37
onIOboard
INT.Speaker
P29
ComboJack
DAI
P37
onAudioboard
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903 4019FT
4019FT
4019FT
E
261Monday, April 02, 2012
261Monday, April 02, 2012
261Monday, April 02, 2012
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POWER STATES
State
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M3
S4 (Suspend to DISK) / M3 ON ON OFF
S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF
S5 (SOFT OFF) / M-OFF
Signal
SLP S3#
HIGH
LOW HIGH HIGH ON ON ON OFF
LOW HIGH HIGH
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
SLP
SLP
S5#
S4#
HIGH HIGH
LOW
LOW
HIGH
SLP A#
HIGH
HIGH
ALWAYS PLANE
ON
M PLANE
ON
SUS
RUN
PLANE
PLANE
ON ON ON
OFF
OFF
CLOCKS
OFF
OFF
OFF
USB 3.0 PORT#
1 2 3 JUSB2 (Left side) 4
Connetion
NA
JUSB1 (Left side)
DOCKING
PCH
USB PORT#
0 1 2 3 4 5 6
*1
7
*1
8
JUSB (Right side-IO/B) JUSB (Left side) JESA1 (Leftt side ESATA) MLK DOCK WLAN WWAN JMINI3(Flash)-for w/ Vpro DOCKING NA
DESTINATION
PM TABLE
C C
power plane
State
S0
S3
S5 S4/AC
S5 S4/AC don't exist
B B
+15V_ALW +5V_ALW +3.3V_ALW_PCH +3.3V_RTC_LDO
ON
ON
+3.3V_SUS +1.5V_MEM
ON ON
ON
OFF
OFFOFF
+5V_RUN +3.3V_RUN +1.8V_RUN +1.5V_RUN +0.75V_DDR_VTT +VCC_CORE +1.05V_RUN_VTT +1.05V_RUN
OFFON
OFF
OFF
needtoupdatePowerStatusand PMTable
+3.3V_M +3.3V_M +1.05V_M
ON
ON
ON
+1.05V_M (M-OFF)
ON
OFF
OFF
OFFOFF
SATA SATA 0 SATA 1 SATA 2 SATA 3 SATA 4
DESTINATION HDD ODD/ E3 Module Bay NA NA ESATA
9 10 Express card 11 12 13 BIO
*1: HM76 don't support port 6,7
PCI EXPRESS
Lane 1 Lane 2 Lane 3
SATA 5
Dock
Lane 4
JUSB (Right side-Audio/B)
Bluetooth Camera
DESTINATION MINI CARD-1 WWAN MINI CARD-2 WLAN Express card None
UMA DP/HDMI Port
Port B Port C
A A
Port D
Connetion MB HDMI Conn Dock DP port 2 Dock DP port 1
Lane 5 Lane 6 Lane 7 Lane 8 None
1/2vMINI CARD-3 PCIE MMI 10/100/1G LOM
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903 4019FT
4019FT
4019FT
361Monday, April 02, 2012
361Monday, April 02, 2012
361Monday, April 02, 2012
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EN_INVPWR
D D
ADAPTER
1.05V_0.8V_PWROK
BATTERY
+PWR_SRC
CHARGER
C C
FDC654P
(Q21)
ISL95836
(PU700)
+BL_PWR_SRC
+VCC_GFXCORE
+5V_RUN
+5V_HDD
Pop option
SIO_SLP_S3#
ALWON
RT8205 (PU100)
MODC_EN
SI3456BDVSI3456BDV
(Q30)(Q27)
+5V_MOD
+5V_ALW
+3.3V_ALW
RUN_ON
0.75V_DDR_VTT_ON
SIO_SLP_S3#
SYN470 (PU300)
+1.8V_RUN
AO4728 (QC3)
RT8207 (PU200)
DDR_ON
+1.5V_MEM
SIO_SLP_S3#
SIO_SLP_S4#
NTGS4141N
(Q59)
ISL95836
(PU700)
B B
1.05V_0.8V_PWROK
+VCC_CORE
TPS51212
(PU500)
CPU_VTT_ON
SIO_SLP_S3#
+1.05V_RUN_VTT +1.05V_M
SIO_SLP_S3#
SI4164
(Q63)
PJP8
TPS51212
(PU400)
SIO_SLP_A#
Pop option
SIO_SLP_S3#
CPU1.5V_S3_GATE
1.05V_VTTPWRGD
TPS51461
(PU7)
+VCC_SA
AUX_EN_WOWL
SI3456
(Q38)
+3.3V_WLAN
PCH_ALW_ON
SI3456
(Q49)
+3.3V_ALW_PCH
SIO_SLP_S5#
SUS_ON
S13456
(Q54)
+3.3V_M
SIO_SLP_S4#
SIO_SLP_LAN#
SI3456
(Q34) (U78)
+3.3V_LAN+3.3V_SUS
Pop option
AUX_ON
+3.3V_RUN
SIO_SLP_S3#
SIO_SLP_S3#
TPS22966
+5V_RUN
SIO_SLP_A#
SI3456
(Q58)
+3.3V_M
R206
+3.3V_SUS
MCARD_MISC_PWREN
SI3456
(Q42)
+3.3V_PCIE_FLASH
+3.3V_PCIE_WWAN
MCARD_WWAN_PWREN
SI3456
(Q40)
+0.75V_DDR_VTT+1.5V_RUN+1.5V_CPU_VDDQ
+1.05V_RUN
A A
+1.0V_LAN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903 4019FT
4019FT
4019FT
1
461Monday, April 02, 2012
461Monday, April 02, 2012
461Monday, April 02, 2012
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SMBUS Address [0x9a]
H14 C9
MEM_SMBCLK MEM_SMBDATA
PCH
D D
3A
C C
C8
G12
E14M16
SML1_SMBDATA
SML1_SMBCLK
B6A5
3A
1A 1A
1B 1B
B4
A3
B5
A4
DOCK_SMB_CLK DOCK_SMB_DAT
LCD_SMBCLK
LCD_SMDATA
4
DMN66D0L DMN66D0L
2.2K
2.2K
2.2K
2.2K
LAN_APE_SMB_DATA0 LAN_APE_SMB_CLK0
+3.3V_ALW_PCH
+3.3V_ALW_PCH
2.2K
2.2K
2.2K
2.2K
+3.3V_ALW
+3.3V_ALW
DMN66D0L DMN66D0L
L09 L10
2.2K
2.2K
127 129
3
BCM LOM
+3.3V_LAN
DOCKING
SMBUS Address [**]
SMBUS Address APR_EC: 0x48
SPR_EC: 0x70 MSLICE_EC: 0x72 USB: 0x59 AUDIO: 0x34 SLICE_BATTERY: 0x17 SLICE_CHARGER: 0x13
202 200
202
200
2
DIMM1
DIMM2
53 51
53 51
XDP1
XDP2
SMBUS Address [A0]
SMBUS Address [A4]
SMBUS Address [TBD]
SMBUS Address [TBD]
1
10K
G Sensor
WWAN
+3.3V_RUN
SMBUS Address [3B]
SMBUS Address [TBD]
10K
4 6
30 32
2.2K
KBC
A56
1C1CB59
PBAT_SMBCLK
2.2K
PBAT_SMBDAT
+3.3V_ALW
100 ohm 100 ohm
7 6
BATTERY CONN
SMBUS Address [0x16]
2.2K
A50
1E
B53
B B
MEC 5055
1E
A49
2B
B52
2B
SIO_LAN_SMBCLK SIO_LAN_SMBDAT
2.2K
2.2K
CARD_SMBCLK CARD_SMBDAT
2.2K
2.2K
B50 A47
CHARGER_SMBCLK CHARGER_SMBDAT
1G 1G
2.2K
2.2K
2.2K
B7
A7
BAY_SMBDAT
BAY_SMBCLK
2D
A A
2D
+3.3V_ALW
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
10 9
7 8
Charger
Express card
SMBUS Address [TBD]
SMBUS Address [0x12]
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903 4019FT
4019FT
4019FT
561Monday, April 02, 2012
561Monday, April 02, 2012
561Monday, April 02, 2012
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D D
DMI_CRX_PTX_N0<16> DMI_CRX_PTX_N1<16> DMI_CRX_PTX_N2<16> DMI_CRX_PTX_N3<16>
DMI_CRX_PTX_P0<16> DMI_CRX_PTX_P1<16> DMI_CRX_PTX_P2<16> DMI_CRX_PTX_P3<16>
DMI_CTX_PRX_N0<16> DMI_CTX_PRX_N1<16> DMI_CTX_PRX_N2<16> DMI_CTX_PRX_N3<16>
DMI_CTX_PRX_P0<16> DMI_CTX_PRX_P1<16> DMI_CTX_PRX_P2<16> DMI_CTX_PRX_P3<16>
FDI_CTX_PRX_N0<16> FDI_CTX_PRX_N1<16> FDI_CTX_PRX_N2<16> FDI_CTX_PRX_N3<16>
C C
B B
FDI_CTX_PRX_N4<16> FDI_CTX_PRX_N5<16> FDI_CTX_PRX_N6<16> FDI_CTX_PRX_N7<16>
FDI_CTX_PRX_P0<16> FDI_CTX_PRX_P1<16> FDI_CTX_PRX_P2<16> FDI_CTX_PRX_P3<16> FDI_CTX_PRX_P4<16> FDI_CTX_PRX_P5<16> FDI_CTX_PRX_P6<16> FDI_CTX_PRX_P7<16>
FDI_FSYNC0<16> FDI_FSYNC1<16>
FDI_INT<16> FDI_LSYNC0<16>
FDI_LSYNC1<16>
(1)EDP_COMPIOuse4miltracetoRC1 (2)EDP_ICOMPOuse12miltoRC1
DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3
DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3
FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7
FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7
FDI_FSYNC0 FDI_FSYNC1
FDI_INT FDI_LSYNC0
FDI_LSYNC1
EDP_COMP
4
JCPU1A
JCPU1A
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD#
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7]
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_RX#[8]
PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]
PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]
PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]
PEG_TX#[10] PEG_TX#[11] PEG_TX#[12]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]
LinkCIS
3
PEG_COMP
J22 J21 H22
(1)PEG_RCOMPO(H22)use4milconnecttoPEG_ICOMPI,then use4milconnecttoRC2.
K33 M35
(2)PEG_ICOMPOuse12milconnecttoRC2
L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32
J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32
M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25
M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25
2
JCPU1I
JCPU1I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
M34
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
H33
VSS205
H30
VSS206
H27
VSS207
H24
VSS208
H21
VSS209
H18
VSS210
H15
VSS211
H13
VSS212
H10
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
G35
VSS223
G32
VSS224
G29
VSS225
G26
VSS226
G23
VSS227
G20
VSS228
G17
VSS229
G11
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
VSS
VSS
VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285
F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3
1
+1.05V_RUN_VTT +1.05V_RUN_VTT
1 2
RC1 24.9_0402_1%~DRC1 24.9_0402_1%~D
DPCompensation
eDP_COMPIOandICOMPOsignalsshouldbeshortednear
A A
ballsandroutedwithtypicalimpedance<25mohms
EDP_COMP
PEGCompensation
PEG_ICOMPIandRCOMPOsignalsshouldbeshortedandrouted with‐maxlength=500mils‐typicalimpedance=43mohms PEG_ICOMPOsignalsshouldberoutedwith‐maxlength=500mils ‐typicalimpedance=14.5mohms
1 2
RC2 24.9_0402_1%~DRC2 24.9_0402_1%~D
PEG_COMP
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
LinkCIS
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903 4019FT
4019FT
4019FT
661Monday, April 02, 2012
661Monday, April 02, 2012
661Monday, April 02, 2012
1
of
of
of
Page 7
5
4
3
2
1
FollowDGRev0.71SM_DRAMPWROKtopology
+3.3V_ALW_PCH
D D
+1.05V_RUN_VTT
C C
B B
RUNPWROK<39,40>
PM_DRAM_PWRGD<16>
+3.3V_ALW_PCH
RC126 56_0402_5%~D@RC126 56_0402_5%~D@ RC128 49.9_0402_1%~D@RC128 49.9_0402_1%~D@ RC44 62_0402_5%~DRC44 62_0402_5%~D
1 2
RC18 200_0402_1%~DRC18 200_0402_1%~D
1 2 1 2 1 2
H_PROCHOT#<40,51,52>
H_THERMTRIP#<22>
H_CPUPWRGD<18>
H_THERMTRIP# H_CATERR# H_PROCHOT#
CPU_DETECT#<39>
PECI_EC<40>
VR1TOPOLOGY
1 2
RC57 56_0402_5%~DRC57 56_0402_5%~D
1 2
RC129 0_0402_5%~DRC129 0_0402_5%~D
placeRC129nearCPU
H_PM_SYNC<16>
1 2
RC25 1K_0402_5%~DRC25 1K_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
5
1
P
B
O
2
A
G
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
RUN_ON_CPU1.5VS3#<11,42>
Close to JCBU1
VCCPWRGOOD_0_R
PM_DRAM_PWRGD_CPU
PCH_PLTRST#_R
CC156
CC156
1 2
4
UC2
UC2
H_CATERR#
H_PROCHOT#_R
H_THERMTRIP#_R
+1.5V_CPU_VDDQ
200_0402_1%~D
200_0402_1%~D
12
RC12
RC12
RUNPWROK_AND PM_DRAM_PWRGD_CPU
2
G
G
JCPU1B
JCPU1B
C26
PROC_SELECT#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
1 2
RC28 130_0402_1%~DRC28 130_0402_1%~D
39_0402_5%~D
39_0402_5%~D
@RC64
@ RC64
1 2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@
@
13
D
D
QC1
QC1
S
S
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
LinkCIS
CLOCKS
CLOCKS
DDR3
MISC
DDR3
MISC
JTAG & BPM
JTAG & BPM
BCLK
BCLK#
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
PRDY#
PREQ#
TRST#
DBR#
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
+3.3V_ALW_PCH
SYS_PWROK_XDP
1 2
RC124 1K_0402_1%~D@ RC124 1K_0402_1%~D@
SIO_PWRBTN#_R<14,16>
DDR_XDP_WAN_SMBDAT<12,13,14,15,27,34>
DDR_XDP_WAN_SMBCLK<12,13,14,15,27,34>
RC13 0_0402_5%~D@ RC13 0_0402_5%~D@
CPU_DMI
A28
CPU_DMI#
A27
CPU_DPLL
A16
CPU_DPLL#
A15
R8
SM_RCOMP0
AK1
SM_RCOMP1
A5
SM_RCOMP2
A4
XDP_PRDY#
AP29
XDP_PREQ#
AP27
XDP_TCLK
AR26
TCK
XDP_TMS
AR27
TMS
TDO
XDP_TRST#
AP30
XDP_TDI_R
AR28
TDI
XDP_TDO_R
AP26
XDP_DBRESET#_R
AL35
XDP_OBS0_R
AT28
XDP_OBS1_R
AR29
XDP_OBS2_R
AR30
XDP_OBS3_R
AT30
XDP_OBS4_R
AP32
XDP_OBS5_R
AR31
XDP_OBS6_R
AT31
XDP_OBS7_R
AR32
1 2
RC15 0_0402_5%~D@ RC15 0_0402_5%~D@
1 2
RC16 1K_0402_1%~DRC16 1K_0402_1%~D
1 2
RC17 1K_0402_1%~DRC17 1K_0402_1%~D
1 2
DDR3_DRAMRST#_CPU
RC26 0_0402_5%~DRC26 0_0402_5%~D
RC30 0_0402_5%~DRC30 0_0402_5%~D RC31 0_0402_5%~DRC31 0_0402_5%~D RC33 0_0402_5%~DRC33 0_0402_5%~D RC34 0_0402_5%~DRC34 0_0402_5%~D RC36 0_0402_5%~DRC36 0_0402_5%~D RC37 0_0402_5%~DRC37 0_0402_5%~D RC38 0_0402_5%~DRC38 0_0402_5%~D RC39 0_0402_5%~DRC39 0_0402_5%~D
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
12
DDR_HVREF_RST_PCH<15> DDR_HVREF_RST_GATE<40>
ForESDconcern,pleaseputnearCPU
+1.05V_RUN_VTT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
CC65
CC65
CC66
CC66
2
2
PlacenearJXDP1
TheresistorforHOOK2shouldbeplaced suchthatthestubisverysmallonCFG0net
SYS_PWROK<16,39>
4.99K_0402_1%~D
4.99K_0402_1%~D
12
RC50
RC50
H_CPUPWRGD
CLK_CPU_DMI <15> CLK_CPU_DMI# <15>H_SNB_IVB#<18>
XDP_DBRESET# <14,16>
XDP_OBS0 XDP_OBS1 XDP_OBS2 XDP_OBS3 XDP_OBS4 XDP_OBS5 XDP_OBS6 XDP_OBS7
1 2
RC5 1K_0402_1%~DRC5 1K_0402_1%~D
1 2
RC6 0_0402_5%~DRC6 0_0402_5%~D
CFG0
1 2
RC7 1K_0402_1%~DRC7 1K_0402_1%~D
1 2
RC9 0_0402_5%~D@RC9 0_0402_5%~D@
1 2
RC125 0_0402_5%~DRC125 0_0402_5%~D
1 2
RC127 0_0402_5%~DRC127 0_0402_5%~D
+1.05V_RUN_VTT
1 2
RC48 0_0402_5%~D@RC48 0_0402_5%~D@
D
S
D
S
13
G
G
BSS138W-7-F_SOT323-3~D
BSS138W-7-F_SOT323-3~D
2
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
CC177
CC177
1
2
1 2
RC46 0_0402_5%~D@ RC46 0_0402_5%~D@
1 2
RC47 0_0402_5%~D@ RC47 0_0402_5%~D@
QC2
QC2
DDR_HVREF_RST
XDP_TDI_R
XDP_TDO_R XDP_TDO
XDP_PREQ# XDP_PRDY#
XDP_OBS0 XDP_OBS1
XDP_OBS2 XDP_OBS3
CFG10<9> CFG11<9>
CFG10 CFG11
XDP_OBS4 XDP_OBS5
XDP_OBS6 XDP_OBS7
H_CPUPWRGD_XDP CFD_PWRBTN#_XDP
SYS_PWROK_XDP DDR_XDP_SMBDAT_R1
DDR_XDP_SMBCLK_R1
XDP_TCLK
DDR3_DRAMRST# <12>
1 2
RC23 0_0402_5%~DRC23 0_0402_5%~D
1 2
RC24 0_0402_5%~DRC24 0_0402_5%~D
+1.05V_RUN_VTT +1.05V_RUN_VTT
JXDP1
JXDP1
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/HOOK0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH-030-01-L-D-A CONN@
SAMTE_BSH-030-01-L-D-A CONN@
CLK_XDP_ITP<9> CLK_XDP_ITP#<9>
DDR_HVREF_RST <12>
XDP_TDI
ITPCLK#/HOOK5
RESET#/HOOK6
XDP_RST#_R
RC8 1K_0402_1%~DRC8 1K_0402_1%~D
CLK_XDP
RH107 0_0402_5%~DRH107 0_0402_5%~D
CLK_XDP#
RH106 0_0402_5%~DRH106 0_0402_5%~D
ITPCLK/HOOK4
RH109 0_0402_5%~D@ RH109 0_0402_5%~D@ RH108 0_0402_5%~D@ RH108 0_0402_5%~D@
GND1 OBSFN_C0 OBSFN_C1
GND3
OBSDATA_C0 OBSDATA_C1
GND5
OBSDATA_C2 OBSDATA_C3
GND7 OBSFN_D0 OBSFN_D1
GND9
OBSDATA_D0 OBSDATA_D1
GND11 OBSDATA_D2 OBSDATA_D3
GND13
VCC_OBS_CD DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17
1 2 1 2
1 2 1 2
XDP_DBRESET#
XDP_TMS XDP_TDI XDP_PREQ# XDP_TDO
XDP_TCLK XDP_TRST#
2
CFG16
4
CFG17
6 8
CFG0
10
CFG1
12 14
CFG2
16
CFG3
18 20
CFG8
22
CFG9
24 26
CFG4
28
CFG5
30 32
CFG6
34
CFG7
36 38
CLK_XDP
40
CLK_XDP#
42 44
XDP_RST#_RXDP_HOOK2
46
XDP_DBRESET#
48 50
XDP_TDO
52
XDP_TRST#
54
XDP_TDI
56
XDP_TMS
58 60
12
PU/PDforJTAGsignals
RC19 1K_0402_1%~DRC19 1K_0402_1%~D
RC27 51_0402_1%~DRC27 51_0402_1%~D RC29 51_0402_1%~DRC29 51_0402_1%~D RC32 51_0402_1%~D@ RC32 51_0402_1%~D@ RC35 51_0402_1%~DRC35 51_0402_1%~D
RC40 51_0402_1%~DRC40 51_0402_1%~D RC41 51_0402_1%~DRC41 51_0402_1%~D
12
12 12 12 12
12 12
CFG16 <9> CFG17 <9>
CFG0 <9> CFG1 <9>
CFG2 <9> CFG3 <9>
CFG8 <9> CFG9 <9>
CFG4 <9> CFG5 <9>
CFG6 <9> CFG7 <9>
PLTRST_XDP# <17>
CLK_CPU_ITP <15> CLK_CPU_ITP# <15>
+3.3V_RUN
+1.05V_RUN_VTT
BufferedresettoCPU
+3.3V_RUN
UC1
UC1
1
5
NC
VCC
A A
PCH_PLTRST#<14,17>
2
A GND3Y
SN74LVC1G07DCKR_SC70-5~D
SN74LVC1G07DCKR_SC70-5~D
Opendrainbuffer
5
4
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CC140
CC140
2
PCH_PLTRST#_BUF
+1.05V_RUN_VTT
75_0402_1%~D
75_0402_1%~D
12
RC4
RC4
1 2
RC10 43_0402_5%~DRC10 43_0402_5%~D
PCH_PLTRST#_R
1
2
4
100P_0402_50V8J~D
100P_0402_50V8J~D
CC142
CC142
H_THERMTRIP#PECI_EC H_CPUPWRGD
100P_0402_50V8J~D
100P_0402_50V8J~D
1
CC143
CC143
2
1
2
ESDrequest
100P_0402_50V8J~D
100P_0402_50V8J~D
CC144
CC144
100P_0402_50V8J~D
100P_0402_50V8J~D
1
CC141
CC141
2
3
PlaceclosedJCPU1
XDP_DBRESET#
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
VCCPWRGOOD_0_R
@CE13
@ CE13
AvoidstubinthePWRGDpath whileplacingresistorsRC25&RC130
10K_0402_5%~D
10K_0402_5%~D
12
RC130
RC130
SM_RCOMP0
1 2
RC42 140_0402_1%~DRC42 140_0402_1%~D
SM_RCOMP1
1 2
RC43 25.5_0402_1%~DRC43 25.5_0402_1%~D
SM_RCOMP2
1 2
RC45 200_0402_1%~DRC45 200_0402_1%~D
SM_RCOMP2‐‐>15mil SM_RCOMP1/0‐‐>20mil Maxlength500mils
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
761Monday, April 02, 2012
761Monday, April 02, 2012
761Monday, April 02, 2012
B
B
B
of
of
of
Page 8
5
JCPU1C
D D
JCPU1C
4
3
JCPU1D
JCPU1D
2
1
DDR_A_D[0..63]<12>
C C
B B
DDR_A_BS0<12> DDR_A_BS1<12> DDR_A_BS2<12>
DDR_A_CAS#<12> DDR_A_RAS#<12> DDR_A_WE#<12>
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
DDR_A_BS0 DDR_A_BS1 DDR_A_BS2
DDR_A_CAS# DDR_A_RAS# DDR_A_WE#
M10
AG6 AG5
AP11 AN11
AL12 AM12 AM11
AL11 AP12 AN12
AJ14 AH14
AL15 AK15
AL14 AK14
AJ15 AH15
AE10 AF10
C5
SA_DQ[0]
D5
SA_DQ[1]
D3
SA_DQ[2]
D2
SA_DQ[3]
D6
SA_DQ[4]
C6
SA_DQ[5]
C2
SA_DQ[6]
C3
SA_DQ[7]
F10
SA_DQ[8]
F8
SA_DQ[9]
G10
SA_DQ[10]
G9
SA_DQ[11]
F9
SA_DQ[12]
F7
SA_DQ[13]
G8
SA_DQ[14]
G7
SA_DQ[15]
K4
SA_DQ[16]
K5
SA_DQ[17]
K1
SA_DQ[18]
J1
SA_DQ[19]
J5
SA_DQ[20]
J4
SA_DQ[21]
J2
SA_DQ[22]
K2
SA_DQ[23]
M8
SA_DQ[24]
N10
SA_DQ[25]
N8
SA_DQ[26]
N7
SA_DQ[27] SA_DQ[28]
M9
SA_DQ[29]
N9
SA_DQ[30]
M7
SA_DQ[31] SA_DQ[32] SA_DQ[33]
AK6
SA_DQ[34]
AK5
SA_DQ[35]
AH5
SA_DQ[36]
AH6
SA_DQ[37]
AJ5
SA_DQ[38]
AJ6
SA_DQ[39]
AJ8
SA_DQ[40]
AK8
SA_DQ[41]
AJ9
SA_DQ[42]
AK9
SA_DQ[43]
AH8
SA_DQ[44]
AH9
SA_DQ[45]
AL9
SA_DQ[46]
AL8
SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
SA_BS[0] SA_BS[1]
V6
SA_BS[2]
AE8
SA_CAS#
AD9
SA_RAS#
AF9
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0] SA_CS#[1] SA_CS#[2] SA_CS#[3]
SA_ODT[0] SA_ODT[1] SA_ODT[2] SA_ODT[3]
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]
SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
AB6 AA6 V9
AA5 AB5 V10
AB4 AA4 W9
AB3 AA3 W10
AK3 AL3 AG1 AH1
AH3 AG3 AG2 AH2
C4 G6 J3 M6 AL6 AM8 AR12 AM15
D4 F6 K3 N6 AL5 AM9 AR11 AM14
AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7
M_CLK_DDR#0 DDR_CKE0_DIMMA
M_CLK_DDR1 M_CLK_DDR#1 DDR_CKE1_DIMMA
DDR_CS0_DIMMA# DDR_CS1_DIMMA#
M_ODT0
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15
M_CLK_DDR0 <12> M_CLK_DDR#0 <12> DDR_CKE0_DIMMA <12>
M_CLK_DDR1 <12> M_CLK_DDR#1 <12> DDR_CKE1_DIMMA <12>
DDR_CS0_DIMMA# <12> DDR_CS1_DIMMA# <12>
M_ODT0 <12> M_ODT1 <12>
DDR_A_DQS#[0..7] <12>
DDR_A_DQS[0..7] <12>
DDR_A_MA[0..15] <12>
DDR_B_D[0..63]<13>
DDR_B_BS0<13> DDR_B_BS1<13> DDR_B_BS2<13>
DDR_B_CAS#<13> DDR_B_RAS#<13> DDR_B_WE#<13>
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
DDR_B_BS0 DDR_B_BS1 DDR_B_BS2
DDR_B_CAS# DDR_B_RAS# DDR_B_WE#
AM5 AM6 AR3 AP3 AN3 AN2 AN1 AP2 AP5 AN9 AT5 AT6 AP6 AN8 AR6 AR5 AR9
AJ11
AT8 AT9
AH11
AR8 AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15
AA9
AA7
AA10
AB8
AB9
C9
SB_DQ[0]
A7
SB_DQ[1]
D10
SB_DQ[2]
C8
SB_DQ[3]
A9
SB_DQ[4]
A8
SB_DQ[5]
D9
SB_DQ[6]
D8
SB_DQ[7]
G4
SB_DQ[8]
F4
SB_DQ[9]
F1
SB_DQ[10]
G1
SB_DQ[11]
G5
SB_DQ[12]
F5
SB_DQ[13]
F2
SB_DQ[14]
G2
SB_DQ[15]
J7
SB_DQ[16]
J8
SB_DQ[17]
K10
SB_DQ[18]
K9
SB_DQ[19]
J9
SB_DQ[20]
J10
SB_DQ[21]
K8
SB_DQ[22]
K7
SB_DQ[23]
M5
SB_DQ[24]
N4
SB_DQ[25]
N2
SB_DQ[26]
N1
SB_DQ[27]
M4
SB_DQ[28]
N5
SB_DQ[29]
M2
SB_DQ[30]
M1
SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
SB_BS[0] SB_BS[1]
R6
SB_BS[2]
SB_CAS# SB_RAS# SB_WE#
SB_CK[0]
SB_CLK#[0]
SB_CKE[0]
SB_CK[1]
SB_CLK#[1]
SB_CKE[1]
SB_CK[2]
SB_CLK#[2]
SB_CKE[2]
SB_CK[3]
SB_CLK#[3]
SB_CKE[3]
SB_CS#[0] SB_CS#[1] SB_CS#[2] SB_CS#[3]
SB_ODT[0] SB_ODT[1] SB_ODT[2] SB_ODT[3]
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]
SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
M_CLK_DDR0
AE2 AD2 R9
AE1 AD1 R10
AB2 AA2 T9
AA1 AB1 T10
AD3 AE3 AD6 AE6
AE4 AD4 AD5 AE5
D7 F3 K6 N3 AN5 AP9 AK12 AP15
C7 G3 J6 M3 AN6 AP8 AK11 AP14
AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4
M_CLK_DDR2 M_CLK_DDR#2
DDR_CKE2_DIMMB
M_CLK_DDR3 M_CLK_DDR#3 DDR_CKE3_DIMMB
DDR_CS2_DIMMB# DDR_CS3_DIMMB#
M_ODT2 M_ODT3M_ODT1
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15
M_CLK_DDR2 <13> M_CLK_DDR#2 <13> DDR_CKE2_DIMMB <13>
M_CLK_DDR3 <13> M_CLK_DDR#3 <13> DDR_CKE3_DIMMB <13>
DDR_CS2_DIMMB# <13> DDR_CS3_DIMMB# <13>
M_ODT2 <13> M_ODT3 <13>
DDR_B_DQS#[0..7] <13>
DDR_B_DQS[0..7] <13>
DDR_B_MA[0..15] <13>
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
A A
LinkCIS LinkCIS
TYCO_2134146-3_IVYBRIDGE~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
861Monday, April 02, 2012
861Monday, April 02, 2012
861Monday, April 02, 2012
1
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of
of
Page 9
5
4
3
2
1
CFGStrapsforProcessor
CFG2
D D
PEGStaticLaneReversal‐CFG2isforthe16x
1:(Default)NormalOperation;Lane#
JCPU1E
JCPU1E
T39 PAD~D@T39 PAD~D@
T1 PAD~D@T1 PAD~D@ T2 PAD~D@T2 PAD~D@ T3 PAD~D@T3 PAD~D@ T4 PAD~D@T4 PAD~D@
T5 PAD~D@T5 PAD~D@
T6 PAD~D@T6 PAD~D@ T7 PAD~D@T7 PAD~D@ T8 PAD~D@T8 PAD~D@
T11 PAD~D@T11 PAD~D@ T13 PAD~D@T13 PAD~D@ T15 PAD~D@T15 PAD~D@ T16 PAD~D@T16 PAD~D@
T17 PAD~D@T17 PAD~D@ T18 PAD~D@T18 PAD~D@ T19 PAD~D@T19 PAD~D@ T20 PAD~D@T20 PAD~D@ T21 PAD~D@T21 PAD~D@
T23 PAD~D@T23 PAD~D@ T24 PAD~D@T24 PAD~D@ T25 PAD~D@T25 PAD~D@
T27 PAD~D@T27 PAD~D@
T32 PAD~D@T32 PAD~D@T43PAD~D @T43PAD~D @ T34 PAD~D@T34 PAD~D@
CLK_XDP_ITP <7> CLK_XDP_ITP# <7>
T49 PAD~D@T49 PAD~D@ T50 PAD~D@T50 PAD~D@ T51 PAD~D@T51 PAD~D@
T53 PAD~D@T53 PAD~D@
RSVD28 RSVD29 RSVD30 RSVD31
RSVD32
RSVD33 RSVD34 RSVD35
RSVD37 RSVD38 RSVD39 RSVD40
RSVD51 RSVD52
BCLK_ITP
BCLK_ITP#
KEY
AH27 AH26
L7 AG7 AE7 AK2
W8
AT26 AM33 AJ27
T8 J16 H16 G16
AR35 AT34 AT33 AP35 AR34
B34 A33 A34 B35 C35
AJ32 AK32
AN35 AM35
AT2 AT1 AR1
B1
CFG0<7> CFG1<7> CFG2<7> CFG3<7> CFG4<7> CFG5<7> CFG6<7> CFG7<7> CFG8<7> CFG9<7> CFG10<7>
+VCC_GFXCORE
1 2
+VCC_CORE
RC122 49.9_0402_1%~D@RC122 49.9_0402_1%~D@
RC123 49.9_0402_1%~D@RC123 49.9_0402_1%~D@
RC120 49.9_0402_1%~D@RC120 49.9_0402_1%~D@
RC121 49.9_0402_1%~D@RC121 49.9_0402_1%~D@
1 2
1 2
1 2
C C
B B
VAXG_VAL_SENSE
100_0402_1%~D
100_0402_1%~D
12
@RC69
@ RC69
VSSAXG_VAL_SENSE
VCC_VAL_SNESE
100_0402_1%~D
100_0402_1%~D
12
@RC71
@ RC71
VSS_VAL_SNESE
CFG11<7>
CFG16<7> CFG17<7>
T22PAD~D @T22PAD~D @
T28PAD~D @T28PAD~D @ T29PAD~D @T29PAD~D @ T30PAD~D @T30PAD~D @ T31PAD~D @T31PAD~D @ T33PAD~D @T33PAD~D @ T35PAD~D @T35PAD~D @ T36PAD~D @T36PAD~D @ T26 PAD~D@T26 PAD~D@ T37PAD~D @T37PAD~D @ T38PAD~D @T38PAD~D @ T40PAD~D @T40PAD~D @ T41PAD~D @T41PAD~D @ T42PAD~D @T42PAD~D @
T44PAD~D @T44PAD~D @ T45PAD~D @T45PAD~D @ T46PAD~D @T46PAD~D @
T47PAD~D @T47PAD~D @ T48PAD~D @T48PAD~D @
T52PAD~D @T52PAD~D @
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17
VAXG_VAL_SENSE VSSAXG_VAL_SENSE VCC_VAL_SNESE VSS_VAL_SNESE
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
J15
RSVD27
CFG
CFG
VCC_DIE_SENSE VSS_DIE_SENSE
RSVD_NCTF1 RSVD_NCTF2 RSVD_NCTF3 RSVD_NCTF4 RSVD_NCTF5
RSVD_NCTF6 RSVD_NCTF7 RSVD_NCTF8
RESERVED
RESERVED
RSVD_NCTF9
RSVD_NCTF10
RSVD_NCTF11 RSVD_NCTF12 RSVD_NCTF13
CFG2
CFG4
CFG[6:5]
definitionmatchessocketpinmapdefinition 0:LaneReversed
1:Disabled;NoPhysicalDisplayPort attachedtoEmbeddedDisplayPort 0:Enabled;AnexternalDisplayPortdeviceis connectedtotheEmbeddedDisplayPort
11:(Default)x16‐Device1functions1and2disabled 10:x8,x8‐Device1function1enabled;function2 disabled
01:Reserved‐(Device1function1disabled;function 2enabled) 00:x8,x4,x4‐Device1functions1and2enabled
1K_0402_1%~D
1K_0402_1%~D
@RC51
@
12
RC51
CFG4
1K_0402_1%~D
1K_0402_1%~D
12
@RC52
@ RC52
DisplayPortPresenceStrap
CFG6 CFG5
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
12
@RC54
@
12
RC54
@RC53
@ RC53
PCIEPortBifurcationStraps
CFG7
1K_0402_1%~D
1K_0402_1%~D
12
@RC56
@ RC56
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
LinkCIS
PEGDEFERTRAINING
1:(Default)PEGTrainimmediately
CFG7
followingxxRESETBdeassertion 0:PEGWaitforBIOSfortraining
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903 4019FT
4019FT
4019FT
961Monday, April 02, 2012
961Monday, April 02, 2012
961Monday, April 02, 2012
1
of
of
of
Page 10
5
JCPU1F
JCPU1F
4
POWER
POWER
3
2
1
+VCC_CORE
53A
AG35
VCC1
AG34
VCC2
AG33
D D
C C
B B
A A
5
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
CORE SUPPLY
CORE SUPPLY
SENSE LINES SVID
SENSE LINES SVID
LinkCIS
4
VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8
VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24
VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32
PEG AND DDR
PEG AND DDR
VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39
VCCIO40
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
8.5A
AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12
E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11
J23
AJ29 AJ30 AJ28
AJ35 AJ34
B10 A10
+1.05V_RUN_VTT
H_CPU_SVIDALRT# VIDSCLK VIDSOUT
VCCSENSE_R VSSSENSE_R
VTT_SENSE VSSIO_SENSE_R
+1.05V_RUN_VTT
75_0402_1%~D
75_0402_1%~D
12
RC60
RC60
Note:PlacethePUresistorsclosetoCPU RC61closetoCPU300‐1500mils
H_CPU_SVIDALRT#
VIDSCLK <51>
PlaceRC67,RC68nearCPU
RC67 0_0402_5%~D@ RC67 0_0402_5%~D@
1 2
RC68 0_0402_5%~D@ RC68 0_0402_5%~D@
1 2
RC98 10_0402_1%~DRC98 10_0402_1%~D
10_0402_1%~D
10_0402_1%~D
12
RC133
RC133
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
1 2
RC61 43_0402_5%~DRC61 43_0402_5%~D
+1.05V_RUN_VTT
130_0402_1%~D
130_0402_1%~D
12
RC63
RC63
H_CPU_SVIDALRT#mustberoutedbetweenthe VIDSOUTandVIDSCLKlinestoreducecrosstalk. 18milsspacingtoothers.
12
CADNote:PlacethePU resistorsclosetoCPU RC63closetoCPU300‐1500mils
VIDSOUT <51>
RC75
@RC75
@
1 2
100_0402_1%~D
100_0402_1%~D
+1.05V_RUN_VTT
VTT_SENSE <49> VSSIO_SENSE_R <49>
+VCC_CORE
12
12
VIDALERT_N <51>
100_0402_1%~D
100_0402_1%~D
RC66
RC66
VCCSENSE <51>
VSSSENSE <51>
100_0402_1%~D
100_0402_1%~D
RC70
RC70
2
IccmaxcurrentchangedforPDDGRev0.7
CPUPowerRailTable
VoltageRail Voltage
VCC 530.651.3
VCCIO 1.05 8.5
5AtoMemcontroller(+1.5V_CPU_VDDQ) 56Ato2DIMMs/channel 25Ato+1.5V_RUN&+0.75V_DDR_VTT
S0Iccmax Current(A)
260.01.1VAXG
31.8VCCPLL
51.5VDDQ
60.650.9VCCSA
12161.5+1.5V_MEM
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
10 61Monday, April 02, 2012
10 61Monday, April 02, 2012
10 61Monday, April 02, 2012
1
of
of
of
Page 11
5
4
3
2
1
+1.5V_CPU_VDDQSource
+PWR_SRC_S
330K_0402_5%~D
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
12
RC74
RC74
D D
RUN_ON_CPU1.5VS3#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
QC4A
SIO_SLP_S3#<16,27,35,39,42,47,48,49>
CPU1.5V_S3_GATE<40>
RC82 0_0402_5%~D@ RC82 0_0402_5%~D@ RC79 0_0402_5%~D@ RC79 0_0402_5%~D@
1 2 1 2
QC4A
2
330K_0402_5%~D
5
+1.5V_MEM +1.5V_CPU_VDDQ
12
RC72
RC72
RUN_ON_CPU1.5VS3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
QC4B
QC4B
4
8 7 6 5
QC3
QC3
AO4304L_SO8
AO4304L_SO8
4
1M_0402_5%~D
1M_0402_5%~D
12
RC143
RC143
1
2
0.022U_0402_25V7K~D
0.022U_0402_25V7K~D
CC136
CC136
1 2 3
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
20K_0402_5%~D
20K_0402_5%~D
12
CC135
CC135
1
2
RC73
RC73
12
12
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
@RC80
@ RC80
@RC81
@ RC81
+V_DDR_SMREF
RUN_ON_CPU1.5VS3
1 2
RC135 0_0402_5%~D@RC135 0_0402_5%~D@
1 2
RC134 0_0402_5%~D@RC134 0_0402_5%~D@
NTR4503NT1G_SOT23-3~D
NTR4503NT1G_SOT23-3~D
+1.5V_MEM
@
@
@QC5
@
1
+V_DDR_REF
+1.5V_CPU_VDDQ
1K_0402_1%~D
1K_0402_1%~D
12
RC84
RC84
12
1K_0402_1%~D
1K_0402_1%~D
RC78
RC78
+V_SM_VREF_CNT
QC5
3
2
RUN_ON_CPU1.5VS3# <7,42>
+VCC_GFXCORE
100_0402_1%~D
100_0402_1%~D
12
RC99
100_0402_1%~D
100_0402_1%~D
12
+DIMM0_1_VREF_CPU +DIMM0_1_CA_CPU
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC161
CC161
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@CC168
@ CC168
1
1
2
2
VCCSA_SENSE <50>
VCCSA_VID_0 <50> VCCSA_VID_1 <50>
RC99
1 2
100_0402_1%~D
100_0402_1%~D
RC100
RC100
+V_SM_VREFshould have10miltracewidth
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC163
CC163
CC162
CC162
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC170
CC170
CC169
CC169
1
1
2
2
VCCP_PWRCTRL <49>
RC76
@RC76
@
+1.5V_CPU_VDDQ
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC164
CC164
CC165
CC165
2
2
+VCC_SA
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CC171
CC171
1
CC172
CC172
+
+
2
VCC_AXG_SENSE <51> VSS_AXG_SENSE <51>
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
1
+
+
CC166
CC166
CC167
CC167
2
CC178 0.1U_0402_10V7K~DCC178 0.1U_0402_10V7K~D
12
CC179 0.1U_0402_10V7K~DCC179 0.1U_0402_10V7K~D
12
CC149 0.1U_0402_10V7K~DCC149 0.1U_0402_10V7K~D
12
CC150 0.1U_0402_10V7K~DCC150 0.1U_0402_10V7K~D
12
+1.5V_CPU_VDDQ
+1.5V_MEM
1
CC153
CC153
@
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
ESDRequest
6A
1
CC151
CC151 @
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
CC152
CC152 @
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+1.5V_MEM
POWER
+VCC_GFXCORE
C C
B B
+DIMM0_1_VREF_CPU
1 2
RC96 1K_0402_1%~D@RC96 1K_0402_1%~D@ RC97 1K_0402_1%~D@RC97 1K_0402_1%~D@
A A
1 2
+DIMM0_1_CA_CPU
+1.8V_RUN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CC173
CC173
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CC174
CC174
2
2
330U_D2_2.5VM_R6M~D
330U_D2_2.5VM_R6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CC176
CC176
CC175
CC175
+
+
2
33A
1.2A
AT24 AT23 AT21 AT20 AT18
AT17 AR24 AR23 AR21 AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18 AN17
AM24 AM23 AM21 AM20 AM18 AM17
AL24 AL23 AL21 AL20 AL18 AL17 AK24 AK23 AK21 AK20 AK18 AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17 AH24 AH23 AH21 AH20 AH18 AH17
JCPU1G
JCPU1G
VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54
B6
VCCPLL1
A6
VCCPLL2
A2
VCCPLL3
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
POWER
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
SA_DIMM_VREFDQ SB_DIMM_VREFDQ
VREFMISC
VREFMISC
GRAPHICS
GRAPHICS
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VCCSA_SENSE
1.8V RAIL
1.8V RAIL
LinkCIS
VAXG_SENSE
SM_VREF
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8
VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15
VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8
VCCSA_VID[0] VCCSA_VID[1]
VCCIO_SEL
AK35 AK34
AL1
+V_SM_VREF_CNT
+DIMM0_1_VREF_CPU
B4
+DIMM0_1_CA_CPU
D1
5A
AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1
6A
M27 M26 L26 J26 J25 J24 H26 H25
H23
C22 C24
1 2
A19
RC140 0_0402_5%~D@ RC140 0_0402_5%~D@
DepopRC140forES2CPU
JCPU1H
JCPU1H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
VSS7
AT16
VSS8
AT13
VSS9
AT10
VSS10
AT7
VSS11
AT4
VSS12
AT3
VSS13
AR25
VSS14
AR22
VSS15
AR19
VSS16
AR16
VSS17
AR13
VSS18
AR10
VSS19
AR7
VSS20
AR4
VSS21
AR2
VSS22
AP34
VSS23
AP31
VSS24
AP28
VSS25
AP25
VSS26
AP22
VSS27
AP19
VSS28
AP16
VSS29
AP13
VSS30
AP10
VSS31
AP7
VSS32
AP4
VSS33
AP1
VSS34
AN30
VSS35
AN27
VSS36
AN25
VSS37
AN22
VSS38
AN19
VSS39
AN16
VSS40
AN13
VSS41
AN10
VSS42
AN7
VSS43
AN4
VSS44
AM29
VSS45
AM25
VSS46
AM22
VSS47
AM19
VSS48
AM16
VSS49
AM13
VSS50
AM10
VSS51
AM7
VSS52
AM4
VSS53
AM3
VSS54
AM2
VSS55
AM1
VSS56
AL34
VSS57
AL31
VSS58
AL28
VSS59
AL25
VSS60
AL22
VSS61
AL19
VSS62
AL16
VSS63
AL13
VSS64
AL10
VSS65
AL7
VSS66
AL4
VSS67
AL2
VSS68
AK33
VSS69
AK30
VSS70
AK27
VSS71
AK25
VSS72
AK22
VSS73
AK19
VSS74
AK16
VSS75
AK13
VSS76
AK10
VSS77
AK7
VSS78
AK4
VSS79
AJ25
VSS80
TYCO_2134146-3_IVYBRIDGE~D
TYCO_2134146-3_IVYBRIDGE~D
VSS
VSS
LinkCIS
VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160
AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
3
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc. SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
11 61Monday, April 02, 2012
11 61Monday, April 02, 2012
11 61Monday, April 02, 2012
B
B
B
of
of
of
Page 12
5
4
3
2
1
AllVREFtracesshould
DDR_A_DQS#[0..7]<8>
DDR_A_D[0..63]<8> DDR_A_DQS[0..7]<8>
DDR_A_MA[0..15]<8>
D D
PopulateRD1,DePopulateRD7forIntelDDR3 VREFDQmultiplemethodsM1 PopulateRD7,DePopulateRD1forIntelDDR3 VREFDQmultiplemethodsM3
+V_DDR_REFA_M3
+V_DDR_REF
have10miltracewidth
1 2
RD7 0_0402_5%~D@ RD7 0_0402_5%~D@
1 2
RD1 0_0402_5%~D@ RD1 0_0402_5%~D@
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
1
CD1
CD1
2
2
LayoutNote: PlacenearJDIMM1
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C C
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD7
CD7
CD9
CD9
CD8
CD8
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD3
CD3
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD10
CD10
1
2
1U_0402_6.3V6K~D
1
1
CD4
CD4
CD5
CD5
CD6
CD6
2
2
10U_0603_6.3V6M~D
CD11
CD11
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
CD51
CD51
330U_SX_2VY~D
330U_SX_2VY~D
1
CD13
CD13
CD14
CD14
1
+
+
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
DDR_CKE0_DIMMA<8>
DDR_A_BS2<8>
M_CLK_DDR0<8> M_CLK_DDR#0<8>
DDR_A_BS0<8> DDR_A_WE#<8>
DDR_A_CAS#<8>
DDR_CS1_DIMMA#<8>
LayoutNote: PlacenearJDIMM1.203,204
B B
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD17
CD17
2
2
A A
1
1
CD19
CD19
CD18
CD18
2
2
RD2 10K_0402_5%~DRD2 10K_0402_5%~D
RD3 10K_0402_5%~DRD3 10K_0402_5%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD20
CD20
1 2
1 2
DIMM1_SA0
DIMM1_SA1
+3.3V_RUN
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D +0.75V_DDR_VTT
1
CD21
CD21
CD22
CD22
2
JDIMM1RevTypeH=8mm
23Ato1DIMMs/channel
+DIMM1_VREF_DQ
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD2
CD2
+1.5V_MEM
DDR_A_D0 DDR_A_D1
DDR_A_D2 DDR_A_D3
DDR_A_D8 DDR_A_D9
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_D26 DDR_A_D27
DDR_A_MA12 DDR_A_MA9
DDR_A_MA8 DDR_A_MA5
DDR_A_MA3 DDR_A_MA1
DDR_A_MA10
DDR_A_MA13
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_D42 DDR_A_D43
DDR_A_D48 DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_D58 DDR_A_D59
DIMM1_SA0 DIMM1_SA1
JDIMM1
JDIMM1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1 VSS49DQS#0
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9 VSS925VSS10
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2 DQS247VSS17 VSS1849DQ22
51
DQ18 DQ1953VSS19 VSS2055DQ28
57
DQ24 DQ2559VSS21 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3 A12/BC#83A11
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1 VDD999VDD10
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
LCN_DAN06-K4806-0103
LCN_DAN06-K4806-0103 CONN@
CONN@
LinkCIS
VSS3
DQS0
VSS6
VSS8 DQ12 DQ13
DQ14 DQ15
DQ20 DQ21
DQ23
DQ29
DQS3 DQ30
DQ31
CKE1 VDD2
VDD4
VDD6
VDD8
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30 VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42 VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
VTT2
DQ4 DQ5
DQ6 DQ7
DM1
DM2
A15 A14
A7 A6
A4 A2
A0
CK1
BA1
S0#
NC2
DM4
DM6
SDA SCL
G2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
+1.5V_MEM
DDR3_DRAMRST#_R
DDR_A_D4 DDR_A_D5
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D6 DDR_A_D7
DDR_A_D12 DDR_A_D13
DDR_A_D14 DDR_A_D15
DDR_A_D20 DDR_A_D21
DDR_A_D22 DDR_A_D23
DDR_A_D28 DDR_A_D29
DDR_A_DQS#3 DDR_A_DQS3
DDR_A_D30 DDR_A_D31
DDR_A_MA15 DDR_A_MA14
DDR_A_MA11 DDR_A_MA7
DDR_A_MA6 DDR_A_MA4
DDR_A_MA2 DDR_A_MA0
DDR_A_D36 DDR_A_D37
DDR_A_D38 DDR_A_D39
DDR_A_D44 DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5 DDR_A_D46
DDR_A_D47 DDR_A_D52
DDR_A_D53
DDR_A_D54 DDR_A_D55
DDR_A_D60 DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7 DDR_A_D62
DDR_A_D63
+0.75V_DDR_VTT
DDR_CKE1_DIMMA <8>
M_CLK_DDR1 <8>
M_CLK_DDR#1 <8>
DDR_A_BS1 <8>
DDR_A_RAS# <8>
DDR_CS0_DIMMA# <8>
M_ODT0 <8> M_ODT1 <8>
DDR_XDP_WAN_SMBDAT <7,13,14,15,27,34>
DDR_XDP_WAN_SMBCLK <7,13,14,15,27,34>
+DIMM1_VREF_CA
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
CD15
CD15
1
1
2
2
RD11 0_0402_5%~D@RD11 0_0402_5%~D@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD16
CD16
1 2
RD28 1K_0402_1%~DRD28 1K_0402_1%~D
RD29 0_0402_5%~D@ RD29 0_0402_5%~D@
1 2
QD1
QD1
D
S
D
S
BSS138_NL_SOT23-3
BSS138_NL_SOT23-3
RD30 0_0402_5%~D@ RD30 0_0402_5%~D@
G
G
2
1 2
S
S
G
G
2
13
QD2
QD2
D
D
BSS138_NL_SOT23-3
BSS138_NL_SOT23-3
13
+DIMM0_1_VREF_CPU
DDR_HVREF_RST<7>
+DIMM0_1_CA_CPU
DDR_HVREF_RST
M3Circuit(ProcessorGeneratedSODIMMVREF_DQ)
12
+V_DDR_REF
+1.5V_MEM
1K_0402_1%~D
1K_0402_1%~D
12
RD27
RD27
DDR3_DRAMRST# <7>DDR3_DRAMRST#_R<13>
+V_DDR_REFA_M3
+V_DDR_REFB_M3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
3
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
12 61Monday, April 02, 2012
12 61Monday, April 02, 2012
12 61Monday, April 02, 2012
B
B
B
of
of
of
Page 13
5
4
3
2
1
DDR_B_DQS#[0..7]<8>
DDR_B_D[0..63]<8> DDR_B_DQS[0..7]<8>
DDR_B_MA[0..15]<8>
D D
+V_DDR_REF
+V_DDR_REFB_M3
AllVREFtracesshould have10miltracewidth
1 2
RD4 0_0402_5%~D@RD4 0_0402_5%~D@
1 2
RD8 0_0402_5%~D@RD8 0_0402_5%~D@
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
CD23
CD23
1
1
2
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD24
CD24
PopulateRD4,DePopulateRD8forIntelDDR3 VREFDQmultiplemethodsM1 PopulateRD8,DePopulateRD4forIntelDDR3 VREFDQmultiplemethodsM3
LayoutNote: PlacenearJDIMM2
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
C C
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
B B
1
CD25
CD25
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD29
CD29
1
2
1U_0402_6.3V6K~D
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD30
CD30
1
2
CD26
CD26
CD31
CD31
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD27
CD27
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD32
CD32
CD33
CD33
1
2
CD28
CD28
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD34
CD34
1
1
2
2
CD35
CD35
1
+
+
2
330U_SX_2VY~D
330U_SX_2VY~D
CD36
CD36
DDR_CKE2_DIMMB<8>
DDR_B_BS2<8>
M_CLK_DDR2<8> M_CLK_DDR#2<8>
DDR_B_BS0<8> DDR_B_WE#<8>
DDR_B_CAS#<8>
DDR_CS3_DIMMB#<8>
LayoutNote: PlacenearJDIMM2.203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
2
A A
5
CD39
CD39
CD40
CD40
2
1
1
2
CD41
CD41
CD42
CD42
2
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
CD43
CD43
CD44
CD44
1
2
+3.3V_RUN
RD5 10K_0402_5%~DRD5 10K_0402_5%~D
RD6 10K_0402_5%~DRD6 10K_0402_5%~D
4
12
12
DIMM2_SA1
DIMM2_SA0
1
2
JDIMM2RevTypeH=4
23Ato1DIMMs/channel
+1.5V_MEM+DIMM2_VREF_DQ
DDR_B_D0 DDR_B_D1
DDR_B_D2 DDR_B_D3
DDR_B_D8 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D10 DDR_B_D11
DDR_B_D16 DDR_B_D17
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D18 DDR_B_D19
DDR_B_D24 DDR_B_D25
DDR_B_D26 DDR_B_D27
DDR_B_BS2 DDR_B_MA12
DDR_B_MA9 DDR_B_MA8
DDR_B_MA5 DDR_B_MA3
DDR_B_MA1 M_CLK_DDR2
M_CLK_DDR#2 DDR_B_MA10
DDR_B_BS0 DDR_B_WE#
DDR_B_CAS# DDR_B_MA13
DDR_B_D32 DDR_B_D33
DDR_B_DQS#4 DDR_B_DQS4
DDR_B_D34 DDR_B_D35
DDR_B_D40 DDR_B_D41
DDR_B_D42 DDR_B_D43
DDR_B_D48 DDR_B_D49
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D50 DDR_B_D51
DDR_B_D56 DDR_B_D57
DDR_B_D58 DDR_B_D59
DIMM2_SA0 DIMM2_SA1
+0.75V_DDR_VTT +0.75V_DDR_VTT
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
3
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
JDIMM2
JDIMM2
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
207
BOSS1
LCN_DAN06-K4406-0103
LCN_DAN06-K4406-0103 CONN@
CONN@
LinkCIS
RESET#
VREF_CA
EVENT#
DQS0#
DQS0
DQ12 DQ13
DM1
DQ14 DQ15
DQ20 DQ21
DM2
DQ22 DQ23
DQ28 DQ29
DQS3#
DQS3 DQ30
DQ31
CKE1
VDD
VDD
VDD
VDD
VDD
CK1#
VDD
RAS#
VDD
ODT0
VDD
ODT1
VDD
DQ36 DQ37
DM4
DQ38 DQ39
DQ44 DQ45
DQS5#
DQS5 DQ46
DQ47 DQ52
DQ53
DM6
DQ54 DQ55
DQ60 DQ61
DQS7#
DQS7 DQ62
DQ63
GND2
BOSS2
+1.5V_MEM
2
VSS
4
DQ4
6
DQ5
8
VSS
10 12 14
VSS
16
DQ6
18
DQ7
20
VSS
22 24 26
VSS
28 30 32
VSS
34 36 38
VSS
40 42 44
VSS
46 48
VSS
50 52 54
VSS
56 58 60
VSS
62 64 66
VSS
68 70 72
VSS
74 76 78
A15
80
A14
82 84
A11
86
A7
88 90
A6
92
A4
94 96
A2
98
A0
100 102
CK1
104 106 108
BA1
110 112 114
S0#
116 118 120 122
NC
124 126 128
VSS
130 132 134
VSS
136 138
VSS
140 142 144
VSS
146 148 150
VSS
152 154 156
VSS
158 160 162
VSS
164 166 168
VSS
170 172
VSS
174 176 178
VSS
180 182 184
VSS
186 188 190
VSS
192 194 196
VSS
198 200
SDA
202
SCL
204
VTT
206 208
DDR_B_D4 DDR_B_D5
DDR_B_DQS#0 DDR_B_DQS0
DDR_B_D6 DDR_B_D7
DDR_B_D12 DDR_B_D13
DDR_B_D14 DDR_B_D15
DDR_B_D20 DDR_B_D21
DDR_B_D22 DDR_B_D23
DDR_B_D28 DDR_B_D29
DDR_B_DQS#3 DDR_B_DQS3
DDR_B_D30 DDR_B_D31
DDR_B_MA15 DDR_B_MA14
DDR_B_MA11 DDR_B_MA7
DDR_B_MA6 DDR_B_MA4
DDR_B_MA2 DDR_B_MA0
M_CLK_DDR3 M_CLK_DDR#3
DDR_B_BS1 DDR_B_RAS#
M_ODT2 M_ODT3
DDR_B_D36 DDR_B_D37
DDR_B_D38 DDR_B_D39
DDR_B_D44 DDR_B_D45
DDR_B_DQS#5 DDR_B_DQS5
DDR_B_D46 DDR_B_D47
DDR_B_D52 DDR_B_D53
DDR_B_D54 DDR_B_D55
DDR_B_D60 DDR_B_D61
DDR_B_DQS#7 DDR_B_DQS7
DDR_B_D62 DDR_B_D63
2
DDR3_DRAMRST#_R <12>
DDR_CKE3_DIMMB <8>
M_CLK_DDR3 <8>
M_CLK_DDR#3 <8>
DDR_B_BS1 <8>
DDR_B_RAS# <8> DDR_CS2_DIMMB# <8>
M_ODT2 <8> M_ODT3 <8>
+DIMM2_VREF_CA
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
1
CD37
CD37
2
2
DDR_XDP_WAN_SMBDAT <7,12,14,15,27,34>
DDR_XDP_WAN_SMBCLK <7,12,14,15,27,34>
RD15 0_0402_5%~D@ RD15 0_0402_5%~D@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD38
CD38
12
+V_DDR_REF
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
13 61Monday, April 02, 2012
13 61Monday, April 02, 2012
13 61Monday, April 02, 2012
of
of
of
B
B
B
Page 14
5
+RTC_CELL
330K_0402_1%~D
330K_0402_1%~D
12
RH38
RH38
PCH_INTVRMEN
330K_0402_1%~D
330K_0402_1%~D
12
@RH39
@
D D
C C
RH39
INTVRMEN‐IntegratedSUS
1.1VVRMEnable High‐EnableInternalVRs Low‐EnableExternalVRs
1
1
@
@ ME1 SHORT PADS~D
ME1 SHORT PADS~D
CH5 1U_0402_6.3V6K~DCH5 1U_0402_6.3V6K~D
CMOS_CLR1
ME_CLR1
Shunt ClearMERTCRegisters
Open
PCH_AZ_CODEC_SDOUT<29>
PCH_AZ_CODEC_SYNC<29>
PCH_AZ_CODEC_RST#<29>
PCH_AZ_CODEC_BITCLK<29>
B B
1
2
+3.3V_ALW_PCH
1K_0402_1%~D
1K_0402_1%~D
12
RH66
RH66
PCH_AZ_SYNC
100K_0402_5%~D
100K_0402_5%~D
12
@RH282
@ RH282
PCH_AZ_SYNCissampled attherisingedgeofRSMRST#pin. SosignalshouldbePUtotheALWAYSrail.
+RTC_CELL
2
2
1 2
CMOSsetting
Shunt
Open
ClearCMOS
KeepCMOS
TPMsetting
KeepMERTCRegisters
RH29 33_0402_5%~DRH29 33_0402_5%~D
1 2
RH26 33_0402_5%~DRH26 33_0402_5%~D
1 2
RH27 33_0402_5%~DRH27 33_0402_5%~D
1 2
RH25 33_0402_5%~DRH25 33_0402_5%~D
1 2
27P_0402_50V8J~D
27P_0402_50V8J~D
@CH101
@ CH101
RH22 20K_0402_5%~DRH22 20K_0402_5%~D
1 2
RH23 20K_0402_5%~DRH23 20K_0402_5%~D
1 2
RH11 1M_0402_5%~DRH11 1M_0402_5%~D
1 2
1
1
@
@ CMOS1 SHORT PADS~D
CMOS1 SHORT PADS~D
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH4
CH4
CMOS place near DIMM
PCH_AZ_SDOUT PCH_AZ_SYNC_Q PCH_AZ_RST# PCH_AZ_BITCLK
PCH_AZ_SYNC_Q
1 2
RH31 1M_0402_5%~DRH31 1M_0402_5%~D
2
2
+3.3V_ALW_PCH
0_0603_5%~D
0_0603_5%~D
12
INTELHDA_SYNCisolationcircuit
3.3K_0402_5%~D
3.3K_0402_5%~D
12
R890
R890
200MILSO8 64MbFlashROM
U52
SPI_PCH_CS0# SPI_PCH_CS0#_R
1 2
R935 47_0402_5%~DR935 47_0402_5%~D
SPI_PCH_DIN SPI_DIN64
1 2
R894 33_0402_5%~DR894 33_0402_5%~D
SPI_WP#_SEL_R
5
R898 0_0402_5%~D@R898 0_0402_5%~D@
1 2
SPI_WP#_SEL<39>
A A
U52
1
/CS
2
DO
3
/WP GND4DIO
W25Q64CVSSIG_SO8
W25Q64CVSSIG_SO8
/HOLD
8
VCC
7 6
CLK
5
SLP_ME_CSW_DEV#<18,39> USB_MCARD1_DET#<18,34>
SIO_EXT_SCI#_R<18>
PCH_RSMRST#_Q<16,41>
@
@
RH288
RH288
+3.3V_ALW_PCH_JTAG
+5V_RUN
G
G
2
13
D
S
D
S
QH7
QH7
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
+3.3V_SPI
SPI_CLK64
R899 33_0402_5%~DR899 33_0402_5%~D
SPI_DO64
R901 33_0402_5%~DR901 33_0402_5%~D
4
USB_OC0#_R<17> USB_OC1#_R<17>
USB_OC2#<17> USB_OC3#<17>
USB_OC4#_R<17>
USB_OC5#<17> USB_OC6#<17>
SIO_EXT_SMI#<17,40>
PCH_GPIO36<18> PCH_GPIO37<18> PCH_GPIO16<18>
TEMP_ALERT#<18,39>
PCH_GPIO15<18>
CH2
CH2
12
15P_0402_50V8J~D
15P_0402_50V8J~D
CH3
CH3
12
15P_0402_50V8J~D
15P_0402_50V8J~D
@CH100
@
27P_0402_50V8J~D
27P_0402_50V8J~D
PCH_AZ_MDC_BITCLK<37> PCH_AZ_MDC_SYNC<37>
SPKR<29>
PCH_AZ_MDC_RST#<37>
+3.3V_ALW_PCH
PCH_AZ_MDC_SDOUT<37>
ME_FWP<39>
RH59 51_0402_1%~DRH59 51_0402_1%~D RH44 200_0402_1%~DRH44 200_0402_1%~D RH45 200_0402_1%~DRH45 200_0402_1%~D RH43 200_0402_1%~DRH43 200_0402_1%~D
PCH_AZ_SYNC
C746
C746
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
3.3K_0402_5%~D
3.3K_0402_5%~D
12
R891
R891
SPI_HOLD#
SPI_PCH_CLK
1 2
SPI_PCH_DO
1 2
4
3
USB_OC0#_R USB_OC1#_R USB_OC2# USB_OC3# USB_OC4#_R USB_OC5# USB_OC6# SIO_EXT_SMI# SLP_ME_CSW_DEV# USB_MCARD1_DET#
HDD_DET#_R
BBS_BIT0_R PCH_GPIO36 PCH_GPIO37 PCH_GPIO16 TEMP_ALERT# PCH_GPIO15 SIO_EXT_SCI#_R PCH_RSMRST#_Q RSMRST#_XDP
12
YH1
YH1
32.768KHZ_12.5PF_Q13FC1350000~D
32.768KHZ_12.5PF_Q13FC1350000~D
PCH_RTCX2_R
CH100
12
PCH_AZ_CODEC_SDIN0<29>
PCH_AZ_MDC_SDIN1<37>
12 12 12 12
RH1 33_0402_5%~DPXDP@ RH1 33_0402_5%~DPXDP@
1 2
RH3 33_0402_5%~DPXDP@ RH3 33_0402_5%~DPXDP@
1 2
RH4 33_0402_5%~DPXDP@ RH4 33_0402_5%~DPXDP@
1 2
RH5 33_0402_5%~DPXDP@ RH5 33_0402_5%~DPXDP@
1 2
RH6 33_0402_5%~DPXDP@ RH6 33_0402_5%~DPXDP@
1 2
RH7 33_0402_5%~DPXDP@ RH7 33_0402_5%~DPXDP@
1 2
RH8 33_0402_5%~DPXDP@ RH8 33_0402_5%~DPXDP@
1 2
RH9 33_0402_5%~DPXDP@ RH9 33_0402_5%~DPXDP@
1 2
RH10 33_0402_5%~DPXDP@ RH10 33_0402_5%~DPXDP@
1 2
RH12 33_0402_5%~DPXDP@ RH12 33_0402_5%~DPXDP@
1 2
RH13 33_0402_5%~DPXDP@ RH13 33_0402_5%~DPXDP@
1 2
RH14 33_0402_5%~DPXDP@ RH14 33_0402_5%~DPXDP@
1 2
RH15 33_0402_5%~DPXDP@ RH15 33_0402_5%~DPXDP@
1 2
RH16 33_0402_5%~DPXDP@ RH16 33_0402_5%~DPXDP@
1 2
RH17 33_0402_5%~DPXDP@ RH17 33_0402_5%~DPXDP@
1 2
RH18 33_0402_5%~DPXDP@ RH18 33_0402_5%~DPXDP@
1 2
RH19 33_0402_5%~DPXDP@ RH19 33_0402_5%~DPXDP@
1 2
RH20 33_0402_5%~DPXDP@ RH20 33_0402_5%~DPXDP@
1 2
RH24 1K_0402_1%~DPXDP@ RH24 1K_0402_1%~DPXDP@
1 2
PCH_RTCX1
1 2
RH286 0_0402_5%~D@ RH286 0_0402_5%~D@
1 2
RH32 33_0402_5%~DRH32 33_0402_5%~D
1 2
RH33 33_0402_5%~DRH33 33_0402_5%~D
1 2
RH34 33_0402_5%~DRH34 33_0402_5%~D
RH287 1K_0402_1%~D@RH287 1K_0402_1%~D@
1 2
RH36 33_0402_5%~DRH36 33_0402_5%~D
1 2
RH50 1K_0402_1%~DRH50 1K_0402_1%~D
1 2
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
12
12
@
@
@
@
RH48
RH48
RH49
RH49
PCH_SPI_CLK
10P_0402_50V8J~D
10P_0402_50V8J~D
@
@
1
CE15
CE15
2
10M_0402_5%~D
10M_0402_5%~D
12
RH2
RH2
PCH_RTCX2 PCH_RTCRST# SRTCRST# INTRUDER# PCH_INTVRMEN
PCH_AZ_CODEC_SDIN0
PCH_AZ_MDC_SDIN1
100_0402_1%~D
100_0402_1%~D
12
@
@
RH47
RH47
PCH_AZ_BITCLK PCH_AZ_SYNCPCH_AZ_SYNC_Q
PCH_AZ_RST#
PCH_AZ_SDOUT
PCH_GPIO33 PCH_GPIO13
PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO
PCH_SPI_CLK PCH_SPI_CS0# PCH_SPI_CS1#
PCH_SPI_DO PCH_SPI_DIN
XDP_FN0 XDP_FN1 XDP_FN2 XDP_FN3 XDP_FN4 XDP_FN5 XDP_FN6 XDP_FN7 XDP_FN8 XDP_FN9 XDP_FN10 XDP_FN11 XDP_FN12 XDP_FN13 XDP_FN14 XDP_FN15 XDP_FN16 XDP_FN17
A20 C20 D20 G22 K22 C17
N34 L34 T10 K34
E34 G34 C34 A34
A36
C36 N32
Y14
ClosetoUH4.T3
SPI_PCH_CS1#
R936 47_0402_5%~DR936 47_0402_5%~D
1 2
R895 33_0402_5%~DR895 33_0402_5%~D
1 2
SPI_CLK64
33_0402_5%~D
33_0402_5%~D
12
@RE1
@ RE1
27P_0402_50V8J~D
27P_0402_50V8J~D
@CE1
@
1
CE1
2
ClosetoU52
3
UH4A
UH4A
RTCX1 RTCX2 RTCRST# SRTCRST# INTRUDER# INTVRMEN
HDA_BCLK HDA_SYNC SPKR HDA_RST#
HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3
HDA_SDO
HDA_DOCK_EN# / GPIO33 HDA_DOCK_RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
BD82QM77 QPRG C1_BGA989~D
BD82QM77 QPRG C1_BGA989~D
SPI_PCH_CS1#_R SPI_DIN32 SPI_WP#_SEL_R
DDR_XDP_WAN_SMBDAT<7,12,13,15,27,34>
DDR_XDP_WAN_SMBCLK<7,12,13,15,27,34>
LPC
LPC
FWH4 / LFRAME#
LDRQ1# / GPIO23
RTCIHDA
RTCIHDA
SATA 6G
SATA 6G
SATA
SATA
SATAICOMPO
JTAG
JTAG
SATA3RCOMPO
SATA3COMPI
SATA0GP / GPIO21
SPI
SPI
SATA1GP / GPIO19
U53
U53
1
CS#
2
DO
HOLD#
3
WP#
4
GND
W25Q32BVSSIG_SO8~D
W25Q32BVSSIG_SO8~D
200MILSO8 32MbFlashROM
+3.3V_ALW_PCH
1.05V_0.8V_PWROK<40,51> SIO_PWRBTN#_R<7,16>
FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3
LDRQ0#
SERIRQ
SATA0RXN SATA0RXP SATA0TXN SATA0TXP
SATA1RXN SATA1RXP SATA1TXN SATA1TXP
SATA2RXN SATA2RXP SATA2TXN SATA2TXP
SATA3RXN SATA3RXP SATA3TXN SATA3TXP
SATA4RXN SATA4RXP SATA4TXN SATA4TXP
SATA5RXN SATA5RXP SATA5TXN SATA5TXP
SATAICOMPI
SATA3RBIAS
SATALED#
RH283 1K_0402_1%~DPXDP@RH283 1K_0402_1%~DPXDP@
RH21 0_0402_5%~DPXDP@RH21 0_0402_5%~DPXDP@
RH284 0_0402_5%~DPXDP@RH284 0_0402_5%~DPXDP@
1 2 1 2
RH285 0_0402_5%~D
RH285 0_0402_5%~D
PXDP@
PXDP@
LPC_LAD0
C38
LPC_LAD1
A38
LPC_LAD2
B37
LPC_LAD3
C37
LPC_LFRAME#
D36 E36
LPC_LDRQ1#
K36
IRQ_SERIRQ
V5
AM3 AM1 AP7 AP5
AM10 AM8 AP11 AP10
AD7 AD5 AH5 AH4
AB8 AB10 AF3 AF1
Y7 Y5 AD3 AD1
Y3 Y1 AB3 AB1
Y11
SATA_COMP
Y10
AB12
SATA3_COMP
AB13
RBIAS_SATA3
AH1
SATA_ACT#
P3
HDD_DET#_R
V14
BBS_BIT0_R
P1
PCH_PLTRST#<7,17>
BBS_BIT0‐BIOSBOOTSTRAPBIT0
+3.3V_SPI
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
8
VCC
SPI_HOLD#SPI_PCH_DIN
7 6
CLK
SPI_DO32
5
DI
SPI_CLK32
ClosetoU53
2
XDP_FN0
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D XDP_FN1
PXDP@ CH1
PXDP@
1
2
1 2 1 2
C745
C745
1 2
R897 33_0402_5%~DR897 33_0402_5%~D R900 33_0402_5%~DR900 33_0402_5%~D
XDP_FN2 XDP_FN3
CH1
XDP_FN4 XDP_FN5
XDP_FN6 XDP_FN7
1.05V_0.8V_PWROK_R PCH_PWRBTN#_XDP
DDR_XDP_WAN_SMBDAT_R2 DDR_XDP_WAN_SMBCLK_R2
LPC_LAD0 <32,34,39,40> LPC_LAD1 <32,34,39,40> LPC_LAD2 <32,34,39,40> LPC_LAD3 <32,34,39,40>
LPC_LFRAME# <32,34,39,40>
LPC_LDRQ1# <39> IRQ_SERIRQ <32,39,40>
PSATA_PRX_DTX_N0_C <27> PSATA_PRX_DTX_P0_C <27> PSATA_PTX_DRX_N0_C <27> PSATA_PTX_DRX_P0_C <27>
SATA_ODD_PRX_DTX_N1_C <28> SATA_ODD_PRX_DTX_P1_C <28> SATA_ODD_PTX_DRX_N1_C <28> SATA_ODD_PTX_DRX_P1_C <28>
ESATA_PRX_DTX_N4_C <36> ESATA_PRX_DTX_P4_C <36> ESATA_PTX_DRX_N4_C <36> ESATA_PTX_DRX_P4_C <36>
SATA_PRX_DKTX_N5_C <38> SATA_PRX_DKTX_P5_C <38> SATA_PTX_DKRX_N5_C <38> SATA_PTX_DKRX_P5_C <38>
1 2
RH40 37.4_0402_1%~DRH40 37.4_0402_1%~D
1 2
RH42 49.9_0402_1%~DRH42 49.9_0402_1%~D
1 2
RH46 750_0402_1%~DRH46 750_0402_1%~D
SATA_ACT# <43>
RH290 0_0402_5%~D@ RH290 0_0402_5%~D@
1 2
D
S
D
S
1 3
BSS138W-7-F_SOT323-3~D
BSS138W-7-F_SOT323-3~D
G
G
2
1 2 1 2
33_0402_5%~D
33_0402_5%~D
12
@RE2
@ RE2
27P_0402_50V8J~D
27P_0402_50V8J~D
@CE2
@
1
CE2
2
2
QH1
QH1
+3.3V_ALW_PCH
+1.05V_RUN
+1.05V_RUN
SPI_PCH_CLKSPI_CLK32
SPI_PCH_DO
JXDP2
JXDP2
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/HOOK0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH-030-01-L-D-A CONN@
SAMTE_BSH-030-01-L-D-A CONN@
HDD
ODD/ E Module Bay
E-SATA
DOCK
HDD_DET# <27>
PCH_SATA_MOD_EN# <40>
+3.3V_SPI
+3.3V_M_RUN
HM76(w/ovpro):depopRH350andpopRH359 QM77(w/vpro):popRH350anddepopRH359
1
2
GND1
XDP_FN16
4
OBSFN_C0 OBSFN_C1
OBSDATA_C0 OBSDATA_C1
OBSDATA_C2 OBSDATA_C3
OBSFN_D0 OBSFN_D1
OBSDATA_D0 OBSDATA_D1
GND11 OBSDATA_D2 OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
GND17
RH360 0_0603_5%~DRH360 0_0603_5%~D
RH359 0_0603_5%~D@ RH359 0_0603_5%~D@
RH350 0_0603_5%~DRH350 0_0603_5%~D
GND3
GND5
GND7
GND9
TD0
TRST#
TDI
TMS
PCH_GPIO33 IRQ_SERIRQ BBS_BIT0_R HDD_DET# SPKR
PCH_GPIO13
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
+3.3V_M_RUN
XDP_FN17 XDP_FN8
XDP_FN9 XDP_FN10
XDP_FN11
XDP_FN12 XDP_FN13
XDP_FN14 XDP_FN15
+3.3V_ALW_PCH
RSMRST#_XDP XDP_DBRESET#
PCH_JTAG_TDO PCH_JTAG_TDI
PCH_JTAG_TMSPCH_JTAG_TCK
RH355 100K_0402_5%~DRH355 100K_0402_5%~D
12
RH28 8.2K_0402_5%~DRH28 8.2K_0402_5%~D
12
RH52 4.7K_0402_5%~DRH52 4.7K_0402_5%~D
12
RH30 10K_0402_5%~DRH30 10K_0402_5%~D
12
RH35 10K_0402_5%~D@ RH35 10K_0402_5%~D@
12
NoRebootStrap
Low=Default
SPKR
High=NoReboot
R712 100K_0402_5%~DR712 100K_0402_5%~D
12
SPI_PCH_CS1#
RH3450_0402_5%~D RH3450_0402_5%~D
12
PCH_SPI_CS1# SPI_PCH_DO
RH3460_0402_5%~D RH3460_0402_5%~D
12
PCH_SPI_DO SPI_PCH_DIN
RH3470_0402_5%~D RH3470_0402_5%~D
12
PCH_SPI_DIN SPI_PCH_CLK
RH3480_0402_5%~D RH3480_0402_5%~D
12
PCH_SPI_CLK SPI_PCH_CS0#
RH3490_0402_5%~D RH3490_0402_5%~D
12
PCH_SPI_CS0#
12
+3.3V_RUN
12
+3.3V_M
12
XDP_DBRESET# <7,16>
+3.3V_RUN
+3.3V_ALW_PCH
JSPI1
JSPI1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
G1
18
G2
HRS_FH12-16S-0P5SH(55)~D
HRS_FH12-16S-0P5SH(55)~D
CONN@
CONN@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
14 61Monday, April 02, 2012
14 61Monday, April 02, 2012
14 61Monday, April 02, 2012
of
of
of
B
B
B
Page 15
5
D D
PCIE_PRX_WANTX_N1<34>
WWAN (Mini Card 1)--->
WLAN (Mini Card 2)--->
EXPRESS Card--->
1/2 MINI CARD-3 PCIE (Mini Card 3)--->
C C
MMI --->
10/100/1G LAN --->
WWAN (Mini Card 1)--->
10/100/1G LAN --->
MMI--->
B B
PP (Mini Card 3)--->
Express card--->
WLAN (Mini Card 2)--->
A A
PCIE_PRX_WANTX_P1<34> PCIE_PTX_WANRX_N1<34> PCIE_PTX_WANRX_P1<34>
PCIE_PRX_WLANTX_N2<34>
PCIE_PRX_WLANTX_P2<34> PCIE_PTX_WLANRX_N2<34> PCIE_PTX_WLANRX_P2<34>
PCIE_PRX_EXPTX_N3<35> PCIE_PRX_EXPTX_P3<35> PCIE_PTX_EXPRX_N3<35> PCIE_PTX_EXPRX_P3<35>
PCIE_PRX_WPANTX_N5<34>
PCIE_PRX_WPANTX_P5<34> PCIE_PTX_WPANRX_N5<34> PCIE_PTX_WPANRX_P5<34>
PCIE_PRX_MMITX_N6<33> PCIE_PRX_MMITX_P6<33> PCIE_PTX_MMIRX_N6<33> PCIE_PTX_MMIRX_P6<33>
PCIE_PRX_GLANTX_N7<30> PCIE_PRX_GLANTX_P7<30> PCIE_PTX_GLANRX_N7<30> PCIE_PTX_GLANRX_P7<30>
CLK_PCIE_MINI1#<34> CLK_PCIE_MINI1<34> +3.3V_ALW_PCH
LANCLK_REQ#<30>
MMICLK_REQ#<33>
CLK_PCIE_MINI3#<34>
CLK_PCIE_MINI3<34>
CLK_PCIE_MINI2#<34>
CLK_PCIE_MINI2<34>
+3.3V_ALW_PCH
CLK_CPU_ITP#<7>
CLK_CPU_ITP<7>
MINI1CLK_REQ#<34>
CLK_PCIE_LAN#<30> CLK_PCIE_LAN<30>
CLK_PCIE_MMI#<33> CLK_PCIE_MMI<33>
+3.3V_RUN
+3.3V_ALW_PCH
MINI3CLK_REQ#<34>
CLK_PCIE_EXP#<35>
CLK_PCIE_EXP<35> +3.3V_ALW_PCH EXPCLK_REQ#<35>
MINI2CLK_REQ#<34>
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
PCIE_PRX_WANTX_N1 PCIE_PRX_WANTX_P1 PCIE_PTX_WANRX_N1 PCIE_PTX_WANRX_P1
PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_P2 PCIE_PTX_WLANRX_N2 PCIE_PTX_WLANRX_P2
PCIE_PRX_EXPTX_N3 PCIE_PRX_EXPTX_P3 PCIE_PTX_EXPRX_N3 PCIE_PTX_EXPRX_P3
PCIE_PRX_WPANTX_N5 PCIE_PRX_WPANTX_P5 PCIE_PTX_WPANRX_N5 PCIE_PTX_WPANRX_P5
PCIE_PRX_MMITX_N6 PCIE_PRX_MMITX_P6 PCIE_PTX_MMIRX_N6 PCIE_PTX_MMIRX_P6
PCIE_PRX_GLANTX_N7 PCIE_PRX_GLANTX_P7 PCIE_PTX_GLANRX_N7 PCIE_PTX_GLANRX_P7
RH307 0_0402_5%~D@RH307 0_0402_5%~D@ RH308 0_0402_5%~D@RH308 0_0402_5%~D@ RH81 10K_0402_5%~DRH81 10K_0402_5%~D
RH82 0_0402_5%~D@ RH82 0_0402_5%~D@ RH83 0_0402_5%~D@ RH83 0_0402_5%~D@
RH85 0_0402_5%~D@ RH85 0_0402_5%~D@ RH86 0_0402_5%~D@ RH86 0_0402_5%~D@ RH87 10K_0402_5%~DRH87 10K_0402_5%~D
1 2
RH88 0_0402_5%~D@ RH88 0_0402_5%~D@ RH90 0_0402_5%~D@ RH90 0_0402_5%~D@ RH152 10K_0402_5%~DRH152 10K_0402_5%~D
RH92 0_0402_5%~D@ RH92 0_0402_5%~D@ RH93 0_0402_5%~D@ RH93 0_0402_5%~D@ RH94 10K_0402_5%~DRH94 10K_0402_5%~D
RH95 0_0402_5%~D@ RH95 0_0402_5%~D@ RH96 0_0402_5%~D@ RH96 0_0402_5%~D@ RH97 10K_0402_5%~DRH97 10K_0402_5%~D
RH98 10K_0402_5%~DRH98 10K_0402_5%~D
1 2
RH110 10K_0402_5%~DRH110 10K_0402_5%~D
RH104 10K_0402_5%~DRH104 10K_0402_5%~D RH280 0_0402_5%~D@RH280 0_0402_5%~D@
RH281 0_0402_5%~D@RH281 0_0402_5%~D@
PCIEREQpowerrail: suspend:034567 core:12
5
4
MEM_SMBCLK
5
MEM_SMBDATA
UH4B
UH4B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
12 12
12
12 12
12 12
12 12
12
12 12
12
12 12
12
12
12
12 12
PCIE_MINI1# PCIE_MINI1
MINI1CLK_REQ#
PCIE_LAN# PCIE_LAN
LANCLK_REQ#
PCIE_MMI# PCIE_MMI
MMICLK_REQ#
PCIE_MINI3# PCIE_MINI3
MINI3CLK_REQ#
PCIE_EXP# PCIE_EXP
EXPCLK_REQ#
PCIE_MINI2# PCIE_MINI2
MINI2CLK_REQ#
PEG_B_CLKRQ#
PCIECLKRQ6#
PCIECLKRQ7# CLK_BCLK_ITP#
CLK_BCLK_ITP
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
BD82QM77 QPRG C1_BGA989~D
BD82QM77 QPRG C1_BGA989~D
3
QH5B
QH5B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
PCI-E*
PCI-E*
3
+3.3V_RUN
2
6 1
QH5A
QH5A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLOCKS
CLOCKS
CLKOUT_DMI_P
CLKIN_DOT_96N CLKIN_DOT_96P
CLKIN_PCILOOPBACK
CLKOUTFLEX0 / GPIO64 CLKOUTFLEX1 / GPIO65 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
DDR_XDP_WAN_SMBCLK <7,12,13,14,27,34>
DDR_XDP_WAN_SMBDAT <7,12,13,14,27,34>
PCH_SMB_ALERT#
E12
MEM_SMBCLK
H14
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
CLKOUT_DP_N CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N CLKIN_GND1_P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
C9
A12 C8 G12
C13 E14 M16
M7
T11
P10
M10
AB37 AB38
AV22 AU22
AM12 AM13
BF18 BE18
BJ30 BG30
G24 E24
AK7 AK5
K45
H45
V47 V49
Y47
K43 F47 H47 K49
CLK_48M SIO_14M PCI_TPM_TCM JETWAY_14M
MEM_SMBDATA
DDR_HVREF_RST_PCH LAN_SMBCLK LAN_SMBDATA
PCH_GPIO74 SML1_SMBCLK SML1_SMBDATA
PCH_CL_CLK1
PCH_CL_DATA1
PCH_CL_RST1#
PEG_A_CLKRQ#
CLK_CPU_DMI# CLK_CPU_DMI
CLK_BUF_DMI# CLK_BUF_DMI
CLK_BUF_BCLK CLK_BUF_BCLK
CLK_BUF_DOT96# CLK_BUF_DOT96
CLK_BUF_CKSSCD# CLK_BUF_CKSSCD
CLK_PCH_14M
CLK_PCI_LOOPBACK
XTAL25_IN XTAL25_OUT
XCLK_RCOMP
2
DDR_HVREF_RST_PCH <7> LAN_SMBCLK <30>
LAN_SMBDATA <30>
SML1_SMBCLK <40>
SML1_SMBDATA <40>
PCH_CL_CLK1 <34>
PCH_CL_DATA1 <34>
PCH_CL_RST1# <34>
CLK_CPU_DMI# <7> CLK_CPU_DMI <7>
CLK_PCI_LOOPBACK <17>
RH100 90.9_0402_1%~DRH100 90.9_0402_1%~D
1 2
RH322 22_0402_5%~DRH322 22_0402_5%~D RH313 22_0402_5%~DRH313 22_0402_5%~D RH311 10_0402_1%~D5@ RH311 10_0402_1%~D5@
RH314 10_0402_1%~DRH314 10_0402_1%~D RH315 22_0402_5%~D@ RH315 22_0402_5%~D@
12 12 12
12 12
SML1_SMBCLK SML1_SMBDATA DDR_HVREF_RST_PCH PCH_GPIO74 MEM_SMBCLK MEM_SMBDATA PCH_SMB_ALERT# PEG_A_CLKRQ#
LAN_SMBCLK LAN_SMBDATA
RH298 2.2K_0402_5%~DRH298 2.2K_0402_5%~D
1 2
RH299 2.2K_0402_5%~DRH299 2.2K_0402_5%~D
1 2
RH300 1K_0402_1%~DRH300 1K_0402_1%~D RH301 10K_0402_5%~DRH301 10K_0402_5%~D RH302 2.2K_0402_5%~DRH302 2.2K_0402_5%~D RH303 2.2K_0402_5%~DRH303 2.2K_0402_5%~D RH304 10K_0402_5%~DRH304 10K_0402_5%~D RH80 10K_0402_5%~DRH80 10K_0402_5%~D
RH305 2.2K_0402_5%~DRH305 2.2K_0402_5%~D RH306 2.2K_0402_5%~DRH306 2.2K_0402_5%~D
10P_0402_50V8J~D
10P_0402_50V8J~D
@CE17
@
1
CE17
2
RFreviewin0629
CLK_BUF_DMI# CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_DOT96# CLK_BUF_DOT96
CLK_BUF_CKSSCD# CLK_BUF_CKSSCD
CLK_PCH_14M
RH74 10K_0402_5%~DRH74 10K_0402_5%~D
1 2
RH75 10K_0402_5%~DRH75 10K_0402_5%~D
1 2
RH91 10K_0402_5%~DRH91 10K_0402_5%~D
1 2
RH76 10K_0402_5%~DRH76 10K_0402_5%~D
1 2
RH77 10K_0402_5%~DRH77 10K_0402_5%~D
1 2
RH78 10K_0402_5%~DRH78 10K_0402_5%~D
1 2
RH79 10K_0402_5%~DRH79 10K_0402_5%~D
1 2
RH183 10K_0402_5%~DRH183 10K_0402_5%~D
1 2
CLOCKTERMINATIONforFCIMandneedclosetoPCH
1M_0402_5%~D
1M_0402_5%~D
RH309 0_0402_5%~D@RH309 0_0402_5%~D@
12
RH99
RH99
YH2
+1.05V_RUN
CLK_SMART_48M <35>
CLK_SIO_14M <39> CLK_PCI_TPM_TCM <32>
PCLK_80H <34>
JETWAY_CLK14M <32>
10P_0402_50V8J~D
10P_0402_50V8J~D
2
CH18
CH18
1
YH2
25MHZ_10PF_Q22FA2380049900~D
25MHZ_10PF_Q22FA2380049900~D
3
OUT
4
GND
GND
1
+3.3V_ALW_PCH
12 12 12 12 12 12
+3.3V_LAN
12 12
PCH_CL_CLK1CLK_PCI_LOOPBACK
12
IN
10P_0402_50V8J~D
10P_0402_50V8J~D
@
@
1
CE16
CE16
2
1 2
10P_0402_50V8J~D
10P_0402_50V8J~D
2
CH19
CH19
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903 4019FT
4019FT
4019FT
1
15 61Monday, April 02, 2012
15 61Monday, April 02, 2012
15 61Monday, April 02, 2012
B
B
B
of
of
of
Page 16
5
4
3
2
1
RH357 0_0402_5%~DRH357 0_0402_5%~D
1 2
RH113 0_0402_5%~D@ RH113 0_0402_5%~D@ RH323 0_0402_5%~D@ RH323 0_0402_5%~D@ RH321 0_0402_5%~D@ RH321 0_0402_5%~D@ RH119 0_0402_5%~D@ RH119 0_0402_5%~D@
BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9
BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9
AW16 AV12 BC10 AV14 BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
1 2 1 2
1 2
+3.3V_RUN
@CH99
@
5
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
P
B
O
2
A
G
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
12
FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7
FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7
FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1
DSWODVREN
PCH_DPWROK
PCH_PCIE_WAKE#
CLKRUN#
SUS_STAT#/LPCPD#
SUSCLK
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_A#
SIO_SLP_SUS#
H_PM_SYNC
SIO_SLP_LAN#
CH99
1 2
4
UC3
@UC3
@
PCH_PCIE_WAKE# <40>
CLKRUN# <32,39,40>
T56 PAD~D @T56 PAD~D @
T57 PAD~D @T57 PAD~D @ T58 PAD~D @T58 PAD~D @
SIO_SLP_S5# <40,42>
T59 PAD~D @T59 PAD~D @
SIO_SLP_S4# <39,42,46>
SIO_SLP_S3# <11,27,35,39,42,47,48,49>
SIO_SLP_A# <39,42,48>
T62 PAD~D @T62 PAD~D @
SIO_SLP_SUS# <39>
T63 PAD~D @T63 PAD~D @
H_PM_SYNC <7>
SIO_SLP_LAN# <30,39>
SYS_RESET#
FDI_CTX_PRX_N0 <6> FDI_CTX_PRX_N1 <6> FDI_CTX_PRX_N2 <6> FDI_CTX_PRX_N3 <6> FDI_CTX_PRX_N4 <6> FDI_CTX_PRX_N5 <6> FDI_CTX_PRX_N6 <6> FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6> FDI_CTX_PRX_P1 <6> FDI_CTX_PRX_P2 <6> FDI_CTX_PRX_P3 <6> FDI_CTX_PRX_P4 <6> FDI_CTX_PRX_P5 <6> FDI_CTX_PRX_P6 <6> FDI_CTX_PRX_P7 <6>
FDI_INT <6> FDI_FSYNC0 <6> FDI_FSYNC1 <6> FDI_LSYNC0 <6> FDI_LSYNC1 <6>
3
PCH_CRT_BLU
RH131 150_0402_1%~DRH131 150_0402_1%~D
PCH_CRT_GRN
RH132 150_0402_1%~DRH132 150_0402_1%~D
PCH_CRT_RED
RH133 150_0402_1%~DRH133 150_0402_1%~D
ENVDD_PCH
RH134 100K_0402_5%~DRH134 100K_0402_5%~D
+3.3V_ALW_PCH
D D
+3.3V_RUN
C C
+1.05V_RUN
SUSACK#<39> PCH_DPWROK <39>
SYS_PWROK<7,39>
B B
A A
RESET_OUT#<40>
PM_DRAM_PWRGD<7>
PCH_RSMRST#_Q<14,41>
ME_SUS_PWR_ACK<40>
SIO_PWRBTN#_R<7,14>
SIO_PWRBTN#<40>
+3.3V_ALW_PCH
PM_APWROK<40>
SIO_SLP_A#
RH118 0_0402_5%~D@RH118 0_0402_5%~D@
5
1 2
RH318 10K_0402_5%~D@ RH318 10K_0402_5%~D@
1 2
RH144 10K_0402_5%~DRH144 10K_0402_5%~D
1 2
RH142 10K_0402_5%~DRH142 10K_0402_5%~D
1 2
RH319 10K_0402_5%~D@ RH319 10K_0402_5%~D@
1 2
RH140 10K_0402_5%~DRH140 10K_0402_5%~D
1 2
RH137 8.2K_0402_5%~DRH137 8.2K_0402_5%~D
1 2
RH138 8.2K_0402_5%~D@ RH138 8.2K_0402_5%~D@
DMI_CTX_PRX_N0<6> DMI_CTX_PRX_N1<6> DMI_CTX_PRX_N2<6> DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P0<6> DMI_CTX_PRX_P1<6> DMI_CTX_PRX_P2<6> DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N0<6> DMI_CRX_PTX_N1<6> DMI_CRX_PTX_N2<6> DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P0<6> DMI_CRX_PTX_P1<6> DMI_CRX_PTX_P2<6> DMI_CRX_PTX_P3<6>
1 2
RH111 49.9_0402_1%~DRH111 49.9_0402_1%~D
1 2
RH112 750_0402_1%~DRH112 750_0402_1%~D
1 2
RH114 0_0402_5%~D@ RH114 0_0402_5%~D@
1 2
RH116 0_0402_5%~D@ RH116 0_0402_5%~D@
1 2
RH117 0_0402_5%~D@ RH117 0_0402_5%~D@
1 2
RH320 0_0402_5%~D@ RH320 0_0402_5%~D@
1 2
RH120 0_0402_5%~D@ RH120 0_0402_5%~D@
1 2
RH121 0_0402_5%~D@ RH121 0_0402_5%~D@
1 2
RH122 0_0402_5%~D@ RH122 0_0402_5%~D@
AC_PRESENT<40>
1 2
RH139 8.2K_0402_5%~DRH139 8.2K_0402_5%~D
+3.3V_ALW2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
5
1
P
B
4
O
2
A
G
UH5
UH5
3
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
1 2
DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3
DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3
DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3
DMI_COMP_R RBIAS_CPY
SUSACK#_R
SYS_RESET#
SYS_PWROK_R
PCH_PWROK
PM_APWROK_R
PM_DRAM_PWRGD_R
PCH_RSMRST#_R
ME_SUS_PWR_ACK_R
SIO_PWRBTN#_R
AC_PRESENT
PCH_BATLOW#
PCH_RI#
CH108
CH108
1 2
PM_APWROK_R
SUS_STAT#/LPCPD#
ME_SUS_PWR_ACK PCH_PCIE_WAKE#
SIO_SLP_LAN# PCH_RI#
CLKRUN# ME_RESET#
XDP_DBRESET#<7,14>
UH4C
UH4C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
BD82QM77 QPRG C1_BGA989~D
BD82QM77 QPRG C1_BGA989~D
ME_RESET#
12
RH141 8.2K_0402_5%~D@RH141 8.2K_0402_5%~D@
PCH_DPWROK PCH_RSMRST#_R ME_SUS_PWR_ACK_R SUSACK#_R SYS_PWROK_R RESET_OUT# RESET_OUT# PM_APWROK_R
FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7
FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7
DMI
FDI
DMI
FDI
FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_S4#
SLP_S3#
System Power Management
System Power Management
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN# / GPIO29
4
+RTC_CELL
330K_0402_1%~D
330K_0402_1%~D
RH127
RH127
1 2
DSWODVREN
PCH_CRT_HSYNC<23> PCH_CRT_VSYNC<23>
330K_0402_1%~D
330K_0402_1%~D
DSWODVREN‐OnDieDSWVREnable
@RH129
@
12
RH129
Enabled(DEFAULT)
HIGH:RH127STUFFED, RH129UNSTUFFED
Disabled
LOW:RH129STUFFED, RH127UNSTUFFED
UH4D
HSYNC VSYNC
M45
AF37 AF36
AE48 AE47
AK39 AK40
AN48 AM47 AK47 AJ48
AN47 AM49 AK49 AJ47
AF40 AF39
AH45 AH47 AF49 AF45
AH43 AH49 AF47 AF43
M40
M47 M49
J47
P45
T40
K47
T45
P39
N48 P49
T49
T39
T43 T42
2
UH4D
L_BKLTEN L_VDD_EN
L_BKLTCTL L_DDC_CLK
L_DDC_DATA L_CTRL_CLK
L_CTRL_DATA LVD_IBG
LVD_VBG LVD_VREFH
LVD_VREFL
LVDSA_CLK# LVDSA_CLK
LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3
LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3
LVDSB_CLK# LVDSB_CLK
LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3
LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3
CRT_BLUE CRT_GREEN CRT_RED
CRT_DDC_CLK CRT_DDC_DATA
CRT_HSYNC CRT_VSYNC
DAC_IREF CRT_IRTN
BD82QM77 QPRG C1_BGA989~D
BD82QM77 QPRG C1_BGA989~D
1 2
1 2 1 2
PANEL_BKEN_PCH ENVDD_PCH
BIA_PWM_PCH LDDC_CLK_PCH
LDDC_DATA_PCH
LVD_IBG
LCD_ACLK-_PCH LCD_ACLK+_PCH
LCD_A0-_PCH LCD_A1-_PCH LCD_A2-_PCH
LCD_A0+_PCH LCD_A1+_PCH LCD_A2+_PCH
LCD_BCLK-_PCH LCD_BCLK+_PCH
LCD_B0-_PCH LCD_B1-_PCH LCD_B2-_PCH
LCD_B0+_PCH LCD_B1+_PCH LCD_B2+_PCH
PCH_CRT_BLU PCH_CRT_GRN PCH_CRT_RED
PCH_CRT_DDC_CLK PCH_CRT_DDC_DAT
CRT_IREF
1K_0402_0.5%~D
1K_0402_0.5%~D
12
RH126
RH126
PANEL_BKEN_PCH<24>
ENVDD_PCH<24,39>
BIA_PWM_PCH<24>
LDDC_CLK_PCH<24> LDDC_DATA_PCH<24>
RH344 2.37K_0402_1%~DRH344 2.37K_0402_1%~D
Minimumspeacingof20milsforLVD_IBG
LCD_ACLK-_PCH<24> LCD_ACLK+_PCH<24>
LCD_A0-_PCH<24> LCD_A1-_PCH<24> LCD_A2-_PCH<24>
LCD_A0+_PCH<24> LCD_A1+_PCH<24> LCD_A2+_PCH<24>
LCD_BCLK-_PCH<24> LCD_BCLK+_PCH<24>
LCD_B0-_PCH<24> LCD_B1-_PCH<24> LCD_B2-_PCH<24>
LCD_B0+_PCH<24> LCD_B1+_PCH<24> LCD_B2+_PCH<24>
PCH_CRT_BLU<23> PCH_CRT_GRN<23> PCH_CRT_RED<23>
PCH_CRT_DDC_CLK<23>
PCH_CRT_DDC_DAT<23>
RH123 20_0402_1%~DRH123 20_0402_1%~D RH124 20_0402_1%~DRH124 20_0402_1%~D
12 12 12 12
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT PCH_SDVO_CTRLCLK PCH_SDVO_CTRLDATA
LVDS
LVDS
CRT
CRT
RH317 2.2K_0402_5%~DRH317 2.2K_0402_5%~D RH316 2.2K_0402_5%~DRH316 2.2K_0402_5%~D RH351 2.2K_0402_5%~DRH351 2.2K_0402_5%~D RH352 2.2K_0402_5%~DRH352 2.2K_0402_5%~D
SDVO_INTN
SDVO_INTP
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
DDPC_AUXN DDPC_AUXP
DDPC_HPD
DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P
DDPD_AUXN DDPD_AUXP
DDPD_HPD
DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
AP43 AP45
AM42 AM40
AP39 AP40
P38 M39
AT49 AT47 AT40
AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49
P46 P42
AP47 AP49 AT38
AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49
M43 M36
AT45 AT43 BH41
BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42
SDVO_TVCLKINN SDVO_TVCLKINP
SDVO_STALLN SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
+3.3V_RUN
12 12 12 12
PCH_SDVO_CTRLCLK <25>
PCH_SDVO_CTRLDATA <25>
HDMIB_PCH_HPD <25>
TMDSB_PCH_N2 <25> TMDSB_PCH_P2 <25> TMDSB_PCH_N1 <25> TMDSB_PCH_P1 <25> TMDSB_PCH_N0 <25> TMDSB_PCH_P0 <25> TMDSB_PCH_CLK# <25> TMDSB_PCH_CLK <25>
PCH_DDPC_CTRLCLK <26>
PCH_DDPC_CTRLDATA <26>
DPC_PCH_DOCK_AUX# <26> DPC_PCH_DOCK_AUX <26> DPC_PCH_DOCK_HPD <38>
DPC_PCH_LANE_N0 <38> DPC_PCH_LANE_P0 <38> DPC_PCH_LANE_N1 <38> DPC_PCH_LANE_P1 <38> DPC_PCH_LANE_N2 <38> DPC_PCH_LANE_P2 <38> DPC_PCH_LANE_N3 <38> DPC_PCH_LANE_P3 <38>
PCH_DDPD_CTRLCLK <26>
PCH_DDPD_CTRLDATA <26>
DPD_PCH_DOCK_AUX# <26> DPD_PCH_DOCK_AUX <26> DPD_PCH_DOCK_HPD <38>
DPD_PCH_LANE_N0 <38> DPD_PCH_LANE_P0 <38> DPD_PCH_LANE_N1 <38> DPD_PCH_LANE_P1 <38> DPD_PCH_LANE_N2 <38> DPD_PCH_LANE_P2 <38> DPD_PCH_LANE_N3 <38> DPD_PCH_LANE_P3 <38>
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
B
B
16 61Monday, April 02, 2012
16 61Monday, April 02, 2012
16 61Monday, April 02, 2012
B
of
of
of
Page 17
5
D D
C C
+3.3V_RUN
1 2
RH324 8.2K_0402_5%~DRH324 8.2K_0402_5%~D
1 2
RH325 8.2K_0402_5%~DRH325 8.2K_0402_5%~D
1 2
RH326 8.2K_0402_5%~DRH326 8.2K_0402_5%~D
1 2
RH329 8.2K_0402_5%~DRH329 8.2K_0402_5%~D
1 2
RH327 10K_0402_5%~DRH327 10K_0402_5%~D
1 2
RH330 10K_0402_5%~DRH330 10K_0402_5%~D
1 2
RH331 10K_0402_5%~DRH331 10K_0402_5%~D
1 2
RH328 10K_0402_5%~DRH328 10K_0402_5%~D
1 2
RH332 10K_0402_5%~DRH332 10K_0402_5%~D
1 2
RH361 10K_0402_5%~DRH361 10K_0402_5%~D
PCI_GNT3#
1K_0402_1%~D
1K_0402_1%~D
@RH333
@
12
RH333
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_REQ1# LCD_CBL_DET#
CAM_MIC_CBL_DET#
BT_DET# PCH_GPIO3
PCIE_MCARD2_DET#
A16swapoverrideStrap/TopBlock
SwapOverridejumper
PCI_GNT#3
B B
Low=A16swap
High=Default
HDD_FALL_INT<27>
PLTRST_MMI#<33> PLTRST_XDP#<7> PLTRST_LAN#<30>
CLK_PCI_5048<39>
CLK_PCI_MEC<40>
CLK_PCI_DOCK<38>
CLK_PCI_LOOPBACK<15>
1 2
RH334 0_0402_5%~D@RH334 0_0402_5%~D@ RH336 0_0402_5%~D@RH336 0_0402_5%~D@
1 2
RH337 0_0402_5%~DRH337 0_0402_5%~D
1 2
RH338 0_0402_5%~D@RH338 0_0402_5%~D@
1 2
RH160 22_0402_5%~DRH160 22_0402_5%~D RH102 22_0402_5%~DRH102 22_0402_5%~D RH103 22_0402_5%~DRH103 22_0402_5%~D
RH105 22_0402_5%~DRH105 22_0402_5%~D
4
UH4E
UH4E
T72PAD~D @T72PAD~D @ T64PAD~D @T64PAD~D @ T73PAD~D @T73PAD~D @ T65PAD~D @T65PAD~D @ T74PAD~D @T74PAD~D @ T66PAD~D @T66PAD~D @ T67PAD~D @T67PAD~D @ T75PAD~D @T75PAD~D @ T76PAD~D @T76PAD~D @ T77PAD~D @T77PAD~D @ T68PAD~D @T68PAD~D @ T69PAD~D @T69PAD~D @ T78PAD~D @T78PAD~D @ T79PAD~D @T79PAD~D @ T80PAD~D @T80PAD~D @ T70PAD~D @T70PAD~D @ T81PAD~D @T81PAD~D @ T71PAD~D @T71PAD~D @ T82PAD~D @T82PAD~D @ T83PAD~D @T83PAD~D @
T84PAD~D @T84PAD~D @ T85PAD~D @T85PAD~D @ T86PAD~D @T86PAD~D @ T87PAD~D @T87PAD~D @
USB3RN2<36> USB3RN3<36> USB3RN4<38>
USB3RP2<36> USB3RP3<36> USB3RP4<38>
USB3TN2<36> USB3TN3<36> USB3TN4<38>
USB3TP2<36> USB3TP3<36> USB3TP4<38>
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
PCIE_MCARD2_DET#<34>
BT_DET#<41>
LCD_CBL_DET#<24>
CAM_MIC_CBL_DET#<24>
12 12 12
12
PCI_REQ1#
BBS_BIT1 PCI_GNT3#
LCD_CBL_DET# PCH_GPIO3 CAM_MIC_CBL_DET# FFS_PCH_INT
T104PAD~D @T104PAD~D @
PCH_PLTRST#
PCI_5048 PCI_MEC PCI_DOCK
PCI_LOOPBACKOUT
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
USB3Rn1
BC30
USB3Rn2
BE32
USB3Rn3
BJ32
USB3Rn4
BC28
USB3Rp1
BE30
USB3Rp2
BF32
USB3Rp3
BG32
USB3Rp4
AV26
USB3Tn1
BB26
USB3Tn2
AU28
USB3Tn3
AY30
USB3Tn4
AU26
USB3TP1
AY26
USB3Tp2
AV28
USB3Tp3
AW30
USB3Tp4
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
BD82QM77 QPRG C1_BGA989~D
BD82QM77 QPRG C1_BGA989~D
RSVD
RSVD
USB30
USB30
PCI
PCI
3
USB
USB
RSVD1 RSVD2 RSVD3 RSVD4
RSVD5 RSVD6
RSVD7 RSVD8
RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22
RSVD23 RSVD24
RSVD25 RSVD26
RSVD27 RSVD28
RSVD29
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P
USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43
OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14
AY7 AV7 AU3 BG4
AT10 BC8
AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6
AV5 AV10
AT8 AY5
BA2 AT12
BF3
USBP0-
C24
USBP0+
A24
USBP1-
C25
USBP1+
B25
USBP2-
C26
USBP2+
A26
USBP3-
K28
USBP3+
H28
USBP4-
E28
USBP4+
D28
USBP5-
C28
USBP5+
A28
USBP6-
C29
USBP6+
B29
USBP7-
N28
USBP7+
M28
USBP8-
L30
USBP8+
K30
USBP9-
G30
USBP9+
E30
USBP10-
C30
USBP10+
A30
USBP11-
L32
USBP11+
K32
USBP12-
G32
USBP12+
E32
USBP13-
C32
USBP13+
A32
USBRBIAS
C33
B33
A14 K20 B17 C16 L16 A16 D14 C14
RH151 22.6_0402_1%~DRH151 22.6_0402_1%~D
Routesingleend50ohmsandmax500milslength. Minimumspacingtoothersignals:15mils
USB_OC0#_R USB_OC1#_R USB_OC2# USB_OC3# USB_OC4#_R USB_OC5# USB_OC6#
1 2
RH339 0_0402_5%~D@RH339 0_0402_5%~D@ RH341 0_0402_5%~D@RH341 0_0402_5%~D@
RH356 0_0402_5%~D@RH356 0_0402_5%~D@
USBP0- <37> USBP0+ <37> USBP1- <36> USBP1+ <36> USBP2- <36> USBP2+ <36> USBP3- <38> USBP3+ <38> USBP4- <34> USBP4+ <34> USBP5- <34> USBP5+ <34> USBP6- <34> USBP6+ <34> USBP7- <38> USBP7+ <38>
USBP9- <37> USBP9+ <37> USBP10- <35> USBP10+ <35> USBP11- <41> USBP11+ <41> USBP12- <24> USBP12+ <24> USBP13- <32> USBP13+ <32>
1 2 1 2
1 2
2
----->Back Right--IO
----->Left Side
----->Left side E-SATA
----->MLK DOCK
----->WLAN/WIMAX
----->WWAN/UWB
----->Flash
----->DOCK
----->Non used
----->Right side--IO
----->Express Card
----->Blue Tooth
----->Camera
----->BIO
USB_OC0# <36,37> USB_OC1# <36> USB_OC2# <14> USB_OC3# <14> USB_OC4# <37> USB_OC5# <14> USB_OC6# <14> SIO_EXT_SMI# <14,40>
USB_OC0#_R <14> USB_OC1#_R <14> USB_OC4#_R <14>
USB_OC0#_R USB_OC1#_R USB_OC3# USB_OC4#_R
USB_OC2# USB_OC5# USB_OC6# SIO_EXT_SMI#
1
+3.3V_ALW_PCH
RPH1
RPH1 4 5 3 6 2 7 1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
RPH2
RPH2 4 5 3 6 2 7 1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
+3.3V_RUN
CH102
CH102
ReserveforESDin6/22
PCH_PLTRST#
A A
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D @CE10
@ CE10
1
2
PCH_PLTRST#<7,14>
1 2
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
5
UH3
UH3
4
O
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
BBS_BIT1 BootBIOSLocation
PCH_PLTRST#_EC <32,34,35,39,40>
0 1 Reserved(NAND)
1 0 PCI
*
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
BootBIOSStrap
SATA_SLPD (BBS_BIT0)
00 LPC
11 SPI
BBS_BIT1
1K_0402_1%~D
1K_0402_1%~D
@RH342
@
12
RH342
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
17 61Monday, April 02, 2012
17 61Monday, April 02, 2012
17 61Monday, April 02, 2012
1
of
of
of
Page 18
5
4
3
2
1
+3.3V_ALW_PCH
4.7K_0402_5%~D
4.7K_0402_5%~D RH53
RH53
D D
+3.3V_ALW_PCH
C C
B B
A A
1 2
SLP_ME_CSW_DEV#
1K_0402_1%~D
1K_0402_1%~D
12
@RH353
@ RH353
Note:PCHhasinternalpullup20kohmon E3_PAID_TS_DET#(GPIO27)
SLP_ME_CSW_DEV#PLLONDIEVRENABLE
ENABLEDHIGH(DEFAULT)
DISABLEDLOW
SIO_EXT_WAKE#
1 2
12
PCH_GPIO15
PM_LANPHY_ENABLE
12
PCH_GPIO27
12
KB_DET#
12
RH177 10K_0402_5%~DRH177 10K_0402_5%~D RH354 1K_0402_1%~DRH354 1K_0402_1%~D RH179 10K_0402_5%~DRH179 10K_0402_5%~D RH180 10K_0402_5%~DRH180 10K_0402_5%~D RH170 10K_0402_5%~DRH170 10K_0402_5%~D
SIO_EXT_SCI#_R<14>
SIO_EXT_SCI#<40>
SIO_EXT_WAKE#<39>
PM_LANPHY_ENABLE<30>
PCH_GPIO15<14>
PCH_GPIO16<14>
MEDIA_DET#<43>
PCIE_MCARD1_DET#<34>
SLP_ME_CSW_DEV#<14,39>
USB_MCARD1_DET#<14,34>
PCH_GPIO36<14> PCH_GPIO37<14>
FFS_INT2<27>
TEMP_ALERT#<14,39>
KB_DET#<41>
Layoutnote: Tracewide10mil&length30mil AllNCTFpinsshouldhavethick tracesat45°fromthepad.
+3.3V_RUN +3.3V_RUN
TPM_ID0
1 2
RH259 0_0402_5%~D@RH259 0_0402_5%~D@
PCH_GPIO1 IO_LOOP# PCH_GPIO7 SIO_EXT_WAKE# PM_LANPHY_ENABLE PCH_GPIO15
PCH_GPIO16
PCH_GPIO17 MEDIA_DET# PCIE_MCARD1_DET# PCH_GPIO27 SLP_ME_CSW_DEV# PCH_GPIO34 USB_MCARD1_DET# PCH_GPIO36 PCH_GPIO37 TPM_ID0 TPM_ID1 FFS_INT2 TEMP_ALERT# KB_DET#
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14
10K_0402_5%~D
10K_0402_5%~D
1@ RH267
1@ RH267
1 2
10K_0402_5%~D
2@ RH270
10K_0402_5%~D
2@ RH270
1 2
TPM_ID1
UH4F
UH4F
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL / GPIO12
G2
GPIO15
U2
SATA4GP / GPIO16
D40
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24
E16
GPIO27
P8
GPIO28
K1
STP_PCI# / GPIO34
K4
GPIO35
V8
SATA2GP / GPIO36
M5
SATA3GP / GPIO37
N2
SLOAD / GPIO38
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
V3
SATA5GP / GPIO49 / TEMP_ALERT#
D6
GPIO57
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
BD82QM77 QPRG C1_BGA989~D
BD82QM77 QPRG C1_BGA989~D
20K_0402_5%~D
20K_0402_5%~D
3@ RH268
3@
12
RH268
ChinaTPM
NoTPM,NoChinaTPM
2.2K_0402_5%~D
4@ RH271
2.2K_0402_5%~D
4@
12
RH271
TBD
TPM
GPIO
GPIO
NCTF
NCTF
A20GATE
PECI
RCIN#
THRMTRIP#
INIT3_3V#
DF_TVS
TS_VSS1 TS_VSS2 TS_VSS3 TS_VSS4
NC_1
C40 B41 C41 A40
P4 AU16 P5 AY11 AY10 T14 AY1
AH8 AK11 AH10 AK10
P37
BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49
TACH4 / GPIO68 TACH5 / GPIO69 TACH6 / GPIO70 TACH7 / GPIO71
PROCPWRGD
CPU/MISC
CPU/MISC
VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 VSS_NCTF_32
TPM_ID0 TPM_ID1
00
01
11
CONTACTLESS_DET# PCH_GPIO69 PCIE_MCARD3_DET# USB_MCARD2_DET#
SIO_A20GATE
SIO_RCIN# H_CPUPWRGD PCH_THRMTRIP#_R INIT3_3V# DF_TVS
NC_1
VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 VSS_NCTF_32
PCIE_MCARD3_DET# <34>
USB_MCARD2_DET# <34>
SIO_A20GATE <40>
SIO_RCIN# <40> H_CPUPWRGD <7>
T106PAD~D @T106PAD~D @
T108PAD~D @T108PAD~D @
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D RH262 56_0402_5%~DRH262 56_0402_5%~D
CH97
CH97
1
2
Layoutnote: Tracewide10mil&length30mil AllNCTFpinsshouldhavethick tracesat45°fromthepad.
DF_TVS DF_TVS_R
PLACERH150CLOSETOTHEBRANCHINGPOINT (TOCPUandNVRAMCONNECTOR)
12
12
RH3581K_0402_1%~D RH3581K_0402_1%~D
+1.05V_RUN_VTT
+VCCDFTERM
SIO_A20GATE SIO_RCIN# SIO_EXT_SCI# PCH_GPIO1 PCH_GPIO36 PCH_GPIO37 PCH_GPIO16 TEMP_ALERT# MEDIA_DET# PCH_GPIO7 PCH_GPIO17 IO_LOOP# PCH_GPIO34 CONTACTLESS_DET#
PCH_GPIO36 PCH_GPIO37 PCH_GPIO17 PCH_GPIO16 PCH_GPIO69
DMI&FDITerminationVoltage
DF_TVS
2.2K_0402_5%~D
2.2K_0402_5%~D
12
RH149
RH149
RH149needtoclosetoCPU
RH158 10K_0402_5%~DRH158 10K_0402_5%~D RH203 10K_0402_5%~DRH203 10K_0402_5%~D
1 2
RH263 10K_0402_5%~DRH263 10K_0402_5%~D
1 2
RH164 100K_0402_5%~DRH164 100K_0402_5%~D
1 2
RH171 10K_0402_5%~D@ RH171 10K_0402_5%~D@
1 2
RH173 1K_0402_1%~D@RH173 1K_0402_1%~D@ RH272 10K_0402_5%~DRH272 10K_0402_5%~D
1 2
RH266 10K_0402_5%~DRH266 10K_0402_5%~D
1 2
RH181 10K_0402_5%~DRH181 10K_0402_5%~D
1 2
RH178 10K_0402_5%~DRH178 10K_0402_5%~D RH269 8.2K_0402_5%~DRH269 8.2K_0402_5%~D RH163 10K_0402_5%~DRH163 10K_0402_5%~D
1 2
RH182 10K_0402_5%~DRH182 10K_0402_5%~D RH256 10K_0402_5%~DRH256 10K_0402_5%~D
1 2
RH174 10K_0402_5%~DRH174 10K_0402_5%~D
1 2
RH172 10K_0402_5%~DRH172 10K_0402_5%~D
1 2
RH273 1K_0402_1%~D@RH273 1K_0402_1%~D@
1 2
RH265 10K_0402_5%~D@ RH265 10K_0402_5%~D@
1 2
RH260 1.5K_0402_1%~DRH260 1.5K_0402_1%~D
SettoVsswhenLOW
SettoVccwhenHIGH
12
H_SNB_IVB# <7>
RH1500_0402_5%~D @ RH1500_0402_5%~D @
+3.3V_RUN
12 12
12
12 12
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
18 61Monday, April 02, 2012
18 61Monday, April 02, 2012
18 61Monday, April 02, 2012
1
B
B
B
of
of
of
Page 19
5
D D
C C
B B
+1.05V_RUN
1 2
RH195 0.022_0805_1%@RH195 0.022_0805_1%@
+1.05V_RUN
+1.05V_RUN
1 2
1UH_LB2012T1R0M_20%~D
1UH_LB2012T1R0M_20%~D
+1.05V_RUN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CH44
CH44
2
+3.3V_RUN
+VCCAPLL_FDI
1
2
@RH247
@
1
2
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
RH247
CH30
CH30
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH45
CH45
CH51
CH51
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
2
1
2
+1.05V_+1.5V_1.8V_RUN
CH32
CH32
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH46
CH46
2
+1.05V_RUN_VTT
CH33
CH33
+1.05V_RUN
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH47
CH47
2
+1.05V_RUN
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH31
CH31
2
+VCCAPLLEXP
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@
@
CH40
CH40
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH48
CH48
+VCCAPLL_FDI
4
UH4G
UH4G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
BD82QM77 QPRG C1_BGA989~D
BD82QM77 QPRG C1_BGA989~D
POWER
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRTLVDS
CRTLVDS
VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]
DMI
DMI
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
DFT / SPI HVCMOS
DFT / SPI HVCMOS
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCSPI
U48
U47
AK36 AK37
AM37 AM38 AP36 AP37
+3.3V_RUN
V33
V34
AT16
AT20
+1.05V_RUN_VCCCLKDMI
AB36
AG16
AG17
AJ16
AJ17
V1
3
+VCCADAC
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
22U_0603_6.3V6M~D
1
2
CH103
CH103
1
CH35
CH35
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
CH104
CH104
1
2
+1.05V_RUN_VTT
RH276 0_0805_5%~D@RH276 0_0805_5%~D@
RH202 0_0603_5%~D@RH202 0_0603_5%~D@ RH204 0_0603_5%~D@RH204 0_0603_5%~D@
22U_0603_6.3V6M~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
CH34
CH34
2
+3.3V_RUN
+1.8V_RUN_LVDS
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D CH43
CH43
1
2
+1.05V_+1.5V_1.8V_RUN
CH49 1U_0402_6.3V6K~DCH49 1U_0402_6.3V6K~D
1 2
+VCCDFTERM
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH52
CH52
2
+VCCSPI
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH54
CH54
1
2
LH1
LH1
1UH_GLFR1608T1R0M-LR_20%~D
1UH_GLFR1608T1R0M-LR_20%~D
CH36
CH36
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
100NH_HK1608R10J-T_5%_0603~D
100NH_HK1608R10J-T_5%_0603~D
CH105
CH105
1
2
PJP66
@PJP66
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
12
LH8
LH8
0.1uH inductor, 200mA CPN : SHI0110BJ0L
+1.05V_RUN_VCCCLKDMI
12
12 12
+3.3V_RUN
12
1
2
+3.3V_RUN
+1.8V_RUN
+3.3V_M +3.3V_RUN
+1.8V_RUN
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH50
CH50
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
RH205 0_0603_5%~DRH205 0_0603_5%~D
@CH106
@
1
CH106
2
1
PCH Power Rail Table
Voltage Rail
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC3
VccADPLLA
VccADPLLB
VccCore
VccDMI
Voltage
1.05
3.3
3.3
1.05
1.05
1.05
1.05
S0 Iccmax Current (A)
0.001
5
5
0.001
0.001
0.288
0.063
0.08
0.08
1.7
0.047
1.05VccIO 3.711
VccASW
VccSPI
+1.05V_RUN
12
VccDSW3_3 0.001
1.05
3.3
3.3
1.8 0.002VCCDFTERM
0.903
0.01
3.3VccRTC 6uA
3.3VccSus3_3
3.3VccSusHDA
0.126
0.01
VccVRM 1.8 / 1.5 0.167
1.05VccClkDMI 0.07
1.05VccSSC
VccDIFFCLKN 0.055
1.05
VccALVDS 3.3
0.095
0.001
1.8VccTX_LVDS 0.04
HM76(w/ovpro):depopRH202andpopRH204 QM77(w/vpro):popRH202anddepopRH204
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
RH197 0_0603_5%~D@RH197 0_0603_5%~D@
A A
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903 4019FT
4019FT
4019FT
19 61Monday, April 02, 2012
19 61Monday, April 02, 2012
19 61Monday, April 02, 2012
1
of
of
of
Page 20
5
4
3
2
1
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
12
RH279
13
D
D
2
G
G
S
S
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
+PCH_V5REF_SUS
DH3
DH3
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
+PCH_V5REF_RUN
+VCCSATAPLL
1
2
RH279
5V_ALW_PCH_ENABLE
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
QH6
QH6
+3.3V_ALW_PCH
DH2
DH2
+3.3V_RUN +5V_RUN
+VCCA_USBSUS
1 2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
@CH80
@ CH80
+1.05V_RUN
D D
+3.3V_RUN
1 2
RH215 0.022_0805_1%RH215 0.022_0805_1%
Note:IfEMIconcern,popwith SHI00008S0L,10UH+20%
C C
+1.05V_RUN
B B
A A
LH6
LH6
1 2
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
LH7
LH7
1 2
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
+1.05V_M
1 2
RH248 0.022_0805_1%@ RH248 0.022_0805_1%@
+3.3V_ALW_PCH
+3.3V_ALW2
+3.3V_RUN_VCC_CLKF33
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
+1.05V_RUN_VCCA_A_DPL
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1
CH94
CH94
1
+
+
2
2
+1.05V_M_VCCSUS
RH201 0_0402_5%~DRH201 0_0402_5%~D RH253 0_0402_5%~D@RH253 0_0402_5%~D@
@CH73
@
1
CH73
2
+1.05V_RUN_VCCA_B_DPL
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH92
CH92
+
+
2
1 2 1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH74
CH74
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
CH95
CH95
+1.05V_RUN
+1.05V_RUN
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH93
CH93
1
2
+1.05V_RUN_VTT
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
2
LH3
@LH3
@
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH96
CH96
2
1
CH85
CH85
2
1
2
+1.05V_M
1
2
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH86
CH86
RH200 0.022_0805_1%@RH200 0.022_0805_1%@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH55
CH55
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH67
CH67
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH79
CH79
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH87
CH87
2
1 2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@
@
CH58
CH58
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH68
CH68
1
2
CH81
CH81
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D CH84
CH84
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
@CH57
@ CH57
1
2
+1.05V_RUN
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH69
CH69
CH64
CH64
1
2
CH78
CH78
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D +1.05V_+1.5V_1.8V_RUN
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
@
@
1
CH83
CH83
2
+RTC_CELL
+VCCACLK
+VCCDSW3_3
+PCH_VCCDSW
+3.3V_RUN_VCC_CLKF33
+VCCAPLL_CPY_PCH
+VCCSUS1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
@CH61
@
1
CH61
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH65
CH65
1
2
+VCCRTCEXT
12
+1.05V_RUN_VCCA_A_DPL +1.05V_RUN_VCCA_B_DPL
+VCCSST +1.05V_M_VCCSUS
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D CH89
CH89
CH88
CH88
1
1
2
2
UH4J
UH4J
AD49
T16
V12
T38
BH23 AL29
AL24
AA19 AA21 AA24 AA26 AA27 AA29 AA31 AC26 AC27 AC29 AC31 AD29 AD31
W21 W23 W24 W26 W29 W31 W33
N16
Y49
BD47 BF47
AF17 AF33 AF34
AG34
AG33
V16
T17 V19
BJ8
A22
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
BD82QM77 QPRG C1_BGA989~D
BD82QM77 QPRG C1_BGA989~D
CH90
CH90
1
2
VCCACLK
VCCDSW3_3
DCPSUSBYP
VCC3_3[5]
VCCAPLLDMI2 VCCIO[14]
DCPSUS[3]
VCCASW[1] VCCASW[2] VCCASW[3] VCCASW[4] VCCASW[5] VCCASW[6] VCCASW[7] VCCASW[8] VCCASW[9] VCCASW[10] VCCASW[11] VCCASW[12] VCCASW[13] VCCASW[14] VCCASW[15] VCCASW[16] VCCASW[17] VCCASW[18] VCCASW[19] VCCASW[20]
DCPRTC
VCCVRM[4]
VCCADPLLA VCCADPLLB
VCCIO[7] VCCDIFFCLKN[1] VCCDIFFCLKN[2] VCCDIFFCLKN[3]
VCCSSC
DCPSST
DCPSUS[1] DCPSUS[2]
V_PROC_IO
VCCRTC
POWER
POWER
VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCSUS3_3[1]
VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5]
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
VCCAPLLSATA
SATA USB
SATA USB
CPURTC
CPURTC
HDA
HDA
VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
V5REF
VCC3_3[1] VCC3_3[8] VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12] VCCIO[13]
VCCIO[6]
VCCVRM[1]
VCCIO[2] VCCIO[3] VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
N26 P26 P28 T27 T29
T23 T24 V23 V24 P24
T26
M26
AN23 AN24
P34
N20 N22 P20 P22
AA16 W16 T34
AJ2
AF13
AH13 AH14
AF14 AK1
AF11
AC16 AC17 AD17
T21
V21
T19
P32
+PCH_V5REF_SUS
+VCCA_USBSUS
+PCH_V5REF_RUN
+VCCSATAPLL
+1.05V_+1.5V_1.8V_RUN
+3.3V_ALW_PCH
+1.05V_RUN
+3.3V_ALW_PCH
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH59
CH59
1
2
1U_0603_10V7K~D
1U_0603_10V7K~D
1
CH70
CH70
2
+3.3V_RUN
+1.05V_M
+1.05V_RUN
+3.3V_ALW_PCH
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH76
CH76
2
+1.05V_RUN
1
2
+3.3V_ALW_PCH
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH56
CH56
1
2
+3.3V_ALW_PCH
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH66
CH66
+3.3V_RUN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH72
CH72
1
2
+1.05V_RUN
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH82
CH82
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH91
CH91
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH60
CH60
2
+3.3V_RUN
1
2
CH77
CH77
ALW_ON_3.3V#<42>
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
CH75
CH75
QH4
QH4
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
D
1 3
2
1
2
+5V_ALW_PCH
21
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH63
CH63
2
10_0402_1%~D
10_0402_1%~D
21
12
RH213
RH213
1U_0603_10V7K~D
1U_0603_10V7K~D
CH71
CH71
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
@CH62
@
1
CH62
2
LH5
@LH5
@
S
S
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
G
G
1
3300P_0402_50V7K~D
3300P_0402_50V7K~D
2
CH107
CH107
10_0402_1%~D
10_0402_1%~D
12
RH208
RH208
+1.05V_RUN
+5V_ALW_PCH+5V_ALW
CH98
CH98
20K_0402_5%~D
20K_0402_5%~D
12
RH278
RH278
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
20 61Monday, April 02, 2012
20 61Monday, April 02, 2012
20 61Monday, April 02, 2012
B
B
B
of
of
of
Page 21
5
UH4H
UH4H
H5
D D
C C
B B
A A
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
BD82QM77 QPRG C1_BGA989~D
BD82QM77 QPRG C1_BGA989~D
4
AK38
VSS[80]
AK4
VSS[81]
AK42
VSS[82]
AK46
VSS[83]
AK8
VSS[84]
AL16
VSS[85]
AL17
VSS[86]
AL19
VSS[87]
AL2
VSS[88]
AL21
VSS[89]
AL23
VSS[90]
AL26
VSS[91]
AL27
VSS[92]
AL31
VSS[93]
AL33
VSS[94]
AL34
VSS[95]
AL48
VSS[96]
AM11
VSS[97]
AM14
VSS[98]
AM36
VSS[99]
AM39
VSS[100]
AM43
VSS[101]
AM45
VSS[102]
AM46
VSS[103]
AM7
VSS[104]
AN2
VSS[105]
AN29
VSS[106]
AN3
VSS[107]
AN31
VSS[108]
AP12
VSS[109]
AP19
VSS[110]
AP28
VSS[111]
AP30
VSS[112]
AP32
VSS[113]
AP38
VSS[114]
AP4
VSS[115]
AP42
VSS[116]
AP46
VSS[117]
AP8
VSS[118]
AR2
VSS[119]
AR48
VSS[120]
AT11
VSS[121]
AT13
VSS[122]
AT18
VSS[123]
AT22
VSS[124]
AT26
VSS[125]
AT28
VSS[126]
AT30
VSS[127]
AT32
VSS[128]
AT34
VSS[129]
AT39
VSS[130]
AT42
VSS[131]
AT46
VSS[132]
AT7
VSS[133]
AU24
VSS[134]
AU30
VSS[135]
AV16
VSS[136]
AV20
VSS[137]
AV24
VSS[138]
AV30
VSS[139]
AV38
VSS[140]
AV4
VSS[141]
AV43
VSS[142]
AV8
VSS[143]
AW14
VSS[144]
AW18
VSS[145]
AW2
VSS[146]
AW22
VSS[147]
AW26
VSS[148]
AW28
VSS[149]
AW32
VSS[150]
AW34
VSS[151]
AW36
VSS[152]
AW40
VSS[153]
AW48
VSS[154]
AV11
VSS[155]
AY12
VSS[156]
AY22
VSS[157]
AY28
VSS[158]
3
UH4I
UH4I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
BD82QM77 QPRG C1_BGA989~D
BD82QM77 QPRG C1_BGA989~D
2
VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]
H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
21 61Monday, April 02, 2012
21 61Monday, April 02, 2012
21 61Monday, April 02, 2012
1
of
of
of
Page 22
5
4
3
2
1
+FAN1_VOUT
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
D2
D D
+5V_RUN
(1)DP3/DN3forSODIMMonQ14,placeQ14closetoSODIMMandC272closetoQ14 (2)DP5/DN5forSkinonQ13,placeQ13closetoVcoreVRchoke.
100P_0402_50V8J~D
100P_0402_50V8J~D
@C272
@
1
C
C
C272
100P_0402_50V8J~D
C C
B B
100P_0402_50V8J~D
@C266
@ C266
H_THERMTRIP#<7>
2
B
B
2
E
E
3 1
Q14
Q14
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
PlaceunderCPU PlaceC266closetotheQ12aspossible
C
2
1
+1.05V_RUN_VTT
C
2
B
B
E
E
3 1
Q12
Q12
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
R399
R399
1 2
2.2K_0402_5%~D
2.2K_0402_5%~D Q16
Q16
PMST3904_SOT323-3~D
PMST3904_SOT323-3~D
1
2
2
B
B
100P_0402_50V8J~D
100P_0402_50V8J~D
+3.3V_M
12
C
C
E
E
3 1
@C277
@ C277
8.2K_0402_5%~D
8.2K_0402_5%~D R395
R395
E
E
31
C
C
THERMATRIP2#
REM_DIODE2_P_4022
Q13
Q13
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
B
B
2
REM_DIODE2_N_4022
REM_DIODE1_P_4022
REM_DIODE1_N_4022
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D C278
C278
1
2
MAX8731_IINP<52>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0805_10V6K~D
10U_0805_10V6K~D
+3.3V_RUN
C275
C275
C276
C276
1
1
2
2
C270 2200P_0402_50V7K~DC270 2200P_0402_50V7K~D
C279 2200P_0402_50V7K~DC279 2200P_0402_50V7K~D
+3.3V_M
FAN1_DET#<39>
PCH_PWRGD#<40>
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C305
C305
1
2
1 2
12
R407 10K_0402_5%~D@R407 10K_0402_5%~D@ R404 10K_0402_5%~DR404 10K_0402_5%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C738
C738
1
2
1 2
R806 0_0402_5%~D@R806 0_0402_5%~D@
1 2
R391 1K_0402_1%~DR391 1K_0402_1%~D
D2
2
2 1
VDD_PWRGD
REM_DIODE1_N_4022 REM_DIODE1_P_4022
REM_DIODE2_N_4022 REM_DIODE2_P_4022
VCP2
R3874.7K_0402_5%~D R3874.7K_0402_5%~D
12
VCP_4021
R42910K_0402_5%~D R42910K_0402_5%~D
12
VSET_4021
FAN1_TACH_FB 12 12
FAN1_DET#_R
3V_PWROK#
+RTC_CELL
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
C274
C274
FAN1_DET#
FAN1_TACH_FB
C219
C219
U9
U9
2
VDD_H
3
VDD_H
6
VDD_L
13
VDD_PWRGD
23
DN1/THERM
24
DP1/VREF_T
26
DN2/DP4
27
DP2/DN4
30
N/C
29
N/C
31
VCP
25
VIN
28
VSET
10
TACH/GPIO1
11
TEST3
15
GPIO3/PWM/THERMTRIP_SIO
12
3V_PWROK#
16
RTC_PWR3V
EMC4021-1-EZK-TR_QFN32_5X5~D
EMC4021-1-EZK-TR_QFN32_5X5~D
JFAN1
JFAN1
1
1
2
2
3
3
4
4
5
GND
6
GND
ACES_50279-0040N-001
ACES_50279-0040N-001
CONN@
CONN@
LinkCIS
THERMTRIP2#
SYS_SHDN#
POWER_SW#
ACAVAIL_CLR
ATF_INT#/BC_IRQ#
FAN_OUT FAN_OUT
SMCLK/BC_CLK
SMDATA/BC_DATA
ADDR_MODE/XEN
TEST1 TEST2
VDD
VSS
HM76(w/ovpro):depopR385andpopR386
QM77(w/vpro):popR385anddepopR386
+3.3V_ALW
BC_INT#_EMC4022 FAN1_DET#
BC_INT#_EMC4022 FAN1_TACH_FB FAN1_DET#
+VCC_4022
VDD_PWRGD
THERM_STP#
FAN1_TACH_FB
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
THERMATRIP2#
17 18
N/C
THERM_STP#
19 20
21 9
5 4
8 7
1 32
14 22 33
POWER_SW#
+FAN1_VOUT
+ADDR_XEN
THERM_STP# <45>
ACAV_IN <40,52,53>
BC_INT#_EMC4022 <40>
BC_CLK_EMC4022 <40>
BC_DAT_EMC4022 <40>
1 2
R3934.7K_0402_5%~D R3934.7K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
R403
R403
+VCC_4022
R386 10K_0402_5%~D@ R386 10K_0402_5%~D@ R408 10K_0402_5%~D@ R408 10K_0402_5%~D@
R385 10K_0402_5%~DR385 10K_0402_5%~D R426 10K_0402_5%~DR426 10K_0402_5%~D R402 10K_0402_5%~DR402 10K_0402_5%~D R389 10K_0402_5%~DR389 10K_0402_5%~D
R390 47K_0402_1%~D@ R390 47K_0402_1%~D@
R430 10K_0402_5%~D@R430 10K_0402_5%~D@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
22_0402_5%~D
22_0402_5%~D
C1179
C1179
1
C273
C273
2
1 2
1 2
R388
R388
12 12
+3.3V_M
12 12 12 12
+RTC_CELL
+3.3V_RUN
+3.3V_M
12
VSET_4021
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1.24K_0402_1%~D
1.24K_0402_1%~D
12
R406
R406
1
C282
C282
2
POWER_SW#
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
+RTC_CELL
4
O
U10
U10
5
1
2
G
3
C281
C281
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
DOCK_PWR_SW# <40> POWER_SW_IN# <40>
Rest=1.24k,Tp=92degree
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
22 61Monday, April 02, 2012
22 61Monday, April 02, 2012
22 61Monday, April 02, 2012
1
of
of
of
Page 23
2
1
B B
+3.3V_RUN
1 2
PCH_CRT_RED PCH_CRT_GRN PCH_CRT_BLU PCH_CRT_HSYNC
PCH_CRT_VSYNC PCH_CRT_DDC_DAT PCH_CRT_DDC_CLK
CRT_SWITCH
PCH_CRT_RED<16> PCH_CRT_GRN<16>
PCH_CRT_BLU<16> PCH_CRT_HSYNC<16> PCH_CRT_VSYNC<16>
PCH_CRT_DDC_DAT<16> PCH_CRT_DDC_CLK<16>
CRT_SWITCH<39>
+3.3V_RUN
R556 4.7K_0402_5%~DR556 4.7K_0402_5%~D
changeTI(SA00004RS0L)asmainsourcefromPericom
0 1
SW for MB/DOCK
U18
U18 1 2 5 6 7 9
10
30
29
8 3
11 28 31 33
PI3V713-AZLEX_TQFN32_6X3~D
PI3V713-AZLEX_TQFN32_6X3~D
Source
ChanelSEL1/SEL2
MBA=B1 APR/SPR
A=B2
R G B H_SOURCE V_HOURCE SDA_SOURCE SCL_SOURCE
SEL
TEST Reserved GND
GND GND GND GPAD
5V VDD
VDD VDD VDD
H1_OUT
V1_OUT
SDA1 SCL1
H2_OUT
V2_OUT
SDA2 SCL2
R1 G1
B1
R2 G2
B2
16 4
23 32
27 25 22 20 18 12 14
26 24 21 19 17 13 15
+5V_RUN
RED_CRT GREEN_CRT BLUE_CRT HSYNC_BUF VSYNC_BUF DAT_DDC2_CRT CLK_DDC2_CRT
RED_DOCK GREEN_DOCK BLUE_DOCK HSYNC_DOCK VSYNC_DOCK DAT_DDC2_DOCK CLK_DDC2_DOCK
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
@C332
@
1
C332
2
+3.3V_RUN
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
2
@C333
@ C333
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C334
C334
2
RED_CRT <37> GREEN_CRT <37> BLUE_CRT <37> HSYNC_BUF <37> VSYNC_BUF <37> DAT_DDC2_CRT <37> CLK_DDC2_CRT <37>
RED_DOCK <38> GREEN_DOCK <38> BLUE_DOCK <38> HSYNC_DOCK <38> VSYNC_DOCK <38> DAT_DDC2_DOCK <38> CLK_DDC2_DOCK <38>
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C335
C335
C336
C336
2
2
+5V_RUN
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C339
C339
ClosetoU18
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
2
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
23 61Monday, April 02, 2012
23 61Monday, April 02, 2012
23 61Monday, April 02, 2012
of
of
of
Page 24
5
4
3
2
1
+3.3V_RUN
1 2
JLVDS1
JLVDS1
1
+CAMERA_VDD
1
2
2
3
3
4
4
5
5
6
6
7
D D
C C
STARC_111H40-100000-G4-R
STARC_111H40-100000-G4-R
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35 G1 G2 G3 G4 G5
CONN@
CONN@
36
36
37
37
38
38
39
39
40
40
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C298
C298
1
2
41 42 43 44 45
LinkCIS
+LCDVDD +3.3V_RUN
DMIC0 DMIC_CLK0 USBP12_D-
USBP12_D+
+BL_PWR_SRC
DISP_ON
1 2
LE92 BLM18BB221SN1D_2P~DLE92 BLM18BB221SN1D_2P~D
+3.3V_RUN +LCDVDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C243
C243
1
2
CAM_MIC_CBL_DET# <17>
BIA_PWM_LVDS
LCD_B2+_PCH <16>
LCD_B2-_PCH <16>
LCD_B1+_PCH <16>
LCD_B1-_PCH <16>
LCD_B0+_PCH <16>
LCD_B0-_PCH <16>
LCD_A2+_PCH <16>
LCD_A2-_PCH <16>
LCD_A1+_PCH <16>
LCD_A1-_PCH <16>
LCD_A0+_PCH <16>
LCD_A0-_PCH <16>
LDDC_DATA_PCH <16>
LDDC_CLK_PCH <16>
LCD_TST <39>
+BL_PWR_SRC
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
1
2
LCD_CBL_DET# <17>
5P_0402_50V8C~D
5P_0402_50V8C~D
1
2
5P_0402_50V8C~D
5P_0402_50V8C~D
1
2
C246
C246
LCD_BCLK+_PCH <16>
5P_0402_50V8C~D
5P_0402_50V8C~D
LCD_BCLK-_PCH <16>
@C41
@
@C40
@
1
C41
C40
2
LCD_ACLK+_PCH <16>
LCD_ACLK-_PCH <16>
5P_0402_50V8C~D
5P_0402_50V8C~D
@C42
@
@C43
@
1
C42
C43
2
R159 2.2K_0402_5%~DR159 2.2K_0402_5%~D
1 2
R160 2.2K_0402_5%~DR160 2.2K_0402_5%~D
PlaceneartoJLVDS1
ClosetoJLVDS1.39,40 ClosetoJLVD1.38 ClosetoJLVD1.38
BIA_PWM_LVDS DISP_ON
B B
10K_0402_5%~D
10K_0402_5%~D
12
R1137
R1137
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
21
D66
D66
21
D68
D68
100K_0402_5%~D
100K_0402_5%~D
12
R1138
R1138
LDDC_CLK_PCH LDDC_DATA_PCH
21
D67
D67
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
21
D69
D69
+LCDVDD
130_0402_1%~D
130_0402_1%~D
12
R413
LCDPower
LCD_VCC_TEST_EN<39>
ENVDD_PCH<16,39>
PANEL_BKEN_PCH <16>BIA_PWM_PCH <16>
PANEL_BKEN_EC <39>BIA_PWM_EC <40>
2
3
D6
D6
BAT54CW_SOT323-3~D
BAT54CW_SOT323-3~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C297
C297
2
PanelbacklightpowercontrolbyEC
R413
+LCVDVDD_CHG
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q19A
Q19A
EN_LCDPWR
1
+PWR_SRC
100K_0402_5%~D
100K_0402_5%~D
12
R422
R422
PWR_SRC_ON
1 2
R423 47K_0402_5%~DR423 47K_0402_5%~D
EN_INVPWR<40>
2
2
Q21
Q21
FDC654P-G_SSOT-6~D
FDC654P-G_SSOT-6~D
S
S
4 5
G
G
3
FDC654P:PCHANNAL
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
12
R414
R414
13
PDTC124EU_SC70-3~D
PDTC124EU_SC70-3~D
D
D
6 2
1
Q22
Q22
D
S
D
S
1 3
G
G
2
+PWR_SRC_S
470K_0402_5%~D
470K_0402_5%~D
12
3
5
4
Q20
Q20
+BL_PWR_SRC
+LCDVDD
R412
R412
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q19B
Q19B
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D C296
C296
1
2
40mil40mil
Q18
Q18
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
S
S
6
4 5
2 1
G
G
3
0.022U_0402_25V7K~D
0.022U_0402_25V7K~D
4.7M_0402_5%~D
4.7M_0402_5%~D
12
R1632
R1632
C293
C293
1
2
+3.3V_ALW
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C292
C292
1 2
R427 0_0402_5%~D@R427 0_0402_5%~D@
L10
USBP12+<17>
USBP12-<17>
A A
USBP12+ DMIC_CLK0
USBP12- USBP12_D-
L10
1
1
4
4
OCF2012181YZF_4P
OCF2012181YZF_4P
1 2
R428 0_0402_5%~D@R428 0_0402_5%~D@
2
2
3
3
USBP12_D+
DMIC_CLK0<29>
2
3
PESD5V0U2BT_SOT23-3~DD9PESD5V0U2BT_SOT23-3~D
D9
1
DMIC0<29>
DMIC0
2
3
PESD5V0U2BT_SOT23-3~DD8PESD5V0U2BT_SOT23-3~D
D8
1
+CAMERA_VDD +3.3V_RUN
WebcamPWRCTRL
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C300
C300
C299
C299
1
1
CCD_OFF<39>
2
2
Q23
Q23
PMV65XP_SOT23-3~D
PMV65XP_SOT23-3~D
D
S
D
S
1 3
G
G
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C301
C301
1
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903 4019FT
4019FT
4019FT
24 61Monday, April 02, 2012
24 61Monday, April 02, 2012
24 61Monday, April 02, 2012
1
of
of
of
Page 25
2
L99
L99
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
L19
@L19
C353 0.1U_0402_10V7K~DC353 0.1U_0402_10V7K~D
+5V_RUN
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
21
0_0402_5%~D
0_0402_5%~D
12
@D65
@
+3.3V_RUN
B B
PCH_SDVO_CTRLCLK<16>
PCH_SDVO_CTRLDATA<16>
HDMIB_PCH_HPD<16>
A A
4
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2
Q120A
Q120A
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q120B
Q120B
1M_0402_5%~D
1M_0402_5%~D
R1168
R1168
1 2
PCH_SDVO_CTRLCLK_R +5V_HDMI_DDC
61
PCH_SDVO_CTRLDATA_R
+3.3V_RUN
G
G
2
13
D
S
D
S
Q121
Q121
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
1 2
R1153 2.2K_0402_5%~DR1153 2.2K_0402_5%~D
1 2
R1152 2.2K_0402_5%~DR1152 2.2K_0402_5%~D
HDMIB_PCH_HPD_R
R1128 20K_0402_5%~DR1128 20K_0402_5%~D
1 2
D65
TMDSB_PCH_CLK#<16>
TMDSB_PCH_CLK<16>
R1163
R1163
TMDSB_PCH_P0<16>
TMDSB_PCH_N0<16>
TMDSB_PCH_P1<16>
TMDSB_PCH_N1<16>
TMDSB_PCH_P2<16>
TMDSB_PCH_N2<16>
12
C352 0.1U_0402_10V7K~DC352 0.1U_0402_10V7K~D
12
C351 0.1U_0402_10V7K~DC351 0.1U_0402_10V7K~D
12
C350 0.1U_0402_10V7K~DC350 0.1U_0402_10V7K~D
12
C347 0.1U_0402_10V7K~DC347 0.1U_0402_10V7K~D
12
C346 0.1U_0402_10V7K~DC346 0.1U_0402_10V7K~D
12
C349 0.1U_0402_10V7K~DC349 0.1U_0402_10V7K~D
12
C348 0.1U_0402_10V7K~DC348 0.1U_0402_10V7K~D
12
TMDSB_PCH_CLK#_C
TMDSB_PCH_CLK_C
TMDSB_PCH_P0_C
TMDSB_PCH_P1_C
TMDSB_PCH_N1_C
TMDSB_PCH_P2_C
TMDSB_PCH_N2_C
TMDSB_PCH_P2_C HDMI_OB TMDSB_PCH_N2_C TMDSB_PCH_P1_C TMDSB_PCH_N1_C TMDSB_PCH_P0_C TMDSB_PCH_N0_C TMDSB_PCH_CLK_C TMDSB_PCH_CLK#_C
+3.3V_RUN
R458 10K_0402_5%~DR458 10K_0402_5%~D
@
4
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
L20
1
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
L22
1
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
L21
1
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
R452 604_0402_1%R452 604_0402_1%
1 2
R450 604_0402_1%R450 604_0402_1%
1 2
R448 604_0402_1%R448 604_0402_1%
1 2
R449 604_0402_1%R449 604_0402_1%
1 2
R454 604_0402_1%R454 604_0402_1%
1 2
R453 604_0402_1%R453 604_0402_1%
1 2
R456 604_0402_1%R456 604_0402_1%
1 2
R455 604_0402_1%R455 604_0402_1%
1 2
1 2
4
1
L100
L100
1 2
L101
L101
@L20
@
1
4
L102
L102
L103
L103
@L22
@
1
4
L104
L104
L105
L105
@L21
@
1
4
L106
L106
3
2
2
3
2
3
2
3
TMDSB_CON_CLK#
3
TMDSB_CON_CLK
2
TMDSB_CON_P0
2
TMDSB_CON_N0TMDSB_PCH_N0_C
3
TMDSB_CON_P1
2
TMDSB_CON_N1
3
2
3
TMDSB_CON_P2
TMDSB_CON_N2
13
D
D
2
G
G
S
S
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q26
Q26
3.9P_0402_50V8C
3.9P_0402_50V8C C1209
C1209
1
2
3.9P_0402_50V8C
3.9P_0402_50V8C C1211
C1211
1
2
3.9P_0402_50V8C
3.9P_0402_50V8C C1213
C1213
1
2
3.9P_0402_50V8C
3.9P_0402_50V8C C1215
C1215
1
2
1
3.9P_0402_50V8C
3.9P_0402_50V8C C1210
C1210
1
2
3.9P_0402_50V8C
3.9P_0402_50V8C C1212
C1212
1
2
3.9P_0402_50V8C
3.9P_0402_50V8C C1214
C1214
1
2
3.9P_0402_50V8C
3.9P_0402_50V8C C1216
C1216
1
2
HDMI_CEC
R1165 10K_0402_5%~DR1165 10K_0402_5%~D
Note: AOI found open soldering is due to the difference between Main and 2nd on PAD dimension.
+5V_RUN
F2 change to 2nd source "SP040003H0L (F_MF-MSMF050-2)"
BAT1000-7-F_SOT23-3~D
BAT1000-7-F_SOT23-3~D
PCB Footprint
21
3
D4
D4
NC
NC
0.5A_15V_SMD1812P050TFF20.5A_15V_SMD1812P050TF
+5V_RUN_HDMI
0_1206_5%~D
0_1206_5%~D
21
F2
@
@
R5
R5
1 2
PCH_SDVO_CTRLDATA_R PCH_SDVO_CTRLCLK_R
HDMI_CEC TMDSB_CON_CLK#
TMDSB_CON_CLK TMDSB_CON_N0
TMDSB_CON_P0 TMDSB_CON_N1
TMDSB_CON_P1 TMDSB_CON_N2
TMDSB_CON_P2
+3.3V_RUN
12
+VDISPLAY_VCC
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
C337
C337
2
2
HDMIB_PCH_HPD_R
10U_0805_10V6K~D
10U_0805_10V6K~D
C338
C338
19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
JHDMI1
JHDMI1
HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CK-
GND
CK_shield
GND
CK+
GND
D0-
GND D0_shield D0+ D1­D1_shield D1+ D2­D2_shield D2+
HONGL_13-13201904CP
HONGL_13-13201904CP
LinkCIS
20 21 22 23
HDMI 46@
HDMI 46@
Part Number Description
Part Number Description
HDMI W/Logo:RO0000002HM
HDMI W/Logo:RO0000002HM
RO0000002HM
RO0000002HM
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
2
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
25 61Monday, April 02, 2012
25 61Monday, April 02, 2012
25 61Monday, April 02, 2012
of
of
of
B
B
B
Page 26
5
D D
4
3
2
1
AUX/DDCSWforDPDtoEDOCK
+3.3V_RUN
C366
C366
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
U23
U23
1
DPD_AUX_C
DPD_PCH_DOCK_AUX<16>
DPD_DOCK_AUX<38>
C C
DPD_PCH_DOCK_AUX#<16>
DPD_DOCK_AUX#<38>
12
C367 0.1U_0402_10V7K~DC367 0.1U_0402_10V7K~D
DPD_AUX#_C
12
C368 0.1U_0402_10V7K~DC368 0.1U_0402_10V7K~D
DPD_CA_DET<38>
BE0
2
A0
3
B0
4
BE1
5
A1
6
B1
7
GND
PI3C3125LEX_TSSOP14~D
PI3C3125LEX_TSSOP14~D
+5V_RUN
5
A2Y
3
Note:Whenimplement2ndsource,pleasecheckVilandVihspecismeetmainsourcespec
B B
+3.3V_RUN
1 2
R487 2.2K_0402_5%~DR487 2.2K_0402_5%~D
1 2
R488 2.2K_0402_5%~DR488 2.2K_0402_5%~D
1 2
R489 2.2K_0402_5%~DR489 2.2K_0402_5%~D
1 2
R490 2.2K_0402_5%~DR490 2.2K_0402_5%~D
1 2
R491 1M_0402_5%~DR491 1M_0402_5%~D
1 2
R492 1M_0402_5%~DR492 1M_0402_5%~D
PCH_DDPC_CTRLCLK PCH_DDPC_CTRLDATA PCH_DDPD_CTRLCLK PCH_DDPD_CTRLDATA
DPD_CA_DET DPC_CA_DET
14
VCC
13
BE3
12
A3
11
B3
10
BE2
9
A2
8
B2
C369
C369
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D 1
NC
4
G
U24
U24
TC7SET04FU_SSOP5~D
TC7SET04FU_SSOP5~D
PCH_DDPD_CTRLCLK <16>
PCH_DDPD_CTRLDATA <16>
DPD_CA_DET#
Intel WW18 Strapping option
Intel WW18 Strapping option
DPC_PCH_DOCK_AUX<16>
DPC_DOCK_AUX<38>
DPC_PCH_DOCK_AUX#<16>
DPC_DOCK_AUX#<38>
Note:Whenimplement2ndsource,pleasecheckVilandVihspecismeetmainsourcespec
AUX/DDCSWforDPCtoEDOCK
U20
DPC_AUX_C
12
C357 0.1U_0402_10V7K~DC357 0.1U_0402_10V7K~D
DPC_AUX#_C
12
C360 0.1U_0402_10V7K~DC360 0.1U_0402_10V7K~D
DPC_CA_DET<38>
U20
1
BE0
2
A0
3
B0
4
BE1
5
A1
6
B1
7
GND
PI3C3125LEX_TSSOP14~D
PI3C3125LEX_TSSOP14~D
+5V_RUN
5
A2Y
3
14
VCC
13
BE3
12
A3
11
B3
10
BE2
9
A2
8
B2
C365
C365
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D 1
NC
4
G
U21
U21
TC7SET04FU_SSOP5~D
TC7SET04FU_SSOP5~D
DPC_CA_DET#
+3.3V_RUN
C356
C356
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PCH_DDPC_CTRLCLK <16>
PCH_DDPC_CTRLDATA <16>
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903 4019FT
4019FT
4019FT
26 61Monday, April 02, 2012
26 61Monday, April 02, 2012
26 61Monday, April 02, 2012
1
of
of
of
Page 27
5
D D
4
3
2
1
12
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
HDD_DET#
FFS_INT2_Q
@
@
Q28A
Q28A
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
12
3
5
4
@
@
R499
R499
HDD_EN_5V
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1M_0402_5%~D
1M_0402_5%~D
12
@
@
Q28B
Q28B
JSATA1
JSATA1
1
GND
2
A+
3
A-
4
GND
5
B-
6
B+
7
GND
8
V33
9
V33
10
V33
11
GND
12
GND
13
GND
14
V5
15
V5
16
V5
17
GND
18
Reserved
19
GND
20
V12
21
V12
22
V12
SANTA_198202-1
SANTA_198202-1 CONN@
CONN@
LinkCIS
R517
R517
+5V_ALW
6
2
1
D
D
Q27
@
Q27
G
G
3
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D @
@
@
@
C393
C393
1
2
23
GND
24
GND
@
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
S
S
4 5
+5V_HDD
10U_0805_10V6K~D
10U_0805_10V6K~D
100K_0402_5%~D
100K_0402_5%~D
1
12
C394
C394
R504
R504
2
PJP3
@PJP3
@
112
JUMP_43X79
JUMP_43X79
+5V_RUN
2
HDDpower
+3.3V_RUN
R501 10K_0402_5%~DR501 10K_0402_5%~D R502 10K_0402_5%~DR502 10K_0402_5%~D
+3.3V_RUN
C C
B B
R503 100K_0402_5%~DR503 100K_0402_5%~D
PJP53
@PJP53
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
DDR_XDP_WAN_SMBDAT<7,12,13,14,15,34> DDR_XDP_WAN_SMBCLK<7,12,13,14,15,34>
1 2 1 2 1 2
1
2
HDD_FALL_INT<17>
FFS_INT2<18>
DDR_XDP_WAN_SMBDAT DDR_XDP_WAN_SMBCLK HDD_FALL_INT
+3.3V_RUN_FFS
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C388
C388
C387
C387
2
FFS_INT2
HDD_FALL_INT FFS_INT2
+3.3V_RUN
100K_0402_5%~D
100K_0402_5%~D
12
61
2
R508
R508
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q29A
Q29A
U88
U88
LNG3DM
LNG3DM
VDD_IO VDD
INT 1 INT 2
SDO/SA0 SDA / SDI / SDO SCL/SPC
CS
100K_0402_5%~D
100K_0402_5%~D
@R506
@
12
R506
FFS_INT2_Q
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q29B
Q29B
4
RES RES RES RES
GND GND
1
14 11
9 7
6 4
8
LNG3DMTR_LGA16_3X3~D
LNG3DMTR_LGA16_3X3~D
+5V_HDD
5
10 13 15 16
5 12
2
NC
3
NC
RUN_ON<35,39,42,47,48>
SIO_SLP_S3#<11,16,35,39,42,47,48,49>
PSATA_PTX_DRX_P0_C<14> PSATA_PTX_DRX_N0_C<14>
PSATA_PRX_DTX_N0_C<14> PSATA_PRX_DTX_P0_C<14>
Note:ShortPJP64forSSDHDDissue
+5V_HDD
1 2
R1621 0_0402_5%~D@R1621 0_0402_5%~D@
1 2
R1624 0_0402_5%~D@R1624 0_0402_5%~D@
C383 0.01U_0402_16V7K~DC383 0.01U_0402_16V7K~D C384 0.01U_0402_16V7K~DC384 0.01U_0402_16V7K~D
C385 0.01U_0402_16V7K~DC385 0.01U_0402_16V7K~D C386 0.01U_0402_16V7K~DC386 0.01U_0402_16V7K~D
+3.3V_RUN
1
2
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
C395
C395
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
+3.3V_RUN_HDD
C396
C396
1000P_0402_50V7K~D
1000P_0402_50V7K~D
12 12
12 12
PJP64
@PJP64
@
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C402
C402
1
2
100K_0402_5%~D
100K_0402_5%~D
12
+3.3V_RUN_HDD
HDD_DET#<14>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C399
C399
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
@R500
@ R500
2
@
@
R505
R505
SATA_PTX_DRX_P0 SATA_PTX_DRX_N0
SATA_PRX_DTX_N0 SATA_PRX_DTX_P0
+5V_HDD
ClosetoJSATA1
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
27 61Monday, April 02, 2012
27 61Monday, April 02, 2012
27 61Monday, April 02, 2012
1
of
of
of
Page 28
5
D D
4
3
2
1
C C
ODDpower
+PWR_SRC_S
470K_0402_5%~D
470K_0402_5%~D
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
12
R509
R509
MODC_EN#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q31A
Q31A
MODC_EN<39>
B B
2
100K_0402_5%~D
100K_0402_5%~D
12
R512
R512
12
R507
R507
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q31B
Q31B
5
4
MOD_EN
4.7M_0402_5%~D
4.7M_0402_5%~D
12
R518
R518
1
2
+5V_ALW
G
G
3
0.022U_0402_25V7K~D
0.022U_0402_25V7K~D
C400
C400
6
2
1
D
D
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
S
S
+5V_MOD +5V_RUN
4 5
100K_0402_5%~D
100K_0402_5%~D
10U_0805_10V6K~D
10U_0805_10V6K~D
12
1
C401
C401
2
R511
R511
Q30
Q30
PJP4
@PJP4
@
112
JUMP_43X79
JUMP_43X79
2
+3.3V_RUN
R1125 100K_0402_5%~DR1125 100K_0402_5%~D
SATA_ODD_PTX_DRX_P1_C<14> SATA_ODD_PTX_DRX_N1_C<14>
SATA_ODD_PRX_DTX_N1_C<14> SATA_ODD_PRX_DTX_P1_C<14>
DEVICE_DET#
12
C407 0.01U_0402_16V7K~DC407 0.01U_0402_16V7K~D C406 0.01U_0402_16V7K~DC406 0.01U_0402_16V7K~D
C405 0.01U_0402_16V7K~DC405 0.01U_0402_16V7K~D C404 0.01U_0402_16V7K~DC404 0.01U_0402_16V7K~D
12 12
12 12
DEVICE_DET#<40>
T88PAD~D @T88PAD~D @
+5V_MOD
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C397
C397
2
SATA_ODD_PTX_DRX_P1 SATA_ODD_PTX_DRX_N1
SATA_ODD_PRX_DTX_N1 SATA_ODD_PRX_DTX_P1
DEVICE_DET#
+5V_MOD
TEST POINT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C398
C398
2
CONN@
CONN@ JSATA2
JSATA2
1
GND
2
RX+
3
RX-
4
GND
5
TX-
6
TX+
7
GND
8
DP
9
+5V
10
+5V
11
MD
12
GND
13
GND
SANTA_205902-1~D
SANTA_205902-1~D
LinkCIS
GND1 GND2
14 15
ClosetoJSATA2
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
28 61Monday, April 02, 2012
28 61Monday, April 02, 2012
28 61Monday, April 02, 2012
1
of
of
of
Page 29
2
1
15milstrace
INT_SPK_L+ INT_SPK_L­INT_SPK_R+ INT_SPK_R-
B B
InternalSpeakersHeader
L91 BLM18PG121SN1D_0603L91 BLM18PG121SN1D_0603
1 2
L92 BLM18PG121SN1D_0603L92 BLM18PG121SN1D_0603
1 2
L93 BLM18PG121SN1D_0603L93 BLM18PG121SN1D_0603
1 2
L94 BLM18PG121SN1D_0603L94 BLM18PG121SN1D_0603
1 2
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
1
C973
C973
2
2
3.3_0402_5%~D
3.3_0402_5%~D
3.3_0402_5%~D
3.3_0402_5%~D
R169
R169
1 2
1 2
2200P_0402_50V7K~D
1
1
C974
C974
C975
C975
C976
C976
2
2
3.3_0402_5%~D
3.3_0402_5%~D
3.3_0402_5%~D
3.3_0402_5%~D
R170
R170
R171
R171
R172
R172
1 2
1 2
3
2
1
INT_SPKL_L+ INT_SPKR_L­INT_SPKR_R+ INT_SPKR_R-
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
3
DE2
DE2
1
JSPK1
JSPK1 1 2 3 4
5 6
ACES_50279-0040N-001
ACES_50279-0040N-001
CONN@
CONN@
LinkCIS
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
DE1
DE1
1 2 3 4
GND GND
PlaceclosedU72
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C980
C980
2
+3.3V_RUN
4.7K_0402_5%~D
4.7K_0402_5%~D @R1084
@
12
R1084
PCH_AZ_CODEC_RST#
10P_0402_50V8J~D
10P_0402_50V8J~D
1
2
R1083
R1083
12
2.49K_0402_1%~D
2.49K_0402_1%~D
+3.3V_RUN
100K_0402_5%~D
100K_0402_5%~D
12
R1087
R1087
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
@C984
@ C984
+VDDA_AVDD
AUD_HP_NB_SENSE <37,39>
@C967
@ C967
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK 47_0402_5%~D
47_0402_5%~D
@R1077
@
12
R1077
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
@C978
@ C978
2
10_0402_1%~D
10_0402_1%~D
@R1076
@
12
R1076
10P_0402_50V8J~D
10P_0402_50V8J~D
1
@C977
@ C977
2
PlacecloselytoPin13.
ClosetoU72pin6ClosetoU72pin5
AUD_SENSE_A
2
Q107A
Q107A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
A A
Addforsolvepopnoiseanddetectissue
61
20K_0402_1%~D
20K_0402_1%~D
12
R1086
R1086
3
5
Q107B
Q107B
4
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+3.3V_RUN +3.3V_RUN_DVDD +3.3V_RUN_DVDD
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
PCH_AZ_CODEC_BITCLK<14> PCH_AZ_CODEC_SDOUT<14> PCH_AZ_CODEC_SYNC<14> PCH_AZ_CODEC_SDIN0<14>
PCH_AZ_CODEC_RST#<14>
DMIC1
Resistor SENSE_A SENSE_B
39.2K
PlacecloselytoPin14
AUD_SENSE_B
+3.3V_RUN
100K_0402_5%~D
100K_0402_5%~D
12
R1081
R1081
Q106A
Q106A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+VDDA_AVDD
R1078
R1078
12
2.49K_0402_1%~D
20K_0402_1%~D
20K_0402_1%~D
39.2K_0402_1%~D
39.2K_0402_1%~D 12
12
R1080
R1080
R1079
R1079
3
61
2
4
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2.49K_0402_1%~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C979
C979
+3.3V_RUN
100K_0402_5%~D
100K_0402_5%~D
2
12
R1082
R1082
5
Q106B
Q106B
DOCK_MIC_DET <39>DOCK_HP_DET<39>
2
20K
10K
5.11K
2.49K
PORTB
PORTC
PORTD
PlaceC994,C952~C957closetoCodec
PJP60
@PJP60
@
1U_0603_10V7K~D
1U_0603_10V7K~D
1
C952
C952
2
AUD_NB_MUTE#<39>
Camera/BDMIC0
Power/B
PORTA
PORTB
NA
SPDIFOUT0
PulluptoAVDD
ExternalMICPORTA
HeadPhoneOut
DockAudio
InternalSPK
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C994
C994
2
1 2
PlaceR1096closetocodec
I2S_MCLK
R167 0_0402_5%~D@ R167 0_0402_5%~D@
I2S_BCLK
R168 0_0402_5%~D@ R168 0_0402_5%~D@ I2S_DO I2S_LRCLK I2S_DI#
+3.3V_RUN
PORTE
PORTF
DMIC0
SPDIFOUT1(DMIC1)
+DVDD_CORE
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
33_0402_5%~DR1096 33_0402_5%~DR1096
1 2 1 2 1 2
PlaceR1097closetocodec
1 2
Notes: KeepPVDDsupplyandspeakertracesroutedontheDGNDplane. KeepawayfromAGNDandotheranalogsignals placeatCodecbottomside
C953
C953
33_0402_5%~DR1097 33_0402_5%~DR1097
10K_0402_5%~DR1099 10K_0402_5%~DR1099
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C954
C954
2
PCH_AZ_CODEC_BITCLK PCH_AZ_CODEC_SDOUT
PCH_AZ_SDIN0_R
PCH_AZ_CODEC_RST#
I2S_MCLK_R I2S_BCLK_R I2S_DO_R
PJP62
@PJP62
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
PJP63
@PJP63
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
U72
U72
1
DVDD_CORE
3
DVDD_IO
9
DVDD
6
BITCLK
5
SDATA_OUT
10
SYNC
8
SDATA_IN
11
RESET#
15
I2S_MCLK
16
I2S_SCLK
17
I2S_DOUT
18
I2S_LRCLK
24
I2S_DIN
19
No Connect
20
No Connect
47
EAPD
7
DVSS
42
PVSS
49
GND
92HD90B2X5NLGXYAX8_QFN48_7X7~D
92HD90B2X5NLGXYAX8_QFN48_7X7~D
R162,R163,R164,R165,R166COlaywithU73
DAI_BCLK# DAI_LRCK# DAI_DO# DAI_12MHZ#
SENSE_A SENSE_B
PORTA_L PORTA_R VrefOut_A
PORTB_L PORTB_R
PORTD_+L PORTD_-L
PORTD_+R
PORTD_-R
MONO_OUT
PC_BEEP
DMIC_CLK/GPIO 1
DMIC_0/GPIO 2
DMIC1/GPIO0/SPDIFOUT1
SPDIFOUT0//GPIO3/Aux_Out
VREFFILT
R162 22_0402_5%~DR162 22_0402_5%~D
1 2
R163 0_0402_5%~DR163 0_0402_5%~D
1 2
R164 0_0402_5%~DR164 0_0402_5%~D
1 2
R165 22_0402_5%~DR165 22_0402_5%~D
1 2
EN_I2S_NB_CODEC#
R1540 1K_0402_1%~D@R1540 1K_0402_1%~D@
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
AVDD1 AVDD2
PVDD PVDD
CAP+
CAP-
CAP2
Vreg
AVSS1
AVSS AVSS
placeatAGNDandDGNDplane
C981 0.1U_0402_25V6K~DC981 0.1U_0402_25V6K~D C982 0.1U_0402_25V6K~DC982 0.1U_0402_25V6K~D C983 0.1U_0402_25V6K~DC983 0.1U_0402_25V6K~D C985 0.1U_0402_25V6K~DC985 0.1U_0402_25V6K~D C986 0.1U_0402_25V6K~DC986 0.1U_0402_25V6K~D C987 0.1U_0402_25V6K~DC987 0.1U_0402_25V6K~D
+3.3V_RUN
placeclosetopin27
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
27
C957placeclosetopin38
38 45
39
AUD_SENSE_A
13
AUD_SENSE_B
14
MIC_IN_L
28
MIC_IN_R
29
+VREFOUT
23 31
32
INT_SPK_L+
40
INT_SPK_L-
41
INT_SPK_R+
44
INT_SPK_R-
43 25 12
DMIC_CLK_L
2 4 46 48
36
1
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
35
PlaceC962closetocodec
CODEC_VREF
21
CODEC_CAP2
22
CODEC_VN
34
V-
CODEC_VREG
37 26
30 33
1 2 1 2 1 2 1 2 1 2 1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D C1103
C1103
2
1
U73
@U73
@
16
VCC
I2S_BCLK DAI_BCLK#
2
1A
I2S_LRCLK
4
2A
I2S_DO
6
3A
10
4A
12
5A
14
6A
1
OE1#
15
12
OE2#
CD74HC366M96_SO16~D
CD74HC366M96_SO16~D
+VDDA_AVDD
1U_0603_10V7K~D
1U_0603_10V7K~D
10U_0805_10V6K~D
10U_0805_10V6K~D
1
1
C957
C957
C956
C956
C955
C955
2
2
2.2U_0603_6.3V6K~DC1163 2.2U_0603_6.3V6K~DC1163
1 2
+VREFOUT
1 2
R1143 2.2K_0402_5%~DR1143 2.2K_0402_5%~D
AUD_PC_BEEP
PlaceLE3/LE4closetocodec
LE3 BLM18BB221SN1D_2P~DLE3 BLM18BB221SN1D_2P~D
1 2
LE4 BLM18BB221SN1D_2P~DLE4 BLM18BB221SN1D_2P~D
1 2
1 2
R1641 0_0402_5%~DR1641 0_0402_5%~D
C962
C962
+3.3V_RUN
DA204U_SOT323-3~D
DA204U_SOT323-3~D
3
2
3
@D54
@ D54
1
1
3
1Y#
5
2Y#
7
3Y#
9
4Y#
11
5Y#
I2S_DI#
13
R166 0_0402_5%~DR166 0_0402_5%~D
8
1 2
6Y#
GND
1 2
BLM21PG600SN1D_0805~D
BLM21PG600SN1D_0805~D
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C958
C958
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D 1
1
C963
C963
2
2
DA204U_SOT323-3~D
DA204U_SOT323-3~D
2
3
@D55
@ D55
1
+5V_RUN
L77
L77
+VDDA_PVDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0805_10V6K~D
10U_0805_10V6K~D
1
1
1
C959
C959
C961
C961
C960
C960
2
2
2
MIC_IN_R <37>
AUD_HP_OUT_L <37> AUD_HP_OUT_R <37>
C1105 0.1U_0402_25V6K~DC1105 0.1U_0402_25V6K~D
12
C1106 0.1U_0402_25V6K~DC1106 0.1U_0402_25V6K~D
12
DMIC_CLK0 <24> DMIC_CLK1 <43> DMIC0 <24> DMIC1 <43> EN_I2S_NB_CODEC# <39>
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1U_0603_10V7K~D
1U_0603_10V7K~D
10U_0805_10V6K~D
10U_0805_10V6K~D
1
1
C964
C964
C965
C965
C966
C966
2
2
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
2
3
2
1
DAI_DI
@D57
@
@D56
@
D57
D56
1
DAI_LRCK# DAI_DO# DAI_12MHZ#I2S_MCLK
+3.3V_RUN
2
3
1
+5V_RUN
12
R10950_0805_5%~D R10950_0805_5%~D
+VREFOUT
1U_0603_10V7K~D
1U_0603_10V7K~D
1
C1180
C1180
2
R1119 100K_0402_5%~DR1119 100K_0402_5%~D
1 2
R1120 100K_0402_5%~DR1120 100K_0402_5%~D
1 2
R1141 10K_0402_5%~D@ R1141 10K_0402_5%~D@
1 2
R1142 10K_0402_5%~D@ R1142 10K_0402_5%~D@
1 2
DAI_BCLK# <38> DAI_LRCK# <38>
DAI_DO# <38>
DAI_12MHZ# <38>
D58
@D58
@
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DAI_DI <38>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
SPKR <14>
BEEP <40>
29 61Monday, April 02, 2012
29 61Monday, April 02, 2012
29 61Monday, April 02, 2012
B
B
B
of
of
of
Page 30
5
4
3
2
1
D D
C C
B B
A A
+3.3V_LAN
R545 10K_0402_5%~D@R545 10K_0402_5%~D@ R546 10K_0402_5%~D@R546 10K_0402_5%~D@
PM_LANPHY_ENABLE<18>
LAN_TX0+ LAN_TX0+R LAN_TX0-
LAN_TX1+
LAN_TX2+ LAN_TX2+R LAN_TX2-
LAN_TX3+ LAN_TX3-
R555 0_0402_5%~D@R555 0_0402_5%~D@
LayoutNotice:Placeas closePI3L500aspossible
1 2
L30 12NH_0603CS-120EJTS_5%~DL30 12NH_0603CS-120EJTS_5%~D
1 2
L31 12NH_0603CS-120EJTS_5%~DL31 12NH_0603CS-120EJTS_5%~D
1 2
L33 12NH_0603CS-120EJTS_5%~DL33 12NH_0603CS-120EJTS_5%~D
1 2
L32 12NH_0603CS-120EJTS_5%~DL32 12NH_0603CS-120EJTS_5%~D
1 2
L34 12NH_0603CS-120EJTS_5%~DL34 12NH_0603CS-120EJTS_5%~D
1 2
L35 12NH_0603CS-120EJTS_5%~DL35 12NH_0603CS-120EJTS_5%~D
1 2
L36 12NH_0603CS-120EJTS_5%~DL36 12NH_0603CS-120EJTS_5%~D
1 2
L37 12NH_0603CS-120EJTS_5%~DL37 12NH_0603CS-120EJTS_5%~D
TP_LAN_JTAG_TMS
1 2
TP_LAN_JTAG_TCK
1 2
+3.3V_LAN
12
1 2
12
R1144 0_0402_5%~DR1144 0_0402_5%~D
25MHZ_18PF_X3G025000DI1H-H~D
25MHZ_18PF_X3G025000DI1H-H~D
1
33P_0402_50V8J~D
33P_0402_50V8J~D
2
2
C470
C470
1
NeedtoverifyA3silicondrive powerbeforeremovingC427 KDScrystalvenderverify drivinglevelinA3
+3.3V_LAN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C472
C472
1
1
2
2
LAN_TX0-R
LAN_TX1+R LAN_TX1-RLAN_TX1-
LAN_TX2-R
LAN_TX3+R LAN_TX3-R
DOCKED<39>
LOM_ACTLED_YEL# LOM_SPD100LED_ORG# LOM_SPD10LED_GRN#
1:TODOCK
DOCKEDFROMNIC
0:TORJ45
5
10K_0402_5%~D
10K_0402_5%~D
R549
R549
LAN_DISABLE#_R
10K_0402_5%~D
10K_0402_5%~D
@R557
@ R557
1 2
Y3
Y3
IN
OUT
GND
GND
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C473
C473
C474
C474
1
2
LANCLK_REQ#<15>
PLTRST_LAN#<17>
CLK_PCIE_LAN<15> CLK_PCIE_LAN#<15>
PCIE_PRX_GLANTX_P7<15>
PCIE_PRX_GLANTX_N7<15>
PCIE_PTX_GLANRX_P7<15>
PCIE_PTX_GLANRX_N7<15>
LAN_SMBCLK<15>
LAN_SMBDATA<15>
3
33P_0402_50V8J~D
33P_0402_50V8J~D
4
2
C471
C471
1
39
U32
U32
2
A0+
3
A0-
6
A1+
7
A1-
9
A2+
10
A2-
11
A3+
12
A3-
13
SEL
15
LEDA0
16
LEDA1
42
LEDA2
5
PD
43
PAD_GND
PI3L720ZHEX_TQFN42_9X3P5~D
PI3L720ZHEX_TQFN42_9X3P5~D
1 2
R1187 0_0402_5%~D@R1187 0_0402_5%~D@
C458 0.1U_0402_10V7K~DC458 0.1U_0402_10V7K~D C459 0.1U_0402_10V7K~DC459 0.1U_0402_10V7K~D
1 2
C460 0.1U_0402_10V7K~DC460 0.1U_0402_10V7K~D
1 2
C461 0.1U_0402_10V7K~DC461 0.1U_0402_10V7K~D
1 2
R551 0_0402_5%~D@R551 0_0402_5%~D@
1 2
R552 0_0402_5%~D@R552 0_0402_5%~D@
LAN_DISABLE#_R<39>
T142 PAD~D@T142 PAD~D@ T143 PAD~D@T143 PAD~D@
1K_0402_1%~D
1K_0402_1%~D
12
38
VDD1VDD4VDD8VDD14VDD21VDD30VDD
B0+
37
B0-
34
B1+
33
B1-
29
B2+
28
B2-
25
B3+
24
B3-
17
LEDB0
18
LEDB1
41
LEDB2
36
C0+
35
C0-
32
C1+
31
C1-
27
C2+
26
C2-
23
C3+
22
C3-
19
LEDC0
20
LEDC1
40
LEDC2
+3.3V_RUN
10K_0402_5%~D
10K_0402_5%~D
12
R547
R547
U31
U31
48
CLK_REQ_N
36
PE_RST_N
44
PE_CLKP
45
PE_CLKN
38
PETp
39
PETn
41
PERp
42
PERn
28
SMB_CLK
31
SMB_DATA
3
LAN_DISABLE_N
26
LED0
27
LED1
25
LED2
32
JTAG_TDI
34
JTAG_TDO
33
JTAG_TMS
35
JTAG_TCK
9
XTAL_OUT
10
XTAL_IN
30
TEST_EN
12
RBIAS
JTAG LED
JTAG LED
CLK_PCIE_LAN CLK_PCIE_LAN#
PCIE_PRX_GLANTX_P7_C
12
PCIE_PRX_GLANTX_N7_C
12
PCIE_PTX_GLANRX_P7_C PCIE_PTX_GLANRX_N7_C
LAN_SMBCLK_R LAN_SMBDATA_R
LOM_ACTLED_YEL# LOM_SPD100LED_ORG# LOM_SPD10LED_GRN#
TP_LAN_JTAG_TDI TP_LAN_JTAG_TDO TP_LAN_JTAG_TMS TP_LAN_JTAG_TCK
XTALO XTALI
LAN_TEST_EN RES_BIAS
3.01K_0402_1%~D
3.01K_0402_1%~D
R561
R561
R562
R562
12
LANCLK_REQ#_R
LANANALOGSWITCH
SW_LAN_TX0+ <37> SW_LAN_TX0- <37>
SW_LAN_TX1+ <37> SW_LAN_TX1- <37>
SW_LAN_TX2+ <37> SW_LAN_TX2- <37>
SW_LAN_TX3+ <37> SW_LAN_TX3- <37>
LAN_ACTLED_YEL# <37> LED_100_ORG# <37> LED_10_GRN# <37>
DOCK_LOM_TRD0+ <38> DOCK_LOM_TRD0- <38>
DOCK_LOM_TRD1+ <38> DOCK_LOM_TRD1- <38>
DOCK_LOM_TRD2+ <38> DOCK_LOM_TRD2- <38>
DOCK_LOM_TRD3+ <38> DOCK_LOM_TRD3- <38>
DOCK_LOM_ACTLED_YEL# <38> DOCK_LOM_SPD100LED_ORG# <38> DOCK_LOM_SPD10LED_GRN# <38>
4
MDI_PLUS0
MDI_MINUS0
MDI_PLUS1
MDI_MINUS1
MDI
MDI
MDI_PLUS2
PCIE
PCIE
MDI_MINUS2
MDI_PLUS3
MDI_MINUS3
RSVD_NC
RSVD_VCC3P3_1 RSVD_VCC3P3_2
SMBUS
SMBUS
VDD3P3_IN
VDD3P3_OUT
VDD3P3_15 VDD3P3_19 VDD3P3_29
VDD1P0_47 VDD1P0_46 VDD1P0_37
VDD1P0_43 VDD1P0_11 VDD1P0_40
VDD1P0_22 VDD1P0_16
VDD1P0_8
CTRL_1P0
VSS_EPAD
82579_QFN48_6X6~D
82579_QFN48_6X6~D
13 14
17 18
20 21
23 24
6 1
2 5
4 15
19 29
47 46 37
43 11 40
22 16 8
7 49
TODOCK
LAN_TX0+ LAN_TX0-
LAN_TX1+ LAN_TX1-
LAN_TX2+ LAN_TX2-
LAN_TX3+ LAN_TX3-
VCT_LAN_R1
+RSVD_VCC3P3_1 +RSVD_VCC3P3_2
+3.3V_LAN_OUT
+1.0V_LAN
REGCTL_PNP10
3
L29
REGCTL_PNP10
L29
1 2
4.7UH_CBC2012T4R7M_20%~D
4.7UH_CBC2012T4R7M_20%~D
PlaceR548,C462,C463andL29closetoU31
R152 0_0402_5%~D@R152 0_0402_5%~D@ R553 4.7K_0402_5%~DR553 4.7K_0402_5%~D
R554 4.7K_0402_5%~DR554 4.7K_0402_5%~D
12 12
12
1U_0603_10V7K~D
1U_0603_10V7K~D
1
C464
C464
2
+3.3V_LAN +3.3V_LAN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C466
C466
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D 1
1
C467
C467
2
2
Note:+1.0V_LANwillworkat0.95Vto1.15V
+1.0V_LANPOWEROPTIONS
SharedwithPCH
1.05VSVR
STUFF:R548 NOSTUFF:L29
+3.3V_LAN
C478
C478
1 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D LOM_SPD100LED_ORG# LOM_SPD10LED_GRN#
RL46 0_0402_5%~D@RL46 0_0402_5%~D@
AUX_ON<40>
SIO_SLP_LAN#<16,39>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
RL47 0_0402_5%~D@RL47 0_0402_5%~D@
1 2 1 2
5
1
P
B
2
A
G
3
4
O
U15
U15
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
12
R565
R565
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q35A
Q35A
2
2
WLAN_LAN_DISB# <39>
+PWR_SRC_S
5
*
100K_0402_5%~D
100K_0402_5%~D
12
R564
R564
ENAB_3VLAN
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q35B
Q35B
4
+1.0V_LAN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C462
C462
1
2
+1.0V_LAN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C469
C469
C468
C468
2
InternalSRV
STUFF:L29 NOSTUFF:R548
+3.3V_ALW
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
+1.05V_M
C463
C463
C1177
C1177
1 2
R5480_0805_5%~D @R5480_0805_5%~D @
+3.3V_LAN
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1178
C1178
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
2
PlaceC1178closetopin5
Q34
Q34
D
D
6 2
1
G
G
1M_0402_5%~D
1M_0402_5%~D
12
R1638
R1638
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
+3.3V_LAN
S
S
45
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
3
2
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C477
C477
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
C475
C475
1 2
R563 0_1206_5%~D@R563 0_1206_5%~D@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C476
C476
2
1
+3.3V_M
30 61Monday, April 02, 2012
30 61Monday, April 02, 2012
30 61Monday, April 02, 2012
of
of
of
B
B
B
Page 31
5
D D
C C
4
3
2
1
BLANK
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc. SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
31 61Monday, April 02, 2012
31 61Monday, April 02, 2012
31 61Monday, April 02, 2012
1
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of
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Page 32
5
+3.3V_RUN_TPM+3.3V_RUN
PJP61
@PJP61
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
+3.3V_RUN_TPM
1 2
D D
C C
R873 0_0402_5%~D1@ R873 0_0402_5%~D1@
12
+3.3V_SB3V
SP_TPM_LPC_EN<39>
CLK_PCI_TPM_TCM
33_0402_5%~D
33_0402_5%~D
@RE5
@ RE5
+3.3V_RUN_TPM
R1663 10K_0402_5%~D@R1663 10K_0402_5%~D@ R1662 0_0402_5%~D5@R1662 0_0402_5%~D5@
CLK_PCI_TPM_TCM<15>
LPC_LFRAME#<14,34,39,40>
PCH_PLTRST#_EC<17,34,35,39,40>
IRQ_SERIRQ<14,39,40>
1 2 1 2
D87 RB751S40T1_SOD523-2~D@D87 RB751S40T1_SOD523-2~D@
LPC_LAD0<14,34,39,40> LPC_LAD1<14,34,39,40> LPC_LAD2<14,34,39,40> LPC_LAD3<14,34,39,40>
CLKRUN#<16,39,40>
4
+3.3V_SB3V
1
2
SP_TPM_LPC_EN_R
21
LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3
CLK_PCI_TPM_TCM LPC_LFRAME# PCH_PLTRST#_EC IRQ_SERIRQ CLKRUN#
TCM_BA1
3
4700P_0402_25V7K~D
4700P_0402_25V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D 1@ C45
1@
1@ C44
1@
1
C45
C44
2
ATMEL TPM for E4
U39
1@ U39
1@
5
SB3V
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
1
ATEST_1
2
ATEST_2
3
ATEST_3
AT97SC3204-X2A18-AB_TSSOP28
AT97SC3204-X2A18-AB_TSSOP28
VCC_0 VCC_1 VCC_2
V_BAT NBO_13 NBO_14
GPIO6
TESTBI
TESTI
NC_7
GND_4 GND_11 GND_18 GND_25
10 19 24
NC_12
12 13
NC_PNC_P
14
NC_6
6
TCM_BA0
9 8
PP
7 4
11 18 25
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
5@
5@
C550
C550
2
1 2
C554 1U_0402_6.3V6K~D4@ C554 1U_0402_6.3V6K~D4@
1 2
R656 4.7K_0402_5%~D@R656 4.7K_0402_5%~D@
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
5@
5@
C551
C551
2
+3.3V_RUN_TPM
+3.3V_RUN_TPM
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
1
5@
5@
C552
C552
2
2
JETWAY_CLK14M <15>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
5@
5@
C553
C553
2
1
27P_0402_50V8J~D
27P_0402_50V8J~D
@CE3
@
1
CE3
2
ColayU37andU39 LPClayout:PlaceTCMfirstandthenendLPCwithTPM.
USBP13-<17>
USBP13+<17>
China TCM: NationZ & Jetway co-lay
VDD_0 VDD_1 VDD_2
NC_5
NC_12 NC_13
NC_1 NC_2 NC_6 NC_8 NC_P
+3.3V_RUN_TPM
10 19 24
11 18 25 4
5 12 13
1 2 6 8 14
NC_12 JETWAY_CLK14M
NC_6 NC_P
+3.3V_SB3V
JETWAY_CLK14M
27P_0402_50V8J~D
27P_0402_50V8J~D
+3.3V_RUN
1
2
33_0402_5%~D
33_0402_5%~D
12
@RE6
@ RE6
@CE4
@
1
CE4
2
LOW:PowerDownMode High:WorkingMode
B B
+3.3V_RUN_TPM
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
A A
10K_0402_5%~D
10K_0402_5%~D
@R657
@
12
12
R657
5@
5@
R659
R659
@R658
@ R658
TCM_BA0 TCM_BA1
10K_0402_5%~D
10K_0402_5%~D
12
12
5@
5@
R660
R660
SP_TPM_LPC_EN_R LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3
CLK_PCI_TPM_TCM LPC_LFRAME# PCH_PLTRST#_EC IRQ_SERIRQ CLKRUN# PP TCM_BA1 TCM_BA0
U37
4@ U37
4@
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
7
PP
3
BA_1
9
BA_0
SSX44-B-D-T1_TSSOP28~D
SSX44-B-D-T1_TSSOP28~D
GND_11 GND_18 GND_25
GND_4
1 2
R741 0_0402_5%~D@R741 0_0402_5%~D@
L52
L52
4
4
1
1
OCF2012181YZF_4P
OCF2012181YZF_4P
1 2
R742 0_0402_5%~D@R742 0_0402_5%~D@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D USBP13_R_D­USBP13_R_D+
C51
C51
3
3
2
2
1 2 3 4 5 6
PS_HPF10052-06M000R
PS_HPF10052-06M000R
LinkCIS
JBIO1
JBIO1
1 2 3 4 5
G1
6
G2
CONN@
CONN@
3
7 8
USBP13_R_D-
USBP13_R_D+
2
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
D73
D73
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc. SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
32 61Monday, April 02, 2012
32 61Monday, April 02, 2012
32 61Monday, April 02, 2012
1
of
of
of
Page 33
A
1 1
+1.5V_RUN +3.3V_RUN
+3.3V_RUN
2 2
L47
L47
1 2
BLM18BD601SN1D_0603~D
BLM18BD601SN1D_0603~D
L44
L44
1 2
BLM18BD601SN1D_0603~D
BLM18BD601SN1D_0603~D
1
2
1
2
+VDDH_SD
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D 1
C561
C561
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D 1
C573
C573
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C562
C562
+PE_VDDH
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D 1
C574
C574
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
C578
C578
PCIE_PRX_MMITX_P6<15> PCIE_PRX_MMITX_N6<15> PCIE_PTX_MMIRX_P6<15> PCIE_PTX_MMIRX_N6<15>
placeclosetopinU38.32
B
1 2
BLM18PG471SN1D_2P~D
BLM18PG471SN1D_2P~D
CLK_PCIE_MMI<15> CLK_PCIE_MMI#<15>
L45
L45
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C577
C577
2
C569 0.1U_0402_10V7K~DC569 0.1U_0402_10V7K~D
1 2
C571 0.1U_0402_10V7K~DC571 0.1U_0402_10V7K~D
1 2
C567 0.1U_0402_10V7K~DC567 0.1U_0402_10V7K~D
1 2
C568 0.1U_0402_10V7K~DC568 0.1U_0402_10V7K~D
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D 1
1
C575
C575
C576
C576
2
2
PCIE_PRX_MMITX_P6_C PCIE_PRX_MMITX_N6_C PCIE_PTX_MMIRX_P6_C PCIE_PTX_MMIRX_N6_C
R677 191_0402_1%~DR677 191_0402_1%~D
1 2
PlaceR677closetoU38
PLTRST_MMI#<17>
MMICLK_REQ#<15>
PLTRST_MMI#
MMICLK_REQ#
+3.3VDDH +VDDH_SD +PE_VDDH
C
U38
U38
16
3.3VDDH
9
VDDH
32
PE_VDDH
2
PE_REFCLKP
1
PE_REFCLKM
6
PE_TXP
7
PE_TXM
5
PE_RXP
4
PE_RXM
3
PE_REXT
33
GPAD
13
PE_RST#
14
MULTI-IO1
31
MULTI-IO2
OZ600FJ0LN_QFN32_5X5~D
OZ600FJ0LN_QFN32_5X5~D
DVDD AVDD
SKT_VCC
MMI_VCC_OUT
SD_D1 SD_D2
MMI_D0
MS_D1
MS_D2 MMI_D3 MMI_D4 MMI_D5 MMI_D6 MMI_D7
MS_CD#
SD_CMD/MS_BS
MMI_CLK
SD_CD# SD_WPI
+OZ_DVDD
10
+OZ_AVDD
8
+SKT_VCC
17 15
SD/MMCDAT1_R
28
SD/MMCDAT2_R
26
SD/MMCDAT0_R
29 27 25
SD/MMCDAT3_R
24
SD/MMCDAT4_R
23
SD/MMCDAT5_R
22
SD/MMCDAT6_R
21 20
11
SD/MMCCMD_R
19 18
SD/MMCCD#
12
SDWP
30
D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C563
C563
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C565
C565
2
+3.3V_RUN_CARD R663 33_0402_5%~DR663 33_0402_5%~D
R664 33_0402_5%~DR664 33_0402_5%~D R665 33_0402_5%~DR665 33_0402_5%~D
R668 33_0402_5%~DR668 33_0402_5%~D R669 33_0402_5%~DR669 33_0402_5%~D R670 33_0402_5%~DR670 33_0402_5%~D R672 33_0402_5%~DR672 33_0402_5%~D R673 33_0402_5%~DR673 33_0402_5%~D
R674 33_0402_5%~DR674 33_0402_5%~D R676 10_0402_1%~DR676 10_0402_1%~D
1
C566
C566
2
1 2 1 2 1 2
1 2 1 2 1 2 1 2 1 2
1 2 1 2
2
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
C564
C564
SD/MMCDAT1 SD/MMCDAT2 SD/MMCDAT0
SD/MMCDAT3 SD/MMCDAT4 SD/MMCDAT5 SD/MMCDAT6 SD/MMCDAT7SD/MMCDAT7_R
SD/MMCCMD SD/MMC_CLKSD/MMCCLK_R
E
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D 1
1
C560
C560
C559
C559
2
2
SD/MMC_CLK
33_0402_5%~D
33_0402_5%~D
@RE678
@ RE678
1 2
10P_0402_50V8J~D
10P_0402_50V8J~D
@CE757
@ CE757
1
2
PlaceclosedR676pin2
Note:Thetraceneedtorouteas daisychainandthetraceofSDsignals needtorouteasshortaspossible
+3.3V_RUN_CARD
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
3 3
4 4
Vendorreviewin6/22andreserveforSD3.0UHSI200MHztransfer
10P_0402_50V8J~D
10P_0402_50V8J~D
10P_0402_50V8J~D
@C775
@ C775
1
2
10P_0402_50V8J~D
@C776
@ C776
1
2
10P_0402_50V8J~D
10P_0402_50V8J~D
@C777
@ C777
1
2
10P_0402_50V8J~D
10P_0402_50V8J~D
@C779
@ C779
1
2
SD/MMCCMDSD/MMCDAT1SD/MMCDAT0 SD/MMCDAT2 SD/MMCDAT3
10P_0402_50V8J~D
10P_0402_50V8J~D
@C780
@ C780
1
2
1
2
C570
C570
10K_0402_5%~D
10K_0402_5%~D
12
1
C572
C572
R826
R826
2
SD/MMCDAT3 SD/MMCCMD
SD/MMC_CLK SD/MMCDAT0
SD/MMCDAT1 SD/MMCDAT2
SD/MMCDAT4 SD/MMCDAT5 SD/MMCDAT6 SD/MMCDAT7
SD/MMCCD# SDWP SD/MMCCD# SDWP
JSD1
JSD1
14
DAT3/SD1
12
CMD/SD2
10
VSS1/SD3
9
VCC/SD4
8
CLK/SD5
6
GND/VSSS2/SD6
4
DAT0/SD7
3
DAT1/SD8
15
DAT2/SD9
13
DAT4/MMC10
11
DAT5/MMC11
7
DAT6/MMC12
5
DAT7/MMC13
19
CD_WP_SW/GND
20
CD_WP_SW/GND
17
CD_SW/SD
18
WP_SW/SD
2
CD_SW_TAISOL/SD
1
WP/SW_TAISOL/SD
16
GND_SW
T-SOL_156-4000000601_NR
T-SOL_156-4000000601_NR
CONN@
CONN@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
A
B
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
D
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903 4019FT
4019FT
4019FT
33 61Monday, April 02, 2012
33 61Monday, April 02, 2012
33 61Monday, April 02, 2012
E
of
of
of
Page 34
5
4
3
2
1
MiniWLAN/WIMAXH=6.7
1 2
WLAN_RADIO_DIS#<39>
D D
COEX2_WLAN_ACTIVE<41> COEX1_BT_ACTIVE<41>
MiniWWAN/GPS/LTE/UWBH=4
PCIE_PRX_WLANTX_N2<15>
+3.3V_PCIE_WWAN
PCIE_MCARD2_DET#USB_MCARD2_DET#
1 2
R697 0_0402_5%~D@ R697 0_0402_5%~D@
+3.3V_RUN
R694 100K_0402_5%~DR694 100K_0402_5%~D
C C
PCIE_PRX_WANTX_N1<15> PCIE_PRX_WANTX_P1<15>
PCIE_PTX_WANRX_N1<15> PCIE_PTX_WANRX_P1<15>
PCIE_MCARD2_DET#<17>
R727 0_0805_5%~DR727 0_0805_5%~D
B B
C597 0.1U_0402_10V7K~DC597 0.1U_0402_10V7K~D C599 0.1U_0402_10V7K~DC599 0.1U_0402_10V7K~D
+1.5V_RUN_WWAN+1.5V_RUN
12
1 2
CLK_PCIE_MINI1#<15> CLK_PCIE_MINI1<15>
PCIE_PRX_WANTX_N1 PCIE_PRX_WANTX_P1
1 2 1 2
1 2
R725 0_0402_5%~D@ R725 0_0402_5%~D@
33P_0402_50V8J~D
33P_0402_50V8J~D
C593
C593
1
1
2
2
PWR Rail
+3.3V
+3.3Vaux
+1.5V
USB_MCARD2_DET#
MINI1CLK_REQ#<15>
HW_GPS_DISABLE2#<39>
+3.3V_PCIE_WWAN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D C594
C594
Voltage Tolerance
+-9%
+-9%
+-5%
PCIE_WAKE#
MINI1CLK_REQ# CLK_PCIE_MINI1#
CLK_PCIE_MINI1
PCIE_PTX_WANRX_N1_C
PCIE_PTX_WANRX_P1_C
PCIE_MCARD2_DET#_R
33P_0402_50V8J~D
33P_0402_50V8J~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D 1
1
C610
C610
2
1
1
C612
C612
C611
C611
2
2
2
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
WWAN_SMBCLK WWAN_SMBDAT
CONN@
CONN@ JMINI1
JMINI1 1 3 5 7 9
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51
53
LCN_DAN08-52406-0500
LCN_DAN08-52406-0500
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
33P_0402_50V8J~D
33P_0402_50V8J~D
1
1
C613
C613
C614
C614
2
2
250 (Wake enable)
250
5 (Not wake enable)
375
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51
GND1
LinkCIS
330U_6.3V_M
330U_6.3V_M
+
+
NA
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D @R1159
@
@R1160
@
12
12
R1159
R1160
1 2 1 2
+3.3V_PCIE_WWAN+3.3V_PCIE_WWAN
2
2
4
4
6
6
8
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
GND2
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
@
@
1
C1176
C1176
C615
C615
+
+
2
10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52
54
LED_WWAN_OUT#
UIM_DATA UIM_CLK UIM_RESET UIM_VPP
1 2
R704 0_0402_5%~D@R704 0_0402_5%~D@
WWAN_SMBCLK WWAN_SMBDAT
USBP5­USBP5+ USB_MCARD2_DET# LED_WWAN_OUT#
100K_0402_5%~D
100K_0402_5%~D
R719
R719
1 2
DDR_XDP_WAN_SMBCLK <7,12,13,14,15,27>
R11570_0402_5%~D @R11570_0402_5%~D @ R11580_0402_5%~D @R11580_0402_5%~D @
+1.5V_RUN_WWAN +SIM_PWR
+3.3V_PCIE_WWAN
S
S
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
DDR_XDP_WAN_SMBDAT <7,12,13,14,15,27>
UIM_DATA <37> UIM_CLK <37> UIM_RESET <37> UIM_VPP <37>
USBP5- <17> USBP5+ <17>
USB_MCARD2_DET# <18>
G
G
2
13
D
D
Q77
Q77
WWAN_RADIO_DIS# <39> PCH_PLTRST#_EC <17,32,35,39,40>
WIRELESS_LED# <39,43>
COEX2_WLAN_ACTIVE
33P_0402_50V8J~D
33P_0402_50V8J~D
@C600
@ C600
1
2
PCIE_PRX_WPANTX_N5<15> PCIE_PRX_WPANTX_P5<15>
PCIE_PTX_WPANRX_N5<15> PCIE_PTX_WPANRX_P5<15>
PCIE_PRX_WLANTX_P2<15>
PCIE_PTX_WLANRX_N2<15> PCIE_PTX_WLANRX_P2<15>
PCIE_MCARD1_DET#<18>
+1.5V_RUN
+3.3V_RUN
R711 100K_0402_5%~DR711 100K_0402_5%~D
R693 0_0402_5%~D@R693 0_0402_5%~D@
D31
D31
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
1 2
R698 0_0402_5%~D@R698 0_0402_5%~D@
PCIE_WAKE#<35,40>
MINI2CLK_REQ#<15>
CLK_PCIE_MINI2#<15> CLK_PCIE_MINI2<15>
HOST_DEBUG_RX<40>
MSCLK<40>
PCH_CL_CLK1<15>
PCH_CL_DATA1<15>
PCH_CL_RST1#<15>
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D 1
1
C601
C601
2
2
+3.3V_WLAN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
C602
C602
1
2
R700 0_0402_5%~D@ R700 0_0402_5%~D@ R702 0_0402_5%~D@ R702 0_0402_5%~D@
C596 0.1U_0402_10V7K~DC596 0.1U_0402_10V7K~D
1 2 1 2
C598 0.1U_0402_10V7K~DC598 0.1U_0402_10V7K~D
R707 0_0402_5%~D@ R707 0_0402_5%~D@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D @C603
@
1
C603
2
1/2MinicardPinkPather/60GHzCardH=6.7
PCIE_MCARD3_DET#
1 2
COEX2_WLAN_ACTIVE
MINI3CLK_REQ#<15>
CLK_PCIE_MINI3#<15> CLK_PCIE_MINI3<15>
PCLK_80H<15>
PCIE_PRX_WPANTX_N5 PCIE_PRX_WPANTX_P5
C617 0.1U_0402_10V7K~DC617 0.1U_0402_10V7K~D
1 2
C618 0.1U_0402_10V7K~DC618 0.1U_0402_10V7K~D
1 2
PCIE_MCARD3_DET#<18>
WPANNoise
USB_MCARD3_DET#
A A
21
PCIE_MCARD1_DET#USB_MCARD1_DET#
1 2 1 2
PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2_C PCIE_PTX_WLANRX_P2_C
PCIE_MCARD1_DET#
1 2
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C604
C604
C605
C605
2
1 2
R709 0_0402_5%~D@R709 0_0402_5%~D@
CLK_PCIE_MINI3# CLK_PCIE_MINI3
PCH_PLTRST#_EC
PCIE_PTX_WPANRX_N5_C PCIE_PTX_WPANRX_P5_C
4700P_0402_25V7K~D
4700P_0402_25V7K~D
@C627
@
1
C627
2
WLAN_RADIO_DIS#_R
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
2
C606
C606
1
1
+3.3V_PCIE_FLASH
PCIE_WAKE#
+1.5V_RUN
1
2
+3.3V_WLAN
1
C607
C607
2
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C619
C619
2
CONN@
CONN@ JMINI2
JMINI2
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
BELLW_80003-4041
BELLW_80003-4041
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
C608
C608
WLAN_LED#
CONN@
CONN@ JMINI3
JMINI3
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
GND1
BELLW_80003-4041
BELLW_80003-4041
+3.3V_PCIE_FLASH
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C620
C620
2
LinkCIS
+3.3V_WLAN
LinkCIS
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@C621
@ C621
GND2
GND2
1
2
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
100K_0402_5%~D
100K_0402_5%~D
R718
R718
1 2
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
C622
C622
+3.3V_WLAN
+1.5V_RUN
+3.3V_WLAN
100K_0402_5%~D
100K_0402_5%~D
R705
R705
1 2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+3.3V_PCIE_FLASH
+1.5V_RUN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
2
C623
C623
2
1
PCIE_MCARD1_DET#
PCIE_MCARD1_DET# USB_MCARD1_DET#
MSDATA HOST_DEBUG_TX
WLAN_RADIO_DIS#_R
12
R703 0_0402_5%~D@ R703 0_0402_5%~D@
USBP4­USBP4+ USB_MCARD1_DET# WIMAX_LED# WLAN_LED#
1 2
R706 0_0402_5%~D@ R706 0_0402_5%~D@
WIMAX_LED#STUDYFORDEBUG
5
4 Q124B
Q124B
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q124A
Q124A
USB_MCARD3_DET# PCIE_MCARD3_DET#
LPC_LFRAME# LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0
PCH_PLTRST#_EC
1 2
R710 0_0402_5%~D@R710 0_0402_5%~D@
USBP6­USBP6+
NC_USB_MCARD3_DET#
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
C626
C626
C625
C625
C624
C624
2
1
1 2
R692 100K_0402_5%~DR692 100K_0402_5%~D
1 2
R699 100K_0402_5%~D@R699 100K_0402_5%~D@
1 2
R701 100K_0402_5%~DR701 100K_0402_5%~D
HOST_DEBUG_TX <40>
PCH_PLTRST#_EC
WIRELESS_LED#WIMAX_LED#
3
1 2
R708 0_0402_5%~D@R708 0_0402_5%~D@
LPC_LFRAME# <14,32,39,40>
LPC_LAD3 <14,32,39,40> LPC_LAD2 <14,32,39,40> LPC_LAD1 <14,32,39,40> LPC_LAD0 <14,32,39,40>
USBP6- <17>
USBP6+ <17>
USB_MCARD1_DET# <14,18>
USBP4- <17>
USBP4+ <17>
MSDATA <40>
HOST_DEBUG_TX
+3.3V_ALW_PCH
+3.3V_RUN
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C595
C595
1
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Compal Electronics, Inc. SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
34 61Monday, April 02, 2012
34 61Monday, April 02, 2012
34 61Monday, April 02, 2012
B
B
B
of
of
of
Page 35
5
4
3
2
1
D D
PowerControlforMinicard2
+PWR_SRC_S
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R714
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R713
R713
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
C C
AUX_EN_WOWL<39>
61
2
100K_0402_5%~D
100K_0402_5%~D
12
R716
R716
R714
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q39B
Q39B
5
4
Q39A
Q39A
Q38
Q38
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45 2 1
G
G
3
1M_0402_5%~D
1M_0402_5%~D
12
R1620
R1620
1
2
+3.3V_WLAN
12
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C632
C632
+3.3V_SUS
R731 2.2K_0402_5%~DR731 2.2K_0402_5%~D R732 2.2K_0402_5%~DR732 2.2K_0402_5%~D
20K_0402_5%~D
20K_0402_5%~D
R715
R715
1 2 1 2
CARD_SMBDAT
CARD_SMBCLK
PCIE_PTX_EXPRX_N3<15> PCIE_PTX_EXPRX_P3<15>
USBP10+<17> USBP10-<17>
CLK_PCIE_EXP#<15> CLK_PCIE_EXP<15>
PCIE_PRX_EXPTX_N3<15> PCIE_PRX_EXPTX_P3<15>
CARD_SMBCLK<40> CARD_SMBDAT<40>
PCIE_WAKE#<34,40>
C647 0.1U_0402_10V7K~DC647 0.1U_0402_10V7K~D
C648 0.1U_0402_10V7K~DC648 0.1U_0402_10V7K~D
Express/SmartCardConn.
+3.3V_RUN +1.5V_RUN
JEXP1
JEXP1
1
2
3
4
5
6
7
8
9
10
11
12 14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35 37
38
39
40
G1
G2
CONN@
CONN@
LinkCIS
+3.3V_SUS
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C634
C634
2
ClosetoJEXP1
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
41
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C633
C633
2
2 4 6
8 10 12 14 16 18 20 22 24
PCIE_PTX_EXPRX_N3_C
1 2
PCIE_PTX_EXPRX_P3_C EXPRCRD_STBY_R#
1 2
26 28 30 32 34 36 38 40
42
E&T_1001K-F40C-03L
E&T_1001K-F40C-03L
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C635
C635
2
+5V_RUN+1.5V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
+5V_RUN
+3.3V_SUS
C645
C645
EXPRESS_DET# <39> EXPCLK_REQ# <15>
SMART_DET# <39> PCH_PLTRST#_EC <17,32,34,39,40>
CLK_SMART_48M <15>
+1.5V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C636
C636
2
R7340_0402_5%~D @R7340_0402_5%~D @
12 12
EXPCLK_REQ# EXPRESS_DET# PCH_PLTRST#_EC
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CE20
CE20
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CE22
CE22
2
SIO_SLP_S3# <11,16,27,39,42,47,48,49>
R7170_0402_5%~D @R7170_0402_5%~D @
RUN_ON <27,39,42,47,48>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CE14
CE14
2
ESDRequest
PowerControlforMinicard3
B B
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R721
R721
MCARD_WWAN_PWREN# DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q41A
Q41A
MCARD_WWAN_PWREN<39>
2
100K_0402_5%~D
100K_0402_5%~D
12
R726
R726
PowerControlforMinicard1
+PWR_SRC_S
470K_0402_5%~D
470K_0402_5%~D
12
3
5
4
R722
R722
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q41B
Q41B
+3.3V_ALW
Q40
Q40
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45 2 1
G
G
3
220P_0402_50V8J~D
220P_0402_50V8J~D
4.7M_0402_5%~D
4.7M_0402_5%~D
1
12
C644
C644
R1625
R1625
2
+PCIE_WWAN
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PJP9
@PJP9
@
+3.3V_PCIE_WWAN
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q73
Q73
1K_0402_1%~D
1K_0402_1%~D
12
R723
R723
+3.3V_WWAN_CHG
13
D
D
S
S
MCARD_WWAN_PWREN#
2
G
G
MCARD_MISC_PWREN<39>
2
100K_0402_5%~D
100K_0402_5%~D
12
R733
R733
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
61
R728
R728
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q43A
Q43A
+PWR_SRC_S
470K_0402_5%~D
470K_0402_5%~D
12
3
5
4
Q42
+3.3V_ALW +3.3V_PCIE_FLASH
R729
R729
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q43B
Q43B
Q42
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45 2 1
G
G
3
220P_0402_50V8J~D
220P_0402_50V8J~D
4.7M_0402_5%~D
4.7M_0402_5%~D
12
R1628
R1628
1
C650
C650
2
20K_0402_5%~D
20K_0402_5%~D
12
R730
R730
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
3
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
B
B
35 61Monday, April 02, 2012
35 61Monday, April 02, 2012
35 61Monday, April 02, 2012
B
of
of
of
Page 36
5
1 2
R1606 0_0402_5%~D@R1606 0_0402_5%~D@
L96
C412 .1U_0402_16V7K~DC412 .1U_0402_16V7K~D
USB3TN2<17>
USB3TP2<17>
D D
12
C413 .1U_0402_16V7K~DC413 .1U_0402_16V7K~D
12
USB3RN2<17>
USB3RP2<17>
USB3T_N2 USB3TN2_D-
L96
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1603 0_0402_5%~D@R1603 0_0402_5%~D@
1 2
R1605 0_0402_5%~D@R1605 0_0402_5%~D@
L95
L95
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1604 0_0402_5%~D@R1604 0_0402_5%~D@
4
2
2
3
3
2
2
3
3
USB3TP2_D+USB3T_P2
USB3RN2_D-
USB3RP2_D+
USBP1-<17>
USBP1+<17>
USB3TP2_D+ USB3TP2_D+ USB3TN2_D- USB3TN2_D­USB3RP2_D+ USB3RP2_D+ USB3RN2_D- USB3RN2_D-
3
1 2
R736 0_0402_5%~D@R736 0_0402_5%~D@
L51
L51
4
1
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
R740 0_0402_5%~D@R740 0_0402_5%~D@
1 2 4 5 3
8
8
IP4292CZ10-TB_XSON10U10~D
IP4292CZ10-TB_XSON10U10~D
PlaceD78closetoJUSB1
4
1
1 2
D78
D78
3
2
3
2
3
PlaceD72closetoJUSB1
10 9 7 6
1
2
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
USBP1_R_D-
USBP1_R_D+
D72
D72
2
+5V_USB_PWR
1
+
+
2
150U_D2_6.3VY_R15M~D
150U_D2_6.3VY_R15M~D
C651
C651
1
CONN@
CONN@ JUSB1
JUSB1
1
USBP1_R_D-
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C654
C654
USBP1_R_D+ USB3RN2_D-
USB3RP2_D+ USB3TN2_D-
USB3TP2_D+
1
2
VBUS
2
D-
3
D+
4
GND
5
StdA-SSRX-
6
StdA-SSRX+
7 8 9
GND
GND-DRAIN
GND
StdA-SSTX-
GND
StdA-SSTX+
GND
LOTES_AUSB0015-P001A
LOTES_AUSB0015-P001A
LinkCIS
10 11 12 13
C C
USB3TN3<17>
USB3TP3<17>
B B
A A
+5V_ALW
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C676
C676
C675
C675
1
1
ESATA_USB_PWR_EN#<39>
2
2
C414 .1U_0402_16V7K~DC414 .1U_0402_16V7K~D
12
C415 .1U_0402_16V7K~DC415 .1U_0402_16V7K~D
12
USB3RN3<17>
USB3RP3<17>
USB3T_N3
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
U48
U48
1
GND
FAULT1#
2
IN
OUT1
3
OUT2
IN
4
TPS2560DRCR-PG1.1_SON10_3X3~D
TPS2560DRCR-PG1.1_SON10_3X3~D
1 2
R1609 0_0402_5%~D@ R1609 0_0402_5%~D@
L97
L97
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1612 0_0402_5%~D@ R1612 0_0402_5%~D@
1 2
R1607 0_0402_5%~D@ R1607 0_0402_5%~D@
L98
L98
1
1
4
4
1 2
R1608 0_0402_5%~D@ R1608 0_0402_5%~D@
EN1# EN2#5FAULT#2
T-PAD
2
2
3
3
2
2
3
3
ILIM
10 9 8 7 6 11
USB3TN3_D-
USB3TP3_D+USB3T_P3
USB_OC0# <17,37>
USB_OC1# <17>
USB3RN3_D-
USB3RP3_D+
+5V_USB_PWR
24.9K_0402_1%~D
24.9K_0402_1%~D
12
R748
R748
USBP2-<17>
USBP2+<17>
+SATA_SIDE_PWR
1 2
R1150 0_0402_5%~D@R1150 0_0402_5%~D@
L90
L90
1
1
4
4
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1 2
R1151 0_0402_5%~D@R1151 0_0402_5%~D@
D79
USB3TP3_D+ USB3TP3_D+ USB3TN3_D- USB3TN3_D­USB3RP3_D+ USB3RP3_D+ USB3RN3_D- USB3RN3_D-
D79
1 2 4 5 3
8
8
IP4292CZ10-TB_XSON10U10~D
IP4292CZ10-TB_XSON10U10~D
PlaceD79closetoJESATA1
2
2
3
3
3
1
PlaceD74closetoJESATA1
10 9 7 6
2
USBP2_D-
USBP2_D+
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
D74
D74
+SATA_SIDE_PWR
150U_D2_6.3VY_R15M~D
150U_D2_6.3VY_R15M~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
+
+
2
C671 0.01U_0402_16V7K~DC671 0.01U_0402_16V7K~D
ESATA_PTX_DRX_P4_C<14> ESATA_PTX_DRX_N4_C<14>
ESATA_PRX_DTX_N4_C<14> ESATA_PRX_DTX_P4_C<14>
1 2
C672 0.01U_0402_16V7K~DC672 0.01U_0402_16V7K~D
1 2
C673 0.01U_0402_16V7K~DC673 0.01U_0402_16V7K~D
1 2
C674 0.01U_0402_16V7K~DC674 0.01U_0402_16V7K~D
1 2
C667
C667
C668
C668
1
2
SATA_PTX_DRX_P4 SATA_PTX_DRX_N4
SATA_PRX_DTX_N4 SATA_PRX_DTX_P4
USB3RN3_D­USB3RP3_D+
USB3TN3_D­USB3TP3_D+
USBP2_D­USBP2_D+
CONN@
CONN@ JESA1
JESA1
1
VBUS
2
D-
USB2.0
USB2.0
3
D+
4
GND
5
GND
6
A+
7
A-
ESATA
ESATA
8
GND
9
B-
10
B+
11
GND
12
SSRX-
13
SSRX+
14
GND
15
SSTX-
USB3.0
USB3.0
16
SSTX+
17
GND
18
GND
19
GND
20
GND
TAIWI_EU147-165CRL-TW
TAIWI_EU147-165CRL-TW
LinkCIS
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc. SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
36 61Monday, April 02, 2012
36 61Monday, April 02, 2012
36 61Monday, April 02, 2012
1
of
of
of
Page 37
5
D D
4
3
2
1
+5V_ALW
AUDIOBOARD
JAUD1
JAUD1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
C C
18
19
19
20
20
21
GND
22
GND
CONN@
CONN@
ACES_51522-0200N-P01
ACES_51522-0200N-P01
LinkCIS
+5V_ALW
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D C1186
C1186
1
2
USBP9_R_D+ USBP9_R_D-
AUD_HP_OUT_R <29> AUD_HP_OUT_L <29>
MIC_IN_R <29>
AUD_HP_NB_SENSE <29,39>
USB_OC4# <17> USB_SIDE_EN# <39> +5V_ALW
USBP9_R_D-
USBP9_R_D+
L107
L107
3
3
2
2
OCF2012181YZF_4P
OCF2012181YZF_4P
12
4
1
12
R16570_0402_5%~D @R16570_0402_5%~D @
4
1
R16560_0402_5%~D @R16560_0402_5%~D @
USBP9- <17>
USBP9+ <17>
USB_OC0#<17,36>
USB_SIDE_EN#<39>
USBP0-<17>
USBP0+<17> SW_LAN_TX0-<30>
SW_LAN_TX0+<30> SW_LAN_TX1-<30>
SW_LAN_TX1+<30> SW_LAN_TX2-<30>
SW_LAN_TX2+<30> SW_LAN_TX3-<30>
SW_LAN_TX3+<30>
LAN_ACTLED_YEL#<30>
LED_100_ORG#<30>
LED_10_GRN#<30>
SW_LAN_TX0­SW_LAN_TX0+
SW_LAN_TX1­SW_LAN_TX1+
SW_LAN_TX2­SW_LAN_TX2+
SW_LAN_TX3­SW_LAN_TX3+
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D C482
C482
1
2
IOBOARD
JIO1
JIO1
112 334 556 778 9910 111112
13
14
13
15
16
15
17
18
17
19
20
19
21
22
21
23
24
23
25
26
25
27
28
27
29
30
29
31
32
31
33
34
33
35
36
35
37
37
38
39
39
40
41
41
42
43
43
44
45
45
46
47
47
48
49
49
50
51
G1
G2
E&T_1000K-F50E-04R
E&T_1000K-F50E-04R
CONN@
CONN@
LinkCIS
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D C1001
C1001
1
2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50
52
+3.3V_ALW_PCH+5V_RUN +5V_ALW+3.3V_LAN
PCH_AZ_MDC_RST1#
RED_CRT
GREEN_CRT
BLUE_CRT HSYNC_BUF
VSYNC_BUF DAT_DDC2_CRT CLK_DDC2_CRT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D C998
C998
1
2
+SIM_PWR
+3.3V_ALW_PCH
+5V_RUN +3.3V_LAN
UIM_CLK <34> UIM_RESET <34> UIM_VPP <34>
UIM_DATA <34>
PCH_AZ_MDC_SDIN1 <14> PCH_AZ_MDC_SYNC <14>
PCH_AZ_MDC_SDOUT <14> PCH_AZ_MDC_BITCLK <14>
RED_CRT <23> GREEN_CRT <23> BLUE_CRT <23>
HSYNC_BUF <23>
VSYNC_BUF <23>
DAT_DDC2_CRT <23>
CLK_DDC2_CRT <23>
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
C1185
C1185
1
2
PlaceclosetoJIO1.20,22 PlaceclosetoJIO1.14,16 PlaceclosetoJIO1.14,16 PlaceclosetoJIO1.6,8,10,12
ClosetoJAUD1.
Q44
B B
PCH_AZ_MDC_RST#<14>
+5V_ALW
Q44
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
D
1 3
10K_0402_5%~D
10K_0402_5%~D
G
G
2
12
R752
R752
S
S
PCH_AZ_MDC_RST1#
100K_0402_5%~D
100K_0402_5%~D
12
R751
R751
MDC_RST_DIS#<39>
SnifferSwitch
WIRELESS_ON#/OFF<39>
A A
Defulton, WIRELESS_ON/OFF#: LOW:ON HIGH:OFF
5
SF1
SF1
1
1
2
2
3
3
SC12P-C-V-TR_3P
SC12P-C-V-TR_3P
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
37 61Monday, April 02, 2012
37 61Monday, April 02, 2012
37 61Monday, April 02, 2012
1
of
of
of
Page 38
5
DPD_PCH_LANE_P0<16>
DPD_PCH_LANE_N0<16>
DPD_PCH_LANE_P1<16>
D D
C C
B B
DPD_PCH_LANE_N1<16>
DPD_PCH_LANE_P2<16>
DPD_PCH_LANE_N2<16>
DPD_PCH_LANE_P3<16>
DPD_PCH_LANE_N3<16>
DPD_PCH_DOCK_HPD<16> DPC_PCH_DOCK_HPD <16>
ClosetoDOCK ItsforEnhanceESDondockissue.
DPD_PCH_DOCK_HPD
100K_0402_5%~D
100K_0402_5%~D
12
R757
R757
C690 0.1U_0402_10V7K~DC690 0.1U_0402_10V7K~D C679 0.1U_0402_10V7K~DC679 0.1U_0402_10V7K~D
C681 0.1U_0402_10V7K~DC681 0.1U_0402_10V7K~D C683 0.1U_0402_10V7K~DC683 0.1U_0402_10V7K~D
C692 0.1U_0402_10V7K~DC692 0.1U_0402_10V7K~D C685 0.1U_0402_10V7K~DC685 0.1U_0402_10V7K~D
C687 0.1U_0402_10V7K~DC687 0.1U_0402_10V7K~D C689 0.1U_0402_10V7K~DC689 0.1U_0402_10V7K~D
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
1
C695
C695
2
+DOCK_PWR_BAR
4
JDOCK1
JDOCK1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
127
127
129
129
131
131
133
133
135
135
137
137
139
139
141
141
143
143
145
GND1
146
PWR1
147
PWR1
148
PWR1
153
Shield_G
154
Shield_G
155
Shield_G
156
Shield_G
157
Shield_G
158
Shield_G
JAE_WD2F144WB6-DT
JAE_WD2F144WB6-DT CONN@
CONN@
LinkCIS
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D @
@
CE6
CE6
DOCK_DET_1
DPD_CA_DET DPD_DOCK_LANE_P0
DPD_DOCK_LANE_N0 DPD_DOCK_LANE_P1
DPD_DOCK_LANE_N1 DPD_DOCK_LANE_P2
DPD_DOCK_LANE_N2 DPD_DOCK_LANE_P3
DPD_DOCK_LANE_N3
DPD_DOCK_AUX DPD_DOCK_AUX#
BLUE_DOCK
RED_DOCK
GREEN_DOCK
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
C702
C702
1
2
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
3
D33
D33
1
DAI_12MHZ# DAI_BCLK#
10_0402_1%~D
10_0402_1%~D
12
@RE11
@ RE11
DOCK_LOM_SPD10LED_GRN#<30>
12 12
12 12
12 12
12 12
DPD_DOCK_AUX<26> DPD_DOCK_AUX#<26>
DPD_PCH_DOCK_HPD
+NBDOCK_DC_IN_SS
BLUE_DOCK<23>
RED_DOCK<23>
GREEN_DOCK<23>
HSYNC_DOCK<23> VSYNC_DOCK<23>
CLK_MSE<40> DAT_MSE<40>
DAI_BCLK#<29> DAI_LRCK#<29>
DAI_DI<29> DAI_DO#<29>
DAI_12MHZ#<29>
D_LAD0<39> D_LAD1<39>
D_LAD2<39> D_LAD3<39>
D_LFRAME#<39>
D_CLKRUN#<39>
D_SERIRQ<39>
D_DLDRQ1#<39>
CLK_PCI_DOCK<17>
DOCK_SMB_CLK<40>
DOCK_SMB_DAT<40>
DOCK_SMB_ALERT#<39,44>
DOCK_PSID<44>
DOCK_PWR_BTN#<40>
SLICE_BAT_PRES#<39,44,53> DOCK_DET# <39>
1
2
3
DOCK_AC_OFF
2
2
4
4 6
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98
100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144
PWR2 PWR2 PWR2
GND2
Shield_G Shield_G Shield_G Shield_G Shield_G Shield_G
10_0402_1%~D
10_0402_1%~D
@RE12
@
12
RE12
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144
149 150 151 152
159 160 161 162 163 164
DPC_CA_DET DPC_DOCK_LANE_P0
DPC_DOCK_LANE_N0 DPC_DOCK_LANE_P1
DPC_DOCK_LANE_N1 DPC_DOCK_LANE_P2
DPC_DOCK_LANE_N2 DPC_DOCK_LANE_P3
DPC_DOCK_LANE_N3 DPC_DOCK_AUX
DPC_DOCK_AUX# DPC_PCH_DOCK_HPD
SATA_PRX_DKTX_P5 SATA_PRX_DKTX_N5
SATA_PTX_DKRX_P5 SATA_PTX_DKRX_N5
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
C703
C703
1
2
CLK_PCI_DOCK
33_0402_5%~D
33_0402_5%~D
12
R756
R756
DOCK_AC_OFF <39,53>
DOCK_LOM_SPD100LED_ORG# <30>
DPC_CA_DET <26>DPD_CA_DET<26>
C691 0.1U_0402_10V7K~DC691 0.1U_0402_10V7K~D C680 0.1U_0402_10V7K~DC680 0.1U_0402_10V7K~D
C682 0.1U_0402_10V7K~DC682 0.1U_0402_10V7K~D C684 0.1U_0402_10V7K~DC684 0.1U_0402_10V7K~D
C693 0.1U_0402_10V7K~DC693 0.1U_0402_10V7K~D C686 0.1U_0402_10V7K~DC686 0.1U_0402_10V7K~D
C688 0.1U_0402_10V7K~DC688 0.1U_0402_10V7K~D C694 0.1U_0402_10V7K~DC694 0.1U_0402_10V7K~D
DPC_DOCK_AUX <26> DPC_DOCK_AUX# <26>
ACAV_DOCK_SRC# <53>
DAT_DDC2_DOCK <23>
CLK_DDC2_DOCK <23>
C697 0.01U_0402_16V7K~DC697 0.01U_0402_16V7K~D C698 0.01U_0402_16V7K~DC698 0.01U_0402_16V7K~D
C699 0.01U_0402_16V7K~DC699 0.01U_0402_16V7K~D
1 2
C700 0.01U_0402_16V7K~DC700 0.01U_0402_16V7K~D
USBP7_D+ USBP7_D-
1 2
USBP3+ <17>
USBP3- <17>
CLK_KBD <40> DAT_KBD <40>
USB3RN4 <17>
USB3RP4 <17> USB3TN4 <17>
USB3TP4 <17>
BREATH_LED# <39,43> DOCK_LOM_ACTLED_YEL# <30>
DOCK_LOM_TRD0+ <30>
DOCK_LOM_TRD0- <30>
DOCK_LOM_TRD1+ <30>
DOCK_LOM_TRD1- <30>
+LOM_VCT
DOCK_LOM_TRD2+ <30> DOCK_LOM_TRD2- <30>
DOCK_LOM_TRD3+ <30> DOCK_LOM_TRD3- <30>
DOCK_DCIN_IS+ <52> DOCK_DCIN_IS- <52>
DOCK_POR_RST# <40>
DOCK_DET_R#
+DOCK_PWR_BAR
12 12
12 12
12 12
12 12
12 12
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
2
SATA_PRX_DKTX_P5_C <14> SATA_PRX_DKTX_N5_C <14>
SATA_PTX_DKRX_P5_C <14> SATA_PTX_DKRX_N5_C <14>
+LOM_VCT
D32
D32
21
DPC_PCH_LANE_P0 <16>
DPC_PCH_LANE_N0 <16>
DPC_PCH_LANE_P1 <16>
DPC_PCH_LANE_N1 <16>
DPC_PCH_LANE_P2 <16>
DPC_PCH_LANE_N2 <16>
DPC_PCH_LANE_P3 <16>
DPC_PCH_LANE_N3 <16>
2
3
L108 OCF2012181YZF_4P@L108 OCF2012181YZF_4P@ R1672 0_0402_5%~DR1672 0_0402_5%~D R1673 0_0402_5%~DR1673 0_0402_5%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
@
@
1
C701
C701
2
1
2
3
4
12 12
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
1
C696
C696
2
ClosetoDOCK ItsforEnhanceESDondockissue.
1
4
DOCK_DET#
USBP7+ <17>
USBP7- <17>
1 2
1
DPC_PCH_DOCK_HPD
+3.3V_ALW
R75510K_0402_5%~D R75510K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
12
R758
R758
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
@CE8
@
1
CE8
A A
2
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D @CE9
@
1
CE9
2
12P_0402_50V8J~D
12P_0402_50V8J~D
C704
C704
1
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
38 61Monday, April 02, 2012
38 61Monday, April 02, 2012
38 61Monday, April 02, 2012
1
of
of
of
Page 39
5
+3.3V_ALW
1 2
R796 10K_0402_5%~DR796 10K_0402_5%~D
1 2
R798 100K_0402_5%~DR798 100K_0402_5%~D
1 2
R761 100K_0402_5%~DR761 100K_0402_5%~D
1 2
R763 100K_0402_5%~DR763 100K_0402_5%~D
1 2
D D
C C
B B
A A
R760 100K_0402_5%~DR760 100K_0402_5%~D
1 2
R774 100K_0402_5%~DR774 100K_0402_5%~D
1 2
R776 100K_0402_5%~DR776 100K_0402_5%~D
1 2
R768 10K_0402_5%~DR768 10K_0402_5%~D
1 2
R769 100K_0402_5%~DR769 100K_0402_5%~D
1 2
R778 100K_0402_5%~DR778 100K_0402_5%~D
1 2
R762 10K_0402_5%~DR762 10K_0402_5%~D
1 2
R1183 10K_0402_5%~DR1183 10K_0402_5%~D
1 2
R516 10K_0402_5%~DR516 10K_0402_5%~D
1 2
R771 100K_0402_5%~DR771 100K_0402_5%~D
+3.3V_LAN
RL2
RL2
1 2
RL12
RL12
1 2
Check depop or change power rail
USB_PWR_SHR_VBUS_EN
10K_0402_5%~D
10K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R800
R800
VGA_ID
100K_0402_5%~D
100K_0402_5%~D
12
@R803
@ R803
DYN_TURB_PWR_ALRT#
HW_GPS_DISABLE2#
PROCHOT_GATE
CPU_DETECT# SLICE_BAT_PRES# WWAN_RADIO_DIS# USB_PWR_SHR_EN#
USB_SIDE_EN#
ESATA_USB_PWR_EN#
DOCK_SMB_ALERT#
SIO_FAN1_DET#
ZODD_WAKE#
WIRELESS_ON#/OFF
LOM_SMB_ALERT# LOM_ENERGY_DET
CRT_SWITCH<23>
MDC_RST_DIS#<37>
MCARD_MISC_PWREN<35>
PROCHOT_GATE<52>
DOCK_SMB_ALERT#<38,44>
USB_SIDE_EN#<37>
EN_I2S_NB_CODEC#<29>
EN_DOCK_PWR_BAR<53>
PANEL_BKEN_EC<24>
ENVDD_PCH<16,24>
LCD_TST<24>
PSID_DISABLE#<44>
PBAT_PRES#<44>
DOCKED<30>
DOCK_DET#<38>
AUD_NB_MUTE#<29>
MCARD_WWAN_PWREN<35>
LCD_VCC_TEST_EN<24>
CCD_OFF<24>
AUD_HP_NB_SENSE<29,37>
ESATA_USB_PWR_EN#<36>
SLICE_BAT_ON<53>
SLICE_BAT_PRES#<38,44,53>
EXPRESS_DET#<35> SMART_DET#<35>
CPU_DETECT#<7>
R801 0_0402_5%~D@R801 0_0402_5%~D@
FAN1_DET#<22>
1 2
T116 PAD~D@ T116 PAD~D@
SUSACK#<16> T110 PAD~D@ T110 PAD~D@ T109 PAD~D@ T109 PAD~D@
SLP_ME_CSW_DEV#<14,18>
LAN_DISABLE#_R<30> SYS_LED_MASK#<43> SIO_EXT_WAKE#<18>
WIRELESS_LED#<34,43>
B4 non used
WLAN_RADIO_DIS#<34>
WIRELESS_ON#/OFF<37>
BT_RADIO_DIS#<41>
WWAN_RADIO_DIS#<34>
SYS_PWROK<7,16>
T114 PAD~D@ T114 PAD~D@
CPU_VTT_ON<49>
PCH_DPWROK<16>
ME_FWPPCHhasinternal20KPD. (suspendpowerrail)
ME_FWP
1K_0402_1%~D
1K_0402_1%~D
@R793
@
12
R793
VGA_ID0
Discrete
0
UMA 1
5
4
CRT_SWITCH MDC_RST_DIS# MCARD_MISC_PWREN PROCHOT_GATE LID_CL_SIO# DOCK_SMB_ALERT#
USB_SIDE_EN# EN_I2S_NB_CODEC#
EN_DOCK_PWR_BAR PANEL_BKEN_EC ENVDD_PCH LCD_TST PSID_DISABLE# PBAT_PRES# DOCKED DOCK_DET# AUD_NB_MUTE# MCARD_WWAN_PWREN LCD_VCC_TEST_EN CCD_OFF AUD_HP_NB_SENSE ESATA_USB_PWR_EN#
SLICE_BAT_ON SLICE_BAT_PRES# EXPRESS_DET# SMART_DET# PCMCIA_DET#
USB_PWR_SHR_EN# GFX_MEM_VTT_ON MCARD_PCIE_SATA# CPU_DETECT# DGPU_PWR_EN
SIO_FAN1_DET#
DP_HDMI_HPD
ZODD_WAKE# LOM_SMB_ALERT# SUSACK# LOM_ENERGY_DET DGPU_PWROK VGA_ID
3.3V_RUN_GFX_ON SLP_ME_CSW_DEV#
LAN_DISABLE#_R CHARGE_EN SYS_LED_MASK# DYN_TURB_PWR_ALRT#
1 2
R797 0_0402_5%~D@ R797 0_0402_5%~D@
USB_PWR_SHR_VBUS_EN WLAN_RADIO_DIS#
WIRELESS_ON#/OFF BT_RADIO_DIS# WWAN_RADIO_DIS# SYS_PWROK DGPU_SELECT#
CPU_VTT_ON
1 2
R802 0_0402_5%~D@ R802 0_0402_5%~D@
4
U46
U46
B52
GPIOA0
A49
GPIOA1
B53
GPIOA2
A50
GPIOA3
B54
GPIOA4
A51
GPIOA5
B55
GPIOA6
A52
GPIOA7
A33
GPIOB0
B36
GPIOB1
A34
GPOC2
B37
GPOC3
A35
GPOC4
B38
GPOC5
A36
GPOC6/TACH4
A37
GPIOC7
B40
GPIOD0
A38
GPIOC1
B41
GPIOC0
A39
GPIOB7
B42
GPIOB6
A40
GPIOB5
B43
GPIOB4
A41
GPIOB3
B44
GPIOB2
B32
GPIOD1
A31
GPIOD2
B33
GPIOD3
B15
GPIOD4
A15
GPIOD5
B16
GPIOD6
A16
GPIOD7
A1
GPIOE0/RXD
B2
GPIOE1/TXD
A2
GPIOE2/RTS#
B3
GPIOE3/DSR#
A3
GPIOE4/CTS#
B45
GPIOE5/DTR#
A42
GPIOE6/RI#
B4
GPIOE7/DCD#
A59
GPIOF0
B62
GPIOF1
A58
GPIOF2
B61
GPIOF3/TACH8
A56
GPIOF4/TACH7
B59
GPIOF5
A55
GPIOF6
B58
GPIOF7
B47
GPIOG0/TACH5
A45
GPIOG1
B48
GPIOG2
A46
GPIOG3
B49
GPIOG4
A47
GPIOG5
B50
GPIOG6
A48
GPIOG7/TACH6
B13
GPIOH0
A13
GPIOH1
A53
SYSOPT1/GPIOH2
B57
SYSOPT0/GPIOH3
B14
GPIOH4
A14
GPIOH5
B17
GPIOH6
B18
GPIOH7
CLK_PCI_5048 CLK_SIO_14M 10_0402_1%~D
10_0402_1%~D
12
@R795
@ R795
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D @C713
@
1
C713
2
4.7P_0402_50V8C~D
@C712
@ C712
10_0402_1%~D
10_0402_1%~D
12
@R794
@ R794
1
2
+3.3V_ALW
B5
A17
B30
A43
A54
VCC1
VCC1
VCC1
VCC1
VCC1
ECE5048-LZY_DQFN132_11X11~D
ECE5048-LZY_DQFN132_11X11~D
LID_CL_SIO#
3
0.1U_0402_10V7K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C705
C705
C706
1
2
+3.3V_ALW
C706
1
2
GPIOI0 GPIOI1
GPIOI2/TACH0
GPIOI3 GPIOI4 GPIOI5 GPIOI6 GPIOI7
GPIOJ0 GPIOJ1/TACH1 GPIOJ2/TACH2
GPIOJ3
GPIOJ4
GPIOJ5
GPIOJ6
GPIOJ7
GPIOK0
GPIOK1/TACH3
GPIOK2 GPIOK3 GPIOK4 GPIOK5 GPIOK6 GPIOK7
GPIOL0/PWM7 GPIOL1/PWM8 GPIOL2/PWM0 GPIOL3/PWM1 GPIOL4/PWM3 GPIOL5/PWM2
GPIOL6
GPIOL7/PWM5
GPIOM1 GPIOM3/PWM4 GPIOM4/PWM6
LAD0 LAD1 LAD2 LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ1#
SER_IRQ
14.318MHZ/GPIOM0 CLK32/GPIOM2
DLAD0 DLAD1 DLAD2
DLAD3 DLFRAME# DCLKRUN#
DLDRQ1#
DSER_IRQ
BC_INT# BC_DAT BC_CLK
PWRGD
OUT65
TEST_PIN CAP_LDO
VSS
EP
DB Version 0.4
DB Version 0.4
100K_0402_5%~D
100K_0402_5%~D
12
R805
R805
R807 10_0402_1%~DR807 10_0402_1%~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C716
C716
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
0.1U_0402_10V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C708
C708
C707
C707
1
1
2
2
A23
SIO_SLP_A#
B63
0.75V_DDR_VTT_ON
A60
SIO_SLP_S4#
A61
SIO_SLP_S3#
B65
IMVP_PWRGD
A62 B66
R765 0_0402_5%~D@ R765 0_0402_5%~D@
A63 B67
A64
SIO_SLP_LAN#
A5
SIO_SLP_SUS#
B6 A6
MODC_EN
B7
DOCK_HP_DET
A7
DOCK_MIC_DET
B8
ME_FWP
A8
MASK_SATA_LED#
B9 B10
LED_SATA_DIAG_OUT#
A10
TEMP_ALERT#_R
B11
RUN_ON
A11 B12 A12
SUS_ON
B60 A57
BAT1_LED#
B64 B68
BAT2_LED#
A9 B1
USH_PWR_ON
A18 A44
HW_GPS_DISABLE2#
B34
BREATH_LED#
B39 B51
LPC_LAD0
A27
LPC_LAD1
A26
LPC_LAD2
B26
LPC_LAD3
B25
LPC_LFRAME#
A21
PCH_PLTRST#_EC
B22
CLK_PCI_5048
A28
CLKRUN#
B20
LPC_LDRQ1#
A22
IRQ_SERIRQ
B21
CLK_SIO_14M
A32 B35
D_LAD0
B29
D_LAD1
B28
D_LAD2
A25
D_LAD3
A24
D_LFRAME#
B23
D_CLKRUN#
A19
D_DLDRQ1#
B24
D_SERIRQ
A20
BC_INT#_ECE5048
A29
BC_DAT_ECE5048
B31
BC_CLK_ECE5048
A30
RUNPWROK
A4
SP_TPM_LPC_EN
B56
B19
R804 1K_0402_1%~DR804 1K_0402_1%~D
+CAP_LDO
B46 B27
C1
+CAP_LDOtracewidth20mils
12
1 2
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C709
C709
1
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
2
LID_CL# <43>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C710
C710
1
2
SIO_SLP_S4# <16,42,46> SIO_SLP_S3# <11,16,27,35,42,47,48,49>
DOCK_AC_OFF_EC <53>
AUX_EN_WOWL <35>
WLAN_LAN_DISB# <30>
SIO_SLP_LAN# <16,30>
SIO_SLP_SUS# <16> GPIO_PSID_SELECT <44>
MODC_EN <28> DOCK_HP_DET <29> DOCK_MIC_DET <29>
ME_FWP <14> MASK_SATA_LED# <43>
LED_SATA_DIAG_OUT# <43> RUN_ON <27,35,42,47,48> SPI_WP#_SEL <14> SUS_ON <42>
HW_GPS_DISABLE2# <34>
BREATH_LED# <38,43>
LPC_LAD0 <14,32,34,40> LPC_LAD1 <14,32,34,40> LPC_LAD2 <14,32,34,40> LPC_LAD3 <14,32,34,40>
LPC_LFRAME# <14,32,34,40>
PCH_PLTRST#_EC <17,32,34,35,40> CLK_PCI_5048 <17>
CLKRUN# <16,32,40> LPC_LDRQ1# <14>
IRQ_SERIRQ <14,32,40> CLK_SIO_14M <15>
EC_32KHZ_ECE5048 <40>
D_LAD0 <38> D_LAD1 <38> D_LAD2 <38> D_LAD3 <38> D_LFRAME# <38> D_CLKRUN# <38> D_DLDRQ1# <38> D_SERIRQ <38>
BC_INT#_ECE5048 <40>
BC_DAT_ECE5048 <40>
BC_CLK_ECE5048 <40>
RUNPWROK <7,40>
SP_TPM_LPC_EN <32>
C714
C714
SIO_SLP_A# <16,42,48>
0.75V_DDR_VTT_ON <46>
IMVP_PWRGD <51>
IMVP_VR_ON <51>
1.8V_RUN_PWRGD <47>
BAT1_LED# <43> BAT2_LED# <43>
T117PAD~D @T117PAD~D @
2
---vPro only
1 2
R738 0_0402_5%~D@ R738 0_0402_5%~D@
tracewidth20mils
tracewidth20mils
ACAV_IN_NB<40,52,53>
ReserveforESDin6/22 PlaceclosedU46
PCH_PLTRST#_EC
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@CE11
@
1
CE11
2
2
ACAV_IN_NB DOCK_AC_OFF_EC
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
1
TEMP_ALERT# <14,18>
1 2
U47
@U47
@
+3.3V_ALW
5
B A
3
D_CLKRUN# D_SERIRQ D_DLDRQ1# EXPRESS_DET# SMART_DET# PCMCIA_DET# MCARD_PCIE_SATA# SP_TPM_LPC_EN WIRELESS_ON#/OFF
RUN_ON CPU_VTT_ON
0.75V_DDR_VTT_ON SLICE_BAT_ON SUS_ON LCD_TST SYS_LED_MASK# DGPU_PWR_EN
GFX_MEM_VTT_ON
CHARGE_EN
C711
@C711
@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
P
4
2 1
O
G
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
R777 100K_0402_5%~DR777 100K_0402_5%~D R780 100K_0402_5%~DR780 100K_0402_5%~D R782 100K_0402_5%~DR782 100K_0402_5%~D R460 100K_0402_5%~DR460 100K_0402_5%~D R461 100K_0402_5%~DR461 100K_0402_5%~D R463 100K_0402_5%~DR463 100K_0402_5%~D R457 100K_0402_5%~DR457 100K_0402_5%~D R772 10K_0402_5%~D@ R772 10K_0402_5%~D@ R766 100K_0402_5%~D@R766 100K_0402_5%~D@
R786 100K_0402_5%~DR786 100K_0402_5%~D R789 100K_0402_5%~DR789 100K_0402_5%~D R790 100K_0402_5%~DR790 100K_0402_5%~D R791 100K_0402_5%~DR791 100K_0402_5%~D R878 100K_0402_5%~DR878 100K_0402_5%~D R767 100K_0402_5%~DR767 100K_0402_5%~D
R775 10K_0402_5%~DR775 10K_0402_5%~D R1582 100K_0402_5%~DR1582 100K_0402_5%~D R1583 100K_0402_5%~DR1583 100K_0402_5%~D
R3 100K_0402_5%~DR3 100K_0402_5%~D
D34
@D34
@
12 12 12 12 12 12 12 12 12
12 12 12 12 12 12 12 12 12 12
33K_0402_5%~D
33K_0402_5%~D
12
@R770
@ R770
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc. SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
+3.3V_RUN
DOCK_AC_OFF <38,53>
39 61Monday, April 02, 2012
39 61Monday, April 02, 2012
39 61Monday, April 02, 2012
of
of
of
B
B
B
Page 40
5
+3.3V_ALW
C720
C720
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
5
1
1.05V_VTTPWRGD<49,50> VCCSAPWROK<50>
D D
C C
B B
+3.3V_ALW
1 2
R759 10K_0402_5%~DR759 10K_0402_5%~D R821 100K_0402_5%~DR821 100K_0402_5%~D
1 2
R814 100K_0402_5%~DR814 100K_0402_5%~D
1 2
R817 100K_0402_5%~DR817 100K_0402_5%~D
1 2
R818 2.2K_0402_5%~DR818 2.2K_0402_5%~D
1 2
R820 2.2K_0402_5%~DR820 2.2K_0402_5%~D
1 2
R823 100K_0402_5%~D@ R823 100K_0402_5%~D@
1 2
R827 2.2K_0402_5%~DR827 2.2K_0402_5%~D
1 2
R828 2.2K_0402_5%~DR828 2.2K_0402_5%~D
1 2
R830 2.2K_0402_5%~DR830 2.2K_0402_5%~D
1 2
R831 2.2K_0402_5%~DR831 2.2K_0402_5%~D
1 2
R829 2.2K_0402_5%~DR829 2.2K_0402_5%~D
1 2
R822 2.2K_0402_5%~DR822 2.2K_0402_5%~D
1 2
R418 2.2K_0402_5%~DR418 2.2K_0402_5%~D
1 2
R420 2.2K_0402_5%~DR420 2.2K_0402_5%~D
1 2
R838 2.2K_0402_5%~DR838 2.2K_0402_5%~D
1 2
R841 2.2K_0402_5%~DR841 2.2K_0402_5%~D
1 2
R854 2.2K_0402_5%~DR854 2.2K_0402_5%~D
1 2
R856 2.2K_0402_5%~DR856 2.2K_0402_5%~D
1 2
R1171 100K_0402_5%~DR1171 100K_0402_5%~D
1 2
R888 100K_0402_5%~D@ R888 100K_0402_5%~D@
1 2
R869 10K_0402_5%~DR869 10K_0402_5%~D
1 2
R876 100K_0402_5%~DR876 100K_0402_5%~D
1 2
R880 100K_0402_5%~DR880 100K_0402_5%~D
1 2
R881 100K_0402_5%~DR881 100K_0402_5%~D
1 2
R882 100K_0402_5%~DR882 100K_0402_5%~D
1 2
R883 10K_0402_5%~DR883 10K_0402_5%~D
1 2
R843 8.2K_0402_5%~D@ R843 8.2K_0402_5%~D@
1 2
R889 100K_0402_5%~DR889 100K_0402_5%~D
1 2
R892 10K_0402_5%~DR892 10K_0402_5%~D
1 2
R874 2.7K_0402_5%~DR874 2.7K_0402_5%~D
JTAG_RST#citcuit closetoU51.B57
BC_DAT_EMC4022
12
BC_DAT_ECE5048 BC_DAT_ECE1117
LPC_LDRQ#_MEC CHARGER_SMBDAT CHARGER_SMBCLK SIO_LAN_SMBDATA
SIO_LAN_SMBCLK
DOCK_SMB_DAT DOCK_SMB_CLK
DYN_TUR_CURRNT_SET#
1.05V_A_PWRGD_SIO
MSDATA DDR_ON PCH_ALW_ON DOCK_POR_RST# EN_INVPWR
1.05V_0.8V_PWROK RESET_OUT# CPU1.5V_S3_GATE PCH_RSMRST# AUX_ON
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
12
PCIE_WAKE#
PBAT_SMBDAT PBAT_SMBCLK
GPU_SMBDAT GPU_SMBCLK
LCD_SMBCLK LCD_SMBDAT
BAY_SMBDAT BAY_SMBCLK
R824
R824
B
2
A
3
EC_32KHZ_ECE5048<39>
P
4
O
G
U50
U50
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
MEC_XTAL2 MEC_XTAL2_R
32KHzClock
JTAG_RST#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D 100_0402_1%~D
1
JTAG1
@SHORT PADS~D
@SHORT PADS~D
1
CONN@JTAG1
CONN@
2
2
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
49.9_0402_1%~D
49.9_0402_1%~D
12
12
R858
R858
R864
R864
A A
JDEG2
JDEG2
1
1
2
2
3
3
4
4
5
5
6
11
6
G1
7
12
7
G2
8
8
9
9
10
10
TYCO_1-2041070-0~D
TYCO_1-2041070-0~D
CONN@
CONN@
MSCLK MSDATA
HOST_DEB_RX
100_0402_1%~D
12
1
@
@
C735
C735
R836
R836
2
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
12
R861
R861
JTAG_TDI JTAG_TMS JTAG_CLK JTAG_TDO
1 2 1 2
+3.3V_ALW
R859
R859
R860
R860
R853 0_0402_5%~D@ R853 0_0402_5%~D@ R855 0_0402_5%~D@ R855 0_0402_5%~D@
5
39P_0402_50V8J~D
39P_0402_50V8J~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
12
R849
R849
R847
R847
R848
R848
Y6
Y6
32.768KHZ_12.5PF_Q13FC1350000~D
32.768KHZ_12.5PF_Q13FC1350000~D
1 2
C743
C743
1
2
100K_0402_5%~D
@R850
100K_0402_5%~D
@
12
R850
HOST_DEBUG_TXHOST_DEB_TX HOST_DEBUG_RX
4
+RTC_CELL
1 2
SML1_SMBDATA SML1_SMBCLK CLK_TP_SIO DAT_TP_SIO CLK_KBD DAT_KBD CLK_MSE DAT_MSE PBAT_SMBDAT PBAT_SMBCLK
JTAG_TDI JTAG_TDO JTAG_CLK JTAG_TMS JTAG_RST#
AUX_ON PCH_ALW_ON
BIA_PWM_EC
BC_CLK_ECE5048 BC_DAT_ECE5048 BC_INT#_ECE5048 BC_CLK_EMC4022 BC_DAT_EMC4022 BC_INT#_EMC4022
PCH_PCIE_WAKE# PCIE_WAKE# BC_CLK_ECE1117 BC_DAT_ECE1117 BC_INT#_ECE1117 BEEP SIO_SLP_S5# ACAV_IN_NB
SIO_EXT_SMI# SIO_RCIN# LPC_LDRQ#_MEC IRQ_SERIRQ PCH_PLTRST#_EC CLK_PCI_MEC LPC_LFRAME# LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 CLKRUN# SIO_EXT_SCI#
MEC_XTAL1
REV
X00 X01 X02 A00
R815 0_0402_5%~D@ R815 0_0402_5%~D@
A5
B6 A37 B40 A38 B41 A39 B42 B59 A56
A51 B55 B56 A53 B57
B22 A21 B23 B24 A23 B25 A24
A43 B45 A42 A12 B13 A13 B20 A18 B19 A20 B21 A19 A16 B16 A15
A6 A27 B29 A28 B30 A29 B31 A30 B32 A31 B33 A32 A33
A61 A62 B62
B34 A64 B68
BOARD_ID
1.05V_0.8V_PWROK <14,51>
SML1_SMBDATA<15> SML1_SMBCLK<15>
CLK_TP_SIO<41> DAT_TP_SIO<41> CLK_KBD<38> DAT_KBD<38> CLK_MSE<38> DAT_MSE<38>
PBAT_SMBDAT<44>
PBAT_SMBCLK<44>
DOCK_POR_RST#<38>
AUX_ON<30> PCH_ALW_ON<42,44>
BIA_PWM_EC<24>
BC_CLK_ECE5048<39>
BC_DAT_ECE5048<39>
BC_INT#_ECE5048<39>
BC_CLK_EMC4022<22>
BC_DAT_EMC4022<22>
BC_INT#_EMC4022<22>
PCH_PCIE_WAKE#<16>
PCIE_WAKE#<34,35>
BC_CLK_ECE1117<41>
BC_DAT_ECE1117<41>
BC_INT#_ECE1117<41>
BEEP<29>
SIO_SLP_S5#<16,42>
ACAV_IN_NB<39,52,53>
SIO_EXT_SMI#<14,17>
SIO_RCIN#<18>
IRQ_SERIRQ<14,32,39>
PCH_PLTRST#_EC<17,32,34,35,39>
CLK_PCI_MEC<17>
LPC_LFRAME#<14,32,34,39>
LPC_LAD0<14,32,34,39> LPC_LAD1<14,32,34,39> LPC_LAD2<14,32,34,39> LPC_LAD3<14,32,34,39>
CLKRUN#<16,32,39>
SIO_EXT_SCI#<18>
12
R1068 0_0402_5%~D@ R1068 0_0402_5%~D@
1 2
R867 0_0402_5%~D@R867 0_0402_5%~D@
MEC_XTAL1 MEC_XTAL2
39P_0402_50V8J~D
39P_0402_50V8J~D
C741
C741
1
2
R875 C744
240K 4700p 130K 4700p 62K 33K
*
8.2K
4.3K 2K 1K
4700p 4700p 4700p 4700p 4700p 4700p
BOARD_IDrisetimeismeasuredfrom5%~68%.
4
+RTC_CELL_VBAT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C723
C723
2
B66
AGND
B64
VBAT
DB Version 0.12
DB Version 0.12
VSS[1]
B11
U51
U51
PS/2 INTERFACE
PS/2 INTERFACE
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK GPIO110/PS2_CLK2/GPTP-IN6 GPIO111/PS2_DAT2/GPTP-OUT6 GPIO112/PS2_CLK1A GPIO113/PS2_DAT1A GPIO114/PS2_CLK0A GPIO115/PS2_DAT0A GPIO154/I2C1C_DATA/PS2_CLK1B GPIO155/I2C1C_CLK/PS2_DAT1B
JTAG INTERFACE
JTAG INTERFACE
GPIO145/I2C1K_DATA/JTAG_TDI GPIO146/I2C1K_CLK/JTAG_TDO GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS JTAG_RST#
FAN PWM & TACH
FAN PWM & TACH
GPIO050/FAN_TACH1 GPIO051/FAN_TACH2 GPIO052/FAN_TACH3 GPIO053/PWM0 GPIO054/PWM1 GPIO055/PWM2 GPIO056/PWM3
BC-LINK
BC-LINK
GPIO123/BCM_A_CLK GPIO122/BCM_A_DAT GPIO121/BCM_A_INT# GPIO022/BCM_B_CLK GPIO023/BCM_B_DAT GPIO024/BCM_B_INT# GPIO044/BCM_C_CLK GPIO043/BCM_C_DAT GPIO042/BCM_C_INT# GPIO047/LSBCM_D_CLK GPIO046/LSBCM_D_DAT GPIO045/LSBCM_D_INT# GPIO032/GPTP-IN3/BCM_E_CLK GPIO31/GPTP-OUT2/BCM_E_DAT GPIO30/GPTP-IN2/BCM_E_INT#
HOST INTERFACE
HOST INTERFACE
GPIO011/nSMI GPIO061/LPCPD# LDRQ# SER_IRQ LRESET# PCI_CLK LFRAME# LAD0 LAD1 LAD2 LAD3 CLKRUN# GPIO100/nEC_SCI
MASTER CLOCK
MASTER CLOCK
XTAL1 XTAL2 GPIO160/32KHZ_OUT
NC1 NC2 NC3
15mil
C740closetoU51.B12
+3.3V_ALW
33K_0402_5%~D
33K_0402_5%~D
12
R875
R875
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C744
C744
1
2
SYSTEM_IDforBIDfunction PopR877240KforvProanddepopR871 *PopR871130KfornonvProanddepoipR877
A11
A22
B35
A41
A58
A52
VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]B3VTR[8]
GPIO012/I2C1H_DATA/I2C2D_DATA
VR_CAP
VSS[4]
B12
B60
15mil
+VR_CAP
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
2
SYSTEM_ID
3
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
1
C725
C725
C727
C727
2
2
2
A26
MISC INTERFACE
MISC INTERFACE
GPIO021/RC_ID1 GPIO020/RC_ID2
GPIO025/UART_CLK
GPIO120/UART_TX
GPIO124/GPTP-OUT5/UART_RX
VCC_PRWGD
GPIO060/KBRST GPIO101/ECGP_SCLK GPIO103/ECGP_MISO GPIO105/ECGP_MOSI
GPIO102/HSPI_SCLK GPIO104/HSPI_MISO GPIO106/HSPI_MOSI
GPIO116/MSDATA
GPIO117/MSCLK
GPIO127/A20M GPIO153/LED3 GPIO156/LED1 GPIO157/LED2
nFWP
PROCHOT#/PWM4
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
GPIO001/ECSPI_CS1 GPIO002/ECSPI_CS2
GPIO014/GPTP-IN7/HSPI_CS1
GPIO040/GPTP-OUT3/HSPI_CS2
GPIO015/GPTP-OUT7
GPIO016/GPTP-IN8
GPIO017/GPTP-OUT8
GPIO026/GPTP-IN1
GPIO027/GPTP-OUT1
GPIO041
GPIO107/nRESET_OUT
GPIO125/GPTP-IN5
GPIO126
GPIO151/GPTP-IN4
GPIO152/GPTP-OUT4
SMBUS INTERFACE
SMBUS INTERFACE
GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO005/I2C1B_DATA
GPIO006/I2C1B_CLK
GPIO013/I2C1H_CLK/I2C2D_CLK
GPIO130/I2C2A_DATA
GPIO131/I2C2A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO141/I2C1F_DATA/I2C2B_DATA
GPIO142/I2C1F_CLK/I2C2B_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK
DELL PWR SW INF
DELL PWR SW INF
VSS_RO
B54
C740
C740
+3.3V_ALW
130K_0402_5%~D
130K_0402_5%~D
12
1
2
3
BGPO0 VCI_IN2# VCI_OUT VCI_IN1# VCI_IN0#
VCI_OVRD_IN
VCI_IN3#
PECI
PECI
PECI_VREF
I2S
I2S
I2S_DAT I2S_CLK
I2S_WS
EP
MEC5055-LZY_DQFN132_11X11~D
MEC5055-LZY_DQFN132_11X11~D
C1
PCH_PWRGD#<22>
240K_0402_5%~D
240K_0402_5%~D
12
@R877
@ R877
R871
R871
4700P_0402_25V7K~D
4700P_0402_25V7K~D
@
@
C742
C742
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PECI
1
C729
C729
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D C731
C731
A10 B10 B14 B44 B46 B26 A25 B36 B37 B38 A34 A35 A36 A40 B43 A45 A55 A57 B61 B65 A46
B2 A2 B8 B18 A8 B9 A9 A14 B15 A17 B39 A44 B47 A54 B58
A3 B4 A4 B5 B7 A7 B48 B49 A47 B50 B52 A49 B53 A50
A59 B63 A60 A63 B67 B1 A1
B51 A48
B17 B27 B28
RESET_OUT#
1
2
2
+3.3V_ALW
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
1
1
C732
C732
C739
C739
2
2
DDR_ON <46> HOST_DEBUG_TX <34> HOST_DEBUG_RX <34>
RUNPWROK <7,39> EN_INVPWR <24> PCH_SATA_MOD_EN# <14>
DDR_HVREF_RST_GATE <7> DYN_TUR_CURRNT_SET# <52> CPU1.5V_S3_GATE <11>
MSDATA <34> MSCLK <34> SIO_A20GATE <18> PS_ID <44>
ME_SUS_PWR_ACK <16>
1.5V_SUS_PWRGD <46> PM_APWROK <16>
ALW_PWRGD_3V_5V <45> DEVICE_DET# <28>
RESET_OUT# <16> PCH_RSMRST# <41>
AC_PRESENT <16> SIO_PWRBTN# <16>
DOCK_SMB_DAT <38>
DOCK_SMB_CLK <38>
CHARGER_SMBDAT <52>
CHARGER_SMBCLK <52>
CARD_SMBDAT <35>
CARD_SMBCLK <35>
ALWON <45>
ACAV_IN <22,52,53>
1 2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
FWP#
Q50
Q50
12
1
2
10U_0603_6.3V6M~D
C730
C730
10_0402_1%~D
10_0402_1%~D
@R885
@ R885
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
@C747
@ C747
VOL_MUTE <43> VOL_UP <43>
VOL_DOWN <43>
1 2
R857 0_0402_5%~D@R857 0_0402_5%~D@
PECI_EC <7>
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
12
R872
R872
10K_0402_5%~D
10K_0402_5%~D
@R879
@
RUN_ON_ENABLE#<42>
R879
1 2
ReserveforESDin6/22PlaceclosedU51
2
1
2
POWER_SW_IN#<22>
DOCK_PWR_SW#<22>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C736
C736
1.05V_A_PWRGD <48>
1 2
R862 0_0402_5%~D@R862 0_0402_5%~D@
R862closeto U51&least250mils
C737
C737
+3.3V_RUN
RUNPWROK
2
G
G
PCH_PLTRST#_ECDOCK_POR_RST#
1
1
C726
C726
C728
C728
2
2
SYSTEM_ID BOARD_ID DDR_ON HOST_DEBUG_TX HOST_DEBUG_RX RUNPWROK EN_INVPWR
DDR_HVREF_RST_GATE DYN_TUR_CURRNT_SET# CPU1.5V_S3_GATE MSDATA MSCLK SIO_A20GATE PS_ID
FWP# PROCHOT#_EC
R884 1K_0402_1%~DR884 1K_0402_1%~D
1 2
R886 1K_0402_1%~DR886 1K_0402_1%~D
1 2
R887 1K_0402_1%~DR887 1K_0402_1%~D
1 2
1.5V_SUS_PWRGD
1.05V_A_PWRGD_SIO DEVICE_DET#
RESET_OUT# PCH_RSMRST#
AC_PRESENT SIO_PWRBTN#
DOCK_SMB_DAT DOCK_SMB_CLK LCD_SMBDAT LCD_SMBCLK BAY_SMBDAT BAY_SMBCLK GPU_SMBDAT GPU_SMBCLK CHARGER_SMBDAT CHARGER_SMBCLK CARD_SMBDAT CARD_SMBCLK SIO_LAN_SMBDATA SIO_LAN_SMBCLK
LAT_ON_SW# ALWON VCI_IN1# POWER_SW_IN# ACAV_IN DOCK_PWR_SW#
+PECI_VREF PECI_EC_R
R863 43_0402_5%~DR863 43_0402_5%~D
R1659 100K_0402_5%~DR1659 100K_0402_5%~D
1 2
R1658 100K_0402_5%~DR1658 100K_0402_5%~D
1 2
+3.3V_M
100K_0402_5%~D
100K_0402_5%~D
12
R893
R893
13
D
D
2
G
G
S
S
PlacecloselypinA29
CLK_PCI_MEC
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
12
13
10K_0402_5%~D
10K_0402_5%~D
D
D
S
S
R799
R799
1
2
+1.05V_RUN_VTT
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q45
Q45
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D @CE12
@ CE12
+RTC_CELL
+RTC_CELL
1
100K_0402_5%~D
100K_0402_5%~D
12
R810
R810
1 2
R811 10K_0402_5%~DR811 10K_0402_5%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C722
C722
2
100K_0402_5%~D
100K_0402_5%~D
12
R819
R819
1 2
R825 10K_0402_5%~DR825 10K_0402_5%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
C734
C734
2
AC_PRESENT
CLK_KBD DAT_KBD CLK_MSE DAT_MSE
VOL_MUTE VOL_DOWN VOL_UP
VCI_IN1#
LAT_ON_SW#
PROCHOT#_EC
C721
@C721
@
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
C733
@C733
@
1 2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
R835 10K_0402_5%~DR835 10K_0402_5%~D
R845 4.7K_0402_5%~DR845 4.7K_0402_5%~D R846 4.7K_0402_5%~DR846 4.7K_0402_5%~D R851 4.7K_0402_5%~DR851 4.7K_0402_5%~D R852 4.7K_0402_5%~DR852 4.7K_0402_5%~D
R1169 100K_0402_5%~D@R1169 100K_0402_5%~D@ R1197 100K_0402_5%~D@R1197 100K_0402_5%~D@ R1118 100K_0402_5%~D@R1118 100K_0402_5%~D@
R1156 100K_0402_5%~DR1156 100K_0402_5%~D R870 100K_0402_5%~DR870 100K_0402_5%~D
1 2
R1180 0_0402_5%~D@R1180 0_0402_5%~D@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
@
@
2
Q47
Q47
G
G
S
S
PROCHOT#_EC
POWER_SW#_MB <43>
DOCK_PWR_BTN# <38>
+3.3V_ALW_PCH
12
12 12 12 12
12 12 12
12 12
+1.05V_RUN_VTT
10K_0402_5%~D
10K_0402_5%~D
12
100K_0402_5%~D
100K_0402_5%~D
1 2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
+5V_RUN
+3.3V_RUN
+RTC_CELL
H_PROCHOT# <7,51,52>
@R1179
@ R1179
@R812
@ R812
40 61Monday, April 02, 2012
40 61Monday, April 02, 2012
40 61Monday, April 02, 2012
B
B
B
of
of
of
Page 41
5
4
3
2
1
TouchPad BlueTooth
+3.3V_TP
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
12
12
R903
R903
R902
10P_0402_50V8J~D
10P_0402_50V8J~D
C752
C752
1
2
+3.3V_ALW +3.3V_RUN
R902
L54 BLM18AG601SN1D_0603~DL54 BLM18AG601SN1D_0603~D L55 BLM18AG601SN1D_0603~DL55 BLM18AG601SN1D_0603~D
10P_0402_50V8J~D
10P_0402_50V8J~D
C751
C751
12 12
1 2
R1161 0_0603_5%~DR1161 0_0603_5%~D
1 2
R1162 0_0603_5%~D@ R1162 0_0603_5%~D@
10P_0402_50V8J~D
10P_0402_50V8J~D
1
2
+3.3V_TP
C750
C750
TP_CLK
TP_DATA
C749
C749
TP_CLK
2
3
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
D37
D37
1
10P_0402_50V8J~D
10P_0402_50V8J~D
1
2
+3.3V_TP
TP_DATA
PS2_DAT_TS PS2_CLK_TS
D D
DAT_TP_SIO<40> CLK_TP_SIO<40>
1
2
C C
JTP1
JTP1
8
8
7
10
7
G2
6
9
6
G1
5
5
4
4
3
3
2
2
1
1
ACES_51522-00801-001
ACES_51522-00801-001
CONN@
CONN@
LinkCIS
+3.3V_TP
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
C755
C755
2
PlaceclosetoJTP1
+3.3V_RUN
1 2
R1133 1K_0402_1%~DR1133 1K_0402_1%~D
1 2
R1134 1K_0402_1%~DR1134 1K_0402_1%~D
BT_COEX_STATUS2 BT_PRI_STATUS
BT_DET#<17>
COEX1_BT_ACTIVE<34>
BT_ACTIVE<43>
BT_RADIO_DIS#<39>
COEX2_WLAN_ACTIVE<34>
USBP11-<17> USBP11+<17>
BT_COEX_STATUS2 BT_PRI_STATUS
10K_0402_5%~D
10K_0402_5%~D
33P_0402_50V8J~D
33P_0402_50V8J~D
12
C753
C753
1
2
R904
R904
+3.3V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D C748
C748
1
2
JBT1
JBT1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
G1
14
G2
ACES_50224-0120N-001
ACES_50224-0120N-001
CONN@
100P_0402_50V8J~D
100P_0402_50V8J~D
@C754
@ C754
1
2
CONN@
LinkCIS
RSMRSTcircuit
1 2
+5V_ALW_PCH
33_0402_5%~D
33_0402_5%~D
12
R1629
R1629
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
2
+5V_ALW_PCH_U4
C289
C289
U4
U4
1
VCC
RESET#
2
GND
RT9818A-44GU3_SC70-3~D
RT9818A-44GU3_SC70-3~D
+3.3V_ALW_PCH
100K_0402_5%~D
100K_0402_5%~D
R1622
R1622
1 2
RSMRST#
3
PCH_RSMRST#<40>
R1623 0_0402_5%~D@R1623 0_0402_5%~D@
+3.3V_ALW
C288
C288
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
5
1
4
2
G
3
O
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
1 2
R1655 0_0402_5%~DR1655 0_0402_5%~D
U7
U7
PCH_RSMRST#_Q <14,16>
B B
Keyboard
JKB1
JKB1
1
1
PS2_CLK_TS
2
2
PS2_DAT_TS
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
GND
12
GND
ACES_51524-0100N-001
ACES_51524-0100N-001
CONN@
CONN@
A A
5
4
LinkCIS
KB_DET# <18>
+3.3V_ALW
+5V_RUN
BC_INT#_ECE1117 <40>
BC_DAT_ECE1117 <40>
BC_CLK_ECE1117 <40>
PlaceclosetoJKB1
3
+5V_RUN+3.3V_ALW
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
C756
C756
C758
C758
1
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
41 61Monday, April 02, 2012
41 61Monday, April 02, 2012
41 61Monday, April 02, 2012
of
of
of
Page 42
5
4
3
2
1
+1.5V_RUNSource
+1.5V_MEM
1.5V_RUN_ENABLE
+1.05V_RUNSource
+1.05V_M
SI4164DY-T1-GE3_SO8~D
SI4164DY-T1-GE3_SO8~D 8 7
5
1.05V_RUN_ENABLE
+5V_RUNSource
+5V_ALW
Q55
Q55 AO4478L_SO8
AO4478L_SO8 8 7
5
5V_RUN_ENABLE
+3.3V_RUNSource
8 7
5
3.3V_RUN_ENABLE 1M_0402_5%~D
1M_0402_5%~D
12
@
@
R1627
R1627
Q59
Q59
AO4304L_SO8
AO4304L_SO8 8 7 6 5
2.2M_0402_5%
2.2M_0402_5%
12
Q63
Q63
1M_0402_5%~D
1M_0402_5%~D
12
R1611
R1611
4
1
2
Q61
Q61 AO4478L_SO8
AO4478L_SO8
R1610
R1610
4
1
2
220P_0402_25V8J
220P_0402_25V8J
4
1
2
C763
C763
+1.5V_RUN
1 2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
20K_0402_5%~D
1
2
1
2
1
2
1
2
+1.05V_RUN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C772
C772
+5V_RUN
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C761
C761
+3.3V_RUN+3.3V_ALW
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
C764
C764
20K_0402_5%~D
12
C769
C769
R921
R921
20K_0402_5%~D
20K_0402_5%~D
12
R931
R931
20K_0402_5%~D
20K_0402_5%~D
12
R910
R910
20K_0402_5%~D
20K_0402_5%~D
12
R913
R913
3
4
470P_0402_50V7K~D
470P_0402_50V7K~D
C771
C771
1
2
1 2 36
100P_0402_50V8J~D
100P_0402_50V8J~D
C773
C773
1 2 36
1 2 36
220P_0402_25V8J
220P_0402_25V8J
C766
C766
SUS_ON_3.3V#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q53A
Q53A
+3.3V_ALW
A_ENABLE
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
12
3
5
4
+PWR_SRC_S
12
3
5
4
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6 2
1
4.7M_0402_5%~D
4.7M_0402_5%~D
12
R1617
R1617
1K_0402_1%~D
1K_0402_1%~D
12
@R923
@ R923
+5V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
@
@
2
Q67
Q67
G
G
S
S
+3.3V_ALW +3.3V_ALW_PCH
R905
R905
ALW_ENABLE
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q51B
Q51B
470K_0402_5%~D
470K_0402_5%~D
+3.3V_ALW +3.3V_SUS
R911
R911
SUS_ENABLE
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q53B
Q53B
Q58
Q58
S
S
45
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
G
G
1
3
2
220P_0402_50V8J~D
220P_0402_50V8J~D
1
C770
C770
2
1K_0402_1%~D
1K_0402_1%~D
12
@R924
@ R924
+1.5V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
2
G
G
S
S
+3.3V_ALW_PCHSource
D D
ALW_ON_3.3V#<20>
PCH_ALW_ON<40,44>
SIO_SLP_S5#<16,40>
1 2
R737 0_0402_5%~D@R737 0_0402_5%~D@
1 2
R745 0_0402_5%~D@R745 0_0402_5%~D@
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
R907
R907
2
12
61
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q51A
Q51A
ALW_ON_3.3V#
+3.3V_SUSSource
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
12
R915
R915
C C
SUS_ON<39>
SIO_SLP_S4#<16,39,46>
+3.3V_MSource
SIO_SLP_A#<16,39,48>
B B
+3.3V_SUS +1.5V_RUN +3.3V_RUN+5V_RUN+3.3V_ALW_PCH
1K_0402_1%~D
1K_0402_1%~D
@R922
@
12
R922
+3.3V_SUS_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@
@
13
D
D
Q65
SUS_ON_3.3V#
A A
Q65
2
G
G
S
S
R739 0_0402_5%~D@R739 0_0402_5%~D@ R746 0_0402_5%~D@R746 0_0402_5%~D@
2
ALW_ON_3.3V#
1 2 1 2
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
12
R918
R918
A_ON_3.3V#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
1K_0402_1%~D
1K_0402_1%~D
2
G
G
Q57A
Q57A
@R928
@ R928
12
+3.3V_ALWPCH_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
S
S
2
+PWR_SRC_S
5
RUN_ON_ENABLE#
@
@ Q66
Q66
61
470K_0402_5%~D
470K_0402_5%~D
12
R917
R917
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q57B
Q57B
4
Q49
Q49
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45 2 1
G
G
3
3300P_0402_50V7K~D
3300P_0402_50V7K~D
1M_0402_5%~D
1M_0402_5%~D
1
12
R1619
R1619
C762
C762
2
Q54
Q54
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45 2 1
G
G
3
4.7M_0402_5%~D
4.7M_0402_5%~D
220P_0402_50V8J~D
220P_0402_50V8J~D
12
R1618
R1618
C767
C767
1
2
+3.3V_M
R206 0_0603_5%~D@ R206 0_0603_5%~D@
20K_0402_5%~D
20K_0402_5%~D
Forw/ovpro,+3.3V_M
@R919
@
C768
C768
12
changeto+3.3V_SUS
R919
39_0603_5%~D
39_0603_5%~D
12
@
@
R929
R929
+3.3V_RUN_CHG
13
D
@
@ Q68
Q68
D
2
G
G
S
S
DC/DCInterface
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
20K_0402_5%~D
20K_0402_5%~D
12
C760
C760
R908
R908
1
2
RUN_ON_ENABLE#<40>
SIO_SLP_S3#<11,16,27,35,39,47,48,49>
RUN_ON<27,35,39,47,48>
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
20K_0402_5%~D
20K_0402_5%~D
12
R914
R914
1
C765
C765
2
+3.3V_SUS
12
+1.05V_RUN_VTT
+1.05V_M
ForSSI w/vpro:PJP7openandPJP8open w/ovpro:PJP7openandPJP8short.depopQ63 ForPT w/ovpro:PJP7andPJP8open.popQ63
*
1 2
R735 0_0402_5%~D@R735 0_0402_5%~D@
1 2
R744 0_0402_5%~D@R744 0_0402_5%~D@
PJP7
@PJP7
@
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PJP8
@PJP8
@
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
DischargeCircuit
+1.05V_RUN +0.75V_DDR_VTT
39_0402_5%~D
39_0402_5%~D
12
@R925
@ R925
+1.05V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
@
@
Q69
Q69
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
@
@
2
Q70
Q70
G
G
S
S
RUN_ON_CPU1.5VS3#<7,11>
+1.5V_CPU_VDDQ
220_0402_5%~D
220_0402_5%~D
12
R926
R926
+1.5V_CPU_VDDQ_CHG
13
D
D
2
G
G
S
S
22_0603_5%~D
22_0603_5%~D
12
R927
R927
+DDR_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q71
Q71
SSM3K7002FU_SC70-3~D
13
D
D
Q72
Q72
2
G
G
A_ON_3.3V#
S
S
+1.05V_RUN
39_0603_5%~D
39_0603_5%~D
2
G
G
2
+3.3V_M
R916
R916
+3.3V_ALW2
100K_0402_5%~D
100K_0402_5%~D
12
R909
R909
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
12
+3.3V_M_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q60
Q60
S
S
RUN_ON_ENABLE#
Q52A
Q52A
+PWR_SRC_S
470K_0402_5%~D
470K_0402_5%~D
12
3
5
4
+PWR_SRC_S
330K_0402_5%~D
330K_0402_5%~D
12
13
D
D
2
G
G
S
S
+PWR_SRC_S
470K_0402_5%~D
470K_0402_5%~D
12
13
D
D
2
G
G
S
S
+PWR_SRC_S
470K_0402_5%~D
470K_0402_5%~D
12
13
D
D
2
G
G
S
S
R920
R920
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
R930
R930
R906
R906
R912
R912
Q52B
Q52B
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q64
Q64
Q62
Q62
Q56
Q56
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
3
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
42 61Monday, April 02, 2012
42 61Monday, April 02, 2012
42 61Monday, April 02, 2012
B
B
B
of
of
of
Page 43
5
4
3
2
1
3
BREATH_LED#<38,39>
2
1
BatteryLED
BAT2_LED#<39>
BAT1_LED#<39>
BreathLED
NTC033-XJ1J-X260CM_4P
NTC033-XJ1J-X260CM_4P
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
D23
D23
SW2
@SW2
@
3
4
Q83B
Q83B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1
2
4
5
Q125B
Q125B
4
5
Q125A
Q125A
2
Q83A
Q83A
2
Q84A
Q84A
2
SYS_LED_MASK#
Q84B
Q84B
4
5
MASK_BASE_LEDS#
3
SYS_LED_MASK#
3
SYS_LED_MASK#
61
MASK_BASE_LEDS#
61
MASK_BASE_LEDS#
61
3
1 2
R949 1.2K_0402_5%~DR949 1.2K_0402_5%~D
BAT1_MB_LED#_Q BATT_YELLOW_MB
BAT1_LED#_Q
BAT2_LED#_Q
Note:LEDcurrentmustbeatleast2mA
BREATH_PWR_LED#_R
1 2
R951 470_0402_5%~DR951 470_0402_5%~D
1 2
R953 130_0402_5%~DR953 130_0402_5%~D
1 2
R958 560_0402_5%~DR958 560_0402_5%~D
LED1
LED1
LTW-110DC5-C_WHITE
LTW-110DC5-C_WHITE
1 2
R959 1.2K_0402_5%~DR959 1.2K_0402_5%~D
POWER_SW#_MB<40>
DMIC_CLK1<29>
MEDIA_DET#<18>
VOL_MUTE<40> VOL_DOWN<40> VOL_UP<40>
BREATH_WHITE_LED_MBBREATH_LED#_Q
21
3
BREATH_PWR_LED#
BREATH_PWR_LED#
DMIC1<29>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
BATT_WHITE_MBBAT2_MB_LED#_Q
LTW-326DSKS-5A_WHI-YEL
LTW-326DSKS-5A_WHI-YEL
Note:LEDcurrentmustbeatleast2mA
BATT_YELLOW_LED
BATT_WHITE_LED
R957 1.2K_0402_5%~DR957 1.2K_0402_5%~D
+5V_ALW
+3.3V_RUN
+5V_ALW+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C1005
C1005
C1004
C1004
1
2
White
White
3
1
2
Yellow
Yellow
LED2
LED2
1 2
+5V_ALW
MEDIABOARD
JMED1
JMED1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
GND
12
12
GND
ACES_51522-01201-001
ACES_51522-01201-001
CONN@
CONN@
LinkCIS
+5V_ALW
13 14
HDDLEDsolutionforWhiteLED
Q74B
Q74B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
D D
SATA_ACT#<14>
MASK_SATA_LED#<39>
LED_SATA_DIAG_OUT#<39>
4
5
3
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
D62
D62
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
WLANLEDsolutionforWhiteLED
C C
WIRELESS_LED#<34,39>
BT_ACTIVE<41>
B B
Mask All LEDs (Sniffer Function) Mask Base MB LEDs (Lid Closed) Do not Mask LEDs (Lid Opened) 11
+3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
12
R932
R932
D59
D59
21
SYS_LED_MASK#
21
MASK_BASE_LEDS#
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R937
R937
MASK_BASE_LEDS#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q78B
Q78B
5
100K_0402_5%~D
100K_0402_5%~D
4
12
R950
R950
LED Circuit Control Table
+5V_ALW
Q74A
Q74A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2
Q80A
Q80A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q78A
Q78A
2
2
61
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R934 1.2K_0402_5%~DR934 1.2K_0402_5%~D
HDD_LED
2
61
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R938 1.1K_0402_1%~DR938 1.1K_0402_1%~D
+5V_ALW
2
61
Q79
Q79
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R939 1.2K_0402_5%~DR939 1.2K_0402_5%~D
SYS_LED_MASK# LID_CL#
0 10
X
Q75
Q75
LED3
WLAN_LED
LED3
2 1
3
LTW-110DC5-C_WHITE
LTW-110DC5-C_WHITE
SATA_LED_MB
Note:LEDcurrentmustbeatleast2mA
Q81
Q81
POWER_SW#_MB
+3.3V_ALW
ClosetoJMED1
C778
C778 1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
5
1
SYS_LED_MASK#<39>
LID_CL#<39>
Fiducial Mark
FD1
@FD1
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
A A
FD2
@FD2
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD3
@FD3
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD4
@FD4
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
H1
@H1
@ H_2P8
H_2P8
H15
@H15
@ H_2P2N
H_2P2N
5
H2
@H2
@ H_3P0
H_3P0
1
H16
@H16
@ H_2P3
H_2P3
1
H4
@H4
@
H3
@H3
@
H_3P0
H_3P0
H_3P0
H_3P0
1
1
H17
@H17
@
H18
@H18
@
H_2P3
H_2P3
H_3P3
H_3P3
1
1
H6
@H6
@1H7
H5
@H5
@
H_3P0
H_3P0
H_3P0
H_3P0
1
1
H19
@H19
@ H_2P3
H_2P3
1
1
@H7
@ H_3P3
H_3P3
H8
@H8
@ H_3P3
H_3P3
1
1
H9
@H9
@ H_1P6X3P0N
H_1P6X3P0N
1
@H10
@ H_3P8
H_3P8
H10
H12
@H12
@
H13
@H13
@
H11
@H11
@
H_3P8
H_3P8
H_3P8
H_3P8
1
1
4
H14
@H14
@
H_3P8
H_3P8
H_6P7N
H_6P7N
1
1
1
EMICLIP
CLIP1
@CLIP1
@
EMI_CLIP
EMI_CLIP
GND
1
3
P
B
2
A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
O
G
U58
U58
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
MASK_BASE_LEDS#
LID_CL#<39>
+3.3V_ALW +5V_ALW
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D C1002
C1002
1
2
ClosetoJLED1
HDD_LED BATT_WHITE_LED BATT_YELLOW_LED WLAN_LED
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D C1003
C1003
1
2
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
LEDBOARD
JLED1
JLED1
+5V_ALW
+3.3V_ALW
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
ACES_51522-01001-001
ACES_51522-01001-001
CONN@
CONN@
LinkCIS
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903 4019FT
4019FT
4019FT
11
GND
12
GND
B
B
43 61Monday, April 02, 2012
43 61Monday, April 02, 2012
1
43 61Monday, April 02, 2012
B
of
of
of
Page 44
5
4
3
2
1
+COINCELL
COIN RTC Battery
12
PR1
PR1 1K_0402_5%
+3.3V_RTC_LDO
D D
ESD Diodes
1
PD5
PD5 PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
Primary Battery Connector
PBATT1
PBATT1
11
G2
10
G1
9
9
8
8
7
7
6
6
CONN@
CONN@
5
5
4
4
3
3
2
2
1
1
12
PC5
PC5 2200P_0402_25V7K
2200P_0402_25V7K
SUYIN_200045MR009G188ZL
SUYIN_200045MR009G188ZL
C C
B B
Z4304 Z4305 Z4306
NB_PSID
2
3
PR7
PR7
100_0402_5%
100_0402_5%
GND
1 2
100_0402_5%
100_0402_5%
BLM18BD102SN1D_0603~D
BLM18BD102SN1D_0603~D
PR9
PR9
1 2
PL4
PL4
1
PD6
PD6 PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
3
PR8
PR8
100_0402_5%
100_0402_5%
1 2
12
PR14
PR14
1 2
100K_0402_1%
100K_0402_1%
PR16
PR16
1 2
15K_0402_1%~D
15K_0402_1%~D
PBATT+_C
PBAT_SMBCLK <40> PBAT_SMBDAT <40>
PR11
1 2
0_0402_5%
0_0402_5%
1 3
2
B
B
PC4
PC4
@PR11
@
D
S
D
S
PQ2
PQ2 FDV301N_G_NL_SOT23-3~D
FDV301N_G_NL_SOT23-3~D
G
G
2
C
C
PQ3
PQ3 MMST3904-7-F_SOT323~D
MMST3904-7-F_SOT323~D
E
E
3 1
PL2
PL2
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
PL3
PL3
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
12
0.1U_0402_25V6
0.1U_0402_25V6
PR13
PR13
33_0402_5%~D
33_0402_5%~D
1 2
+5V_ALW
12
PBATT+
PR15
PR15
10K_0402_1%
10K_0402_1%
1 2
PR6
PR6
SLICE_BAT_PRES#<38,39,53>
PR12
PR12
PR17
PR17
10K_0402_5%
10K_0402_5% @
@
+3.3V_ALW
+3.3V_ALW
12
100K_0402_5%
100K_0402_5%
PD8
PD8
1 2
SCH DIO DB2J31400L SOD323-2
SCH DIO DB2J31400L SOD323-2
1 2
2.2K_0402_1%
2.2K_0402_1% NB_PSID_TS5A63157
PQ1
PQ1
FDN338P_G_NL_SOT23-3~D
FDN338P_G_NL_SOT23-3~D
1
1
1 3
2
PR10
PR10
1 2
0_0402_5%
0_0402_5%
@
@
12
DOCK_PSID<38>
PSID_DISABLE# <39>
PBAT_PRES# <39>
3
3
2
2
PC6
PC6
1500P_0402_7K~D
1500P_0402_7K~D
RB715FGT106_UMD3
RB715FGT106_UMD3
1
2
DC_IN+ Source
+DC_IN
PL5
PL5
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
12
PC18
PC18
0.1U_0402_25V6
0.1U_0402_25V6
12
PC12
PC12
0.1U_0402_25V6
0.1U_0402_25V6
PL6
PL6
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
PC16
PC16
12
0.1U_0402_25V6@
0.1U_0402_25V6@
PJPDC1
PJPDC1 PS_HPW15003-05M101R
PS_HPW15003-05M101R
5
5
-DCIN_JACK
4
4
3
3
+DCIN_JACK
2
2
1
1
CONN@
CONN@
8/18 change from 7 pin to 5 pin
A A
5
PR24
PR24
+DC_IN
PC10
PC10
12
4.7K_0805_5%~D@
4.7K_0805_5%~D@
1 2
0.022U_0603_50V7K
0.022U_0603_50V7K
12
PR21
PR21
1M_0402_5%~D
1M_0402_5%~D
4
PR26
PR26
12
10K_0402_5%
10K_0402_5%
1M_0402_5%~D
1M_0402_5%~D
PQ5
PQ5
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
1
S
D
2
S
D
3
S
D
4
G
D
PR23
PR23
1 2
8 7 6 5
SOFT_START_GC <53>
PC11
PC11
0.1U_0402_25V6
0.1U_0402_25V6
12
12
PC13
PC13
0.1U_0402_25V6
0.1U_0402_25V6
+DC_IN_SS
12
12
12
PC15
PC14
PC14
0.1U_0402_25V6
0.1U_0402_25V6
PC15
PR22
PR22
10U_0805_25V6K
10U_0805_25V6K
100K_0402_5%
100K_0402_5%
PCH_ALW_ON<40,42>
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+PWR_SRC
PR25
PR25
1 2
0_0402_5%
0_0402_5%
@
@
VSB_N_002
12
@
@
2
G
G
PC17
PC17
.1U_0402_16V7K
.1U_0402_16V7K
2
PR20
PR20
22K_0402_1%
22K_0402_1%
1 2
VSB_N_003
13
D
D
PQ6
PQ6 SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
S
S
12
1K_0402_5%
Z4012
2
3
PD4
PD4
1
12
DOCK_SMB_ALERT# <38,39>
PU1
PU1
NO
GND
NC3COM
TS5A63157DCKR_SC70-6~D
TS5A63157DCKR_SC70-6~D
PR19
PR19
100K_0402_1%
100K_0402_1%
12
VSB_N_001
PC9
PC9
6
IN
5
V+
4
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
0.22U_0603_25V7K
0.22U_0603_25V7K
+COINCELL
JRTC1
JRTC1
1
1
2
+RTC_CELL
PC3
PC3 1U_0603_10V6K
1U_0603_10V6K
Move to power schematic
GPIO_PSID_SELECT <39>
+5V_ALW
PS_ID <40>
+PWR_SRC_S
13
2
PQ4
PQ4
12
PC8
PC8
0.1U_0402_25V6
0.1U_0402_25V6
2
3
G1
4
G2
ACES_50273-0020N-001
ACES_50273-0020N-001 CONN@
CONN@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
44 59Monday, April 02, 2012
44 59Monday, April 02, 2012
44 59Monday, April 02, 2012
of
of
of
B
B
B
Page 45
A
B
C
D
E
2VREF_6182
12
PC101
PC101
1U_0603_16V6K
1U_0603_16V6K PC120
@ PC120
@
1 1
+PWR_SRC
2 2
PJP100
PJP100
1 2
@
@
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PL100
PL100
1UH_PCMB053T-1R0MS_7A_20%
1UH_PCMB053T-1R0MS_7A_20%
12
12
PC100
PC100
0.1U_0402_25V6
0.1U_0402_25V6
+3.3V_ALWP
3.3VALWP TDC 5.185A Peak Current 7.407A
+DC1_PWR_SRC
12
12
12
PC103
PC103
PC119
PC102
PC102
2200P_0402_25V7K
2200P_0402_25V7K
PC119
@
@
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
PQ100
PR109
PR109
4.7_1206_5%
4.7_1206_5%
PQ100
12
SNUB_3V
12
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
PL101
PL101
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
1 2
1
+
+
PC110
PC110
2
150U_B2_6.3VM_R35M
150U_B2_6.3VM_R35M
+3.3V_RTC_LDO
3 5
241
3 5
241
PC112
PC112
680P_0402_50V7K
680P_0402_50V7K
PR100
PR100
1 2
@
@
10U_0603_6.3V6M
10U_0603_6.3V6M
PC108
PC108
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D 1 2
PQ102
PQ102 FDMC8878_POWER33-8-5
FDMC8878_POWER33-8-5
+3.3V_ALW2
0_0402_5%
0_0402_5%
12
PC107
PC107
LX_3V
PR107
PR107
1 2
2.2_0603_5%
2.2_0603_5%
LG_3V
12
OCP current 9.629A
PR111
PR113
PD100
PD100
B
1 2
RLZ5.1B_LL34@
RLZ5.1B_LL34@
+5V_ALW2
+PWR_SRC
2N7002DW-T/R7_SOT363-6~D
@
@
PQ104B
PQ104B
0_0402_5%
0_0402_5%
PC117
PC117
1U_0603_10V6K
1U_0603_10V6K
@
@
2N7002DW-T/R7_SOT363-6~D
ENTRIP2
3
5
4
2
12
3 3
PR115
PR115
2K_0402_1%
2K_0402_1%
ALWON<40>
THERM_STP#<22>
4 4
A
1 2
PR116
PR116
1 2
2
13
PQ105
PQ105
PDTC115EU_SOT323-3
PDTC115EU_SOT323-3
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
ENTRIP1
61
PQ104A
PQ104A
PR114
PR114
100K_0402_1%
100K_0402_1%
1 2
499K_0402_1%@
499K_0402_1%@
PR113
PR111
300K_0402_1%
300K_0402_1%
@
@
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
22P_0402_50V8J~D
22P_0402_50V8J~D
PR101
PR101
13.7K_0402_1%
13.7K_0402_1% 1 2
PR103
PR103
20K_0402_1%
20K_0402_1%
1 2
PR105
PR105
130K_0402_1%
130K_0402_1%
1 2
25
7 8
BST_3V
9
UG_3V
10 11 12
12
PC115
PC115
1U_0603_10V6K
1U_0603_10V6K
2VREF_6182
12
FB_3V
ENTRIP2
6
P PAD
VO2 VREG3 BOOT2 UGATE2 PHASE2 LGATE2
5
FB2
ENTRIP2
SKIPSEL
EN
14
13
PU100
PU100
+DC1_PWR_SRC
C
4
15
3
REF
TONSEL
VIN16GND
12
PC121
@ PC121
@
12
22P_0402_50V8J~D
22P_0402_50V8J~D
PR102
PR102
30.9K_0402_1%
30.9K_0402_1%
1 2
PR104
PR104 20K_0402_1%
20K_0402_1%
FB_5V
1 2
PR106
PR106
93.1K_0402_1%~D
93.1K_0402_1%~D
ENTRIP1
1 2
1
2
FB1
ENTRIP1
24
VO1
23
PGOOD
22
BOOT1
21
UGATE1
20
PHASE1
19
LGATE1
NC18VREG5
17
RT8205LZQW(2) WQFN 24P PWM
RT8205LZQW(2) WQFN 24P PWM
+5V_ALW2
12
PC114
PC114
4.7U_0805_10V6K
4.7U_0805_10V6K
PC116
PC116
0.1U_0402_25V6
0.1U_0402_25V6
BST_5V
UG_5V LX_5V LG_5V
+5V_ALWP
+3.3V_ALWP
PR108
PR108
1 2
2.2_0603_5%
2.2_0603_5%
100K_0402_1%
100K_0402_1%
+DC1_PWR_SRC
12
12
PC105
PC105
PC104
PC104
0.1U_0402_25V6
0.1U_0402_25V6 2200P_0402_25V7K
2200P_0402_25V7K
PC109
PC109
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
BST1_5VBST1_3V
1 2
FDMC7692S_POWER33-8-5
FDMC7692S_POWER33-8-5
+3.3V_ALW
PR112
PR112
1 2
PJP101
PJP101
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m PJP102
PJP102
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m PJP103
PJP103
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
D
12
12
PC118
PC118
PC106
PC106
@
@
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
ALW_PWRGD_3V_5V <40>
PQ101
PQ101 FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
3 5
PQ103
PQ103
241
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
3 5
241
12
PR110
PR110
4.7_1206_5%
4.7_1206_5%
SNUB_5V
12
PL103
PL103
1 2
PC113
PC113
680P_0402_50V7K
680P_0402_50V7K
1
+
+
PC111
PC111
2
150U_B2_6.3VM_R35M
150U_B2_6.3VM_R35M
5VALWP TDC 4.415A Peak Current 6.308A OCP current 8.2A
(5A,180mils ,Via NO.= 9)
+5V_ALW
(4A,120mils ,Via NO.= 6)
+3.3V_ALW
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
45 59Monday, April 02, 2012
45 59Monday, April 02, 2012
45 59Monday, April 02, 2012
E
+5V_ALWP
of
of
of
Page 46
5
4
3
2
1
1.5Volt +/- 5%
D D
TDC 9.74A Peak Current 13.915A OCP current 16.698A
0.75Volt +/- 5% TDC 0.525A Peak Current 0.75A
PJP200
+PWR_SRC
+1.5V_MEN_P
C C
Mode Level +0.75V_P +V_DDR_REF S5 L off off S3 L off on S0 H on on
B B
Note: S3 - sleep ; S5 - power off
PJP200
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
1UH_FDSD0630-H-1R0M_11A_20%
1UH_FDSD0630-H-1R0M_11A_20%
1 2
1
+
+
PC65
PC65 330U_2.5V_M
330U_2.5V_M
2
PL200
PL200
1.5V_B+
12
PC274
PC274
12
PC276
PC276
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
12
PC275
PC275 680P_0402_50V7K
680P_0402_50V7K
SNUB_1.5V
12
PR203
PR203
4.7_1206_5%
4.7_1206_5%
SIO_SLP_S4#<16,39,42>
12
12
PC279
PC279
0.1U_0402_25V6
0.1U_0402_25V6
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
DDR_ON<40>
PC281
PC281 2200P_0402_25V7K
2200P_0402_25V7K
PQ200
PQ200
1.5V_SUS_PWRGD<40>
@
@
PR206
PR206
0_0402_5%
0_0402_5%
1 2
PR232
PR232
1 2
0_0402_5%
0_0402_5%
@
@
1 2
3 5
241
+5V_ALW
PQ210
PQ210
3 5
241
FDMC7692S_POWER33-8-5
FDMC7692S_POWER33-8-5
+3.3V_ALW
PR204
PR204
100K_0402_1%
100K_0402_1%
12
PC255
PC255 .1U_0402_16V7K
.1U_0402_16V7K
@
@
PC278
PC278
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
12
PR200
PR200
1 2
2.2_0603_5%
2.2_0603_5%
PR202
PR202
5.1_0603_5%~D
5.1_0603_5%~D
1 2
BOOT_1.5V
PR201
PR201
22.6K_0402_1%
22.6K_0402_1%
1 2
+5V_ALW
1 2
12
PC253
PC253 1U_0603_10V6K
1U_0603_10V6K
S5_1.5V
DH_1.5V
SW_1.5V
DL_1.5V
CS_1.5V
VDD_1.5V
1.5V_SUS_PWRGD
0.75V_DDR_VTT_ON<39>
PC272
PC272 1U_0603_10V6K
1U_0603_10V6K
1.5V_B+
15
LGATE
14
PGND
13
CS
RT8207MZQW_WQFN20_3X3
RT8207MZQW_WQFN20_3X3
12
VDDP
11
VDD
PR205
PR205
1M_0402_1%~D
1M_0402_1%~D
1 2
17
16
PHASE
UGATE
PGOOD
TON
9
10
PR236
PR236
1 2
@
@
18
BOOT
S5
8
0_0402_5%
0_0402_5%
VLDOIN_1.5V
19
VLDOIN
VTTGND
VTTSNS
S3
7
20
PU200
PU200
VTT
PAD
GND
VTTREF
VDDQ
FB
6
21 1
2
3
4
5
1.5V_FB
PJP204
PJP204
PAD-OPEN1x1m
PAD-OPEN1x1m
@
@
+V_DDR_REF
VDDQ_1.5V
22P_0402_50V8J~D
22P_0402_50V8J~D
PR238
PR238 0_0402_5%
0_0402_5%
1 2
+1.5V_MEN_P
12
@
@
PR237
PR237
0_0402_5%
0_0402_5%
1 2
PC215
@PC215
@
12
+1.5V_MEN_P
12
@
@
OCP Current 0.9A
12
12
PC280
PC280
PC263
PC263
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
PC282
PC282 .1U_0402_16V7K
.1U_0402_16V7K
+0.75V_P
+V_DDR_REF
PC277
PC277
0.033U_0402_16V7~D
0.033U_0402_16V7~D
PJP203
PJP201
+1.5V_MEN_P
A A
2
PJP201
JUMP_1x3m@
JUMP_1x3m@
112
+1.5V_MEM +0.75V_DDR_VTT
+0.75V_P
PJP203
PAD-OPEN1x1m
PAD-OPEN1x1m
@
@
12
+1.5V_MEN_P
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
46 59Monday, April 02, 2012
46 59Monday, April 02, 2012
46 59Monday, April 02, 2012
1
B
B
B
of
of
of
Page 47
A
1 1
PJP301
+3.3V_ALW
2 2
RUN_ON<27,35,39,42,48>
SIO_SLP_S3#<11,16,27,35,39,42,48,49>
3 3
PJP301
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
12
0_0402_5%
0_0402_5%
1 2
PR303
@PR303
@
PR306
PR306
1 2
0_0402_5% @
0_0402_5% @
PC300
PC300 22U_0805_6.3VAM
22U_0805_6.3VAM
EN_1.8VSP
1.8VSP_VIN
12
PR304
@PR304
@
47K_0402_5%
47K_0402_5%
B
PC307
PC307
0.1U_0402_25V6
0.1U_0402_25V6
12
12
PU300
PU300
10
9 8
5
PC304
PC304
.1U_0402_16V7K
.1U_0402_16V7K
@
@
PR300
PR300
10K_0402_5%
10K_0402_5%
4
LX
PVIN
PG
LX
PVIN SVIN
FB
EN
TP
NC
7
1
11
SYN470DBC_DFN10_3X3
SYN470DBC_DFN10_3X3
12
+3.3V_RUN
C
1.8Volt +/-5% TDC 0.85A
D
Peak Current 1.215A
1.8V_RUN_PWRGD <39>
PL301
1 2
PR301
PR301
4.7_0603_5%
4.7_0603_5%
@
@
PC305
PC305
@
@
680P_0402_50V7K
680P_0402_50V7K
PL301
PR302
PR302
20K_0402_1%
20K_0402_1%
PR305
PR305
10K_0402_1%
10K_0402_1%
12
12
12
PC301
PC301
22P_0402_50V8J
22P_0402_50V8J
12
PC302
PC302
<Vo=1.8V> VFB=0.6V
22U_0805_6.3VAM
22U_0805_6.3VAM
12
PC303
PC303
22U_0805_6.3VAM
22U_0805_6.3VAM
1UH +-30% NRS4018T1R0NDGJ 3.2A
1.8VSP_LX
2 3
1.8VSP_FB
6
NC
1UH +-30% NRS4018T1R0NDGJ 3.2A
12
SNUB_1.8VSP
12
Vo=VFB*(1+PR64/PR67)=0.6*(1+20K/10K)=1.8V
OCP current 1.458A
+1.8V_RUNP
12
PC306
PC306
47P_0402_50V8J
47P_0402_50V8J
PJP300
PJP300
+1.8V_RUNP
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
+1.8V_RUN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
D
47 59Monday, April 02, 2012
47 59Monday, April 02, 2012
47 59Monday, April 02, 2012
of
of
of
B
B
B
Page 48
5
D D
+3.3V_ALW
PR400
PR400
100K_0402_1%
100K_0402_1%
0_0402_5%
0_0402_5%
@
@
@
@
12
1.05V_A_PWRGD<40>
TRIP_+V1.05SP
EN_+V1.05SP FB_+V1.05SP RF_+V1.05SP
12
PR405
PR405 470K_0402_1%
470K_0402_1%
PR402
PR402
82K_0402_1%
S0 mode be high level
C C
SIO_SLP_A#<16,39,42>
SIO_SLP_S3#<11,16,27,35,39,42,47,49>
RUN_ON<27,35,39,42,47>
82K_0402_1%
1 2
PR403
PR403
1 2
@
@
1 2
PR408 0_0402_5%
PR408 0_0402_5%
1 2
PR409 0_0402_5%
PR409 0_0402_5%
PC407
PC407
.1U_0402_16V7K@
.1U_0402_16V7K@
4
12
PU400
PU400
1 2 3 4 5
VBST
PGOOD TRIP
DRVH
EN
SW
V5IN
VFB
DRVL
RF
TPS51212DSCR_SON10_3X3
TPS51212DSCR_SON10_3X3
TP
10 9 8 7 6 11
BST_+V1.05SP
UG_+V1.05SP SW_+V1.05SP
LG_+V1.05SP
3
2.2_0603_5%
2.2_0603_5%
1 2
+5V_ALW
1 2
PC405
PC405 1U_0402_6.3V6K
1U_0402_6.3V6K
PR401
PR401
PC404
PC404
0.1U_0402_25V6
0.1U_0402_25V6
1 2
+V1.05SP_B+
PQ400
PQ400
3 5
241
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
3 5
241
PQ405
PQ405
2
12
PC401
PC401
0.1U_0402_25V6
0.1U_0402_25V6
1UH_FDSD0630-H-1R0M_11A_20%
1UH_FDSD0630-H-1R0M_11A_20%
1 2
12
PR404
PR404
4.7_1206_5%
4.7_1206_5%
12
PC408
PC408
FDMC8878_POWER33-8-5
FDMC8878_POWER33-8-5
680P_0402_50V7K
680P_0402_50V7K
12
PC402
PC402
2200P_0402_25V7K
2200P_0402_25V7K
PL400
PL400
PC403
PC403
1
PJP400
PJP400
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
12
12
PC400
PC400
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
+PWR_SRC
+1.05V_MP
1
+
+
PC406
PC406 220U_B2_2.5VM_R15M
220U_B2_2.5VM_R15M
2
With vPro:pop PR403
Without vPro
pop PR408
5@ for TM pop
PR406
6@ for vPOR pop
B B
PR406
4.99K_0402_1%
4.99K_0402_1% 12
+1.05Volt +/- 5% TDC 4.7A
PR407
PR407 10K_0402_1%
10K_0402_1%
1 2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
+1.05V_MP
2 1
PJP401
PJP401 PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
2
+1.05V_M
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Peak Current 6.5A OCP current 7.8A
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
48 59Monday, April 02, 2012
48 59Monday, April 02, 2012
48 59Monday, April 02, 2012
1
B
B
B
of
of
of
Page 49
5
2
4
3
+V1.05S_VCCPP_B+
2
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
PJP500
PJP500
1
+PWR_SRC
+3.3V_RUN
12
D D
1.05V_VTTPWRGD<40,50>
PR501
PR501
84.5K_0402_1%
84.5K_0402_1% 1 2
PR503
@PR503
@
CPU_VTT_ON<39>
SIO_SLP_S3#
,47,48>
C C
B B
1 2
@ PR307
@
.1U_0402_16V7K@
.1U_0402_16V7K@
0_0402_5%
0_0402_5%
1 2
PR307
0_0402_5%
0_0402_5%
PC506
PC506
12
TRIP_+V1.05S_VCCPP EN_+V1.05S_VCCPP
FB_+V1.05S_VCCPP RF_+V1.05S_VCCPP
12
PR505
PR505
470K_0402_1%
470K_0402_1%
PR500
PR500 100K_0402_5%
100K_0402_5%
1 2
PU500
PU500
1
PGOOD
2
TRIP
3
EN
4
VFB
5
RF
TPS51212DSCR_SON10_3X3
TPS51212DSCR_SON10_3X3
PR507
PR507
4.99K_0402_1%
4.99K_0402_1% 12
PR509
PR509
@
@
71.5K_0402_1%
71.5K_0402_1%
12
VBST
DRVH
SW
V5IN
DRVL
TP
BST_+V1.05S_VCCPP
10 9 8 7 6 11
+3.3V_RUN
UG_+V1.05S_VCCPP SW_+V1.05S_VCCPP
LG_+V1.05S_VCCPP
PR502
PR502
2.2_0603_5%
2.2_0603_5%
1 2
PC501
PC501
PC504
PC504
0.1U_0402_25V6
0.1U_0402_25V6 1 2
12
PC505
PC505 1U_0603_6.3V6M
1U_0603_6.3V6M
+5V_ALW
PQ501
FDMC7692S_POWER33-8-5
FDMC7692S_POWER33-8-5
PQ501
PQ500
PQ500 FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
3 5
241
3 5
241
1UH_FDSD0630-H-1R0M_11A_20%
1UH_FDSD0630-H-1R0M_11A_20%
1 2
12
PR504
PR504
4.7_1206_5%
4.7_1206_5%
12
PC508
PC508 680P_0402_50V7K
680P_0402_50V7K
VCCP_PWRCTRL = "High" , Vo = 1.05V (SNB)
PC502
PC502
0.1U_0402_25V6
0.1U_0402_25V6
PL500
PL500
VTT_SENSE_FB
VSSIO_SENSE_R_FB
VCCP_PWRCTRL = "Low" , Vo = 1V (IVB)
PR510
PR510 10K_0402_1%
10K_0402_1%
1 2
12
PR514
PR514 10_0402_1%@
10_0402_1%@
A A
PQ502
PQ502
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
@
@
13
D
D
2
G
G
S
S
12
PC509
PC509 .01U_0402_16V7K@
.01U_0402_16V7K@
PR511
PR511 10K_0402_5%@
10K_0402_5%@
1 2
From GPIO
+1.05V_RUN_VTT
+1.05VTTP
PJP501
PJP501
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
PJP502
PJP502
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
VCCP_PWRCTRL <11>
12
12
PC503
PC503
2200P_0402_25V7K
2200P_0402_25V7K
12
PC500
PC500
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
+1.05VTTP
1
+
+
PC511
PC511 220U_B2_2.5VM_R15M
220U_B2_2.5VM_R15M
@
@ PR513
PR513
@
@
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
VTT_SENSE <10>
VSSIO_SENSE_R <10>
12
@
@
PC510
PC510 .1U_0402_16V7K
.1U_0402_16V7K
Local sense put on HW site
PR508
PR508
1 2
1 2
+1.05Volt +/- 5% TDC 6A Peak Current 8.5A OCP current 10.2A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
49 59Monday, April 02, 2012
49 59Monday, April 02, 2012
49 59Monday, April 02, 2012
1
B
B
B
of
of
of
Page 50
5
4
3
2
1
D D
The 1k PD on the VCCSA VIDs are empty. These should be stuffed to ensure that VCCSA VID is 00 prior to VCCIO stability.
PR78
PR78
1K_0402_5%
1K_0402_5%
PR81
PR81
1K_0402_5%
1K_0402_5%
12
1 2
@
@
1 2
@
@
12
PR90
PR90 0_0402_5%
0_0402_5%
PR91
PR91 0_0402_5%
0_0402_5%
VCCSA_VID_1 <11>
VCCSA_VID_0 <11>
+3.3V_RUN
12
PR79
PR79
100K_0402_5%
PR80
PR80
VCCSAPWROK<40>
12
0_0402_5%
0_0402_5%
@
@
100K_0402_5%
+VCCSA_PWRGD
+VCCSA_PWRGD
VID [0] VID[1] VCCSA Vout 0 0 0.9V 0 1 0.8V 1 0 0.725V 1 1 0.675V
output voltage adjustable network
VCCSA TDC 4.2A Peak Current 6A OCP current 7.2A
+5V_ALW
PR82
PR82
10_0402_1%
12
3300P_0402_50V7K
3300P_0402_50V7K
10_0402_1%
19
20
21
22
23
24
PC91
PC91
PU7
PU7
PGND
PGND
PGND
VIN
VIN
VIN
12
PC75
PC75
2.2U_0603_10V7K
PC89
PC89 10U_0805_25V6K
10U_0805_25V6K
1 2
+VCCSA_PWR_SRC
2.2U_0603_10V7K 1 2
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
PC90
PC90
C C
12
1 2
+3.3V_ALW
B B
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
PJP19
PJP19
+VCCSA_PWR_SRC
PC86
PC86
PC87
PC87
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_25V7K
2200P_0402_25V7K
GNDA_VCCSA
1 2
PC88
PC88
10U_0805_25V6K
10U_0805_25V6K
PC74
PC74
1 2
1U_0603_10V6K
1U_0603_10V6K
12
18
17
16
V5FILT
V5DRV
PGOOD
TPS51461RGER_QFN24_4X4~D
TPS51461RGER_QFN24_4X4~D
COMP
GND
VREF
3
1
2
12
PR89
PR89
5.1K_0402_1%
5.1K_0402_1%
PC92
PC92
0.01U_0402_25V7K
0.01U_0402_25V7K
PR83
+VCCSA_EN
14
15
13
EN
VID0
VID1
VOUT
SLEW
5
4
1 2
+VCCSA_BT
12
BST
+VCCSA_PHASE
11
SW
10
SW
9
SW
8
SW
7
SW
25
TP
MODE
6
PR86
PR86 22K_0402_1%
22K_0402_1%
PR83
1 2
PR84
PR84
2.2_0603_1%
2.2_0603_1%
1 2
12
0_0402_5%
0_0402_5%
@
@
+VCCSA_BT_1
12
PC77
PC77 680P_0402_50V7K@
680P_0402_50V7K@
12
PR85
PR85
4.7_1206_5%@
4.7_1206_5%@
1.05V_VTTPWRGD <40,49>
PC76
PC76
0.1U_0402_25V6
0.1U_0402_25V6 1 2
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
PL15
PL15
1 2
PC79
PC79
@
@
22U_0805_6.3V6M
22U_0805_6.3V6M
1 2
12
PC80
PC80
.1U_0402_16V7K
.1U_0402_16V7K
PR87
PR87
100_0402_5%
100_0402_5%
1 2
@
@
PC81
PC81
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
12
PR88
PR88 0_0402_5%
0_0402_5%
PC82
PC82
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
12
PC84
PC84
PC83
PC83
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
2200P_0402_25V7K
2200P_0402_25V7K
VCCSA_SENSE <11>
PC85
PC85
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
+VCCSA_P
PJP20
PJP20
+VCCSA_P
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP21
PJP21
PAD-OPEN1x1m
PAD-OPEN1x1m
+VCC_SA
12
GNDA_VCCSA
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
50 59Monday, April 02, 2012
50 59Monday, April 02, 2012
50 59Monday, April 02, 2012
B
B
B
of
of
of
Page 51
5
Local sense put on HW site
VCC_AXG_SENSE<11>
VSS_AXG_SENSE<11>
D D
VSUMG+
12
12
PR707
PR707
2.61K_0402_1%
2.61K_0402_1%
12
PR709
PR709
PH700
PH700
VSUMG-
12
10KB_0402_5%_ERTJ0ER103J
10KB_0402_5%_ERTJ0ER103J
PC711
PC711
.1U_0402_16V7K
PR712
PR712
1 2
3.83K_0402_1%
3.83K_0402_1%
C C
+1.05V_RUN_VTT
PR730 54.9_0402_1%PR730 54.9_0402_1%
PR735 75_0402_5%@ PR735 75_0402_5%@
B B
PR737 130_0402_1%PR737 130_0402_1%
A A
.1U_0402_16V7K
12
PH701
PH701
470K_0402_5%_ TSM0B474J4702RE
470K_0402_5%_ TSM0B474J4702RE
PR715
PR715
12
27.4K_0402_1%
27.4K_0402_1%
VIDALERT_N<10>
H_PROCHOT#<7,40,52>
PR724
1 2
0_0402_5%
0_0402_5%
SCLK
12
ALERT#
12
SDA
12
5
VIDSCLK<10>
VIDSOUT<10>
12
11K_0402_1%
11K_0402_1%
@PR724
@
12
12
PC707
PC707
0.022U_0402_25V7K
0.022U_0402_25V7K
VSUMG-
+5V_RUN
PC719
PC719
43P_0402_50V8J~D
43P_0402_50V8J~D
12
PC708
PC708
.1U_0402_16V7K
.1U_0402_16V7K
1.05V_0.8V_PWROK<14,40>
PC709
PC709
0.082U_0402_16V7K
0.082U_0402_16V7K
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
PR716
PR716
1 2
@
@
1 2
@
@
1 2
@
@
1 2
@
@
IMVP_VR_ON<39>
PR725
PR725
1 2
3.83K_0402_1%
3.83K_0402_1%
+5V_RUN
VSUM+
VSUM-
PC712
@PC712
@
PC713
@PC713
@
PR713
PR713
1 2
0_0402_5%
0_0402_5%
@
@
0_0402_5%
0_0402_5% PR718
PR718 0_0402_5%
0_0402_5% PR719
PR719 0_0402_5%
0_0402_5% PR721
PR721 0_0402_5%
0_0402_5%
PR746
PR746
2.61K_0402_1%
2.61K_0402_1%
PH703
PH703
PC743
PC743
.1U_0402_16V7K
.1U_0402_16V7K
330P_0402_50V7K
330P_0402_50V7K
0.01U_0402_50V7K
0.01U_0402_50V7K
PR710
@PR710
@
649_0402_1%~D
649_0402_1%~D
1 2
PR711
PR711
383_0402_1%
383_0402_1%
1 2
12
12
ALERT#
SDA
VR_HOT#
PR722
@PR722
@
1 2
0_0402_5%
0_0402_5%
PR723
PR723
1 2
0_0402_5%
0_0402_5%
@
@
12
PH702
PH702
470K_0402_5%_ TSM0B474J4702RE
470K_0402_5%_ TSM0B474J4702RE
PR727
PR727
27.4K_0402_1%
27.4K_0402_1%
12
PC720 22P_0402_50V8JPC720 22P_0402_50V8J
COMP
PC724
@PC724
@
PC726
PC726
VSUM-
PC728
PC728
12
12
12
PR747 11K_0402_1%PR747 11K_0402_1%
10KB_0402_5%_ERTJ0ER103J
10KB_0402_5%_ERTJ0ER103J
12
PC703
@ PC703
@
12
PC706
PC706
1 2
12
@
@
ISEN1G ISEN2G NTCG
SCLK
VR_EN
NTC
12
PR732
@PR732
@
1 2
0_0402_5%
0_0402_5%
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
12
.1U_0402_16V7K
.1U_0402_16V7K
PC738
PC738
PC739
PC739
1 2
649_0402_1%~D
649_0402_1%~D
4
PC710
PC710
3300P_0402_50V7K
3300P_0402_50V7K
PU700
PU700
1
ISUMPG
2
ISEN1G
3
ISEN2G
4
NTCG
5
SCLK
6
ALERT#
7
SDA
8
VR_HOT#
9
VR_ON
10
NTC
41
TP
12
PC740
PC740
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
0.047U_0402_25V7K
0.047U_0402_25V7K
365_0402_1%
365_0402_1%
PR754
PR754
4
40
11
ISEN3
PR750
PR750
1 2
39
RTNG
ISUMNG
ISEN212FB17ISUMP
ISEN3/FB2
ISEN2
PR702
PR702
2.74K_0402_1%
2.74K_0402_1% PR704
PR704
499_0402_1%
499_0402_1%
1 2
PGOODG
37
35
36
38
34
FBG
COMPG
PWM2G
PGOODG
LGATE1G
ISUMN
RTN16ISEN1
14
15
13
COMP
ISEN1
12
PC744
PC744 3300P_0402_25V7K
3300P_0402_25V7K
PR701
PR701
330P_0402_50V7K
12
PC704
PC704
12
12
390P_0402_50V7K
390P_0402_50V7K
IMVP_PWRGD
@
@
PR708 0_0402_5%
PR708 0_0402_5%
33
32
31
BOOT1G
PHASE1G
UGATE1G
30
BOOT2
29
UGATE2
28
PHASE2
27
LGATE2
26
VCCP
25
VDD
24
PWM3
23
LGATE1
22
PHASE1
21
UGATE1
COMP
PGOOD
BOOT1
18
19
20
ISL95836HRTZ-T_TQFN40_5X5~D
ISL95836HRTZ-T_TQFN40_5X5~D
BOOT1
PGOOD
PR726
PR726
1 2
0_0402_5%
0_0402_5%
@
@
PR736
PR736
12
499_0402_1%
499_0402_1%
PR740
PR740
2K_0402_1%
2K_0402_1%
@
@
PC737
PC737
1 2
330P_0402_50V7K
330P_0402_50V7K
PC741
PC741
1 2
0.01U_0402_50V7K
0.01U_0402_50V7K
2K_0402_1%
2K_0402_1%
PR728 1.91K_0402_1%PR728 1.91K_0402_1%
390P_0402_50V7K
390P_0402_50V7K
12
PR703
PR703
130K_0402_1%
130K_0402_1%
PC722
PC722
12
2K_0402_1%
2K_0402_1%
330P_0402_50V7K
12
12
PC705
PC705
1 2
68P_0402_50V8J
68P_0402_50V8J
LGATE1G
PHASE1G
BOOT1G
BOOT2 UGATE2 PHASE2 LGATE2
LGATE1 PHASE1 UGATE1
IMVP_PWRGD <39>
12
PR741
PR741
130K_0402_1%
130K_0402_1% PR744
PR744
1 2
Local sense put on HW site
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PC701
PC701
12
PC702
PC702
12
150P_0402_50V8F~D
150P_0402_50V8F~D
UGATE1G
VCCP
PWM3
PC714
PC714
1U_0603_10V6K
1U_0603_10V6K
+3.3V_RUN
PC723
PC723
12
47P_0402_50V8J
47P_0402_50V8J
12
150P_0402_50V8F~D
150P_0402_50V8F~D
PC729
PC729
1 2
680P_0402_50V7K
680P_0402_50V7K
VCCSENSE <10> VSSSENSE <10>
3
2
VCC_GFXCORE TDC 21.5A Peak Current 33A OCP current 57.18A Load line -3.9mV/A
5
PQ708
PQ708
MDU1516URH 1N POWERDFN56-8
MDU1516URH 1N POWERDFN56-8
123
5
PQ710
PQ710
4
213
@
@
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
VCC_core TDC 36A Peak Current 53A OCP current 64A Load line -1.9mV/A Icc_Dyn_VID1 43A
5
PQ700
PQ700
4
@
@
MDU1516URH 1N POWERDFN56-8
MDU1516URH 1N POWERDFN56-8
123
5
PQ703
PQ703
4
213
@
@
5
PQ704
PQ704
4
@
@
MDU1516URH 1N POWERDFN56-8
MDU1516URH 1N POWERDFN56-8
123
5
PQ706
PQ706
4
213
@
@
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
PC727
PC727
12
12
PR705
PR705
150K_0402_1%~D
150K_0402_1%~D
PC750
PC750
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
PR763
PR763
2.2_0603_5%
2.2_0603_5%
PR714
PR714
1 2
0_0402_5%
0_0402_5%
@
@
1 2
PR717
PR717 1_0603_5%
1_0603_5%
PR720
PR720
1_0603_5%
1_0603_5%
12
12
PC715
PC715 1U_0603_10V6K
1U_0603_10V6K
UGATE2
PHASE2
BOOT2
2.2_0603_5%
2.2_0603_5%
LGATE2
PR742
PR742
21K_0402_1%
21K_0402_1%
1 2
BOOT1
2.2_0603_5%
2.2_0603_5%
LGATE1
1 2 12
+5V_ALW
12
PR729
PR729
UGATE1
PHASE1
PR749
PR749
1 2
12
PC742
PC742
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
@
@
4
PQ711
PQ711
4
@
@
12
1 2
PC721
PC721
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
DELL CONFIDENTIAL/PROPRIETARY
2
5
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
PQ707
PQ707
4
213
@
@
PQ702
PQ702
@
@
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
4
+VCC_PWR_SRC
5
213
PC746
PC746
12
12
PR760
PR760
4.7_1206_5%
4.7_1206_5%
+VCC_PWR_SRC
5
213
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
1
12
12
PC747
PC747
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
4
GP1_SW GP1_Vo
3
PC751
PC751
680P_0402_50V7K
680P_0402_50V7K
PR758
PR758
PR761
PR761
10K_0603_1%
10K_0603_1%
1 2
1 2
3.65K_0603_1%
3.65K_0603_1%
@
@
ISEN1G
12
12
PC716
PC716
PC717
PC717
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
12
PC725
PC725
12
ISEN2
680P_0402_50V7K
680P_0402_50V7K
10K_0603_1%
10K_0603_1%
4.7_1206_5%
4.7_1206_5%
VSUM+
3.65K_0603_1%
3.65K_0603_1%
12
12
PC734
PC734
10U_0805_25V6K
10U_0805_25V6K
12
PC745
PC745
12
680P_0402_50V7K
680P_0402_50V7K
ISEN1
10K_0603_1%
10K_0603_1%
VSUM+
3.65K_0603_1%
3.65K_0603_1%
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
PC733
PC733
PR751
PR751
PR731
PR731
10U_0805_25V6K
10U_0805_25V6K
4.7_1206_5%
4.7_1206_5%
12
12
PC752
PC752
PC749
PC749
0.1U_0402_25V6
0.1U_0402_25V6 2200P_0402_25V7K
2200P_0402_25V7K
PL704
PL704
1 2
PC700
PC700
0.1U_0402_25V6
0.1U_0402_25V6
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
PR733
PR733
1 2
PR738
PR738
1 2
VSUM-
12
PC736
PC736
0.1U_0402_25V6
0.1U_0402_25V6
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
PR752
PR752
1 2
PR755
PR755
1 2
VSUM-
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+VCC_GFXCORE
12
PR759
PR759
PR762
PR762
@
@
1 2
1_0402_5%
1_0402_5%
10K_0402_1%
10K_0402_1%
VSUMG-VSUMG+
PL700
PL700
FBMA-L11-453215-121LMA90T_2
FBMA-L11-453215-121LMA90T_2
1 2
12
12
PC753
PC753
2200P_0402_25V7K
2200P_0402_25V7K
PL701
PL701
4 3
P2_SW
PR743
PR743
12
1_0402_5%
1_0402_5%
12
PC754
PC754
2200P_0402_25V7K
2200P_0402_25V7K
PL702
PL702
4 3
P1_SW
PR757
PR757
12
1_0402_5%
1_0402_5%
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
ISEN2G
+VCC_PWR_SRC
+PWR_SRC
1
+VCC_CORE
2
P2_Vo
PR734
PR734
ISEN1
12
10K_0402_1%@
10K_0402_1%@
1
1
+
+
+
+
PC730
PC730
PC731
PC731
2
2
100U_25V_M~D
100U_25V_M~D
100U_25V_M~D
100U_25V_M~D
1
+VCC_CORE
2
P1_Vo
PR753
PR753
ISEN2
12
10K_0402_1%@
10K_0402_1%@
51 59Monday, April 02, 2012
51 59Monday, April 02, 2012
51 59Monday, April 02, 2012
of
of
of
B
B
B
Page 52
A
ISL88731C 11@ BQ24747 22@
+DC_IN_SS
1 1
PD1300@
PD1300@
2 1
ES2AA-13-F
ES2AA-13-F
4
1 2 35
PQ1300
PQ1300 SI7121DN-T1-GE3_POWERPAK8-5
SI7121DN-T1-GE3_POWERPAK8-5
PR1300
PR1300
1 2
0_0402_5%
0_0402_5%
@
@
DC_BLOCK_GC <53>
E2 AC_OK=17.7 Volt
PR1313 TI bq24745 = 316K Intersil ISL88731 = 226K
+SDC_IN
MAX8731A_LDO
PR1313
PR1313
226K_0402_1%~D11@
226K_0402_1%~D11@
PR1317
PR1317
49.9K_0402_1%
49.9K_0402_1%
PC1307
PC1307
0.01U_0402_25V7K
0.01U_0402_25V7K
2 2
Vref TI bq24747 = 3.3V Intersil ISL88731C = 3.2V VDDP TI bq24747 = 6V Intersil ISL88731C = 5.1V
GNDA_CHG
CHARGER_SMBCLK<40> CHARGER_SMBDAT<40>
1 2
12
+5V_ALW
GNDA_CHG
ACAV_IN<22,40,53>
12
PC1316
PC1316 .1U_0402_16V7K
.1U_0402_16V7K
MAX8731_IINP<22>
12
MAX8731_REF
12
10K_0402_1%11@
10K_0402_1%11@
PR1310
PR1310
10K_0402_5%22@
10K_0402_5%22@
PR1311
PR1311
12
PR1316
PR1316
15.8K_0402_1%11@
15.8K_0402_1%11@
12
PR1329
PR1329
8.45K_0402_1%@
8.45K_0402_1%@
+CHGR_DC_IN<53>
12
PR1320
PR1320
1 2
0_0402_5%
0_0402_5%
@
@
1 2
PR1323
PR1323 200K_0402_5%
200K_0402_5%
12
22@
22@
PR1325
PR1325
11@
11@
2.2K_0402_1%
2.2K_0402_1% PC1321
PC1321
120P_0402_50VNPO~D
120P_0402_50VNPO~D
1 2
12
12
22@
22@
PC1323
PC1323
PC1324
PC1324
220P_0402_50V7K~D
220P_0402_50V7K~D
11@
11@
0.01U_0402_25V7K
0.01U_0402_25V7K
Maximum charging current is 7.2A
3 3
4 4
DYN_TUR_CURRENT_SET#
65W
90W
DYN_TUR_CURRNT_SET#<40>
High
Low
PQ1310
PQ1310
2N7002KW 1N SOT323-3
2N7002KW 1N SOT323-3
+3.3V_ALW2
12
PR1341
PR1341 150K_0402_1%~D
150K_0402_1%~D
12
12
PR1350
PR1350
PR1349
PR1349
66.5K_0402_1%
66.5K_0402_1%
150K_0402_1%~D
150K_0402_1%~D
13
D
D
2
G
G
S
S
12
PC1341
PC1341
100P_0402_50V8J
100P_0402_50V8J
MAX8731_IINP
PR1343
PR1343
20K_0402_1%
20K_0402_1%
1 2
+5V_ALW
12
PC1340
PC1340
220P_0402_50V7K~D
220P_0402_50V7K~D
Adapter Protection Circuit for Turbo Mode
CSS_GC<53>
+DOCK_PWR_BAR
+DC_IN_SS
PC1320
PC1320
22@
22@
12
PC1325
PC1325
PC1326
PC1326
0.01U_0402_25V7K
0.01U_0402_25V7K
@
@
12
PC1336
PC1336
100P_0402_50V8J@
100P_0402_50V8J@
B
PD1302
PD1302
2
3
BAT54CW_SOT323~D
BAT54CW_SOT323~D
1 2
PR1309
PR1309 1_0805_5%~D@
1_0805_5%~D@
GNDA_CHG
12
PC1318
PC1318
2200P_0402_25V7K
2200P_0402_25V7K
22@
22@
1 2
56P_0402_50V8~D
22@
56P_0402_50V8~D
22@
12
11@
11@
0.01U_0402_25V7K
0.01U_0402_25V7K
12
PC1337
PC1337
0.01U_0402_25V7K@
0.01U_0402_25V7K@
3
+
2
-
+SDC_IN
PR1302
PR1302
1 2
@
@
1
PC1306
PC1306
0.1U_0805_50V7K
0.1U_0805_50V7K
MAX8731_REF
1 2
PR1327
PR1327 10K_0402_5%
10K_0402_5% 22@
22@
12
PC1327
PC1327 1U_0603_10V6K
1U_0603_10V6K 22@
22@
PR1340
PR1340
1.8M_0402_1%
1.8M_0402_1% 1 2
8
PU1304A
PU1304A
P
1
O
G
LM393DR_SO8~D
LM393DR_SO8~D
4
0_0402_5%
0_0402_5%
NTR4502PT1G_SOT23-3~D
NTR4502PT1G_SOT23-3~D
0.1U_0402_25V6
0.1U_0402_25V6
GNDA_CHG
12
MAX8731_IINP
1 2
PR1324
PR1324
7.5K_0402_5%
7.5K_0402_5% 22@
22@
12
PC1328
PC1328
GNDA_CHG
12
PC1300
PC1300
PC1303
PC1303
1 2
+DCIN
.1U_0402_16V7K@
.1U_0402_16V7K@
+5V_ALW
PR1334
PR1334
0.1U_0402_25V6@
0.1U_0402_25V6@
1 2
13
2
G
G
PQ1302
PQ1302
CSSP_1
12 11@
11@
PR1304
10_0402_5%
PR1304
10_0402_5%
0.047U_0402_25V7K
0.047U_0402_25V7K 11@
11@
PU1300
PU1300
22
DCIN
2
ACIN
13
ACOK
11
VDDSMB
10
SCL
9
SDA
14
NC
8
VICM
6
FBO
5
EAI
4
EAO
3
VREF
7
CE
12
GND
29
TP
ISL88731C_QFN28_5X5~D
ISL88731C_QFN28_5X5~D 11@
11@
221K_0402_1%~D
221K_0402_1%~D
1 2
61
2
PR1301
PR1301
0.01_1206_1%~D
0.01_1206_1%~D 4 3
D
D
S
S
PR1303
PR1303
10K_0402_5%
10K_0402_5%
PC1304
PC1304
1 2
28
1
CSSP
ICREF
PR1339
PR1339 0_0402_5%
0_0402_5% @
@
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PQ1307A
PQ1307A
1 2
13
D
D
2
G
G
S
S
CSSN_1
12
12
PR1305
PR1305
PC1305
PC1305
0.1U_0402_25V6
0.1U_0402_25V6 11@
11@
27
ICOUT
CSSN
BOOT
VDDP
UGATE PHASE
LGATE
PGND CSOP
CSON
VFB
NC
GNDA_CHG
H_PROCHOT# <7,40,51>
3
4
+PWR_SRC
PQ1301
PQ1301 NTR4502PT1G_SOT23-3~D
NTR4502PT1G_SOT23-3~D
AP2623GY-HF 2P SOT26-6
AP2623GY-HF 2P SOT26-6
S
S
G
G
12
11@
11@
10_0402_5%
10_0402_5%
PR1306
PR1306
100K_0402_1%
100K_0402_1%
1 2
GNDA_CHG
ICOUT
26
PR1318
PR1318
2.2_0603_1%
2.2_0603_1%
BOOT
25
1 2
PC1310
PC1310
MAX8731A_LDO
21
24 23
20
19 18
17 15 16
12
VFB
5
PR1322
PR1322
PC1317
PC1317 220P_0402_50V7K~D@
220P_0402_50V7K~D@
1 2
1 2
PAD-OPEN1x1m@
PAD-OPEN1x1m@
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PQ1307B
PQ1307B
12
0_0603_5%11@
0_0603_5%11@
PR1328
PR1328 100_0402_5%
100_0402_5%
PJP801
PJP801
C
1UH_PCMB053T-1R0MS_7A_20%
1UH_PCMB053T-1R0MS_7A_20%
PQ1303A
PQ1303A
D
D
65
1
AP2623GY-HF 2P SOT26-6
AP2623GY-HF 2P SOT26-6
S
S
12
PR1307
PR1307
100K_0402_1%
100K_0402_1%
BOOT_D
12
12
PD1301
PD1301
1PS76SB21 SOD323-2
1PS76SB21 SOD323-2
0.1U_0402_25V6
0.1U_0402_25V6 22@
22@
CHG_UGATE +VCHGR_B
CHG_LGATE
+VCHGR
12
PC1338
PC1338
100P_0402_50V8J
100P_0402_50V8J
74AHC1G08GW SOT353 AND
74AHC1G08GW SOT353 AND
PL1300
PL1300
PJP800
PJP800
1 2
PAD-OPEN 4x4m@
PAD-OPEN 4x4m@
PQ1303B
PQ1303B
G
G
3
PR1319
PR1319
4.7_0603_5%
4.7_0603_5% 11@
11@
1 2
1 2
PC1311
PC1311 1U_0603_10V6K
1U_0603_10V6K
MAX8731_REF
+DC_IN
12
PR1335
PR1335
232K_0402_1%~D
232K_0402_1%~D
12
PR1346
PR1346
22.6K_0402_1%
22.6K_0402_1%
12
D
D
42
PR1312
PR1312
1 2
@
@
GNDA_CHG
PR1336
PR1336
47K_0402_1%~D
47K_0402_1%~D
PR1347
PR1347
42.2K_0402_1%~D
42.2K_0402_1%~D
+3.3V_ALW
PU1302
PU1302
4
O
12
PC1301
PC1301
47P_0402_50V8J
47P_0402_50V8J
DOCK_DCIN_IS+ <38>
DOCK_DCIN_IS- <38>
DK_CSS_GC <53>
0_0402_5%
0_0402_5%
12
PC1309
PC1309 1U_0603_10V6K
1U_0603_10V6K 11@
11@
5
4
12
PC1319
3300P_0402_50V7K@
PC1319
3300P_0402_50V7K@
3 5
241
12
12
12
PC1339
PC1339
100P_0402_50V8J
100P_0402_50V8J
PC1342
PC1342
0.1U_0402_25V6
0.1U_0402_25V6 12
5
1
P
B
2
A
G
To preset system to throtlle
3
switching from AC to DC
CHAGER_SRC
12
PC1302
PC1302
0.1U_0402_25V6
0.1U_0402_25V6
@
@
PQ1304
PQ1304
MDU1516URH 1N POWERDFN56-8
MDU1516URH 1N POWERDFN56-8
123
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
12
PC1322
PC1322
680P_0402_50V7K
680P_0402_50V7K
PR1332
PR1332
4.7_1206_5%
4.7_1206_5%
PQ1305
PQ1305
FDMC8878_POWER33-8-5
FDMC8878_POWER33-8-5
PR1333
PR1333
1M_0402_1%~D
1M_0402_1%~D
1 2
+5V_ALW
8
5
+
6
-
4
PROCHOT_GATE <39>
1 2
GNDA_CHG
PU1304B
PU1304B
P
7
O
G
LM393DR_SO8~D
LM393DR_SO8~D
PR1351
PR1351
100K_0402_5%
100K_0402_5%
PC1333
PC1333
0.1U_0402_25V6
0.1U_0402_25V6 22@
22@
+3.3V_ALW
PL1301
PL1301
1 2
12
13
D
D
2
G
G
2N7002KW 1N SOT323-3
2N7002KW 1N SOT323-3
S
S
PQ1306
PQ1306
12
0.01_1206_1%~D
0.01_1206_1%~D
+VCHGR_L
12
4 3
12
PR1330
PR1330
11@
11@
10_0402_5%
10_0402_5%
PC1334
PC1334
0.22U_0402_16V7K
0.22U_0402_16V7K 11@
11@
MAX8731_REF
12
10K_0402_1%
10K_0402_1%
PR1338
PR1338
12
PR1348
PR1348
@
@
41.2K_0402_1%~D
41.2K_0402_1%~D
ACAV_IN <22,40,53>
12
PC1313
PC1313
0.1U_0402_25V6
0.1U_0402_25V6
PC1312
PC1312
2200P_0402_25V7K
2200P_0402_25V7K
PR1326
PR1326
1 2
PR1331
PR1331
0_0402_5%
0_0402_5%
@
@
1 2
PR1342
PR1342
1 2
@
@
D
PC1314
PC1314
10U_0805_25V6K
10U_0805_25V6K
PC1329
PC1329
1 2
1 2
PC1335
PC1335
0.1U_0402_25V6@
0.1U_0402_25V6@
0_0402_5%
0_0402_5%
12
PC1315
PC1315
10U_0805_25V6K
10U_0805_25V6K
+VCHGR
12
PC1330
PC1330
0.1U_0402_25V6
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
GNDA_CHG
ACAV_IN_NB <39,40,53>
12
12
12
PC1331
PC1331
10U_0805_25V6K
10U_0805_25V6K
12
PC1332
PC1332
10U_0805_25V6K
10U_0805_25V6K
PU1300
BQ24747
BQ24747
22@PU1300
22@
PR1313
22@PR1313
22@
PR1325
22@PR1325
22@
PC1334
316k_0402_1%
316k_0402_1%
4.7k_0402_1%
4.7k_0402_1%
A
0.1U_0402_25V6
0.1U_0402_25V6
PR1330
22@PC1334
22@
0_0402_5%
0_0402_5%
PR1304
22@PR1304
0_0402_5%
0_0402_5%
22@
PR1305
0_0402_5%
0_0402_5%
22@PR1305
22@
PC1304
22@PC1304
22@
0.1U_0402_25V6
0.1U_0402_25V6
B
PR1322
22@PR1322
22@
1 +-5% 0603
1 +-5% 0603
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
22@PR1330
22@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
D
52 59Monday, April 02, 2012
52 59Monday, April 02, 2012
52 59Monday, April 02, 2012
of
of
of
B
B
B
Page 53
5
D D
PQ44
PQ44 SI7121DN-T1-GE3_POWERPAK8-5
SI7121DN-T1-GE3_POWERPAK8-5
+VCHGR
C C
+DOCK_PWR_BAR
+DC_IN_SS
1 2
1 2
1 2
PR217 47_0805_5%~DPR217 47_0805_5%~D
0.1U_0603_50V4Z
0.1U_0603_50V4Z
SOFT_START_GC<44>
PR221
PR221
1 2
PR224
PR224
0_0402_5%@
0_0402_5%@
DC_BLOCK_GC<52>
PR227
PR227
1 2
@
@
PR228
PR228
1 2
0_0402_5%
0_0402_5%
@
@
+DC_IN
PR219 100K_0402_5%PR219 100K_0402_5%
+3.3V_ALW2
ACAV_DOCK_SRC#<38>
+SDC_IN
B B
ACAV_IN<22,40,52>
+3.3V_ALW2
@
@
0_0402_5%
0_0402_5%
4
1 2
+CHGR_DC_IN<52>
CD3301_DCIN
PC192
PC192
ACAVDK_SRC
0_0402_5%
0_0402_5%
PC193
PC193
1 2 35
PR212
PR212
1 2
PR214
@PR214
@
1 2
PR216
@PR216
@
12
ERC1
12
0.1U_0402_25V6
0.1U_0402_25V6
@
@
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
ACAVIN P33ALW2
1 2 3 4 5 6 7 8 9
37
DK_CSS_GC<52>
PU11
PU11
DC_IN SS_GC ERC1 ACAVDK_SRC GND SDC_IN DC_BLK_GC ACAV_IN P33ALW2
TP
CSS_GC<52>
4
BLK_MOSFET_GC
DK_PWR_BAR
3301_DC_IN_SS
ERC3
12
PC194
PC194
0.047U_0402_25V7K
0.047U_0402_25V7K
+DOCK_PWR_BAR
PBATT+
35
34
33
32
31
36
NC
GND
DC_IN_SS
DK_PWRBAR
CHARGERVR_DCIN
CSS_GC10DK_CSS_GC11ERC312ERC213GND14PWR_SRC
15
ERC2
12
PC195
PC195
3301_PWRSRC
0.1U_0402_25V6
0.1U_0402_25V6
@
@
PR210
PR210
1 2
@
@
PR213
PR213 0_0402_5%
0_0402_5% @
@
1 2
DSCHRG_MOSFET_GC
30
28
29
NC
PBatt+
P50ALW
PBATT_OFF
BLK_MOSFET_GC
DK_AC_OFF_EN
ACAV_IN_NB
GND
DSCHRG_MOSFET_GC DK_AC_OFF_EN
SL_BAT_PRES#
BLKNG_MOSFET_GC
NBDK_DCINSS
SS_DCBLK_GC
EN_DK_PWRBAR17P33ALW
CD3301BRHHR QFN 36P CONTROL LOGIC
CD3301BRHHR QFN 36P CONTROL LOGIC
16
18
P33ALW
EN_DK_PWRBAR
STSTART_DCBLOCK_GC
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
0_0402_5%
0_0402_5%
12
27 26 25 24 23 22 21 20 19
PR231
PR231
1 2
1 2
PR235
PR235
1 2
@
@
PQ45
PQ45
1
S
2
S
3
S
4
G
PC190
PC190
1U_0603_25V6
1U_0603_25V6
CD_PBATT_OFF
DK_AC_OFF 3301_ACAV_IN_NB
0_0402_5%
0_0402_5%
@
@ PR233
PR233
0_0402_5%
0_0402_5%
@
@
0_0402_5%
0_0402_5%
8
D
7
D
6
D
5
D
DK_AC_OFF_ENCD3301_SDC_IN SL_BAT_PRES#
+3.3V_ALW
1 2
1M_0402_5%~D
1M_0402_5%~D
@
@
+PWR_SRC
3
12
PR207
PR207 330K_0402_5%
330K_0402_5%
PBATT_IN_SS
PR218
@PR218
@
1 2
1 2
EN_DOCK_PWR_BAR <39>
PR234
PR234
0_0402_5%
0_0402_5%
PR220
PR220
0_0402_5%
0_0402_5%
@
@
PR222
PR222
1 2
@
@
BLKNG_MOSFET_GC
+5V_ALW
0_0402_5%
0_0402_5%
PR229
PR229
1 2
@
@
PR230
PR230
1 2
@
@
0_0402_5%
0_0402_5%
SLICE_BAT_ON <39>
DOCK_AC_OFF <38,39>
PR225
PR225
1 2
0_0402_5%
0_0402_5%
@
@
PR226
PR226
1 2
0_0402_5%
0_0402_5%
SLICE_BAT_PRES# <38,39,44>
+NBDOCK_DC_IN_SS
ACAV_IN_NB <39,40,52>
0_0402_5%
0_0402_5%
@
@
S2AA-13-F SMA
S2AA-13-F SMA
PD17
PD17
2 1
PQ43
PQ43
1
8
S
D
2
7
S
D
3
6
S
D
4
5
G
D
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
1 2
12
PR211
PR211
1K_1206_5%
1K_1206_5%
12
PC191
PC191
1U_0603_25V6
1U_0603_25V6
GPIOInputfromNB EmbeddedController
DOCK_AC_OFF_EC <39>
12
PR209
PR209 330K_0402_5%
330K_0402_5%
PC187
PC187
0.47U_0805_25V7K~D
0.47U_0805_25V7K~D 1 2
1 2
1M_0402_5%~D
1M_0402_5%~D
PR223
PR223
2
PR208
PR208
@
@
0_0402_5%
0_0402_5%
STSTART_DCBLOCK_GC
PD18
PD18
2 3
PDS5100H-13_POWERDI5-3~D
PDS5100H-13_POWERDI5-3~D PQ46
PQ46
8
D
7
D
6
D
5
D
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
1
1
1
S
2
S
3
S
4
G
PR215
PR215 0_0402_5%
0_0402_5% @
@
1 2
12
12
PC188
PC188
2200P_0402_25V7K
2200P_0402_25V7K
PC189
PC189
0.1U_0402_25V6
0.1U_0402_25V6
12
PC196
PC196
12
PC197
PC197
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
12
PC198
PC198
12
0.1U_0402_25V6
0.1U_0402_25V6
PC199
PC199
0.1U_0402_25V6
0.1U_0402_25V6
12
PC200
PC200
0.1U_0402_25V6
0.1U_0402_25V6
+PWR_SRC
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
1
53 59Monday, April 02, 2012
53 59Monday, April 02, 2012
53 59Monday, April 02, 2012
B
B
B
of
of
of
Page 54
+VCC_CORE
5
4
3
2
1
D D
1
PC1153
PC1153 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
PC1170
PC1170 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
PC1163
PC1163 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
PC1171
PC1171 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
PC1164
PC1164 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
PC1108
PC1108 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
PC1168
PC1168 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
PC1109
PC1109 10U_0805_4VAM~D
10U_0805_4VAM~D
2
+VCC_CORE
1
PC1119
PC1119 22U_0805_6.3VAM
22U_0805_6.3VAM
2
C C
1
PC1143
PC1143 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1102
PC1102 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1107
PC1107 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1120
PC1120 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1144
PC1144 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1103
PC1103 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1121
PC1121 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1145
PC1145 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1104
PC1104 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1122
PC1122 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1146
PC1146 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1105
PC1105 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1169
PC1169 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
PC1110
PC1110 10U_0805_4VAM~D
10U_0805_4VAM~D
2
1
PC1123
PC1123 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1101
PC1101 22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
PC1106
PC1106 22U_0805_6.3VAM
22U_0805_6.3VAM
2
+VCC_GFXCORE
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1112
PC1112
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1136
PC1136
1
2
330U 2V M D2E LESR6M
330U 2V M D2E LESR6M
1
+
+
2
22U_0805_6.3V6M
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
2
PC1158
PC1158
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1111
PC1111
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1135
PC1135
1
2
330U 2V M D2E LESR6M
330U 2V M D2E LESR6M
1
PC1157
PC1157
+
+
2
PC1113
PC1113
PC1137
PC1137
@
@
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1114
PC1114
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1138
PC1138
1
2
12
.1U_0402_16V7K
.1U_0402_16V7K
PC1500
PC1500
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1115
PC1115
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1139
PC1139
1
2
12
.1U_0402_16V7K
.1U_0402_16V7K
PC1501
PC1501
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1116
PC1116
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1140
PC1140
1
2
12
.1U_0402_16V7K
.1U_0402_16V7K
PC1502
PC1502
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1117
PC1117
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1141
PC1141
1
2
12
.1U_0402_16V7K
.1U_0402_16V7K
PC1503
PC1503
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1118
PC1118
1
2
12
PC1504
PC1504
.1U_0402_16V7K
.1U_0402_16V7K
22U_0805_6.3VAM
22U_0805_6.3VAM
1
PC1124
PC1124
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
PC1125
PC1125
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
PC1126
PC1126
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
@
@
PC1147
PC1147
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
PC1127
PC1127
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
@
@
PC1148
PC1148
2
+1.05V_RUN_VTT
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
PC1128
PC1128
2
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
PC1149
PC1149
2
2
+1.05V_RUN_VTT
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
PC1130
PC1130
PC1129
PC1129
2
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
PC1151
PC1151
PC1150
PC1150
2
2
1
+
+
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
PC1131
PC1131
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
@
@
PC1152
PC1152
2
330U 2V M D2E LESR6M
330U 2V M D2E LESR6M
330U 2V M D2E LESR6M
330U 2V M D2E LESR6M
1
PC1165
PC1165
+
+
2
PC1132
PC1132
PC1154
PC1154
PC1166
PC1166
1
2
22U_0805_6.3VAM
22U_0805_6.3VAM
PC1134
PC1134
+VCC_CORE
B B
1
+
+
2 3
PC1187
PC1187
330U 2V M D2E LESR6M
330U 2V M D2E LESR6M
1
+
+
PC1173
PC1173
2 3
330U 2V M D2E LESR6M
330U 2V M D2E LESR6M
1
+
+
PC1174
PC1174
2 3
330U 2V M D2E LESR6M
330U 2V M D2E LESR6M
1
+
+
PC1175
PC1175
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
2 3
@
@
12
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
PC1402
PC1402
12
5
.1U_0402_16V7K
.1U_0402_16V7K
PC1403
PC1403
12
12
.1U_0402_16V7K
.1U_0402_16V7K
PC1401
PC1401
PC1400
PC1400
A A
12
1
2 3
.1U_0402_16V7K
.1U_0402_16V7K
PC1404
PC1404
+
+
PC1176
PC1176 330U 2V M D2E LESR6M
330U 2V M D2E LESR6M
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
54 59Monday, April 02, 2012
54 59Monday, April 02, 2012
54 59Monday, April 02, 2012
1
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B
of
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of
Page 55
5
4
3
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1
Version Change List ( P. I. R. List )
Page 1
Request
Item Issue DescriptionDate
1 44 8/18 ME design change. PJPDC1 change from 7pin to 5pin X01
D D
2
3
4
45 Main and 2nd IC common setting. De-pop PD100,PR113,PR111
45 46
51
5 53 8/18 Dell Change net name PBATT to SLICE_BAT_ON.
C C
7
45 52
8 54 8/30 Compal Reserve cap for improve transient response. Reserve PC1176
53 8/30 Compal For reduce EMI radiation.
Power
Power
Power
Power
Power
Power
Power
Power
Power
8/18
8/18
8/18
8/30 Compal Pop PL100, PL1300 X01
Owner
Compal
Compal
Prevent Jitter issue.Compal
Prevent output voltage glitch when power up.Compal
For reduce EMI radiation.
Add PC120,PC121,PC215 parallel with PR101,PR102,PR207
PU700 VCCP and VDD change form +5V_RUN to +5V_ALW
Change net name same as E4.
Add PR90, PR91
Add PC196, PC197, PC198, PC199, PC2009
Solution Description Rev.Page# Title
X01
X01
X01
X01
X016 50 8/18 Compal Reserve 0 ohm resistance for test.
X01
X01
Change PQ4, PC1153, PC1163, PC1164, PC1168,
10
B B
54 Power 8/31 Compal
48 Power 9/1 Dell For support TL+TM X0111
Change to green P/N.
49 Power 9/112 Compal For fix 1.05V_RUN_VTT on 1.05V
PC1169, PC1170, PC1171, PC1108, PC1109, PC1110, PC1187, PC1173, PC1174, PC1175, PC1157, PC1158, PC179, PQ1310, PQ1306 to green P/N
Change 6@ to pop for PC400~PC406, PC408, PL400, PQ400, PQ405, PR400~PR407, PU400. 5@ to @ for PR408.
Depop PR509, PR511, PQ502. Change PR507 to 4.99k.
X01
X01
Power51 9/5 Compal Follow EMI requirement. Change PL700 to SM01000DJ0013 X01
14
45 46
Power 9/6 Compal Change to green P/N.
Change PC107, PC263, PC280, PC405, PC505 to HF P/N.
X01
15 52 Power 9/13 Compal For reduce EMI radiation. Pop PC1400~1404, PC1500~PC1504. X01
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
55 59Monday, April 02, 2012
55 59Monday, April 02, 2012
55 59Monday, April 02, 2012
1
of
of
of
Page 56
5
4
3
2
1
Request Owner
D D
17 51 Power 9/14 Adjust AXG transient ,
Compal Change PR703 to 130K ohm X01
loadline and OCP
loadline and OCP
18 52 Power 11/17 Compal Shortage issue Change PQ1303 from NTGD416 to AP2623 X02 19 52 Power 11/17 Compal Need ESD protected Change PQ1306, PQ1310 from SB57002040L
Power16 51 9/14 Adjust CPU transient ,
C C
20 53 Power 11/17 Compal IC version upgrade Change PU11 from CD3301 to CD3301A X02
21 45 Power 11/17 Compal Shortage issue Change PC110, PC111 from SGA00004E00
22 45 Power 11/17 Compal EMI request Pop PC1138,PC1139,PC1149,PC1150 X02
23 44 Power 11/21 Compal Erp lot6 tier2 Fail issue PWR_SRC_S control signal change from +3.3V_ALW
Add PC740 to 0.1uF X01Compal Change PR750 to 365 ohm Change PR741 to 130K ohm Change PC744 to 3300pF,PR754 to 649ohm.
Change PC709 to 82nF Change PR702 to 2.74K ohm Change PR711 to 383 ohm
to SB000009Q80
to SGA00002N80
to PCH_ALW_ON
Solution Description Rev.Page# TitleItem Issue DescriptionDate
X02
X02
X02
24 44 Power 12/05 Compal Prevent COS. Change PD8 from SCS0340L01L to SCS00005C00 X02
Change PD1301 from SCS00003M0L to SCS00004O0L
B B
25 Power Change PC1176,PC1174,PC1173,PC1187,PC1157,PC1158,
Prevent COS.54 Compal12/13
X02
PC1165,PC1166 to SGA00002U1L
26 50 Power 12/13 Compal Improve efficiency change PR86 to 22K_0402_5% X02
27 Power47 12/16 Compal Prevent COS. Change PL301 from SH00000MN00 to SH00000MW00 28 44 Power 3/13 Compal Follow E4 remove useless Cap unpop PC17 29 51 Power 3/13 Compal Multi source control , change to
X7633331L51
A A
unpop PQ708,PQ711,PQ710,PQ700,PQ702,PQ703,PQ704, PQ704,PQ707
X02 X03 X03
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
56 59Monday, April 02, 2012
56 59Monday, April 02, 2012
56 59Monday, April 02, 2012
1
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of
of
Page 57
5
4
3
2
1
Request Owner
Solution Description Rev.Page# TitleItem Issue DescriptionDate
1 11 HW COMPAL INTEL review feedback Add CC178,CC179,CC149,CC150 X01
2HW
D D
14,39
3
4
5
22
42
29
HW
HW COMPAL
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
COMPAL
COMPAL
COMPALHW
SMSC request to delete LPC_LDRQ0#
Removed reserve circuit for EMC4022
Load SW sources output rising time mismatch and COS. cost concern
Codec is change to 92HD93
Leave LDRQ0# no connection on both of 5048 and PCH side Removed R743
Removed R405,C280,R392,R394
Change back to E3 +3.3V/5V_RUN discrete solution Removed U78 and add Q55,Q61 circuit
Pop R162~R166 and de-pop U73,R1540
X01
X01
X01
X01
Pop option for 92HD93/ALC290=>R1646/C1164; R1644/R1643; C965/R1642; Q107/R171
6
29
HW
08/25/2011
COMPAL
Reserve co-lay with ALC290
Reserve for ALC290 only: C1204, C1205, R1647, C1165, R1648
X01 Reserve for 92HD93 only: R1645, C963 Add R174 depop and R175 pop
C C
20
27,28
9
10
11
12 HW COMPAL CRT SW 2nd source TI, TS3V713 pin29 is VDD Connect U18 pin29 to +3.3V_RUN
11
40
34
23
HW COMPAL Follow INTEL PDDG 0.8 De-pop RC140
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
Vgs less than cut-in voltage in battery mode Add control circuit QH6,R279,CH107 for +5V_ALW_PCH X01COMPALHW7
Vgs of 5V MOS maybe large than max rating Add R517, R518COMPALHW8
X01
X01
Change board ID to X01 Change R875 to 130KohmsCOMPALHW
PCH GPIO52 need 8.2~10K pull up +3.3VS Change R695 from 100K to 10KohmsCOMPALHW
X01
X01
X01
13
14 HW
B B
15 HW COMPAL DPX_CA_DET voltage too low through dongle Change U21 and U24 to SA000055G0L
16 HW COMPAL Request from INTEL review feedback Pop RH332 for PCH_GPIO3 and RH180 for GPIO27
17
18
19 HW COMPAL
16
41
26
17,18
42
43
40
11
21
A A
17 INTEL review feedback Change RH331,RH272 to 10K ohm08/25/2011
HW COMPAL +1.05V_M turn off before APWROK de-assert Add UH5,CH108 6@ circuit reserve for VPRO
08/25/2011
08/25/2011
COMPAL Reset IC threshold voltage issue Change U4 to RT9801A (threshold adjustable)
Add R1649~R1654;Reserve R1655 and pop R1623
08/25/2011
08/25/2011
HW COMPAL Material changed Power team request Q59 change to SB00000L80L X01
08/25/2011
08/25/2011
White light LED brightness is abnormal Change R934, R938, R939, R949, R958, R957 and R959
to 1.2 Kohms
08/25/2011
08/25/2011
S3 can't resume issue Control 1.5V_VDDQ by EC. Pop RC79 and de-pop RC82 X01COMPALHW20
Reserve C1208 for ESD backup planReserve C1208 for ESD backup plan X01
HW COMPAL X01
X01
X01
X01
X01
X01COMPALHW
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903 4019FT
4019FT
4019FT
57 61Monday, April 02, 2012
57 61Monday, April 02, 2012
57 61Monday, April 02, 2012
1
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of
of
Page 58
5
4
3
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Request Owner
22 HW COMPAL X01
23 HW COMPAL
D D
24
26 HW
27 HW X01
28
34
14 ROM size changed Change U52 to 8M and R936,R895,R897,R900 to 6@
11 Material package changed Change CC161~CC166 from 0402 to 0603
42
HW COMPAL
HW25
31
39
HW
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
08/25/2011
COMPAL
COMPAL
COMPAL
08/25/2011 COMPAL
29 40 08/26/2011 COMPAL Backdrive issueHW Depop R1169,R1197,R118 due to it has internal pull high. X01
30 37 HW 08/29/2011 COMPAL To avoid power short to GND NC Pin 15 for JAUD1 X01
31 37 HW 08/30/2011 COMPAL Follow connector list Swap JAUD1 pin. X01
C C
1232 Change QD1, QD2 part number to SB501380050 (for HF)Change part to HF partCOMPAL08/30/2011HW X01
15 Change RH311 and RH314 to 10 ohmFor clock EACOMPAL09/01/2011HW X0133
34 43 HW 09/01/2011 COMPAL ME drawing update Add H19 X01
14,16 19,22
35
HW 09/01/2011 COMPAL BOM option change for TL 30,40 42
B B
09/02/2012HW2536
COMPAL Due to EMI HDMI test Fail, add EMI solution
WWAN card request JMINI1 pin 1 connect to PCIE_WAKE#
BOM changed Change Q60 to 6@
Correct Lan power net name Change LL1,LL4,LL6~LL8 pin 2 net from +3.3V* to +1.2V*
GPIO signal name changed same as E/P Change PBATT_OFF to SLICE_BAT_ON
Change U53,R936,R895,R897,R900,RH350,UH5,CH108,RH116 RH202,R385,R426,R402,Q63,R931,Q58,Q60 R916,RL47,R877 to pop Change RH359,RH321,RH119,RH204,R430,R386,R408 ,R206,RL46,R871 to depop
Chamge resistor to Inductor Change R451, R459, R462, R466, R468, R469, R470, R471 to 9nH L99, L100, L101, L102, L103, L104, L105, L106.
Add C1209, C1210, C1211, C1212, C1213, C1214, C1215 and C1216 between Inductor and HDMI connector
Solution Description Rev.Page# TitleItem Issue DescriptionDate
X01
X01
X01
X01
X0134 Material package changed Changed C615 to SF000002000
X01
X01
X01
37 37 HW 09/05/2011 COMPAL ME connector list change Change JAU1 to 50271-0020N-001 X01
HW3738 Add L107 & R1656,R1657EMI issueCOMPAL09/06/2011 X01
39 36 HW Change C412~C415 to 0.1uF for USB3.0 signal09/08/2011 COMPAL Follow Intel design guide X01
40 7 HW 09/08/2011 COMPAL Reserve CC1141~CC144 for ESDFollow ESD recommand.
X01
Change CH2,CH3 to 18pF
41 14,15,40 HW 09/08/2011 COMPAL Crystal EA result
A A
Change C741,C743 to 39pF Change CH18,CH19 to 10pF
X01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
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PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
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Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
58 61Monday, April 02, 2012
58 61Monday, April 02, 2012
58 61Monday, April 02, 2012
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Request Owner
29 HW 09/13/2011 X0143 COMPAL Follow IDT recommand Swap R169~R172,C973~C976 connection
Solution Description Rev.Page# TitleItem Issue DescriptionDate
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42 COMPAL09/13/2011HW
Change Q55,Q61 part for open soldering issue.
X01Change Q55,Q61 from DMN3030LSS-13 to AO4478L44
40 HW 10/13/2011 COMPAL Change board ID to X02 X0245 Change R875 to 62Kohm
4246 HW 10/13/2011 COMPAL Rated Vgs of Q61 is 25V X02De-pop R1627
47 39 HW 10/13/2011 COMPAL SMSC change 5048 pin A23 to GPIOI0 Re-link ECE 5048 symbol X02
COMPAL10/13/2011HW4048 Reserve R1658 and R1659 100Kohms to GND for I2S disabledSMSC review feedback X02
Update U4 symbol and add R1629 for backup of inrush
49
41 HW 10/13/2011 COMPAL Change reset IC to RT9818A-44GU3
prevention. Change RSMRST# pull up with 100Koms. Pop R1655 and de-pop
X02
R1623.Delete R1649~R1654
C C
50
51
39 HW 10/13/2011 COMPAL
29 HW 10/13/2011 COMPAL 15" UMA speaker no sound issue
When suspend/resume cycles, wireless SW GPIO IRQs keeps giving
Change pull up rail to +3.3V_ALW for WIRELESS_ON#/OFF X02
Pop snubber on speaker trace with C: 2200pF and R: 3.3ohms. Change bead rated current from 200mA to 2A.
X02
29 HW 10/13/2011 COMPAL EMI request52 Pop C981,C982,C983,C985,C986,C987 X02
27 HW 10/13/2011 COMPAL53 Depop HDD control power circuit for cost down.Depop R1624,Q28,R500,R499,R617,C393 X02
3054 HW 10/18/2011 COMPAL Crystal EA result Change YL1 to 3G025000FA1H, CL5,CL6 to 12pF.RL22 to 200 ohm. X02
COMPALAll X02Change 0 ohm to R-short.For cost saving.HW55 10/18/2011
B B
56 42 HW 10/26/2011 COMPAL 1V leakage on 3.3V_RUN during system boot Pop Q69 and R929 X02
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43
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42
Inrush current with Smart Card detect fail issue
HW 10/27/2011 COMPAL X02
HW
10/27/2011 COMPAL X02
HW 11/01/2011 COMPAL X02
LED Conn PIN definition change JLED1 PIN define change
Remove 2pin connector for Audio performance Remove JAG1 2 pin connector.
Change MOSFET to wihtout Schottky Diode for +1.5V_RUN leakage issue
change C763 and C766 to 2200p57 42 HW 10/26/2011 COMPAL X02
change QC3, Q59 as AO4304L from AO4728L
14 RTC issue change CH2, CH3 to 15pF61 HW 11/15/2011 COMPAL X02
14 S5 power consumption over spec. depop RH288HW 11/15/2011 COMPAL62 X02
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
59 61Monday, April 02, 2012
59 61Monday, April 02, 2012
59 61Monday, April 02, 2012
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Request Owner
34 HW 11/29/2011 X0263 COMPAL S3 had leakage in +3/5V_RUN
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Solution Description Rev.Page# TitleItem Issue DescriptionDate
De-pop R725, remove R695 and add +3.3V_RUN pull high at PCH side(RH361)
64 11/29/2011 X02
D D
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32 COMPALHW TPM is changed to AT97SC3204-X2A18-AB
11/29/2011 X0232 COMPALHW +3.3V_RUN Giltch when AC plugin
14~21 COMPALHW Change PCH to C1 version Change UH4 to SA00005AG1L(HM77 for non vpro)66
11/29/2011 X02
U39(TPM) is changed to SA00004WQ10 (AT97SC3204-X2A18-AB) for WIN8 support
Add D87, R1662 and R1663 (pull high to +3.3V_RUN_TPM) for HW solution backup
RC72 from 100K to 330K; RC143 form 330K to 1M; CC136 form 0.1u to 0.022u
67 11/29/2011HW COMPAL
Change RC value at Gate of MOS Load SW to modify power rail soft start timing
R412 from 100K to 470K; R1632 form 1M to 4.7M; C293 form 0.1u to 0.022u R507 from 100K to 470K; R517 form 1M to 4.7M; C400 form 0.1u to 0.022u R722 from 100K to 470K; R1625 form 1M to 4.7M; C644 form 4700p to 220p
X02
R729 from 100K to 470K; R1628 form 1M to 4.7M; C650 form 4700p to 220p R917 from 100K to 470K; R1617 form 1M to 4.7M; C770 form 4700p to 220p R920 from 100K to 470K; R1610 form 470K to 2.2M; C771 form 4700p to 470p R930 from 100K to 330K; R1611 form 470K to 1M; C773 form 2200p to 100p R906 from 100K to 470K; C763 form 2200p to 220p
C C
68 COMPAL Change P/N for HF Change C412~C415 P/N to SE076104K8L36 HW 12/01/2011
R912 from 100K to 470K; C766 form 470p to 220p
X02
12/01/2011 COMPAL X0269 HW Reserve 0.1uF CAP to GND for ESD request reserve CE14, CE20, CE22, CC151, CC152, CC153 to GND35
70 12/05/2011 COMPAL X02HW Change LH1 to 1uH Inductor(SHI00007W0L)19 Change LH1 from bead to Inductor for CRT
Swap USB Port7 and Port8 and reserve a choke(L108)
71
17,38 12/07/2011 COMPALHW EMI solution for E-Docking USB port
at E-Docking side: Port7 from NA to E-docking
X02
Port8 from E-Docking to NA
72 12/07/2011 X0224,32,37 HW COMPAL
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73 12/08/2011 COMPAL X0237 HW
Change USB9,12,13 CMC to 180ohm for EMI request
Follow CONN List_1130A Change JAUD1 to ACES_51522-0200N-P01
Change L10,L52,L107 to SM070002X00(OCF2012181YZF)
Change JAUD1 to ACES_51522-0200N-P01
74 12/09/2011 COMPAL22 HW
Thermal requests to change OTP from 88 to 92
Change R406 from 953ohm to 1.24Kohm X02
75 12/09/2011 To prevent inrush current at reset IC inputCOMPALHW41 Change R1629 from 0ohms to 33ohms resistor X02
76 12/09/2011 For CRT issue19 HW COMPAL Change CH36 from 10uF to 22uF X02
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42 HW 12/15/2011 COMPAL +3.3V_SUS sequence timing R911 from 100K to 470K; R1618 from 1M to 4.7M;
43 HW 12/15/2011 COMPAL Change current limit resistors of LED X02
12/13/2011 X0225 HW COMPAL Change HDMI R,C value for EMI request
R934 from 1.2K to 820, R957 from 1.2K to 1K, R951 from 330 to 270, R949 from 1.2K to 910,
Change R448,R449,R450,R452,R453,R454,R455,R456 from 680ohm to 604ohm; C1209~C1216 from 4.7pF to 3.9pF
C767 from 4700p to 220p
X02
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
60 61Monday, April 02, 2012
60 61Monday, April 02, 2012
60 61Monday, April 02, 2012
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of
of
Page 61
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Request Owner
34 HW 01/04/201280 COMPAL Change RC25 value for ESD
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Solution Description Rev.Page# TitleItem Issue DescriptionDate
Change RC25 from 0ohm to 1kohm(ST MEMO) A00
81 40 HW 01/17/2012 A00
D D
COMPAL
SMSC creates a new catalog part number and IC marking for the MEC5055
Change U51 P/N to SA00003TZ2L
Change R938 to 1.1k ohm, R958 to 560 ohm, R953 to 130 ohm,
82
HW 02/20/2012 A00COMPAL
Change current limit resistors of LED43
R951 to 470 ohm, change R939, R959, R957, R934, R949 to 1.2k ohm
Dalmore14 UMA hang on white screen issue
HW
02/24/201283 Change R755 from 100k ohm to 10k ohm A0038
COMPAL
when attached AC+media battery after hot dock.
84
85
C C
86
40
33
32 Change BOM option for TPM/TCM funtion
HW
HW
HW COMPAL
02/24/2012
02/24/2012
02/24/2012
COMPAL A00
COMPAL
25 HW 03/03/2012 COMPAL SMT request to change F2 footprint A0087
88 HW 03/03/2012 COMPAL Change PCH, LAN chip P/N for X-build14~21,30
Change board ID to A00 Change R875 to 33K ohm
Change SD CLK damping resistor for EMI request
Change R676 from 33 ohm to 10 ohm
Change C550,C551,C552,C553,R659,R660,R1662,RH311 BOM option to 5@
For DFX conern of F2 2nd source, SP040003H0L, change F2 footprint to F_MF-MSMF050-2
UH4 is changed to SA00005BU3L U31 is changed to SA00003SI5L
A00
A00
A00
1489 A00HW 03/03/2012 COMPAL De-pop resistor on PCH JTAG for power saving De-pop RH288, RH47, RH48 and RH49
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC MB A7903
SCHEMATIC MB A7903
SCHEMATIC MB A7903
4019FT
4019FT
4019FT
61 61Monday, April 02, 2012
61 61Monday, April 02, 2012
61 61Monday, April 02, 2012
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