Page 1
A
COMPAL CONFIDENTIAL
B
C
D
E
1 1
MODEL NAME :
PCB NO :
BOM P/N :
QXW10
LA-7902P (DA60000PV00 )
4319F831L01
GPIO MAP: E4_VC_GPIO_map_rev_1.1
2 2
Korbel 15 UMA
Ivy/Sandy Bridge + Panther POINT(HM77 w/o Vpro,/QM77 w/Vpro)
2012-03-07
REV : 1.0 (A00)
@ : Nopop Component
3 3
CONN@ : Connector Component
MB Type
*
TPM(R1)
TPM DIS(R1) 2@3@3@
TPM(R3) 5@1@2@3@
TPM DIS(R3)
*
HM77 w/o Vpro
QM77 w/ Vpro
4 4
MB PCB
MB PCB
Part Number Description
Part Number Description
DA60000PV00
DA60000PV00
A
PCB 0LH LA-7902P REV0 M/B UMA
PCB 0LH LA-7902P REV0 M/B UMA
B
BOM P/N
4319F831L01
1@
5@
4319F831L02
4319F831L03
4319F831L04
3@
PXDP@PCH XDP
46@HDMI LOGO
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Cover Sheet
Cover Sheet
Cover Sheet
LA-7902P
LA-7902P
LA-7902P
1 61Wednesday, March 07, 2012
1 61Wednesday, March 07, 2012
1 61Wednesday, March 07, 2012
E
1.0
1.0
1.0
Page 2
A
B
C
D
E
Block Diagram
Memory BUS (DDR3)
Ivy/Sandy Bridge
1 1
On IO board
CRT CONN
pg37
VGA
VGA
For MB/DOCK
Video Switch
PI3V713-AZLEX
pg23
rPGA CPU
FDI
Lane x 8
pg6~11
DMI2
Lane x 4
1333/1600 MHz
USB2.0[11]
USB2.0[12]
USB2.0[13]
VGA
HDMI CONN
pg25
DOCKING PORT
pg38
2 2
DAI
USB2.0 [3,7]
SATA5
DOCK LAN
USB3.0 [4]
LVDS CONN
SDXC/MMC
pg33
pg24
Card Reader
OZ600FJ0
PCI Express BUS
PCIE1PCIE3
WWAN
pg34pg34pg34pg35
USB5USB4
Smart
/Express
PCIE5
1/2 Mini Card
PCIE2
1/2 Mini Card
WLAN/WiFi
Full Mini Card
Card
3 3
USB10
USB6
DPB
DPC
DPD
LVDS
pg33
100MHz
Option
China TCM1.2
SSX44B
Discrete TPM
AT97SC3204
PCIE 6
pg32
pg32
LPC BUS
33MHz
LPC BUS
33MHz
CPU XDP Port
pg7
PCH XDP Port
pg14
SMSC SIO
ECE5048
BC BUS
pg39
INTEL
Panther POINT-M
BGA
HM77/QM77
SPI
S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s
W25Q64CVSSIGPP
64M 4K sector
W25Q32BVSSIG
32M 4K sector
USB
USB2.0[2]
USB2.0[1]
pg14~21
USB2.0[0,9]
PCI Express BUS
HD Audio I/F
pg14
pg14 pg27
FFS LNG3DM
HDD
pg27
SMSC KBC
WiFi ON/OFF
DC/DC Interface
4 4
LED
pg43
pg37
pg42
PWM FAN
pg22
EMC4021
pg22
MEC5055
TP CONN
pg41 pg41
pg40
KB CONN
ODD
pg28
DDRIII-DIMM X2
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
BT 4.0
Camera
pg41
pg24
Fingerprint CONN
SATA[4]
USB3.0[3]
USB3.0[2]
on IO/Audio board
100MHz
HDA Codec
92HD93
MDC
pg37
on IO board
RJ11
Through Cable
pg12~13
Through LVDS Cable
pg41
E-SATA
USB 3.0 Port
USB 2.0 Port
USB 3.0 Port
USB 2.0 Port
USB2.0
pg37
DOCK LAN
INT.Speaker
pg29
Combo Jack RJ45
on Audio board
DAI
To Docking side
DMIC0
Dig.
MIC
Through LVDS Cable
DMIC1
Sigle.
MIC
on PWR board
pg36
pg36
PCIE7
pg29
pg37
BROADCOM
BCM5761
pg30,31
LAN SWITCH
PI3L720
on IO board
pg30
pg37
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
A
B
C
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
UMA Block Diagram
UMA Block Diagram
UMA Block Diagram
LA-7902P
LA-7902P
LA-7902P
2 61Wednesday, March 07, 2012
2 61Wednesday, March 07, 2012
2 61Wednesday, March 07, 2012
E
1.0
1.0
1.0
Page 3
5
4
3
2
1
POWER STATES
State
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF
S4 (Suspend to DISK) / M3 ON ON OFF
S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF HIGH
S5 (SOFT OFF) / M-OFF
Signal
SLP
S3#
HIGH
LOW HIGH HIGH
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
SLP
SLP
S5#
S4#
HIGH HIGH
LOW
LOW
SLP
A#
HIGH
HIGH
ALWAYS
PLANE
ON
M
PLANE
ON
SUS
RUN
PLANE
PLANE
ON ON ON
OFF
OFF
CLOCKS
OFF
OFF
OFF
USB 3.0 PORT#
1
2
3 JESA1 (Left side)
4
Connetion
NA
JUSB1 (Left side)
MLK DOCK
PCH
USB PORT#
0
1
2
3
4
5
6
*1
7
*1
8
JUSB (Right side-IO/B)
JUSB1 (Left side)
JESA1 (Left side ESATA)
DOCKING
WLAN
WWAN
JMINI3(Flash)-for w/ Vpro
DOCKING
NA
DESTINATION
PM TABLE
C C
power
plane
State
S0
S3
S5 S4/AC
S5 S4/AC don't exist
B B
+15V_ALW
+5V_ALW
+3.3V_ALW_PCH
+3.3V_RTC_LDO
ON
ON
+3.3V_SUS
+1.5V_MEM
ON ON
ON
OFF
OFFOFF
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+0.75V_DDR_VTT
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN
OFFON
OFF
OFF
need to update Power Status and PM
Table
+3.3V_M +3.3V_M
+1.05V_M
ON
ON
ON
+1.05V_M
(M-OFF)
ON
OFF
OFF
OFFOFF
SATA
SATA 0
SATA 1
SATA 2
SATA 3
SATA 4
DESTINATION
HDD
ODD/ E3 Module Bay
NA
NA
ESATA
9
10 Express card
11
12
13 BIO
*1: HM76 don't support port 6,7
PCI EXPRESS
Lane 1
Lane 2
Lane 3
SATA 5
Dock
Lane 4
JUSB (Right side-Audio/B)
Bluetooth
Camera
DESTINATION
MINI CARD-1 WWAN
MINI CARD-2 WLAN
Express card
None
UMA DP/HDMI Port
Port B
Port C
A A
Port D
Connetion
MB HDMI Conn
Dock DP port 2
Dock DP port 1
Lane 5
Lane 6
Lane 7
Lane 8 None
1/2vMINI CARD-3 PCIE
MMI
10/100/1G LOM
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Index and Config.
Index and Config.
Index and Config.
LA-7902P
LA-7902P
LA-7902P
3 61Wednesday, March 07, 2012
3 61Wednesday, March 07, 2012
3 61Wednesday, March 07, 2012
1
1.0
1.0
1.0
Page 4
5
4
3
2
1
EN_INVPWR
D D
ADAPTER
1.05V_0.8V_PWROK
+PWR_SRC
BATTERY
FDC654P
(Q21)
ISL95836
(PU700)
+BL_PWR_SRC
+VCC_GFXCORE
+5V_RUN
SIO_SLP_S3#
MODC_EN
SI3456BDVSI3456BDV
(Q30)(Q27)
+5V_HDD
PJP3 PJP4
ALWON
+5V_MOD
Pop option
MCARD_MISC_PWREN
SI3456
(Q42)
MCARD_WWAN_PWREN
SI3456
(Q40)
+3.3V_PCIE_FLASH
C C
CHARGER
RT8205
(PU100)
+5V_ALW
+3.3V_PCIE_WWAN
+3.3V_ALW
TM/TL(PT)
RUN_ON
SIO_SLP_S3#
ISL95836
(PU700)
B B
1.05V_0.8V_PWROK
+VCC_CORE
PJP7
TPS51212
(PU500)
CPU_VTT_ON
SIO_SLP_S3#
+1.05V_RUN_VTT +1.05V_M
SIO_SLP_S3#(PT)
PJP8(SSI)
TPS51212
(PU400)
SIO_SLP_A#
DASH(SSI)DASH(PT)
SIO_SLP_S3#
CPU1.5V_S3_GATE
(QC3)
RT8207
(PU200)
DDR_ON
+1.5V_MEM
SIO_SLP_S3#
AO4304LAO4304L
(Q59)
SYN470
(PU300)
SIO_SLP_S4#
+1.8V_RUN
0.75V_DDR_VTT_ON
1.05V_VTTPWRGD
TPS51461
(PU7)
+VCC_SA
AUX_EN_WOWL
SI3456
(Q38)
+3.3V_WLAN
PCH_ALW_ON
SI3456
(Q49)
+3.3V_ALW_PCH
SIO_SLP_S5#
SUS_ON
S13456
(Q54)
+3.3V_M
vPro DASH
SIO_SLP_S4#
SIO_SLP_LAN#
SI3456
(Q34) (Q61)
+3.3V_LAN+3.3V_SUS
R563
Pop option
AUX_ON
DMN3030LSS
+3.3V_RUN
SIO_SLP_S3#
SIO_SLP_S3#
SIO_SLP_A#
SI3456
(Q55)
(Q58)
+3.3V_M
R206
DASH(SSI)
+5V_RUN
+3.3V_SUS
SI4164
A A
(Q63)
+1.05V_RUN
+0.75V_DDR_VTT+1.5V_RUN+1.5V_CPU_VDDQ
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Power Rail
Power Rail
Power Rail
LA-7902P
LA-7902P
LA-7902P
4 61Wednesday, March 07, 2012
4 61Wednesday, March 07, 2012
4 61Wednesday, March 07, 2012
1
1.0
1.0
1.0
Page 5
5
SMBUS Address [0x9a]
H14
C9
PCH
D D
C8
G12
MEM_SMBCLK
MEM_SMBDATA
DMN66D0L
DMN66D0L
DMN66D0L
DMN66D0L
E14M16
SML1_SMBDATA
SML1_SMBCLK
B6A5
3A
3A
A50
1E
B53
1E
C C
B5
A4
LCD_SMBCLK
LCD_SMDATA
1B
1B
2.2K
2.2K
SIO_LAN_SMBCLK
SIO_LAN_SMBDAT
4
2.2K
2.2K
LAN_APE_SMB_DATA0
LAN_APE_SMB_CLK0
+3.3V_ALW_PCH
+3.3V_ALW_PCH
2.2K
2.2K
2.2K
2.2K
+3.3V_ALW
+3.3V_ALW
DMN66D0L
DMN66D0L
L09
L10
2.2K
2.2K
3
BCM LOM
SMBUS Address [C8]
MCTP Endpoint ID 0x09
PLDM Sensor Aggregator 0xDA
+3.3V_LAN
202
200
202
200
2
DIMM1
DIMM2
53
51
53
51
XDP1
XDP2
SMBUS Address [A0]
SMBUS Address [A4]
SMBUS Address [TBD]
SMBUS Address [TBD]
1
10K
G Sensor
WWAN
+3.3V_RUN
SMBUS Address [3B]
SMBUS Address [TBD]
10K
4
6
30
32
2.2K
4
+3.3V_ALW
100 ohm
100 ohm
+3.3V_ALW
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
10
9
7
6
127
129
7
8
Charger
BATTERY
CONN
SMBUS Address [0x16]
SMBUS Address
APR_EC: 0x48
SPR_EC: 0x70
DOCKING
MSLICE_EC: 0x72
USB: 0x59
AUDIO: 0x34
SLICE_BATTERY: 0x17
SLICE_CHARGER: 0x13
Express card
SMBUS Address [0x12]
SMBUS Address [TBD]
3
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
SMBUS TOPOLOGY
SMBUS TOPOLOGY
SMBUS TOPOLOGY
LA-7902P
LA-7902P
LA-7902P
5 61Wednesday, March 07, 2012
5 61Wednesday, March 07, 2012
5 61Wednesday, March 07, 2012
1
1.0
1.0
1.0
KBC
A56
1C1CB59
PBAT_SMBCLK
PBAT_SMBDAT
2.2K
2.2K
2.2K
B4
A3
A49
B52
DOCK_SMB_CLK
DOCK_SMB_DAT
2.2K
2.2K
CARD_SMBCLK
CARD_SMBDAT
1A
B B
1A
MEC 5055
2B
2B
2.2K
B50
A47
CHARGER_SMBCLK
CHARGER_SMBDAT
1G
1G
2.2K
2.2K
2.2K
B7
A7
BAY_SMBDAT
BAY_SMBCLK
2D
A A
2D
5
Page 6
5
4
3
2
1
(1)PEG_RCOMPO (H22) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC2.
(2)PEG_ICOMPO use 12mil connect to RC2
+1.05V_RUN_VTT
12
RC2
RC2
24.9_0402_1%~D
D D
DMI_CRX_PTX_N0<16>
DMI_CRX_PTX_N1<16>
DMI_CRX_PTX_N2<16>
DMI_CRX_PTX_N3<16>
DMI_CRX_PTX_P0<16>
DMI_CRX_PTX_P1<16>
DMI_CRX_PTX_P2<16>
DMI_CRX_PTX_P3<16>
DMI_CTX_PRX_N0<16>
DMI_CTX_PRX_N1<16>
DMI_CTX_PRX_N2<16>
DMI_CTX_PRX_N3<16>
DMI_CTX_PRX_P0<16>
DMI_CTX_PRX_P1<16>
DMI_CTX_PRX_P2<16>
DMI_CTX_PRX_P3<16>
FDI_CTX_PRX_N0<16>
FDI_CTX_PRX_N1<16>
FDI_CTX_PRX_N2<16>
FDI_CTX_PRX_N3<16>
C C
B B
FDI_CTX_PRX_N4<16>
FDI_CTX_PRX_N5<16>
FDI_CTX_PRX_N6<16>
FDI_CTX_PRX_N7<16>
FDI_CTX_PRX_P0<16>
FDI_CTX_PRX_P1<16>
FDI_CTX_PRX_P2<16>
FDI_CTX_PRX_P3<16>
FDI_CTX_PRX_P4<16>
FDI_CTX_PRX_P5<16>
FDI_CTX_PRX_P6<16>
FDI_CTX_PRX_P7<16>
FDI_FSYNC0<16>
FDI_FSYNC1<16>
FDI_INT<16>
FDI_LSYNC0<16>
FDI_LSYNC1<16>
(1) EDP_COMPIO use 4mil trace to RC1
(2) EDP_ICOMPO use 12mil to RC1
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
EDP_COMP
JCPU1A
JCPU1A
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD#
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
CONN@
CONN@
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
J22
J21
H22
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
24.9_0402_1%~D
PEG_COMP
PEG Compensation
PEG_ICOMPI and RCOMPO signals should be shor ted and routed
with - max leng th = 500 mils - typical imped ance = 43 mohm s
PEG_ICOMPO sign als should be routed with - m ax length = 50 0 mils
- typical imped ance = 14.5 mo hms
JCPU1I
JCPU1I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
M34
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
H33
VSS205
H30
VSS206
H27
VSS207
H24
VSS208
H21
VSS209
H18
VSS210
H15
VSS211
H13
VSS212
H10
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
G35
VSS223
G32
VSS224
G29
VSS225
G26
VSS226
G23
VSS227
G20
VSS228
G17
VSS229
G11
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
VSS
VSS
CONN@
CONN@
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
DP Compensation
+1.05V_RUN_VTT
12
RC1
RC1
24.9_0402_1%~D
A A
eDP_COMPIO and ICOMPO signals should be shor ted near
balls and route d with typical impedance <25 mohms
5
24.9_0402_1%~D
EDP_COMP
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Ivy/Sandt Bridge (1/6)
Ivy/Sandt Bridge (1/6)
Ivy/Sandt Bridge (1/6)
LA-7902P
LA-7902P
LA-7902P
6 61Wednesday, March 07, 2012
6 61Wednesday, March 07, 2012
6 61Wednesday, March 07, 2012
1
1.0
1.0
1.0
Page 7
5
Follow DG Rev0.71 SM_DRAMPWROK topology
+3.3V_ALW_PCH
CC156 0.1U_0402_25V6K~DCC156 0.1U_0402_25V6K~D
1 2
5
UC2
UC2
1
RUNPWROK<39,40>
+3.3V_ALW_PCH
D D
+1.05V_RUN_VTT
1 2
RC18 200_0402_1%~DRC18 200_0402_1%~D
PM_DRAM_PWR GD<16>
1 2
RC126 56_0402_5%~D@RC126 56_0402_5%~D@
1 2
RC128 49.9_0402_1%~D@RC128 49.9_0402_1%~D@
1 2
RC44 62_0402_5%~DRC44 62_0402_5%~D
H_THERMTRIP#
H_CATERR#
H_PROCHOT#
P
B
2
A
G
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
RUN_ON_CPU1.5VS3#<11,42>
RUNPWROK_AND PM_DRAM_PWR GD_CPU
4
O
+1.5V_CPU_VDDQ
RC64
39_0402_5%~D
39_0402_5%~D
1 2
13
D
D
QC1
QC1
2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
G
G
S
S
INTEL suggest RC64 and QC1 NO stuff by default
JCPU1B
JCPU1B
4
12
RC12
RC12
200_0402_1%~D
200_0402_1%~D
1 2
RC28 130_0402_1%~DRC28 130_0402_1%~D
@RC64
@
@
@
CONN@
CONN@
3
+3.3V_ALW_PCH
12
RC124
@RC124
@
1K_0402_1%~D
1K_0402_1%~D
SYS_PWROK_XDP
The resistor fo r HOOK2 should beplaced
such that the s tub is very sm all on CFG0 net
H_CPUPWRGD
SIO_PWRBTN#_R<14,16>
CFG0
SYS_PWROK<16,39>
DDR_XDP_WAN_ SMBDAT<12,13,14,15,27,34>
DDR_XDP_WAN_ SMBCLK<12,13,14,15,27,34>
+1.05V_RUN_VTT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
Place near JXDP1
1 2
RC5 1K_0402_1%~DRC5 1K_0402_1%~D
1 2
RC6 0_0402_5%~DRC6 0_0402_5%~D
1 2
RC7 1K_0402_1%~DRC7 1K_0402_1%~D
1 2
RC9 0_0402_5%~D@ RC9 0_0402_5%~D@
1 2
RC125 0_0402 _5%~DRC125 0_0402_5%~D
1 2
RC127 0_0402 _5%~DRC127 0_0402_5%~D
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CC66
CC66
CC65
CC65
2
XDP_PREQ#
XDP_PRDY#
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
CFG10<9>
CFG11<9>
CFG10
CFG11
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
H_CPUPWRGD_XDP
CFD_PWRBTN#_X DP
XDP_HOOK2
SYS_PWROK_XDP
DDR_XDP_SMBDAT_R 1
DDR_XDP_SMBCLK_R 1
XDP_TCLK
+1.05V_RUN_VTT +1.05V_RUN_VTT
JXDP1
JXDP1
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/HOOK0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH-030-01-L-D-A
SAMTE_BSH-030-01-L-D-A
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND1
OBSFN_C0
OBSFN_C1
GND3
GND5
GND7
OBSFN_D0
OBSFN_D1
GND9
GND11
GND13
GND15
TRST#
TMS
GND17
CONN@
CONN@
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
TD0
54
56
TDI
58
60
1
CFG16
CFG17
CFG0
CFG1
CFG2
CFG3
CFG8
CFG9
CFG4
CFG5
CFG6
CFG7
CLK_XDP
CLK_XDP#
XDP_RST#_R
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
CFG16 <9>
CFG17 <9>
CFG0 <9>
CFG1 <9>
CFG2 <9>
CFG3 <9>
CFG8 <9>
CFG9 <9>
CFG4 <9>
CFG5 <9>
CFG6 <9>
CFG7 <9>
Follow check list 0.5
C C
H_PROCHOT#<40,51,52>
H_THERMTRIP#<22>
H_SNB_IVB#<18>
CPU_DETECT#<39>
PECI_EC<40>
VR1 TOPOLOGY
1 2
RC57 56_0402_5%~DRC57 56_0402_5%~D
1 2
RC129 0_0402 _5%~DRC129 0_0402_5%~D
H_CATERR#
H_PROCHOT#_R
Close to JCPU1
H_THERMTRIP#_RH_THERMTRIP#_R
C26
AN34
AL33
AN33
AL32
AN32
PROC_SELECT#
SKTOCC#
CATERR#
PECI
PROCHOT#
THERMTRIP#
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
CLOCKS
CLOCKS
DDR3
DDR3
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
MISC
MISC
BCLK
BCLK#
place RC129 near CPU
PRDY#
PREQ#
TCK
H_PM_SYNC<16>
B B
H_CPUPWRGD<18>
RC25 1K_0402_5%~DRC25 1K_0402_5%~D
Buffered reset to CPU
A A
PCH_PLTRST#<14,17>
5
H_PM_SYNC
VCCPWRGOOD_0_R
1 2
PM_DRAM_PWR GD_CPU
PCH_PLTRST#_R
UC1
UC1
1
NC
VCC
2
A
GND3Y
SN74LVC1G07DCKR_SC70-5~D
SN74LVC1G07DCKR_SC70-5~D
Open drain buffer
+3.3V_RUN
5
4
AM34
AP33
V8
AR33
+1.05V_RUN_VTT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CC140
CC140
2
PCH_PLTRST#_BUF
PM_SYNC
UNCOREPWRGOOD
SM_DRAMPWR OK
RESET#
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
RC4
75_0402_1%~D
RC4
75_0402_1%~D
12
PCH_PLTRST#_R
1 2
RC10 43_0402_5%~DRC10 43_0402_5%~D
JTAG & BPM
JTAG & BPM
100P_0402_50V8J~D
100P_0402_50V8J~D
1
CC142
CC142
2
4
TMS
TRST#
TDI
TDO
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
Reserve fo r ESD in 6 /22
Place clos ed JCPU1
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
CPU_DMI
A28
CPU_DMI#
A27
CPU_DPLL
A16
CPU_DPLL#
A15
Remove DPLL Ref clock (for eDP only)
DDR3_DRAMRST#_CP U
R8
SM_RCOMP0
AK1
SM_RCOMP1
A5
SM_RCOMP2
A4
SM_RCOMP2 --> 15mil
SM_RCOMP1/0 --> 20mil
XDP_PRDY#
AP29
XDP_PREQ#
AP27
XDP_TCLK
AR26
XDP_TMS
AR27
XDP_TRST#
AP30
XDP_TDI_R
AR28
XDP_TDO_R
AP26
XDP_DBRESET#_R
AL35
XDP_OBS0_R
AT28
XDP_OBS1_R
AR29
XDP_OBS2_R
AR30
AT30
XDP_OBS4_R XDP_OBS4
AP32
XDP_OBS5_R
AR31
XDP_OBS6_R
AT31
XDP_OBS7_R
AR32
For ESD concern, please put near CPU
XDP_DBRESET#
1
CE13
CE13
2
@
@
1 2
RC13 0_0402_5%~D@RC13 0_0402_5%~D@
1 2
RC15 0_0402_5%~D@RC15 0_0402_5%~D@
1 2
RC16 1K_0402_1%~DRC16 1K_0402_1%~D
1 2
RC17 1K_0402_1%~DRC17 1K_0402_1%~D
CLK_CPU_DMI <15>
CLK_CPU_DMI# <15>
Max 500mils
RC50
RC50
4.99K_0402_1%~D
4.99K_0402_1%~D
DDR_HVREF_RST_PCH<15>
DDR_HVREF_RST_GATE<40>
12
RC130
RC130
10K_0402_5%~D
10K_0402_5%~D
XDP_DBRESET#
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3X DP_OBS3_R
XDP_OBS5
XDP_OBS6
XDP_OBS7
RC26 0_0402_5%~DRC26 0_0402_5%~D
RC30 0_0402_5%~DRC30 0_0402_5%~D
RC31 0_0402_5%~DRC31 0_0402_5%~D
RC33 0_0402_5%~DRC33 0_0402_5%~D
RC34 0_0402_5%~DRC34 0_0402_5%~D
RC36 0_0402_5%~DRC36 0_0402_5%~D
RC37 0_0402_5%~DRC37 0_0402_5%~D
RC38 0_0402_5%~DRC38 0_0402_5%~D
RC39 0_0402_5%~DRC39 0_0402_5%~D
Avoid stub in t he PWRGD path
while placing r esistors RC25 & RC130
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
12
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
VCCPWRGOOD_0_R
100P_0402_50V8J~D
100P_0402_50V8J~D
1
CC141
CC141
2
3
+1.05V_RUN_VTT
RC48 0_0402_5%~D@ RC48 0_0402_5%~D@
12
XDP_DBRESET# <14,16>
1 2
D
S
D
S
13
QC2
QC2
G
G
BSS138W-7-F_SOT323-3~D
BSS138W-7-F_SOT323-3~D
2
DDR_HVREF_RST
1
CC177
CC177
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
1 2
RC46 0_0402_5%~D@RC46 0_0402_5%~D@
1 2
RC47 0_0402_5%~D@ RC47 0_0402_5%~D@
1 2
RC23 0_0402_5%~DRC23 0_0402_5%~D
XDP_TDO_R XDP_TDO
SM_RCOMP2
SM_RCOMP1
SM_RCOMP0
1 2
RC24 0_0402_5%~DRC24 0_0402_5%~D
RC42
RC42
140_0402_1%~D
140_0402_1%~D
2
CLK_XDP
CLK_XDP#
DDR3_DRAMRST# <12>
XDP_TDIXDP_TDI_R
12
12
12
RC45
RC45
RC43
RC43
200_0402_1%~D
200_0402_1%~D
25.5_0402_1%~D
25.5_0402_1%~D
XDP_RST#_R
RH107 0_0402 _5%~DRH107 0_0402_5%~D
RH106 0_0402 _5%~DRH106 0_0402_5%~D
CLK_XDP_ITP<9>
CLK_XDP_ITP#<9>
RC8 1K_0402_1%~DRC8 1K_0402_1%~D
1 2
1 2
DDR_HVREF_RST <12>
M3 control
1 2
RH109 0_0402 _5%~D@RH109 0_0402_5 %~D@
1 2
RH108 0_0402 _5%~D@RH108 0_0402_5 %~D@
12
PLTRST_XDP# <17>
CLK_CPU_ITP <15>
CLK_CPU_ITP# <15>
PU/PD for JTAG signals
+3.3V_RUN
XDP_DBRESET#
XDP_TMS
XDP_TDI
XDP_PREQ#
XDP_TDO
XDP_TCLK
XDP_TRST#
RC19 1K_0402_1%~DRC19 1K_0402_1%~D
RC27 51_0402_1%~DRC27 51_0402_1%~D
RC29 51_0402_1%~DRC29 51_0402_1%~D
RC32 51_0402_1%~D@RC32 51_0402_1%~D@
RC35 51_0402_1%~DRC35 51_0402_1%~D
RC40
RC40
RC41
RC41
12
12
12
12
12
12
51_0402_1%~D
51_0402_1%~D
12
51_0402_1%~D
51_0402_1%~D
+1.05V_RUN_VTT
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Ivy/Sandy Bridge (2/6)
Ivy/Sandy Bridge (2/6)
Ivy/Sandy Bridge (2/6)
LA-7902P
LA-7902P
LA-7902P
7 61Wednesday, March 07, 2012
7 61Wednesday, March 07, 2012
7 61Wednesday, March 07, 2012
1
1.0
1.0
1.0
Page 8
5
4
3
2
1
JCPU1D
D10
K10
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA9
AA7
AA10
AB8
AB9
J10
C9
A7
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
K9
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
R6
J7
J8
J9
JCPU1D
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
JCPU1C
JCPU1C
D D
C C
B B
DDR_A_D[0..63]<12>
DDR_A_BS0<12>
DDR_A_BS1<12>
DDR_A_BS2<12>
DDR_A_CAS#<12>
DDR_A_RAS#<12>
DDR_A_WE#<12>
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
G10
N10
M10
AG6
AG5
AK6
AK5
AH5
AH6
AK8
AK9
AH8
AH9
AL9
AL8
AE8
AD9
AF9
F10
AJ5
AJ6
AJ8
AJ9
C5
D5
D3
D2
D6
C6
C2
C3
F8
G9
F9
F7
G8
G7
K4
K5
K1
K2
M8
N8
N7
M9
N9
M7
V6
J1
J5
J4
J2
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
CONN@
CONN@
M_CLK_DDR0
AB6
SA_CK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_CLK_DDR#0
DDR_CKE0_DIMMA
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
M_ODT0
M_ODT1
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
M_CLK_DDR0 <12>
M_CLK_DDR#0 <12>
DDR_CKE0_DIMMA <12>
M_CLK_DDR1 <12>
M_CLK_DDR#1 <12>
DDR_CKE1_DIMMA <12>
DDR_CS0_DIMMA# <12>
DDR_CS1_DIMMA# <12>
M_ODT0 <12>
M_ODT1 <12>
DDR_A_DQS#[0..7] <12>
DDR_A_DQS[0..7] <12>
DDR_A_MA[0..15] <12>
DDR_B_D[0..63]<13>
DDR_B_BS0<13>
DDR_B_BS1<13>
DDR_B_BS2<13>
DDR_B_CAS#<13>
DDR_B_RAS#<13>
DDR_B_WE#<13>
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
CONN@
CONN@
M_CLK_DDR2
AE2
SB_CK[0]
SB_CLK#[0]
SB_CKE[0]
SB_CK[1]
SB_CLK#[1]
SB_CKE[1]
SB_CK[2]
SB_CLK#[2]
SB_CKE[2]
SB_CK[3]
SB_CLK#[3]
SB_CKE[3]
SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]
SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AD2
R9
AE1
AD1
R10
AB2
AA2
T9
AA1
AB1
T10
AD3
AE3
AD6
AE6
AE4
AD4
AD5
AE5
D7
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_CLK_DDR#2
DDR_CKE2_DIMMB
M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
M_ODT2
M_ODT3
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
M_CLK_DDR2 <13>
M_CLK_DDR#2 <13>
DDR_CKE2_DIMMB <13>
M_CLK_DDR3 <13>
M_CLK_DDR#3 <13>
DDR_CKE3_DIMMB <13>
DDR_CS2_DIMMB# <13>
DDR_CS3_DIMMB# <13>
M_ODT2 <13>
M_ODT3 <13>
DDR_B_DQS#[0..7] <13>
DDR_B_DQS[0..7] <13>
DDR_B_MA[0..15] <13>
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
A A
TYCO_2013620-3_IVYBRIDGE
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Ivy/Sandy Bridge (3/6)
Ivy/Sandy Bridge (3/6)
Ivy/Sandy Bridge (3/6)
LA-7902P
LA-7902P
LA-7902P
8 61Wednesday, March 07, 2012
8 61Wednesday, March 07, 2012
8 61Wednesday, March 07, 2012
1
1.0
1.0
1.0
Page 9
5
4
3
2
1
CFG Straps for Processor
CFG2
D D
CFG0<7>
CFG1<7>
CFG2<7>
CFG3<7>
CFG4<7>
CFG5<7>
CFG6<7>
CFG7<7>
CFG8<7>
CFG9<7>
CFG10<7>
+VCC_GFXCORE
VAXG_VAL_SENSE
1 2
RC122 49.9_0402_1%~D@RC122 49.9_0402_1%~D@
RC123 49.9_0402_1%~D@RC123 49.9_0402_1%~D@
C C
+VCC_CORE
RC120 49.9_0402_1%~D@RC120 49.9_0402_1%~D@
RC121 49.9_0402_1%~D@RC121 49.9_0402_1%~D@
B B
1 2
1 2
1 2
12
RC69
@ RC69
@
100_0402_1%~D
100_0402_1%~D
VSSAXG_VAL_SENSE
VCC_VAL_SNESE
12
RC71
@ RC71
@
100_0402_1%~D
100_0402_1%~D
VSS_VAL_SNESE
CFG11<7>
CFG16<7>
CFG17<7>
T22PAD~D @T22PAD~D @
T28PAD~D @T28PAD~D @
T29PAD~D @T29PAD~D @
T30PAD~D @T30PAD~D @
T31PAD~D @T31PAD~D @
T33PAD~D @T33PAD~D @
T35PAD~D @T35PAD~D @
T36PAD~D @T36PAD~D @
T37PAD~D @T37PAD~D @
T38PAD~D @T38PAD~D @
T40PAD~D @T40PAD~D @
T41PAD~D @T41PAD~D @
T42PAD~D @T42PAD~D @
T43PAD~D @T43PAD~D @
T44PAD~D @T44PAD~D @
T45PAD~D @T45PAD~D @
T46PAD~D @T46PAD~D @
T47PAD~D @T47PAD~D @
T48PAD~D @T48PAD~D @
T52PAD~D @T52PAD~D @
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SNESE
VSS_VAL_SNESE
JCPU1E
JCPU1E
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
J15
RSVD27
CONN@
CONN@
T39 PAD~D@T39 PAD~D@
T1 PAD~D@T1 PAD~D@
T2 PAD~D@T2 PAD~D@
T3 PAD~D@T3 PAD~D@
T4 PAD~D@T4 PAD~D@
T5 PAD~D@T5 PAD~D@
T6 PAD~D@T6 PAD~D@
T7 PAD~D@T7 PAD~D@
T8 PAD~D@T8 PAD~D@
T11 PAD~D@T11 PAD~D@
T13 PAD~D@T13 PAD~D@
T15 PAD~D@T15 PAD~D@
T16 PAD~D@T16 PAD~D@
T17 PAD~D@T17 PAD~D@
T18 PAD~D@T18 PAD~D@
T19 PAD~D@T19 PAD~D@
T20 PAD~D@T20 PAD~D@
T21 PAD~D@T21 PAD~D@
T23 PAD~D@T23 PAD~D@
T24 PAD~D@T24 PAD~D@
T25 PAD~D@T25 PAD~D@
T26 PAD~D@T26 PAD~D@
T27 PAD~D@T27 PAD~D@
T32 PAD~D@T32 PAD~D@
T34 PAD~D@T34 PAD~D@
CLK_XDP_ITP <7>
CLK_XDP_ITP# <7>
T49 PAD~D@T49 PAD~D@
T50 PAD~D@T50 PAD~D@
T51 PAD~D@T51 PAD~D@
T53 PAD~D@T53 PAD~D@
PEG Static Lane Reversal - CFG2 is for the 16x
1:(Default) Normal Operation; Lane #
CFG2
definition matches socket pin map definition
0:Lane Reversed
Display Port Presence Strap
1 : Disabled; No Physical Display Port
CFG4
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
PCIE Port Bifurcation Straps
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG[6:5]
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD37
RSVD38
RSVD39
RSVD40
RSVD51
RSVD52
BCLK_ITP
BCLK_ITP#
KEY
AH27
AH26
L7
AG7
AE7
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AN35
AM35
AT2
AT1
AR1
B1
VCC_DIE_SENSE
VSS_DIE_SENSE
CFG
CFG
RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
RSVD_NCTF5
RSVD_NCTF6
RSVD_NCTF7
RSVD_NCTF8
RESERVED
RESERVED
RSVD_NCTF9
RSVD_NCTF10
RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13
CFG4
CFG6
CFG5
RC54
@ RC54
@
1K_0402_1%~D
1K_0402_1%~D
12
@ RC51
@
1K_0402_1%~D
1K_0402_1%~D
12
@ RC52
@
1K_0402_1%~D
1K_0402_1%~D
12
12
RC51
RC52
RC53
@ RC53
@
1K_0402_1%~D
1K_0402_1%~D
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
CFG7
12
@ RC56
@
1K_0402_1%~D
1K_0402_1%~D
RC56
PEG DEFER TRAINING
1: (Default) PEG Train immediately
CFG7
following xxRESETB de assertion
A A
0: PEG Wait for BIOS for training
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Ivy/Sandy Bridge (4/6)
Ivy/Sandy Bridge (4/6)
Ivy/Sandy Bridge (4/6)
LA-7902P
LA-7902P
LA-7902P
9 61Wednesday, March 07, 2012
9 61Wednesday, March 07, 2012
9 61Wednesday, March 07, 2012
1
1.0
1.0
1.0
Page 10
5
+VCC_CORE
53A
D D
C C
B B
A A
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
4
POWER
JCPU1F
JCPU1F
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
POWER
CORE SUPPLY
CORE SUPPLY
PEG AND DDR
PEG AND DDR
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
SENSE LINES SVID
SENSE LINES SVID
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VIDALERT#
VIDSCLK
VIDSOUT
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
8.5A
H_CPU_SVIDALRT#
VIDSCLK
VIDSOUT
VCCSENSE_R
VSSSENSE_R
VTT_SENSE
VSSIO_SENSE_R
+1.05V_RUN_VTT
3
Note: Place the PU resistors close to CPU
RC61 close to C PU 300 - 1500m ils
H_CPU_SVIDALRT#
VIDSCLK <51>
1 2
RC61 43_0402_5%~DRC61 43_0402_5%~D
+1.05V_RUN_VTT
12
RC63
RC63
130_0402_1%~D
130_0402_1%~D
H_CPU_SVIDALRT# must be routed between the
VIDSOUT and VIDSCLK lines to reduce cross
talk. 18 mils spacing to others.
Place RC66, RC70near CPU
1 2
RC67 0_0402_5%~D@ RC67 0_0402_5%~D@
1 2
RC68 0_0402_5%~D@ RC68 0_0402_5%~D@
RC98 10_0402_1%~DRC98 10_0402_1%~D
10_0402_1%~D
10_0402_1%~D
12
RC133
RC133
12
2
+1.05V_RUN_VTT
12
CAD Note: Place the PU
resistors close to CPU
RC63 close to C PU 300 - 1500m ils
VIDSOUT < 51>
+VCC_CORE
RC75
@RC75
@
100_0402_1%~D
100_0402_1%~D
1 2
+1.05V_RUN_VTT
VTT_SENSE <49>
VSSIO_SENSE_R <49>
12
12
RC60
RC60
75_0402_1%~D
75_0402_1%~D
RC66
RC66
100_0402_1%~D
100_0402_1%~D
VCCSENSE <51>
VSSSENSE <51>
RC70
RC70
100_0402_1%~D
100_0402_1%~D
VIDALERT_N <51>
1
Iccmax current changed for PD DG Rev0.7
CPU Power Rail Table
Voltage Rail
VCC
VCCIO
VAXG
VCCPLL
VDDQ
VCCSA
+1.5V_MEM 1.5
Description
*
5A to Mem contr oller(+1.5V_CP U_VDDQ)
5-6A to 2 DIMMs /channel
2-5A to +1.5V_R UN & +0.75V_DD R_VTT
Voltage
0.65-1.3
1.05
0.0-1.1
1.8
1.5
0.65-0.9
S0 Iccmax
Current (A)
53
8.5
26
3
5
6
12-16
*
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
5
4
CONN@
CONN@
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Ivy/Sandy Bridge (5/6)
Ivy/Sandy Bridge (5/6)
Ivy/Sandy Bridge (5/6)
LA-7902P
LA-7902P
LA-7902P
10 61Wednesday, March 07, 2012
10 61Wednesday, March 07, 2012
10 61Wednesday, March 07, 2012
1
1.0
1.0
1.0
Page 11
5
4
3
2
1
+1.5V_CPU_VDDQ Source
+3.3V_ALW2
12
RC74
RC74
100K_0402_5%~D
2
+VCC_GFXCORE
330U_D2_2.5VM_R6M~D
330U_D2_2.5VM_R6M~D
CC176
CC176
1
+
+
2
61
100K_0402_5%~D
RUN_ON_CPU1.5VS3#
QC4A
QC4A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
JCPU1G
JCPU1G
33A
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
1.2A
B6
A6
A2
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
CONN@
CONN@
D D
@
@
SIO_SLP_S3#<16,27,35,39,42,47,48,49>
CPU1.5V_S3_GATE<40>
C C
B B
1 2
RC96 1K_0402_1%~D@RC96 1K_0402_1%~D@
1 2
RC97 1K_0402_1%~D@RC97 1K_0402_1%~D@
A A
+1.8V_RUN
1 2
RC82 0_0402_5%~D
RC82 0_0402_5%~D
1 2
RC79 0_0402_5%~D@RC79 0_0402_5%~D@
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC173
CC173
2
2
5
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CC174
CC174
CC175
CC175
2
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
VCCPLL1
VCCPLL2
VCCPLL3
+PWR_SRC_S
5
RUN_ON_CPU1.5VS3# <7,42>
4
+1.5V_MEM +1 .5V_CPU_VDDQ
12
RC72
RC72
330K_0402_5%~D
330K_0402_5%~D
RUN_ON_CPU1.5VS3
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
QC4B
QC4B
4
POWER
POWER
SENSE
SENSE
GRAPHICS
GRAPHICS
1.8V RAIL
1.8V RAIL
AO4304L_SO8
AO4304L_SO8
8
7
6
5
1M_0402_5%~D
1M_0402_5%~D
12
RC143
RC143
VAXG_SENSE
VSSAXG_SENSE
LINES
LINES
SM_VREF
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
VREFMISC
VREFMISC
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VCCSA_SENSE
VCCSA_VID[0]
VCCSA_VID[1]
VCCIO_SEL
QC3
QC3
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
1
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2
3
CC135
CC135
1
4
1
2
0.022U_0402_25V7K~D
0.022U_0402_25V7K~D
CC136
CC136
+VCC_GFXCORE
AK35
AK34
AL1
+DIMM0_1_VREF_CPU
B4
+DIMM0_1_CA_CPU
D1
5A
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
2
12
12
6A
M27
M26
L26
J26
J25
J24
H26
H25
H23
C22
C24
A19
1 2
RC140 0_0402_5%~D@RC140 0_0402_5%~D@
Depop RC140 for ES2 CPU
20K_0402_5%~D
20K_0402_5%~D
12
@
@
RC73
RC73
RC99
RC99
100_0402_1%~D
100_0402_1%~D
RC100
RC100
100_0402_1%~D
100_0402_1%~D
+V_SM_VREF_CNT
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC161
CC161
2
2
1
2
3
+V_DDR_SMREF
+1.5V_MEM
1K_0402_1%~D
1K_0402_1%~D
12
@
@
RC80
RC80
1K_0402_1%~D
1K_0402_1%~D
12
@
@
RC81
RC81
RUN_ON_CPU1.5VS3
RC76
@RC76
@
100_0402_1%~D
100_0402_1%~D
1 2
+V_SM_VREF should
have 10 mil trace width
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC162
CC162
CC163
CC163
CC164
CC164
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@
@
1
1
CC170
CC170
CC169
CC169
CC168
CC168
2
2
added VCCSA_VID_0 to Power page
VCCSA_VID_0 <50>
VCCSA_VID_1 <50>
1 2
RC135 0_0402 _5%~D@RC135 0_0402_5 %~D@
1 2
RC134 0_0402 _5%~D@RC134 0_0402_5 %~D@
@QC5
@
NTR4503NT1G_SOT23-3~D
NTR4503NT1G_SOT23-3~D
1
VCC_AXG_SENSE <51>
VSS_AXG_SENSE <51>
Intel is recommended to provide stitching capacitors for
Vccd power planes +1.5V_MEM and +1.5V_CPU_VDDQ
(Follow Intel CRB) _0721
+1.5V_CPU_VDDQ
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC166
CC166
CC165
CC165
2
2
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC172
CC172
CC171
CC171
+
+
2
2
VCCP_PWRCTR L <49>
+V_DDR_REF
+1.5V_CPU_VDDQ
QC5
3
2
CC178 0.1U_0402_10V7K~DCC178 0.1U_0402_10V7K~D
12
CC179 0.1U_0402_10V7K~DCC179 0.1U_0402_10V7K~D
12
CC149 0.1U_0402_10V7K~DCC149 0.1U_0402_10V7K~D
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
1
+
+
CC167
CC167
2
12
CC150 0.1U_0402_10V7K~DCC150 0.1U_0402_10V7K~D
12
+VCC_SA
VCCSA_SENSE <50>
1K_0402_1%~D
1K_0402_1%~D
12
RC84
RC84
1K_0402_1%~D
1K_0402_1%~D
12
RC78
RC78
2
JCPU1H
JCPU1H
AT35
VSS1
AT32
VSS2
AT29
+V_SM_VREF_CNT
6A
+1.5V_MEM
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
VSS7
AT16
VSS8
AT13
VSS9
AT10
VSS10
AT7
VSS11
AT4
VSS12
AT3
VSS13
AR25
VSS14
AR22
VSS15
AR19
VSS16
AR16
VSS17
AR13
VSS18
AR10
VSS19
AR7
VSS20
AR4
VSS21
AR2
VSS22
AP34
VSS23
AP31
VSS24
AP28
VSS25
AP25
VSS26
AP22
VSS27
AP19
VSS28
AP16
VSS29
AP13
VSS30
AP10
VSS31
AP7
VSS32
AP4
VSS33
AP1
VSS34
AN30
VSS35
AN27
VSS36
AN25
VSS37
AN22
VSS38
AN19
VSS39
AN16
VSS40
AN13
VSS41
AN10
VSS42
AN7
VSS43
AN4
VSS44
AM29
VSS45
AM25
VSS46
AM22
VSS47
AM19
VSS48
AM16
VSS49
AM13
VSS50
AM10
VSS51
AM7
VSS52
AM4
VSS53
AM3
VSS54
AM2
VSS55
AM1
VSS56
AL34
VSS57
AL31
VSS58
AL28
VSS59
AL25
VSS60
AL22
VSS61
AL19
VSS62
AL16
VSS63
AL13
VSS64
AL10
VSS65
AL7
VSS66
AL4
VSS67
AL2
VSS68
AK33
VSS69
AK30
VSS70
AK27
VSS71
AK25
VSS72
AK22
VSS73
AK19
VSS74
AK16
VSS75
AK13
VSS76
AK10
VSS77
AK7
VSS78
AK4
VSS79
AJ25
VSS80
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
CONN@
CONN@
VSS
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Ivy/Sandy Bridge (6/6)
Ivy/Sandy Bridge (6/6)
Ivy/Sandy Bridge (6/6)
LA-7902P
LA-7902P
LA-7902P
11 61Wednesday, March 07, 2012
11 61Wednesday, March 07, 2012
11 61Wednesday, March 07, 2012
1
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
1.0
1.0
1.0
Page 12
5
+V_DDR_REFA_M3
+V_DDR_REF
D D
Populate RD1, De-Populate RD7 for Intel DDR3
VREFDQ multiple methods M1
Populate RD7, De-Populate RD1 for Intel DDR3
VREFDQ multiple methods M3
All VREF traces should
have 10 mil trace width
DDR_A_DQS#[0..7]<8>
DDR_A_D[0..63]<8>
DDR_A_DQS[0..7]<8>
DDR_A_MA[0..15]<8>
C C
Layout Note:
Place near JDIMM1
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD3
CD3
2
+1.5V_MEM
B B
A A
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD7
CD7
1
1
2
2
Layout Note:
Place near JDIMM1.203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD17
CD17
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD4
CD4
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD8
CD8
CD9
CD9
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD18
CD18
2
5
1U_0402_6.3V6K~D
1
1
CD5
CD5
CD6
CD6
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD10
CD10
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD19
CD19
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD11
CD11
CD51
CD51
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD20
CD20
330U_SX_2VY~D
330U_SX_2VY~D
@CD13
@
1
CD14
CD14
CD13
1
+
+
2
2
RD2 10K_0402_5%~DRD2 10K_0402_5%~D
1 2
1 2
RD3 10K_0402_5%~DRD3 10K_0402_5%~D
RD7 0_0402_5%~D@ RD7 0_0402_5%~D@
RD1 0_0402_5%~D@ RD1 0_0402_5%~D@
+3.3V_RUN
1 2
1 2
4
+DIMM1_VREF_DQ
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD2
CD2
1
1
CD1
CD1
2
2
DDR_CKE0_DIMMA<8>
DDR_A_BS2<8>
M_CLK_DDR0<8>
DDR_A_BS0<8>
DDR_A_WE#<8>
DDR_A_CAS#<8>
DDR_CS1_DIMMA#<8>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
1
CD22
CD22
CD21
CD21
2
2
+1.5V_MEM
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_BS2
DDR_A_MA3
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
+0.75V_DDR_VTT
JDIMM1
JDIMM1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
TYCO_2-2013298-1~D
TYCO_2-2013298-1~D
Reverse Type
4
3
2-3A to 1 DIMMs/channel
JDIMM1 H=8
Follow CON N List_060 9A
DDR_CKE1_DIMMA <8>
M_CLK_DDR1 <8>
M_CLK_DDR#1 <8>M_CLK_DDR#0<8>
DDR_A_BS1 <8>
DDR_A_RAS# <8>
DDR_CS0_DIMMA# <8>
M_ODT0 <8>
M_ODT1 <8>
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
CD15
CD15
1
2
DDR_XDP_WAN_ SMBDAT <7,13,14,15,27,34>
DDR_XDP_WAN_ SMBCLK <7,13,14,15,27,34>
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
3
+1.5V_MEM
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
DDR3_DRAMRST#_R
DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11DDR_A_MA12
DDR_A_MA7DDR_A_MA9
DDR_A_MA6DDR_A_MA8
DDR_A_MA4DDR_A_MA5
DDR_A_MA2
DDR_A_MA0DDR_A_MA1
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
+0.75V_DDR_VTT
CONN@
CONN@
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
DQ14
DQ15
DQ20
DQ21
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS3
DQ30
DQ31
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
G2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+DIMM1_VREF_CA
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD16
CD16
1
2
2
DDR_HVREF_RST<7>
RD11 0_0402_5%~D@RD11 0_0402_5%~D@
2
1
+1.5V_MEM
12
RD27
RD27
1K_0402_1%~D
1K_0402_1%~D
DDR3_DRAMRST#_R
+DIMM0_1_VREF_CPU
DDR_HVREF_RST
+DIMM0_1_CA_CPU
DDR_HVREF_RST
1 2
RD28 1K_0402_1%~DRD28 1K_0402_1%~D
RD29 0_0402_5%~D@RD29 0_0402_5%~D@
1 2
QD1
QD1
D
S
D
S
BSS138_NL_SOT23-3
BSS138_NL_SOT23-3
13
G
G
2
RD30 0_0402_5%~D@RD30 0_0402_5%~D@
1 2
QD2
QD2
D
S
D
S
BSS138_NL_SOT23-3
BSS138_NL_SOT23-3
13
G
G
2
DDR3_DRAMRST# <7>DDR3_DRAMRST#_R<13>
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
12
+V_DDR_REF
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
LA-7902P
LA-7902P
LA-7902P
1
+V_DDR_REFA_M3
+V_DDR_REFB_M3
12 61Wednesday, March 07, 2012
12 61Wednesday, March 07, 2012
12 61Wednesday, March 07, 2012
1.0
1.0
1.0
Page 13
5
D D
Populate RD4, De-Populate RD8 for Intel DDR3
VREFDQ multiple methods M1
Populate RD8, De-Populate RD4 for Intel DDR3
VREFDQ multiple methods M3
DDR_B_DQS#[0..7]<8>
DDR_B_D[0..63]<8>
DDR_B_DQS[0..7]<8>
DDR_B_MA[0..15]<8>
C C
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD25
CD25
2
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
B B
A A
10U_0603_6.3V6M~D
CD30
CD30
CD29
CD29
1
1
2
2
Layout Note:
Place near JDIMM2.203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD39
CD39
2
Layout Note:
Place near JDIMM2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD26
CD26
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD31
CD31
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD40
CD40
2
2
5
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD27
CD27
CD28
CD28
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD34
CD34
CD33
CD33
CD32
CD32
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD42
CD42
CD41
CD41
2
All VREF traces should
have 10 mil trace width
330U_SX_2VY~D
330U_SX_2VY~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@CD35
@
1
CD36
CD36
CD35
1
+
+
2
2
+V_DDR_REFB_M3
+V_DDR_REF
4
1 2
RD8 0_0402_5%~D@ RD8 0_0402_5%~D@
1 2
RD4 0_0402_5%~D@ RD4 0_0402_5%~D@
+3.3V_RUN
RD5 10K_04 02_5%~DRD 5 10K_0402_5%~D
4
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
2
+3.3V_RUN
12
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CD23
CD23
2
DDR_CKE2_DIMMB<8>
DDR_B_BS2<8>
M_CLK_DDR2<8>
M_CLK_DDR#2<8>
DDR_B_BS0<8>
DDR_B_WE#<8>
DDR_B_CAS#<8>
DDR_CS3_DIMMB#<8>
12
CD24
CD24
10K_0402_5%~D
10K_0402_5%~D
RD6
RD6
1
2
3
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+0.75V_DDR_VTT
CD43
CD43
1
2
CONN@
JDIMM2
JDIMM2
3
5
7
9
11
13
15
17
19
21
23
25
27
33
35
39
41
45
47
49
51
53
55
57
59
63
67
69
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
CD44
CD44
205
CONN@
VREF_DQ1VSS1
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS129RESET#
VSS1131VSS12
DQ10
DQ11
VSS1337VSS14
DQ16
DQ17
VSS1543VSS16
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS2261DQS#3
DM3
VSS2365VSS24
DQ26
DQ27
VSS2571VSS26
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
G1
FOX_AS0A626-U4RN-7F
FOX_AS0A626-U4RN-7F
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
DQ14
DQ15
DQ20
DQ21
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
A15
80
A14
82
84
A11
86
A7
88
90
A6
92
A4
94
96
A2
98
A0
100
102
104
106
108
110
112
114
S0#
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
G2
+1.5V_MEM+1.5V_MEM+DIMM2_VREF_DQ
DDR_B_D4
DDR_B_D5
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
DDR3_DRAMRST#_R
DDR_B_D14
DDR_B_D15
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D30
DDR_B_D31
DDR_CKE3_DIMMB
DDR_B_MA15
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
M_ODT3
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
+0.75V_DDR_VTT
2
Reverse Type
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
2-3A to 1 DIMMs/channel
JDIMM2 H=4
Check connection and symbol
DDR3_DRAMRST#_R <12>
DDR_CKE3_DIMMB <8>
M_CLK_DDR3 <8>
M_CLK_DDR#3 <8>
DDR_B_BS1 <8>
DDR_B_RAS# <8>
DDR_CS2_DIMMB# <8>
M_ODT2 <8>
M_ODT3 <8>
+DIMM2_VREF_CA
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
CD37
CD37
2
DDR_XDP_WAN_ SMBDAT <7,12,14,15,27,34>
DDR_XDP_WAN_ SMBCLK <7,12,14,15,27,34>
RD15 0_0402_5%~D@RD15 0_0402_5%~D@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD38
CD38
1
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
LA-7902P
LA-7902P
LA-7902P
1
12
+V_DDR_REF
1.0
1.0
13 61W ednesday, March 07, 2012
13 61W ednesday, March 07, 2012
13 61W ednesday, March 07, 2012
1
1.0
Page 14
5
CMOS settingCMOS_CLR1
TPM setting
Clear ME RTC Registers
Keep ME RTC Registers
12
RH38
RH38
330K_0402_1%~D
330K_0402_1%~D
PCH_INTVRMEN
12
RH39
@RH39
@
330K_0402_1%~D
330K_0402_1%~D
1
1
@
@
ME1 SHORT PADS~D
ME1 SHORT PADS~D
1 2
CH5 1U_0402_6.3V6K~DCH5 1U_0402_6.3V6K~D
PCH_AZ_CODEC_SDOUT<29>
PCH_AZ_CODEC_SYNC<29>
PCH_AZ_CODEC_RST#<29>
PCH_AZ_CODEC_BITCLK< 29>
27P_0402_50V8J~D
27P_0402_50V8J~D
Clear CMOSShunt
Keep CMOS
CH101
@CH101
@
Open
ME_CLR1
Shunt
Open
+RTC_CELL
D D
INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable Internal VRs
*
Low - Enable External VRs
C C
PCH_AZ_SYNC is sampled
at the rising edge of RSMRST# pin.
So signal should be PU to the ALWAYS rail.
+3.3V_ALW_PCH
On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V
when sampled low
+RTC_CELL
2
2
1 2
RH29 33_0402_5%~DRH29 33_0402_5%~D
1 2
RH26 33_0402_5%~DRH26 33_0402_5%~D
1 2
RH27 33_0402_5%~DRH27 33_0402_5%~D
1 2
RH25 33_0402_5%~DRH25 33_0402_5%~D
1
+3.3V_ALW_PCH
2
12
RH66
RH66
1K_0402_1%~D
1K_0402_1%~D
PCH_AZ_SYNC
12
RH282
@RH282
@
100K_0402_5%~D
100K_0402_5%~D
1 2
RH22 20K_0402_5%~DRH22 20K_0402_5%~D
1 2
RH23 20K_0402_5%~DRH23 20K_0402_5%~D
1 2
RH11 1M_0402_5%~DRH11 1M_0402_5%~D
1
1
@
@
CMOS1 SHORT PADS~D
CMOS1 SHORT PADS~D
1 2
CH4
CH4
CMOS place near DIMM
PCH_AZ_SDOUT
PCH_AZ_SYNC_Q
PCH_AZ_RST#
PCH_AZ_BITCLK
12
@
@
RH288
RH288
0_0603_5%~D
0_0603_5%~D
+3.3V_ALW_PCH_JTAG
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PCH_AZ_MDC_SDOUT<37>
RH59 51_0402_1%~DRH59 51_0402_1%~D
RH44 200_0402_1%~DRH44 200_0402_1%~D
RH45 200_0402_1%~DRH45 200_0402_1%~D
RH43 200_0402_1%~DRH43 200_0402_1%~D
Follow INTEL CRB 0.7
B B
SPI_PCH_CS0# SPI_PCH_CS0#_R
1 2
R935 47_0402_5%~DR935 47_0402_5%~D
SPI_PCH_DIN SPI_DIN64
1 2
R894 33_0402_5%~DR894 33_0402_5%~D
SPI_WP#_SEL SPI_WP#_SEL_R
SPI_WP#_SEL<39>
A A
1 2
R898 0_0402_5%~D@R898 0_0402_5%~D@
PCH_AZ_SYNC_Q
1 2
RH31 1M_0402_5%~DRH31 1M_0402_5%~D
INTEL HDA_SYNC
isolation circuit
R890
R890
3.3K_0402_5%~D
3.3K_0402_5%~D
12
S
S
G
G
2
+5V_RUN
200 MIL SO8
64Mb Flash ROM
U52
U52
1
VCC
/CS
2
DO
/HOLD
3
CLK
/WP
GND4DIO
W25Q64CVSSIG_SO8~D
W25Q64CVSSIG_SO8~D
4
USB_OC0#_R<17>
USB_OC1#_R<17>
USB_OC2#<17>
USB_OC3#<17>
USB_OC4#_R<17>
USB_OC5#<17>
USB_OC6#<17>
SIO_EXT_SMI#<17,40>
SLP_ME_CSW_DEV#<18,39>
USB_MCARD1_DET#<18,34>
PCH_GPIO36<18>
PCH_GPIO37<18>
PCH_GPIO16<18>
TEMP_ALERT#<18,39>
PCH_GPIO15<18>
SIO_EXT_SCI#_R<18>
PCH_RSMRST#_Q<16,41>
CH2
CH2
18P_0402_50V8J~D
18P_0402_50V8J~D
CH3
CH3
18P_0402_50V8J~D
18P_0402_50V8J~D
PCH_AZ_MDC_BITCLK<37>
PCH_AZ_MDC_SYNC<37>
PCH_AZ_MDC_RST#<37>
PCH_AZ_CODEC_SDIN0<29>
PCH_AZ_MDC_SDIN1<37>
ME_FWP<39>
12
12
12
12
D
D
13
QH7
QH7
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
+3.3V_SPI
8
7
SPI_CLK64
6
SPI_DO64
5
USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#_R
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
SLP_ME_CSW_DEV#
USB_MCARD1_DET#
HDD_DET#_R
BBS_BIT0_R
PCH_GPIO36
PCH_GPIO37
PCH_GPIO16
TEMP_ALERT#
PCH_GPIO15
SIO_EXT_SCI#_R
12
12
YH1
YH1
32.768KHZ_12.5PF_Q13FC1350000~D
32.768KHZ_12.5PF_Q13FC1350000~D
PCH_RTCX2_R
12
12
CH100
@CH100
@
27P_0402_50V8J~D
27P_0402_50V8J~D
SPKR<29>
+3.3V_ALW_PCH
12
12
RH48
RH48
@
@
@
@
100_0402_1%~D
100_0402_1%~D
PCH_AZ_SYNC
C746
C746
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
12
R891
R891
3.3K_0402_5%~D
3.3K_0402_5%~D
SPI_PCH_CLK
1 2
R899 33_0402_5%~DR899 33_0402_5%~D
SPI_PCH_DO
1 2
R901 33_0402_5%~DR901 33_0402_5%~D
1 2
RH286 0_0402_5%~D@ RH286 0_0402_5%~D@
1 2
RH32 33_0402_5%~DRH32 33_0402_5%~D
1 2
RH33 33_0402_5%~DRH33 33_0402_5%~D
1 2
RH34 33_0402_5%~DRH34 33_0402_5%~D
1 2
RH287 1K_0402_1%~D@RH287 1K_0402_1%~D@
1 2
RH36 33_0402_5%~DRH36 33_0402_5%~D
1 2
RH50 1K_0402_1%~DRH50 1K_0402_1%~D
12
RH49
RH49
RH47
RH47
@
@
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
RF review in 0629
SPI_HOLD#
12
@
@
RE1
RE1
33_0402_5%~D
33_0402_5%~D
1
@
@
CE1
CE1
27P_0402_50V8J~D
27P_0402_50V8J~D
2
1 2
RH1 33_0402_5%~DPXDP@ RH1 33_0402_5%~DPXDP@
1 2
RH3 33_0402_5%~DPXDP@ RH3 33_0402_5%~DPXDP@
1 2
RH4 33_0402_5%~DPXDP@ RH4 33_0402_5%~DPXDP@
1 2
RH5 33_0402_5%~DPXDP@ RH5 33_0402_5%~DPXDP@
1 2
RH6 33_0402_5%~DPXDP@ RH6 33_0402_5%~DPXDP@
1 2
RH7 33_0402_5%~DPXDP@ RH7 33_0402_5%~DPXDP@
1 2
RH8 33_0402_5%~DPXDP@ RH8 33_0402_5%~DPXDP@
1 2
RH9 33_0402_5%~DPXDP@ RH9 33_0402_5%~DPXDP@
1 2
RH10 33_0402_5%~DPXDP@ RH10 33_0402_5%~DPXDP@
1 2
RH12 33_0402_5%~DPXDP@ RH12 33_0402_5%~DPXDP@
1 2
RH13 33_0402_5%~DPXDP@ RH13 33_0402_5%~DPXDP@
1 2
RH14 33_0402_5%~DPXDP@ RH14 33_0402_5%~DPXDP@
1 2
RH15 33_0402_5%~DPXDP@ RH15 33_0402_5%~DPXDP@
1 2
RH16 33_0402_5%~DPXDP@ RH16 33_0402_5%~DPXDP@
1 2
RH17 33_0402_5%~DPXDP@ RH17 33_0402_5%~DPXDP@
1 2
RH18 33_0402_5%~DPXDP@ RH18 33_0402_5%~DPXDP@
1 2
RH19 33_0402_5%~DPXDP@ RH19 33_0402_5%~DPXDP@
1 2
RH20 33_0402_5%~DPXDP@ RH20 33_0402_5%~DPXDP@
RH24 1K_0402_1%~DPXDP@ RH24 1K_0402_1%~DPXDP@
@
@
RSMRST#_XDP
1 2
PCH_RTCX1
12
RH2
RH2
10M_0402_5%~D
10M_0402_5%~D
PCH_RTCX2
PCH_RTCRST#
SRTCRST#
INTRUDER#
PCH_INTVRMEN
PCH_AZ_BITCLK
PCH_AZ_SYNCPCH_AZ_SYNC_Q
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_MDC_SDIN1
PCH_AZ_SDOUT
PCH_GPIO33
PCH_GPIO13
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_SPI_CLK
10P_0402_50V8J~D
10P_0402_50V8J~D
PCH_SPI_CS0#
1
PCH_SPI_CS1#
CE15
CE15
2
PCH_SPI_DO
PCH_SPI_DIN
SPI_PCH_CS1#
SPI_PCH_DIN SPI_DIN32
SPI_PCH_CS1#_R
1 2
R936 47_0402_5%~DR936 47_0402_5%~D
1 2
R895 33_0402_5%~DR895 33_0402_5%~D
3
DDR_XDP_WAN_SMBDAT<7,12,13,15,27,34>
DDR_XDP_WAN_SMBCLK<7,12,13,15,27,34>
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
XDP_FN16
XDP_FN17
A20
C20
D20
G22
K22
C17
N34
K34
E34
G34
C34
A34
A36
C36
N32
+3.3V_ALW_PCH
1
2
1.05V_0.8V_PWROK<40,51>
SIO_PWRBTN#_R<7,16>
RH284 0_0402_5%~DPXDP@ RH284 0_0402_5%~DPXDP@
1 2
1 2
RH285 0_0402_5%~DPXDP@ RH285 0_0402_5%~DPXDP@
UH4A
UH4A
RTCX1
RTCX2
RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDO
HDA_DOCK_ EN# / GPIO3 3
HDA_DOCK_ RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
BD82HM77 SLJ8C C1_BGA989~D
BD82HM77 SLJ8C C1_BGA989~D
RTCIHDA
RTCIHDA
JTAG
JTAG
SPI
SPI
BBS_BIT0 - BIOS BOOT STRAP BIT 0
200 MIL SO8
32Mb Flash ROM
U53
U53
1
CS#
VCC
2
DO
HOLD#
3
WP#
CLK
4
GND
DI
W25Q32BVSSIG_SO8
W25Q32BVSSIG_SO8
PXDP@
PXDP@
CH1
CH1
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
RH283 1K_0402_1%~DPXDP@ RH283 1K_0402_1%~DPXDP@
1 2
1 2
RH21 0_0402_5%~DPXDP@ RH21 0_0402_5%~DPXDP@
DDR_XDP_WAN_SMBDAT_R2
DDR_XDP_WAN_SMBCLK_R2
FWH0 / L AD0
FWH1 / L AD1
FWH2 / L AD2
FWH3 / L AD3
LPC
LPC
FWH4 / L FRAME#
LDRQ1# / GPIO23
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA
SATA
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMP O
SATA3COMPI
SATA3RBIA S
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
+3.3V_SPI
8
SPI_HOLD#
7
6
5
SPI_DO32SPI_WP#_SEL_R
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
1.05V_0.8V_PWROK_R
PCH_PWRBTN#_XDP
C38
A38
B37
C37
D36
E36
LDRQ0#
K36
V5
SERIRQ
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
Y10
AB12
AB13
AH1
P3
V14
P1
C745
C745
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
1 2
R897 33_0402_5%~DR897 33_0402_5%~D
1 2
R900 33_0402_5%~DR900 33_0402_5%~D
SPI_CLK32SPI_CLK64
2
+3.3V_ALW_PCH
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A 0
11
OBSDATA_A 1
13
GND4
15
OBSDATA_A 2
17
OBSDATA_A 3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B 0
29
OBSDATA_B 1
31
GND10
33
OBSDATA_B 2
35
OBSDATA_B 3
37
GND12
39
PWRGOO D/HOOK0
41
HOOK1
43
VCC_OBS_ AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH-030-01-L-D-A
SAMTE_BSH-030-01-L-D-A
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
LPC_LDRQ1#
IRQ_SERIRQ
SATA_COMP
RH40 37.4_0402_1%~DRH40 37.4_0402_1%~D
SATA3_COMP
RH42 49.9_0402_1%~DRH42 49.9_0402_1%~D
RBIAS_SATA3
RH46 750_0402_1%~DRH46 750_0402_1%~D
SATA_ACT#
HDD_DET#_R
BBS_BIT0_R
QH1 BSS138W-7-F_SOT323-3~D
QH1 BSS138W-7-F_SOT323-3~D
PCH_PLTRST#<7,17>
SPI_PCH_CLKSPI_CLK32
SPI_PCH_DO
12
@
@
RE2
RE2
33_0402_5%~D
33_0402_5%~D
1
@
@
CE2
CE2
27P_0402_50V8J~D
27P_0402_50V8J~D
2
JXDP2
JXDP2
OBSFN_C0
OBSFN_C1
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSFN_D0
OBSFN_D1
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
ITPCLK/HOOK 4
ITPCLK#/HOO K5
VCC_OBS_ CD
RESET#/HOO K6
DBR#/HOOK 7
CONN@
CONN@
LPC_LAD0 <32,34,39,40>
LPC_LAD1 <32,34,39,40>
LPC_LAD2 <32,34,39,40>
LPC_LAD3 <32,34,39,40>
LPC_LFRAME# <32,34, 39,40>
LPC_LDRQ1# <39>
IRQ_SERIRQ <32,39,40>
PSATA_PRX_DTX_N0_C <27>
PSATA_PRX_DTX_P0_C <27>
PSATA_PTX_DRX_N0_C <27>
PSATA_PTX_DRX_P0_C <27>
SATA_ODD_PRX_DTX_N1_C <28>
SATA_ODD_PRX_DTX_P1_C <28>
SATA_ODD_PTX_DRX_N1_C <28>
SATA_ODD_PTX_DRX_P1_C <28>
ESATA_PRX_DTX_N4_C <36>
ESATA_PRX_DTX_P4_C <36>
ESATA_PTX_DRX_N4_C <36>
ESATA_PTX_DRX_P4_C <36>
SATA_PRX_DKTX_N5_C <38>
SATA_PRX_DKTX_P5_C <38>
SATA_PTX_DKRX_N5_C <38>
SATA_PTX_DKRX_P5_C <38>
1 2
1 2
1 2
SATA_ACT# <43>
D
D
1 3
G
G
2
1 2
RH290 0_0402_5%~D@ RH290 0_0402_5%~D@
S
S
JSPI1
JSPI1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
G1
18
G2
HRS_FH12-16S-0P5SH(55)~D
HRS_FH12-16S-0P5SH(55)~D
CONN@
CONN@
+1.05V_RUN
+1.05V_RUN
GND1
GND3
GND5
GND7
GND9
GND11
GND13
GND15
TD0
TRST#
TDI
TMS
GND17
SPI_PCH_CS1#
PCH_SPI_CS1#
SPI_PCH_DO
PCH_SPI_DO
SPI_PCH_DIN
PCH_SPI_DIN
SPI_PCH_CLK
PCH_SPI_CLK
SPI_PCH_CS0#
PCH_SPI_CS0#
+3.3V_RUN
+3.3V_M
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
1
XDP_FN16
XDP_FN17
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
RSMRST#_XDP
XDP_DBRESET#
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMSPCH_JTAG_TCK
PCH_GPIO33
RH355 100K_0402_5%~DRH355 100K_0402_5%~D
IRQ_SERIRQ
RH28 8.2K_0402_5%~DRH28 8.2K_0402_5%~D
BBS_BIT0_R
HDD
INTEL feedback 0302
ODD/ E Module Bay
SPKR
No Reboot Strap
SPKR
E-SATA
DOCK
PCH_GPIO13
+3.3V_RUN
12
RH30
RH30
10K_0402_5%~D
10K_0402_5%~D
PCH_SATA_MOD_EN# <40>
1 2
RH345 0_0402_5%~DRH345 0_0402_5%~D
1 2
RH346 0_0402_5%~DRH346 0_0402_5%~D
1 2
RH347 0_0402_5%~DRH347 0_0402_5%~D
1 2
RH348 0_0402_5%~DRH348 0_0402_5%~D
1 2
RH349 0_0402_5%~DRH349 0_0402_5%~D
+3.3V_M_RUN
1 2
RH360 0_0603_5%~DRH360 0_0603_5%~D
1 2
RH359 0_0603_5%~D@RH359 0_0603_5%~D@
1 2
RH350 0_0603_5%~DRH350 0_0603_5%~D
+3.3V_ALW_PCH
XDP_DBRESET# <7,16>
+3.3V_RUN
12
12
12
RH52 4.7K_0402_5%~DRH52 4.7K_0402_5%~D
+3.3V_RUN
12
RH35 10K_0402_5%~D@ RH35 10K_0402_5%~D@
Low = Default
High = No Reboot
+3.3V_ALW_PCH
12
R712 100K_0402_5%~DR712 100K_0402_5%~D
HDD_DET# <27>
+3.3V_SPI
+3.3V_M_RUN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (1/8)
PCH (1/8)
PCH (1/8)
LA-7902P
LA-7902P
LA-7902P
14 61Wednesday, March 07, 2012
14 61Wednesday, March 07, 2012
14 61Wednesday, March 07, 2012
1
1.0
1.0
1.0
Page 15
5
SIO_LAN_SMBCLK<30,40>
SIO_LAN_SMBDATA<30,40>
D D
PCIE_PRX_WANTX_N 1<34>
WWAN (Mini Card 1)--->
WLAN (Mini Card 2)--->
EXPRESS Card--->
1/2 MINI CARD-3 PCIE
(Mini Card 3)--->
C C
MMI --->
10/100/1G LAN --->
WWAN (Mini Card 1)--->
10/100/1G LAN --->
MMI--->
B B
PP (Mini Card 3)--->
Express card--->
WLAN (Mini Card 2)--->
A A
PCIE_PRX_WANTX_P 1<34>
PCIE_PTX_WANRX_N 1<34>
PCIE_PTX_WANRX_P 1<34>
PCIE_PRX_WLANTX_ N2<34>
PCIE_PRX_WLANTX_ P2<34>
PCIE_PTX_WLANRX_ N2<34>
PCIE_PTX_WLANRX_ P2<34>
PCIE_PRX_EXPTX_N3<35>
PCIE_PRX_EXPTX_P3<35>
PCIE_PTX_EXPRX_N3<35>
PCIE_PTX_EXPRX_P3<35>
PCIE_PRX_WPANTX _N5<34>
PCIE_PRX_WPANTX _P5<34>
PCIE_PTX_WPANRX _N5<34>
PCIE_PTX_WPANRX _P5<34>
PCIE_PRX_MMITX_N6<33>
PCIE_PRX_MMITX_P6<33>
PCIE_PTX_MMIRX_N6<33>
PCIE_PTX_MMIRX_P6<33>
PCIE_PRX_GLANTX_N7<30>
PCIE_PRX_GLANTX_P7<30>
PCIE_PTX_GLANRX_N7<30>
PCIE_PTX_GLANRX_P7<30>
CLK_PCIE_MINI1#<34>
CLK_PCIE_MINI1<34>
+3.3V_ALW_PCH
CLK_PCIE_MINI3#<34>
CLK_PCIE_MINI2#<34>
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
MINI1CLK_REQ#<34>
CLK_PCIE_LAN#<30>
CLK_PCIE_LAN<30>
LANCLK_REQ#<30>
CLK_PCIE_MMI#<33>
CLK_PCIE_MMI<33>
+3.3V_RUN
MMICLK_REQ#<33>
CLK_PCIE_MINI3<34>
+3.3V_ALW_PCH
MINI3CLK_REQ#<34>
CLK_PCIE_EXP#< 35>
CLK_PCIE_EXP<35>
+3.3V_ALW_PCH
EXPCLK_REQ#<35>
CLK_PCIE_MINI2<34>
MINI2CLK_REQ#<34>
+3.3V_ALW_PCH
CLK_CPU_ITP#<7>
CLK_CPU_ITP<7>
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
RH307 0_0402 _5%~D@RH307 0_0402_5%~D@
RH308 0_0402 _5%~D@RH308 0_0402_5%~D@
RH81 10K_0402_5%~DRH81 10K_0402_5%~D
RH82 0_0402_5%~D@ RH82 0_0402_5%~D@
RH83 0_0402_5%~D@ RH83 0_0402_5%~D@
RH85 0_0402_5%~D@ RH85 0_0402_5%~D@
RH86 0_0402_5%~D@ RH86 0_0402_5%~D@
RH87 10K_0402_5%~DRH87 10K_0402_5%~D
RH88 0_0402_5%~D@ RH88 0_0402_5%~D@
RH90 0_0402_5%~D@ RH90 0_0402_5%~D@
RH152 10K_0402_5%~DRH 152 10 K_0402_5%~D
RH92 0_0402_5%~D@ RH92 0_0402_5%~D@
RH93 0_0402_5%~D@ RH93 0_0402_5%~D@
RH94 10K_0402_5%~DRH94 10K_0402_5%~D
RH95 0_0402_5%~D@ RH95 0_0402_5%~D@
RH96 0_0402_5%~D@ RH96 0_0402_5%~D@
RH97 10K_0402_5%~DRH97 10K_0402_5%~D
RH98 10K_0402_5%~DRH98 10K_0402_5%~D
RH110 10K_0402_5%~DRH 110 10 K_0402_5%~D
RH104 10K_0402_5%~DRH 104 10 K_0402_5%~D
RH280 0_0402_5%~D@ RH280 0_0402_5%~D@
RH281 0_0402_5%~D@ RH281 0_0402_5%~D@
PCIE REQ power rail:
suspend: 0 3 4 5 6 7
core: 1 2
5
3
QH8B
QH8B
1 2
1 2
5
4
+3.3V_ALW_PCH
2
6 1
MEM_SMBCLK
QH8A
QH8A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MEM_SMBDATA
4
PCIE_PRX_WANTX_N 1
PCIE_PRX_WANTX_P 1
PCIE_PTX_WANRX_N 1
PCIE_PTX_WANRX_P 1
PCIE_PRX_WLANTX_ N2
PCIE_PRX_WLANTX_ P2
PCIE_PTX_WLANRX_ N2
PCIE_PTX_WLANRX_ P2
PCIE_PRX_EXPTX_N3
PCIE_PRX_EXPTX_P3
PCIE_PTX_EXPRX_N3
PCIE_PTX_EXPRX_P3
PCIE_PRX_WPANTX _N5
PCIE_PRX_WPANTX _P5
PCIE_PTX_WPANRX _N5
PCIE_PTX_WPANRX _P5
PCIE_PRX_MMITX_N6
PCIE_PRX_MMITX_P6
PCIE_PTX_MMIRX_N6
PCIE_PTX_MMIRX_P6
PCIE_PRX_GLANTX_N7
PCIE_PRX_GLANTX_P7
PCIE_PTX_GLANRX_N7
PCIE_PTX_GLANRX_P7
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
4
PCIE_MINI1#
PCIE_MINI1
MINI1CLK_REQ#
PCIE_LAN#
PCIE_LAN
LANCLK_REQ#
PCIE_MMI#
PCIE_MMI
MMICLK_REQ#
PCIE_MINI3#
PCIE_MINI3
MINI3CLK_REQ#
PCIE_EXP#
PCIE_EXP
EXPCLK_REQ#
PCIE_MINI2#
PCIE_MINI2
MINI2CLK_REQ#
PEG_B_CLKRQ#
PCIECLKRQ6#
PCIECLKRQ7#
CLK_BCLK_ITP#
CLK_BCLK_ITP
UH4B
UH4B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
BD82HM77 SLJ8C C1_BGA989~D
BD82HM77 SLJ8C C1_BGA989~D
3
PCH_SMB_ALERT#
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
XTAL25_IN
E12
H14
C9
A12
C8
G12
C13
E14
M16
M7
T11
P10
M10
AB37
AB38
AV22
AU22
AM12
AM13
BF18
BE18
BJ30
BG30
G24
E24
AK7
AK5
K45
H45
V47
V49
Y47
K43
F47
H47
K49
CLK_48M
SIO_14M
PCI_TPM_TCM
JETWAY_14M
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH
SML0CLK
SML0DATA
PCH_GPIO74
SML1_SMBCLK
SML1_SMBDATA
PCH_CL_CLK1
PCH_CL_DATA1
PCH_CL_RST1#
PEG_A_CLKRQ#
CLK_CPU_DMI#
CLK_CPU_DMI
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
CLK_PCI_LOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
PCI-E*
PCI-E*
CLOCKS
CLOCKS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
2
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH <7>
SML1_SMBCLK <30,40>
SML1_SMBDATA <30,40>
PCH_CL_CLK1 <34>
PCH_CL_DATA1 <34>
PCH_CL_RST1# <34>
RF review in 0913
CLK_CPU_DMI# <7>
CLK_CPU_DMI <7>
SIO_14M
RF review in 1130
CLK_PCI_LOOPBACK <17>
1 2
RH100 90.9_0402_1%~DRH100 90.9_0402_1%~D
RH322 22_0402_5%~DRH322 22_0402_5%~D
RH313 22_0402_5%~DRH313 22_0402_5%~D
RH311 10_0402_1%~D5@ RH311 10_0402_1%~D5@
RH314 10_0402_1%~DRH314 10_0402_1%~D
RH315 22_0402_5%~D@ RH315 22_0402_5%~D@
2
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
CLK_SMART_48M
10P_0402_50V8J~D
10P_0402_50V8J~D
CE19
CE19
+1.05V_RUN
12
12
12
12
12
+3.3V_RUN
5
QH5B
QH5B
@
@
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
6 1
4
10P_0402_50V8J~D
10P_0402_50V8J~D
1
CE18
CE18
2
QH5A
QH5A
SML1_SMBCLK
SML1_SMBDATA
DDR_HVREF_RST_PCH
PCH_GPIO74
MEM_SMBCLK
MEM_SMBDATA
PCH_SMB_ALERT#
PEG_A_CLKRQ#
SML0CLK
SML0DATA
PCH_CL_CLK1
CLK_PCI_LOOPBACK
@
@
1
DDR_XDP_WAN_ SMBCLK <7,12,13,14,27,34>
DDR_XDP_WAN_ SMBDAT <7,12,13,14,27,34>
1 2
RH298 2.2K_0402_5%~DRH298 2.2K_0402_5%~D
1 2
RH299 2.2K_0402_5%~DRH299 2.2K_0402_5%~D
RH300 1K_0402_1%~DRH300 1K_0402_1%~D
RH301 10K_0402_5%~DRH301 10K_0402_ 5%~D
RH302 2.2K_0402_5%~DRH302 2.2K_0402_5%~D
RH303 2.2K_0402_5%~DRH303 2.2K_0402_5%~D
RH304 10K_0402_5%~DRH304 10K_0402_ 5%~D
RH80 10K_0402_5%~DRH80 10K_0402_5%~D
RH305 2.2K_0402_5%~DRH305 2.2K_0402_5%~D
RH306 2.2K_0402_5%~DRH306 2.2K_0402_5%~D
10P_0402_50V8J~D
10P_0402_50V8J~D
1
CE16
CE16
CE17
CE17
@
@
2
RF review in 0629
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_DOT96#
1
2
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
RH74 10K_0402_5%~DRH74 10K_0402_5%~D
RH75 10K_0402_5%~DRH75 10K_0402_5%~D
RH91 10K_0402_5%~DRH91 10K_0402_5%~D
RH76 10K_0402_5%~DRH76 10K_0402_5%~D
RH77 10K_0402_5%~DRH77 10K_0402_5%~D
RH78 10K_0402_5%~DRH78 10K_0402_5%~D
RH79 10K_0402_5%~DRH79 10K_0402_5%~D
RH183 10K_0402_5%~DRH 183 10K_0402_5%~D
CLOCK TERMINATION for FCIM and need close to PCH
RH309 0_0402_5%~D@ RH309 0_0402_5%~D@
RH99
RH99
1M_0402_5%~D
1M_0402_5%~D
25MHZ_10PF_Q22FA2380049900~D
25MHZ_10PF_Q22FA2380049900~D
2
CH18
CH18
1
10P_0402_50V8J~D
10P_0402_50V8J~D
YH2
YH2
3
OUT
4
GND
CLK_SMART_48M <35>
CLK_SIO_14M <39>
CLK_PCI_TPM_TCM <32>
PCLK_80H < 34>
JETWAY_CLK14M <32>
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (2/8)
PCH (2/8)
PCH (2/8)
LA-7902P
LA-7902P
LA-7902P
1
12
12
12
12
12
12
12
12
10P_0402_50V8J~D
10P_0402_50V8J~D
1
2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
12
IN
GND
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
1
2
2
1
15 61W ednesday, March 07, 2012
15 61W ednesday, March 07, 2012
15 61W ednesday, March 07, 2012
CH19
CH19
10P_0402_50V8J~D
10P_0402_50V8J~D
1.0
1.0
1.0
Page 16
5
+3.3V_ALW_PCH
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_COMP_R
RBIAS_CPY
SUSACK#_R
SYS_RESET#
SYS_PWROK_R
PCH_PWROK
PM_APWROK_R
PM_DRAM_PWRGD_R
PCH_RSMRST#_R
ME_SUS_PWR_ACK_R
SIO_PWRBTN#_R
AC_PRESENT
PCH_BATLOW#
PCH_RI#
SUS_STAT#/LPCPD#
ME_SUS_PWR_ACK
PCH_PCIE_WAKE#
SIO_SLP_LAN#
PCH_RI#
CLKRUN#
ME_RESET#
UH4C
UH4C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
BD82HM77 SLJ8C C1_BGA989~ D
BD82HM77 SLJ8C C1_BGA989~ D
1 2
RH318 10K_0402_5%~D@ RH318 10K_0402_5%~D@
1 2
RH144 10K_0402_5%~DRH144 10K_0402_5%~D
D D
+3.3V_RUN
C C
+1.05V_RUN
1 2
RH111 49.9_0402_1%~ DRH111 49.9_0402_1%~D
1 2
RH112 750_0402_1%~DRH112 75 0_0402_1%~D
SUSACK#<39> PCH_DPWROK < 39>
B B
SYS_PWROK<7 ,39>
RESET_OUT#<40>
PM_DRAM_PWRGD<7>
PCH_RSMRST#_Q<1 4,41>
ME_SUS_PWR_ACK<40>
SIO_PWRBTN#_R<7,14>
SIO_PWRBTN#<40>
AC_PRESENT<40>
+3.3V_ALW_PCH
A A
1 2
RH142 10K_0402_5%~DRH142 10K_0402_5%~D
1 2
RH319 10K_0402_5%~D@ RH319 10K_0402_5%~D@
1 2
RH140 10K_0402_5%~DRH140 10K_0402_5%~D
1 2
RH137 8 .2K_0402_5%~DRH137 8.2K_0402 _5%~D
1 2
RH138 8 .2K_0402_5%~D@ RH138 8.2K_0402 _5%~D@
DMI_CTX_PRX_N0<6>
DMI_CTX_PRX_N1<6>
DMI_CTX_PRX_N2<6>
DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P0< 6>
DMI_CTX_PRX_P1< 6>
DMI_CTX_PRX_P2< 6>
DMI_CTX_PRX_P3< 6>
DMI_CRX_PTX_N0<6>
DMI_CRX_PTX_N1<6>
DMI_CRX_PTX_N2<6>
DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P0< 6>
DMI_CRX_PTX_P1< 6>
DMI_CRX_PTX_P2< 6>
DMI_CRX_PTX_P3< 6>
1 2
RH114 0_0402_5%~D@ RH114 0_0402_5%~D@
1 2
RH116 0_0402 _5%~D@ RH116 0_0402_5%~D@
1 2
RH321 0_0402 _5%~D@RH321 0_0402 _5%~D@
1 2
RH117 0_0402 _5%~D@ RH117 0_0402_5%~D@
1 2
RH119 0_0402 _5%~D@RH119 0_0402 _5%~D@
1 2
RH320 0_0402_5%~D@ RH320 0_0402_5%~D@
1 2
RH120 0_0402_5%~D@ RH120 0_0402_5%~D@
1 2
RH121 0_0402_5%~D@ RH121 0_0402_5%~D@
1 2
RH122 0_0402_5%~D@ RH122 0_0402_5%~D@
1 2
RH139 8.2K_0402_5%~DRH139 8.2K_0402_5%~D
XDP_DBRESET#<7,14>
4
Follow E4
RH357 0 _0402_5%~DRH357 0_0402_5%~D
1 2
ME_RESET#
12
RH141 8 .2K_0402_5%~D@ RH141 8.2K_0402 _5%~D@
PCH_DPWROK PCH_RSMRST#_R
ME_SUS_PWR_ACK_R SUSACK#_R
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
DMI
DMI
System Power Management
System Power Management
FDI_RXP7
FDI
FDI
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_S4#
SLP_S3#
SLP_SUS#
PMSYNCH
SLP_LAN# / GPIO29
FDI_INT
WAKE#
SLP_A#
RH113 0_0402_5%~D@ RH113 0_0402_5%~D@
RH323 0_0402_5%~D@ RH323 0_0402_5%~D@
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
1 2
1 2
+3.3V_RUN
5
UC3
@UC3
@
1
P
B
2
A
G
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWODVREN
PCH_DPWROK
PCH_PCIE_WAKE#
CLKRUN#
SUS_STAT#/LPCPD#
SUSCLK
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_A#
SIO_SLP_SUS#
H_PM_SYNC
SIO_SLP_LAN#
CH99
@CH99
@
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4
O
RH127 330K_0402_1%~DRH127 330K_0402_1%~D
1 2
RH129 330K_0402_1%~D@RH12 9 330K_0 402_1%~D@
1 2
SYS_RESET#
FDI_CTX_PRX_N0 <6>
FDI_CTX_PRX_N1 <6>
FDI_CTX_PRX_N2 <6>
FDI_CTX_PRX_N3 <6>
FDI_CTX_PRX_N4 <6>
FDI_CTX_PRX_N5 <6>
FDI_CTX_PRX_N6 <6>
FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6>
FDI_CTX_PRX_P1 <6>
FDI_CTX_PRX_P2 <6>
FDI_CTX_PRX_P3 <6>
FDI_CTX_PRX_P4 <6>
FDI_CTX_PRX_P5 <6>
FDI_CTX_PRX_P6 <6>
FDI_CTX_PRX_P7 <6>
FDI_INT <6>
FDI_FSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC0 <6>
FDI_LSYNC1 <6>
PCH_PCIE_WAKE# <40>
CLKRUN# <32,39,40>
T56 PAD~D @T56 PAD~D @
T57 PAD~D @T57 PAD~D @
T58 PAD~D @T58 PAD~D @
SIO_SLP_S5# <40,42>
T59 PAD~D @T59 PAD~D @
SIO_SLP_S4# <39,42,46>
SIO_SLP_S3# <11,27,35,39,42,47,48,4 9>
SIO_SLP_A# <39,42,48>
T62 PAD~D @T62 PAD~D @
SIO_SLP_SUS# <39>
T63 PAD~D @T63 PAD~D @
H_PM_SYNC <7>
SIO_SLP_LAN# <30,39>
3
1 2
RH131 150 _0402_1%~DRH131 150_0402_ 1%~D
1 2
RH132 150 _0402_1%~DRH132 150_0402_ 1%~D
1 2
RH133 150 _0402_1%~DRH133 150_0402_ 1%~D
1 2
RH134 100 K_0402_5%~DRH134 100 K_0402_5%~D
DSWODVREN - On Die DSW VR Enable
Enabled (DEFAULT)
HIGH: RH127 STUFFED,
RH129 UNSTUFFED
Disabled
LOW: RH129 STUFFED,
RH127 UNSTUFFED
PANEL_BKEN_PCH<24>
ENVDD_PCH<24,39 >
BIA_PWM_PCH<2 4>
LDDC_CLK_PCH<24>
LDDC_DATA_PCH<24>
1 2
Minimum speacing of 20mils for LVD_IBG
+RTC_CELL
PCH_CRT_HSYNC<23>
PCH_CRT_VSYNC<23>
RH344 2.3 7K_0402_1%~DRH344 2.3 7K_0402_1%~D
LCD_ACLK-_PCH<24>
LCD_ACLK+_PCH<24>
LCD_A0-_PCH< 24>
LCD_A1-_PCH< 24>
LCD_A2-_PCH< 24>
LCD_A0+_PCH< 24>
LCD_A1+_PCH< 24>
LCD_A2+_PCH< 24>
LCD_BCLK-_PCH<24>
LCD_BCLK+_PCH<24>
LCD_B0-_PCH< 24>
LCD_B1-_PCH< 24>
LCD_B2-_PCH< 24>
LCD_B0+_PCH< 24>
LCD_B1+_PCH< 24>
LCD_B2+_PCH< 24>
PCH_CRT_BLU<23>
PCH_CRT_GRN<23>
PCH_CRT_RED<23>
RH123 20_0402_1%~DRH123 20 _0402_1%~D
1 2
1 2
RH124 20_0402_1%~DRH124 20 _0402_1%~D
1K_0402_0.5%~D
1K_0402_0.5%~D
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
PANEL_BKEN_PCH
ENVDD_PCH
BIA_PWM_PCH
LDDC_CLK_PCH
LDDC_DATA_PCH
LVD_IBG
LCD_ACLK-_PCH
LCD_ACLK+_PCH
LCD_A0-_PCH
LCD_A1-_PCH
LCD_A2-_PCH
LCD_A0+_PCH
LCD_A1+_PCH
LCD_A2+_PCH
LCD_BCLK-_PCH
LCD_BCLK+_PCH
LCD_B0-_PCH
LCD_B1-_PCH
LCD_B2-_PCH
LCD_B0+_PCH
LCD_B1+_PCH
LCD_B2+_PCH
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
HSYNC
VSYNC
CRT_IREF
12
RH126
RH126
2
+3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
PM_APWROK<40>
12
RH316
RH316
SIO_SLP_A#
PM_APWROK
2.2K_0402_5%~D
2.2K_0402_5%~D
12
RH317
RH317
Intel request DDPB can not support eDP
UH4D
UH4D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
BD82HM77 SLJ8C C1_BGA989~ D
BD82HM77 SLJ8C C1_BGA989~ D
LVDS
LVDS
Digital Display Interface
Digital Display Interface
CRT
CRT
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
+3.3V_ALW2
1
B
2
A
1 2
RH118 0_0402_5%~D@ RH118 0_0402_5%~D@
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
1 2
CH108 0.1U_0402_25V6K~DCH1 08 0.1U_0402_25V6K~D
UH5
UH5
5
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
P
PM_APWROK_R
4
O
G
3
AP43
AP45
AM42
AM40
AP39
AP40
PCH_SDVO_CTRLCLK
P38
PCH_SDVO_CTRLDATA
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
1
PCH_CRT_DDC_CLK <23>
PCH_CRT_DDC_DAT <2 3>
PCH_SDVO_CTRLCLK
PCH_SDVO_CTRLDATA
HDMIB_PCH_HPD <25>
TMDSB_PCH_N2 <25>
TMDSB_PCH_P2 <25>
TMDSB_PCH_N1 <25>
TMDSB_PCH_P1 <25>
TMDSB_PCH_N0 <25>
TMDSB_PCH_P0 <25>
TMDSB_PCH_CLK# <25>
TMDSB_PCH_CLK <25>
PCH_DDPC_CTRLCLK <26>
DPC_PCH_DOCK_AUX# <2 6>
DPC_PCH_DOCK_AUX <26 >
DPC_PCH_DOCK_HPD <38>
DPC_PCH_LANE_N0 <3 8>
DPC_PCH_LANE_P0 <38>
DPC_PCH_LANE_N1 <3 8>
DPC_PCH_LANE_P1 <38>
DPC_PCH_LANE_N2 <3 8>
DPC_PCH_LANE_P2 <38>
DPC_PCH_LANE_N3 <3 8>
DPC_PCH_LANE_P3 <38>
PCH_DDPD_CTRLCLK <26>
DPD_PCH_DOCK_AUX# <2 6>
DPD_PCH_DOCK_AUX <26 >
DPD_PCH_DOCK_HPD <38>
DPD_PCH_LANE_N0 <3 8>
DPD_PCH_LANE_P0 <38>
DPD_PCH_LANE_N1 <3 8>
DPD_PCH_LANE_P1 <38>
DPD_PCH_LANE_N2 <3 8>
DPD_PCH_LANE_P2 <38>
DPD_PCH_LANE_N3 <3 8>
DPD_PCH_LANE_P3 <38>
RH351 2.2K_0402_5%~DRH351 2.2K_0402_5%~D
RH352 2.2K_0402_5%~DRH352 2.2K_0402_5%~D
PCH_SDVO_CTRLCLK <25 >
PCH_SDVO_CTRLDATA <25>
PCH_DDPC_CTRLDATA <26>
PCH_DDPD_CTRLDATA <26>
+3.3V_RUN
12
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sh eet of
Date: Sh eet of
Date: Sh eet of
Compal Electronics, Inc.
PCH (3/8)
PCH (3/8)
PCH (3/8)
LA-7902P
LA-7902P
LA-7902P
1
16 61Wednesday, March 07, 2012
16 61Wednesday, March 07, 2012
16 61Wednesday, March 07, 2012
1.0
1.0
1.0
Page 17
+3.3V_RUN
5
4
3
2
1
PLTRST_MMI#<33>
PLTRST_XDP#<7>
PLTRST_LAN#<30>
PCH_PLTRST#
5
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
LCD_CBL_DET#
CAM_MIC_CBL_DET#
BT_DET#
PCH_GPIO3
PCIE_MCARD2_DET#
+3.3V_RUN
5
1
P
B
2
A
G
3
HDD_FALL_INT<27>
1 2
RH336 0_0402_5%~D@RH336 0_0402_5%~D@
1 2
RH337 0_0402_5%~DRH337 0_0402_5%~D
1 2
RH338 0_0402_5%~D@RH338 0_0402_5%~D@
CLK_PCI_5048<39>
CLK_PCI_MEC<40>
CLK_PCI_DOCK<38>
CLK_PCI_LOOPBACK<15>
CH102
CH102
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
UH3
UH3
PCH_PLTRST#_EC
4
O
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
USB3RN2<36>
USB3RN3<36>
USB3RN4<38>
USB3RP2<3 6>
USB3RP3<3 6>
USB3RP4<3 8>
USB3TN2<36>
USB3TN3<36>
USB3TN4<38>
USB3TP2<36>
USB3TP3<36>
USB3TP4<38>
PCIE_MCARD2_DET#<34>
BT_DET#< 41>
LCD_CBL_DET#<24>
CAM_MIC_CBL_DET#<24>
1 2
RH334 0_0402_5%~D@ RH334 0_0402_5%~D@
RH160 22_0402_5%~DRH160 22_0402_5%~D
RH102 22_0402_5%~DRH102 22_0402_5%~D
RH103 22_0402_5%~DRH103 22_0402_5%~D
RH105 22_0402_5%~DRH105 22_0402_5%~D
PCH_PLTRST#_EC <32,34,35,39,40>
12
12
12
12
4
T72PAD~D @T72PAD~D @
T64PAD~D @T64PAD~D @
T73PAD~D @T73PAD~D @
T65PAD~D @T65PAD~D @
T74PAD~D @T74PAD~D @
T66PAD~D @T66PAD~D @
T67PAD~D @T67PAD~D @
T75PAD~D @T75PAD~D @
T76PAD~D @T76PAD~D @
T77PAD~D @T77PAD~D @
T68PAD~D @T68PAD~D @
T69PAD~D @T69PAD~D @
T78PAD~D @T78PAD~D @
T79PAD~D @T79PAD~D @
T80PAD~D @T80PAD~D @
T70PAD~D @T70PAD~D @
T81PAD~D @T81PAD~D @
T71PAD~D @T71PAD~D @
T82PAD~D @T82PAD~D @
T83PAD~D @T83PAD~D @
T84PAD~D @T84PAD~D @
T85PAD~D @T85PAD~D @
T86PAD~D @T86PAD~D @
T87PAD~D @T87PAD~D @
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
BT_DET#
BBS_BIT1
PCI_GNT3#
LCD_CBL_DET#
PCH_GPIO3
CAM_MIC_CBL_DET#
FFS_PCH_INT
T104PAD~D @T104PAD~D @
PCH_PLTRST#
PCI_5048
PCI_MEC
PCI_DOCK
PCI_LOOPBACKOUT
UH4E
UH4E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
USB3Rn1
BC30
USB3Rn2
BE32
USB3Rn3
BJ32
USB3Rn4
BC28
USB3Rp1
BE30
USB3Rp2
BF32
USB3Rp3
BG32
USB3Rp4
AV26
USB3Tn1
BB26
USB3Tn2
AU28
USB3Tn3
AY30
USB3Tn4
AU26
USB3TP1
AY26
USB3Tp2
AV28
USB3Tp3
AW30
USB3Tp4
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
BD82HM77 SLJ8C C1_BGA989~D
BD82HM77 SLJ8C C1_BGA989~D
RSVD
RSVD
USB30
USB30
PCI
PCI
USB
USB
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
Boot BIOS Strap
BBS_BIT1 Boot BIOS Location
*
SATA_SLPD
(BBS_BIT0)
0 0
0 1
1 0
1 1
LPC
Reserved (NAND)
PCI
SPI
3
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
USBP0ÂUSBP0+
USBP1ÂUSBP1+
USBP2ÂUSBP2+
USBP3ÂUSBP3+
USBP4ÂUSBP4+
USBP5ÂUSBP5+
USBP6ÂUSBP6+
USBP7ÂUSBP7+
USBP8ÂUSBP8+
USBP9ÂUSBP9+
USBP10ÂUSBP10+
USBP11ÂUSBP11+
USBP12ÂUSBP12+
USBP13ÂUSBP13+
USBRBIAS
USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#_R
USB_OC5#
USB_OC6#
USBP0- <37>
USBP0+ <37>
USBP1- <36>
USBP1+ <36>
USBP2- <36>
USBP2+ <36>
USBP3- <38>
USBP3+ <38>
USBP4- <34>
USBP4+ <34>
USBP5- <34>
USBP5+ <34>
USBP6- <34>
USBP6+ <34>
USBP7- <38>
USBP7+ <38>
USBP9- <37>
USBP9+ <37>
USBP10- <35>
USBP10+ <35>
USBP11- <41>
USBP11+ <41>
USBP12- <24>
USBP12+ <24>
USBP13- <32>
USBP13+ <32>
1 2
RH151
RH151
22.6_0402_1%~D
22.6_0402_1%~D
Route single-end 50-ohms and max 500-mils length.
Minimum spacing to other signals: 15 mils
1 2
RH339 0_0402_5%~D@RH339 0_0402_5%~D@
1 2
RH341 0_0402_5%~D@RH341 0_0402_5%~D@
1 2
RH356 0_0402_5%~D@RH356 0_0402_5%~D@
SIO_EXT_SMI#
BBS_BIT1
----->Back Right--JIO1
----->Left Side
----->Left side JESA1
----->MLK DOCK
----->WLAN/WIMAX
----->WWAN/UWB
----->Flash
----->DOCK
----->Non used
----->Right side--JAUD1
----->Express Card
----->Blue Tooth
----->Camera
----->BIO
USB_OC0# <36,37>
USB_OC1# <36>
USB_OC2# <14>
USB_OC3# <14>
USB_OC4# <37>
USB_OC5# <14>
USB_OC6# <14>
SIO_EXT_SMI# <14,40>
USB_OC0#_R <14>
USB_OC1#_R <14>
USB_OC4#_R <14>
12
RH342
@RH342
@
1K_0402_1%~D
1K_0402_1%~D
2
+3.3V_ALW_PCH
RPH1
USB_OC2#
USB_OC1#_R
USB_OC6#
USB_OC4#_R
USB_OC5#
USB_OC3#
SIO_EXT_SMI#
USB_OC0#_R
RPH1
4 5
3 6
2 7
1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
RPH2
RPH2
4 5
3 6
2 7
1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (4/8)
PCH (4/8)
PCH (4/8)
LA-7902P
LA-7902P
LA-7902P
17 61W ednesday, March 07, 2012
17 61W ednesday, March 07, 2012
17 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
1 2
D D
C C
RH324 8.2K_0402_5%~DRH324 8.2K_0402_5%~D
1 2
RH325 8.2K_0402_5%~DRH325 8.2K_0402_5%~D
1 2
RH326 8.2K_0402_5%~DRH326 8.2K_0402_5%~D
1 2
RH329 8.2K_0402_5%~DRH329 8.2K_0402_5%~D
1 2
RH327 10K_0402_5%~DRH327 10K_0402_5%~D
1 2
RH330 10K_0402_5%~DRH330 10K_0402_5%~D
1 2
RH331 10K_0402_5%~DRH331 10K_0402_5%~D
1 2
RH328 10K_0402_5%~DRH328 10K_0402_5%~D
1 2
RH332 10K_0402_5%~DRH332 10K_0402_5%~D
1 2
RH361 10K_0402_5%~DRH361 10K_0402_5%~D
PCI_GNT3#
12
RH333
@RH333
@
1K_0402_1%~D
1K_0402_1%~D
A16 swap overri de Strap/Top-B lock
Swap Override jumper
PCI_GNT#3
B B
Low = A16 swap
High = Default
Reserve fo r ESD in 6 /22
PCH_PLTRST#
1
CE10
CE10
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
@
@
A A
PCH_PLTRST#<7,14>
Page 18
5
4
3
2
1
+3.3V_ALW_PCH
RH53
RH53
4.7K_0402_5%~D
D D
C C
B B
A A
4.7K_0402_5%~D
1 2
SLP_ME_CSW_DE V#
12
RH353
RH353
1K_0402_1%~D
1K_0402_1%~D
@
@
Note: PCH has internal pull up 20k ohm on
E3_PAID_TS_DET# (GPIO27)
SLP_ME_CSW_DEV# PLL ON DIE VR ENABLE
ENABLED - HIGH DEFAULT
DISABLED - LOW
+3.3V_ALW_PCH
SIO_EXT_WAKE# PCH_GPIO1
RH177 10K_0402_5%~DRH177 10K_0402_5%~D
RH354 1K_0402_1%~DRH354 1K_0402_1%~D
RH179 10K_0402_5%~DRH179 10K_0402_5%~D
RH180 10K_0402_5%~DRH180 10K_0402_5%~D
+3.3V_ALW_PCH
RH170 10K_0402_5%~DRH170 10K_0402_5%~D
+3.3V_RUN
RH171 10K_0402_5%~D@ RH171 10K_0402_5%~D@
RH173 1K_0402_1%~D@RH173 1K_0402_1%~D@
1 2
RH272 10K_0402_5%~DRH272 10K_0402_5%~D
RH266 10K_0402_5%~DRH266 10K_0402_5%~D
RH181 10K_0402_5%~DRH181 10K_0402_5%~D
RH178 10K_0402_5%~DRH178 10K_0402_5%~D
1 2
RH269 8.2K_0402_5%~DRH269 8.2K_0402_5%~D
1 2
RH163 10K_0402_5%~DRH163 10K_0402_5%~D
RH182 10K_0402_5%~DRH182 10K_0402_5%~D
12
PM_LANPHY_ENABLE
12
12
12
12
12
12
KB_DET#
12
PCH_GPIO36
12
PCH_GPIO37
12
PCH_GPIO16
TEMP_ALERT#
12
MEDIA_DET#
12
LED_B_DET#
12
PCH_GPIO17
IO_LOOP#
12
PCH_GPIO15
PCH_GPIO27
PCH_GPIO36
PCH_GPIO37
PCH_GPIO17
PCH_GPIO16
PCH_GPIO34
1 2
RH174 10K_0402_5%~DRH174 10K_0402_5%~D
RH172 10K_0402_5%~DRH172 10K_0402_5%~D
RH273 1K_0402_1%~D@RH273 1K_0402 _1%~D@
RH265 10K_0402_5%~D@ RH265 10K_0402_5%~D@
SIO_EXT_SCI#_R<14>
SIO_EXT_SCI#<40>
SIO_EXT_WAKE#<39>
vPro only- --
PCH_GPIO15<14>
PCH_GPIO16<14>
MEDIA_DET#<37 >
PCIE_MCARD1_DET#<34>
SLP_ME_CSW_DE V#<14,39>
USB_MCARD1_DET#<14,34>
PCH_GPIO36<14>
PCH_GPIO37<14>
TEMP_ALERT#<14,39>
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
+3.3V_RUN
TPM_ID0
FFS_INT2<27>
KB_DET#<41>
RH267
1@ RH267
1@
10K_0402_5%~D
10K_0402_5%~D
1 2
RH270
2@ RH270
2@
10K_0402_5%~D
10K_0402_5%~D
1 2
SIO_EXT_SCI#
1 2
RH259 0_0402_5%~D@ RH259 0_040 2_5%~D@
PCH_GPIO1
IO_LOOP#
LED_B_DET#
PM_LANPHY_ENABLE
PCH_GPIO15
PCH_GPIO16
PCH_GPIO17
MEDIA_DET#
PCH_GPIO27
SLP_ME_CSW_DE V#
PCH_GPIO34
USB_MCARD1_DET#
PCH_GPIO36
PCH_GPIO37
TPM_ID0
TPM_ID1
FFS_INT2
TEMP_ALERT#
KB_DET#
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
+3.3V_RUN
12
3@ RH268
3@
TPM_ID1
12
4@ RH271
4@
T7
A42
H36
E38
C10
C4
G2
U2
D40
T5
E8
E16
P8
K1
K4
V8
M5
N2
M3
V13
V3
D6
A4
A44
A45
A46
A5
A6
B3
B47
BD1
BD49
BE1
BE49
BF1
BF49
RH268
20K_0402_5%~D
20K_0402_5%~D
RH271
2.2K_0402_5%~D
2.2K_0402_5%~D
UH4F
UH4F
BMBUSY# / GPIO0
TACH1 / GPIO1
TACH2 / GPIO6
TACH3 / GPIO7
GPIO8
LAN_PHY_PWR_CTRL / GPIO12
GPIO15
SATA4GP / GPIO16
TACH0 / GPIO17
SCLOCK / GPIO22
GPIO24
GPIO27
GPIO28
STP_PCI# / GPIO34
GPIO35
SATA2GP / GPIO36
SATA3GP / GPIO37
SLOAD / GPIO38
SDATAOUT0 / GPIO39
SDATAOUT1 / GPIO48
SATA5GP / GPIO49 / TEMP_ALERT#
GPIO57
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
BD82HM77 SLJ8C C1_BGA989~D
BD82HM77 SLJ8C C1_BGA989~D
China TPM
No TPM, No China TPM
TBD
TPM
CONTACTLESS_DET#
A20GATE
PECI
RCIN#
THRMTRIP#
INIT3_3V#
DF_TVS
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
PCH_GPIO69
PCIE_MCARD3_DET#
SIO_A20GATE
SIO_RCIN#
H_CPUPWRGD
PCH_THRMTRIP#_R
INIT3_3V#
DF_TVS
NC_1
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
PCIE_MCARD3_DET# <34>
USB_MCARD2_DET# <34>
SIO_A20GATE <40>
SIO_RCIN# <40>
H_CPUPWRGD <7>
T106PAD~D@T106PAD~D
@
T108PAD~D @T108PAD~D @
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
1
2
H_SNB_IVB#<7>
+1.05V_RUN_VTT
12
RH262 56_0402_5%~DRH262 56_0402_5%~D
CH97
CH97
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
RH150 0_0402_5%~D@ RH150 0_0402_5%~D@
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
PROCPWRGD
GPIO
GPIO
CPU/MISC
CPU/MISC
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
NCTF
NCTF
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
TPM_ID1TPM_ID0
0
0
0
1
1 1
Intel revi ew feedbac k in 0701
5
4
3
2
CONTACTLESS_DET#
PCH_GPIO69
RH256 10K _0402_5%~DRH256 10K_0402_5%~D
1 2
RH260 1.5K_0402 _1%~DRH260 1.5K_0402_1%~D
SIO_A20GATE
SIO_RCIN#
SIO_EXT_SCI#
PLACE RH150 CLO SE TO THE BRAN CHING POINT
( TO CPU and NV RAM CONNECTOR)
+VCCDFTERM
12
RH158 10K_0402_5%~DRH158 10K_0402_5%~D
RH203 10K_0402_5%~DRH203 10K_0402_5%~D
1 2
RH263 10K_0402_5%~DRH263 10K_0402_5%~D
1 2
RH164 100K_0402_5%~DRH164 100K_0402_5%~D
RH149 need to close to CPU
RH149
RH149
2.2K_0402_5%~D
2.2K_0402_5%~D
1 2
RH358 1K_0402_1%~DRH358 1K _0402_1%~D
DMI & FDI Termination Voltage
DF_TVS
Set to Vss when LOW
Set to Vcc when HIGH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (5/8)
PCH (5/8)
PCH (5/8)
LA-7902P
LA-7902P
LA-7902P
+3.3V_RUN
12
+3.3V_RUN
12
12
DF_TVSDF_TVS_R
1.0
1.0
18 61W ednesday, March 07, 2012
18 61W ednesday, March 07, 2012
18 61W ednesday, March 07, 2012
1
1.0
Page 19
5
4
3
2
1
LH1
POWER
+1.05V_RUN
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CH30
CH30
D D
+1.05V_RUN
+1.05V_RUN
C C
+3.3V_RUN
B B
@ RH247
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
1 2
RH247
CH51
CH51
2
+1.05V_RUN
1UH_LB2012T1R0M_20%~D
1UH_LB2012T1R0M_20%~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH44
CH44
CH45
CH45
2
2
+1.05V_RUN
+1.05V_RUN_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
2
1
2
+1.05V_+1.5V_1.8V_RUN
CH33
CH33
CH32
CH32
2
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH46
CH46
CH47
CH47
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH31
CH31
2
+VCCAPLLEXP
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@
@
CH40
CH40
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH48
CH48
+VCCAPLL_FDI
UH4G
UH4G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
BD82HM77 SLJ8C C1_BGA989~D
BD82HM77 SLJ8C C1_BGA989~D
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRTLVDS
CRTLVDS
DMI
DMI
DFT / SPI HVCMOS
DFT / SPI HVCMOS
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
VCCSPI
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
+VCCADAC
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
CH34
CH34
2
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
CH103
CH103
2
1
CH43
CH43
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VCCCLKDMI
1
CH50
CH50
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
+VCCDFTERM
1
CH52
CH52
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+VCCSPI
1
CH54
CH54
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 2
LH1
1UH_GLFR1608T1R0M-LR_20%~D
1UH_GLFR1608T1R0M-LR_20%~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CH35
CH35
CH36
CH36
2
+1.8V_RUN_LVDS
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
CH104
CH104
2
+3.3V_RUN
CH49
CH49
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
RH205 0_0603_5%~D@ RH205 0_0603_5%~D@
@
@
1
CH106
CH106
2
RH276 0_0805_5%~D@ RH276 0_0805_5%~D@
PJP66
@PJP66
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
short
RH202 0_0603_5%~D@ RH202 0_060 3_5%~D@
RH204 0_0603_5%~D@ RH204 0_0603_5%~D@
INTEL feedback 0307
12
+3.3V_RUN
100NH_HK1608R10J-T_5%_0603~D
100NH_HK1608R10J-T_5%_0603~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH105
CH105
1
2
+1.05V_RUN_VTT
12
INTEL feedback 0302
12
12
12
LH8
LH8
12
0.1uH inductor, 200mA
CPN: SHI0110BJ0L
+1.05V_RUN
+3.3V_RUN
+1.8V_RUN
+3.3V_M
+3.3V_RUN
+3.3V_RUN
+1.8V_RUN
PCH Power Rail Table
Voltage Rail
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC3
VccADPLLA
VccADPLLB
VccCore
VccDMI
Voltage
1.05
3.3
3.3
1.05
1.05
1.05
1.05
S0 Iccmax
Current (A)
0.001
5
5
0.001
0.001
0.288
0.063
0.08
0.08
1.7
0.047
1.05VccIO 3.711
VccASW
VccSPI
VccDSW3_3 0.001
1.05
3.3
3.3
0.903
0.01
1.8 0.002VCCDFTERM
3.3VccRTC 6uA
3.3VccSus 3_3
3.3VccSus HDA
0.126
0.01
VccVRM 1.8 / 1.5 0.167
1.05VccClkDMI 0.07
1.05VccSSC
VccDIFFCLKN 0.055
1.05
VccALVDS 3.3
0.095
0.001
1.8VccTX_ LVDS 0.04
+1.05V_RUN
+VCCAPLL_FDI
1 2
RH195 0.022_0805_1%@RH 195 0.022_0805_1%@
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
RH197 0_0603_5%~D@ RH197 0_060 3_5%~D@
A A
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (6/8)
PCH (6/8)
PCH (6/8)
LA-7902P
LA-7902P
LA-7902P
19 61W ednesday, March 07, 2012
19 61W ednesday, March 07, 2012
19 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 20
5
4
3
2
1
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW2
D D
+1.05V_RUN
C C
+3.3V_RUN
1 2
RH215 0.022_0805_ 1%RH215 0.022_0805_1%
B B
+1.05V_M
RH248 0.022_0805_ 1%@RH248 0.022_0805_1%@
A A
+1.05V_RUN
1 2
+1.05V_M_VCCSUS
+1.05V_RUN_VTT
1 2
RH201 0_0402_5%~DRH201 0_0402_5%~D
1 2
RH253 0_0402_5%~D@ RH253 0_040 2_5%~D@
LH3
@ LH3
@
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
+1.05V_RUN
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
5
+1.05V_M
LH6
LH6
1 2
1 2
LH7
LH7
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
+1.05V_RUN
@
@
CH58
CH58
2
+3.3V_RUN_VCC_CLKF33
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
@
@
CH73
CH73
2
1
CH96
CH96
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
CH85
CH85
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1
CH94
CH94
+
+
2
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
1 2
RH200 0.022_0805_ 1%@RH200 0.022_0805_1%@
CH55
CH55
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
@
@
CH57
CH57
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH64
CH64
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH67
CH67
2
CH74
CH74
1
CH78
CH78
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
CH79
CH79
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 2
1
CH84
CH84
2
1
1
CH87
CH87
CH86
CH86
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH92
CH92
1U_0402_6.3V6K~D
1
CH95
CH95
CH93
CH93
1
+
+
2
2
+VCCACLK
1
2
1
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH65
CH65
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH68
CH68
2
2
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
CH81
CH81
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
+VCCSST
+1.05V_M_VCCSUS
1
CH83
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
+RTC_CELL
1
2
4
+VCCDSW3_3
+PCH_VCCDSW
+3.3V_RUN_VCC_CLKF33
+VCCAPLL_CPY_PCH
+VCCSUS1
@
@
CH61
CH61
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH69
CH69
+VCCRTCEXT
@CH83
@
1
CH89
CH89
CH88
CH88
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
UH4J
UH4J
AD49
T16
V12
T38
BH23
AL29
AL24
AA19
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
AC29
AC31
AD29
AD31
W21
W23
W24
W26
W29
W31
W33
N16
Y49
BD47
BF47
AF17
AF33
AF34
AG34
AG33
V16
T17
V19
BJ8
A22
1
BD82HM77 SLJ8C C1_BGA989~D
BD82HM77 SLJ8C C1_BGA989~D
CH90
CH90
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
VCCACLK
VCCDSW3_3
DCPSUSBYP
VCC3_3[5]
VCCAPLLDMI2
VCCIO[14]
DCPSUS[3]
VCCASW[1]
VCCASW[2]
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
VCCASW[16]
VCCASW[17]
VCCASW[18]
VCCASW[19]
VCCASW[20]
DCPRTC
VCCVRM[4]
VCCADPLLA
VCCADPLLB
VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]
VCCSSC
DCPSST
DCPSUS[1]
DCPSUS[2]
V_PROC_IO
VCCRTC
POWER
POWER
Clock and Miscellaneous
Clock and Miscellaneous
CPURTC
CPURTC
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
SATA USB
SATA USB
HDA
HDA
3
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
VCCSUS3_3[1]
V5REF
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCAPLLSATA
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
1
CH56
CH56
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
CH59
CH59
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+PCH_V5REF_SUS
+VCCA_USBSUS
+PCH_V5REF_RUN
1
2
1
CH91
CH91
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
2
CH70
CH70
1U_0603_10V7K~D
1U_0603_10V7K~D
+3.3V_RUN
1
CH76
CH76
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+VCCSATAPLL
+1.05V_+1.5V_1.8V_RUN
CH60
CH60
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH66
CH66
2
1
CH72
CH72
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
CH82
CH82
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
2
+1.05V_RUN
ALW_ON_3.3V#<42>
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
CH75
CH75
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH77
CH77
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
@CH80
@
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2
+1.05V_M
+3.3V_ALW_PCH
+3.3V_ALW_PCH
CH80
+1.05V_RUN
+3.3V_ALW_PCH
+PWR_SRC_S
12
RH279
RH279
100K_0402_5%~D
100K_0402_5%~D
5V_ALW_PCH_ENAB LE
13
D
D
QH6
QH6
2
G
G
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
S
S
RH208
RH208
10_0402_1%~D
10_0402_1%~D
RH213
RH213
10_0402_1%~D
10_0402_1%~D
+3.3V_RUN
+1.05V_RUN
LH5
@LH5
@
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LA-7902P
LA-7902P
LA-7902P
QH4
QH4
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
D
1 3
2
1
2
+3.3V_ALW_PCH+5V_ALW_PC H
12
21
1
CH63
CH63
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+3.3V_RUN+5V_RUN
21
12
+PCH_V5REF_RUN
1
2
+VCCA_USBSUS
+1.05V_RUN
PCH (7/8)
PCH (7/8)
PCH (7/8)
1
DH2
DH2
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
DH3
DH3
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
+5V_ALW_PCH+5V_ALW
S
S
G
G
1
CH98
CH98
2
CH107
CH107
3300P_0402_50V7K~D
3300P_0402_50V7K~D
+PCH_V5REF_SUS
CH71
CH71
1U_0603_10V7K~D
1U_0603_10V7K~D
1
CH62
@CH62
@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
20 61W ednesday, March 07, 2012
20 61W ednesday, March 07, 2012
20 61W ednesday, March 07, 2012
12
RH278
RH278
20K_0402_5%~D
20K_0402_5%~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1.0
1.0
1.0
Page 21
5
D D
C C
B B
A A
UH4H
UH4H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
BD82HM77 SLJ8C C1_BGA989~D
BD82HM77 SLJ8C C1_BGA989~D
4
AK38
VSS[80]
AK4
VSS[81]
AK42
VSS[82]
AK46
VSS[83]
AK8
VSS[84]
AL16
VSS[85]
AL17
VSS[86]
AL19
VSS[87]
AL2
VSS[88]
AL21
VSS[89]
AL23
VSS[90]
AL26
VSS[91]
AL27
VSS[92]
AL31
VSS[93]
AL33
VSS[94]
AL34
VSS[95]
AL48
VSS[96]
AM11
VSS[97]
AM14
VSS[98]
AM36
VSS[99]
AM39
VSS[100]
AM43
VSS[101]
AM45
VSS[102]
AM46
VSS[103]
AM7
VSS[104]
AN2
VSS[105]
AN29
VSS[106]
AN3
VSS[107]
AN31
VSS[108]
AP12
VSS[109]
AP19
VSS[110]
AP28
VSS[111]
AP30
VSS[112]
AP32
VSS[113]
AP38
VSS[114]
AP4
VSS[115]
AP42
VSS[116]
AP46
VSS[117]
AP8
VSS[118]
AR2
VSS[119]
AR48
VSS[120]
AT11
VSS[121]
AT13
VSS[122]
AT18
VSS[123]
AT22
VSS[124]
AT26
VSS[125]
AT28
VSS[126]
AT30
VSS[127]
AT32
VSS[128]
AT34
VSS[129]
AT39
VSS[130]
AT42
VSS[131]
AT46
VSS[132]
AT7
VSS[133]
AU24
VSS[134]
AU30
VSS[135]
AV16
VSS[136]
AV20
VSS[137]
AV24
VSS[138]
AV30
VSS[139]
AV38
VSS[140]
AV4
VSS[141]
AV43
VSS[142]
AV8
VSS[143]
AW14
VSS[144]
AW18
VSS[145]
AW2
VSS[146]
AW22
VSS[147]
AW26
VSS[148]
AW28
VSS[149]
AW32
VSS[150]
AW34
VSS[151]
AW36
VSS[152]
AW40
VSS[153]
AW48
VSS[154]
AV11
VSS[155]
AY12
VSS[156]
AY22
VSS[157]
AY28
VSS[158]
3
UH4I
UH4I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
BD82HM77 SLJ8C C1_BGA989~D
BD82HM77 SLJ8C C1_BGA989~D
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
2
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (8/8)
PCH (8/8)
PCH (8/8)
LA-7902P
LA-7902P
LA-7902P
21 61W ednesday, March 07, 2012
21 61W ednesday, March 07, 2012
21 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 22
5
4
3
2
1
Follow CON N List_060 9A
JFAN1
VCP2
3V_PWROK#
JFAN1
1
1
2
2
3
3
4
4
5
G5
6
G6
ACES_50273-0040N-001
ACES_50273-0040N-001
CONN@
CONN@
U9
U9
2
VDD_H
3
VDD_H
6
VDD_L
13
VDD_PWRGD
23
DN1/THERM
24
DP1/VREF_T
26
DN2/DP4
27
DP2/DN4
30
N/C
29
N/C
31
VCP
25
VIN
28
VSET
10
TACH/GPIO1
11
TEST3
15
GPIO3/PWM/THERMTRIP_SIO
12
3V_PWROK#
16
RTC_PWR3V
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
EMC4021-1-EZK-TR_QFN32_5X5~D
EMC4021-1-EZK-TR_QFN32_5X5~D
1
C274
C274
2
THERMTRIP2#
SYS_SHDN#
POWER_SW#
ACAVAIL_CLR
ATF_INT#/BC_IRQ#
FAN_OUT
FAN_OUT
SMCLK/BC_CLK
SMDATA/BC_DATA
VDD
ADDR_MODE/XEN
TEST1
TEST2
VSS
N/C
+3.3V_RUN
17
18
19
20
21
9
5
4
8
7
1
32
14
22
33
THERMATRIP2#
POWER_SW#
BC_INT#_EMC4022
+VCC_4022
+ADDR_XEN
BC_INT#_EMC4022
12
BC_INT#_EMC4022
FAN1_TACH_FB
FAN1_DET#
@
@
R430 10K_0402_5%~D
R430 10K_0402_5%~D
GPIO3 power rail is RTC so
double check Pull up or
use 5048 contrl
FAN1_DET#
1 2
R390 47K_0402_1%~D@R390 47K_0402_1%~D@
ACAV_IN <40,52,53>
BC_INT#_EMC4022 <40>
+FAN1_VOUT
BC_CLK_EMC4022 <4 0>
BC_DAT_EMC4022 <40>
1 2
12
R403
R403
10K_0402_5%~D
10K_0402_5%~D
SMSC request
+VCC_4022
R3934.7K_0402_5%~D R3934.7K_0402_5%~D
12
R386 10K_040 2_5%~D
R386 10K_040 2_5%~D
@
@
12
R385 10K_040 2_5%~DR385 10K_0402_5%~D
12
R426 10K_040 2_5%~DR426 10K_0402_5%~D
12
R402 10K_040 2_5%~DR402 10K_0402_5%~D
12
R408 10K_040 2_5%~D@ R408 10K_04 02_5%~D@
THERM_STP# <45>
+RTC_CELL
+3.3V_M
12
R388
R388
22_0402_5%~D
22_0402_5%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C1179
C1179
C273
C273
2
2
+3.3V_ALW
+3.3V_M
+3.3V_ALW
+FAN1_VOUT
Place under CPU
Place C266 close to the Q12 as possible
C
@
@
D D
100P_0402_50V8J~D
100P_0402_50V8J~D
C C
100P_0402_50V8J~D
100P_0402_50V8J~D
B B
2
C266
C266
1
(1) DP3/DN3 for SODIMM on Q14, place Q14 close to SODIMM and C272 close to Q14
(2) DP5/DN5 for Skin on Q13, place Q13 close to Vcore VR choke.
1
C272
@C272
@
2
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
C
2
B
B
E
E
Q12
Q12
3 1
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
100P_0402_50V8J~D
100P_0402_50V8J~D
1
E
E
31
@
2
+1.05V_RUN_VTT
H_THERMTRIP#<7>
@
C277
C277
B
B
2
Q13
Q13
C
C
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
1 2
PMST3904_SOT323-3~D
PMST3904_SOT323-3~D
C
C
2
B
B
E
E
3 1
Q14
Q14
REM_DIODE1_P_4022
REM_DIODE1_N_4022
REM_DIODE2_P_4022
REM_DIODE2_N_4022
R399
R399
2.2K_0402_5%~D
2.2K_0402_5%~D
2
B
B
Q16
Q16
+3.3V_M
12
C
C
E
E
3 1
R395
R395
8.2K_0402_5%~D
8.2K_0402_5%~D
THERMATRIP2#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C278
C278
1
2
+5V_RUN
1
2
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C276
C276
C275
C275
1
2
Test3
0 = 4021
1 = 4022
+3.3V_RUN
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C738
C738
C305
C305
1
2
MAX8731_IINP<52>
FAN1_DET#<39>
RB751S40T1_SOD523-2~DD2RB751S40T1_SOD523-2~D
D2
2 1
+3.3V_M
R389 10K_040 2_5%~DR389 10K_04 02_5%~D
1 2
C270 2200P_0402_50V7K~DC270 2200P_0402_50V7K ~D
12
C279 2200P_0402_50V7K~DC279 2200P_0402_50V7K ~D
4.7K_0402_5%~D
4.7K_0402_5%~D
SMSC request
+3.3V_M
PCH_PWRGD#<40>
FAN1_DET#
FAN1_TACH_FB
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C219
C219
1
2
VDD_PWRGD
1 2
REM_DIODE1_N_4022
REM_DIODE1_P_4022
REM_DIODE2_N_4022
REM_DIODE2_P_4022
R387
R387
12
VCP_4021
VSET_4021
R407 10K_0402_5%~D@ R407 1 0K_0402_5%~D@
R404 10K_0402_5%~DR404 10K_040 2_5%~D
R806 0_0402_5%~D@ R806 0_0402_5%~D@
R391 1K_0402 _1%~DR391 1K_0402_1%~D
12
12
1 2
1 2
+RTC_CELL
FAN1_TACH_FB
FAN1_DET#_RFA N1_DET#
SMSC review in 6/22
VCP_4021
R429 10K_0402_5%~DR429 10K_0402_5%~D
12
12
R406
R406
1.24K_0402_1%~D
1.24K_0402_1%~D
VSET_4021
POWER_SW#
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C282
C282
2
U10
U10
4
+RTC_CELL
5
P
O
G
3
B
A
1 2
C281 0.1U_0402_25V6K~DC281 0.1U_0402_25V 6K~D
1
2
DOCK_PWR_SW # <40>
POWER_SW_IN# <40>
Rest=1.24k, Tp=92degree
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
FAN & Thermal Sensor
FAN & Thermal Sensor
FAN & Thermal Sensor
LA-7902P
LA-7902P
LA-7902P
22 61W ednesday, March 07, 2012
22 61W ednesday, March 07, 2012
22 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 23
2
1
B B
PCH_CRT_RED
PCH_CRT_GRN
PCH_CRT_BLU
PCH_CRT_HSYNC
PCH_CRT_VSYNC
PCH_CRT_DDC_DAT
PCH_CRT_DDC_CLK
CRT_SWITCH
1 2
R556 4.7K_0402_5%~DR556 4.7K_0402_5 %~D
+3.3V_RUN
+3.3V_RUN
PCH_CRT_RED<16>
PCH_CRT_GRN<16>
PCH_CRT_BLU<16>
PCH_CRT_HSYNC<16>
PCH_CRT_VSYNC<16>
PCH_CRT_DDC_DAT<16>
PCH_CRT_DDC_CLK<16>
CRT_SWITCH<39>
SW for MB/DOCK
+5V_RUN +3.3V_RUN
U18
U18
1
R
2
G
5
B
6
H_SOURCE
7
V_HOURCE
9
SDA_SOURCE
10
SCL_SOURCE
30
SEL
29
TEST
8
Reserved
3
GND
11
GND
28
GND
31
GND
33
GPAD
PI3V713-AZLEX_TQFN32_6X3~D
PI3V713-AZLEX_TQFN32_6X3~D
5V VDD
VDD
VDD
VDD
H1_OUT
V1_OUT
SDA1
SCL1
H2_OUT
V2_OUT
SDA2
SCL2
16
4
23
32
RED_CRT
27
R1
G1
B1
R2
G2
B2
25
22
20
18
12
14
26
24
21
19
17
13
15
GREEN_CRT
BLUE_CRT
HSYNC_BUF
VSYNC_BUF
DAT_DDC2_CRT
CLK_DDC2_CRT
RED_DOCK
GREEN_DOCK
BLUE_DOCK
HSYNC_DOCK
VSYNC_DOCK
DAT_DDC2_DOCK
CLK_DDC2_DOCK
RED_CRT <37>
GREEN_CRT <37>
BLUE_CRT <37>
HSYNC_BUF <37>
VSYNC_BUF <37>
DAT_DDC2_CRT <37>
CLK_DDC2_CRT <37>
RED_DOCK <38>
GREEN_DOCK <38>
BLUE_DOCK <38>
HSYNC_DOCK <38>
VSYNC_DOCK <38>
DAT_DDC2_DOCK <38>
CLK_DDC2_DOCK <38>
Change P/N to TI (SA00004RS0L) 12/13
+3.3V_RUN
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
Source
ChanelSEL1/SEL2
0
1
A=B2
MBA=B1
APR/SPR
0.01U_0402_16V7K~D
1
@
@
C332
C332
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
1
@
@
C333
C333
2
2
1
C334
C334
C335
C335
C336
C336
2
2
+5V_RUN
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C339
C339
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
1
Date: Sheet of
Compal Electronics, Inc.
CRT/Video switch
CRT/Video switch
CRT/Video switch
LA-7902P
LA-7902P
LA-7902P
23 61W ednesday, March 07, 2012
23 61W ednesday, March 07, 2012
23 61W ednesday, March 07, 2012
1.0
1.0
1.0
Page 24
5
Follow CON N List_082 4
JLVDS1
JLVDS1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
D D
41
42
43
44
C C
45
STARC_111H40-100000-G4-R
STARC_111H40-100000-G4-R
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
G1
37
37
G2
38
38
G3
39
39
G4
40
40
G5
CONN@
CONN@
BIA_PWM_LVDS DISP_ON
12
R1137
R1137
10K_0402_5%~D
10K_0402_5%~D
+CAMERA_VDD+BL_PWR_SRC
DMIC0
DMIC_CLK0
USBP12_DÂUSBP12_D+
CAM_MIC_CBL_DET#
DISP_ON
1 2
LE92 BLM18BB 221SN1D_2P~DLE92 BLM18BB221SN1D_2P~D
LDDC_DATA_PCH
LDDC_CLK_PCH
LCD_TST
D66
D66
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
D68
D68
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
21
21
DMIC0
DMIC_CLK0
BIA_PWM_LVDS
LCD_B2+_PCH <16>
LCD_B2-_PCH <16>
LCD_B1+_PCH <16>
LCD_B1-_PCH <16>
LCD_B0+_PCH <16>
LCD_B0-_PCH <16>
LCD_A2+_PCH <16>
LCD_A2-_PCH <16>
LCD_A1+_PCH <16>
LCD_A1-_PCH <16>
LCD_A0+_PCH <16>
LCD_A0-_PCH <16>
LDDC_DATA_PCH <16>
LDDC_CLK_PCH <16>
LCD_TST <39>
+3.3V_RUN
+LCDVDD
4
100P_0402_50V8K~D
100P_0402_50V8K~D
100P_0402_50V8K~D
100P_0402_50V8K~D
@
@
@
@
1
1
C1217
C1217
C1218
C1218
2
2
CAM_MIC_CBL_DET# <17>
LCD_CBL_DET# <17>
1
2
1
2
5P_0402_50V8C~D
5P_0402_50V8C~D
1
C40
C40
@
@
2
5P_0402_50V8C~D
5P_0402_50V8C~D
1
@
@
C42
C42
2
LCD_BCLK+_PCH <16>
5P_0402_50V8C~D
5P_0402_50V8C~D
LCD_BCLK-_PCH <16>
@
@
C41
C41
LCD_ACLK+_PCH <16>
LCD_ACLK-_PCH <16>
5P_0402_50V8C~D
5P_0402_50V8C~D
@
@
C43
C43
+3.3V_RUN
1 2
R159 2.2K_0402_5%~DR159 2.2K_0402_5%~D
1 2
R160 2.2K_0402_5%~DR160 2.2K_0402_5%~D
LDDC_CLK_PCH
LDDC_DATA_PCH
Place near to JLVDS1
+LCDVDD +3.3V_RU N
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C298
C298
1
2
Close to JLVDS1.39,40
D67
D67
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
12
R1138
R1138
100K_0402_5%~D
100K_0402_5%~D
D69
D69
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
3
LCD Power
LCD_VCC_TEST_EN<39>
ENVDD_PCH<16,39>
+BL_PWR_SRC
0.1U_0603_50V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C243
C243
1
2
Close to JLVD1.38 Close to JLVD1.9
21
21
PANEL_BKEN_PCH <16>BIA_PWM_PCH <16>
PANEL_BKEN_EC <39>BIA_PWM_EC <40>
0.1U_0603_50V7K~D
C246
C246
1
2
130_0402_1%~D
130_0402_1%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
D6
D6
2
1
3
BAT54CW_SOT323-3~D
BAT54CW_SOT323-3~D
2
+LCDVDD
R413
R413
Q19A
Q19A
EN_LCDPWR
PDTC124EU_SC70-3~D
PDTC124EU_SC70-3~D
12
+LCVDVDD_CHG
61
2
2
Q20
Q20
40mil
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
2
+3.3V_ALW
12
13
+PWR_SRC
12
C297
C297
R423 47K_0402_5%~DR423 47K_0402_5%~D
EN_INVPWR<40>
+PWR_SRC_S +3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
R414
R414
5
R422
R422
100K_0402_5%~D
100K_0402_5%~D
1 2
12
R412
R412
470K_0402_5%~D
470K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q19B
Q19B
4
FDC654P-G_SSOT-6~D
FDC654P-G_SSOT-6~D
PWR_SRC_ON
EN_INVPWR
+LCDVDD
4.7M_0402_5%~D
4.7M_0402_5%~D
12
R1632
R1632
Q21
Q21
D
D
S
S
4 5
G
G
3
D
D
1 3
4 5
Q22
Q22
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Panel backlight power control by EC
1
Q18
Q18
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
S
S
6
2
1
G
G
3
0.022U_0402_25V7K~D
0.022U_0402_25V7K~D
1
C293
C293
2
40mil
6
2
1
1
C296
C296
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
2
S
S
G
G
2
FDC654P: P CHANNAL
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C292
C292
1
2
+BL_PWR_SRC
For Webcam
B B
Q23
+CAMERA_VDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0805_10V6K~D
10U_0805_10V6K~D
C299
C299
C300
1
2
C300
1
2
CCD_OFF<39>
CCD_OFF
Webcam PWR CTRL
A A
5
Q23
PMV65XP_SOT23-3~D
PMV65XP_SOT23-3~D
D
S
D
S
1 3
G
G
2
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C301
C301
1
2
Change CIS symbol_ 12/07
USBP12+<17>
USBP12-<17>
4
USBP12+
USBP12-
DMIC_CLK0
DMIC0
L10
L10
4
4
1
1
OCF2012181YZF_4P
OCF2012181YZF_4P
1 2
R427 0_0402_5%~D@ R427 0_0402_5%~D@
1 2
R428 0_0402_5%~D@ R428 0_0402_5%~D@
3
1
DMIC_CLK0 <29>
DMIC0 <29>
2
D8
PESD5V0U2BT_SOT23-3~DD8PESD5V0U2BT_SOT23-3~D
3
3
2
2
USBP12_D+
USBP12_D-
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
3
D9
PESD5V0U2BT_SOT23-3~DD9PESD5V0U2BT_SOT23-3~D
1
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LVDS & CAM Conn
LVDS & CAM Conn
LVDS & CAM Conn
LA-7902P
LA-7902P
LA-7902P
24 61W ednesday, March 07, 2012
24 61W ednesday, March 07, 2012
24 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 25
2
Note:
AOI found open soldering is
due to the diff erence between
Main and 2nd on PAD dimension .
L99
L99
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
L19
@L19
TMDSB_PCH_CLK#_C
TMDSB_PCH_CLK#<16>
+3.3V_RUN
HDMI_CEC
B B
TMDSB_PCH_P2_C HDMI_OB
TMDSB_PCH_N2_C
TMDSB_PCH_P1_C
TMDSB_PCH_N1_C
TMDSB_PCH_P0_C
TMDSB_PCH_N0_C
TMDSB_PCH_CLK_C
TMDSB_PCH_CLK#_C
R1165 10K_040 2_5%~DR1165 10K_0402_5%~D
R452 604_0402_1%R4 52 604_0402_1%
R450 604_0402_1%R4 50 604_0402_1%
R448 604_0402_1%R4 48 604_0402_1%
R449 604_0402_1%R4 49 604_0402_1%
R454 604_0402_1%R4 54 604_0402_1%
R453 604_0402_1%R4 53 604_0402_1%
R456 604_0402_1%R4 56 604_0402_1%
R455 604_0402_1%R4 55 604_0402_1%
+3.3V_RUN
12
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R458 10K_0402_5%~DR458 10K_0402_5%~D
1 2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
2
G
G
Q26
Q26
S
S
TMDSB_PCH_CLK<16>
TMDSB_PCH_P0<16>
TMDSB_PCH_N0<16>
TMDSB_PCH_P1<16>
TMDSB_PCH_N1<16>
TMDSB_PCH_P2<16>
TMDSB_PCH_N2<16>
12
C353 0.1U_0402_10V7K~DC353 0.1U_0402_10V7K~ D
C352 0.1U_0402_10V7K~DC352 0.1U_0402_10V7K~ D
C351 0.1U_0402_10V7K~DC351 0.1U_0402_10V7K~ D
C350 0.1U_0402_10V7K~DC350 0.1U_0402_10V7K~ D
C347 0.1U_0402_10V7K~DC347 0.1U_0402_10V 7K~D
C346 0.1U_0402_10V7K~DC346 0.1U_0402_10V 7K~D
C349 0.1U_0402_10V7K~DC349 0.1U_0402_10V7K~D
C348 0.1U_0402_10V7K~DC348 0.1U_0402_10V7K~D
12
12
12
12
12
12
12
TMDSB_PCH_CLK_C
TMDSB_PCH_P0_C
TMDSB_PCH_N0_C
TMDSB_PCH_P1_C
TMDSB_PCH_N1_C
TMDSB_PCH_P2_C
TMDSB_PCH_N2_C
@
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
L20
@L20
@
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
L22
@L22
@
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
L21
@L21
@
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
L100
L100
L101
L101
L102
L102
L103
L103
L104
L104
L105
L105
L106
L106
3
3
2
2
2
2
3
3
2
2
3
3
2
2
3
3
F2 change to 2n d source
"SP040003H0L (F _MF-MSMF050-2) "
PCB Footprint
TMDSB_CON_CLK#
TMDSB_CON_CLK
TMDSB_CON_P0
TMDSB_CON_N0
TMDSB_CON_P1
TMDSB_CON_N1
TMDSB_CON_P2
TMDSB_CON_N2
3.9P_0402_50V8C
3.9P_0402_50V8C
C1209
C1209
1
2
3.9P_0402_50V8C
3.9P_0402_50V8C
C1211
C1211
1
2
3.9P_0402_50V8C
3.9P_0402_50V8C
C1213
C1213
1
2
3.9P_0402_50V8C
3.9P_0402_50V8C
C1215
C1215
1
2
3.9P_0402_50V8C
3.9P_0402_50V8C
C1210
C1210
1
2
3.9P_0402_50V8C
3.9P_0402_50V8C
C1212
C1212
1
2
3.9P_0402_50V8C
3.9P_0402_50V8C
C1214
C1214
1
2
3.9P_0402_50V8C
3.9P_0402_50V8C
C1216
C1216
1
2
+5V_RUN
21
3
NC
NC
+5V_RUN_HDMI
21
1
BAT1000-7-F_SOT23-3~D
BAT1000-7-F_SOT23-3~D
D4
D4
+VDISPLAY_VCC
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_10V7K~D
@
@
R5
R5
0.1U_0402_10V7K~D
1
1
C337
C337
2
2
HDMIB_PCH_HPD_R
C338
C338
JHDMI1
JHDMI1
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_shield
10
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
HONGL_13-13201904CP
HONGL_13-13201904CP
CONN@
CONN@
CONN list 0624C
DC232001000
20
GND
21
GND
22
GND
23
GND
0.5A_15V_SMD1812P050TFF20.5A_15V_SMD1812P050TF
F2
0_1206_5%~D
0_1206_5%~D
1 2
PCH_SDVO_CTRLDATA_R
PCH_SDVO_CTRLCLK_R
HDMI_CEC
TMDSB_CON_CLK#
TMDSB_CON_CLK
TMDSB_CON_N0
TMDSB_CON_P0
TMDSB_CON_N1
TMDSB_CON_P1
TMDSB_CON_N2
TMDSB_CON_P2
+5V_RUN
+3.3V_RUN
RB751VM-40TE-17_SOD323-2~D
Q120A
Q120A
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
PCH_SDVO_CTRLCLK_R +5V_HDMI_DDC
PCH_SDVO_CTRLCLK<16>
A A
PCH_SDVO_CTRLDATA<16>
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
HDMIB_PCH_HPD<16>
5
4
Q120B
Q120B
1M_0402_5%~D
1M_0402_5%~D
1 2
61
3
R1168
R1168
PCH_SDVO_CTRLDATA_R
+3.3V_RUN
G
G
2
HDMIB_PCH_HPD_R
13
D
S
D
S
Q121
Q121
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
2
RB751VM-40TE-17_SOD323-2~D
1 2
R1153 2.2K_0402_5%~DR1153 2.2K_0402_5%~D
1 2
R1152 2.2K_0402_5%~DR1152 2.2K_0402_5%~D
1 2
R1128 20K_0402_5%~DR 1128 20K_0402_5%~D
@ D65
@
21
D65
12
R1163
R1163
0_0402_5%~D
0_0402_5%~D
HDMI 46@
HDMI 46@
Part Number Description
Part Number Description
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
RO0000002HM
RO0000002HM
HDMI W/Logo:RO0000002HM
HDMI W/Logo:RO0000002HM
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
1
Date: Sheet of
Compal Electronics, Inc.
HDMI port
HDMI port
HDMI port
LA-7902P
LA-7902P
LA-7902P
25 61W ednesday, March 07, 2012
25 61W ednesday, March 07, 2012
25 61W ednesday, March 07, 2012
1.0
1.0
1.0
Page 26
5
4
3
2
1
AUX/DDC SW for DPC to E-DOCK
U20
C357
D D
DPC_PCH_DOCK_AUX<16>
DPC_PCH_DOCK_AUX#<16>
C C
DPC_DOCK_AUX<38>
DPC_DOCK_AUX#<38>
DPC_CA_DET<38>
Note:When implement 2nd source, please check Vil and Vih spec is meet main source spec
C357
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C360 0.1U_0402_10V7K~DC360 0.1U_0402_10V 7K~D
DPC_AUX_C
12
DPC_DOCK_AUX
DPC_AUX#_C
12
DPC_DOCK_AUX#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
U20
1
BE0
2
A0
3
B0
4
BE1
5
A1
6
B1
7
GND
PI3C3125LEX_TSSOP14~D
PI3C3125LEX_TSSOP14~D
+5V_RUN
12
C365
C365
5NC1
P
A2Y
G
3
14
VCC
13
BE3
12
A3
11
B3
10
BE2
9
A2
8
B2
U21
U21
DPC_CA_DET#DPC_CA_DET
4
TC7SET04FU_SSOP5~D
TC7SET04FU_SSOP5~D
+3.3V_RUN
1 2
C356
C356
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PCH_DDPC_CTRLCLK <16>
PCH_DDPC_CTRLDATA <16>
There is a new die for PI3C3125. Sample availabe on May.
AUX/DDC SW for DPD to E-DOCK
U23
C367
C367
0.1U_0402_10V7K~D
DPD_PCH_DOCK_AUX<16>
DPD_PCH_DOCK_AUX#<16>
B B
0.1U_0402_10V7K~D
DPD_DOCK_AUX< 38>
C368 0.1U_0402_10V7K~DC368 0.1U_0402_10V 7K~D
DPD_DOCK_AUX#<38>
DPD_AUX_C
12
DPD_DOCK_AUX
DPD_AUX#_C
12
DPD_DOCK_AUX#
U23
1
2
3
4
5
6
7
VCC
BE0
BE3
A0
B0
BE1
A1
BE2
B1
GND
PI3C3125LEX_TSSOP14~D
PI3C3125LEX_TSSOP14~D
14
13
12
A3
11
B3
10
9
A2
8
B2
+3.3V_RUN
1 2
C366
C366
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PCH_DDPD_CTRLCLK <16>
PCH_DDPD_CTRLDATA <16>
+5V_RUN
12
C369
C369
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
DPD_CA_DET<38>
5NC1
U24
U24
P
A2Y
G
TC7SET04FU_SSOP5~D
TC7SET04FU_SSOP5~D
3
DPD_CA_DET#DPD_CA_DET
4
Note:When implement 2nd source, please check Vil and Vih spec is meet main source spec
+3.3V_RUN
1 2
R487 2.2K_0402_5%~DR487 2.2K_0402_5%~D
1 2
R488 2.2K_0402_5%~DR488 2.2K_0402_5%~D
A A
1 2
R489 2.2K_0402_5%~DR489 2.2K_0402_5%~D
1 2
R490 2.2K_0402_5%~DR490 2.2K_0402_5%~D
PCH_DDPC_CTRLCLK
PCH_DDPC_CTRLDATA
PCH_DDPD_CTRLCLK
PCH_DDPD_CTRLDATA
Intel WW18 Strapping option
Intel WW18 Strapping option
DELL CONFIDENTIAL/PROPRIETARY
1 2
R491 1M_0 402_5%~DR491 1M_0402_5%~D
1 2
R492 1M_0 402_5%~DR492 1M_0402_5%~D
5
DPD_CA_DET
DPC_CA_DET
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DP SW
DP SW
DP SW
LA-7902P
LA-7902P
LA-7902P
1
1.0
1.0
26 61W ednesday, March 07, 2012
26 61W ednesday, March 07, 2012
26 61W ednesday, March 07, 2012
1.0
Page 27
5
D D
+3.3V_RUN
12
PJP53
PJP53
PAD-OPEN1x1m
PAD-OPEN1x1m
short
+3.3V_RUN_FFS
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
C C
2
C388
C388
C387
C387
2
HDD_FALL_INT<17>
DDR_XDP_WAN_ SMBDAT<7,12,13,14,15,34>
DDR_XDP_WAN_ SMBCLK<7,12,13,14,15,34>
HDD_FALL_INT
FFS_INT2
4
U88
U88
LNG3DM
LNG3DM
VDD_IO
VDD
INT 1
INT 2
SDO/SA0
SDA / SDI / SDO
SCL/SPC
CS
GND
GND
RES
RES
RES
RES
NC
NC
1
14
11
9
7
6
4
8
LNG3DMTR_LGA16_3X3~D
LNG3DMTR_LGA16_3X3~D
3
RUN_ON<35,39,42,47,48>
SIO_SLP_S3#<11,16,35,39,42,47,48,49>
10
13
15
16
5
12
2
3
1 2
R1621 0_04 02_5%~D@R1621 0_0402_5%~D@
1 2
R1624 0_04 02_5%~D@R1624 0_0402_5%~D@
100K_0402_5%~D
100K_0402_5%~D
R505
@R505
@
100K_0402_5%~D
100K_0402_5%~D
2
@R500
@
R500
12
+3.3V_ALW2
12
61
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
@
@
Q28A
Q28A
+PWR_SRC_S
12
@R499
@
100K_0402_5%~D
100K_0402_5%~D
HDD_EN_5V
3
5
4
1
+5V_ALW
R499
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
@
@
1M_0402_5%~D
1M_0402_5%~D
@
@
Q28B
Q28B
12
R517
R517
6
2
1
D
D
Q27
@
Q27
G
G
3
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
1
2
@
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
S
S
+5V_HDD
4 5
10U_0805_10V6K~D
10U_0805_10V6K~D
@
@
C393
C393
1
C394
C394
2
@PJP3
@
12
R504
R504
100K_0402_5%~D
100K_0402_5%~D
PJP3
112
JUMP_43X79
JUMP_43X79
short
+5V_RUN
2
+3.3V_RUN
+3.3V_RUN_HDD
+5V_HDD
FFS_INT2_Q
SATA_PTX_DRX_P0
SATA_PTX_DRX_N0
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
HDD_DET#
DDR_XDP_WAN_ SMBDAT
1 2
R501 10K_0402_5%~DR501 10K_0402_5%~D
R502 10K_0402_5%~DR502 10K_0402_5%~D
R503 100K_0402_5%~DR503 100K_0402_5%~D
B B
FFS_INT2<18>
A A
1 2
1 2
FFS_INT2
DDR_XDP_WAN_ SMBCLK
HDD_FALL_INT
+3.3V_RUN
12
61
2
5
R508
R508
100K_0402_5%~D
100K_0402_5%~D
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q29A
Q29A
+5V_HDD
12
3
4
Note : Short PJP64 for SSD HDD issue
R506
@R506
@
100K_0402_5%~D
100K_0402_5%~D
FFS_INT2_Q
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q29B
Q29B
PSATA_PTX_DRX_P0_C<14>
PSATA_PTX_DRX_N0_C<14>
PSATA_PRX_DTX_N0_C<14>
PSATA_PRX_DTX_P0_C<14>
+3.3V_RUN
+5V_HDD
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
1
C395
C395
2
2
+3.3V_RUN_HDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C402
C402
2
2
4
12
C383 0.01U_0402_16V7K~DC38 3 0.01U_0402_16V7K~D
12
C384 0.01U_0402_16V7K~DC38 4 0.01U_0402_16V7K~D
12
C385 0.01U_0402_16V7K~DC38 5 0.01U_0402_16V7K~D
12
C386 0.01U_0402_16V7K~DC38 6 0.01U_0402_16V7K~D
PJP64
PJP64
1 2
@
@
PAD-OPEN1x1m
PAD-OPEN1x1m
HDD_DET#<14>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C396
C396
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C399
C399
3
JSATA1
JSATA1
1
GND
2
A+
3
A-
4
GND
5
B-
6
B+
7
GND
8
V33
9
V33
10
V33
11
GND
12
GND
13
GND
14
V5
15
V5
16
V5
17
GND
18
Reserved
19
GND
20
V12
21
V12
22
V12
SANTA_198202-1
SANTA_198202-1
CONN@
CONN@
GND
GND
23
24
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
HDD CONNECTOR
HDD CONNECTOR
HDD CONNECTOR
LA-7902P
LA-7902P
LA-7902P
27 61W ednesday, March 07, 2012
27 61W ednesday, March 07, 2012
27 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 28
5
4
3
2
1
For ODD
D D
SP010018DC L
JSATA2
JSATA2
1
GND
2
RX+
3
RX-
4
GND
5
TX-
6
TX+
7
GND
8
DP
9
+5V
10
+5V
11
MD
12
GND
13
GND
SANTA_205902-1~D
SANTA_205902-1~D
CONN@
CONN@
GND1
GND2
14
15
+5V_MOD
SATA_ODD_PTX_DRX_P1
SATA_ODD_PTX_DRX_N1
SATA_ODD_PRX_DTX_N1
SATA_ODD_PRX_DTX_P1
TEST POINT
T88PAD~D @T88PAD~D @
SATA_ODD_PTX_DRX_P1_C<14>
SATA_ODD_PTX_DRX_N1_C< 14>
SATA_ODD_PRX_DTX_N1_C< 14>
SATA_ODD_PRX_DTX_P1_C<14>
+3.3V_RUN
DEVICE_DET#<40>
R1125 100K_0402_5%~DR112 5 100K_0402_5%~D
+5V_MOD
1000P_0402_50V7K~D
1000P_0402_50V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C398
C398
C397
C397
2
2
C C
12
C407 0.01U_0402_16V7K~DC40 7 0.01U_0402_16V7K~D
12
C406 0.01U_0402_16V7K~DC40 6 0.01U_0402_16V7K~D
12
C405 0.01U_0402_16V7K~DC40 5 0.01U_0402_16V7K~D
12
C404 0.01U_0402_16V7K~DC40 4 0.01U_0402_16V7K~D
12
+5VMOD Source
MODC_EN<39>
R512
R512
100K_0402_5%~D
100K_0402_5%~D
+PWR_SRC_S
5
12
R507
R507
470K_0402_5%~D
470K_0402_5%~D
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q31B
Q31B
4
+3.3V_ALW2
12
R509
R509
100K_0402_5%~D
100K_0402_5%~D
MODC_EN#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q31A
Q31A
2
12
MOD_EN
4.7M_0402_5%~D
4.7M_0402_5%~D
12
+5V_ALW
6
2
1
D
D
Q30
Q30
G
G
SI3456DDV-T1-GE3_TSOP6~D
3
R518
R518
1
2
SI3456DDV-T1-GE3_TSOP6~D
S
S
+5V_MOD +5V_RUN
0.022U_0402_25V7K~D
0.022U_0402_25V7K~D
4 5
10U_0805_10V6K~D
10U_0805_10V6K~D
C400
C400
1
C401
C401
2
@PJP4
@
12
R511
R511
100K_0402_5%~D
100K_0402_5%~D
PJP4
112
JUMP_43X79
JUMP_43X79
2
open
Pleace near ODD CONN
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ODD CONNECTOR
ODD CONNECTOR
ODD CONNECTOR
LA-7902P
LA-7902P
LA-7902P
28 61W ednesday, March 07, 2012
28 61W ednesday, March 07, 2012
28 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 29
2
Internal Speakers Header
15 mils trace
INT_SPK_L+
INT_SPK_LÂINT_SPK_R+
INT_SPK_R-
C973 2200P_04 02_50V7K~DC973 2200P_0402_50V7K~D
C974 2200P_04 02_50V7K~DC974 2200P_0402_50V7K~D
1
2
3.3_0402_5%~D
3.3_0402_5%~D
3.3_0402_5%~D
3.3_0402_5%~D
R169
R169
1 2
B B
C975 2200P_04 02_50V7K~DC975 2200P_0402_50V7K~D
1
1
2
2
3.3_0402_5%~D
3.3_0402_5%~D
3.3_0402_5%~D
3.3_0402_5%~D
R171
R171
R170
R170
1 2
1 2
Place closed U72
IDT review in 0624 to add R169~R172
IDT suggest exchange location R169~R172 & C973~C976._09/13
Reserve for ESD review in 6/22
Close to U72 pin5 Close to U72 pin6
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
12
R1077
@R10 77
@
47_0402_5%~D
47_0402_5%~D
1
C978
@C978
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
Place closely to Pin 13.
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
Add for solve pop noise and detect issue
A A
Place closely to Pin 14
+3.3V_RUN
39.2K_0402_1%~D
39.2K_0402_1%~D
12
R1081
R1081
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
DVDD_IO should match
with HDA Bus level
L91 BLM18PG121SN1D_0603L91 BLM18PG121SN1D_0603
1 2
L92 BLM18PG121SN1D_0603L92 BLM18PG121SN1D_0603
1 2
L93 BLM18PG121SN1D_0603L93 BLM18PG121SN1D_0603
1 2
L94 BLM18PG121SN1D_0603L94 BLM18PG121SN1D_0603
1 2
Change L91~L94
C976 2200P_04 02_50V7K~DC976 2200P_0402_50V7K~D
part number to
2A _9/13
1
2
R172
R172
1 2
12
@R10 76
@
10_0402_1%~D
10_0402_1%~D
1
@C97 7
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
AUD_SENSE_A
61
2
Q107A
Q107A
AUD_SENSE_B
12
R1079
R1079
61
2
Q106A
Q106A
R1076
C977
3
12
R1086
R1086
20K_0402_1%~D
20K_0402_1%~D
3
5
Q107B
Q107B
4
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
12
R1080
R1080
20K_0402_1%~D
20K_0402_1%~D
3
5
Q106B
Q106B
4
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
2
1
INT_SPKL_L+
INT_SPKR_L-
INT_SPKR_R+
INT_SPKR_R-
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
3
DE2
DE2
+3.3V_RUN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C980
C980
2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C979
C979
2
1
12
1
2
R1083
R1083
2.49K_0402_1%~D
2.49K_0402_1%~D
R1078
R1078
2.49K_0402_1%~D
2.49K_0402_1%~D
JSPK1
JSPK1
1
2
3
4
5
6
CONN@
CONN@
Follow CONN List_0609A
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
DE1
DE1
R1084
R1084
4.7K_0402_5%~D
4.7K_0402_5%~D
@
@
PCH_AZ_CODEC_RST#
C984
@C984
@
10P_0402_50V8J~D
10P_0402_50V8J~D
+VDDA_AVDD
12
+3.3V_RUN
12
R1087
R1087
100K_0402_5%~D
100K_0402_5%~D
1
@C967
@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
+VDDA_AVDD
12
+3.3V_RUN
12
R1082
R1082
100K_0402_5%~D
100K_0402_5%~D
2
+3.3V_RUN +3.3V_RUN_DVDD +3.3 V_RUN_DVDD
PJP60
@PJP60
@
1
2
3
4
GND
GND
ACES_50279-0040N-001
ACES_50279-0040N-001
PCH_AZ_CODEC_BITCLK<14>
PCH_AZ_CODEC_SDOUT<14>
PCH_AZ_CODEC_SYNC<14>
PCH_AZ_CODEC_SDIN0<14>
PCH_AZ_CODEC_RST#<14>
AUD_HP_NB_SENSE <37,39 >
C967
DOCK_MIC_DET <39>DOCK_HP_DET<39>
1 2
short
PAD-OPEN1x1m
PAD-OPEN1x1m
Place R1096 close to codec
I2S_MCLK
I2S_BCLK
I2S_DO
I2S_LRCLK
I2S_DI#
BCLK: Audio serial data bus bi t clock
input/output
LRCK: Audio serial data bus word clock
input/output
AUD_NB_MUTE#< 39>
+3.3V_RUN
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1U_0603_10V7K~D
1U_0603_10V7K~D
1
1
C994
C994
C952
C952
2
2
1 2
33_0402_5%~DR1096 33_0402_5%~DR1096
1 2
R167 0_ 0402_5%~D@ R167 0_0402_5 %~D@
1 2
R168 0_ 0402_5%~D@ R168 0_0402_5 %~D@
1 2
33_0402_5%~DR1097 33_0402_5%~DR109 7
Place R1097 close to codec
10K_0402_5%~DR1099 10K_0402_5 %~DR1099
place at AGND and DGND plane
1 2
C981
@C981
@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
C982
C982
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
C983
@C983
@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+DVDD_CORE
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C953
C953
2
2
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_SDOUT
PCH_AZ_SDIN0_R
PCH_AZ_CODEC_RST#
I2S_MCLK_R
I2S_BCLK_R
I2S_DO_R
C954
C954
Camera/BDMIC0
DMIC1
Power/B
Resistor SENSE_A SENSE_B
39.2K
20K
10K
5.11K
2.49K
PORT A
PORT B
NA
SPDIFOUT0
SPDIFOUT1 (DMIC1)
Pull-up to AVDD
External MICPORT A
PORT B
PORT C
PORT D
HeadPhone Out
Dock Audio
Internal SPK
Place C994, C952~C957 close to Codec
U72
U72
1
DVDD_CORE
3
DVDD_IO
9
DVDD
6
BITCLK
5
SDATA_OUT
10
SYNC
8
SDATA_IN
11
RESET#
15
I2S_MCLK
16
I2S_SCLK
17
I2S_DOUT
18
I2S_LRCLK
24
I2S_DIN
19
No Connect
20
No Connect
47
EAPD
7
DVSS
42
PVSS
49
GND
92HD93B2X5NLGXWBX8_Q FN48_7X7~D
92HD93B2X5NLGXWBX8_Q FN48_7X7~D
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
place at Codec bottom side
PJP62
@PJP62
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
short short
R162, R163, R164, R165,R166 CO-lay with U73
DMIC1/GPIO0/SPDIFOUT1
SPDIFOUT0//GPIO3/Aux_Out
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
DAI_BCLK#
DAI_LRCK#
DAI_DO#
DAI_12MHZ#
DMIC_CLK/GPIO 1
DMIC_0/GPIO 2
PJP63
@PJP63
@
MONO_OUT
AVDD1
AVDD2
PVDD
PVDD
SENSE_A
SENSE_B
PORTA_L
PORTA_R
VrefOut_A
PORTB_L
PORTB_R
PORTD_+L
PORTD_-L
PORTD_+R
PORTD_-R
PC_BEEP
CAP+
CAP-
VREFFILT
CAP2
V-
Vreg
AVSS1
AVSS
AVSS
1 2
R162 2 2_0402_5%~DR162 22_ 0402_5%~D
1 2
R163 0 _0402_5%~DR163 0_0402_5%~ D
1 2
R164 0 _0402_5%~DR164 0_0402_5%~ D
1 2
R165 2 2_0402_5%~DR165 22_ 0402_5%~D
PORT E
PORT F
EN_I2S_NB_CODEC#<39>
DMIC0
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
place close to pin27
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1U_0603_10V7K~D
1U_0603_10V7K~D
1
1
C957
C957
2
2
C957 place close to pin38
27
38
+VDDA_PVDD
45
39
AUD_SENSE_A
13
AUD_SENSE_B
14
MIC_IN_L
28
MIC_IN_R
29
+VREFOUT
23
AUD_HP_OUT_L
31
AUD_HP_OUT_R
32
INT_SPK_L+
40
INT_SPK_L-
41
INT_SPK_R+
44
INT_SPK_R-
43
AUD_PC_BEEP
25
12
DMIC_CLK_L
2
4
46
48
36
1
C962
C962
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
Place C962 close to Codec
2
35
CODEC_VREF
21
CODEC_CAP2
22
CODEC_VN
34
CODEC_VREG
37
26
30
33
+3.3V_RUN +3.3V_RUN
2
1
I2S_BCLK DAI_BCLK#
I2S_LRCLK
I2S_DO
EN_I2S_NB_CODEC#
R1540
@R1540
@
1K_0402_1%~D
1K_0402_1%~D
C1105 0.1U_0402_2 5V6K~DC 1105 0.1U_0402_25V6K~D
C1106 0.1U_0402_2 5V6K~DC 1106 0.1U_0402_25V6K~D
1 2
LE3 BLM18BB221SN1D_2P~DLE3 BLM18BB221SN1D_2P~D
1 2
LE4 BLM18BB221SN1D_2P~DLE4 BLM18BB221SN1D_2P~D
1 2
R1641 0_0402_5%~DR1641 0 _0402_5%~D
Place C963~C966 close to Codec
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C1103
C1103
@
@
U73
U73
16
VCC
2
1A
4
2A
6
3A
10
4A
12
5A
14
6A
1
OE1#
15
12
OE2#
CD74HC366M96_SO16~D
CD74HC366M96_SO16~D
1
L77
L77
BLM21PG600SN1D_0805~ D
+VDDA_AVDD
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C955
C955
C956
C956
2
1 2
2.2U_0603_6.3V6K~DC1163 2.2U_0603_6.3 V6K~DC1163
+VREFOUT
1 2
R1143 2.2K_0402_5%~DR1143 2.2K_0402_5%~D
BLM21PG600SN1D_0805~ D
1 2
1
2
MIC_IN_R <37>
AUD_HP_OUT_L <37>
AUD_HP_OUT_R < 37>
IDT review in 0624 to remove C54~C57
12
12
EN_I2S_NB_CODEC#
1
2
3
1
3
1Y#
5
2Y#
7
3Y#
9
4Y#
11
5Y#
13
6Y#
8
GND
DMIC_CLK0 <24>
DMIC_CLK1 <43>
DMIC0 <24>
DMIC1 <43>
Place LE3/LE4 close to codec
Check to change LE3,LE4 to 22 ohm
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C963
C963
2
DA204U_SOT323-3~D
DA204U_SOT323-3~D
3
2
@D54
@
D54
I2S_DI#
1 2
R166 0 _0402_5%~DR166 0_0402_5%~ D
1 2
R1119 100K_0402_5%~DR1119 100K_0402_5%~D
1 2
R1120 100K_0402_5%~DR1120 100K_0402_5%~D
R1141 10 K_0402_5%~D@R1 141 10K_0402_5%~D@
R1142 10 K_0402_5%~D@R1 142 10K_0402_5%~D@
1U_0603_10V7K~D
1U_0603_10V7K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
1
C965
C965
C964
C964
2
2
DA204U_SOT323-3~D
DA204U_SOT323-3~D
3
2
@D55
@
D55
1
1
DAI_DI
1 2
1 2
10U_0805_10V6K~D
10U_0805_10V6K~D
2
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sh eet of
Date: Sh eet of
1
Date: Sh eet of
+5V_RUN
0_0805_5%~D
+5V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C959
C959
C958
C958
2
C966
C966
DA204U_SOT323-3~D
DA204U_SOT323-3~D
3
@D56
@
D56
1
+3.3V_RUN
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Azalia (HD) Codec
Azalia (HD) Codec
Azalia (HD) Codec
LA-7902P
LA-7902P
LA-7902P
0_0805_5%~D
12
R1095
R1095
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0805_10V6K~D
10U_0805_10V6K~D
1
1
C961
C961
C960
C960
2
2
SPKR <1 4>
BEEP <40>
place at AGND and DGND plane
1 2
C985
C985
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
C986
C986
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
C987
C987
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
2
@D57
@
D57
DAI_LRCK#
DAI_DO#
DAI_12MHZ#I2S_MCLK
2
3
D58
@D58
@
DA204U_SOT323-3~D
DA204U_SOT323-3~D
1
DAI_DI
+VREFOUT
DAI_BCLK# <38>
DAI_LRCK# <38>
DAI_DO# <38>
DAI_12MHZ# <38>
DAI_DI <38>
29 61Wednesday, March 07, 2012
29 61Wednesday, March 07, 2012
29 61Wednesday, March 07, 2012
1U_0603_10V7K~D
1U_0603_10V7K~D
1
C1180
C1180
2
1.0
1.0
1.0
Page 30
5
CL4 0.1U_0402_10V 7K~DCL4 0.1U_0402_10V7K~D
PCIE_PRX_GLANTX_P7<15>
PCIE_PRX_GLANTX_N7<15>
PCIE_PTX_GLANRX_P7<15>
PCIE_PTX_GLANRX_N7<15>
D D
SIO_LAN_SMBCLK<15,40>
SML1_SMBCLK<15,40>
SIO_LAN_SMBDATA<15,40>
SML1_SMBDATA<15,40>
C C
B B
A A
+3.3V_LAN
LAN_SCLK
LAN_SO
+3.3V_LAN
LAN_SCLK
LAN_SO
DOCKED<39>
Layout Notice : Place as
close PI3L500 as possible
RL50 0_0402_5%~DRL50 0_0402_5%~D
RL49 0_0402_5%~D@ RL49 0_0402_5%~D@
RL51 0_0402_5%~DRL51 0_0 402_5%~D
RL48 0_0402_5%~D@ RL48 0_ 0402_5%~D@
8
VCC
7
RESET#
6
C
5
D
M25PE80-VMN6TP_SO8N8
M25PE80-VMN6TP_SO8N8
8
VCC
7
RESET#
6
C
5
D
M25PE80-VMW6TP_S O8W8
M25PE80-VMW6TP_S O8W8
co-lay with UL2
+3.3V_LAN
C472
C472
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
LAN_TX0+ LAN_TX0+R
L30 0_0603_5%~DL30 0_0603_5%~D
LAN_TX0-
L31 0_0603_5%~DL31 0_0603_5%~D
LAN_TX1+
L33 0_0603_5%~DL33 0_0603_5%~D
LAN_TX1-
L32 0_0603_5%~DL32 0_0603_5%~D
LAN_TX2+ LAN_TX2+R
L34 0_0603_5%~DL34 0_0603_5%~D
LAN_TX2-
L35 0_0603_5%~DL35 0_0603_5%~D
LAN_TX3+
L36 0_0603_5%~DL36 0_0603_5%~D
LAN_TX3-
L37 0_0603_5%~DL37 0_0603_5%~D
DOCKED
1 2
1 2
1 2
1 2
UL2
1
S#
2
Q
3
W#
4
VSS
@
@
UL3
UL3
1
S#
2
Q
3
W#
4
VSS
1
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
DOCKEDFROM NIC
LANCLK_REQ#<15>
PLTRST_LAN#<17>
3
1 2
RL11 0_0402_5%~D@ RL11 0_0402_5%~D@
LAN_CS#
LAN_SI
LAN_CS#
LAN_SI
C473
C473
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
1: TO DOCK
0: TO RJ45
+3.3V_RUN
PCIE_WAKE#<34,35,40>
5
+3.3V_LAN
1
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
CLK_PCIE_LAN<15>
CLK_PCIE_LAN#<15>
RL1 10 K_0402_5%~DRL1 10K_0402_5%~D
RL3 0_ 0402_5%~D@ RL3 0_0402_5 %~D@
+3.3V_LAN
6 1
1 2
RL10 0_0402_5%~D@RL10 0_0402_5%~D@
4
1
CL7
CL7
2
LAN_TX0-R
LAN_TX1+R
LAN_TX1-R
LAN_TX2-R
LAN_TX3+R
LAN_TX3-R
12
CL1 0.1U_0402_10V 7K~DCL1 0.1U_0402_10V7K~D
12
CL2 0.1U_0402_10V 7K~DCL2 0.1U_0402_10V7K~D
1 2
CL3 0.1U_0402_10V 7K~DCL3 0.1U_0402_10V7K~D
1 2
1 2
1 2
QL2A
QL2A
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
LAN_APE_SMB_CLK0
LAN_APE_SMB_DATA0
QL2B
QL2B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
CL7 place
close to UL2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
RL22 200_0402_1%~DRL22 200_0402_1%~D
1 2
YL1
YL1
25MHZ_10PF_X3G025000FA1H~D
25MHZ_10PF_X3G025000FA1H~D
1
IN
12P_0402_50V8J~D
12P_0402_50V8J~D
2
GND
CL5
CL5
1
2
U32
U32
2
A0+
3
A0-
6
A1+
7
A1-
9
A2+
10
A2-
11
A3+
12
A3-
13
SEL
15
LEDA0
16
LEDA1
42
LEDA2
5
PD
43
PAD_GND
PI3L720ZHEX_TQFN42_9X3P5~D
PI3L720ZHEX_TQFN42_9X3P5~D
C474
C474
1
2
Change P/N to TI (SA00003LD0L) 12/13
5
CLK_PCIE_LAN
CLK_PCIE_LAN#
PLTRST_LAN#
PCIE_WAKE#
3
OUT
4
GND
39
4
PCIE_PRX_GLANTX_P7_C
PCIE_PRX_GLANTX_N7_C
PCIE_PTX_GLANRX_P7_C
PCIE_PTX_GLANRX_N7_C
LANCLK_REQ#_R
LAN_SMB_CLK
LAN_SMB_DATA
LAN_APE_SMB_CLK0
LAN_APE_SMB_DATA0
LAN_APE_SMB_CLK1
LAN_APE_SMB_DATA1
NV_STRAP1
NV_STRAP0
LAN_SO
LAN_SI
LAN_CS#
LAN_SCLK
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#
TL12PAD~D @TL12PAD~D @
LOM_ACTLED_YEL#
XTALO
XTALI
12P_0402_50V8J~D
12P_0402_50V8J~D
1
CL6
CL6
2
LAN ANALOG
SWITCH
38
B0+
VDD1VDD4VDD8VDD14VDD21VDD30VDD
37
B0-
34
B1+
33
B1-
29
B2+
28
B2-
25
B3+
24
B3-
17
LEDB0
18
LEDB1
41
LEDB2
36
C0+
35
C0-
32
C1+
31
C1-
27
C2+
26
C2-
23
C3+
22
C3-
19
LEDC0
20
LEDC1
40
LEDC2
4
UL1A
UL1A
A10
PCIE_TXDP
B10
PCIE_TXDN
A6
PCIE_RXDP
B6
PCIE_RXDN
A8
REFCLK+
B8
REFCLK-
J9
CLKREQ#
J10
PERST#
K7
WAKE#
H5
SMB_CLK
J6
SMB_DATA
L10
APE_SMB_CLK0
L9
APE_SMB_DATA0
L8
APE_SMB_CLK1
L7
APE_SMB_DATA1
F11
HUSB_DP
E11
HUSB_DN
C10
NV_STRAP1
D10
NV_STRAP0
G5
SO
J3
SI
K3
CS#
J4
SCLK
K5
LINKLED#
J5
SPD100LED#
K4
SPD1000LED#
H6
TRAFFICLED#
A4
XTALO
B4
XTALI
BCM5761B0KFBGH_FBGA121~D
BCM5761B0KFBGH_FBGA121~D
SW_LAN_TX0+
SW_LAN_TX0-
SW_LAN_TX1+
SW_LAN_TX1-
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX3+
SW_LAN_TX3-
LAN_ACTLED_YEL#
LED_100_ORG#
LED_10_GRN#
DOCK_LOM_TRD0+
DOCK_LOM_TRD0-
DOCK_LOM_TRD1+
DOCK_LOM_TRD1-
DOCK_LOM_TRD2+
DOCK_LOM_TRD2-
DOCK_LOM_TRD3+
DOCK_LOM_TRD3-
DOCK_LOM_ACTLED_YEL#
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#
BCM5761
BCM5761
PCI-E
PCI-E
SMBUS
SMBUS LED C lockNVRAMUSB
LED ClockNVRAMUS B
3
LAN_TX0+
K2
TRD0+
TRD0-
TRD1+
TRD1-
TRD2+
TRD2-
Media
Media
TRD3+
TRD3-
ENERGYDET
VAUXPRSNT
VMAINPRSNT
LOW_PWR
GPIO1/SERIAL_DI
GPIO2/SERIAL_DO
GPIO0
MiscTEST
MiscTEST
APE_GPIO0
APE_GPIO1
APE_GPIO2
APE_GPIO3
APE_GPIO5
APE_GPIO6
APE_GPIO4
PWR_DOWN
TMS
TDO
TDI
TCK
TRST#
GPHY_TVCOI
RDAC
Bias
Bias
SW_LAN_TX0+ <37>
SW_LAN_TX0- <37>
SW_LAN_TX1+ <37>
SW_LAN_TX1- <37>
SW_LAN_TX2+ <37>
SW_LAN_TX2- <37>
SW_LAN_TX3+ <37>
SW_LAN_TX3- <37>
LAN_ACTLED_YEL# <37>
LED_100_ORG# <37>
LED_10_GRN# <37>
DOCK_LOM_TRD0+ <38>
DOCK_LOM_TRD0- <38>
DOCK_LOM_TRD1+ <38>
DOCK_LOM_TRD1- <38>
DOCK_LOM_TRD2+ <38>
DOCK_LOM_TRD2- <38>
DOCK_LOM_TRD3+ <38>
DOCK_LOM_TRD3- <38>
DOCK_LOM_ACTLED_YEL# <38>
DOCK_LOM_SPD100LED_ORG# <38>
DOCK_LOM_SPD10LED_GRN# <38>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
K1
J2
J1
H2
H1
G2
G1
ENERGYDET
J8
LOM_VAUXPRSNT
G7
LOM_VMAINPRSNT
B1
LOM_LOW_PWR_R
F10
GPIO1
E5
GPIO2
J7
GPIO0
D2
L3
LOM_SMB_ALERT#
L4
L5
L6
L2
L1
C1
LAN_PWR_DOW N
B2
G10
K6
F9
H7
K9
GPHY_TVCOI
E2
RDAC
F1
LAN_TX0-
LAN_TX1+
LAN_TX1-
LAN_TX2+
LAN_TX2-
LAN_TX3+
LAN_TX3-
APE_GPIO0
APE_GPIO2
APE_GPIO3
APE_GPIO5
APE_GPIO6
APE_GPIO4
LAN_TMS
LAN_TDO
LAN_TDI
LAN_TCK
LAN_TRST#
TO
DOCK
RL5 1K _0402_1%~DRL5 1K_0402_1%~D
RL6 1K _0402_1%~DRL6 1K_0402_1%~D
RL7 0_ 0402_5%~D@ RL7 0_0402_5 %~D@
RL8 1K _0402_1%~D@ RL8 1K_0402_1%~D@
RL9 1K _0402_1%~D@ RL9 1K_0402_1%~D@
RL13 0_0402_5%~D@RL13 0_0402_5%~D@
1 2
RL14 4.7K_0402_5%~DRL14 4.7K_0402_5%~D
1 2
RL21 4.7K_0402_5%~D
RL21 4.7K_0402_5%~D
1 2
RL23 1.2K_0402_1%~DRL23 1.2K_0402_1%~D
1 2
SIO_SLP_LAN#<16,39>
TL1 PAD~D@TL1 PAD ~D@
TL2 PAD~D@TL2 PAD ~D@
TL3 PAD~D@TL3 PAD ~D@
TL4 PAD~D@TL4 PAD ~D@
TL5 PAD~D@TL5 PAD ~D@
TL6 PAD~D@TL6 PAD ~D@
TL7 PAD~D@TL7 PAD ~D@
TL8 PAD~D@TL8 PAD ~D@
TL9 PAD~D@TL9 PAD ~D@
TL10 PAD~D@ TL10 PAD~D@UL2
TL11 PAD~D@ TL11 PAD~D@
@
@
AUX_ON<40>
12
12
12
12
12
RL12 4.7K_0402_5%~DRL12 4.7K_0402_5%~D
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
RL46 0_0402_5%~D@RL46 0_0402_5%~D@
1 2
1 2
RL47 0_0402_5%~D@ RL47 0_0402_5%~D@
RL210K_0402_5%~D RL210K_0402_5%~D
12
RL40_0402_5%~D @R L40_0402_5%~D @
12
LOM_SMB_ALERT# <39>
2
+3.3V_LAN
+3.3V_RUN
+3.3V_LAN
12
2
+3.3V_LAN
LOM_ENERGY_DET <39 >
LOM_LOW_PWR <39>
+3.3V_LAN
5
1
P
B
2
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
+3.3V_ALW2
12
61
2
+3.3V_LAN
LOM_LOW_PWR_R
@
@
C478
C478
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 2
4
O
U15
U15
@
@
R565
R565
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q35A
Q35A
1
+3.3V_LAN
LAN_APE_SMB_CLK0
LAN_APE_SMB_DATA0
LAN_APE_SMB_CLK1
LAN_APE_SMB_DATA1
+3.3V_LAN
R549
R549
10K_0402_5%~D
10K_0402_5%~D
R557
R557
10K_0402_5%~D
10K_0402_5%~D
@
@
WLAN_LAN_DISB# <39>
+PWR_SRC_S
12
R564
R564
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q35B
Q35B
5
4
NV_STRAP1
NV_STRAP0
LAN_SO
LAN_SI
LAN_CS#
LAN_SCLK
LAN_SMB_CLK
LAN_SMB_DATA
12
12
ENAB_3VLAN
1M_0402_5%~D
1M_0402_5%~D
12
R1638
R1638
12
@
@
@
@
RL15
RL15
4.7K_0402_5%~D
4.7K_0402_5%~D
12
@
@
@
@
RL24
RL24
4.7K_0402_5%~D
4.7K_0402_5%~D
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
6
2
1
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
2
12
12
RL282.2K_0402_5%~D RL282.2K_0402_5%~D
12
RL292.2K_0402_5%~D RL292.2K_0402_5%~D
12
RL302.2K_0402_5%~D RL302.2K_0402_5%~D
12
RL312.2K_0402_5%~D RL312.2K_0402_5%~D
12
RL322.2K_0402_5%~D RL322.2K_0402_5%~D
12
RL332.2K_0402_5%~D RL332.2K_0402_5%~D
RL18
RL18
12
RL27
RL27
@
@
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
+3.3V_M
12
@
@
RL19
RL19
4.7K_0402_5%~D
4.7K_0402_5%~D
+3.3V_LAN
@ R563
@
1 2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
12
RL20
RL20
0_1206_5%~D
0_1206_5%~D
12
12
@
@
@
@
RL16
RL16
RL17
RL17
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
12
12
@
@
@
@
RL25
RL25
RL26
RL26
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
4.7K_0402_5%~D
Q34
Q34
D
D
S
S
45
G
G
3
C477
C477
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LAN (1/2) BCM5761
LAN (1/2) BCM5761
LAN (1/2) BCM5761
LA-7902P
LA-7902P
LA-7902P
30 61W ednesday, March 07, 2012
30 61W ednesday, March 07, 2012
30 61W ednesday, March 07, 2012
1
4.7K_0402_5%~D
4.7K_0402_5%~D
R563
+3.3V_LAN+3.3V_ALW
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C476
C476
C475
C475
2
1.0
1.0
1.0
Page 31
5
4
3
2
1
+3.3V_LAN
D D
+1.2V_LAN
BLM18AG601SN1D_0603~D
BLM18AG601SN1D_0603~D
+3.3V_LAN
BLM18AG601SN1D_0603~D
BLM18AG601SN1D_0603~D
+3.3V_LAN
BLM18AG601SN1D_0603~D
BLM18AG601SN1D_0603~D
C C
+1.2V_LAN
BLM18AG601SN1D_0603~D
BLM18AG601SN1D_0603~D
+3.3V_LAN
BLM18AG601SN1D_0603~D
BLM18AG601SN1D_0603~D
+1.2V_LAN
BLM18AG601SN1D_0603~D
BLM18AG601SN1D_0603~D
B B
BLM18AG601SN1D_0603~D
BLM18AG601SN1D_0603~D
BLM18AG601SN1D_0603~D
BLM18AG601SN1D_0603~D
CL8
CL8
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
LL1
LL1
1 2
CL10
CL10
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
LL2
LL2
1 2
LL3
LL3
1 2
LL4
LL4
1 2
CL15
CL15
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
LL5
LL5
1 2
CL17
CL17
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
LL6
LL6
1 2
CL19
CL19
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
LL7
LL7
1 2
CL26
CL26
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
LL8
LL8
1 2
CL30
CL30
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
+3.3V_LAN_VDDIO
1
1
CL9
CL9
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
2
+1.2V_LAN_PCIE_SDSVDDL
1
1
CL11
CL11
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
2
+3.3V_LAN_XTALVDDH
1
CL13
CL13
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
+3.3V_LAN_BIASVDDH
1
CL14
CL14
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
+1.2V_LAN_AVDDL
1
1
CL16
CL16
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
2
+3.3V_LAN_AVDDH
1
1
CL18
CL18
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
2
+1.2V_LAN_PCIE_PLLVDDL
1
1
CL20
CL20
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
2
+1.2V_LAN_GPHY_PLLVDDL
1
1
CL27
CL27
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
2
+1.2V_LAN_PLLVDDL
1
1
CL28
CL28
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
2
+1.2V_LAN
LAN_VDDP
12
CL12 1U_0603_10V7K~DCL12 1U _0603_10V7K~D
+3.3V_LAN_VDDIO
+1.2V_LAN_PCIE_SDSVDDL
+3.3V_LAN_XTALVDDH
+3.3V_LAN_BIASVDDH
+1.2V_LAN_AVDDL
+3.3V_LAN_AVDDH
+1.2V_LAN_PCIE_PLLVDDL
+1.2V_LAN_GPHY_PLLVDDL
+1.2V_LAN_PLLVDDL
UL1B
UL1B
H8
G9
G8
E10
C9
F4
K8
H10
C2
A3
B9
A5
F2
E3
F3
G3
H3
C7
E1
C11
BCM5761B0KFBGH_FBGA121~D
BCM5761B0KFBGH_FBGA121~D
VDDC_H08
VDDC_G09
VDDC_G08
VDDC_E10
VDDC_C09
VDDP
VDDIO_K08
VDDIO_H10
VDDIO_C02
VDDIO_A03
PCIE_SDSVDDL
XTALVDDH
BIASVDDH
AVDDL_E03
AVDDL_F03
AVDDH_G03
AVDDH_H03
PCIE_PLLVDDL
GPHY_PLLVDDL
USB_PLLVDDL
BCM5761
BCM5761
H9
VSS_H09
H4
VSS_H04
G11
VSS_G11
G6
VSS_G06
G4
VSS_G04
F8
VSS_F08
F7
VSS_F07
VSS_F06
VSS_E08
VSS_E07
VSS_E06
VSS_E04
VSS_D04
VSS_D03
VSS_C06
VSS_B11
VSS_B07
VSS_A11
VSS_A09
VSS_A07
VSS_A02
TP_D07
TP_D06
TP_D05
TP_C05
TP_F05
TP_C03
TP_B05
NC_C04
NC_L11
NC_K11
NC_J11
NC_H11
NC_K10
DC_D11
NC_B03
DC_D09
DC_E09
DC_C08
TP_D08
REGCTL12
REGOUT25
F6
E8
E7
E6
E4
D4
D3
C6
B11
B7
A11
A9
A7
A2
D7
D6
D5
C5
F5
C3
B5
C4
L11
K11
J11
H11
K10
D11
B3
D9
E9
C8
D8
D1
A1
Cvddp must have
ESR < 1 Ohm.
LAN_TP_D07
LAN_TP_D06
LAN_TP_D05
LAN_TP_C05
LAN_TP_F05
LAN_TP_C03
LAN_TP_B05
LAN_NC_L11
LAN_NC_K11
LAN_NC_J11
LAN_NC_H11
LAN_NC_K10
LAN_DC_D09
LAN_TP_D08
LAN_REGCTL12
LAN_REGOUT25
RL34 10K_0402_5%~DRL34 10K_0402_5%~D
RL35 10K_0402_5%~DRL35 10K_0402_5%~D
RL36 10K_0402_5%~DRL36 10K_0402_5%~D
RL37 10K_0402_5%~DRL37 10K_0402_5%~D
RL38 10K_0402_5%~DRL38 10K_0402_5%~D
RL39 10K_0402_5%~DRL39 10K_0402_5%~D
RL40 10K_0402_5%~DRL40 10K_0402_5%~D
RL41 4.7K_0402_5%~D
RL41 4.7K_0402_5%~D
RL42 4.7K_0402_5%~D
RL42 4.7K_0402_5%~D
RL43 4.7K_0402_5%~DRL43 4.7K_0402_5%~D
RL44 0_0402_5%~DRL44 0_0402_5%~D
1 2
1 2
1 2
12
12
12
12
12
12
12
TL13 P AD~D@T L13 PAD~D@
TL14 P AD~D@T L14 PAD~D@
TL15 P AD~D@T L15 PAD~D@
TL16 P AD~D@T L16 PAD~D@
@
@
@
@
12
LAN_VDDP
LAN_REGCTL12
+3.3V_LAN
+3.3V_LAN
QL1
PBSS5540Z_SOT223-3~D
PBSS5540Z_SOT223-3~D
CL29
CL29
QL1
1
@
@
1
2
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
+3.3V_LAN
12
RL45
RL45
2 3
4
1
1
1
2
CL21
CL21
1.5_1206_5%
1.5_1206_5%
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
CL22
CL22
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
CL31
CL31
10U_0805_10V6K~D
10U_0805_10V6K~D
1
2
2
CL23
CL23
CL24
CL24
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
2
2
CL32
CL32
CL33
CL33
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+1.2V_LAN
1
2
CL25
CL25
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
2
2
CL35
CL35
CL34
CL34
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
Digital Bias
Digital Bias
GNDOthersVoltage
GNDOthersVoltage
PowerPower Power
PowerPower Power
Analog
Analog
PLL
Power
PLL
Power
Regulator
Regulator
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LAN (2/2) BCM5761
LAN (2/2) BCM5761
LAN (2/2) BCM5761
LA-7902P
LA-7902P
LA-7902P
31 61W ednesday, March 07, 2012
31 61W ednesday, March 07, 2012
31 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 32
5
4
3
2
1
D D
+3.3V_RUN_TPM
C C
short
PJP61
PJP61
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
1 2
R873 0_0402_5%~D1@ R873 0_0402_5%~D1@
SP_TPM_LPC_EN<39>
+3.3V_RUN_TPM+3.3V_RUN
@
@
CLK_PCI_TPM_TCM
12
RE5
@ RE5
@
33_0402_5%~D
33_0402_5%~D
1
@
@
CE3
CE3
27P_0402_50V8J~D
27P_0402_50V8J~D
2
+3.3V_SB3V
+3.3V_RUN_TPM
1 2
R1663 10K_0402_5%~D@R 1663 10K_0402_5%~D@
1 2
R1662 0_0402_5%~D
R1662 0_0402_5%~D
5@
5@
D87 RB751S40T1_SOD523-2~D@D87 RB751S40T1_SOD523-2~D@
LPC_LAD0<14,34,39,40>
LPC_LAD1<14,34,39,40>
LPC_LAD2<14,34,39,40>
LPC_LAD3<14,34,39,40>
CLK_PCI_TPM_TCM< 15>
LPC_LFRAME#<14,34,39,40>
PCH_PLTRST#_EC<17,34,35,39,40>
IRQ_SERIRQ<14,39,40>
CLKRUN#<16,39,40>
+3.3V_SB3V
4700P_0402_25V7K~D
4700P_0402_25V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1@ C45
1@
1@ C44
SP_TPM_LPC_EN_R
21
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLK_PCI_TPM_TCM
LPC_LFRAME#
PCH_PLTRST#_EC
IRQ_SERIRQ
CLKRUN#
TCM_BA1
1@
1
1
C45
C44
2
2
ATMEL TPM for E4
U39
1@ U39
1@
5
SB3V
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
1
ATEST_1
2
ATEST_2
3
ATEST_3
AT97SC3204-X2A18-AB_TSSOP28
AT97SC3204-X2A18-AB_TSSOP28
NBO_13
NBO_14
TESTBI
GND_11
GND_18
GND_25
VCC_0
VCC_1
VCC_2
V_BAT
GPIO6
TESTI
NC_7
GND_4
10
19
24
12
13
14
6
9
8
7
4
11
18
25
+3.3V_RUN_TPM
NC_12
JETWAY_CLK14M
NC_PNC_P
1 2
C554 1U_0402_6.3V6K~D
C554 1U_0402_6.3V6K~D
4@
NC_6
TCM_BA0
PP
4@
1 2
R656 4.7K_0402_5%~D@ R656 4.7K_0402_5%~D@
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
5@ C550
5@
1
1
C550
2
2
JETWAY_CLK14M <15>
+3.3V_RUN_TPM
Co-lay U37 and U39
LPC layout: Place TCM first and then end LPC with TPM.
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
5@ C553
5@
5@ C552
5@
5@ C551
5@
1
1
C553
C552
C551
2
2
+3.3V_RUN
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C51
C51
2
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
Change CON N to pitch 1.0 _081 5
USBP13_R_DÂUSBP13_R_D+
3
D73
D73
1
PS_HPF10052-061000R
PS_HPF10052-061000R
1
2
3
4
5
6
JBIO1
JBIO1
1
2
3
4
5
G1
6
G2
CONN@
CONN@
7
8
Change CIS symbol_ 12/07
L52
L52
USBP13-<17>
USBP13+<17>
4
4
1
1
OCF2012181YZF_4P
OCF2012181YZF_4P
1 2
R741 0_0402_5%~D@ R741 0_0402_5%~D@
1 2
R742 0_0402_5%~D@ R742 0_0402_5%~D@
USBP13_R_D-
3
3
USBP13_R_D+
2
2
China TCM: NationZ & Jetway co-lay
VDD_0
VDD_1
VDD_2
GND_4
NC_5
NC_12
NC_13
NC_1
NC_2
NC_6
NC_8
NC_P
+3.3V_RUN_TPM
10
19
24
11
18
25
4
5
12
13
1
2
6
8
14
NC_12
JETWAY_CLK14M
NC_6
NC_P
+3.3V_SB3V
JETWAY_CLK14M
12
@
@
RE6
RE6
33_0402_5%~D
33_0402_5%~D
1
@
@
CE4
CE4
27P_0402_50V8J~D
27P_0402_50V8J~D
2
B B
+3.3V_RUN_TPM
12
12
12
R658
@R658
@
10K_0402_5%~D
10K_0402_5%~D
12
R660
5@ R660
5@
10K_0402_5%~D
10K_0402_5%~D
TCM_BA0
TCM_BA1
R657
@R657
@
10K_0402_5%~D
10K_0402_5%~D
R659
5@ R659
5@
10K_0402_5%~D
10K_0402_5%~D
A A
LOW:Power Down Mode
High:Working Mode
SP_TPM_LPC_EN_R
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLK_PCI_TPM_TCM
LPC_LFRAME#
PCH_PLTRST#_EC
IRQ_SERIRQ
CLKRUN#
PP
TCM_BA1
TCM_BA0
U37
4@ U37
4@
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
7
PP
3
BA_1
9
BA_0
SSX44-B-D-T1_TSSOP28~D
SSX44-B-D-T1_TSSOP28~D
GND_11
GND_18
GND_25
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Compal Electronics, Inc.
TPM/TCM/BIO Conn
TPM/TCM/BIO Conn
TPM/TCM/BIO Conn
LA-7902P
LA-7902P
LA-7902P
32 61W ednesday, March 07, 2012
32 61W ednesday, March 07, 2012
32 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 33
A
1 1
B
C
D
E
Vendor rev iew in 6/2 2 and cha nge C576 t o 0.01uF
+3.3V_RUN
+1.5V_RUN
+PE_VDDH
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
2
2 2
C574
C574
C573
C573
2
place close to pin U38.32
L47
L47
1 2
BLM18BD601SN1D_0603~D
BLM18BD601SN1D_0603~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C561
C561
C562
C562
2
2
CLK_PCIE_MMI<15>
CLK_PCIE_MMI#<15>
PCIE_PRX_MMITX_P6<15>
PCIE_PRX_MMITX_N6<15>
PCIE_PTX_MMIRX_P6<15>
PCIE_PTX_MMIRX_N6<15>
PLTRST_MMI#<17>
MMICLK_REQ#<15>
L45
L45
BLM18PG471SN1D_2P~D
BLM18PG471SN1D_2P~D
1 2
C569 0.1U_0402_10V7K~DC569 0.1U_0402_10V7K~D
1 2
C571 0.1U_0402_10V7K~DC571 0.1U_0402_10V7K~D
1 2
C567 0.1U_0402_10V7K~DC567 0.1U_0402_10V7K~D
1 2
C568 0.1U_0402_10V7K~DC568 0.1U_0402_10V7K~D
1 2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
1
C577
C577
2
2
1 2
L44 BLM18BD601SN1D_0603~DL44 BLM18BD601SN1D_0603~D
C578 4.7U_0603_6.3V6K~DC578 4.7U_0603_6.3V6K~D
R677 191_0402_1%~DR677 191_0402_1%~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C576
C576
C575
C575
2
+3.3VDDH
+VDDH_SD +OZ_AVDD
+PE_VDDH
+PE_VDDH
12
PCIE_PRX_MMITX_P6_C
PCIE_PRX_MMITX_N6_C
PCIE_PTX_MMIRX_P6_C
PCIE_PTX_MMIRX_N6_C
1 2
U38
U38
16
3.3VDDH
9
VDDH
32
PE_VDDH
2
PE_REFCLKP
1
PE_REFCLKM
6
PE_TXP
7
PE_TXM
5
PE_RXP
4
PE_RXM
3
PE_REXT
33
GPAD
13
PE_RST#
14
MULTI-IO1
31
MULTI-IO2
OZ600FJ0LN_QFN32_5X5~D
OZ600FJ0LN_QFN32_5X5~D
MMI_VCC_OUT
SD_CMD/MS_BS
DVDD
AVDD
SKT_VCC
SD_D1
SD_D2
MMI_D0
MS_D1
MS_D2
MMI_D3
MMI_D4
MMI_D5
MMI_D6
MMI_D7
MS_CD#
MMI_CLK
SD_CD#
SD_WPI
+OZ_DVDD
10
8
+SKT_VCC
17
15
SD/MMCDAT1_R
28
SD/MMCDAT2_R
26
SD/MMCDAT0_R
29
27
25
SD/MMCDAT3_R
24
SD/MMCDAT4_R
23
SD/MMCDAT5_R
22
SD/MMCDAT6_R
21
20
11
SD/MMCCMD_R
19
18
SD/MMCCD#
12
SDWP
30
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C563
C563
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C565
C565
2
R663 33_0402_5%~DR663 33_0402_5%~D
R664 33_0402_5%~DR664 33_0402_5%~D
R665 33_0402_5%~DR665 33_0402_5%~D
R668 33_0402_5%~DR668 33_0402_5%~D
R669 33_0402_5%~DR669 33_0402_5%~D
R670 33_0402_5%~DR670 33_0402_5%~D
R672 33_0402_5%~DR672 33_0402_5%~D
R673 33_0402_5%~DR673 33_0402_5%~D
R674 33_0402_5%~DR674 33_0402_5%~D
R676 10_0402_5%~DR676 10_0402_5%~D
1
C566
C566
2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
2
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
C564
C564
SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT0
SD/MMCDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7SD/MMCDAT7_R
SD/MMCCMD
SD/MMC_CLKSD/MMCC LK_R
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C559
C559
2
+3.3V_RUN_CARD
C560
C560
Note: The trace need to route as
daisy-chain and the trace of SD signals
need to route as short as possible
SP07110627 0
JSD1
3 3
Vendor rev iew in 6/2 2 and res erve for S D3.0 UHS- I 200MHz t ransfer
1
C775
@C775
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
1
C776
@C776
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
1
C777
@C777
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
1
C779
@C779
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
1
@C780
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
SD/MMCCMDSD/MMCDAT1SD/MMCDAT0 SD/MMCDAT2 SD/MMCDAT3
C780
EMI request
SD/MMC_CLK
@
@
RE678
RE678
33_0402_5%~D
33_0402_5%~D
1 2
1
CE757
@CE757
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
+3.3V_RUN_CARD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C570
C570
2
SD/MMCDAT3
SD/MMCCMD
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
10K_0402_5%~D
10K_0402_5%~D
12
1
C572
C572
R826
R826
2
SD/MMC_CLK
SD/MMCDAT0
SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7
SD/MMCCD#
SDWP
SD/MMCCD#
SDWP
Place closed R676 pin 2
4 4
JSD1
14
DAT3/SD1
12
CMD/SD2
10
VSS1/SD3
9
VCC/SD4
8
CLK/SD5
6
GND/VSSS2/SD6
4
DAT0/SD7
3
DAT1/SD8
15
DAT2/SD9
13
DAT4/MMC10
11
DAT5/MMC11
7
DAT6/MMC12
5
DAT7/MMC13
19
CD_WP_SW /GND
20
CD_WP_SW /GND
17
CD_SW/SD
18
WP_SW/SD
2
CD_SW_TAISOL/SD
1
WP/SW_TAISOL/SD
16
GND_SW
T-SOL_156-4000000601_NR
T-SOL_156-4000000601_NR
CONN@
CONN@
only for MMC/SD
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
A
B
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
D
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Card Reader OZ600FJ0
Card Reader OZ600FJ0
Card Reader OZ600FJ0
LA-7902P
LA-7902P
LA-7902P
33 61W ednesday, March 07, 2012
33 61W ednesday, March 07, 2012
33 61W ednesday, March 07, 2012
E
1.0
1.0
1.0
Page 34
5
USB_MCARD2_DET#
D D
C C
+3.3V_PCIE_WWAN
B B
R694 100K_0402_5%~DR694 100K_0402_5%~D
MINI1CLK_REQ#<15>
CLK_PCIE_MINI1#<15>
CLK_PCIE_MINI1<15>
PCIE_PRX_WANTX_N 1<15>
PCIE_PRX_WANTX_P 1<15>
PCIE_PTX_WANRX_N 1<15>
PCIE_PTX_WANRX_P 1<15>
PCIE_MCARD2_DET#<17>
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
1
C610
C610
C611
C611
2
2
2
R727 0_0805_5%~DR72 7 0_0805_5%~D
HW_GPS_DISABLE2#<39>
33P_0402_50V8J~D
33P_0402_50V8J~D
C612
C612
RF review in 0629
A A
+3.3V_RUN
12
Mini WWAN/GPS/LTE/UWB H=6.7
PCIE_WAKE#
MINI1CLK_REQ#
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
PCIE_PRX_WANTX_N 1
PCIE_PRX_WANTX_P 1
C597 0.1U_0402_10V7K~DC597 0.1U_0402_10V7K~D
PCIE_PTX_WANRX_N 1_C
1 2
PCIE_PTX_WANRX_P 1_C
1 2
C599 0.1U_0402_10V7K~DC599 0.1U_0402_10V7K~D
1 2
R725 0_0402_5%~D@ R725 0_0402_5%~D@
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
2
12
PCIE_MCARD2_DET#_R
33P_0402_50V8J~D
33P_0402_50V8J~D
1
C613
C613
C614
C614
2
+1.5V_RUN_WW AN+1.5V_RUN
1
2
330U_6.3V_M
330U_6.3V_M
1
1
C615
C615
+
+
2
2
33P_0402_50V8J~D
33P_0402_50V8J~D
1
C593
C593
2
DDR_XDP_WAN_ SMBCLK<7,12,13,14,15,27>
DDR_XDP_WAN_ SMBDAT<7,12,13,14,15,27>
Follow CON N List_060 9A
33
35
37
39
41
43
45
47
49
51
ACES_51711-0520W-001
ACES_51711-0520W-001
330U_6.3V_M
330U_6.3V_M
@
@
C1176
C1176
+
+
PWR
Rail
+3.3V
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
+3.3Vaux
+1.5V
C594
C594
JMINI1
JMINI1
112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
GND53GND
CONN@
CONN@
LED_WWAN _OUT#
Voltage
Tolerance
+-9%
+-9%
+-5%
+3.3V_PCIE_WWAN+3.3V_PCIE_WWAN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
4
R1157 0_04 02_5%~D@R1157 0_0402_5%~D@
R1158 0_04 02_5%~D@R1158 0_0402_5%~D@
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
R704 0_0402_5%~D@ R704 0 _0402_5%~D@
WWAN_SM BCLK
WWAN_SM BDAT
USBP5ÂUSBP5+
USB_MCARD2_DET#
LED_WWAN _OUT#LED_WWAN_OUT#
+3.3V_PCIE_WWAN
R719
R719
1 2
100K_0402_5%~D
100K_0402_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
S
S
1 2
G
G
2
13
D
D
Q77
Q77
+3.3V_PCIE_WWAN
2.2K_0402_5%~D
2.2K_0402_5%~D
12
12
12
+1.5V_RUN_WW AN
+SIM_PWR
1 2
R697 0_0402_5%~D@R 697 0_0402_5%~D@
@R1159
@
R1159
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250
375
2.2K_0402_5%~D
2.2K_0402_5%~D
@R1160
@
12
R1160
WWAN_SM BCLK
WWAN_SM BDAT
UIM_DATA <37 >
UIM_CLK <37>
UIM_RESET <37>
UIM_VPP <37>
WWAN_RA DIO_DIS# <39>
PCH_PLTRST#_EC <17,32,35,39,40>
USBP5- <17>
USBP5+ <17>
USB_MCARD2_DET# <18>
PCIE_MCARD2_DET#USB_MCARD2_DET#
WIRELESS_LED# <39,43>
250 (Wake enable)
5 (Not wake enable)
NA
3
WLAN_RADIO_DIS#<39>
COEX2_WLAN_ACTIVE<41>
COEX1_BT_ACTIVE<41>
PCIE_PTX_WLANRX_ N2<15>
PCIE_PTX_WLANRX_ P2<15>
COEX2_WLAN_ACTIVE
C600
@C600
@
33P_0402_50V8J~D
33P_0402_50V8J~D
1 2
R693 0_0402_5%~D@ R693 0_0402_5%~D@
D31 R B751S40T1_SOD523-2~DD31 RB751S40T1_SOD523-2~D
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE
MINI2CLK_REQ#<15>
CLK_PCIE_MINI2#<15>
CLK_PCIE_MINI2<15>
HOST_DEBUG_RX<40>
PCIE_PRX_WLANTX_ N2<15>
PCIE_PRX_WLANTX_ P2<15>
PCIE_MCARD1_DET#<18>
PCH_CL_CLK1<15>
PCH_CL_DATA1<15>
PCH_CL_RST1#<15>
+1.5V_RUN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C601
C601
2
2
21
PCIE_WAKE#< 30,35,40>
R700 0_0402_5%~D@R700 0_0402_5%~D@
R702 0_0402_5%~D@R702 0_0402_5%~D@
MSCLK<40>
C596 0.1U_0402_10V7K~DC596 0.1U_0402_10V7K~ D
1 2
1 2
C598 0.1U_0402_10V7K~DC598 0.1U_0402_10V7K~ D
+3.3V_WLAN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C602
C602
2
2
Mini WLAN/WIMAX H=6.7
WLAN_RADIO_DIS#_R
PCIE_WAKE#
1 2
1 2
PCIE_PRX_WLANTX_ N2
PCIE_PRX_WLANTX_ P2
PCIE_PTX_WLANRX_ N2_C
PCIE_PTX_WLANRX_ P2_C
PCIE_MCARD1_DET#
1 2
R707 0_0402_5%~D@ R707 0_0402_5%~D@
check
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
@ C603
@
1
1
C603
C604
C604
2
2
2
Follow CON N List_060 9A
+3.3V_WLAN
33
35
37
39
41
43
45
47
49
51
ACES_51711-0520W-001
ACES_51711-0520W-001
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
C605
C605
1
1
2
C606
C606
C607
C607
2
1
JMINI2
JMINI2
112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
33
35
37
39
41
43
45
47
49
51
GND53GND
CONN@
CONN@
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
C608
C608
R698 0_0402_5%~D@R 698 0_0402_5%~D@
34
36
38
40
42
44
46
48
50
52
1 2
+3.3V_WLAN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
WIMAX_LED#
WLAN_LED#
PCIE_MCARD1_DET#USB_MCARD1_DET#
+1.5V_RUN
MSDATA
WLAN_RADIO_DIS#_R
R703 0_0402_5%~D@ R703 0_0402_5%~D@
USBP4ÂUSBP4+
USB_MCARD1_DET#
WIMAX_LED#
WLAN_LED#
R706 0_0402_5%~D@R 706 0_0402_5%~D@
WIMAX_LED# STUDY FOR DEBUG
R718
R718
1 2
100K_0402_5%~D
100K_0402_5%~D
PCIE_MCARD1_DET#
USB_MCARD1_DET#
1 2
R705
R705
1/2 Minicard Pink Pather/60GHz Card H=6.7
+1.5V_RUN
1
2
PCIE_PTX_WPANRX _N5<15>
PCIE_PTX_WPANRX _P5<15>
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
C619
C619
COEX2_WLAN_ACTIVE
PCIE_PRX_WPANTX _N5<15>
PCIE_PRX_WPANTX _P5<15>
PCIE_MCARD3_DET#<18>
+3.3V_RUN
+3.3V_PCIE_FLASH
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C620
C620
2
2
MINI3CLK_REQ#<15>
CLK_PCIE_MINI3#<15>
CLK_PCIE_MINI3<15>
PCLK_80H<15>
C617 0.1U_0402_10V7K~DC617 0.1U_0402_10V 7K~D
C618 0.1U_0402_10V7K~DC618 0.1U_0402_10V 7K~D
1 2
R711 100K_0402_5%~DR711 100K_0402_5%~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@ C621
@
1
C622
C622
C621
2
PCIE_WAKE#
R709 0_0402_5%~D@ R709 0_0402_5%~D@
MINI3CLK_REQ#
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
PCH_PLTRST#_EC
PCLK_80H
PCIE_PRX_WPANTX _N5
PCIE_PRX_WPANTX _P5
1 2
1 2
PCIE_MCARD3_DET#
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
1
C623
C623
1
2
+3.3V_PCIE_FLASH
1 2
PCIE_PTX_WPANRX _N5_C
PCIE_PTX_WPANRX _P5_C
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
C626
C626
C625
C625
C624
C624
2
1
Follow CON N List_060 9A
112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
33
35
37
39
41
43
45
47
49
51
GND53GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
+3.3V_PCIE_FLASH
NC_USB_MCARD3_DE T#
JMINI3
JMINI3
33
35
37
39
41
43
45
47
49
51
ACES_51711-0520W-001
ACES_51711-0520W-001
CONN@
CONN@
USB_MCARD3_DET# PCIE_MCARD3_DET#
LPC_LFRAME#
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
1 2
R710 0_0402_5%~D@ R710 0_0402_5%~D@
USBP6ÂUSBP6+
PCIE_MCARD1_DET#
R699 100K_04 02_5%~D@R699 100K_040 2_5%~D@
R701 100K_04 02_5%~DR701 100K_0402_5%~D
1 2
C595 4700P_0402_25V7K~DC595 4700P _0402_25V7K~D
PCH_PLTRST#_EC
12
MSDATA
1 2
100K_0402_5%~D
100K_0402_5%~D
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q124A
Q124A
+1.5V_RUN
LPC_LFRAME# <14,32,39,40>
LPC_LAD3 <14,32,39,40>
LPC_LAD2 <14,32,39,40>
LPC_LAD1 <14,32,39,40>
LPC_LAD0 <14,32,39,40>
PCH_PLTRST#_EC
USBP6- <17>
USBP6+ <17>
WPAN Noise
USB_MCARD3_DET#
1
C627
@C627
@
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
1
1 2
R692 100K_0402_5%~DR692 100K_0402_5%~D
1 2
1 2
HOST_DEBUG_TX <40>
USB_MCARD1_DET# <14,18>
MSDATA <40>
+3.3V_WLAN
5
4
Q124B
Q124B
1 2
R708 0_0402_5%~D@R 708 0_0402_5%~D@
+3.3V_ALW_PCH
+3.3V_RUN
USBP4- <17>
USBP4+ <17>
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
WIRELESS_LED#WIRELESS_LED#
3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Mini Card
Mini Card
Mini Card
LA-7902P
LA-7902P
LA-7902P
34 61W ednesday, March 07, 2012
34 61W ednesday, March 07, 2012
34 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 35
5
4
3
2
1
Power Control for Mini card2
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R713
R713
61
+3.3V_ALW
Q41A
Q41A
2
12
R726
R726
100K_0402_5%~D
100K_0402_5%~D
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
6
12
R714
R714
2
1
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q39B
Q39B
5
4
100K_0402_5%~D
100K_0402_5%~D
12
R721
R721
MCARD_WW AN_PWREN#
61
D D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
AUX_EN_WOW L<39>
C C
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MCARD_WW AN_PWREN<39>
B B
+3.3V_ALW
Q39A
Q39A
2
12
R716
R716
100K_0402_5%~D
100K_0402_5%~D
Power Control for Mini card1
Q38
Q38
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
S
S
45
G
G
3
1M_0402_5%~D
1M_0402_5%~D
12
R1620
R1620
+PWR_SRC_S
12
3
5
4
1
2
+3.3V_ALW
470K_0402_5%~D
470K_0402_5%~D
R722
R722
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q41B
Q41B
+3.3V_WLAN
12
R715
R715
20K_0402_5%~D
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C632
C632
20K_0402_5%~D
Remove Exp ress card PCIE TX c ap
+PCIE_WWAN
Q40
Q40
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
RF review in 0629
3
220P_0402_50V8J~D
4.7M_0402_5%~D
4.7M_0402_5%~D
12
220P_0402_50V8J~D
12
C644
R1625
R1625
C644
short
PJP9
PJP9
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
+3.3V_PCIE_WWAN
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q73
Q73
CARD_SMBCLK
CARD_SMBDAT
USBP10+<17>
USBP10-<17>
CLK_PCIE_EXP#< 15>
CLK_PCIE_EXP<15>
PCIE_PRX_EXPTX_N3<15>
PCIE_PRX_EXPTX_P3<15>
PCIE_PTX_EXPRX_N3<15>
PCIE_PTX_EXPRX_P3<15>
CARD_SMBCLK<40>
CARD_SMBDAT<40>
PCIE_WAKE#<34,40>
12
R723
R723
1K_0402_1%~D
1K_0402_1%~D
+3.3V_WWAN_CHG
13
D
D
2
G
G
S
S
+3.3V_SUS
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
12
12
R731
R731
R732
R732
C647 0.1U_0402_10V7K~DC647 0.1U_0402_10V 7K~D
C648 0.1U_0402_10V7K~DC648 0.1U_0402_10V 7K~D
CARD_SMBCLK
CARD_SMBDAT
MCARD_WW AN_PWREN#
PCIE_PTX_EXPRX_N3_C
1 2
PCIE_PTX_EXPRX_P3_C
1 2
Express/Smart Card Conn.
SP021106240
+3.3V_RUN
JEXP1
JEXP1
2
1
2
4
3
4
6
5
6
8
7
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
9
10
11
12
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
37
38
39
40
G1
G2
E&T_1001K-F40C-03L
E&T_1001K-F40C-03L
CONN@
CONN@
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
+5V_RUN+1.5V_RUN
EXPRESS_DET#
EXPRCRD_STBY_R#
SMART_DET#
+3.3V_SUS
+1.5V_RUN
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C635
C635
12
12
R7170_0402_5%~D @R7170_0402_5%~D @
1
2
R7340_0402_5%~D @R73 40_0402_5%~D @
1
2
Reserve fo r ESD in 1 130
PCH_PLTRST#_EC EXPCLK_REQ#
1
CE14
CE14
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
@
@
EXPRESS_DET#
1
CE22
CE22
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
@
@
+3.3V_SUS
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C634
C634
EXPRESS_DET# <39>
SIO_SLP_S3# <11,16,27,39,42,47,48,49>
RUN_ON <27,39,42,47,48>
EXPCLK_REQ# <15>
SMART_DET# <39>
PCH_PLTRST#_EC <17,32,34,39,40>
CLK_SMART_48M <15>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C633
C633
2
1
CE20
CE20
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
@
@
+5V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C645
C645
2
Power Control for Mini card3
+3.3V_ALW
+3.3V_ALW
Q43A
5
Q43A
2
12
R733
R733
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MCARD_MISC_PW REN<39>
A A
+PWR_SRC_S
470K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
12
R728
R728
61
470K_0402_5%~D
12
R729
R729
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q43B
Q43B
5
4
Q42
Q42
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
4.7M_0402_5%~D
4.7M_0402_5%~D
12
R1628
R1628
12
220P_0402_50V8J~D
220P_0402_50V8J~D
C650
C650
+3.3V_PCIE_FLASH
4
12
20K_0402_5%~D
20K_0402_5%~D
R730
R730
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MINI CARD PWR/EXP_SC
MINI CARD PWR/EXP_SC
MINI CARD PWR/EXP_SC
LA-7902P
LA-7902P
LA-7902P
1
35 61W ednesday, March 07, 2012
35 61W ednesday, March 07, 2012
35 61W ednesday, March 07, 2012
1.0
1.0
1.0
Page 36
5
L95
USB3RN2<17>
USB3RP2<17>
D D
USB3TN2<17>
USB3TP2<17>
USB3TN2
C412 .1U_0402_16V7K~DC412 .1U_0402_16V7K~D
USB3TP2
C413 .1U_0402_16V7K~DC413 .1U_0402_16V7K~D
USB3RN2
USB3RP2
USB3T_N2
12
12
L95
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1605 0_0402_5%~D@R1605 0_0402_5%~D@
1 2
R1604 0_0402_5%~D@R1604 0_0402_5%~D@
L96
L96
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1606 0_0402_5%~D@R1606 0_0402_5%~D@
1 2
R1603 0_0402_5%~D@R1603 0_0402_5%~D@
4
2
2
3
3
2
2
3
3
USB3RN2_D-
USB3RP2_D+
USB3TN2_D-
USB3TP2_D+USB3T_P2
USBP1-<36>
USBP1+<36>
USBP1- USBP1_R_D-
USBP1+
USB3TP2_D+ USB3TP2_D+
USB3TN2_D- U SB3TN2_D-
USB3RP2_D+ USB3RP2_D+
USB3RN2_D- USB3RN2_D-
3
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1
1
4
4
L51
L51
1 2
R736 0_0402_5%~D@R 736 0_0402_5%~D@
1 2
R740 0_0402_5%~D@R 740 0_0402_5%~D@
D78
D78
1
2
4
5
3
8
8
IP4292CZ10-TB_XSON10U10~D
IP4292CZ10-TB_XSON10U10~D
2
2
3
3
10
9
7
6
USBP1_R_D+
+5V_USB_PWR
1
+
+
2
2
1
CONN list 0627B
JUSB1
JUSB1
1
VBUS
2
D-
3
D+
4
GND
5
StdA-SSRX-
6
StdA-SSRX+
GND-DRAIN
StdA-SSTXÂStdA-SSTX+
CONN@
CONN@
GND
GND
GND
GND
7
8
9
LOTES_AUSB0015-P001A
LOTES_AUSB0015-P001A
10
11
12
13
3
1
USBP1_R_DÂUSBP1_R_D+
2
D72
PESD5V0U2BT_SOT23-3~D
D72
PESD5V0U2BT_SOT23-3~D
USB3RN2_DÂUSB3RP2_D+
USB3TN2_DÂUSB3TP2_D+
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
150U_D2_6.3VY_R15M~D
150U_D2_6.3VY_R15M~D
C651
C651
1
C654
C654
2
+5V_ALW
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C C
D79
L97
B B
A A
USB3TN3<17>
USB3TP3<17>
USB3RN3<17>
USB3RP3<1 7>
12
C414 .1U_0402_16V7K~DC414 .1U_0402_16V7K~D
12
C415 .1U_0402_16V7K~DC415 .1U_0402_16V7K~D
USB3T_N3
L98
L98
1
1
2
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
R1607 0_0402_5%~D@R1607 0_0402_5%~D@
R1608 0_0402_5%~D@R1608 0_0402_5%~D@
4
1 2
1 2
3
L97
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
R1609 0_0402_5%~D@R1609 0_0402_5%~D@
R1612 0_0402_5%~D@R1612 0_0402_5%~D@
2
3
1 2
1 2
USB3RN3_D-
USB3RP3_D+
2
2
3
3
USB3TP3_D+USB3T_P3
USBP2-<17>
USBP2+<17>
USB3TP3_D+ USB3TP3_D+USB3TN3_D-
USB3TN3_D- U SB3TN3_D-
USB3RP3_D+ USB3RP3_D+
USB3RN3_D- USB3RN3_D-
L90
L90
1
1
4
4
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
R1150 0_0402_ 5%~D@ R1150 0_0402_5%~D@
R1151 0_0402_ 5%~D@ R1151 0_0402_5%~D@
D79
1
2
4
5
3
8
8
IP4292CZ10-TB_XSON10U10~D
IP4292CZ10-TB_XSON10U10~D
2
3
1 2
1 2
10
9
7
6
USBP2_D-
2
USBP2_D+
3
2
3
1
1
C676
C676
2
2
D74
D74
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
ESATA_USB_PWR _EN#<39>
C675
C675
ESATA_PTX_DRX_P4_C<14>
ESATA_PTX_DRX_N4_C<14>
ESATA_PRX_DTX_N4_C<14>
ESATA_PRX_DTX_P4_C<14>
Place D74 close to JESATA1
5
4
3
2
U48
U48
1
GND
FAULT1#
2
IN
OUT1
3
OUT2
IN
4
TPS2560DRCR-PG1.1_SON10_3X3~D
TPS2560DRCR-PG1.1_SON10_3X3~D
ESATA_PTX_DRX_P4_C
ESATA_PTX_DRX_N4_C
ESATA_PRX_DTX_N4_C
ESATA_PRX_DTX_P4_C
ILIM
EN1#
EN2#5FAULT#2
T-PAD
+SATA_SIDE_PWR
150U_D2_6.3VY_R15M~D
150U_D2_6.3VY_R15M~D
1
+
+
2
C671 0.01U_0402_16V7K~DC671 0.01U_0402_16V7K~D
C672 0.01U_0402_16V7K~DC672 0.01U_0402_16V7K~D
C673 0.01U_0402_16V7K~DC673 0.01U_0402_16V7K~D
C674 0.01U_0402_16V7K~DC674 0.01U_0402_16V7K~D
C667
C667
1 2
1 2
1 2
1 2
10
9
8
7
6
11
USB_OC0# <17,37>
USB_OC1# <17>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C668
C668
1
2
SATA_PTX_DRX_P4
SATA_PTX_DRX_N4
SATA_PRX_DTX_N4
SATA_PRX_DTX_P4
USB3RN3_DÂUSB3RP3_D+
USB3TN3_DÂUSB3TP3_D+
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+5V_USB_PWR
+SATA_SIDE_PWR
TEMP: DC231106170
JESA1
JESA1
1
USBP2_DÂUSBP2_D+
VBUS
2
D-
USB2.0
USB2.0
3
D+
4
GND
5
GND
6
A+
7
A-
ESATA
ESATA
8
GND
9
B-
10
B+
11
GND
12
SSRX-
13
SSRX+
14
GND
15
SSTX-
USB3.0
USB3.0
16
SSTX+
17
GND
18
GND
19
GND
20
GND
TAIWI_EU147-165CRL-TW
TAIWI_EU147-165CRL-TW
CONN@
CONN@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
USB2.0/3.0 ESATA
USB2.0/3.0 ESATA
USB2.0/3.0 ESATA
LA-7902P
LA-7902P
LA-7902P
1
12
R748
R748
24.9K_0402_1%~D
24.9K_0402_1%~D
36 61W ednesday, March 07, 2012
36 61W ednesday, March 07, 2012
36 61W ednesday, March 07, 2012
1.0
1.0
1.0
Page 37
5
4
3
2
1
AUDIO BOARD
Pitch=0.5
Follow CON N List_113 0A
D D
AUD_HP_OUT_R<29>
AUD_HP_OUT_L<29>
MIC_IN_R<29>
AUD_HP_NB_SENSE<29,39>
USB_OC4#<17>
USB_SIDE_EN#<39>
Change CIS symbol_ 12/07
L107
USBP9+<17>
USBP9-<17>
C C
USBP9+
USBP9-
L107
1
1
4
4
OCF2012181YZF_4P
OCF2012181YZF_4P
1 2
R1656 0_0402_5%~D
R1656 0_0402_5%~D
@
@
1 2
R1657 0_0402_5%~D
R1657 0_0402_5%~D
@
@
2
2
3
3
+5V_ALW
USBP9_D+
USBP9_D-
AUD_HP_OUT_R
AUD_HP_OUT_L
MIC_IN_R
AUD_HP_NB_SENSE
USBP9_D+
USBP9_D-
C1186
C1186
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2
JAUD1
JAUD1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
GND
22
GND
ACES_51522-0200N-P01
ACES_51522-0200N-P01
CONN@
CONN@
+5V_ALW
USB_OC0#<17,36>
USB_SIDE_EN#<39>
USBP0-<17>
USBP0+<17>
SW_LAN_TX0-<30>
SW_LAN_TX0+<30>
SW_LAN_TX1-<30>
SW_LAN_TX1+<30>
SW_LAN_TX2-<30>
SW_LAN_TX2+<30>
SW_LAN_TX3-<30>
SW_LAN_TX3+<30>
LAN_ACTLED_YEL#<30>
LED_100_ORG#<30>
LED_10_GRN#<30>
D
S
D
S
PCH_AZ_MDC_RST#<14>
R752
R752
10K_0402_5%~D
10K_0402_5%~D
MDC_RST_DIS#<39>
+5V_ALW
1 3
2
12
PCH_AZ_MDC_RST1#
Q44
Q44
G
G
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
100K_0402_5%~D
100K_0402_5%~D
R751
R751
SW_LAN_TX0ÂSW_LAN_TX0+
SW_LAN_TX1ÂSW_LAN_TX1+
SW_LAN_TX2ÂSW_LAN_TX2+
SW_LAN_TX3ÂSW_LAN_TX3+
12
Place close
to JIO1.20,22
IO BOARD
Pitch=0.5
Follow CON N List_060 9A
JIO1
JIO1
2
112
4
334
6
556
8
778
10
9910
12
111112
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C482
C482
1
2
14
14
13
16
16
15
18
18
17
20
20
19
22
22
21
24
24
23
26
26
25
28
28
27
30
30
29
32
32
31
34
34
33
36
36
35
38
37
38
40
39
40
42
41
42
44
43
44
46
45
46
48
47
48
50
49
50
52
G1
G2
E&T_1000K-F50E-04R
E&T_1000K-F50E-04R
CONN@
CONN@
1
2
C1001
C1001
Place close
to JIO1.14,16
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PCH_AZ_MDC_RST1#
RED_CRT
GREEN_CRT
BLUE_CRT
HSYNC_BUF
VSYNC_BUF
DAT_DDC2_CRT
CLK_DDC2_CRT
+3.3V_ALW_PCH+5V_RUN
1
C998
C998
2
Place close to
JIO1.18
+SIM_PWR
UIM_CLK <34>
UIM_RESET <34>
UIM_VPP <34>
+3.3V_ALW_PCH
PCH_AZ_MDC_SDIN1 <14>
PCH_AZ_MDC_SYNC < 14>
PCH_AZ_MDC_SDOUT <14>
PCH_AZ_MDC_BITCLK <14>
RED_CRT <23>
GREEN_CRT <23>
BLUE_CRT <23>
HSYNC_BUF <23>
VSYNC_BUF <23>
+5V_RUN
+3.3V_LAN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
UIM_DATA <34>
DAT_DDC2_CRT <23>
CLK_DDC2_CRT <23>
+5V_ALW+3.3V_LAN
1
C1185
C1185
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
Place close to
JIO1.6,8,10,12
Follow CON N List_061 6E
B B
MEDIA BOARD
SF1
SF1
1
Follow CON N List_062 1A
JMED1
MEDIA_DET#<18 >
VOL_MUTE< 40>
VOL_DOWN<4 0>
VOL_UP<40>
MEDIA_DET#
VOL_MUTE
VOL_DOWN
VOL_UP
JMED1
1
1
2
2
3
3
4
4
5
7
5
G1
6
8
6
G2
PS_HPF10052-061000R
PS_HPF10052-061000R
CONN@
CONN@
WIRELESS_ON#/OFF<39>
Defult on,
WIRELESS_ON/OFF#:
LOW: ON
HIGH: OFF
WIRELESS_ON#/OFF
1
2
2
3
3
SC12P-C-V-TR_3P
SC12P-C-V-TR_3P
Hall SensorSniffer Switch
U8
U8
LID_CL#
LID_CL#<39,43>
3
OUTPUT
+3.3V_ALW
2
VDD
GND
1
1
C1184
C1184
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
S-5712ACDL1-M3T1U_SOT23-3
S-5712ACDL1-M3T1U_SOT23-3
Follow E4
Follow E4
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
IO/AUDIO/MEDIA/SNF
IO/AUDIO/MEDIA/SNF
IO/AUDIO/MEDIA/SNF
LA-7902P
LA-7902P
LA-7902P
37 61W ednesday, March 07, 2012
37 61W ednesday, March 07, 2012
37 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 38
5
4
3
2
1
TEMP: DC061106200
JDOCK1
JDOCK1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
127
127
129
129
131
131
133
133
135
135
137
137
139
139
141
141
143
143
145
GND1
146
PWR1
147
PWR1
148
PWR1
153
Shield_G
154
Shield_G
155
Shield_G
156
Shield_G
157
Shield_G
158
Shield_G
JAE_WD2F144W B6-DT
JAE_WD2F144W B6-DT
CONN@
CONN@
PWR2
PWR2
PWR2
GND2
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
DOCK_AC_OFF
2
2
4
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
149
150
151
152
159
160
161
162
163
164
DPC_CA_DET
DPC_DOCK_LANE_P0
DPC_DOCK_LANE_N0
DPC_DOCK_LANE_P1
DPC_DOCK_LANE_N1
DPC_DOCK_LANE_P2
DPC_DOCK_LANE_N2
DPC_DOCK_LANE_P3
DPC_DOCK_LANE_N3
DPC_DOCK_AUX
DPC_DOCK_AUX#
DPC_PCH_DOCK_HPD
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5
SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5
USBP7_D+
USBP7_D-
DOCK_DET_R#
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
C703
C703
1
2
DOCK_AC_OFF <39,53>
DOCK_LOM_SPD100LED_ORG# <30>
DPC_CA_DET <26>DPD_CA_DET<26>
C691 0.1U_0402_10V7K~DC691 0.1U_0402_10V7K~D
12
C680 0.1U_0402_10V7K~DC680 0.1U_0402_10V7K~D
12
C682 0.1U_0402_10V7K~DC682 0.1U_0402_10V7K~D
12
C684 0.1U_0402_10V7K~DC684 0.1U_0402_10V7K~D
12
C693 0.1U_0402_10V7K~DC693 0.1U_0402_10V7K~D
12
C686 0.1U_0402_10V7K~DC686 0.1U_0402_10V7K~D
12
C688 0.1U_0402_10V7K~DC688 0.1U_0402_10V7K~D
12
C694 0.1U_0402_10V7K~DC694 0.1U_0402_10V7K~D
12
DPC_DOCK_AUX <26>
DPC_DOCK_AUX# <26>
ACAV_DOCK_SRC# <53>
DAT_DDC2_DOCK < 23>
CLK_DDC2_DOCK <23>
12
C697 0.01U_0402_16V7K~DC69 7 0.01U_0402_16V7K~D
12
C698 0.01U_0402_16V7K~DC69 8 0.01U_0402_16V7K~D
1 2
C699 0.01U_0402_16V7K~DC69 9 0.01U_0402_16V7K~D
1 2
C700 0.01U_0402_16V7K~DC70 0 0.01U_0402_16V7K~D
USBP3+ <17>
USBP3- <17>
CLK_KBD <40>
DAT_KBD <40>
USB3RN4 <17>
USB3RP4 <17>
USB3TN4 <17>
USB3TP4 <17>
BREATH_LED# <39,43>
DOCK_LOM_ACTLED_YEL# <30>
DOCK_LOM_TRD0+ <30>
DOCK_LOM_TRD0- <30>
DOCK_LOM_TRD1+ <30>
DOCK_LOM_TRD1- <30>
+LOM_VCT
DOCK_LOM_TRD2+ <30>
DOCK_LOM_TRD2- <30>
DOCK_LOM_TRD3+ <30>
DOCK_LOM_TRD3- <30>
DOCK_DCIN_IS+ <52>
DOCK_DCIN_IS- <52>
DOCK_POR_RST# <40>
+DOCK_PWR_BAR
DAI_12MHZ# DAI_BCLK#
12
RE11
@RE11
@
10_0402_1%~D
10_0402_1%~D
1
CE8
@CE8
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
2
DPC_PCH_LANE_P0 < 16>
DPC_PCH_LANE_N0 <16>
DPC_PCH_LANE_P1 < 16>
DPC_PCH_LANE_N1 <16>
DPC_PCH_LANE_P2 < 16>
DPC_PCH_LANE_N2 <16>
DPC_PCH_LANE_P3 < 16>
DPC_PCH_LANE_N3 <16>
SATA_PRX_DKTX_P5_C <14>
SATA_PRX_DKTX_N5_C <14>
SATA_PTX_DKRX_P5_C <14>
SATA_PTX_DKRX_N5_C <14>
3
3
2
2
L108 OCF2012181YZF_4P@L108 OCF2012181YZF_4P@
R1672 0_0402_5%~DR1672 0_0402_5%~D
R1673 0_0402_5%~DR1673 0_0402_5%~D
4
4
1
1
12
12
EMI solution for E-Docking USB
+LOM_VCT
1
@
@
C701
C701
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
D32
D32
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
21
12
RE12
@RE12
@
10_0402_1%~D
10_0402_1%~D
1
CE9
@CE9
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
2
DPC_PCH_DOCK_HPD <16>
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
1
C696
C696
Close to DOCK
2
Its for Enhance ESD on dock issue.
Change CIS symbol_ 12/07
USBP7+ <17>
USBP7- <17>
DOCK_DET#
1 2
R755 10K_0402_5%~DR755 10K_0402_5%~D
CLK_PCI_DOCK
12
R756
R756
33_0402_5%~D
33_0402_5%~D
1
C704
C704
12P_0402_50V8J~D
12P_0402_50V8J~D
2
DPC_PCH_DOCK_HPD
+3.3V_ALW
12
R758
R758
100K_0402_5%~D
100K_0402_5%~D
SLICE_BAT_PRES#
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
@
@
1
CE6
CE6
2
DOCK_DET_1
DPD_CA_DET
DPD_DOCK_LANE_P0
DPD_DOCK_LANE_N0
DPD_DOCK_LANE_P1
DPD_DOCK_LANE_N1
DPD_DOCK_LANE_P2
DPD_DOCK_LANE_N2
DPD_DOCK_LANE_P3
DPD_DOCK_LANE_N3
DPD_DOCK_AUX
DPD_DOCK_AUX#
BLUE_DOCK
RED_DOCK
GREEN_DOCK
2
3
D33
D33
C702
C702
1
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
DOCK_LOM_SPD10LED_GRN#<30>
C690 0.1U_0402_10V7K~DC690 0.1U_0402_10V7K~D
D D
DPD_PCH_DOCK_HPD<16>
Close to DOCK
Its for Enhance ESD on dock issue.
C C
B B
DPD_PCH_DOCK_HPD
DPD_PCH_LANE_P0<16>
DPD_PCH_LANE_N0<16>
DPD_PCH_LANE_P1<16>
DPD_PCH_LANE_N1<16>
DPD_PCH_LANE_P2<16>
DPD_PCH_LANE_N2<16>
DPD_PCH_LANE_P3<16>
DPD_PCH_LANE_N3<16>
12
R757
R757
100K_0402_5%~D
100K_0402_5%~D
1
2
+DOCK_PWR_BAR
12
C679 0.1U_0402_10V7K~DC679 0.1U_0402_10V7K~D
12
C681 0.1U_0402_10V7K~DC681 0.1U_0402_10V7K~D
12
C683 0.1U_0402_10V7K~DC683 0.1U_0402_10V7K~D
12
C692 0.1U_0402_10V7K~DC692 0.1U_0402_10V7K~D
12
C685 0.1U_0402_10V7K~DC685 0.1U_0402_10V7K~D
12
C687 0.1U_0402_10V7K~DC687 0.1U_0402_10V7K~D
12
C689 0.1U_0402_10V7K~DC689 0.1U_0402_10V7K~D
12
DPD_DOCK_AUX<26>
DPD_DOCK_AUX#<26>
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
C695
C695
DPD_PCH_DOCK_HPD
+NBDOCK_DC_IN_SS
BLUE_DOCK<23>
RED_DOCK<23>
GREEN_DOCK<23>
HSYNC_DOCK<23>
VSYNC_DOCK<23>
CLK_MSE<40>
DAT_MSE<40>
DAI_BCLK#<29>
DAI_LRCK#<29>
DAI_DI<29>
DAI_DO#<29>
DAI_12MHZ#<29>
D_LAD0<39>
D_LAD1<39>
D_LAD2<39>
D_LAD3<39>
D_LFRAME#<39>
D_CLKRUN#<39>
D_SERIRQ<39>
D_DLDRQ1#<39>
CLK_PCI_DOCK<17>
DOCK_SMB_CLK<40>
DOCK_SMB_DAT<40>
DOCK_SMB_ALERT#<39,53>
DOCK_PSID<44>
DOCK_PWR_BTN#<40>
SLICE_BAT_PRES#< 39,53> DOCK_DET# <39>
1
2
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DOCKING CONN
DOCKING CONN
DOCKING CONN
LA-7902P
LA-7902P
LA-7902P
38 61W ednesday, March 07, 2012
38 61W ednesday, March 07, 2012
38 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 39
+3.3V_ALW
1 2
R796 10K_040 2_5%~DR796 10K_0402_5%~D
1 2
R798 100K_04 02_5%~DR798 100K_0402_5%~D
1 2
R761 100K_04 02_5%~DR761 100K_0402_5%~D
1 2
R763 100K_04 02_5%~DR763 100K_0402_5%~D
1 2
D D
R760 20K_040 2_5%~DR760 20K_0402_5%~D
1 2
R774 100K_04 02_5%~DR774 100K_0402_5%~D
1 2
R776 100K_04 02_5%~DR776 100K_0402_5%~D
1 2
R768 10K_040 2_5%~DR768 10K_0402_5%~D
1 2
R769 100K_04 02_5%~DR769 100K_0402_5%~D
1 2
R778 100K_04 02_5%~DR778 100K_0402_5%~D
1 2
R762 10K_040 2_5%~DR762 10K_0402_5%~D
1 2
R771 100K_04 02_5%~DR771 100K_0402_5%~D
Check card side pull up resis tor
+3.3V_RUN
C C
B B
1 2
R460 100K_04 02_5%~DR460 100K_0402_5%~D
1 2
R461 100K_04 02_5%~DR461 100K_0402_5%~D
1 2
R463 100K_04 02_5%~DR463 100K_0402_5%~D
1 2
R457 100K_04 02_5%~DR457 100K_0402_5%~D
1 2
R766 100K_04 02_5%~D@R766 100K_040 2_5%~D@
1 2
R772 10K_040 2_5%~D@R772 10K_0402_5%~D@
1 2
R767 100K_04 02_5%~DR767 100K_0402_5%~D
1 2
R775 10K_040 2_5%~DR775 10K_0402_5%~D
1 2
R1582 100K _0402_5%~DR1582 100K_0402_5%~D
1 2
R1583 100K _0402_5%~DR1583 100K_0402_5%~D
1 2
R3 100K_0402 _5%~DR3 100K_0402_5%~D
+3.3V_ALW
R1183 10K_0402_5%~DR1183 10K_0402_5%~D
R516 10K_0402_5%~DR516 10K_0402_5%~D
FAN1_DET#<22>
+3.3V_ALW
VGA_ID
1 2
1 2
1 2
R800 100K_0402_5%~DR800 100K_0402_5%~D
DYN_TURB_PWR_ALRT#
HW_GPS_DISABLE2#
PROCHOT_GATE
CPU_DETECT#
SLICE_BAT_PRES#
WWAN_RA DIO_DIS#
USB_PWR_SHR_E N#
USB_SIDE_EN#
ESATA_USB_PWR _EN#
USB_PWR_SHR_V BUS_EN
WIRELESS_ON#/OFF
EXPRESS_DET#
SMART_DET#
PCMCIA_DET#
MCARD_PCIE_SATA#
WIRELESS_ON#/OFF
SP_TPM_LPC_EN
LCD_TST
SYS_LED_MASK#
DGPU_PWR_EN
GFX_MEM_VTT_ON
CHARGE_EN
SIO_FAN1_DET#
ZODD_WAKE#
R801 0_0402_5%~D@R801 0_0402_5%~D@
1 2
SIO_FAN1_DET#
1 2
R803 100K_0402_5%~D@R803 100K_0402_5%~D@
5
VGA_ID
MCARD_MISC_PW REN<35>
PROCHOT_GATE<52>
DOCK_SMB_ALERT#<38,53>
EN_I2S_NB_CODEC#<29>
EN_DOCK_PWR_BAR<53>
PANEL_BKEN_EC<24>
ENVDD_PCH<16,24>
PBAT_PRES#<44,53>
MCARD_WW AN_PWREN<35>
LCD_VCC_TEST_EN<24>
AUD_HP_NB_SENSE<29,37>
ESATA_USB_PWR _EN#<36>
SLICE_BAT_PRES#<38,53>
EXPRESS_DET#<35>
SMART_DET#<35>
LOM_SMB_ALERT#<30>
LOM_ENERGY_DET<30>
SLP_ME_CSW_DE V#<14,18>
SYS_LED_MASK#<43>
SIO_EXT_WAKE#<18>
WIRELESS_LED#<34,43>
B4 non used
WLAN_RADIO_DIS#<34>
WIRELESS_ON#/OFF<37>
BT_RADIO_DIS#<41>
WWAN_RA DIO_DIS#<34>
CPU_VTT_ON<49>
CRT_SWITCH<23>
MDC_RST_DIS#<37>
USB_SIDE_EN#<37>
LCD_TST<24>
PSID_DISABLE#<44>
DOCKED<30>
DOCK_DET#<38>
AUD_NB_MUTE#<29>
CCD_OFF<24>
SLICE_BAT_ON<53>
CPU_DETECT#<7>
T116 PAD~D@ T116 PAD~D@
SUSACK#<16>
T110 PAD~D@ T110 PAD~D@
T109 PAD~D@ T109 PAD~D@
LOM_LOW_PWR<30>
R797 0_0402_5%~D@ R797 0_0402_5%~D@
SYS_PWROK<7,16>
T114 PAD~D@ T114 PAD~D@
PCH_DPWROK<16>
VGA_ID0
Discrete
0
UMA 1
A A
ME_FWP PCH has internal 20K PD.
(suspend power rail)
ME_FWP
12
R793
@ R793
@
1K_0402_1%~D
1K_0402_1%~D
5
4
CRT_SWITCH
MDC_RST_DIS#
MCARD_MISC_PW REN
PROCHOT_GATE
LID_CL_SIO#
DOCK_SMB_ALERT#DOCK_SMB_ALERT#
USB_SIDE_EN#
EN_I2S_NB_CODEC#
EN_DOCK_PWR_BAR
PANEL_BKEN_EC
ENVDD_PCH
LCD_TST
PSID_DISABLE#
PBAT_PRES#
DOCKED
DOCK_DET#
AUD_NB_MUTE#
MCARD_WW AN_PWREN
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_SENSE
ESATA_USB_PWR _EN#
SLICE_BAT_ON
SLICE_BAT_PRES#
EXPRESS_DET#
SMART_DET#
PCMCIA_DET#
USB_PWR_SHR_E N#
GFX_MEM_VTT_ON
MCARD_PCIE_SATA#
CPU_DETECT#
DGPU_PWR_EN
SIO_FAN1_DET#
DP_HDMI_HPD
ZODD_WAKE#
LOM_SMB_ALERT#
LOM_ENERGY_DET
DGPU_PWROK
VGA_ID
3.3V_RUN_GFX_ON
SLP_ME_CSW_DE V#
LOM_LOW_PWR
CHARGE_EN
SYS_LED_MASK#
DYN_TURB_PWR_ALRT#
1 2
WIRELESS_LED#
USB_PWR_SHR_V BUS_EN
WLAN_RADIO_DIS#
WIRELESS_ON#/OFF
BT_RADIO_DIS#
WWAN_RA DIO_DIS#
SYS_PWROK
DGPU_SELECT#
CPU_VTT_ON
1 2
R802 0_0402_5%~D@R802 0_0402_5%~D@
4
U46
U46
B52
GPIOA0
A49
GPIOA1
B53
GPIOA2
A50
GPIOA3
B54
GPIOA4
A51
GPIOA5
B55
GPIOA6
A52
GPIOA7
A33
GPIOB0
B36
GPIOB1
A34
GPOC2
B37
GPOC3
A35
GPOC4
B38
GPOC5
A36
GPOC6/TACH4
A37
GPIOC7
B40
GPIOD0
A38
GPIOC1
B41
GPIOC0
A39
GPIOB7
B42
GPIOB6
A40
GPIOB5
B43
GPIOB4
A41
GPIOB3
B44
GPIOB2
B32
GPIOD1
A31
GPIOD2
B33
GPIOD3
B15
GPIOD4
A15
GPIOD5
B16
GPIOD6
A16
GPIOD7
A1
GPIOE0/RXD
B2
GPIOE1/TXD
A2
GPIOE2/RTS#
B3
GPIOE3/DSR#
A3
GPIOE4/CTS#
B45
GPIOE5/DTR#
A42
GPIOE6/RI#
B4
GPIOE7/DCD#
A59
GPIOF0
B62
GPIOF1
A58
GPIOF2
B61
GPIOF3/TACH8
A56
GPIOF4/TACH7
B59
GPIOF5
A55
GPIOF6
B58
GPIOF7
B47
GPIOG0/TACH5
A45
GPIOG1
B48
GPIOG2
A46
GPIOG3
B49
GPIOG4
A47
GPIOG5
B50
GPIOG6
A48
GPIOG7/TACH6
B13
GPIOH0
A13
GPIOH1
A53
SYSOPT1/GPIOH2
B57
SYSOPT0/GPIOH3
B14
GPIOH4
A14
GPIOH5
B17
GPIOH6
B18
GPIOH7
1
2
B5
A17
B30
A43
A54
VCC1
VCC1
VCC1
VCC1
VCC1
GPIOJ1/TACH1
GPIOJ2/TACH2
GPIOK1/TACH3
GPIOM3/PWM4
GPIOM4/PWM6
14.318MHZ/GPIOM0
CLK32/GPIOM2
DB Version 0.4
ECE5048-LZY_DQFN132_11X11~D
ECE5048-LZY_DQFN132_11X11~D
DB Version 0.4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
1
C705
C705
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
GPIOI0
GPIOI1
GPIOI2/TACH0
GPIOI3
GPIOI4
GPIOI5
GPIOI6
GPIOI7
GPIOJ0
GPIOJ3
GPIOJ4
GPIOJ5
GPIOJ6
GPIOJ7
GPIOK0
GPIOK2
GPIOK3
GPIOK4
GPIOK5
GPIOK6
GPIOK7
GPIOL0/PWM7
GPIOL1/PWM8
GPIOL2/PWM0
GPIOL3/PWM1
GPIOL4/PWM3
GPIOL5/PWM2
GPIOL6
GPIOL7/PWM5
GPIOM1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ1#
SER_IRQ
DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLKRUN#
DLDRQ1#
DSER_IRQ
BC_INT#
BC_DAT
BC_CLK
PWRGD
OUT65
TEST_PIN
CAP_LDO
VSS
3
2
+3.3V_ALW
1
1
C706
C706
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
A23
B63
A60
A61
B65
A62
B66
A63
B67
A64
A5
B6
A6
B7
A7
B8
A8
B9
B10
A10
B11
A11
B12
A12
B60
A57
B64
B68
A9
B1
A18
A44
B34
B39
B51
A27
A26
B26
B25
A21
B22
A28
B20
A22
B21
A32
B35
B29
B28
A25
A24
B23
A19
B24
A20
A29
B31
A30
A4
B56
B19
B46
B27
C1
EP
C708
C708
C707
C707
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
SIO_SLP_A#
0.75V_DDR_VTT_ON
1 2
R765 0_0402_5%~D@R765 0_0402_5%~D@
SIO_SLP_LAN#
SIO_SLP_SUS#
MODC_EN
DOCK_HP_DET
DOCK_MIC_DET
ME_FWP
MASK_SATA_LED#
LED_SATA_DIAG_OUT#
TEMP_ALERT#_R TEMP_ALERT#
RUN_ON
SUS_ON
BAT1_LED#
BAT2_LED#
USH_PWR_ON
HW_GPS_DISABLE2#
BREATH_LED#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PCH_PLTRST#_EC
CLK_PCI_5048
CLKRUN#
LPC_LDRQ1#
IRQ_SERIRQ
CLK_SIO_14M
D_LAD0
D_LAD1
D_LAD2
D_LAD3
D_LFRAME#
D_CLKRUN#
D_DLDRQ1#
D_SERIRQ
BC_INT#_ECE5048
BC_DAT_ECE5048
BC_CLK_ECE5048
RUNPWROK
SP_TPM_LPC_EN
1 2
R804 1K_0402_1%~DR804 1K_0402_1%~D
+CAP_LDO
1
1
C709
C709
2
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C714
C714
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
C710
C710
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
SIO_SLP_A# <16,42,48>
0.75V_DDR_VTT_ON <46>
SIO_SLP_S4# <16,42,46>
SIO_SLP_S3# <11,16,27,35,42,47,48,49>
IMVP_PWRGD <51>
IMVP_VR_ON < 51>
DOCK_AC_OFF_EC
AUX_EN_WOW L <35>
WLAN_LAN_DISB# <30>
SIO_SLP_LAN# <16,30>
SIO_SLP_SUS# <16>
GPIO_PSID_SELECT <44>
MODC_EN <28>
DOCK_HP_DET <29>
DOCK_MIC_DET <29>
ME_FWP <14>
MASK_SATA_LED# <43>
1.8V_RUN_PWRGD <47>
LED_SATA_DIAG_OUT# <43 >
RUN_ON <27,35,42,47,48>
SPI_WP#_SEL <14>
SUS_ON <42>
BAT1_LED# <43>
BAT2_LED# <43>
T117PAD~D @T117PAD~D @
HW_GPS_DISABLE2# <34>
BREATH_LED# <38,43>
LPC_LAD0 <14,32,34,40>
LPC_LAD1 <14,32,34,40>
LPC_LAD2 <14,32,34,40>
LPC_LAD3 <14,32,34,40>
LPC_LFRAME# <14,32,34,40>
PCH_PLTRST#_EC <17,32,34,35,40>
CLK_PCI_5048 <17>
CLKRUN# <16,32,40>
LPC_LDRQ1# <14>
IRQ_SERIRQ <1 4,32,40>
CLK_SIO_14M <15>
EC_32KHZ_ECE5048 <40>
D_LAD0 <38>
D_LAD1 <38>
D_LAD2 <38>
D_LAD3 <38>
D_LFRAME# <3 8>
D_CLKRUN# <38>
D_DLDRQ1# <38>
D_SERIRQ <38>
BC_INT#_ECE5048 <40>
BC_DAT_ECE5048 <40>
BC_CLK_ECE5048 <40>
RUNPWROK <7,40>
SP_TPM_LPC_EN <32>
+CAP_LDO trace width 20 mils
10_0402_1%~D
10_0402_1%~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
ACAV_IN_NB <40,52,53>
DOCK_AC_OFF_EC <53>
---vPro on ly
R738 0_0402_5%~D@ R738 0_0402_5%~D@
12
R794
@R794
@
1
C712
@C712
@
2
1 2
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
CLK_PCI_5048CLK_SIO_14M
R795
@R795
@
10_0402_1%~D
10_0402_1%~D
C713
@C713
@
+3.3V_ALW
C711 0.1U_0402_25V6K~D@C 711 0.1U_0402_ 25V6K~D@
5
1
P
B
O
2
A
G
U47
3
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
TEMP_ALERT# <14,18>
12
LID_CL_SIO#
1
2
1 2
2 1
4
D34
@D34
@
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
@U4 7
@
Reserve fo r ESD in 6 /22
Place clos ed U46
PCH_PLTRST#_EC
1
CE11
CE11
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
@
@
+3.3V_ALW
12
R805
R805
100K_0402_5%~D
100K_0402_5%~D
R807 10_0402_1 %~DR807 10_0402_1 %~D
1
C716
C716
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
1
DOCK_AC_OFF <38,53>
12
R770
@R770
@
33K_0402_5%~D
33K_0402_5%~D
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
RUN_ON
CPU_VTT_ON
0.75V_DDR_VTT_ON
SLICE_BAT_ON
SUS_ON
12
+3.3V_RUN
R777 100K_04 02_5%~DR777 100K_0402_5%~D
R780 100K_04 02_5%~DR780 100K_0402_5%~D
R782 100K_04 02_5%~DR782 100K_0402_5%~D
R786 100K_04 02_5%~DR786 100K_0402_5%~D
R789 100K_04 02_5%~DR789 100K_0402_5%~D
R790 100K_04 02_5%~DR790 100K_0402_5%~D
R791 100K_04 02_5%~DR791 100K_0402_5%~D
R878 100K_04 02_5%~DR878 100K_0402_5%~D
12
12
12
12
12
12
12
12
LID_CL# <37,43>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
ECE5048
ECE5048
ECE5048
LA-7902P
LA-7902P
LA-7902P
39 61W ednesday, March 07, 2012
39 61W ednesday, March 07, 2012
39 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 40
5
+3.3V_ALW
C720
C720
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
5
U50
U50
1
P
B
2
A
3
1
1
C735
C735
2
2
4
O
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
JTAG1
@SHORT PADS~D
@SHORT PADS~D
CONN@JTAG1
CONN@
1.05V_0.8V_PWROK
1.05V_0.8V_PWROK <14,51>
1 2
R8742.7K_0402_5%~D R8742.7K _0402_5%~D
DOCK_POR_RST#<38>
AUX_ON
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
+3.3V_ALW
12
12
1.05V_VTTPWRGD
VCCSAPWROK
PCIE_WAKE#
BC_DAT_EMC4022
12
BC_DAT_ECE5048
BC_DAT_ECE1117
PBAT_SMBDAT
PBAT_SMBCLK
LPC_LDRQ#_MEC
CHARGER_SMBDAT
CHARGER_SMBCLK
SIO_LAN_SMBDATA
SIO_LAN_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
10K_0402_5%~D
10K_0402_5%~D
R824
R824
JTAG_RST# citcu it
close to U51.B5 7
100_0402_1%~D
100_0402_1%~D
@
@
1
R836
R836
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1.05V_VTTPWRGD<49,50>
VCCSAPWROK<50>
Modify name net
+3.3V_ALW
D D
C C
R759 10K_0402_5%~DR759 10K_0402_5%~D
R821 100K_0402_5%~DR821 100K_0402_5%~D
R814 100K_0402_5%~DR814 100K_0402_5%~D
R817 100K_0402_5%~DR817 100K_0402_5%~D
R818 2.2K_0402_5%~DR818 2.2K_0402_5%~D
R820 2.2K_0402_5%~DR820 2.2K_0402_5%~D
R823 100K_0402_5%~D@ R823 100K_0402_5 %~D@
R827 2.2K_0402_5%~DR827 2.2K_0402_5%~D
R828 2.2K_0402_5%~DR828 2.2K_0402_5%~D
R830 2.2K_0402_5%~DR830 2.2K_0402_5%~D
R831 2.2K_0402_5%~DR831 2.2K_0402_5%~D
R829 2.2K_0402_5%~DR829 2.2K_0402_5%~D
R822 2.2K_0402_5%~DR822 2.2K_0402_5%~D
EC firmware can configure those un-used SMBUS pins as GPO (Output),
then it's OK to leave these un-used pins No-Connect.
JTAG_RST#
32 KHz Clock
C741
C741
1 2
33P_0402_50V8J~D
33P_0402_50V8J~D
MEC_XTAL2
Y6
Y6
32.768KHZ_12.5PF_Q13FC1350000~D
32.768KHZ_12.5PF_Q13FC1350000~D
B B
MEC_XTAL1
TYCO_1-2041070-0~D
TYCO_1-2041070-0~D
A A
C743
C743
33P_0402_50V8J~D
33P_0402_50V8J~D
JDEG2
JDEG2
11
G1
12
G2
CONN@
CONN@
1 2
1 2
+3.3V_ALW
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
Place closely pin A29
10K_0402_5%~D
10K_0402_5%~D
49.9_0402_1%~D
49.9_0402_1%~D
12
12
R858
R858
R864
R864
MSCLK
MSDATA
HOST_DEB_RX
CLK_PCI_MEC
@R885
@
10_0402_1%~D
10_0402_1%~D
@ C747
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
5
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
12
R859
R859
R860
R860
12
R885
1
C747
2
R861
R861
JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO
R853 0_0402_5%~D@ R853 0_0402_5%~D@
R855 0_0402_5%~D@ R855 0_0402_5%~D@
+3.3V_ALW
12
1 2
1 2
10K_0402_5%~D
10K_0402_5%~D
EC_32KHZ_ECE5048<39>
@R850
@
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
12
12
12
R847
R847
R848
R848
R849
R849
R850
HOST_DEBUG_TXHOST_DEB_TX
HOST_DEBUG_RX
R875 C744
240K 4700p
130K 4700p
62K
33K
*
8.2K
4.3K
2K
1K
4700p
4700p
4700p
4700p
4700p
4700p
REV
X00
X01
X02
A00
BOARD_ID rise time is measured from 5%~68%.
4
SML1_SMBDATA<15,30>
SML1_SMBCLK<1 5,30>
CLK_TP_SIO<41>
DAT_TP_SIO<41>
CLK_KBD<38>
DAT_KBD<38>
CLK_MSE<38>
DAT_MSE<38>
PBAT_SMBDAT<44>
PBAT_SMBCLK<44>
DOCK_POR_RST#
AUX_ON<30>
PCH_ALW_ON<42,44>
BIA_PWM_EC<24>
BC_CLK_ECE5048<39>
BC_DAT_ECE5048<39>
BC_INT#_ECE5048<39>
BC_CLK_EMC4022<22>
BC_DAT_EMC4022<22>
BC_INT#_EMC4022<22>
PCH_PCIE_WAKE#<16>
PCIE_WAKE#<34,35>
BC_CLK_ECE1117<41>
BC_DAT_ECE1117<41>
BC_INT#_ECE1117<41>
SIO_SLP_S5#<16,42 >
ACAV_IN_NB<39,52,53>
SIO_EXT_SMI#<14,17>
SIO_RCIN#<18>
IRQ_SERIRQ<14,32,39>
PCH_PLTRST#_EC<17,32,34,35,39>
CLK_PCI_MEC<17>
LPC_LFRAME#<14,32,34,39>
LPC_LAD0<14,32,34,39>
LPC_LAD1<14,32,34,39>
LPC_LAD2<14,32,34,39>
LPC_LAD3<14,32,34,39>
CLKRUN#<16,32,39 >
SIO_EXT_SCI#<18>
MEC_XTAL2 MEC_X TAL2_R
R1068 0_0402_5%~D@ R1068 0_0402_5%~D@
1 2
R867 0_0402 _5%~D@R867 0_0402_5%~D@
Reserve for ESD in 6/22
Place closed U51
1
2
BOARD_ID
SML1_SMBDATA
SML1_SMBCLK
CLK_TP_SIO
DAT_TP_SIO
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
PBAT_SMBDAT
PBAT_SMBCLK
JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#
C736 0.1U_0402_25V6K~DC736 0.1U_0402_25V6K~D
12
AUX_ON
PCH_ALW_ON
BIA_PWM_EC
BC_CLK_ECE5048
BC_DAT_ECE5048
BC_INT#_ECE5048
BC_CLK_EMC4022
BC_DAT_EMC4022
BC_INT#_EMC4022
PCH_PCIE_WAKE#
PCIE_WAKE#
BC_CLK_ECE1117
BC_DAT_ECE1117
BC_INT#_ECE1117
BEEP
BEEP<29>
SIO_SLP_S5#
ACAV_IN_NB
SIO_EXT_SMI#
SIO_RCIN#
LPC_LDRQ#_MEC
IRQ_SERIRQ
PCH_PLTRST#_EC
CLK_PCI_MEC
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLKRUN#
SIO_EXT_SCI#
MEC_XTAL1
12
PCH_PLTRST#_EC
CE12
CE12
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@
@
+3.3V_ALW
12
R875
R875
33K_0402_5%~D
33K_0402_5%~D
1
C744
C744
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
4
@
@
+RTC_CELL
R815
R815
0_0402_5%~D
0_0402_5%~D
+RTC_CELL_VBAT
1 2
U51
U51
PS/2 INTERFACE
PS/2 INTERFACE
A5
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
B6
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
A37
GPIO110/PS2_CLK2/GPTP-IN6
B40
GPIO111/PS2_DAT2/GPTP-OUT6
A38
GPIO112/PS2_CLK1A
B41
GPIO113/PS2_DAT1A
A39
GPIO114/PS2_CLK0A
B42
GPIO115/PS2_DAT0A
B59
GPIO154/I2C1C_DATA/PS2_CLK1B
A56
GPIO155/I2C1C_CLK/PS2_DAT1B
JTAG INTERFACE
JTAG INTERFACE
A51
GPIO145/I2C1K_DATA/JTAG_TDI
B55
GPIO146/I2C1K_CLK/JTAG_TDO
B56
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
A53
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
B57
JTAG_RST#
FAN PWM & TACH
FAN PWM & TACH
B22
GPIO050/FAN_TACH1
A21
GPIO051/FAN_TACH2
B23
GPIO052/FAN_TACH3
B24
GPIO053/PWM0
A23
GPIO054/PWM1
B25
GPIO055/PWM2
A24
GPIO056/PWM3
BC-LINK
BC-LINK
A43
GPIO123/BCM_A_CLK
B45
GPIO122/BCM_A_DAT
A42
GPIO121/BCM_A_INT#
A12
GPIO022/BCM_B_CLK
B13
GPIO023/BCM_B_DAT
A13
GPIO024/BCM_B_INT#
B20
GPIO044/BCM_C_CLK
A18
GPIO043/BCM_C_DAT
B19
GPIO042/BCM_C_INT#
A20
GPIO047/LSBCM_D_CLK
B21
GPIO046/LSBCM_D_DAT
A19
GPIO045/LSBCM_D_INT#
A16
GPIO032/GPTP-IN3/BCM_E_CLK
B16
GPIO31/GPTP-OUT2/BCM_E_DAT
A15
GPIO30/GPTP-IN2/BCM_E_INT#
HOST INTERFACE
HOST INTERFACE
A6
GPIO011/nSMI
A27
GPIO061/LPCPD#
B29
LDRQ#
A28
SER_IRQ
B30
LRESET#
A29
PCI_CLK
B31
LFRAME#
A30
LAD0
B32
LAD1
A31
LAD2
B33
LAD3
A32
CLKRUN#
A33
GPIO100/nEC_SCI
MASTER CLOCK
MASTER CLOCK
A61
XTAL1
A62
XTAL2
B62
GPIO160/32KHZ_OUT
B34
NC1
A64
NC2
B68
NC3
15mil
C740 close to U51.B12
130K_0402_5%~D
130K_0402_5%~D
SYSTEM_ID
SYSTEM_ID for BID function
Pop R877 240K for vPro and depop R871
* Pop R871 130K for non-vPro and depoip R877
R871
R871
1
2
+3.3V_ALW
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
B66
C723
C723
AGND
12
1
2
B64
VBAT
DB Version 0.12
DB Version 0.12
VSS[1]
B11
12
R877
R877
240K_0402_5%~D
240K_0402_5%~D
@
@
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C742
C742
@
@
A11
A22
B35
A41
A58
A52
A26
VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]B3VTR[8]
GPIO124/GPTP-OUT5/UART_RX
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
GPIO040/GPTP-OUT3/HSPI_CS2
SMBUS INTERFACE
SMBUS INTERFACE
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO013/I2C1H_CLK/I2C2D_CLK
GPIO141/I2C1F_DATA/I2C2B_DATA
GPIO142/I2C1F_CLK/I2C2B_CLK
DELL PWR SW INF
DELL PWR SW INF
VR_CAP
VSS[4]
B12
B54
B60
least
15mil
+VR_CAP
1
C740
C740
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
RESET_OUT#
3
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
1
C725
C725
C727
C727
2
2
2
MISC INTERFACE
MISC INTERFACE
GPIO021/RC_ID1
GPIO020/RC_ID2
GPIO025/UART_CLK
GPIO120/UART_TX
VCC_PRWGD
GPIO060/KBRST
GPIO101/ECGP_SCLK
GPIO103/ECGP_MISO
GPIO105/ECGP_MOSI
GPIO102/HSPI_SCLK
GPIO104/HSPI_MISO
GPIO106/HSPI_MOSI
GPIO116/MSDATA
GPIO117/MSCLK
GPIO127/A20M
GPIO153/LED3
GPIO156/LED1
GPIO157/LED2
nFWP
PROCHOT#/PWM4
GPIO001/ECSPI_CS1
GPIO002/ECSPI_CS2
GPIO014/GPTP-IN7/HSPI_CS1
GPIO015/GPTP-OUT7
GPIO016/GPTP-IN8
GPIO017/GPTP-OUT8
GPIO026/GPTP-IN1
GPIO027/GPTP-OUT1
GPIO041
GPIO107/nRESET_OUT
GPIO125/GPTP-IN5
GPIO126
GPIO151/GPTP-IN4
GPIO152/GPTP-OUT4
GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO005/I2C1B_DATA
GPIO006/I2C1B_CLK
GPIO130/I2C2A_DATA
GPIO131/I2C2A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK
BGPO0
VCI_IN2#
VCI_OUT
VCI_IN1#
VCI_IN0#
VCI_OVRD_IN
VCI_IN3#
PECI
PECI
PECI_VREF
PECI
I2S
I2S
I2S_DAT
I2S_CLK
VSS_RO
I2S_WS
EP
MEC5055-LZY_DQFN132_11X11~D
MEC5055-LZY_DQFN132_11X11~D
C1
+3.3V_M
12
R893
R893
100K_0402_5%~D
100K_0402_5%~D
PCH_PWRGD# <22>
13
D
D
Q50
Q50
2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
G
G
S
S
3
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C729
C729
C731
C731
2
A10
B10
B14
B44
B46
B26
A25
B36
B37
B38
A34
A35
A36
A40
B43
A45
A55
A57
B61
B65
A46
B2
A2
B8
B18
A8
B9
A9
A14
B15
A17
B39
A44
B47
A54
B58
A3
B4
A4
B5
B7
A7
B48
B49
A47
B50
B52
A49
B53
A50
A59
B63
A60
A63
B67
B1
A1
B51
A48
B17
B27
B28
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
1
C726
C726
2
SYSTEM_ID
BOARD_ID
DDR_ON
HOST_DEBUG_TX
HOST_DEBUG_RX
RUNPWROK
EN_INVPWR
DDR_HVREF_RST_GATE
DYN_TUR_CURRNT_SET#
CPU1.5V_S3_GATE
MSDATA
MSCLK
SIO_A20GATE
PS_ID
FWP#
PROCHOT#_EC
ME_SUS_PWR_ACK
1.5V_SUS_PWRGD
PM_APWROK
1.05V_A_PWRGD_SIO
ALW_PW RGD_3V_5V
DEVICE_DET#
RESET_OUT#
PCH_RSMRST#
AC_PRESENT
SIO_PWRBTN#
DOCK_SMB_DAT
DOCK_SMB_CLK
LCD_SMBDAT
LCD_SMBCLK
BAY_SMBDAT
BAY_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
CHARGER_SMBDAT
CHARGER_SMBCLK
CARD_SMBDAT
CARD_SMBCLK
SIO_LAN_SMBDATA
SIO_LAN_SMBCLK
LAT_ON_SW#
ALWON
VCI_IN1#
POWER_SW _IN#
ACAV_IN
DOCK_PWR_SW #
+PECI_VREF
PECI_EC_R
R1658 100K_0402_5%~DR1658 100K_0402_5%~D
R1659 100K_0402_5%~DR1659 100K_0402_5%~D
1
C739
C739
C728
C728
2
2
2
R884 1K_0402_1%~DR884 1K_0402_1%~D
1 2
R886 1K_0402_1%~DR886 1K_0402_1%~D
1 2
R887 1K_0402_1%~DR887 1K_0402_1%~D
1 2
R857 0_0402_5%~D@R857 0_0402_ 5%~D@
1 2
R863 43_0402_5%~DR863 43_0402_5%~D
1 2
1 2
+3.3V_ALW
12
R872
R872
10K_0402_5%~D
10K_0402_5%~D
FWP#
@R879
@
1 2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+3.3V_ALW
1
C732
C732
C730
C730
2
DDR_ON <46>
HOST_DEBUG_TX <34>
HOST_DEBUG_RX <34>
RUNPWROK <7,39>
EN_INVPWR <24>
PCH_SATA_MOD_EN# <14>
DDR_HVREF_RST_GATE <7>
DYN_TUR_CURRNT_SET# <52>
CPU1.5V_S3_GATE <11>
MSDATA <34>
MSCLK <34>
SIO_A20GATE <18>
PS_ID <44>
VOL_MUTE
VOL_DOWN
ME_SUS_PWR_ACK <16>
1.5V_SUS_PWRGD <46>
PM_APWROK < 16>
1 2
ALW_PW RGD_3V_5V <45>
DEVICE_DET# <28>
RESET_OUT# <16>
PCH_RSMRST# <41>
AC_PRESENT <16>
SIO_PWRBTN# <16>
DOCK_SMB_DAT <38>
DOCK_SMB_CLK <38>
CHARGER_SMBDAT <52>
CHARGER_SMBCLK <52>
CARD_SMBDAT <35>
CARD_SMBCLK <35>
SIO_LAN_SMBDATA <15,30>
SIO_LAN_SMBCLK <15,30>
ALWON <45>
ACAV_IN <22,52,53>
VCI_IN1#
R879
10K_0402_5%~D
10K_0402_5%~D
2
POWER_SW _IN#<22>
DOCK_PWR_SW #<22>
VOL_MUTE <37>
VOL_UP <37>
VOL_DOWN <37>
---vPro only
1.05V_A_PWRGD <48>
GPIO024/THSEL_STRAP note
i.THSEL_STRAP =1 (selects thermistor on diode channel 1)
ii.THSEL_STRAP = 0 (selects remote diode on diode channel
1)
R869 10K_0402_5%~DR869 10K_0402_5%~D
R876 100K_0402_5%~DR876 100K_0402_5%~D
R880 100K_0402_5%~DR880 100K_0402_5%~D
R881 100K_0402_5%~DR881 100K_0402_5%~D
R882 100K_0402_5%~DR882 100K_0402_5%~D
R883 10K_0402_5%~DR883 10K_0402_5%~D
R843 8.2K_0402_5%~D@ R843 8.2K_0402_5%~D@
R889 100K_0402_5%~DR889 100K_0402_5%~D
R892 10K_0402_5%~DR892 10K_0402_5%~D
PECI_EC <7>
R1156 100K_0402_5%~DR1156 100K_0402_5%~D
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
2
Bat2 = Amber LE D
Bat1 = Blue LED
20mA drive pins
R862 close to
U51& least 250mils
R862 0_0402_5%~D@R862 0_0402_5%~D@
1
2
MSDATA
DDR_ON
PCH_ALW_ON
DOCK_POR_RST#
EN_INVPWR
1.05V_0.8V_PWROK
RESET_OUT#
CPU1.5V_S3_GATE
PCH_RSMRST#
---vPro only
ALWON
1
2
1 2
C737
C737
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+RTC_CELL
12
+1.05V_RUN_VTT
C1208
@C1208
@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+1.05V_RUN_VTT
1 2
R1179 10K_0402_5%~D@ R1179 10K_0402_5%~D@
PROCHOT#_EC
1 2
R812 100K_0 402_5%~D@R812 100K_0402_5%~D@
1
+RTC_CELL
POWER_SW _IN#
DOCK_PWR_SW #
DYN_TUR_CURRNT_SET#
12
1
2
+RTC_CELL
12
R825 10K_0402_5%~DR825 10K_0402_5%~ D
1
2
LAT_ON_SW#
13
D
D
2
G
G
S
S
R1180 0_0402_5%~D@R1180 0_0 402_5%~D@
RUNPWROK
RUN_ON_ENABLE#<42>
AC_PRESENT
LCD_SMBCLK
LCD_SMBDAT
DOCK_SMB_DAT
DOCK_SMB_CLK
BAY_SMBDAT
BAY_SMBCLK
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
VOL_MUTE
VOL_DOWN
VOL_UP
R810
R810
100K_0402_5%~D
100K_0402_5%~D
R811 10K_0402_5%~DR811 10K_0402_5%~D
C722
C722
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
R819
R819
100K_0402_5%~D
100K_0402_5%~D
1 2
C734
C734
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
1 2
C721
@C721
@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 2
1 2
C733
@C733
@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 2
+RTC_CELL
12
R870
R870
100K_0402_5%~D
100K_0402_5%~D
1.05V_A_PWRGD_SIO
Q47
@
Q47
@
+3.3V_RUN
12
R799
R799
10K_0402_5%~D
10K_0402_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
2
Q45
Q45
G
G
S
S
12
R835 10K_0402_5%~DR835 10K_0402_5%~ D
12
R418 2.2K_0402_5%~DR418 2.2K_0 402_5%~D
12
R420 2.2K_0402_5%~DR420 2.2K_0 402_5%~D
12
R838 2.2K_0402_5%~DR838 2.2K_0 402_5%~D
12
R841 2.2K_0402_5%~DR841 2.2K_0 402_5%~D
12
R854 2.2K_0402_5%~DR854 2.2K_0 402_5%~D
12
R856 2.2K_0402_5%~DR856 2.2K_0 402_5%~D
12
R1171 100K_0402_5%~DR1171 100K_0402_5%~D
12
R845 4.7K_0402_5%~DR845 4.7K_0 402_5%~D
12
R846 4.7K_0402_5%~DR846 4.7K_0 402_5%~D
12
R851 4.7K_0402_5%~DR851 4.7K_0 402_5%~D
12
R852 4.7K_0402_5%~DR852 4.7K_0 402_5%~D
@
@
12
R1169 100K_0402_5%~D
R1169 100K_0402_5%~D
@
@
12
R1197 100K_0402_5%~D
R1197 100K_0402_5%~D
@
@
12
R1118 100K_0402_5%~D
R1118 100K_0402_5%~D
POWER_SW #_MB <43>
DOCK_PWR_BTN# <38>
+3.3V_ALW_PCH
+3.3V_ALW
+5V_RUN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MEC5055
MEC5055
MEC5055
LA-7902P
LA-7902P
LA-7902P
1
+3.3V_ALW
R888
R888
100K_0402_5%~D
100K_0402_5%~D
H_PROCHOT# <7,51,52>
+3.3V_RUN
40 61Wednesday, March 07, 2012
40 61Wednesday, March 07, 2012
40 61Wednesday, March 07, 2012
12
@
@
1.0
1.0
1.0
Page 41
5
Touch Pad
DAT_TP_SIO<40>
D D
CLK_TP_SIO<40>
+3.3V_TP
+3.3V_TP
4.7K_0402_5%~D
4.7K_0402_5%~D
12
R903
R903
10P_0402_50V8J~D
10P_0402_50V8J~D
C752
C752
1
2
1
2
4.7K_0402_5%~D
4.7K_0402_5%~D
12
R902
R902
L54 BLM18AG601SN1D_0603~DL54 BLM1 8AG601SN1D_0603~D
L55 BLM18AG601SN1D_0603~DL55 BLM1 8AG601SN1D_0603~D
10P_0402_50V8J~D
10P_0402_50V8J~D
1
C751
C751
2
TP_CLK
TP_DATA
C755
C755
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
Place close to JTP1
C C
4
12
12
3
10P_0402_50V8J~D
10P_0402_50V8J~D
C750
C750
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
D37
D37
1
TP_DATA
TP_CLK
10P_0402_50V8J~D
10P_0402_50V8J~D
1
C749
C749
2
+3.3V_TP
1
2
TP_CLK
TP_DATA
PS2_DAT_TS
PS2_CLK_TS
+3.3V_ALW +3.3V_RUN
3
Pitch: 0.5
Follow CON N List_060 9A
JTP1
JTP1
1
1
2
2
3
3
4
4
5
5
6
9
6
G1
7
10
7
G2
8
8
ACES_51522-00801-001
ACES_51522-00801-001
CONN@
CONN@
+3.3V_TP
1 2
R1161 0_06 03_5%~DR1161 0_0603_5%~D
1 2
R1162 0_06 03_5%~D
R1162 0_06 03_5%~D
@
@
BlueTooth
+3.3V_RUN
R1133 1K_0402_1%~DR1133 1K_0402_1%~D
R1134 1K_0402_1%~DR1134 1K_0402_1%~D
1 2
1 2
2
BT_COEX_STATUS2
BT_PRI_STATUS
1
+3.3V_RUN
1 2
C748
C748
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
JBT1
JBT1
1
1
2
BT_DET#< 17>
COEX1_BT_ACTIVE<34>
BT_COEX_STATUS2<32>
BT_PRI_STATUS<32>
BT_ACTIVE<43>
BT_RADIO_DIS#<39>
COEX2_WLAN_ACTIVE<34>
USBP11-<17>
USBP11+<17>
BT_COEX_STATUS2
BT_PRI_STATUS
10K_0402_5%~D
10K_0402_5%~D
33P_0402_50V8J~D
33P_0402_50V8J~D
12
C753
C753
1
2
100P_0402_50V8J~D
100P_0402_50V8J~D
@C754
@
C754
R904
R904
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
G1
14
G2
ACES_50224-0120N-001
ACES_50224-0120N-001
CONN@
CONN@
Follow CON N List_060 9A
Check JBT1 board connection
Keyboard
EMI/RF transistion capacitors
Follow CON N List_060 9A
Pitch: 1.0
JKB1
JKB1
1
+5V_RUN+3.3V_ALW
1
C756
C756
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
B B
Place close to JKB1
1
C758
C758
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
KB_DET#<18>
+3.3V_ALW
+5V_RUN
BC_INT#_ECE1117<40>
BC_DAT_ECE1117<40>
BC_CLK_ECE1117<40>
PS2_CLK_TS
PS2_DAT_TS
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
GND
12
GND
ACES_51524-0100N-001
ACES_51524-0100N-001
CONN@
CONN@
+5V_ALW
10P_0402_50V8J~D
10P_0402_50V8J~D
10P_0402_50V8J~D
1
CE21
CE21
@
@
2
+DOCK_PWR_BAR +PWR_SRC+DOCK_PWR_BAR +5V_ALW +5V_RUN +5V_ALW +5V_RU N
10P_0402_50V8J~D
10P_0402_50V8J~D
1
CE25
CE25
@
@
2
10P_0402_50V8J~D
1
CE31
CE31
@
@
2
10P_0402_50V8J~D
10P_0402_50V8J~D
1
CE26
CE26
@
@
2
+5V_ALW +5V_RUN+3.3V_ALW +VCC_GFXCORE
10P_0402_50V8J~D
10P_0402_50V8J~D
1
CE30
CE30
@
@
2
10P_0402_50V8J~D
10P_0402_50V8J~D
1
CE27
CE27
@
@
2
+5V_ALW +5V_RUN
10P_0402_50V8J~D
10P_0402_50V8J~D
1
CE29
CE29
@
@
2
10P_0402_50V8J~D
10P_0402_50V8J~D
1
CE28
CE28
@
@
2
RSMRST circuit
3
+3.3V_ALW_PCH
RSMRST#
R1622
R1622
100K_0402_5%~D
100K_0402_5%~D
1 2
R1623
@R1623
@
0_0402_5%~D
0_0402_5%~D
EC SIDE
PCH_RSMRST#<40>
PCH_RSMRST#
4
1 2
PCH_RSMRST#_Q
+5V_ALW_PCH
12
R1629
R1629
33_0402_5%~D
33_0402_5%~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
C289
C289
A A
2
5
U4
U4
1
VCC
RESET#
2
GND
RT9818A-44GU3_SC70-3~D
RT9818A-44GU3_SC70-3~D
+3.3V_ALW
1 2
C288 0.1U_0402_25V6K~DC288 0.1U_0402_25V 6K~D
5
U7
U7
1
P
B
4
O
2
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
R1655
R1655
0_0402_5%~D
0_0402_5%~D
1 2
3
PCH_RSMRST#_Q <14,16>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Int KB/TP/BT/RSMRST
Int KB/TP/BT/RSMRST
Int KB/TP/BT/RSMRST
LA-7902P
LA-7902P
LA-7902P
1
1.0
1.0
41 61W ednesday, March 07, 2012
41 61W ednesday, March 07, 2012
41 61W ednesday, March 07, 2012
1.0
Page 42
5
+3.3V_ALW_PCH Source
+3.3V_ALW2
12
R907
R907
100K_0402_5%~D
100K_0402_5%~D
D D
ALW_ON_3.3V#<20>
PCH_ALW_ON<40,44>
SIO_SLP_S5#< 16,40>
R737 0_0402_5%~D@ R737 0_0402_5%~D@
1 2
1 2
R745 0_0402_5%~D@R745 0_0402_5%~D@
ALW_ON_3.3V#
61
Q51A
Q51A
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+PWR_SRC_S
12
3
5
4
R905
R905
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q51B
Q51B
4
+3.3V_ALW +3.3V_ALW_PCH
ALW_ENABLE
1M_0402_5%~D
1M_0402_5%~D
12
R1619
R1619
Q49
Q49
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
1
C762
C762
3300P_0402_50V7K~D
3300P_0402_50V7K~D
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
C760
C760
1
2
R908
R908
20K_0402_5%~D
20K_0402_5%~D
3
DC/DC Interface
SIO_SLP_S3#<11,16,27,35,39,47,48,49>
RUN_ON<27,35,39,47,48>
RUN_ON_ENABLE#<40 >
1 2
R735 0_0402_5%~D@R735 0_0402_ 5%~D@
1 2
R744 0_0402_5%~D@R744 0_0402_ 5%~D@
+3.3V_ALW2
2
12
100K_0402_5%~D
100K_0402_5%~D
RUN_ON_ENABLE#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q52A
Q52A
R909
R909
2
1
+1.5V_RUN Source
+PWR_SRC_S
12
3
5
4
R920
R920
470K_0402_5%~D
470K_0402_5%~D
1.5V_RUN_ENABLE
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q52B
Q52B
+1.5V_MEM
12
Q59
Q59
AO4304L_SO8
AO4304L_SO8
8
7
6
5
4
2.2M_0402_5%
2.2M_0402_5%
R1610
R1610
1
C771
C771
470P_0402_50V7K~D
470P_0402_50V7K~D
2
+1.5V_RUN
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
3
12
C769
C769
1
2
R921
R921
20K_0402_5%~D
20K_0402_5%~D
+1.05V_RUN Source
+3.3V_SUS Source
+3.3V_ALW2
12
R915
R915
100K_0402_5%~D
100K_0402_5%~D
C C
SUS_ON<39>
SIO_SLP_S4#
<16,39,46>
@
@
1 2
R739 0_0402_5%~D
R739 0_0402_5%~D
1 2
R746 0_0402_5%~D
R746 0_0402_5%~D
@
@
SUS_ON_3.3V#
61
Q53A
Q53A
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+3.3V_M Source
+3.3V_ALW2
12
R918
R918
100K_0402_5%~D
100K_0402_5%~D
A_ON_3.3V#
61
Q57A
B B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SIO_SLP_A#<16,39,48>
SIO_SLP_A#
Q57A
2
+PWR_SRC_S
5
+PWR_SRC_S
12
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
5
4
12
R911
R911
470K_0402_5%~D
470K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q53B
Q53B
4
R917
R917
470K_0402_5%~D
470K_0402_5%~D
A_ENABLE
Q57B
Q57B
+3.3V_ALW
SUS_ENABLE
4.7M_0402_5%~D
4.7M_0402_5%~D
12
+3.3V_ALW
4.7M_0402_5%~D
4.7M_0402_5%~D
12
R1617
R1617
Q54
Q54
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
R1618
R1618
12
C767
C767
220P_0402_50V8J~D
220P_0402_50V8J~D
Q58
Q58
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
220P_0402_50V8J~D
220P_0402_50V8J~D
12
C770
C770
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
+3.3V_SUS
12
C765
C765
R914
R914
20K_0402_5%~D
20K_0402_5%~D
+3.3V_M
@
@
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C768
C768
R206 0_0603_5%~D
R206 0_0603_5%~D
12
@
@
R919
R919
20K_0402_5%~D
20K_0402_5%~D
For w/o vpro,+3.3V_M
change to +3.3V_SUS
12
+3.3V_SUS
+1.05V_M
For SSI
w/ vpro: PJP7 open and PJP8 open
* w/o vpro: PJP7 open and PJP8 short.depop Q63
For PT, ST
* w/o vpro: PJP7 and PJP8 open. pop Q63
A_ON_3.3V#
+1.05V_RUN_VTT
open
open
+3.3V_M
12
R916
R916
39_0603_5%~D
39_0603_5%~D
+3.3V_M_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
2
G
G
S
S
PJP7
PJP7
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PJP8
PJP8
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
Q60
Q60
+1.05V_RUN
+1.05V_M +1.05V_RUN
+PWR_SRC_S
12
R930
R930
330K_0402_5%~D
330K_0402_5%~D
1.05V_RUN_ENABLE
13
D
D
2
G
G
S
S
Q64
Q64
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q63
Q63
SI4164DY-T1-GE3_SO8~D
SI4164DY-T1-GE3_SO8~D
8
7
5
1M_0402_5%~D
1M_0402_5%~D
12
R1611
R1611
4
+5V_RUN Source
+PWR_SRC_S
12
13
D
D
2
G
G
S
S
R906
R906
470K_0402_5%~D
470K_0402_5%~D
5V_RUN_ENABLE
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q62
Q62
+5V_ALW
Q55
Q55
AO4478L_SO8
AO4478L_SO8
8
7
5
4
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
36
100P_0402_50V8J~D
100P_0402_50V8J~D
1
C773
C773
2
1
2
36
220P_0402_25V8J
220P_0402_25V8J
1
C763
C763
2
1
2
1
2
C772
C772
+5V_RUN
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C761
C761
12
R931
R931
20K_0402_5%~D
20K_0402_5%~D
12
R910
R910
20K_0402_5%~D
20K_0402_5%~D
+3.3V_SUS +1.5V_RUN +3.3V_RU N+5V_RUN+3.3V_ALW_PCH
12
R922
@R922
@
1K_0402_1%~D
1K_0402_1%~D
+3.3V_SUS_CHG
@
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q65
SUS_ON_3.3V#
A A
Q65
2
G
G
ALW_ON_3.3V#
S
S
12
R928
@R928
@
1K_0402_1%~D
1K_0402_1%~D
+3.3V_ALWPCH_CHG
@
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
RUN_ON_ENABLE#
Q66
Q66
2
G
G
S
S
12
@R923
@
1K_0402_1%~D
1K_0402_1%~D
+5V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
2
G
G
S
S
R923
@
@
Q67
Q67
12
R924
@R924
@
1K_0402_1%~D
1K_0402_1%~D
+1.5V_RUN_CHG
@
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q68
2
Q68
G
G
S
S
2
G
G
12
R929
@R929
@
39_0603_5%~D
39_0603_5%~D
+3.3V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
@
@
Q69
Q69
S
S
+1.05V_RUN +0.75V_DDR_VTT+1.5V_CPU_VDDQ
2
G
G
12
R925
@R925
@
39_0402_5%~D
39_0402_5%~D
+1.05V_RUN_CHG
@
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q70
Q70
S
S
RUN_ON_CPU1.5VS3#<7,11>
2
G
G
12
R926
R926
220_0402_5%~D
220_0402_5%~D
+1.5V_CPU_VDDQ_CHG
13
D
D
S
S
12
R927
R927
22_0603_5%~D
22_0603_5%~D
+DDR_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q71
Q71
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q72
2
Q72
G
G
S
S
+PWR_SRC_S
12
13
D
D
2
G
G
S
S
R912
R912
470K_0402_5%~D
470K_0402_5%~D
3.3V_RUN_ENABLE
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q56
Q56
Discharge Circuit
+3.3V_RUN Source
Q61
Q61
AO4478L_SO8
AO4478L_SO8
8
7
5
4
1M_0402_5%~D
1M_0402_5%~D
12
R1627
R1627
@
@
1
2
+3.3V_RUN+3.3V_ALW
1
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
2
36
220P_0402_25V8J
220P_0402_25V8J
C766
C766
12
C764
C764
1
R913
R913
20K_0402_5%~D
20K_0402_5%~D
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
POWER CONTROL
POWER CONTROL
POWER CONTROL
LA-7902P
LA-7902P
LA-7902P
42 61W ednesday, March 07, 2012
42 61W ednesday, March 07, 2012
42 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 43
5
4
3
2
1
+3.3V_ALW
12
R932
R932
10K_0402_5%~D
21
21
10K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SYS_LED_MASK#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
+3.3V_ALW
12
R937
R937
100K_0402_5%~D
100K_0402_5%~D
Q78A
Q78A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
Q74A
Q74A
Q80A
Q80A
2
2
2
Q74B
5
12
R950
R950
100K_0402_5%~D
100K_0402_5%~D
Q74B
3
4
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
5
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
3
Q78B
Q78B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
D59
D59
D62
D62
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
D D
C C
B B
SATA_ACT#<14>
MASK_SATA_LED#<39>
LED_SATA_DIAG_OUT#< 39>
WIRELESS_LED#<34,39>
BT_ACTIVE<41>
HDD LED solution for White LED
+5V_ALW
2
61
61
2
1 3
R934 910_0402_5%R934 910_0402_5%
1 3
R938 1.5K_0402_5%~DR938 1.5K_0402_5%~D
SIDE emitter type white Led
Q75
Q75
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
SATA_LED_MB
1 2
Note: LED current must be at least 2mA
HDD_LED
Q81
Q81
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 2
WLAN LED solution for White LED
+5V_ALW
61
2
Q79
Q79
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R939 1.8K_0402_5%~DR939 1.8K_0402_5%~D
LED3
LED3
2 1
LTW-110DC5-C_WHITE
LTW-110DC5-C_WHITE
WLAN_LED
3
Battery LED
BAT2_LED#<39>
BAT1_LED#<39>
BREATH_LED#<38,39>
Q83B
Q83B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
5
SYS_LED_MASK#
Q125B
Q125B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
5
SYS_LED_MASK#
Q125A
Q125A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2
MASK_BASE_LEDS#
Q83A
Q83A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2
MASK_BASE_LEDS#
Q84A
Q84A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2
SYS_LED_MASK#
Q84B
Q84B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
5
MASK_BASE_LEDS#
POWER_SW#_MB<40>
3
3
61
61
BAT2_LED#_Q
+3.3V_ALW +5V_ALW
1
2
61
BREATH_PWR_LED#_R
3
POWER_SW#_MB
D23
D23
1
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
1
C1003
C1003
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
BATT_WHITE_MBBAT2_MB_LED#_Q
BATT_YELLOW_LED
BATT_WHITE_LED
1 2
R949 1.2K_0402_5%~DR949 1.2K_0402_5%~D
BAT1_MB_LED#_Q BATT_YELLOW_MB
BAT1_LED#_Q
C1002
C1002
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
R951 200_0402_5%~DR951 200_0402_5%~D
1 2
R953 300_0402_5%~DR953 300_0402_5%~D
1 2
R958 1.3K_0402_5%R 958 1.3K_0402_5%
SIDE emitter type
LED1
LED1
BREATH_WHITE_LED_MBBREATH_LED#_Q
21
LTW-110DC5-C_WHITE
LTW-110DC5-C_WHITE
Note: LED current must be at least 2mA
3
2
3
1 2
R959 1.2K_0402_5%~DR959 1.2K_0402_5%~D
DMIC_CLK1<29>
DMIC1<29>
BREATH_PWR_LED#
LED2
LED2
3
2
LTW-326DSKS-5A_WHI-YEL
LTW-326DSKS-5A_WHI-YEL
+5V_ALW
White
White
1
Yellow
Yellow
Note: LED current must be at least 2mA
+5V_ALW
1
2
HDD_LED
BATT_WHITE_LED
BATT_YELLOW_LED
WLAN_LED
1 2
R957 820_0402_5%~DR957 820_0402_5%~D
+3.3V_RUN
C1004
C1004
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+5V_ALW
1
2
3
4
5
6
7
8
ACES_51524-0080N-001
ACES_51524-0080N-001
+5V_ALW
Check JPWR1 connection
Follow CONN List_0616E
JPWR1
JPWR1
1
2
3
4
5
6
7
8
ACES_51524-0080N-001
ACES_51524-0080N-001
CONN@
CONN@
Check JLED1 connection
Follow CONN List_0616E
JLED1
JLED1
1
2
3
4
5
9
6
G1
10
7
G2
8
CONN@
CONN@
Breath LED
1
2
3
4
5
9
6
G1
10
7
G2
8
LED Circuit Control Table
SYS_LED_MASK# LID_CL#
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened)
Fiducial Mark
FD1
@FD1
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
A A
FD2
@FD2
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD3
@FD3
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD4
@FD4
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
@ H2
@1H3
H1
@H1
@
H_3P8
H_3P8
H_3P8
H_3P8
1
H15
@H15
@
@ H16
@
H_6P5
H_6P5
H_3P3
H_3P3
1
Stand-off
5
H2
@H3
@
H4
@ H4
@
H_3P8
H_3P8
H_3P8
H_3P8
1
H18
@ H18
@
H17
@H17
@
H16
H_3P3
H_3P3
H_3P3
H_3P3
1
1
H6
@H6
@
H5
@H5
@
H_3P0
H_3P0
H_3P0
H_3P0
@H19
@
H_3P0
H_3P0
1
1
H20
@H20
@
H19
H_3P0
H_3P0
1
1
1
1
0
1 0
H7
@ H7
@
H8
@H8
@
@ H9
H_3P0
H_3P0
@ H21
@
H_3P0
H_3P0
@
H_3P0
H_3P0
H_3P0
H_3P0
1
1
H22
@H22
@
H21
@ H23
@
H_3P0
H_3P0
H_3P0
H_3P0
1
1
X
11
H14
@ H14
H9
@H10
@
H_3P0
H_3P0
1
@H24
@
H23
H_3P0
H_3P0
1
@ H12
@
H11
@H11
@
H10
H_2P7
H_2P7
H_2P7
H_2P7
1
1
H24
@ H26
@
H25
@H25
@
H_3P0
H_3P0
H_3P0
H_3P0
1
1
4
@
H12
H13
@H13
@
H_3P0X7P0
H_3P0X7P0
H_3P0
H_3P0
@H27
@
H_3P0
H_3P0
1
1
H28
@ H28
@
H27
H_3P0
H_3P0
1
1
1
H26
1
SYS_LED_MASK#<39>
SYS_LED_MASK#
LID_CL#
LID_CL#<37,39>
+3.3V_ALW
C778 0.1U_0402_25V6K~DC778 0.1U_0402_25V6K~D
1 2
5
U58
U58
1
P
B
MASK_BASE_LEDS#
4
O
2
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
POWER_SW#_MB
@
@
SW2
SW2
NTC033-XJ1J-X260CM_4P
NTC033-XJ1J-X260CM_4P
3
4
2
SW1
SW1
2
SHORT PADS~D
SHORT PADS~D
@
@
Place SW1 between D23
and JPWR1 BOT side for
1
debug
1
2
1
Place SW2 between D23
and JPWR1 Top side for
debug
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR/LED Conn/PAD/ME
PWR/LED Conn/PAD/ME
PWR/LED Conn/PAD/ME
LA-7902P
LA-7902P
LA-7902P
1
43 61Wednesday, March 07, 2012
43 61Wednesday, March 07, 2012
43 61Wednesday, March 07, 2012
1.0
1.0
1.0
Page 44
5
4
3
2
1
+COINCELL
COIN RTC Battery
12
PR1
PR1
1K_0402_5%
+3.3V_RTC_LDO
D D
ESD Diodes
PR9
PR9
1 2
PL4
PL4
1
PD6
PD6
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
3
PR8
PR8
100_0402_5%
100_0402_5%
1 2
12
PR14
PR14
1 2
100K_0402_1%
100K_0402_1%
PR16
PR16
1 2
15K_0402_1%~D
15K_0402_1%~D
PBATT+_C
PBAT_SMBCLK <40>
PBAT_SMBDAT <40>
PR11
@PR11
@
1 2
0_0402_5%
0_0402_5%
D
D
1 3
2
B
B
E
E
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
12
PC4
PC4
0.1U_0402_25V6
0.1U_0402_25V6
S
S
PQ2
PQ2
FDV301N_G_NL_SOT23-3~D
FDV301N_G_NL_SOT23-3~D
G
G
2
C
C
PQ3
PQ3
MMST3904-7-F_SOT323~D
MMST3904-7-F_SOT323~D
3 1
PL2
PL2
1 2
PL3
PL3
1 2
PR13
PR13
33_0402_5%~D
33_0402_5%~D
1 2
+5V_ALW
+3.3V_ALW
SLICE_BAT_PRES#<40,41,56>
PR17
PR17
1 2
10K_0402_5%
10K_0402_5%
@
@
PR6
PR6
100K_0402_5%
100K_0402_5%
+3.3V_ALW
PR12
PR12
2.2K_0402_1%
2.2K_0402_1%
12
1 2
PD8
PD8
1 2
DB2J31400L SOD323-2
DB2J31400L SOD323-2
@PR10
@
1 2
0_0402_5%
0_0402_5%
NB_PSID_TS5A63157
PSID_DISABLE# <39>
PQ1
PQ1
FDN338P_G_NL_SOT23-3~D
FDN338P_G_NL_SOT23-3~D
1
1
1 3
PR10
DOCK_PSID<38>
PBATT+
12
PR15
PR15
10K_0402_1%
10K_0402_1%
RB715FGT106_UMD3
RB715FGT106_UMD3
PBAT_PRES# <39,53>
3
3
2
2
2
12
PC6
PC6
1500P_0402_7K~D
1500P_0402_7K~D
1
2
1
PD5
PD5
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
Primary Battery Connector
PBATT1
PBATT1
11
G2
10
G1
9
9
8
8
7
7
6
6
CONN@
CONN@
5
5
4
4
3
3
2
2
1
1
12
PC5
PC5
2200P_0402_25V7K
2200P_0402_25V7K
SUYIN_200045MR009G188ZL
SUYIN_200045MR009G188ZL
C C
B B
Z4304
Z4305
Z4306
NB_PSID
2
3
PR7
PR7
100_0402_5%
100_0402_5%
GND
1 2
100_0402_5%
100_0402_5%
BLM18BD102SN1D_0603~D
BLM18BD102SN1D_0603~D
DC_IN+ Source
+DC_IN
PL5
PL5
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
12
PC18
PC18
0.1U_0402_25V6
0.1U_0402_25V6
12
PC12
PC12
0.1U_0402_25V6
0.1U_0402_25V6
PL6
PL6
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
12
PC16
PC16
0.1U_0402_25V6@
0.1U_0402_25V6@
PJPDC1
PJPDC1
PS_HPW15003-05M101R
PS_HPW15003-05M101R
5
5
-DCIN_JACK
4
4
3
3
+DCIN_JACK
2
2
1
1
CONN@
CONN@
8/18 change from 7 pin to 5 pin
A A
5
+DC_IN
PC10
PC10
12
PR24
PR24
4.7K_0805_5%~D@
4.7K_0805_5%~D@
12
1 2
PR21
PR21
1M_0402_5%~D
0.022U_0603_50V7K
0.022U_0603_50V7K
1M_0402_5%~D
4
12
PR26
PR26
PQ5
PQ5
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
1
S
2
S
3
S
4
G
PR23
PR23
1 2
10K_0402_5%
10K_0402_5%
1M_0402_5%~D
1M_0402_5%~D
8
D
7
D
6
D
5
D
SOFT_START_GC <56>
12
12
PC11
PC11
PC13
PC13
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
+DC_IN_SS
12
12
PC14
PC14
0.1U_0402_25V6
0.1U_0402_25V6
12
PC15
PC15
PR22
PR22
10U_0805_25V6K
10U_0805_25V6K
100K_0402_5%
100K_0402_5%
PCH_ALW_ON<40,42>
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+PWR_SRC
PR25
@PR25
@
1 2
0_0402_5%
0_0402_5%
VSB_N_002
12
PR20
PR20
22K_0402_1%
22K_0402_1%
1 2
VSB_N_003
13
D
D
PQ6
PQ6
2
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
G
G
S
S
12
PC17
PC17
@
@
.1U_0402_16V7K
.1U_0402_16V7K
2
1K_0402_5%
Z4012
2
3
PD4
PD4
1
12
DOCK_SMB_ALERT# <40, 42,56>
PU1
PU1
NO
GND
NC3COM
TS5A63157DCKR_SC70-6~D
TS5A63157DCKR_SC70-6~D
PR19
PR19
100K_0402_1%
100K_0402_1%
12
VSB_N_001
6
IN
5
V+
4
PC9
PC9
0.22U_0603_25V7K
0.22U_0603_25V7K
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
+COINCELL
JRTC1
JRTC1
1
1
2
+RTC_CELL
PC3
PC3
1U_0603_10V6K
1U_0603_10V6K
Move to power schematic
GPIO_PSID_SELECT <39>
+5V_ALW
PS_ID <40>
+PWR_SRC_S
13
12
2
PQ4
PQ4
PC8
PC8
0.1U_0402_25V6
0.1U_0402_25V6
2
3
G1
4
G2
ACES_50273-0020N-001
ACES_50273-0020N-001
CONN@
CONN@
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+DCIN
+DCIN
+DCIN
LA-7902P
LA-7902P
LA-7902P
1
44 61Wednesday, March 07, 2012
44 61Wednesday, March 07, 2012
44 61Wednesday, March 07, 2012
1.0
1.0
1.0
Page 45
A
B
C
D
E
2VREF_6182
12
PC101
1 1
22P_0402_50V8J~D
PR111
PR111
@
@
300K_0402_1%
300K_0402_1%
22P_0402_50V8J~D
13.7K_0402_1%
13.7K_0402_1%
20K_0402_1%
20K_0402_1%
130K_0402_1%
130K_0402_1%
BST_3V
UG_3V
12
PC115
PC115
1U_0603_10V6K
1U_0603_10V6K
PJP100
PJP100
1 2
@
@
PAD-OPEN 1x3m
+PWR_SRC
PAD-OPEN 1x3m
PL100
PL100
1UH_PCMB053T-1R0MS_7A_ 20%
1UH_PCMB053T-1R0MS_7A_ 20%
2 2
12
+3.3V_ALWP
3.3VALWP
TDC 5.185A
Peak Current 7.407A
+DC1_PWR_SRC
12
12
PC100
PC100
PC102
PC102
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_25V7K
2200P_0402_25V7K
+3.3V_RTC_LDO
+3.3V_ALW2
PR100
@PR100
12
12
PC119
PC119
PC103
PC103
@
@
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
PL101
PL101
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
1 2
1
+
+
PC110
PC110
2
150U_B2_6.3VM_R35M
150U_B2_6.3VM_R35M
PQ100
PQ100
3 5
241
12
PR109
PR109
4.7_1206_5%
4.7_1206_5%
3 5
241
SNUB_3V
12
PC112
PC112
680P_0402_50V7K
680P_0402_50V7K
@
1 2
0_0402_5%
0_0402_5%
10U_0603_6.3V6M
10U_0603_6.3V6M
PC108
PC108
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
1 2
PQ102
PQ102
FDMC8878_POWER33-8-5
FDMC8878_POWER33-8-5
PC107
PC107
LX_3V
12
PR107
PR107
1 2
2.2_0603_5%
2.2_0603_5%
LG_3V
OCP current 9.629A
PR113
PD100
PD100
B
1 2
RLZ5.1B_LL34@
RLZ5.1B_LL34@
+5V_ALW2
3 3
+PWR_SRC
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
ENTRIP2
3
PQ104B
PQ104B
5
4
PR115
PR115
2K_0402_1%
2K_0402_1%
ALWON<40>
4 4
THERM_STP#<22>
A
1 2
PR116
@PR116
@
1 2
0_0402_5%
0_0402_5%
2
12
PC117
PC117
1U_0603_10V6K
1U_0603_10V6K
@
@
ENTRIP1
61
2
13
PQ105
PQ105
PDTC115EU_SOT323-3
PDTC115EU_SOT323-3
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PQ104A
PQ104A
PR114
PR114
100K_0402_1%
100K_0402_1%
1 2
499K_0402_1%@
499K_0402_1%@
PR113
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PC101
1U_0603_16V6K
1U_0603_16V6K
PC120
@ PC120
@
12
PR101
PR101
1 2
PR103
PR103
FB_3V
1 2
PR105
PR105
ENTRIP2
1 2
PU100
PU100
25
P PAD
7
VO2
8
VREG3
9
BOOT2
10
UGATE2
11
PHASE2
12
LGATE2
12
+DC1_PWR_SRC
2VREF_6182
C
PC121
@ PC121
@
12
22P_0402_50V8J~D
22P_0402_50V8J~D
PR102
PR102
30.9K_0402_1%
30.9K_0402_1%
1 2
PR104
PR104
20K_0402_1%
20K_0402_1%
FB_5V
1 2
PR106
PR106
93.1K_0402_1%~D
93.1K_0402_1%~D
ENTRIP1
1 2
2
3
1
4
5
6
FB1
FB2
REF
TONSEL
ENTRIP2
SKIPSEL
EN
14
13
ENTRIP1
24
VO1
23
PGOOD
BOOT1
UGATE1
PHASE1
LGATE1
NC18VREG5
VIN16GND
17
15
BST_5V
22
21
20
19
RT8205LZQW(2) WQFN 24P PW M
RT8205LZQW(2) WQFN 24P PW M
UG_5V
LX_5V
LG_5V
2.2_0603_5%
2.2_0603_5%
+5V_ALW2
12
PC114
PC114
4.7U_0805_10V6K
4.7U_0805_10V6K
12
PC116
PC116
0.1U_0402_25V6
0.1U_0402_25V6
PR108
PR108
1 2
100K_0402_1%
100K_0402_1%
PR112
PR112
+DC1_PWR_SRC
12
12
PC106
PC105
PC105
2200P_0402_25V7K
2200P_0402_25V7K
PC109
PC109
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
1 2
FDMC7692S_POWER33 -8-5
FDMC7692S_POWER33 -8-5
+3.3V_ALW
1 2
PC106
10U_0805_25V6K
10U_0805_25V6K
PC104
PC104
0.1U_0402_25V6
0.1U_0402_25V6
BST1_5VBST1_3V
12
12
PC118
PC118
@
@
10U_0805_25V6K
10U_0805_25V6K
PQ103
PQ103
ALW_PWRGD_3V _5V <40>
PQ101
PQ101
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
3 5
241
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
12
PR110
PR110
4.7_1206_5%
4.7_1206_5%
3 5
241
SNUB_5V
12
PC113
PC113
PL103
PL103
1 2
680P_0402_50V7K
680P_0402_50V7K
1
+
+
2
+5V_ALWP
PC111
PC111
150U_B2_6.3VM_R35M
150U_B2_6.3VM_R35M
5VALWP
TDC 4.415A
Peak Current 6.308A
OCP current 8.2A
PJP101
PJP101
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PJP102
PJP102
+5V_ALWP
+3.3V_ALWP
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PJP103
PJP103
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
D
(5A,180mil s ,Via NO. = 9)
+5V_ALW
(4A,120mil s ,Via NO. = 6)
+3.3V_ALW
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+5V_ALW/3.3V_ALW
+5V_ALW/3.3V_ALW
+5V_ALW/3.3V_ALW
LA-7902P
LA-7902P
LA-7902P
E
1.0
1.0
45 61W ednesday, March 07, 2012
45 61W ednesday, March 07, 2012
45 61W ednesday, March 07, 2012
1.0
Page 46
5
4
3
2
1
1.5Volt +/- 5%
D D
TDC 9.74A
Peak Current 13.915A
OCP current 16.698A
0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
PJP200
+PWR_SRC
+1.5V_MEN_P
C C
Mode Level +0.75V_P +V_DDR_REF
S5 L off off
S3 L off on
S0 H on on
B B
Note: S3 - sleep ; S5 - power off
PJP200
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
1UH_FDS D0630-H-1R0M_1 1A_20%
1UH_FDS D0630-H-1R0M_1 1A_20%
1 2
1
+
+
PC65
PC65
330U_2.5 V_M
330U_2.5 V_M
2
PL200
PL200
1.5V_B+
12
PC274
PC274
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
12
SNUB_1.5V
12
12
12
PC276
PC276
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
FDMC888 4_POWER33 -8-5
FDMC888 4_POWER33 -8-5
PC275
PC275
680P_04 02_50V7K
680P_04 02_50V7K
PR203
PR203
4.7_1206 _5%
4.7_1206 _5%
DDR_ON<40 >
SIO_SLP_S 4#<16,3 9,42>
PC279
PC279
0.1U_0402_25V6
0.1U_0402_25V6
12
PC281
PC281
2200P_0 402_25V7K
2200P_0 402_25V7K
PQ200
PQ200
1.5V_SUS _PWRGD<40 >
PR206
PR206
0_0402_ 5%
0_0402_ 5%
1 2
1 2
PR232 0_ 0402_5%@PR 232 0_0402_5%@
PJP204
PU200
PU200
PAD
GND
21
1
2
3
4
5
1.5V_FB
PJP204
PAD-OPEN 1x1m
PAD-OPEN 1x1m
@
@
+V_DDR_ REF
VDDQ_1.5 V
22P_040 2_50V8J~D
22P_040 2_50V8J~D
12
PR238
PR238
0_0402_ 5%
0_0402_ 5%
+1.5V_MEN_P
12
PR237
PR237
0_0402_ 5%@
0_0402_ 5%@
12
PC215
@P C215
@
12
+1.5V_MEN_P
12
@
@
PR200
PR200
1 2
2.2_0603 _5%
2.2_0603 _5%
1 2
PC278
PC278
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
3 5
241
PR202
PR202
5.1_0603 _5%~D
5.1_0603 _5%~D
+5V_ALW
PQ210
PQ210
3 5
241
FDMC769 2S_POWER3 3-8-5
FDMC769 2S_POWER3 3-8-5
+3.3V_ALW
12
PR204
PR204
100K_04 02_1%
100K_04 02_1%
@
@
12
PC255
PC255
.1U_0402 _16V7K
.1U_0402 _16V7K
@
@
1 2
BOOT_1.5 V
PR201
PR201
22.6K_04 02_1%
22.6K_04 02_1%
1 2
+5V_ALW
1 2
12
PC253
PC253
1U_0603 _10V6K
1U_0603 _10V6K
S5_1.5V
DH_1.5V
SW_ 1.5V
DL_1.5V
CS_1.5V
VDD_1.5V
1.5V_SUS _PWRGD
0.75V_DD R_VTT_ON<39>
PC272
PC272
1U_0603 _10V6K
1U_0603 _10V6K
1.5V_B+
15
LGATE
14
PGND
13
CS
RT8207M ZQW_W QFN20_3X3
RT8207M ZQW_W QFN20_3X3
12
VDDP
11
VDD
PR205
PR205
1M_0402 _1%~D
1M_0402 _1%~D
1 2
1 2
PR236 0_040 2_5%@ PR236 0_0402_5%@
16
17
PHASE
UGATE
PGOOD
TON
9
10
VLDOIN_1.5 V
18
20
19
VTT
BOOT
VLDOIN
VTTGND
VTTSNS
VTTREF
VDDQ
FB
S5
S3
6
8
7
OCP Current 0.9A
12
12
PC280
PC280
PC263
PC263
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
PC282
PC282
.1U_0402 _16V7K
.1U_0402 _16V7K
+0.75V_P
+V_DDR_REF
PC277
PC277
0.033U_0 402_16V7~D
0.033U_0 402_16V7~D
PJP203
PJP201
+1.5V_MEN_P
A A
2
PJP201
JUMP_1x3m@
JUMP_1x3m@
112
+1.5V_MEM +0.75V_DDR_VTT
+0.75V_P
PJP203
PAD-OPEN 1x1m
PAD-OPEN 1x1m
@
@
12
+1.5V_ME N_P
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.5V_MEN/+0.75V_DDR_VTT
+1.5V_MEN/+0.75V_DDR_VTT
+1.5V_MEN/+0.75V_DDR_VTT
LA-7902P
LA-7902P
LA-7902P
46 61Wednesd ay, March 07, 20 12
46 61Wednesd ay, March 07, 20 12
46 61Wednesd ay, March 07, 20 12
1
1.0
1.0
1.0
Page 47
A
1 1
PJP301
+3.3V_ALW
2 2
RUN_ON<27,35,39,42,48>
SIO_SLP_S3#<11,16,27,35,39,42,48,49>
PJP301
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
1 2
PR303 0_0402_5%@PR3 03 0_0402_5%@
1 2
PR306 0_04 02_5%@ PR306 0_0402_5%@
12
PC300
PC300
22U_0805_6.3VAM
22U_0805_6.3VAM
EN_1.8VSPEN_ 1.8VSP
1.8VSP_VIN
12
PC307
PC307
0.1U_0402_25V6
0.1U_0402_25V6
PR304
@PR304
@
47K_0402_5%
47K_0402_5%
B
PR300
PR300
12
+3.3V_RUN
10K_0402_5%
10K_0402_5%
1.8V_RUN_PWRGD <39>
PU300
PU300
4
10
9
8
5
12
12
PC304
PC304
.1U_0402_16V7K
.1U_0402_16V7K
@
@
LX
PVIN
PG
LX
PVIN
SVIN
FB
EN
TP
NC
7
11
SYN470DBC_DFN10_3X3
SYN470DBC_DFN10_3X3
1.8VSP_LX
2
3
1.8VSP_FB
6
NC
1
1UH_NRS4018T1R 0NDGJ_3.2A_30%
1UH_NRS4018T1R 0NDGJ_3.2A_30%
1 2
12
PR301
PR301
4.7_0603_5%
4.7_0603_5%
@
@
SNUB_1.8VSP
12
PC305
PC305
@
@
680P_0402_50V7K
680P_0402_50V7K
C
PL301
PL301
PR302
PR302
20K_0402_1%
20K_0402_1%
PR305
PR305
10K_0402_1%
10K_0402_1%
12
12
12
PC301
PC301
12
22P_0402_50V8J
22P_0402_50V8J
PC302
PC302
<Vo=1.8V> VFB=0.6V
D
1.8Volt +/-5%
TDC 0.85A
Peak Current 1.215A
OCP current 1.458A
+1.8V_RUNP
12
12
PC306
PC306
PC303
PC303
47P_0402_50V8J
47P_0402_50V8J
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
Vo=VFB*(1+PR64/PR67)=0.6*(1+20K/10K)=1.8V
3 3
PJP300
PJP300
C
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
+1.8V_RUNP
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
+1.8V_RUN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docu ment Numbe r Rev
Size Docu ment Numbe r Rev
Size Docu ment Numbe r Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
LA-7902P
LA-7902P
LA-7902P
D
47 61Wednesday, March 07, 2012
47 61Wednesday, March 07, 2012
47 61Wednesday, March 07, 2012
1.0
1.0
1.0
Page 48
5
D D
+3.3V_ALW
PR400
PR400
100K_0402_1%
100K_0402_1%
PR402
PR402
82K_0402_1%
S0 mode be high level
C C
SIO_SLP_A#<1 6,39,42>
<11,16,27,35,39,42,47,49>
SIO_SLP_S3#
RUN_ON< 27,35,39,42,47>
82K_0402_1%
PR403 0_0402_5%@PR4 03 0_0402_5%@
1 2
0_0402_5%@
0_0402_5%@
1 2
PR409
PR409
0_0402_5%@
0_0402_5%@
1 2
PC407
PC407
.1U_0402_16V7K@
.1U_0402_16V7K@
1 2
PR408
PR408
1.05V_A_PWRGD<40>
TRIP_+V1.05SP
EN_+V1.05SP
FB_+V1.05SP
RF_+V1.05SP
12
12
PR405
PR405
470K_0402_1%
470K_0402_1%
4
12
PU400
PU400
1
2
3
4
5
VBST
PGOOD
TRIP
DRVH
EN
VFB
RF
TPS51212DSCR_SON10_ 3X3
TPS51212DSCR_SON10_ 3X3
SW
V5IN
DRVL
TP
10
9
8
7
6
11
BST_+V1.05SP
UG_+V1.05SP
SW_+V1.05SP
LG_+V1.05SP
3
2.2_0603_5%
2.2_0603_5%
1 2
+5V_ALW
1 2
PC405
PC405
1U_0402_6.3V6K
1U_0402_6.3V6K
PR401
PR401
PC404
PC404
0.1U_0402_25V6
0.1U_0402_25V6
1 2
+V1.05SP_B+
PQ400
PQ400
3 5
241
FDMC8884_POWER33-8- 5
FDMC8884_POWER33-8- 5
3 5
241
PQ405
PQ405
FDMC8878_POWER33-8-5
FDMC8878_POWER33-8-5
2
12
PC402
PC402
PC401
PC401
0.1U_0402_25V6
0.1U_0402_25V6
PL400
1UH_FDSD0630-H-1 R0M_11A_20%
1UH_FDSD0630-H-1 R0M_11A_20%
12
PR404
PR404
4.7_1206_5%
4.7_1206_5%
12
PC408
PC408
680P_0402_50V7K
680P_0402_50V7K
PL400
1 2
1
PJP400
PJP400
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
12
12
12
PC403
PC403
PC400
PC400
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
2200P_0402_25V7K
2200P_0402_25V7K
4.7U_0805_25V6K~D
+PWR_SRC
+1.05V_MP
1
+
+
PC406
PC406
220U_B2_2.5VM_R15M
220U_B2_2.5VM_R15M
2
5@ for TM pop
6@ for vPOR pop
PR406
PR406
4.99K_0402_1%
B B
4.99K_0402_1%
12
+1.05Volt +/- 5%
TDC 4.7A
PR407
PR407
10K_0402_1%
10K_0402_1%
1 2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
+1.05V_MP
2 1
PJP401
PJP401
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
2
+1.05V_M
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Do cument Num ber Rev
Size Do cument Num ber Rev
Size Do cument Num ber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Peak Current 6.5A
OCP current 7.8A
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+1.05V_M
+1.05V_M
+1.05V_M
LA-7902P
LA-7902P
LA-7902P
48 61Wednesday, March 07, 2012
48 61Wednesday, March 07, 2012
48 61Wednesday, March 07, 2012
1
1.0
1.0
1.0
Page 49
5
4
3
+V1.05S_VCCPP_B+
2
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
PJP500
PJP500
1
+PWR_SRC
+3.3V_RUN
12
12
12
12
D D
1.05V_VTTPWRGD<40,50>
PR501
PR501
84.5K_0402_1%
84.5K_0402_1%
1 2
PR503 0_0402_5%@PR5 03 0_0402_5%@
CPU_VTT_ON<39>
SIO_SLP_S3#
<11,16,27,35,39,42,47,48>
C C
1 2
1 2
PR307 0_0402_5%
PR307 0_0402_5%
@
@
PC506
PC506
.1U_0402_16V7K@
.1U_0402_16V7K@
12
TRIP_+V1.05S_VCCPP
EN_+V1.05S_VCCPP
FB_+V1.05S_VCCPP
RF_+V1.05S_VCCPP
12
PR505
PR505
470K_0402_1%
470K_0402_1%
PR500
PR500
100K_0402_5%
100K_0402_5%
1 2
PU500
PU500
1
PGOOD
2
TRIP
3
EN
4
VFB
5
RF
TPS51212DSCR_SON10_ 3X3
TPS51212DSCR_SON10_ 3X3
PR507
PR507
4.99K_0402_1%
4.99K_0402_1%
12
VBST
DRVH
V5IN
DRVL
PR502
PR502
2.2_0603_5%
2.2_0603_5%
1 2
BST_+V1.05S_VCCPP
10
UG_+V1.05S_VCCPP
9
SW_+V1.05S_VCCPP
8
SW
7
LG_+V1.05S_VCCPP
6
11
TP
0.1U_0402_25V6
0.1U_0402_25V6
12
PC505
PC505
1U_0402_6.3V6K
1U_0402_6.3V6K
PC504
PC504
1 2
+5V_ALW
PQ501
FDMC7692S_POWER33-8-5
FDMC7692S_POWER33-8-5
PQ501
PQ500
PQ500
FDMC8884_POWER33-8- 5
FDMC8884_POWER33-8- 5
3 5
241
3 5
241
1UH_FDSD0630-H-1 R0M_11A_20%
1UH_FDSD0630-H-1 R0M_11A_20%
12
PR504
PR504
4.7_1206_5%
4.7_1206_5%
12
PC508
PC508
680P_0402_50V7K
680P_0402_50V7K
PC502
PC502
PC501
PC501
0.1U_0402_25V6
0.1U_0402_25V6
PL500
PL500
1 2
VTT_SENSE_FB
2200P_0402_25V7K
2200P_0402_25V7K
PC503
PC503
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
12
@
@
PC500
PC500
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
1
+
+
PC511
PC511
220U_B2_2.5VM_R15M
220U_B2_2.5VM_R15M
2
PC510
PC510
.1U_0402_16V7K
.1U_0402_16V7K
Local sense put on HW site
PR508 0_0402_5 %@ PR508 0_0402_5%@
12
VTT_SENSE <10>
+1.05VTTP
VSSIO_SENSE_R_FB
12
PR509
PR509
71.5K_0402_1%@
B B
71.5K_0402_1%@
+3.3V_RUN
VCCP_PWRCTRL = "High" , Vo = 1.05V (SNB)
VCCP_PWRCTRL = "Low" , Vo = 1V (IVB)
PR510
PR510
10K_0402_1%
10K_0402_1%
1 2
12
PR514
PR514
10_0402_1%@
10_0402_1%@
A A
5
13
D
D
PQ502
PQ502
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
@
@
2
G
G
S
S
12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
PC509
PC509
.01U_0402_16V7K@
.01U_0402_16V7K@
PR511
PR511
10K_0402_5%@
10K_0402_5%@
1 2
From GPIO
+1.05V_RUN_VTT
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Do cument Num ber Rev
Size Do cument Num ber Rev
Size Do cument Num ber Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
+1.05VTTP
PJP501
PJP501
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
PJP502
PJP502
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
3
VCCP_PWRCTRL <11>
PR513 0_04 02_5%@ PR513 0_0402_5%@
+1.05Volt +/- 5%
TDC 6A
Peak Current 8.5A
OCP current 10.2A
12
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
LA-7902P
LA-7902P
LA-7902P
VSSIO_SENSE_R <10>
49 61Wednesday, March 07, 2012
49 61Wednesday, March 07, 2012
49 61Wednesday, March 07, 2012
1
1.0
1.0
1.0
Page 50
5
4
3
2
1
VID [0] VID[1] VCCSA Vout
D D
+3.3V_RUN
12
PR79
PR79
100K_0402_5%
PR80
@ PR80
@
VCCSAPWROK<40>
0_0402_5%
0_0402_5%
12
100K_0402_5%
The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.
PR78
PR78
1K_0402_5%
1K_0402_5%
12
PR90
@PR90
@
1 2
0_0402_5%
0_0402_5%
PR91
@PR91
@
+VCCSA_PWRGD
+VCCSA_PWRGD
PR81
PR81
1K_0402_5%
1K_0402_5%
1 2
0_0402_5%
0_0402_5%
12
VCCSA_VID_1 <11>
VCCSA_VID_0 <11>
+5V_ALW
PR82
PR82
10_0402_1%
12
3300P_0402_50V7K
3300P_0402_50V7K
10_0402_1%
19
20
21
22
23
24
PC91
PC91
PU7
PU7
12
PGND
PGND
PGND
VIN
VIN
VIN
PC75
PC75
2.2U_0603_10V7K
1 2
PC89
PC89
10U_0805_25V6K
10U_0805_25V6K
2.2U_0603_10V7K
+VCCSA_PWR_SRC
1 2
PC90
PC90
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
C C
12
12
+3.3V_ALW
B B
PJP19
PJP19
2 1
PAD-OPEN 1x2m~D@
PAD-OPEN 1x2m~D@
+VCCSA_PWR_SRC
PC86
PC86
2200P_0402_25V7K
2200P_0402_25V7K
1 2
PC88
PC88
PC87
PC87
0.1U_0402_25V6
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
GNDA_VCCSA
PC74
PC74
1 2
1U_0603_10V6K
1U_0603_10V6K
12
18
16
17
V5FILT
V5DRV
PGOOD
TPS51461RGER_QFN24_4X4~D
TPS51461RGER_QFN24_4X4~D
COMP
GND
VREF
3
1
2
12
PR89
PR89
5.1K_0402_1%
5.1K_0402_1%
PC92
PC92
0.01U_0402_25V7K
0.01U_0402_25V7K
PR83
@ PR83
+VCCSA_BT
+VCCSA_PHASE
@
1 2
0_0402_5%
0_0402_5%
PR84
PR84
2.2_0603_1%
2.2_0603_1%
1 2
12
+VCCSA_BT_1
12
PC77
PC77
680P_0402_50V7K@
680P_0402_50V7K@
12
PR85
PR85
4.7_1206_5%@
4.7_1206_5%@
1.05V_VTTPWRGD <40,49>
PC76
PC76
0.1U_0402_25V6
0.1U_0402_25V6
1 2
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 2
PL15
PL15
PC79
PC79
@
@
+VCCSA_EN
13
14
15
EN
VID0
VID1
SLEW
4
1 2
12
BST
11
SW
10
SW
9
SW
8
SW
7
SW
25
TP
VOUT
MODE
5
6
PR86
PR86
22K_0402_5%
22K_0402_5%
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V
output voltage adjustable netw ork
VCCSA
TDC 4.2A
Peak Current 6 A
OCP current 7.2 A
22U_0805_6.3V6M
22U_0805_6.3V6M
1 2
12
PC80
PC80
.1U_0402_16V7K
.1U_0402_16V7K
PR87
PR87
100_0402_5%
100_0402_5%
PR88
@PR88
@
0_0402_5%
0_0402_5%
PC82
PC82
PC81
PC81
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
12
12
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
12
PC83
PC83
PC84
PC84
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
2200P_0402_25V7K
2200P_0402_25V7K
VCCSA_SENSE <11>
PC85
PC85
+VCCSA_P
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
PJP20
PJP20
+VCCSA_P
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PJP21
PJP21
PAD-OPEN1x1m
PAD-OPEN1x1m
+VCC_SA
12
GNDA_VCCSA
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+VCC_SA
+VCC_SA
+VCC_SA
LA-7902P
LA-7902P
LA-7902P
1
50 61Wednesday, March 07, 2012
50 61Wednesday, March 07, 2012
50 61Wednesday, March 07, 2012
1.0
1.0
1.0
Page 51
5
Local sense put on HW site
VCC_AXG_SENSE<11>
VSS_AXG_SENSE<11>
D D
VSUMG+
12
12
PR707
PR707
2.61K_0402_1%
2.61K_0402_1%
12
PR709
PR709
PH700
PH700
VSUMG-
12
10KB_0402_5%_ERTJ0ER103J
10KB_0402_5%_ERTJ0ER103J
PC711
PC711
.1U_0402_16V7K
PR712
PR712
1 2
3.83K_0402_1%
3.83K_0402_1%
C C
+1.05V_RUN_VTT
PR730 54.9_0402_1%PR730 54.9_0402_1%
PR735 75_0402_5%@ PR735 75_0402_5%@
B B
PR737 130_0402_1%PR737 130_0402_1%
A A
.1U_0402_16V7K
PH701
SCLK
ALERT#
SDA
PH701
PR715
PR715
12
27.4K_0402_1%
27.4K_0402_1%
PR724
@PR724
@
1 2
0_0402_5%
0_0402_5%
470K_0402_5%_ TSM0B474J4702RE
470K_0402_5%_ TSM0B474J4702RE
H_PROCHOT#<7,40,52>
12
12
12
12
VIDSCLK<10>
VIDALERT_N<10>
VIDSOUT<10>
5
12
12
11K_0402_1%
11K_0402_1%
12
PC707
PC707
0.022U_0402_25V7K
0.022U_0402_25V7K
VSUMG-
+5V_RUN
PC719
PC719
43P_0402_50V8J~D
43P_0402_50V8J~D
PC708
PC708
.1U_0402_16V7K
.1U_0402_16V7K
1.05V_0.8V_PWROK<14,40>
12
PC709
PC709
0.068U_0402_16V7K
0.068U_0402_16V7K
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
PR716 0_0402_5%@PR716 0_0402_5%@
1 2
PR718 0_0402_5%@PR718 0_0402_5%@
1 2
PR719 0_0402_5%@PR719 0_0402_5%@
1 2
PR721 0_0402_5%@PR721 0_0402_5%@
1 2
IMVP_VR_ON<39>
PR725
PR725
1 2
3.83K_0402_1%
3.83K_0402_1%
PC712
@PC712
@
PC713
@PC713
@
1 2
PR713 0_0402_5%@PR713 0_0402_5%@
+5V_RUN
VSUM+
PR746
PR746
2.61K_0402_1%
2.61K_0402_1%
PH703
PH703
VSUM-
PC743
PC743
.1U_0402_16V7K
.1U_0402_16V7K
330P_0402_50V7K
330P_0402_50V7K
0.01U_0402_50V7K
0.01U_0402_50V7K
PR710
@PR710
@
649_0402_1%~D
649_0402_1%~D
1 2
PR711
PR711
365_0402_1%
365_0402_1%
1 2
12
12
ALERT#
SDA
VR_HOT#
PR722 0_0402_5%@PR722 0_0402_5%@
1 2
1 2
PR723 0_0402_5%@PR723 0_0402_5%@
12
PH702
PH702
470K_0402_5%_ TSM0B474J4702RE
470K_0402_5%_ TSM0B474J4702RE
PR727
PR727
27.4K_0402_1%
27.4K_0402_1%
12
PC720 22P_0402_50V8JPC720 22P_0402_50V8J
COMP
PR732 0_0402_5%@PR732 0_0402_5%@
1 2
PC724
@PC724
@
PC726
PC726
VSUM-
PC728
PC728
12
12
12
PR747 11K_0402_1%PR747 11 K_0402_1%
10KB_0402_5%_ERTJ0ER103J
10KB_0402_5%_ERTJ0ER103J
12
PC703
@ PC703
@
12
PC706
PC706
1 2
12
3300P_0402_50V7K
3300P_0402_50V7K
@
@
ISEN1G
ISEN2G
NTCG
SCLK
VR_EN
NTC
12
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
12
.1U_0402_16V7K
.1U_0402_16V7K
PC739
PC739
PC738
PC738
1 2
649_0402_1%~D
649_0402_1%~D
4
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
4
PC710
PC710
1
2
3
4
5
6
7
8
9
10
41
PC740
PC740
PR754
PR754
PU700
PU700
ISUMPG
ISEN1G
ISEN2G
NTCG
SCLK
ALERT#
SDA
VR_HOT#
VR_ON
NTC
TP
12
40
11
ISEN3
0.033U 16V K X7R 0402
0.033U 16V K X7R 0402
PR750
PR750
365_0402_1%
365_0402_1%
1 2
499_0402_1%
499_0402_1%
PGOODG
37
39
38
36
FBG
RTNG
COMPG
ISUMNG
ISEN212FB17ISUMP14ISEN3/FB2
15
13
ISEN1
ISEN2
12
PC744
PC744
3300P_0402_25V7K
3300P_0402_25V7K
2K_0402_1%
2K_0402_1%
PR702
PR702
12
2.61K_0402_1%
2.61K_0402_1%
PR704
PR704
12
390P_0402_50V7K
390P_0402_50V7K
PR708
@PR708
@
1 2
0_0402_5%
0_0402_5%
35
34
33
32
31
PWM2G
BOOT1G
PGOODG
LGATE1G
PHASE1G
UGATE1G
BOOT2
UGATE2
PHASE2
LGATE2
VCCP
PWM3
LGATE1
PHASE1
UGATE1
COMP
PGOOD19ISUMN
RTN16ISEN1
BOOT1
18
20
ISL95836HRTZ-T_TQFN40_5X5~D
ISL95836HRTZ-T_TQFN40_5X5~D
PGOOD
COMP
PR726 0_0402_5%@PR726 0_0402_5%@
1 2
499_0402_1%
499_0402_1%
330P_0402_50V7K
330P_0402_50V7K
0.01U_0402_50V7K
0.01U_0402_50V7K
PC704
PC704
IMVP_PWRGD
VDD
PR736
PR736
@
@
1 2
PC741
PC741
1 2
12
30
29
28
27
26
25
24
23
22
21
BOOT1
PR728 1.91K_0402_1%PR728 1.91K_0402_1%
390P_0402_50V7K
390P_0402_50V7K
12
PR740
PR740
12
2K_0402_1%
2K_0402_1%
PC737
PC737
PR703
PR703
130K_0402_1%
130K_0402_1%
PC722
PC722
12
Local sense put on HW site
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD P ARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PR701
PR701
12
12
1 2
68P_0402_50V8J~D
68P_0402_50V8J~D
LGATE1G
PHASE1G
BOOT1G
BOOT2
UGATE2
PHASE2
LGATE2
LGATE1
PHASE1
UGATE1
IMVP_PWRGD <39>
12
PR741
PR741
130K_0402_1%
130K_0402_1%
PR744
PR744
1 2
2K_0402_1%
2K_0402_1%
3
PC701
PC701
330P_0402_50V7K
330P_0402_50V7K
12
PC702
PC702
12
150P_0402_50V8F~D
150P_0402_50V8F~D
PC705
PC705
UGATE1G
VCCP
PWM3
1U_0603_10V6K
1U_0603_10V6K
+3.3V_RUN
PC723
PC723
12
47P_0402_50V8J
47P_0402_50V8J
12
150P_0402_50V8F~D
150P_0402_50V8F~D
PC729
PC729
1 2
680P_0402_50V7K
680P_0402_50V7K
VCCSENSE <10>
VSSSENSE <10>
3
VCC_GFXCORE
TDC 21.5A
Peak Current 33A
OCP current 57.18A
Load line -3.9mV/A
5
PQ708
PQ708
S TR MDU1516URH 1N POWERDFN56-8
S TR MDU1516URH 1N POWERDFN56-8
123
5
PQ710
PQ710
213
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
5
4
5
PQ703
PQ703
4
5
4
S TR MDU1516URH 1N POWERDFN56-8
S TR MDU1516URH 1N POWERDFN56-8
123
5
PQ706
PQ706
4
213
PC714
PC714
PC727
PC727
12
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
1 2
PR714 0_0402_5%@PR714 0_0402_5%@
12
12
PR705
PR705
150K_0402_1%~D
150K_0402_1%~D
PC750
PC750
PR763
PR763
2.2_0603_5%
2.2_0603_5%
1 2
PR717
PR717
1_0603_5%
1_0603_5%
PR720
PR720
1_0603_5%
1_0603_5%
12
PC715
PC715
1U_0603_10V6K
1U_0603_10V6K
UGATE2
PHASE2
BOOT2
LGATE2
PR742
PR742
21K_0402_1%
21K_0402_1%
1 2
BOOT1
2.2_0603_5%
2.2_0603_5%
LGATE1
1 2
12
2.2_0603_5%
2.2_0603_5%
UGATE1
PHASE1
PR749
PR749
4
PQ711
PQ711
4
+5V_ALW
12
PR729
PR729
12
1 2
PC721
PC721
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
1 2
12
PC742
PC742
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
DELL CONFIDENTIAL/PROPRIETARY
2
12
PC746
PC746
10U_0805_25V6K
10U_0805_25V6K
5
4
VCC_core
TDC 36A
Peak Current 53A
OCP current 64A
Load line -1.9mV/A
Icc_Dyn_VID1 43A
PQ700
PQ700
S TR MDU1516URH 1N POWERDFN56-8
S TR MDU1516URH 1N POWERDFN56-8
123
213
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
PQ704
PQ704
PQ707
PQ707
4
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
2
213
PQ702
PQ702
PR760
PR760
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
5
4
+VCC_PWR_SRC
5
213
12
PC751
PC751
680P_0402_50V7K
680P_0402_50V7K
12
4.7_1206_5%
4.7_1206_5%
+VCC_PWR_SRC
PR731
PR731
213
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
PC733
PC733
10U_0805_25V6K
10U_0805_25V6K
PR751
PR751
4.7_1206_5%
4.7_1206_5%
SIR818DP-T1-GE3_POWERPAK8-5
SIR818DP-T1-GE3_POWERPAK8-5
1
+VCC_PWR_SRC
PJP702
+GFX_PWR_SRC
12
PC747
PC747
10U_0805_25V6K
10U_0805_25V6K
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
GP1_SW GP1_Vo
PR761
PR761
1 2
@
@
12
PC716
PC716
10U_0805_25V6K
10U_0805_25V6K
12
12
4.7_1206_5%
4.7_1206_5%
12
PC734
PC734
12
PC745
PC745
12
12
PC749
PC749
0.1U_0402_25V6
0.1U_0402_25V6
PL704
PL704
4
3
PR758
PR758
10K_0603_1%
10K_0603_1%
1 2
3.65K_0603_1%
3.65K_0603_1%
ISEN1G
12
PC717
PC717
10U_0805_25V6K
10U_0805_25V6K
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
PC725
PC725
PR733
PR733
680P_0402_50V7K
680P_0402_50V7K
ISEN2
1 2
10K_0603_1%
10K_0603_1%
PR738
PR738
VSUM+
1 2
3.65K_0603_1%
3.65K_0603_1%
VSUM-
12
PC736
PC736
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
680P_0402_50V7K
680P_0402_50V7K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
0.1U_0402_25V6
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
0.36UH_FDUE104J-H-R36M=P3_33A_20%~D
PR752
PR752
ISEN1
1 2
10K_0603_1%
10K_0603_1%
PR755
PR755
VSUM+
1 2
3.65K_0603_1%
3.65K_0603_1%
VSUM-
PJP702
12
PAD-OPEN1x1m
PAD-OPEN1x1m
@
@
12
PC752
PC752
2200P_0402_25V7K
2200P_0402_25V7K
1
2
PC700
PC700
0.1U_0402_25V6
0.1U_0402_25V6
12
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+VCC_GFXCORE
12
PR762
PR762
PR759
PR759
@
@
1 2
1_0402_5%
1_0402_5%
10K_0402_1%
10K_0402_1%
VSUMG-VSUMG+
PL700
PL700
FBMA-L11-453215-121LMA90T_2
FBMA-L11-453215-121LMA90T_2
1 2
12
12
PC753
PC753
2200P_0402_25V7K
2200P_0402_25V7K
PL701
PL701
4
3
P2_SW
PR743
PR743
12
1_0402_5%
1_0402_5%
12
PC754
PC754
2200P_0402_25V7K
2200P_0402_25V7K
PL702
PL702
4
3
P1_SW
PR757
PR757
12
1_0402_5%
1_0402_5%
+VCC_CORE
+VCC_CORE
+VCC_CORE
LA-7902P
LA-7902P
LA-7902P
1
ISEN2G
1
2
1
2
1
2
P2_Vo
+
+
PC730
PC730
P1_Vo
10K_0402_1%
10K_0402_1%
100U_25V_M~D
100U_25V_M~D
+VCC_CORE
10K_0402_1%
10K_0402_1%
+VCC_CORE
PR753
PR753
51 61Wednesday, March 07, 2012
51 61Wednesday, March 07, 2012
51 61Wednesday, March 07, 2012
PR734
PR734
1
2
+PWR_SRC
ISEN1
12
+
+
PC731
PC731
100U_25V_M~D
100U_25V_M~D
ISEN2
12
1.0
1.0
1.0
Page 52
A
ISL88731C 11@
BQ24747 22@
+DC_IN_SS
1 1
PD1300@
PD1300@
2 1
ES2AA-13-F
ES2AA-13-F
4
1
2
35
PQ1300
PQ1300
SI7121DN-T1-GE3_POWERPAK8-5
SI7121DN-T1-GE3_POWERPAK8-5
PR1300
PR1300
1 2
0_0402_5%
0_0402_5%
@
@
DC_BLOCK_GC <53>
E2 AC_OK=17.7 Volt
PR1313
TI bq24745 = 316K
Intersil ISL88731 = 226K
+SDC_IN
MAX8731A_LDO
PR1313
PR1313
226K_0402_1%~D11@
226K_0402_1%~D11@
PR1317
PR1317
49.9K_0402_1%
49.9K_0402_1%
PC1307
PC1307
0.01U_0402_25V7K
0.01U_0402_25V7K
2 2
Vref
TI bq24747 = 3.3V
Intersil ISL88731C = 3.2V
VDDP
TI bq24747 = 6V
Intersil ISL88731C = 5.1V
GNDA_CHG
CHARGER_SMBCLK<40>
CHARGER_SMBDAT<40>
1 2
12
+5V_ALW
GNDA_CHG
ACAV_IN<22,40,53>
12
PC1316
PC1316
.1U_0402_16V7K
.1U_0402_16V7K
MAX8731_IINP<22>
12
MAX8731_REF
12
10K_0402_5%22@
10K_0402_1%11@
10K_0402_1%11@
PR1310
PR1310
10K_0402_5%22@
PR1311
PR1311
12
PR1316
PR1316
15.8K_0402_1%11@
15.8K_0402_1%11@
12
PR1329
PR1329
8.45K_0402_1%@
8.45K_0402_1%@
+CHGR_DC_IN<53>
12
PR1320
PR1320
1 2
0_0402_5%
0_0402_5%
@
@
1 2
PR1323
PR1323
200K_0402_5%
200K_0402_5%
12
22@
22@
PR1325
PR1325
11@
11@
2.2K_0402_1%
2.2K_0402_1%
PC1321
PC1321
120P_0402_50VNPO~D
120P_0402_50VNPO~D
1 2
12
12
22@
22@
PC1323
PC1323
PC1324
PC1324
220P_0402_50V7K~D
220P_0402_50V7K~D
11@
11@
0.01U_0402_25V7K
0.01U_0402_25V7K
Maximum charging current is 7.2A
3 3
4 4
DYN_TUR_CURRENT_SET#
65W
90W
DYN_TUR_CURRNT_SET#<40>
High
Low
PQ1310
PQ1310
2N7002KW 1N SOT323-3
2N7002KW 1N SOT323-3
+3.3V_ALW2
12
PR1341
PR1341
150K_0402_1%~D
150K_0402_1%~D
12
12
PR1349
PR1349
PR1350
PR1350
66.5K_0402_1%
66.5K_0402_1%
150K_0402_1%~D
150K_0402_1%~D
13
D
D
2
G
G
S
S
MAX8731_IINP
12
PC1341
PC1341
100P_0402_50V8J
100P_0402_50V8J
PR1343
PR1343
20K_0402_1%
20K_0402_1%
1 2
+5V_ALW
12
PC1340
PC1340
220P_0402_50V7K~D
220P_0402_50V7K~D
Adapter Protection Circuit for Turbo Mode
+DOCK_PWR_BAR
+DC_IN_SS
PC1320
PC1320
22@
22@
12
PC1326
PC1326
PC1325
PC1325
0.01U_0402_25V7K
0.01U_0402_25V7K
@
@
PC1336
PC1336
100P_0402_50V8J@
100P_0402_50V8J@
B
CSS_GC<53>
2
3
BAT54CW_SOT323~D
BAT54CW_SOT323~D
1 2
PR1309
PR1309
1_0805_5%~D@
1_0805_5%~D@
GNDA_CHG
PC1318
PC1318
2200P_0402_25V7K
2200P_0402_25V7K
22@
22@
1 2
56P_0402_50V8~D
56P_0402_50V8~D
22@
22@
12
11@
11@
0.01U_0402_25V7K
0.01U_0402_25V7K
12
12
PC1337
PC1337
0.01U_0402_25V7K@
0.01U_0402_25V7K@
3
2
+
-
PD1302
PD1302
12
12
8
P
G
4
+SDC_IN
PR1302
PR1302
1 2
0_0402_5%
0_0402_5%
@
@
1
PC1306
PC1306
0.1U_0805_50V7K
0.1U_0805_50V7K
12
1 2
MAX8731_REF
1 2
PR1327
PR1327
10K_0402_5%
10K_0402_5%
22@
22@
PC1327
PC1327
1U_0603_10V6K
1U_0603_10V6K
22@
22@
GNDA_CHG
PR1340
PR1340
1.8M_0402_1%
1.8M_0402_1%
1 2
PU1304A
PU1304A
1
O
LM393DR_SO8~D
LM393DR_SO8~D
12
PC1300
PC1300
NTR4502PT1G_SOT23-3~D
NTR4502PT1G_SOT23-3~D
PC1303
PC1303
0.1U_0402_25V6
0.1U_0402_25V6
1 2
GNDA_CHG
+DCIN
MAX8731_IINP
PR1324
PR1324
7.5K_0402_5%
7.5K_0402_5%
22@
22@
12
.1U_0402_16V7K@
.1U_0402_16V7K@
PC1328
PC1328
+5V_ALW
PR1334
PR1334
1 2
0.1U_0402_25V6@
0.1U_0402_25V6@
2
G
G
PQ1302
PQ1302
PR1304
10_0402_5%
PR1304
10_0402_5%
PU1300
PU1300
22
DCIN
2
ACIN
13
ACOK
11
VDDSMB
10
SCL
9
SDA
14
NC
8
VICM
6
FBO
5
EAI
4
EAO
3
VREF
7
CE
12
GND
29
TP
ISL88731C_QFN28_5X5~D
ISL88731C_QFN28_5X5~D
11@
11@
221K_0402_1%~D
221K_0402_1%~D
1 2
61
2
PR1301
PR1301
0.01_1206_1%~D
0.01_1206_1%~D
4
3
13
D
D
S
S
CSSP_1
PR1303
PR1303
10K_0402_5%
10K_0402_5%
12
11@
11@
PC1304
PC1304
0.047U_0402_25V7K
0.047U_0402_25V7K
11@
11@
1 2
1
28
CSSP
ICREF
PR1339
PR1339
0_0402_5%
0_0402_5%
@
@
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PQ1307A
PQ1307A
1
2
13
D
D
2
G
G
S
S
CSSN_1
12
12
PR1305
PR1305
PC1305
PC1305
0.1U_0402_25V6
0.1U_0402_25V6
11@
11@
27
ICOUT
CSSN
BOOT
VDDP
UGATE
PHASE
LGATE
PGND
CSOP
CSON
VFB
NC
GNDA_CHG
H_PROCHOT# <7,40,51>
3
4
+PWR_SRC
12
12
PC1346
PC1346
10_0402_5%
10_0402_5%
1 2
26
25
21
24
23
20
19
18
17
15
16
PC1343
PC1343
PC1344
PC1344
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
PQ1301
PQ1301
NTR4502PT1G_SOT23-3~D
NTR4502PT1G_SOT23-3~D
AP2623GY-HF 2P SOT26-6
AP2623GY-HF 2P SOT26-6
S
S
G
G
12
11@
11@
PR1306
PR1306
100K_0402_1%
100K_0402_1%
GNDA_CHG
ICOUT
PR1318
PR1318
2.2_0603_1%
2.2_0603_1%
BOOT
1 2
PC1310
PC1310
MAX8731A_LDO
12
PR1322
PR1322
12
0_0603_5%11@
0_0603_5%11@
PC1317
PC1317
220P_0402_50V7K~D
220P_0402_50V7K~D
VFB
PR1328
PR1328
1 2
100_0402_5%
100_0402_5%
PJP801
PJP801
1 2
PAD-OPEN1x1m@
PAD-OPEN1x1m@
2N7002DW-T/R7_SOT363-6~D
2N7002DW-T/R7_SOT363-6~D
PQ1307B
PQ1307B
5
C
1UH_PCMB053T-1R0MS_7A_20%
1UH_PCMB053T-1R0MS_7A_20%
12
12
PC1345
PC1345
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
PQ1303A
PQ1303A
D
D
65
1
AP2623GY-HF 2P SOT26-6
AP2623GY-HF 2P SOT26-6
12
PR1307
PR1307
100K_0402_1%
100K_0402_1%
BOOT_D
12
12
PD1301
PD1301
1PS76SB21 SOD323-2
1PS76SB21 SOD323-2
0.1U_0402_25V6
0.1U_0402_25V6
22@
22@
CHG_UGATE
+VCHGR_B
CHG_LGATE
+VCHGR
12
PC1338
PC1338
100P_0402_50V8J
100P_0402_50V8J
1 2
PAD-OPEN 4x4m@
PAD-OPEN 4x4m@
PQ1303B
PQ1303B
S
S
G
G
3
PR1319
PR1319
4.7_0603_5%
4.7_0603_5%
11@
11@
1 2
1 2
MAX8731_REF
+DC_IN
PR1335
PR1335
PR1346
PR1346
232K_0402_1%~D
232K_0402_1%~D
22.6K_0402_1%
22.6K_0402_1%
PL1300
PL1300
12
PJP800
PJP800
D
D
42
PR1312
PR1312
1 2
0_0402_5%
0_0402_5%
@
@
12
PC1309
PC1309
1U_0603_10V6K
1U_0603_10V6K
11@
11@
GNDA_CHG
PC1311
PC1311
1U_0603_10V6K
1U_0603_10V6K
PC1319
3300P_0402_50V7K@
PC1319
3300P_0402_50V7K@
12
12
PR1336
PR1336
47K_0402_1%~D
47K_0402_1%~D
12
12
PR1347
PR1347
42.2K_0402_1%~D
42.2K_0402_1%~D
+3.3V_ALW
0.1U_0402_25V6
0.1U_0402_25V6
5
PU1302
PU1302
P
B
4
O
A
G
3
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
CHAGER_SRC
12
12
PC1302
PC1302
PC1301
PC1301
0.1U_0402_25V6
0.1U_0402_25V6
47P_0402_50V8J
47P_0402_50V8J
DOCK_DCIN_IS+ <38>
DOCK_DCIN_IS- <38>
DK_CSS_GC <53>
5
PQ1304
PQ1304
4
S TR MDU1516URH 1N POWERDF N56-8
S TR MDU1516URH 1N POWERDF N56-8
123
12
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
PQ1305
PQ1305
3 5
241
FDMC8878_POWER33-8-5
FDMC8878_POWER33-8-5
PR1333
PR1333
1M_0402_1%~D
1M_0402_1%~D
1 2
+5V_ALW
8
5
+
6
-
4
12
PC1339
PC1339
100P_0402_50V8J
100P_0402_50V8J
PC1342
PC1342
12
1
2
PROCHOT_GATE <39>
To preset system to throtlle
switching from AC to DC
12
PC1322
PC1322
680P_0402_50V7K
680P_0402_50V7K
PR1332
PR1332
4.7_1206_5%
4.7_1206_5%
1 2
GNDA_CHG
PU1304B
PU1304B
P
7
O
G
LM393DR_SO8~D
LM393DR_SO8~D
100K_0402_5%
100K_0402_5%
PR1351
PR1351
PL1301
PL1301
PC1333
PC1333
0.1U_0402_25V6
0.1U_0402_25V6
22@
22@
+3.3V_ALW
12
13
D
D
S
S
+VCHGR_L
12
12
PR1330
PR1330
11@
11@
10_0402_5%
10_0402_5%
1 2
MAX8731_REF
12
10K_0402_1%
10K_0402_1%
PR1338
PR1338
12
PR1348
PR1348
@
@
41.2K_0402_1%~D
41.2K_0402_1%~D
2
ACAV_IN <22,40,53>
G
G
2N7002KW 1N SOT323-3
2N7002KW 1N SOT323-3
PQ1306
PQ1306
12
PC1313
PC1313
PC1312
PC1312
2200P_0402_25V7K
2200P_0402_25V7K
PR1326
PR1326
0.01_1206_1%~D
0.01_1206_1%~D
4
3
PR1331
PR1331
0_0402_5%
0_0402_5%
1 2
PC1334
PC1334
0.22U_0402_16V7K
0.22U_0402_16V7K
11@
11@
PR1342
PR1342
1 2
D
PC1314
PC1314
PC1335
PC1335
0.1U_0402_25V6@
0.1U_0402_25V6@
12
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
0.1U_0402_25V6
PC1329
PC1329
1 2
12
PC1315
PC1315
10U_0805_25V6K
10U_0805_25V6K
+VCHGR
12
12
PC1330
PC1330
10U_0805_25V6K
10U_0805_25V6K
GNDA_CHG
ACAV_IN_NB <39,40,53>
12
12
PC1332
PC1332
PC1331
PC1331
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
12
0.1U_0402_25V6
0.1U_0402_25V6
1
2
@
@
1 2
0_0402_5%
0_0402_5%
@
@
PU1300
BQ24747
BQ24747
PR1304
22@PR1304
0_0402_5%
0_0402_5%
22@
PR1305
0_0402_5%
0_0402_5%
PR1330
22@PR1330
0_0402_5%
0_0402_5%
22@
PC1334
22@PC1334
PR1313
22@PR1313
22@PU1300
22@
22@
316k_0402_1%
316k_0402_1%
PR1325
22@PR1325
22@
4.7k_0402_1%
4.7k_0402_1%
A
22@
0.1U_0402_25V6
0.1U_0402_25V6
22@PR1305
22@
PC1304
22@PC1304
22@ PR1322
0.1U_0402_25V6
0.1U_0402_25V6
B
22@PR1322
22@
1 +-5% 0603
1 +-5% 0603
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Charger
Charger
Charger
LA-7902P
LA-7902P
LA-7902P
D
52 61Wednesday, March 07, 2012
52 61Wednesday, March 07, 2012
52 61Wednesday, March 07, 2012
1.0
1.0
1.0
Page 53
5
D D
PQ44
PQ44
SI7121DN-T1-GE3_POWERPAK8-5
SI7121DN-T1-GE3_POWERPAK8-5
+VCHGR
C C
4
1
2
35
PR212
@ PR212
@
1 2
0_0402_5%
0_0402_5%
4
BLK_MOSFET_GC
+DOCK_PWR_BAR
PBATT+
PR210
@ PR210
@
0_0402_5%
0_0402_5%
12
PQ45
PQ45
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
1
S
D
2
S
D
3
S
D
4
G
D
12
PC190
PC190
1U_0603_25V6
1U_0603_25V6
3
S2AA-13-F SMA
S2AA-13-F SMA
PD17
PD17
2 1
PQ43
PQ43
1
8
S
D
2
7
S
D
3
6
S
D
4
5
G
12
PR207
PR207
330K_0402_5%
330K_0402_5%
8
PBATT_IN_SS
7
6
5
D
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
PR211
PR211
1K_1206_5%
1K_1206_5%
12
12
1 2
PC191
PC191
1U_0603_25V6
1U_0603_25V6
12
PR209
PR209
330K_0402_5%
330K_0402_5%
2
PC187
PC187
PR208
@PR208
@
0.47U_0805_25V7K~D
0.47U_0805_25V7K~D
0_0402_5%
0_0402_5%
12
STSTART_DCBLOCK_GC
PD18
PD18
2
3
PDS5100H-13_POWERDI5-3~D
PDS5100H-13_POWERDI5-3~D
PQ46
PQ46
8
D
7
D
6
D
5
D
FDS6679AZ_SO8~D
FDS6679AZ_SO8~D
1
1
S
2
S
3
S
4
G
12
PC1347
PC1347
0.1U_0402_25V6
0.1U_0402_25V6
1
+PWR_SRC
12
12
PC188
PC188
PC189
PC189
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_25V7K
2200P_0402_25V7K
PR214 0_0402_5%@PR214 0_0402_5%@
CD3301_DCIN
PC192
PC192
0.1U_0603_50V4Z
0.1U_0603_50V4Z
1 2
1 2
1 2
PR216 0_0402_5%@ PR216 0_0402_5%@
+CHGR_DC_IN<52>
ACAVDK_SRC
12
PC193
PC193
0.1U_0402_25V6
0.1U_0402_25V6
ERC1
12
ACAVIN
P33ALW2
+DOCK_PWR_BAR
+DC_IN_SS
1 2
1 2
PR224 0_0402_5%@ PR224 0_0402_5%@
1 2
PR217 47_0805_5%~DPR217 47_0805_5%~D
SOFT_START_GC<44>
PR221 0_0402_5%@ PR221 0_0402_5%@
DC_BLOCK_GC<52>
1 2
PR227 0_0402_5%@ PR227 0_0402_5%@
1 2
PR228 0_0402_5%@ PR228 0_0402_5%@
+DC_IN
PR219 100K_0402_5%PR219 100K_0402_5%
+3.3V_ALW2
ACAV_DOCK_SRC#< 38>
B B
A A
+SDC_IN
ACAV_IN<22,40,52>
+3.3V_ALW2
PU11
PU11
1
2
3
4
5
6
7
8
9
37
DK_CSS_GC<52>
DK_PWR_BAR
3301_DC_IN_SS
DC_IN
SS_GC
ERC1
ACAVDK_SRC
GND
SDC_IN
DC_BLK_GC
ACAV_IN
P33ALW2
TP
CSS_GC<52>
12
PC194
PC194
0.047U_0402_25V7K
0.047U_0402_25V7K
34
35
36
NC
CHARGERVR_DCIN
CSS_GC10DK_CSS_GC11ERC312ERC213GND14PWR_SRC
ERC3
PC195
PC195
0.1U_0402_25V6
0.1U_0402_25V6
@
@
30NC31
33
32
GND
DC_IN_SS
DK_PWRBAR
BLK_MOSFET_GC
BLKNG_MOSFET_GC
SS_DCBLK_GC
16
15
ERC2
12
STSTART_DCBLOCK_GC
3301_PWRSRC
PR213
@ PR213
@
0_0402_5%
0_0402_5%
1 2
DSCHRG_MOSFET_GC
28
29
PBatt+
27
P50ALW
26
PBATT_OFF
DK_AC_OFF_EN
DSCHRG_MOSFET_GC
DK_AC_OFF_EN
SL_BAT_PRES#
EN_DK_PWRBAR17P33ALW
18
EN_DK_PWRBAR
25
24
ACAV_IN_NB
23
GND
22
21
20
19
NBDK_DCINSS
S IC CD3301ARHHR QFN 36P CON TROL LOGIC
S IC CD3301ARHHR QFN 36P CON TROL LOGIC
P33ALW
1 2
PR231 0_0402_5%@ PR231 0_0402_5%@
1 2
PR233 0_0402_5%@ PR233 0_0402_5%@
1 2
PR235 0_0402_5%@ PR235 0_0402_5%@
P50ALW
CD_PBATT_OFF
DK_AC_OFF
3301_ACAV_IN_NB
DK_AC_OFF_ENCD3301_SDC_IN
SL_BAT_PRES#
+3.3V_ALW
@
@
1 2
PR218 0_0402_5%@ PR218 0_0402_5%@
1 2
PR220 0_0402_5%@ PR220 0_0402_5%@
1 2
PR222
@PR222
@
0_0402_5%
0_0402_5%
BLKNG_MOSFET_GC
1 2
PR229 0_0402_5%@ PR229 0_0402_5%@
1 2
PR230 0_0402_5%@ PR230 0_0402_5%@
EN_DOCK_PWR_BAR <39>
1 2
1M_0402_5%~D
1M_0402_5%~D
PR234
PR234
+PWR_SRC
+5V_ALW
SLICE_BAT_ON <39>
DOCK_AC_OFF <38,39>
1 2
PR225 0_0402_5%@ PR225 0_0402_5%@
1 2
PR226 0_0402_5%@ PR226 0_0402_5%@
SLICE_BAT_PRES# <38,39>
+NBDOCK_DC_IN_SS
GPIO Input from NB
Embedded Controller
ACAV_IN_NB <39,40,52>
DOCK_AC_OFF_EC <39>
1 2
1M_0402_5%~D
1M_0402_5%~D
PR223
PR223
12
PR215
@ PR215
@
0_0402_5%
0_0402_5%
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Selector
Selector
Selector
LA-7902P
LA-7902P
LA-7902P
1
53 61Wednesday, March 07, 2012
53 61Wednesday, March 07, 2012
53 61Wednesday, March 07, 2012
1.0
1.0
1.0
Page 54
+VCC_CORE
5
4
3
2
1
D D
1
PC1153
PC1153
10U_080 5_4VAM~D
10U_080 5_4VAM~D
2
1
PC1170
PC1170
10U_080 5_4VAM~D
10U_080 5_4VAM~D
2
1
PC1163
PC1163
10U_080 5_4VAM~D
10U_080 5_4VAM~D
2
1
PC1171
PC1171
10U_080 5_4VAM~D
10U_080 5_4VAM~D
2
1
PC1164
PC1164
10U_080 5_4VAM~D
10U_080 5_4VAM~D
2
1
PC1108
PC1108
10U_080 5_4VAM~D
10U_080 5_4VAM~D
2
1
PC1168
PC1168
10U_080 5_4VAM~D
10U_080 5_4VAM~D
2
1
PC1109
PC1109
10U_080 5_4VAM~D
10U_080 5_4VAM~D
2
+VCC_CORE
1
PC1119
PC1119
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
C C
1
PC1143
PC1143
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1102
PC1102
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1120
PC1120
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1144
PC1144
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1103
PC1103
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1121
PC1121
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1145
PC1145
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1104
PC1104
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1122
PC1122
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1146
PC1146
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1105
PC1105
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1169
PC1169
10U_080 5_4VAM~D
10U_080 5_4VAM~D
2
1
PC1110
PC1110
10U_080 5_4VAM~D
10U_080 5_4VAM~D
2
1
PC1123
PC1123
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1101
PC1101
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1106
PC1106
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
+VCC_GFXCORE
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1111
PC1111
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1135
PC1135
1
2
330U 2V M D2 LESR6M
330U 2V M D2 LESR6M
1
PC1157
PC1157
+
+
2
22U_0805_6.3V6M
PC1112
PC1112
1
1
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1136
PC1136
1
1
2
2
330U 2V M D2 LESR6M
330U 2V M D2 LESR6M
1
PC1158
PC1158
+
+
2
@
@
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1114
PC1114
PC1113
PC1113
1
2
@
@
PC1137
PC1137
1
2
12
PC1115
PC1115
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
@
@
PC1138
PC1138
PC1139
PC1139
1
2
12
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
PC1500
PC1500
PC1501
PC1501
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1116
PC1116
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1140
PC1140
1
2
12
.1U_0402_16V7K
.1U_0402_16V7K
PC1502
PC1502
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1117
PC1117
PC1118
1
2
1
2
12
PC1118
1
2
+1.05V_R UN_VTT
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
PC1124
PC1124
PC1125
PC1125
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1141
PC1141
2
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
2
1
2
PC1127
PC1127
PC1126
PC1126
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
@
@
@
@
PC1148
PC1148
PC1147
PC1147
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
PC1128
PC1128
2
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
@
@
PC1149
PC1149
2
2
+1.05V_RUN_VTT
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
PC1129
PC1129
PC1130
PC1130
2
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
@
@
PC1151
PC1151
PC1150
PC1150
2
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
PC1131
PC1131
22U_0805_6.3VAM
22U_0805_6.3VAM
@
@
PC1152
PC1152
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
PC1132
PC1132
PC1134
PC1134
2
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
PC1154
PC1154
2
12
330U 2V M D2 LESR6M
330U 2V M D2 LESR6M
330U 2V M D2 LESR6M
330U 2V M D2 LESR6M
1
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
PC1503
PC1503
PC1504
PC1504
1
+
+
2
PC1166
PC1166
PC1165
PC1165
+
+
2
1
PC1107
PC1107
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
B B
+VCC_CORE
1
+
+
2
PC1176
PC1176
330U 2V M D2 LESR6M
330U 2V M D2 LESR6M
1
+
+
PC1174
PC1174
330U 2V M D2 LESR6M
330U 2V M D2 LESR6M
2 3
1
+
+
2
PC1177
PC1177
330U 2V M D2 LESR6M
330U 2V M D2 LESR6M
1
+
PC1175
@+PC1175
@
470U_D2 _2VM_R4.5M
470U_D2 _2VM_R4.5M
2 3
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
LA-7902P
LA-7902P
LA-7902P
54 61Wednesd ay, March 07, 20 12
54 61Wednesd ay, March 07, 20 12
54 61Wednesd ay, March 07, 20 12
1
1.0
1.0
1.0
1
+
+
PC1187
PC1187
330U 2V M D2 LESR6M
330U 2V M D2 LESR6M
2 3
12
PC1400
PC1400
A A
12
12
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
PC1401
PC1401
12
.1U_0402_16V7K
.1U_0402_16V7K
PC1402
PC1402
5
1
+
PC1173
@+PC1173
@
470U_D2 _2VM_R4.5M
470U_D2 _2VM_R4.5M
2 3
12
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
PC1404
PC1404
PC1403
PC1403
Page 55
5
Request
Request
Item
Item Issue Description
ItemItem
Page# Title
Page#Page#
Title
TitleTitle
Date
DateDate
RequestRequest
Owner
Owner
OwnerOwner
4
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Issue DescriptionDate
Issue DescriptionIssue Description
3
Page 1
Page 1
Page 1Page 1
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
1 44 Power 8/18 ME design change. PJPDC1 change from 7pin to 5pin X01
D D
2
3
4
5 53 8/18 Dell
C C
7 54 8/31 Compal Reserve cap for improve transient response. Reserve PC1176 X01
45 Main and 2nd IC common setting. De-pop PD100,PR113,PR111
45
46
51
Power
Power
Power
Power
Power
Power
8/18
8/18
8/18
548 Power 8/31 Compal Change to green P/N.
48 Power 9/1 Dell For support TL+TM9 X01
4910 Power 9/1 Compal For fix 1.05V_RUN_VTT on 1.05V X01
B B
45
52
Power11
Compal
Compal
Prevent Jitter issue.Compal
Prevent output voltage glitch when power up.Compal
Change net name PBATT to SLICE_BAT_ON.
Compal8/30 Pop PL100, PL1300 X01For reduce EMI radiation.
Add PC120,PC121,PC215 parallel with
PR101,PR102,PR207
PU700 VCCP and VDD change form +5V_RUN
to +5V_ALW
Change net name same as E4.
Add PR90, PR91
Change PQ4, PC1153, PC1163, PC1164, PC1168,
PC1169, PC1170, PC1171, PC1108, PC1109, PC1110,
PC1187, PC1173, PC1174, PC1175, PC1157, PC1158
PQ1310, PQ1306, PC719 to green P/N
Change 6@ to pop for PC400~PC406, PC408, PL400,
PQ400, PQ405, PR400~PR407,
PU400. 5@ to @ for PR408.
Depop PR509, PR511, PQ502.
Change PR507 to 4.99k.
X01
X01
X01
X01
X016 50 8/18 Compal Reserve 0 ohm resistance for test.
X01
Power12 51 9/5 Compal For reduce EMI radiation. Change PL700 to SM01000DJ00 X01
13
45
46
Power 9/6 Compal Change to green P/N.
Change PC107, PC263, PC280, PC405,
PC505 to HF P/N.
X01
52 Power 9/13 Compal For reduce EMI radiation. Pop PC1400~1404, PC1500~PC1504. X0114
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_PIR 1
PWR_PIR 1
PWR_PIR 1
LA-7902P
LA-7902P
LA-7902P
55 61W ednesday, March 07, 2012
55 61W ednesday, March 07, 2012
55 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 56
5
Request Owner
Request Owner
Item Issue
ItemItem
Page# Title
Page#Page#
TitleItem
TitleTitle
Date
Date
DateDate
Request OwnerRequest Owner
51 Power 9/14 Compal For Vcore OCP setting15 X01
D D
4
Issue
IssueIssue
Description
Description
DescriptionDescription
3
2
Solution
Solution
SolutionSolution
Description
Description
DescriptionDescription
1
Rev.
Rev.Page#
Rev.Rev.
Change PC740 to 10nF,
PR750 to 365 ohm.
51 Power 9/14 Compal For AXG OCP setting16 X01
Change PR702 to 2.61kohm,
PR711 to365ohm.
17 51 Power 9/14 Compal For Vender proposal Change PC704 to 390pF,
X01
PC705 to 68pF,PC720 to 22pF,
PC722 to 390pF,PC723 to 33pF,
PR741 to 130kohm,PR703 to 130kohm,
PC744 to 3300pF,PR754 to 649ohm.
18 52 Power 11/17 Compal Shortage issue Change PQ1303 from NTGD416 to AP2623 X02
19 52 Power 11/17 Compal Need ESD protected Change PQ1306,PQ1310 from SB57002040L
C C
to SB000009Q80
X02
20 53 Power 11/17 Compal IC version upgrade Change PU11 from CD3301 to CD3301A X02
21 45 Power 11/17 Compal Shortage issue Change PC110, PC111 from SGA00004E00
X02
to SGA00002N80
22 44 Power 11/21 Compal HW requirement for S3 power consumption PWR_SRC_S control signal change from
X02
+3.3V_ALW to PCH_ALW_ON
23 52 53 Power 12/04 Compal
EMI requirement add PC1343 PC1344 PC1345 PC1346 PC1347
X02
(0.1U_0402_25V6)
EMI requirement5224 Compal12/04Power add PC1302 (0.1U_0402_25V6)
X02
PC1317 (220P_0402_50V7K~D)
25 52 12/04 Compal Prevent COS.Power change PD1301 from SCS00003M0L
B B
to SCS00004O0L
X02
PD8 from SCS00004L0L to SCS00005C00
26 54 Power 12/13 Compal Prevent COS. change PC1174 PC1176 PC1177 PC1187
PC1158 PC1157 PC1165 PC1166
X02
to SGA00002U1L
27 50 Power 12/13 Compal Improve efficiency change PR86 to 22K_0402_5%
28 47 Power 12/16 Compal change PL301 to SH00000MW00
Prevent COS.
X02
X02
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_PIR 2
PWR_PIR 2
PWR_PIR 2
LA-7902P
LA-7902P
LA-7902P
56 61W ednesday, March 07, 2012
56 61W ednesday, March 07, 2012
56 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 57
5
Request
Request
Item Issue Description
ItemItem
Page# Title
Page#Page#
TitleItem
TitleTitle
Date
DateDate
RequestRequest
Owner
Owner
OwnerOwner
4
Issue DescriptionDate
Issue DescriptionIssue Description
3
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
1 11 HW 08/15/2011 COMPAL INTEL review feedback Add CC178,CC179,CC149,CC150 X01
Rev.Page#
Rev.Rev.
2 32 HW 08/15/2011 COMPAL Finger Print connector changed Change JBIO1 to pitch 1.0mm
D D
HW 08/15/2011 COMPAL37 Sniffer Switch location changed Change JSF1 to SF13
SMSC request to delete LPC_LDRQ0# Leave LDRQ0# no connection on both of 5048 and PCH side COMPAL08/15/2011HW4
X01
X01
X0114,39
Removed R743
5 22 HW 08/15/2011 COMPAL Removed reserve circuit for EMC4022 X01Removed R405,C280,R392,R394
6 42 HW 08/15/2011 COMPAL Load SW sources output rising time
mismatch and COS. cost concern
7
8
1,29
29
HW
HW
08/15/2011
08/15/2011
COMPAL
COMPAL
Codec is change to 92HD93
Reserve co-lay with ALC290
Change back to E3 +3.3V/5V_RUN discrete solution
Removed U78 and add Q55,Q61 circuit
Pop R162~R166 and de-pop U73,R1540
add R1641 connect the codec pin48 to U73 pin1
Pop option for 92HD93/ALC290=>R1646/C1164; R1644/R1643;
X01
X01
X01
C965/R1642; Q107/R171
Reserve for ALC290 only: C1204, C1205, R1647, C1165, R1648
C C
Reserve for 92HD93 only: R1645, C963
Add R174 depop and R175 pop
Vgs less than cut-in voltage in battery mode Add control circuit QH6,R279,CH107 for +5V_ALW_PCH X01COMPAL08/15/2011HW9 20,42
COMPAL08/15/2011HW10 27,28
11 11 HW 08/15/2011 COMPAL Follow INTEL PDDG 0.8 De-pop RC140
14 HW 08/15/2011 COMPAL CRT SW 2nd source TI, TS3V713 pin29 is VDD Connect U18 pin29 to +3.3V_RUN23
15 HW 08/15/2011 COMPAL +1.05V_M turn off before APWROK de-assert Add UH5,CH108 6@ circuit reserve for VPRO
Vgs of 5V MOS maybe large than max rating
Change board ID to X01 Change R875 to 130KohmsCOMPAL08/15/2011HW4012
PCH GPIO52 need 8.2~10K pull up +3.3VS Change R695 from 100K to 10KohmsCOMPAL08/15/2011HW3413
Add R517, R518
X01
X01
X01
X01
X01
X0116
16 HW 08/15/2011 COMPAL Reset IC threshold voltage issue Change U4 to RT9801A (threshold adjustable)
B B
X0141
Add R1649~R1654;Reserve R1655 and pop R1623
17 HW 08/15/2011 COMPAL DPX_CA_DET voltage too low through dongle Change U21 and U24 to SA000055G0L 26
18 HW 08/15/2011 COMPAL Request from INTEL review feedback Pop RH332 for PCH_GPIO3 and RH180 for GPIO27
X01
X0117,18
19 42 HW 08/15/2011 COMPAL Material changed Power team request Q59 change to SB00000L80L X01
White light LED brightness is abnormal Change R934, R938, R939, R949, R958, R957 and R959
X01COMPAL08/15/2011HW4320
to 2.2 Kohms
21 HW 08/15/2011 COMPAL40 Reserve C1208 for ESD backup planReserve C1208 for ESD backup plan X01
S3 can't resume issue Control 1.5V_VDDQ by EC. Pop RC79 and de-pop RC82 X01COMPAL08/15/2011HW22 11
23 15 HW 08/15/2011 COMPAL Fine tune CLK EA Changed RH311,RH314 to 10 ohm X01
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HW_PIR 1
HW_PIR 1
HW_PIR 1
LA-7902P
LA-7902P
LA-7902P
57 61W ednesday, March 07, 2012
57 61W ednesday, March 07, 2012
57 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 58
5
Item Issue Description
ItemItem
Page# Title
Page#Page#
TitleItem
TitleTitle
Date
DateDate
Request
Request
RequestRequest
Owner
Owner
OwnerOwner
4
Issue DescriptionDate
Issue DescriptionIssue Description
3
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
1
Rev.Page#
Rev.Rev.
24 17,18 HW 08/16/2011 COMPAL INTEL review feedback
25 HW 08/16/2011 COMPAL
D D
26
28 HW
29 HW X01
30
34
1,14 08/16/2011 ROM size changed Change U52 to 8M and R936,R895,R897,R900 to 6@
11 08/17/2011 Material package changed Change CC161~CC166 from 0402 to 0603
HW COMPAL
HW27
COMPAL
42 08/17/2011 COMPAL BOM changed Change Q60 to 6@
31 08/17/2011 COMPAL Correct Lan power net name Change LL1,LL4,LL6~LL8 pin 2 net from +3.3V* to +1.2V*
39 08/19/2011 COMPAL GPIO signal name changed same as E/P Change PBATT_OFF to SLICE_BAT_ON X01
HW
WWAN card request JMINI1 pin 1 connect to PCIE_WAKE#
Change RH331,RH272 to 10K ohm X01
X01
X01
X01
X01
31 34 HW 08/19/2011 COMPAL Material package changed Changed C615,C1176 X01
32 37 HW 08/26/2011 COMPAL Change audio connector pin definition. Change JAUD1 pin15 to NC X01
C C
Remove reserve co-lay with ALC290 circuitCOMPAL33 29 HW 08/29/2011
Remove below circuit:
Pop option for 92HD93/ALC290=>R1646/C1164;
X01
R1644/R1643; C965/R1642; Q107/R171
Reserve for ALC290 only: C1204, C1205, R1647, C1165, R1648
Reserve for 92HD93 only: R1645, C963
Add R174 depop and R175 pop
White light LED brightness is abnormalCOMPAL08/29/2011HW4334
Change R934, R938, R939, R949, R958, R957 and R959
to 1.2 Kohms
X01
X01Due to EMI HDMI test Fail, add EMI solutionCOMPAL08/30/2011HW2535 Change resistor to Inductor
Change R451, R459, R462, R466, R468, R469, R470, R471
to (Inductor CIS symbol is not ready)
Add C1209, C1210, C1211, C1212, C1213, C1214, C1215
and C1216 between Inductor and HDMI connector
37 HW 08/30/2011 COMPAL
B B
08/31/2011HW24 X01COMPAL37
HW 08/31/2011 X0125 COMPAL38
Follow CONN List_0824
Change JAUD1 to ACES_51522-02001-001
Follow CONN List_0824
Change JLVDS1 to STARC_111H40-100000-G4-R
For EMI solution de-pop L19~L22 and
pop 0ohm resistors(need change to Inductor)
Change JAUD1 to ACES_51522-02001-001
and swap pin because pin1 definition different
Change JLVDS1 to STARC_111H40-100000-G4-R
de-pop L19~L22 and pop R451, R459, R462, R466, R468,
R469, R470, R471(need change to Inductor)
X0136
Change RL23 to 1.2k for IEEE EA08/31/2011HW X01COMPAL3039 Change RL23 to 1.2k for IEEE EA
HW 08/31/2011 Change 3.3V_LAN control signal
X0140 30 COMPAL Change RL46 to pop & RL47 to @
pop option for TM/TL
14,16,19,22
41 HW Change pop option for TM/TL
30,40,42
42 HW
37 09/05/2011 COMPAL Add JAG1 2 pin connector. X01
09/02/2011 COMPAL
Reserved 2 GNDA pins for Audio
performance issue.
43 14,15 HW Change Cap value for Crystal EA09/06/2011 COMPAL
25 Change 0ohm (R451, R459, R462, R466, R468, R469,
A A
For EMI solution change resistor to InductorCOMPAL09/06/2011HW X0144
Change 6@ to pop; 5@ to @
Change R871 pop, R877 depop
Change CH2, CH3 from 15pF to 18pF
Change CH18, CH19 from 12pF to 10pF
R470, R471) to 9nH (L99,L100,L101,L102,L103,L104,
L105,L106)
X01
X01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HW_PIR 2
HW_PIR 2
HW_PIR 2
LA-7902P
LA-7902P
LA-7902P
58 61W ednesday, March 07, 2012
58 61W ednesday, March 07, 2012
58 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 59
5
Request Owner
Request Owner
Item Issue
ItemItem
D D
Page# Title
Page#Page#
15,30,
45
40
37 HW 09/07/2011 COMPAL46
47 X01
07 HW 09/07/2011 COMPAL PCH_PLTRST#_R & VCCPWRGOOD_0_R add 2 CAP
TitleItem
TitleTitle
Date
Date
DateDate
Request OwnerRequest Owner
4
Issue
IssueIssue
Description
Description
DescriptionDescription
3
2
Solution
Solution
SolutionSolution
Description
Description
DescriptionDescription
Add QH8, RL48~RL51HW 09/06/2011 COMPAL Reserved TM LAN SMBus X01
Change USB common choke from Audio/B to M/B Add L107 & R1656,R1657 X01
Add CC141 & CC142
1
Rev.
Rev.Page#
Rev.Rev.
to GND for ESD.
48 24 HW 09/08/2011 COMPAL DMIC0 & DMIC_CLK0 add 100pF CAP
Reserve C1217 & C1218
X01
close to JLVDS
49 36 HW 09/08/2011 COMPAL Change USB3.0 CAP to 0.1uF Change C412,C413,C414,C415 to 0.1uF
X01
50 29
51 07 HW 09/09/2011 COMPAL
52 COMPAL Swap JBIO1 pin define X0132 Swap JBIO1 pin define
53
C C
54
29 HW
42
HW 09/09/2011
09/13/2011 COMPAL
HW 09/13/2011 COMPAL X01Change Q55,Q61 part for open soldering
Change RC25 value for ESD X01Change RC25 from 0ohm to 1kohm
IDT suggest exchange location
R169~R172 & C973~C976.
Change L91~L94 part number to 0ohm
R169~R172 & C973~C976.
Change L91~L94 part number to 0ohm
Change Q55,Q61 from DMN3030LSS-13 to AO4478L
X01HW 09/08/2011 COMPAL Change AGND to DGND CAP to pop Change C982,C985,C986,C987 to pop
X01IDT suggest exchange location
issue.
15 HW 09/13/2011 X01COMPAL CLK_SMART_48M reserve 10pF CAP to GND for RF Reserve CE18 to GND55
56 15,30 HW 09/13/2011 COMPAL Change LAN SMBus pop option. Change QH8,RL50,RL51 to pop & RL48,RL49 to de-pop X01
57
58
29 Follow EMI recommandCOMPAL09/15/2011HW
19 Change LH1 from bead to Inductor for CRTCOMPAL09/15/2011HW
Change L91~L94 to 2A bead
Change LH1 to 1uH Inductor(SHI00007W0L)
X01
X01
40 Change C741,C743 to 33pF (PT Memo)HW 11/28/2011 COMPAL Crystal EA result, change CAP value.59 X02
B B
39 HW 11/28/2011 COMPAL
EXPRESS card insert in 15" vPro can't
power on issue
Change R760 to 20k ohm (PT Memo)60 X02
COMPAL11/28/2011HW40 Change R875 to 62KohmsChange board ID to X0261 X02
De-pop R1627 (PT Memo)COMPAL11/28/2011HW42 Rated Vgs of Q61 is 25V62 X02
Re-link ECE 5048 symbolCOMPAL11/28/2011HW39 SMSC change 5048 pin A23 to GPIOI063 X02
Reserve R1658 and R1659 100Kohms to GND for I2S disabledCOMPAL11/28/2011HW40 SMSC review feedback64 X02
COMPAL11/28/2011HW41 Change reset IC to RT9818A-44GU365 X02
Update U4 symbol and add R1629 for backup of inrush
prevention.
Change RSMRST# pull up with 100Koms. Pop R1655 and de-pop
R1623.Delete R1649~R1654
66
67
A A
COMPAL11/28/2011HW39
When suspend/resume cycles, wireless SW
GPIO IRQs keeps giving
Depop HDD control power circuit for
cost down.
Add R771 pulling up to +3.3V_ALW for WIRELESS_ON#/OFF
and de-pop R766
Depop R1624,Q28,R500,R499,R517,C393COMPAL11/28/2011HW27
X02
X02
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HW_PIR 3
HW_PIR 3
HW_PIR 3
LA-7902P
LA-7902P
LA-7902P
59 61W ednesday, March 07, 2012
59 61W ednesday, March 07, 2012
59 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
Page 60
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request Owner
Request Owner
Item
Item Issue
ItemItem
D D
Page# Title
Page#Page#
Title
TitleTitle
Date
Date
DateDate
Request OwnerRequest Owner
4
Issue
IssueIssue
Description
Description
DescriptionDescription
3
2
Solution
Solution
SolutionSolution
Description
Description
DescriptionDescription
1
Rev.
Rev.Page#
Rev.Rev.
X0268 Change YL1 to 3G025000FA1H, CL5,CL6 to 12pF. (PT Memo)HW 11/28/2011 Crystal EA result 30 COMPAL
HW 11/28/2011 Change MOSFET to wihtout Schottky Diode 11,42 COMPAL
+3.3V_RUN Giltch when AC pluginCOMPAL11/28/2011HW32
COMPAL11/28/2011HW
C C
75 Change C412~C415 P/N to SE076104K8LChange P/N for HFCOMPAL X0211/28/2011HW36
76 Change 0 ohm to R-shortFor cost savingCOMPAL X0211/28/2011HW
77 12/01/2011 X02COMPAL Remove 2pin connector for Audio performance Remove JAG1 2 pin connector.HW37
78 12/01/2011 X02COMPAL Add 10pF CAP to GND for RF request SIO_14M add CE19(10pF) to GNDHW15
79 12/01/2011 X02COMPAL Reserve 0.1uF CAP to GND for ESD request PCH_PLTRST#_EC & EXPCLK_REQ# reserve 0.1uF CAP(CE14,CE20) to GNDHW35
B B
80 12/02/2011 X02COMPAL Reserve 0.1uF CAP to GND for ESD request EXPRESS_DET# reserve 0.1uF CAP(CE22) to GNDHW35
81 X0212/05/2011 COMPAL37 HW
82 X0212/07/2011 COMPAL17,38 HW EMI solution for E-Docking USB port
83 X0212/07/2011 COMPAL24,32,37 HW
84 X0212/09/2011 COMPAL22 HW Thermal requests to change OTP from 88 to 92 Change R406 from 953ohm to 1.24Kohm
Change RC value at Gate of MOS Load SW to
modify power rail soft start timing
Follow CONN List_1130A
Change JAUD1 to ACES_51522-0200N-P01
Change USB9,12,13 CMC to 180ohm
for EMI request
Reserve D87, R1663 (pull high to +3.3V_RUN_TPM)
and add R1662 for HW solution backup
RC72 from 100K to 330K; RC143 form 330K to 1M; CC136 form 0.1u to 0.022u
R412 from 100K to 470K; R1632 form 1M to 4.7M; C293 form 0.1u to 0.022u
R507 from 100K to 470K; R517 form 1M to 4.7M; C400 form 0.1u to 0.022u
R722 from 100K to 470K; R1625 form 1M to 4.7M; C644 form 4700p to 220p
R729 from 100K to 470K; R1628 form 1M to 4.7M; C650 form 4700p to 220p
R917 from 100K to 470K; R1617 form 1M to 4.7M; C770 form 4700p to 220p
R920 from 100K to 470K; R1610 form 470K to 2.2M; C771 form 4700p to 470p
R930 from 100K to 330K; R1611 form 470K to 1M; C773 form 2200p to 100p
R906 from 100K to 470K; C763 form 2200p to 220p
R912 from 100K to 470K; C766 form 470p to 220p
Change JAUD1 to ACES_51522-0200N-P01
and swap pin because pin1 definition different
Swap USB Port7 and Port8 and reserve a choke(L108) at E-Docking side:
Port7 from NA to E-docking ; Port8 from E-Docking to NA
Change L10,L52,L107 to SM070002X00(OCF2012181YZF)
X0269 Change QC3 and Q59 to AO4304L_SO8
X0270 De-pop R725, remove R695 and add +3.3V_RUN pull high at PCH side(RH361)S3 had leakage in +3/5V_RUNCOMPAL11/28/2011HW34
X0271 U39(TPM) is changed to SA00004WQ10(AT97SC3204-X2A18-AB) for WIN8 supportTPM is changed to AT97SC3204-X2A18-ABCOMPAL11/28/2011HW32
X0272
X0273 Change UH4 to SA00005AG1L(HM77 for non vpro)Change PCH to C1 versionCOMPAL11/28/2011HW14~21
X0274
85 X0212/09/2011 COMPAL41 HW To prevent inrush current at reset IC input Change R1629 from 0ohms to 33ohm resistor
Change R448,R449,R450,R452,R453,R454,R455,R456 from 680ohm to 604ohm;
C1209~C1216 from 4.7pF to 3.9pF
87 42 HW 12/15/2011 COMPAL +3.3V_SUS sequence timing R911 from 100K to 470K; R1618 from 1M to 4.7M; C767 from 4700p to 220p X02
A A
88 43 HW 12/15/2011 COMPAL Change current limit resistors of LED X02
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
R934 from 1.2K to 910, R957 from 1.2K to 820, R951 from 330 to 200,
R938 from 1.2K to 1.5K, R958 from 1.2K to 1K, R953 from 330 to 300
and R939 from 1.2K to 1.8K
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HW_PIR 4
HW_PIR 4
HW_PIR 4
LA-7902P
LA-7902P
LA-7902P
1
X0212/13/201186 Change HDMI R,C value for EMI requestCOMPALHW25
1.0
1.0
60 61W ednesday, March 07, 2012
60 61W ednesday, March 07, 2012
60 61W ednesday, March 07, 2012
1.0
Page 61
5
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )
Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )
Request
Request
Item
Item Issue Description
ItemItem
D D
89
91
93
Page# Title
Page#Page#
3390
4092
Title
TitleTitle
HW A00Change R676 from 33 ohm to 10 ohm
HW A00Change U51 P/N to SA00003TZ2L
Date
DateDate
Request Request
Owner
Owner
OwnerOwner
COMPAL02/10/2012HW38
COMPAL02/10/2012
COMPAL02/24/2012
4
Issue DescriptionDate
Issue DescriptionIssue Description
Dalmore14 UMA hang on white screen issue
when attached AC+media battery after hot
dock.
Change SD CLK damping resistor for EMI
request
SMSC creates a new catalog part number and
IC marking for the MEC5055
3
2
Solution Description
Solution Description Rev.
Solution DescriptionSolution Description
Change R755 from 100k ohm to 10k ohm
Change R958 from 1K to 1.3K (ST Memo)Change current limit resistors of LEDCOMPAL02/24/2012HW43
Change R875 to 33K ohmChange board ID to A00COMPAL02/24/2012HW40
1
Rev.Page#
Rev.Rev.
A00
A00
A00
3294
95 25 SMT request to change F2 footprintHW 03/02/2012 COMPAL A00
96
C C
97
B B
14 HW 03/02/2012 COMPAL De-pop resistor on PCH JTAG for power saving De-pop RH288, RH47, RH48 and RH49
HW A00Change C550,C551,C552,C553,R659,R660,R1662,RH311 BOM option to 5@
HW 03/02/2012 COMPAL Change PCH chip P/N for X-build14~21,30 UH4 is changed to SA00005AG3L(wait confirm with PJE)
Change BOM option for TPM/TCM funtionCOMPAL02/24/2012
For DFX conern of F2 2nd source, SP040003H0L, change F2 footprint to
F_MF-MSMF050-2
A00
A00
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HW_PIR 5
HW_PIR 5
HW_PIR 5
LA-7902P
LA-7902P
LA-7902P
61 61W ednesday, March 07, 2012
61 61W ednesday, March 07, 2012
61 61W ednesday, March 07, 2012
1
1.0
1.0
1.0
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