Compal LA-7852P Schematics

A

B

C

D

E

MODEL NAME :

PCB NO :

QBL00

QC:LA-7851P, DAA00003200 DC:LA-7852P, DAA00003300

BOM P/N :

1 1

TBD

Dell/Compal Confidential

GV+Hyn M 1G R1

UV4

H5GQ2H24MFR-T2C_BGA 170P~D

GVHM@

UV5

H5GQ2H24MFR-T2C_BGA 170P~D

GVHM@

UV6

H5GQ2H24MFR-T2C_BGA 170P~D

GVHM@

UV7

Phantom(Chief River)

Ivy Bridge(BGA1224) + Panther Point

Schematic Document

DISCRETE VGA N13P-GS(optimus)

H5GQ2H24MFR-T2C_BGA 170P~D

2 2

GVHM@

GV+SAM C 1G R1

UV4

K4G20325FC-HC04_FBGA170P~D

GVSC@

UV5

K4G20325FC-HC04_FBGA170P~D

GVSC@

UV6

K4G20325FC-HC04_FBGA170P~D

GVSC@

UV7

3 3

K4G20325FC-HC04_FBGA170P~D

GVSC@

GV+SAM D 1G R1

UV7

K4G20325FC-HC04_FBGA170P~D

GVSD@

UV4

K4G20325FC-HC04_FBGA170P~D

GVSD@

UV5

K4G20325FC-HC04_FBGA170P~D

GVSD@

UV6

4 4

K4G20325FC-HC04_FBGA170P~D

GVSD@

GS+SAM D 2G R1 GS+Hyn M 2G R1

UV4

K4G20325FC-HC04_FBGA170P~D

GSSD@

UV5

K4G20325FC-HC04_FBGA170P~D

GSSD@

UV6

K4G20325FC-HC04_FBGA170P~D

GSSD@

UV7

K4G20325FC-HC04_FBGA170P~D

GSSD@

UV8

K4G20325FC-HC04_FBGA170P~D

GSSD@

UV9

K4G20325FC-HC04_FBGA170P~D

GSSD@

UV10

K4G20325FC-HC04_FBGA170P~D

GSSD@

UV11

K4G20325FC-HC04_FBGA170P~D

GSSD@

UV4

H5GQ2H24MFR-T2C_BGA 170P~D

GSHM@

UV5

H5GQ2H24MFR-T2C_BGA 170P~D

GSHM@

UV6

H5GQ2H24MFR-T2C_BGA 170P~D

GSHM@

UV7

H5GQ2H24MFR-T2C_BGA 170P~D

GSHM@

UV8

H5GQ2H24MFR-T2C_BGA 170P~D

GSHM@

UV9

H5GQ2H24MFR-T2C_BGA 170P~D

GSHM@

UV10

H5GQ2H24MFR-T2C_BGA 170P~D

GSHM@

UV11

H5GQ2H24MFR-T2C_BGA 170P~D

GSHM@

2011-08-02

Rev: 0.1 (X00)

@ : Nopop Component CONN@ : Connector Component DP1.2@ : DP output from DGPU DP1.1A@ : DP output from iGPU GV@ : GPU N13-GV GS@ : GPU N13-GS GVH@ :GV+Hynix VRAM GVS@ : GV+Samsung VRAM GSH@ : GS+Hynix VRAM GSS@ : GS+Samsung VRAM GVHA@ : GV+Hynix VRAM A-die GVHM@ : GV+Hynix VRAM M-die GVSC@ : GV+Samsung VRAM C-die GVSD@ : GV+Samsung VRAM D-die SB@ : Sandy bridge CPU TPM@ : With TPM

GS+SAM D 2G R3

UV8

K4G20325FC-HC04_FBGA170P~D

GSSDR3@

UV9

K4G20325FC-HC04_FBGA170P~D

GSSDR3@

UV10

K4G20325FC-HC04_FBGA170P~D

GSSDR3@

UV11

K4G20325FC-HC04_FBGA170P~D

GSSDR3@

GS+HYN M 2G R3

UV8

K4G20325FC-HC04_FBGA170P~D

GSHMR3@

UV9

K4G20325FC-HC04_FBGA170P~D

GSHMR3@

UV10

K4G20325FC-HC04_FBGA170P~D

GSHMR3@

UV11

K4G20325FC-HC04_FBGA170P~D

GSHMR3@

UV4

K4G20325FC-HC04_FBGA170P~D

GSSDR3@

UV7

K4G20325FC-HC04_FBGA170P~D

GSSDR3@

UV5

K4G20325FC-HC04_FBGA170P~D

GSSDR3@

UV6

K4G20325FC-HC04_FBGA170P~D

GSSDR3@

UV4

K4G20325FC-HC04_FBGA170P~D

GSHMR3@

UV7

K4G20325FC-HC04_FBGA170P~D

GSHMR3@

UV6

K4G20325FC-HC04_FBGA170P~D

GSHMR3@

UV5

K4G20325FC-HC04_FBGA170P~D

GSHMR3@

GV+Hyn M 1G R3

UV6

H5GQ2H24MFR-T2C_BGA 170P~D

GVHMR3@

UV4

H5GQ2H24MFR-T2C_BGA 170P~D

GVHMR3@

UV5

H5GQ2H24MFR-T2C_BGA 170P~D

GVHMR3@

UV7

H5GQ2H24MFR-T2C_BGA 170P~D

GVHMR3@

GV+SAM C 1G R3

UV7

K4G20325FC-HC04_FBGA170P~D

GVSCR3@

UV4

K4G20325FC-HC04_FBGA170P~D

GVSCR3@

UV5

K4G20325FC-HC04_FBGA170P~D

GVSCR3@

UV6

K4G20325FC-HC04_FBGA170P~D

GVSCR3@

GV+SAM D 1G R3

UV7

K4G20325FC-HC04_FBGA170P~D

GVSDR3@

UV4

K4G20325FC-HC04_FBGA170P~D

GVSDR3@

UV5

K4G20325FC-HC04_FBGA170P~D

GVSDR3@

UV6

K4G20325FC-HC04_FBGA170P~D

GVSDR3@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/08/25 2011/08/25

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Cover Page

LA-7851P

E

1 65Monday, March 26, 2012

0.1

A

B

C

D

E

FFS

ZZZ

R1@

1 1

PCB-MB

ZZZ

R3@

PCB-MB

2 2

QT

Mini DP Conn.

LVDS Conn.

HDMI Conn.

Port 4

P.31~32

128M*16 x4 =1G

VRAM * 4 GDDR5

reserve for N13P-GS

P.37

P.35

P.36

PCIE Re-driver SN65LVPE501RGER

P.40

3 3

Card Reader

RTS5209

9 in 1

Socket

Daughter board

RTC CKT.

Power On/Off CKT.

4 4

DC/DC Interface CKT.

P.16

P.39

P.33~34

128M*16 x4 =1G

VRAM * 4 GDDR5

GPU N13P-GV / N13P-GS

64bit

Port 3

Mini Card-1 WLAN / BT4.0

Half

USB2.0

Port 4

P.42

Discrete TPM AT97SC3204

64bit

GB4-128

P.24~28

0 ohm

DisplayPort

P.40

P.29~30

PCI-E x1

LAN(GbE)

RTL8111F

RJ45

SPI ROM

PEG 3.0 x16

DisplayPort

0 ohm

LVDS

HDMI

Port 1

P.41

P.16

Intel

Ivy Bridge Processor

35W QC

35W DC

100MHz 100MHz

2.7GT/s

BGA 1224

BGA 1023

Intel

Panther Point

PCH HM77

BGA 989 Balls

SPI

Int.KBD

P.39

LPC Bus

33MHz

ENE KBC KB9012

PS/2

Touch Pad

P.39

P.38

Memory Bus (DDR3)

1.5V DDR3 1333 MHz

P.5~13

DMI x4FDI x8

5GB/s

SATA3.0

USB 3.0

USB2.0

HD Audio

P16~23

Dual Channel

Port 1,3

Port 0,2

Port 0

Port 1

Port 2

Port 1

Port 12

Port 4

Fan Control

P.43

DDRIII-DIMM X2

BANK 0, 1, 2, 3, 4 ,5 ,6 ,7

SATA3 Re-Driver PS8520

Mini Card-2 (mSATA)

( Full )

SATA ODD Conn.

USB 3.0 Conn. X2

PI5USB1457

Digital Camera

Mini Card-1 (WLAN)

( Half )

Audio Codec ALC3260

AMP TI 3113

Int. Speaker x2

P.39

8GB Max

P.46

P.47

CPU XDP Conn.

page 14,15

P.43

P.42

P.43

P.44

P.45

P.35

P.42

P.6

SATA HDD Conn.

P.43

Daughter board

USB 3.0 Conn. X1

( USB Charger )

P.45

Daughter board

Digi Mic x2

Headphone Jack

Headphone / Mic. Jack

( Combo )

www.schematic-x.blogspot.com

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

A

B

C

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

D

Compal Electronics,Inc.

Title

Size Document Number Rev

2 66Monday, March 26, 2012

Date: Sheet of

E

2 66Monday, March 26, 2012

0.1C

A

B

C

D

E

Compal Confidential

Project Code : QBL00 File Name : LA-7851P

1 1

LA-7851P M/B

JCCD

JLVDS

2 2

JHDD

JTB1

JODD

JBLEDJLED

JTB2

26 pin

2 pin

12 pin

40 pin

24 pin

26 pin

Wire

FFC

Camera

LCD Panel

HDD

Touch Pad

3 3

FFC12 pin

JP1

LS-7854P

ODD/B

FFC4 pin

JLED

LS-7853P LS-7852P

LED/B BATT LED/B

JP1

FFC8 pin

Hot BarHot BarHot BarHot Bar

Led x 5Led x 2

Wire

JIO1JP2

LS-7851P

Audio/B

FFC

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

E

0.1

3 66Monday, March 26, 2012

0.1

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7

100K +/- 5%Ra

Rb V min

0 0 V

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5%

100K +/- 5% 200K +/- 5%

NC

AD_BID

0.168 V

0.375 V 0.503 V

0.634 V

0.958 V

1.372 V

1.851 V 2.200 V

2.433 V

V typ

AD_BID

0 V 0.155 V

0.250 V

0.819 V

1.185 V

1.650 V

3.300 V

V

AD_BID

0.362 V

0.621 V

0.945 V

1.359 V

1.838 V

2.420 V

3.300 V

max

EC AD3

0x00-0x0C 0x0D-0x1C 0x1D-0x30 0x31-0x49 0x4A-0x69 0x6A-0x8E 0x8F-0xBB 0xBC-0xFF

A

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

PCB Revision

0.1

0.2

0.3

0.4

1.0

PCH

USB PORT#

0

1

2

3

4

5

DESTINATION

USB Conn 1

USB Conn 3 (Power share)

USB Conn 2

None

JMINI1 (WLAN)

None

PCI EXPRESS

Lane 1

Lane 2

Lane 3

Lane 4

Lane 5

Lane 6

Lane 7

1 1

DESTINATION

10/100/1G LAN

None

MINI CARD-1 WLAN

CARD READER

None

SATA

SATA0

SATA1

SATA2

SATA3

SATA4

SATA5

DESTINATION

HDD

SSD

ODD

None None

None

CLKOUT

PCI0

PCI1

PCI2

PCI3

PCI4

None

DESTINATION

PCH_LOOPBACK

EC LPC

None

6

7

8

9

10

11

12

13

None

CAMERA

None

Lane 8 None

CLK

CLKOUT_PCIE0

CLKOUT_PCIE1

CLKOUT_PCIE2

CLKOUT_PCIE3

CLKOUT_PCIE4

CLKOUT_PCIE5

CLKOUT_PCIE6

DESTINATIONDIFFERENTIAL

10/100/1G LAN

None

MINI CARD-1 WLAN

CARD READER

None

FLEX CLOCKS DESTINATION

CLKOUTFLEX0None

CLKOUTFLEX1

CLKOUTFLEX2

CLKOUTFLEX3

CLK_PCI_TPM

None

LAN_25M

None

USB3

1

2

3

4

Symbol Note :

: means Digital Ground

DESTINATION

USB Conn 1

USB Conn 3 (Power share)

USB Conn 2

None

CLKOUT_PCIE7 None

CLKOUT_PEG_B

None

: means Analog Ground

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Notes List

LA-7851P

4 66Monday, March 26, 2012

0.1

5

4

3

2

1

+3VS

SMBUS Address [0x9a]

D D

H14

C9

SMBCLK

SMBDATA

PCH

A8

A7

2.2K

SML0CLK

SML0DATA

+3V_PCH

EC_SMB_CK1

EC_SMB_DA1

C8

G12

E14M16

SML1CLK

C C

SML1DATA

KBC

B B

2.2K

+3V_PCH

+3VALW_EC

+3VS

DMN66D0

2.2K

+3VS_WLAN

2.2K

100 ohm

30

32

100 ohm

+3VS_WLAN

9

8

4

5

SMBUS Address [TBD]WLAN

CHARGER

BATTERY CONN

SMBUS Address [TBD]

202

200

202

200

4

5

4

6

51

53

DIMMA

DIMMB

G Sensor

XDP

TP

SMBUS Address [A0]

SMBUS Address [TBD]

+3VS

2.2K

+3VS

DMN66D0

2.2K

10

ALS

9

+3V_GPU

2.2K

Issued Date

2.2K

D9

D8

2011/08/25 2012/07/15

3

SMBUS Address [0x9E]

GPU

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

SMBus Block Diagram

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

5 66Monday, March 26, 2012

1

0.1

+3VS

B8

PCH_SMLCLK

A6

PCH_SMLDATA

A A

5

2.2K

4

+3V_GPU

DMN66D0

Security Classification

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

5

4

3

2

1

XDP CONN

+VCCP +VCCP

JXDP

D D

C C

The resistor for HOOK2 shoul d be placed such tha t the stub is very sm all on CFG0 net

XDP_PREQ#(8) XDP_PRDY#(8)

XDP_BPM#0(8) XDP_BPM#1(8)

XDP_BPM#2(8) XDP_BPM#3(8)

CFG10(10) CFG11(10)

XDP_BPM#4(8) XDP_BPM#5(8)

XDP_BPM#6(8) XDP_BPM#7(8)

H_CPUPWRGD(8,20)

PBTN_OUT#(18,38)

CFG0(10)

VGATE(18,38,59)

PCH_SMBDATA(14,15,17,39,43)

PCH_SMBCLK(14,15,17,39,43)

XDP_TCK(8)

+3VS

XDP_TCK

RU36 1K_0402_5%@RU36 1K_0402_5%@

RU13 0_0402_5%~D@RU13 0_0402_5%~D@ RU14 0_0402_5%~D@RU14 0_0402_5%~D@

RU7 1K_0402_5%~D@RU7 1K_0402_5%~D@ RU8 0_0402_5%~D@RU8 0_0402_5%~D@

RU9 1K_0402_5%~D@RU9 1K_0402_5%~D@ RU10 0_0402_5%~D@RU10 0_0402_5%~D@

1 2

1 2 1 2

T32 PAD@ T32 PAD@

XDP_PREQ# XDP_PRDY#

XDP_BPM#0 XDP_BPM#1

XDP_BPM#2 XDP_BPM#3

CFG10_R CFG11_R

XDP_BPM#4 XDP_BPM#5

XDP_BPM#6 XDP_BPM#7

H_CPUPWRGD_XDP CFD_PWRBTN#_X DP

CFG0_R SYS_PWROK_XDP

SYS_PWROK_XDP

JXDP

2

112

4

334

6

556

8

778

10

9910

12

111112

14

131314

16

151516

18

171718

20

191920

22

212122

24

232324

26

252526

28

272728

30

292930

32

313132

34

333334

36

353536

38

373738

40

393940

42

414142

44

434344

46

454546

48

474748

50

494950

52

515152

54

535354

56

555556

58

575758

60

595960

SAMTE_BSH-030-01-L-D-A-TR

CONN@

CLK_CPU_ITP CLK_CPU_ITP#

XDP_RST#_R XDP_DBRESET#

XDP_TDO XDP_TRST# XDP_TDI XDP_TMS

Place near JXDP

+VCCP

1

@CU33

@

0.1U_0402_25V6K~D

2

CLK_CPU_ITP (17)

1 2

CLK_CPU_ITP# (17)

XDP_DBRESET# (8,18)

XDP_TDO (8) XDP_TRST# (8) XDP_TDI (8) XDP_TMS (8)

RU12 1K_0402_5%~D@RU12 1K_0402_5%~D@

CU33

1

CU34

@CU34

@

0.1U_0402_25V6K~D

2

PLT_RST# (8,19,38,40,41,42)

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

1

0.1

6 66Monday, March 26, 2012

0.1

5

D D

UU1

E0@

AV8063801130703 QC02 E0 2.1G

UU1

QCR1@

S IC AV8063801130704 SR0MR E1 2.1G BGA 1224

UU1

QCR3@

C C

B B

QCR3@

S IC AV8063801130704 SR0MR E1 2.1G BGA 1224 A31 !

ST

DMI_CRX_PTX_N0(18) DMI_CRX_PTX_N1(18) DMI_CRX_PTX_N2(18) DMI_CRX_PTX_N3(18)

DMI_CRX_PTX_P0(18) DMI_CRX_PTX_P1(18)

QT

eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms

DMI_CRX_PTX_P2(18) DMI_CRX_PTX_P3(18)

DMI_CTX_PRX_N0(18) DMI_CTX_PRX_N1(18) DMI_CTX_PRX_N2(18) DMI_CTX_PRX_N3(18)

DMI_CTX_PRX_P0(18) DMI_CTX_PRX_P1(18) DMI_CTX_PRX_P2(18) DMI_CTX_PRX_P3(18)

FDI_CTX_PRX_N0(18) FDI_CTX_PRX_N1(18) FDI_CTX_PRX_N2(18) FDI_CTX_PRX_N3(18) FDI_CTX_PRX_N4(18) FDI_CTX_PRX_N5(18) FDI_CTX_PRX_N6(18) FDI_CTX_PRX_N7(18)

FDI_CTX_PRX_P0(18) FDI_CTX_PRX_P1(18) FDI_CTX_PRX_P2(18) FDI_CTX_PRX_P3(18) FDI_CTX_PRX_P4(18) FDI_CTX_PRX_P5(18) FDI_CTX_PRX_P6(18) FDI_CTX_PRX_P7(18)

FDI_FSYNC0(18) FDI_FSYNC1(18)

FDI_INT(18)

FDI_LSYNC0(18) FDI_LSYNC1(18)

+VCCP

RU2 24.9_0402_1%RU2 24.9_0402_1%

1 2

4

EDP_COMP

UU1A

N10

DMI_RX#[0]

R10

DMI_RX#[1]

R8

DMI_RX#[2]

U10

DMI_RX#[3]

N8

DMI_RX[0]

T9

DMI_RX[1]

R6

DMI_RX[2]

U8

DMI_RX[3]

N4

DMI_TX#[0]

R4

DMI_TX#[1]

P1

DMI_TX#[2]

U6

DMI_TX#[3]

N2

DMI_TX[0]

R2

DMI_TX[1]

P3

DMI_TX[2]

T5

DMI_TX[3]

V7

FDI0_TX#[0]

W8

FDI0_TX#[1]

AA8

FDI0_TX#[2]

AC10

FDI0_TX#[3]

U4

FDI1_TX#[0]

W2

FDI1_TX#[1]

V1

FDI1_TX#[2]

Y5

FDI1_TX#[3]

W6

FDI0_TX[0]

W10

FDI0_TX[1]

Y9

FDI0_TX[2]

AA10

FDI0_TX[3]

U2

FDI1_TX[0]

W4

FDI1_TX[1]

V3

FDI1_TX[2]

AA6

FDI1_TX[3]

AC8

FDI0_FSYNC

AA2

FDI1_FSYNC

AD9

FDI_INT

AB7

FDI0_LSYNC

AB3

FDI1_LSYNC

AC2

eDP_COMPIO

AB1

eDP_ICOMPO

AE8

eDP_HPD#

AE4

eDP_AUX

AE2

eDP_AUX#

AG4

eDP_TX[0]

AF3

eDP_TX[1]

AF7

eDP_TX[2]

AG8

eDP_TX[3]

AG2

eDP_TX#[0]

AF1

eDP_TX#[1]

AE6

eDP_TX#[2]

AG6

eDP_TX#[3]

AV8063801108003_BGA1224~D

E1@

3

PEG_COMP

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

G2 H1 F3

PEG_GTX_C_HRX_N15

F23

PEG_GTX_C_HRX_N14

H23

PEG_GTX_C_HRX_N13

H21

PEG_GTX_C_HRX_N12

H19

PEG_GTX_C_HRX_N11

J20

PEG_GTX_C_HRX_N10

G18

PEG_GTX_C_HRX_N9

K17

PEG_GTX_C_HRX_N8

F15

PEG_GTX_C_HRX_N7

H15

PEG_GTX_C_HRX_N6

H13

PEG_GTX_C_HRX_N5

H11

PEG_GTX_C_HRX_N4

J12

PEG_GTX_C_HRX_N3

E8

PEG_GTX_C_HRX_N2

G10

PEG_GTX_C_HRX_N1

J8

PEG_GTX_C_HRX_N0

F7

PEG_GTX_C_HRX_P15

G22

PEG_GTX_C_HRX_P14

K23

PEG_GTX_C_HRX_P13

K21

PEG_GTX_C_HRX_P12

F19

PEG_GTX_C_HRX_P11

K19

PEG_GTX_C_HRX_P10

H17

PEG_GTX_C_HRX_P9

K15

PEG_GTX_C_HRX_P8

G14

PEG_GTX_C_HRX_P7

J16

PEG_GTX_C_HRX_P6

K13

PEG_GTX_C_HRX_P5

F11

PEG_GTX_C_HRX_P4

K11

PEG_GTX_C_HRX_P3

F9

PEG_GTX_C_HRX_P2

H9

PEG_GTX_C_HRX_P1

H7

PEG_GTX_C_HRX_P0

G6

PEG_HTX_GRX_N15 PEG_HTX_C_GRX_N15

A22

PEG_HTX_GRX_N14 PEG_HTX_C_GRX_N14

B23

PEG_HTX_GRX_N13 PEG_HTX_C_GRX_N13

C18

PEG_HTX_GRX_N12 PEG_HTX_C_GRX_N12

D21

PEG_HTX_GRX_N11 PEG_HTX_C_GRX_N11

B19

PEG_HTX_GRX_N10 PEG_HTX_C_GRX_N10

E20

PEG_HTX_GRX_N9 PEG_HTX_C_GRX_N9

A14

PEG_HTX_GRX_N8 PEG_HTX_C_GRX_N8

D17

PEG_HTX_GRX_N7 PEG_HTX_C_GRX_N7

B15

PEG_HTX_GRX_N6 PEG_HTX_C_GRX_N6

E16

PEG_HTX_GRX_N5 PEG_HTX_C_GRX_N5

D13

PEG_HTX_GRX_N4 PEG_HTX_C_GRX_N4

A10

PEG_HTX_GRX_N3 PEG_HTX_C_GRX_N3

B11

PEG_HTX_GRX_N2 PEG_HTX_C_GRX_N2

D9

PEG_HTX_GRX_N1 PEG_HTX_C_GRX_N1

B7

PEG_HTX_GRX_N0 PEG_HTX_C_GRX_N0

E12

PEG_HTX_GRX_P15 PEG_HTX_C_GRX_P15

C22

PEG_HTX_GRX_P14 PEG_HTX_C_GRX_P14

D23

PEG_HTX_GRX_P13 PEG_HTX_C_GRX_P13

A18

PEG_HTX_GRX_P12 PEG_HTX_C_GRX_P12

B21

PEG_HTX_GRX_P11 PEG_HTX_C_GRX_P11

D19

PEG_HTX_GRX_P10 PEG_HTX_C_GRX_P10

F21

PEG_HTX_GRX_P9 PEG_HTX_C_GRX_P9

C14

PEG_HTX_GRX_P8 PEG_HTX_C_GRX_P8

B17

PEG_HTX_GRX_P7 PEG_HTX_C_GRX_P7

D15

PEG_HTX_GRX_P6 PEG_HTX_C_GRX_P6

F17

PEG_HTX_GRX_P5 PEG_HTX_C_GRX_P5

B13

PEG_HTX_GRX_P4 PEG_HTX_C_GRX_P4

C10

PEG_HTX_GRX_P3 PEG_HTX_C_GRX_P3

D11

PEG_HTX_GRX_P2 PEG_HTX_C_GRX_P2

B9

PEG_HTX_GRX_P1 PEG_HTX_C_GRX_P1

D7

PEG_HTX_GRX_P0 PEG_HTX_C_GRX_P0

F13

Typ- suggest 220nF. The change in AC capacitor value from 100nF to 220nF is to enable compatibility with future platforms having PCIE Gen3 (8GT/s)

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

DMI Intel(R) FDI DP

PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PCI EXPRESS -- GRAPHICS

RU1 24.9_0402_1%RU1 24.9_0402_1%

1 2

CU1 0.22U_0402_16V7K~DCU1 0.22U_0402_16V7K~D

1 2

CU2 0.22U_0402_16V7K~DCU2 0.22U_0402_16V7K~D

1 2

CU3 0.22U_0402_16V7K~DCU3 0.22U_0402_16V7K~D

1 2

CU4 0.22U_0402_16V7K~DCU4 0.22U_0402_16V7K~D

1 2

CU5 0.22U_0402_16V7K~DCU5 0.22U_0402_16V7K~D

1 2

CU6 0.22U_0402_16V7K~DCU6 0.22U_0402_16V7K~D

1 2

CU7 0.22U_0402_16V7K~DCU7 0.22U_0402_16V7K~D

1 2

CU8 0.22U_0402_16V7K~DCU8 0.22U_0402_16V7K~D

1 2

CU9 0.22U_0402_16V7K~DCU9 0.22U_0402_16V7K~D

1 2

CU10 0.22U_0402_16V7K~DCU10 0.22U_0402_16V7K~D

1 2

CU11 0.22U_0402_16V7K~DCU11 0.22U_0402_16V7K~D

1 2

CU12 0.22U_0402_16V7K~DCU12 0.22U_0402_16V7K~D

1 2

CU13 0.22U_0402_16V7K~DCU13 0.22U_0402_16V7K~D

1 2

CU14 0.22U_0402_16V7K~DCU14 0.22U_0402_16V7K~D

1 2

CU15 0.22U_0402_16V7K~DCU15 0.22U_0402_16V7K~D

1 2

CU16 0.22U_0402_16V7K~DCU16 0.22U_0402_16V7K~D

1 2

CU17 0.22U_0402_16V7K~DCU17 0.22U_0402_16V7K~D

1 2

CU18 0.22U_0402_16V7K~DCU18 0.22U_0402_16V7K~D

1 2

CU19 0.22U_0402_16V7K~DCU19 0.22U_0402_16V7K~D

1 2

CU20 0.22U_0402_16V7K~DCU20 0.22U_0402_16V7K~D

1 2

CU21 0.22U_0402_16V7K~DCU21 0.22U_0402_16V7K~D

1 2

CU22 0.22U_0402_16V7K~DCU22 0.22U_0402_16V7K~D

1 2

CU23 0.22U_0402_16V7K~DCU23 0.22U_0402_16V7K~D

1 2

CU24 0.22U_0402_16V7K~DCU24 0.22U_0402_16V7K~D

1 2

CU25 0.22U_0402_16V7K~DCU25 0.22U_0402_16V7K~D

1 2

CU26 0.22U_0402_16V7K~DCU26 0.22U_0402_16V7K~D

1 2

CU27 0.22U_0402_16V7K~DCU27 0.22U_0402_16V7K~D

1 2

CU28 0.22U_0402_16V7K~DCU28 0.22U_0402_16V7K~D

1 2

CU29 0.22U_0402_16V7K~DCU29 0.22U_0402_16V7K~D

1 2

CU30 0.22U_0402_16V7K~DCU30 0.22U_0402_16V7K~D

1 2

CU31 0.22U_0402_16V7K~DCU31 0.22U_0402_16V7K~D

1 2

CU32 0.22U_0402_16V7K~DCU32 0.22U_0402_16V7K~D

1 2

+VCCP

2

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 mohms PEG_ICOMPO signals should be routed with max length = 500 mils

- typical impedance = 14.5 mohms

PEG_GTX_C_HRX_N[0..15]

PEG_GTX_C_HRX_P[0..15]

PEG_HTX_C_GRX_N[0..15]

PEG_HTX_C_GRX_P[0..15]

1

PEG_GTX_C_HRX_N[0..15] (24)

PEG_GTX_C_HRX_P[0..15] (24)

PEG_HTX_C_GRX_N[0..15] (24)

PEG_HTX_C_GRX_P[0..15] (24)

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(1/7) DMI,FDI,PEG

of

7 66Monday, March 26, 2012

1

7 66Monday, March 26, 2012

0.1

5

4

3

2

1

This pin is for compability with future platforms. A pull up resistor to VCCIO is required if connected to the DF_TVS strap on the PCH.

H_SNB_IVB#(20)

PROC_DETECT (Processor Detect): pulled to ground on the processor package. There is no connection to the processor silicon for this

D D

Processor Pullups

+VCCP

RU30 62_0402_5%RU30 62_0402_5%

1 2

place RU32,RU30 near CPU

C C

RU33 10K_0402_5%~DRU33 10K_0402_5%~D

1 2

signal. System board designers may use this signal to determine if the processor is present

H_PECI(20,38)

H_PROCHOT#(38,53)

H_PROCHOT#

H_CPUPWRGD

H_THERMTRIP#(20)

H_PM_SYNC(18)

H_CPUPWRGD(6,20)

H_PROCHOT#

RU43 130_0402_5%RU43 130_0402_5%

ST

RU34 0_0402_5%~D

1 2

S3 circuit:- DRAM_RST# to memory should be high during S3

RU116 0_0402_5%~D@ RU116 0_0402_5%~D@

1 2

D

S

D

S

DDR3_DRAMRST#_RH_DRAMRST#

RU74

4.99K_0402_1%~D

12

G

PT

13

QU3

2

BSS138-G_SOT23-3

RU26 10K_0402_5%~D@RU26 10K_0402_5%~D@

1 2

T1 PAD@ T1 PAD@

ST

RU31 0_0402_5%~D

SHORT

RU31 0_0402_5%~D

SHORT

1 2

RU32 56_0402_5%RU32 56_0402_5%

1 2

SHORT

1 2

PM_SYS_PWRGD_BUF_RPM_SYS_PWRGD_BUF

+1.5V

12

RU72

RU72 1K_0402_5%~D

1K_0402_5%~D

RU73 1K_0402_5%~DRU73 1K_0402_5%~D

1 2

H_CATERR#

H_PECI_ISO

H_PROCHOT#_R

H_THERMTRIP#_R

H_PM_SYNC

H_CPUPWRGD

BUF_CPU_RST#

UU1B

AH9

PROC_SELECT#

B59

PROC_DETECT#

H53

CATERR#

F53

PECI

H51

PROCHOT#

F51

THERMTRIP#

K53

PM_SYNC

C60

UNCOREPWRGOOD

AY25

SM_DRAMPWR OK

K51

RESET#

AV8063801108003_BGA1224~D

DDR3_DRAMRST# (14,15)

CLK_CPU_DMI

D5

MISC THERMAL PWR MANAGEMENT

CLOCKS

DDR3

MISC

DDR3

MISC

JTAG & BPM

BCLK

BCLK#

DPLL_REF_CLK

DPLL_REF_CLK#

BCLK_ITP

BCLK_ITP#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PRDY#

PREQ#

TMS

TRST#

TDO

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TCK

TDI

CLK_CPU_DMI#

C6

DPLL_REF_CLK

AJ4

DPLL_REF_CLK#

AJ2

K63 K65

H_DRAMRST#

BE24

SM_RCOMP0

BJ46

SM_RCOMP1

BG46

SM_RCOMP2

BF45

XDP_PRDY#

J62

XDP_PREQ#

H65

XDP_TCK

J58

XDP_TMS

H59

XDP_TRST#

H63

XDP_TDI_R

K61

XDP_TDO_R

K59

XDP_DBRESET#_R

H61

XDP_BPM#0_R

C62

XDP_BPM#1_R

D61

XDP_BPM#2_R

E62

XDP_BPM#3_R

F63

XDP_BPM#4_R

D59

XDP_BPM#5_R

F61

XDP_BPM#6_R

F59

XDP_BPM#7_R

G60

XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7

RU38 0_0402_5%~D@RU38 0_0402_5%~D@ RU39 0_0402_5%~D@RU39 0_0402_5%~D@

RU41 0_0402_5%~D@RU41 0_0402_5%~D@

RU3 0_0402_5%~D@RU3 0_0402_5%~D@ RU4 0_0402_5%~D@RU4 0_0402_5%~D@ RU5 0_0402_5%~D@RU5 0_0402_5%~D@ RU6 0_0402_5%~D@RU6 0_0402_5%~D@ RU49 0_0402_5%~D@RU49 0_0402_5%~D@ RU51 0_0402_5%~D@RU51 0_0402_5%~D@ RU53 0_0402_5%~D@RU53 0_0402_5%~D@ RU56 0_0402_5%~D@RU56 0_0402_5%~D@

RU11 0_0402_5%~D@RU11 0_0402_5%~D@ RU15 0_0402_5%~D@RU15 0_0402_5%~D@ RU16 0_0402_5%~D@RU16 0_0402_5%~D@ RU17 0_0402_5%~D@RU17 0_0402_5%~D@

XDP_PRDY# (6) XDP_PREQ# (6)

XDP_TCK (6) XDP_TMS (6) XDP_TRST# (6)

1 2 1 2

1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2 1 2 1 2 1 2

CLK_CPU_DMI (17) CLK_CPU_DMI# (17)

CLK_RES_ITP (17) CLK_RES_ITP# (17)

XDP_DBRESET#

XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7

CFG12 (10) CFG13 (10) CFG14 (10) CFG15 (10)

DPLL_REF_CLK#

DPLL_REF_CLK

If motherboard only supports external graphics or if it supports Processor Graphics but without eDP

XDP_DBRESET#

XDP_TDI (6) XDP_TDO (6)

XDP_DBRESET# (6,18)

XDP_BPM#0 (6) XDP_BPM#1 (6) XDP_BPM#2 (6) XDP_BPM#3 (6) XDP_BPM#4 (6) XDP_BPM#5 (6) XDP_BPM#6 (6) XDP_BPM#7 (6)

RU24 1K_0402_5%~DRU24 1K_0402_5%~D

1 2

RU23 1K_0402_5%~DRU23 1K_0402_5%~D

1 2

RU35 1K_0402_5%~DRU35 1K_0402_5%~D

1 2

+VCCP

+3VS

B B

DRAMRST_CNTRL_PC H(14,17)

SM_DRAMPWROK

CPU1.5V_S3_GATE(12,38,57)

PM_DRAM_PWR GD(18)

A A

SSI2

+3V_PCH

RU76 200_0402_5%RU76 200_0402_5%

1 2

ST

RU75 0_0402_5%~D

RU62

0_0402_5%~D

SHORT

1 2

5

SHORT

1 2

ST

DRAMRST_CNTRL

SSI2

+3V_PCH

UU3

5

74AHC1G09GW_TSSOP5

1

P

B

O

2

A

G

3

RU71 0_0402_5%~D@RU71 0_0402_5%~D@

1 2

RUN_ON_CPU1.5VS3#(12,34)

1

CU39

0.047U_0402_16V7K

2

1

CU37

0.1U_0402_25V6K~D

2

PM_SYS_PWRGD_BUF

4

PT

+1.5V_CPU_VDDQ

12

RU60

RU60 200_0402_5%

200_0402_5%

12

RU64

@RU64

@

39_0402_5%

13

D

2

G

S

QU2

@

QU2

@

2N7002_SOT23-3~D

4

Buffered reset to CPU

PLT_RST#(6,19,38,40,41,42)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PLT_RST#

3

+3VS +VCCP

1

CU35

0.1U_0402_25V6K~D

2

5

UU2

1

P

NC

4

Y

2

A

G

PT

3

SN74LVC1G07DCKR_SC70-5

2011/08/25 2012/07/25

12

RU42

RU42 75_0402_5%

75_0402_5%

RU48 43_0402_1%RU48 43_0402_1%

Compal Secret Data

Deciphered Date

1 2

12

2

BUF_CPU_RST#

RU55

@RU55

@

0_0402_5%~D

DDR3 Compensation Signals

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

RU58 140_0402_1%RU58 140_0402_1%

1 2

RU59 25.5_0402_1%RU59 25.5_0402_1%

1 2

RU61 200_0402_1%RU61 200_0402_1%

1 2

PU/PD for JTAG signals

XDP_PREQ#

XDP_TMS

XDP_TDI_RBUFO_CPU_RST#

XDP_TDO_R

XDP_TCK

XDP_TRST#

Compal Electronics, Inc.

Title

PROCESSOR(2/7) PM,XDP,CLK

Size Document Number Rev

Custom

Date: Sheet of

RU69 51_0402_5%@ RU69 51_0402_5%@

1 2

RU63 51_0402_5%RU63 51_0402_5%

1 2

RU65 51_0402_5%RU65 51_0402_5%

1 2

RU66 51_0402_5%RU66 51_0402_5%

1 2

RU67 51_0402_5%RU67 51_0402_5%

1 2

RU68 51_0402_5%RU68 51_0402_5%

1 2

1

+VCCP

8 66Monday, March 26, 2012

0.1

5

UU1C

DDR_A_D[0..63](14)

D D

C C

DDR_A_BS0(14)

B B

DDR_A_BS1(14) DDR_A_BS2(14)

DDR_A_CAS#(14) DDR_A_RAS#(14) DDR_A_WE#(14)

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

UU1C

AL6

SA_DQ[0]

AL8

SA_DQ[1]

AP7

SA_DQ[2]

AM5

SA_DQ[3]

AK7

SA_DQ[4]

AL10

SA_DQ[5]

AN10

SA_DQ[6]

AM9

SA_DQ[7]

AR10

SA_DQ[8]

AR8

SA_DQ[9]

AV7

SA_DQ[10]

AY5

SA_DQ[11]

AT5

SA_DQ[12]

AR6

SA_DQ[13]

AW6

SA_DQ[14]

AT9

SA_DQ[15]

BA6

SA_DQ[16]

BA8

SA_DQ[17]

BG6

SA_DQ[18]

AY9

SA_DQ[19]

AW8

SA_DQ[20]

BB7

SA_DQ[21]

BC8

SA_DQ[22]

BE4

SA_DQ[23]

AW12

SA_DQ[24]

AV11

SA_DQ[25]

BB11

SA_DQ[26]

BA12

SA_DQ[27]

BE8

SA_DQ[28]

BA10

SA_DQ[29]

BD11

SA_DQ[30]

BE12

SA_DQ[31]

BB49

SA_DQ[32]

AY49

SA_DQ[33]

BE52

SA_DQ[34]

BD51

SA_DQ[35]

BD49

SA_DQ[36]

BE48

SA_DQ[37]

BA52

SA_DQ[38]

AY51

SA_DQ[39]

BC54

SA_DQ[40]

AY53

SA_DQ[41]

AW54

SA_DQ[42]

AY55

SA_DQ[43]

BD53

SA_DQ[44]

BB53

SA_DQ[45]

BE56

SA_DQ[46]

BA56

SA_DQ[47]

BD57

SA_DQ[48]

BF61

SA_DQ[49]

BA60

SA_DQ[50]

BB61

SA_DQ[51]

BE60

SA_DQ[52]

BD63

SA_DQ[53]

BB59

SA_DQ[54]

BC58

SA_DQ[55]

AW58

SA_DQ[56]

AY59

SA_DQ[57]

AL60

SA_DQ[58]

AP61

SA_DQ[59]

AW60

SA_DQ[60]

AY57

SA_DQ[61]

AN60

SA_DQ[62]

AR60

SA_DQ[63]

BA36

SA_BS[0]

BC38

SA_BS[1]

BB19

SA_BS[2]

BE44

SA_CAS#

BE36

SA_RAS#

BA44

SA_WE#

AV8063801108003_BGA1224~D

SA_DIMM_VREFDQ

DDR SYSTEM MEMORY A

SA_CK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CK[1]

SA_CLK#[1]

SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

4

BB31 BA32 BC18

AW34 AY33 BD17

BD41 BD45

BB41 BC46

BF3

AN8 AU6 BC6 BD9 BC50 BB55 BD59 AU60

AN6 AU8 BD5 BC10 BB51 BD55 BD61 AV61

BD27 BA28 BB27 AW26 BB23 BA24 AY21 BD21 BC22 BB21 AW38 AW22 BA20 BB45 BE20 AW18

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

M_CLK_DDR0 (14) M_CLK_DDR#0 (14) DDR_CKE0_DIMMA (14)

M_CLK_DDR1 (14) M_CLK_DDR#1 (14) DDR_CKE1_DIMMA (14)

DDR_CS0_DIMMA# (14) DDR_CS1_DIMMA# (14)

M_ODT0 (14) M_ODT1 (14)

+V_DDR_REFA_R (14)

DDR_A_DQS#[0..7] (14)

DDR_A_DQS[0..7] (14)

DDR_A_MA[0..15] (14)

M3

3

DDR_B_D[0..63](15)

DDR_B_BS0(15) DDR_B_BS1(15) DDR_B_BS2(15)

DDR_B_CAS#(15) DDR_B_RAS#(15) DDR_B_WE#(15)

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

BF11

BJ10

BH11 BG10

BJ14 BG14 BF17

BJ18 BF13 BH13 BH17 BG18 BH49 BF47 BH53 BG50 BF49 BH47 BF53

BJ50 BF55 BH55

BJ58 BH59

BJ54 BG54 BG58 BF59 BA64 BC62 AU62

AW64

BA62 BC64 AU64

AW62

AR64 AT65

AL64

AM65

AR62 AT63

AL62

AM63

BJ38 BD37 AY29

BH39 BG38 BF39

AK3 AP3 AR2 AL2 AK1 AP1 AR4 AV3 AU4 BA4 BB1 AV1 AU2 BA2 BB3 BC2 BF7

BC4 BH7

AL4

2

UU1D

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

AV8063801108003_BGA1224~D

SB_CLK#[0]

SB_CKE[0]

SB_CLK#[1]

SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_OIMM_VREFDQ

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6]

DDR SYSTEM MEMORY B

SB_DQS[7]

SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

SB_CK[0]

SB_CK[1]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9]

BF33 BH33 BD25

BF37 BH37 BJ26

BE40 BH41

BG42 BH45

BG4

AN4 AW2 BH9 BF15 BF51 BH57 AY63 AN62

AN2 AW4 BF9 BH15 BH51 BF57 AY65 AN64

BF31 BH31 BB37 BC34 BF27 BB33 BH27 BG30 BH29 BF29 AY37 BJ30 AW30 BA40 BB29 BE28

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

1

M_CLK_DDR2 (15) M_CLK_DDR#2 (15) DDR_CKE2_DIMMB (15)

M_CLK_DDR3 (15) M_CLK_DDR#3 (15) DDR_CKE3_DIMMB (15)

DDR_CS2_DIMMB# (15) DDR_CS3_DIMMB# (15)

M_ODT2 (15) M_ODT3 (15)

+V_DDR_REFB_R (14)

DDR_B_DQS#[0..7] (15)

DDR_B_DQS[0..7] (15)

DDR_B_MA[0..15] (15)

M3

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(3/7) DDRIII

1

0.1

9 66Monday, March 26, 2012

0.1

5

4

3

2

1

CFG Straps for Processor

CFG2

UU1E

D D

C C

B B

CFG0(6)

CFG10(6) CFG11(6) CFG12(8) CFG13(8) CFG14(8) CFG15(8)

T17 PAD@T17 PAD@

T18 PAD@T18 PAD@

T24 PAD@T24 PAD@ T25 PAD@T25 PAD@

T26 PAD@T26 PAD@ T27 PAD@T27 PAD@

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17

BB17 AY17 BD29 BD33 BC30

BE32

AW42

BA48 BC42

AW46

BG26 BB25 BG34 BH35

BJ34 BF35 BF41 BH43 BJ42 BF43

AW50

BB57 BF63

BD19

AY45 AY41 BG62 BB43

AJ10

D57 B55 A54 A58 D55 C56 E54

G56 F55 K55 F57 E58 H57 H55 D53 K57

AD5 AH5 AJ6

D49 B53

G52 G64

BE6 AA4 AC4 AC6 C52

C24 D25 B25 K47 H47

B57

CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7]

J54

CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17]

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20

RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27

RSVD30

RSVD31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36

RSVD38 RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44 RSVD45

D3

RSVD46

C4

RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52

VCC_VAL_SENSE

VSS_VAL_SENSE

VAXG_VAL_SENSE

VSSAXG_VAL_SENSE

VCC_DIE_SENSE

RESERVED

DC_TEST_A4 DC_TEST_A62 DC_TEST_A64

DC_TEST_B3 DC_TEST_B63 DC_TEST_B65 DC_TEST_BF1

DC_TEST_BF65

DC_TEST_BG2

DC_TEST_BG64

DC_TEST_BH1 DC_TEST_BH3

DC_TEST_BH63 DC_TEST_BH65

DC_TEST_BJ2

DC_TEST_BJ4 DC_TEST_BJ62 DC_TEST_BJ64

DC_TEST_C2

DC_TEST_C64

DC_TEST_D1

DC_TEST_D65

RSVD53 RSVD54 RSVD55 RSVD56 RSVD57 RSVD58 RSVD59 RSVD60 RSVD61 RSVD62 RSVD63 RSVD64 RSVD65 RSVD66 RSVD67 RSVD68

RSVD69 RSVD70 RSVD71 RSVD72

RSVD78 RSVD79 RSVD80 RSVD81 RSVD82 RSVD83 RSVD84 RSVD85 RSVD86 RSVD87 RSVD88 RSVD89 RSVD90 RSVD91 RSVD92 RSVD93 RSVD94 RSVD95 RSVD96 RSVD97

F5 K9 H5 L10 G4 K7 K5 M9 L6 J2 L2 P7 M5 J4 L4 N6

G48 K49 H49 J50

D47 C48

B49 A48

VCC_DIE_SENSE

F47

AY13 BB13 BB15 AY15 AW14 BD13 BA16 BE16 BD15 BC14 BF19 BH19 BF21 BH21 BF23 BH23 BF25 BH25 BJ22 BG22

A4 A62

DC_TEST_B63_A64

A64

DC_TEST_B3_C2

B3 B63

DC_TEST_B65_C64

B65 BF1 BF65

DC_TEST_BH1_BG2

BG2

DC_TEST_BG64_BH65

BG64 BH1

DC_TEST_BH3_BJ2

BH3

DC_TEST_BH63_BJ64

BH63 BH65 BJ2 BJ4 BJ62 BJ64 C2 C64 D1 D65

T33PAD @T33PAD @

Intel suggestion

T40PAD @T40PAD @

Those signals should be leave to NC and recommend

T41PAD @T41PAD @ T42PAD @T42PAD @

for test pins

12

RU120

@RU120

@

0_0402_5%~D

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

*

Display Port Presence Strap

CFG4

*

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

CFG[6:5]

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled

01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

12

RU77

RU77 1K_0402_1%~D

1K_0402_1%~D

1: Normal Operation; Lane # definition matches socket pin map definition

0:Lane Reversed

CFG4

12

RU115

@RU115

@

1K_0402_1%~D

1 : Disabled; No Physical Display Port attached to Embedded Display Port

0 : Enabled; An external Display Port device is connected to the Embedded Display Port

CFG6

CFG5

PT

12

RU85

SB@RU85

SB@

1K_0402_1%~D

12

RU86

@RU86

@

1K_0402_1%~D

RU85 just for Sandy bridge PEG x8

CFG7

12

RU87

@RU87

@

1K_0402_1%~D

PT

AV8063801108003_BGA1224~D

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB

CFG7

de assertion

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

0: PEG Wait for BIOS for training

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/7) RSVD,CFG

10 66Monday, March 26, 2012

1

10 66Monday, March 26, 2012

0.1

5

D D

C C

B B

A A

4

UU1F

53A

+VCC_CORE

A26

VCC1

A28

VCC2

A32

VCC3

A34

VCC4

A38

VCC5

A40

VCC6

A44

VCC7

B29

VCC8

B31

VCC9

B35

VCC10

B37

VCC11

B41

VCC12

B43

VCC13

B45

VCC14

C26

VCC15

C28

VCC16

C32

VCC17

C34

VCC18

C38

VCC19

C40

VCC20

C44

VCC21

D29

VCC22

D31

VCC23

D35

VCC24

D37

VCC25

D41

VCC26

D43

VCC27

D45

VCC28

E26

VCC29

E28

VCC30

E32

VCC31

E34

VCC32

E38

VCC33

E40

VCC34

E44

VCC35

F25

VCC36

F29

VCC37

F31

VCC38

F35

VCC39

F37

VCC40

F41

VCC41

F43

VCC42

F45

VCC43

G26

VCC44

G28

VCC45

G32

VCC46

G34

VCC47

G38

VCC48

G40

VCC49

G44

VCC50

H25

VCC51

H29

VCC52

H31

VCC53

H35

VCC54

H37

VCC55

H41

VCC56

H43

VCC57

H45

VCC58

J26

VCC59

J28

VCC60

J32

VCC61

J34

VCC62

J38

VCC63

J40

VCC64

J44

VCC65

K25

VCC66

K29

VCC67

K31

VCC68

K35

VCC69

K37

VCC70

K41

VCC71

K43

VCC72

K45

VCC73

L22

VCC74

L26

VCC75

L28

VCC76

L32

VCC77

L34

VCC78

L38

VCC79

L40

VCC80

L44

VCC81

M21

VCC82

M23

VCC83

M27

VCC84

M29

VCC85

M34

VCC86

M36

VCC87

M40

VCC88

M42

VCC89

M46

VCC90

N20

VCC91

N24

VCC92

N26

VCC93

N30

VCC94

N33

VCC95

N37

VCC96

N39

VCC97

N43

VCC98

N45

VCC99

R21

VCC100

R23

VCC101

R27

VCC102

R29

VCC103

R34

VCC104

R36

VCC105

R40

VCC106

R42

VCC107

R46

VCC108

AV8063801108003_BGA1224~D

3

CORE SUPPLY

PEG AND DDR

POWER

SVID QUIET RAILS

VSS_SENSE_VCCIO

SENSE LINES

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24 VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39 VCCIO40 VCCIO41 VCCIO42

VCCIO43 VCCIO44 VCCIO45 VCCIO46 VCCIO47 VCCIO48 VCCIO49 VCCIO50 VCCIO51 VCCIO52 VCCIO53 VCCIO54 VCCIO55 VCCIO56 VCCIO57 VCCIO58 VCCIO59 VCCIO60 VCCIO61 VCCIO62 VCCIO63

VCCIO64 VCCIO65 VCCIO66

VCCPQE1 VCCPQE2 VCCPQE3 VCCPQE4

VCCIO_SEL

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE

+VCCP

AK56 AK58 AL15 AL17 AL48 AL53 AL55 AN14 AN16 AN18 AN20 AN49 AN52 AN56 AN58 AP48 AP53 AP55 AR14 AR16 AR18 AR20 AR49 AR52 AR56 AR58 AT15 AT17 AT48 AT53 AT55 AU18 AU20 AU49 AU52 AU56 AU58 AV15 AV17 AV48 AV53 AV55

AB14 AB16 AC12 AC15 AC17 AD11 AE12 AE15 AE17 AF14 AF16 AH11 AH14 AH16 AJ12 AJ15 AJ17 AL12 AM11 AT12 AV12

Y11 Y14 Y16

AL21 AP21 AT21 AV21

VCCP_PWRCTRL_R

AJ8

B51

VR_SVID_CLK

D51

VR_SVID_DAT

A50

VCCSENSE_R

B47

VSSSENSE_R

A46

AW10

VSSIO_SENSE

AU10

+1.05V

+1.05VS_VCCPQ

2

8.5A

ST

RU88 0_0603_5%~DSHORTRU88 0_0603_5%~DSHORT

1 2

1

CU122

CU122 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

RU93 43_0402_1%RU93 43_0402_1%

1 2

ST

RU97 0_0402_5%~D

SHORT

1 2

RU98 0_0402_5%~D

SHORT

1 2

ST

RU100 0_0402_5%~D

SHORT

1 2

RU101 10_0402_1%~DRU101 10_0402_1%~D

1 2

VCCIO_SENSE

1

+VCCP

RU91 75_0402_5%RU91 75_0402_5%

+VCC_CORE

VCCIO_SENSE (56) VSSIO_SENSE (56)

1 2

VCCSENSE (59) VSSSENSE (59)

1 2

VR_SVID_ALRT#

VR_SVID_DAT

VR_SVID_ALRT# (59) VR_SVID_CLK (59) VR_SVID_DAT (59)

+VCCP

T14PAD @T14PAD @ RU90 130_0402_5%RU90 130_0402_5%

VR_SVID_ALRT#H_CPU_SVIDALRT#

RU96 100_0402_1%~DRU96 100_0402_1%~D

RU99 100_0402_1%~DRU99 100_0402_1%~D

VCCIO_SENSEVCCIO_SENSE_R

RU104 10_0402_1%~DRU104 10_0402_1%~D

1 2

+VCCP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Title

PROCESSOR(5/7) PWR,BYPASS

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

11 66Monday, March 26, 2012

1

0.1

5

4

3

2

1

+V_SM_VREF should

33A

+VCC_GFXCORE_AXG

D D

C C

+VCC_GFXCORE_AXG

RU103 100_0402_1%~DRU103 100_0402_1%~D

B B

VCC_AXG_SENSE(59) VSS_AXG_SENSE(59)

+1.8VS

ST

1.2A

RU111 0_0805_5%~DSHORTRU111 0_0805_5%~DSHORT

1 2

+VCCSA

6A

1

+

CU215

CU215 330U_D2_2V_Y

330U_D2_2V_Y

2

A A

5

1

CU207

10U_0603_6.3V6M~D

2

1

2

1U_0402_6.3V6K~D

CU216

1

2

10U_0603_6.3V6M~D

1U_0402_6.3V6K~D

1 2

ST

RU108 0_0402_5%~D

SHORT

1 2

RU109 0_0402_5%~D

SHORT

1 2

RU112 100_0402_1%~DRU112 100_0402_1%~D

1 2

1

CU205

1U_0402_6.3V6K~D

2

+VCCSA

10U_0603_6.3V6M~D

1

CU211

2

CU217

1

2

CU213

CU212

2

1U_0402_6.3V6K~D

@

CU219

CU218

1

2

+1.8VS_VCCPLL_R

1

CU206

1U_0402_6.3V6K~D

2

10U_0603_6.3V6M~D

1

@

CU214

2

1U_0402_6.3V6K~D

@

CU220

1

2

UU1G

AA60

VAXG1

AA62

VAXG2

AA64

VAXG3

AB56

VAXG4

AB58

VAXG5

AB61

VAXG6

AB63

VAXG7

AB65

VAXG8

AD56

VAXG9

AD58

VAXG10

AD61

VAXG11

AD63

VAXG12

AD65

VAXG13

AE60

VAXG14

AE62

VAXG15

AE64

VAXG16

AF56

VAXG17

AF58

VAXG18

AG60

VAXG19

AG62

VAXG20

AG64

VAXG21

AH56

VAXG22

AH58

VAXG23

AH61

VAXG24

AH63

VAXG25

AH65

VAXG26

L48

VAXG27

L52

VAXG28

L56

VAXG29

M48

VAXG30

M53

VAXG31

M55

VAXG32

M59

VAXG33

M61

VAXG34

M63

VAXG35

M65

VAXG36

N49

VAXG37

N52

VAXG38

N56

VAXG39

N58

VAXG40

N60

VAXG41

N62

VAXG42

N64

VAXG43

R48

VAXG44

R53

VAXG45

R55

VAXG46

R60

VAXG47

R62

VAXG48

R64

VAXG49

T56

VAXG50

T58

VAXG51

T61

VAXG52

T63

VAXG53

T65

VAXG54

V56

VAXG55

V58

VAXG56

V61

VAXG57

V63

VAXG58

V65

VAXG59

W60

VAXG60

W62

VAXG61

W64

VAXG62

Y56

VAXG63

Y58

VAXG64

F49

VAXG_SENSE

E50

VSSAXG_SENSE

AK61

VCCPLL1

AK63

VCCPLL2

AK65

VCCPLL3

L14

VCCSA1

L18

VCCSA2

M11

VCCSA3

M12

VCCSA4

M15

VCCSA5

M17

VCCSA6

N14

VCCSA7

N16

VCCSA8

N18

VCCSA9

T11

VCCSA10

T14

VCCSA11

T16

VCCSA12

U12

VCCSA13

U15

VCCSA14

U17

VCCSA15

W12

VCCSA16

W15

VCCSA17

W17

VCCSA18

AV8063801108003_BGA1224~D

4

SM_VREF

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26 VDDQ27 VDDQ28 VDDQ29

DDR3 - 1.5V RAILS

SENSE

QUIET RAILS

VDDQ_SENSE

VSS_SENSE_VDDQ

VCCSA_SENSE

SENSE LINES

VCCSA_VID[0]

VDDQ30 VDDQ31 VDDQ32 VDDQ33 VDDQ34 VDDQ35 VDDQ36 VDDQ37 VDDQ38 VDDQ39 VDDQ40 VDDQ41 VDDQ42 VDDQ43 VDDQ44 VDDQ45 VDDQ46 VDDQ47 VDDQ48 VDDQ49 VDDQ50 VDDQ51 VDDQ52 VDDQ53 VDDQ54 VDDQ55 VDDQ56 VDDQ57 VDDQ58 VDDQ59 VDDQ60 VDDQ61 VDDQ62 VDDQ63 VDDQ64 VDDQ65 VDDQ66 VDDQ67 VDDQ68 VDDQ69

VCCDQ1 VCCDQ2 VCCDQ3 VCCDQ4

VCCSA_VID[1]

GRAPHICS

POWER

LINES

1.8V RAIL

SA RAIL

have 20 mil trace width

BJ44

AL27 AL29 AL34 AL36 AL40 AL42 AL46 AN24 AN26 AN30 AN33 AN37 AN39 AN43 AN45 AP27 AP29 AP34 AP36 AP40 AP42 AP46 AR24 AR26 AR30 AR33 AR37 AR39 AR43 AR45 AT27 AT29 AT34 AT36 AT40 AT42 AT46 AU24 AU26 AU30 AU33 AU37 AU39 AU43 AU45 AV27 AV29 AV34 AV36 AV40 AV42 AV46 AY23 AY27 AY31 AY35 AY39 AY43 AY47 BB35 BD23 BD31 BD39 BD43 BD47 BG32 BG40 BJ28 BJ36

AL23 AP23 AT23 AV23

AY19 AW20

+VCCSA_SENSE

K3

RU114 0_0402_5%~D@RU114 0_0402_5%~D@

H_VCCSA_VID0

AE10

H_VCCSA_VID1

AG10

+SM_VREF

+1.5V_CPU_VDDQ

10U_0603_6.3V6M~D

1

2

1U_0402_6.3V6K~D

CU192

1

2

ST

1 2

3

1

0.1U_0402_25V6K~D

2

1

CU169

2

1U_0402_6.3V6K~D

@

CU193

Security Classification

+1.5V_CPU_VDDQ

12

RU83

@RU83

@

1K_0402_1%~D

RU117 0_0402_5%~D@RU117 0_0402_5%~D@

1 2

1

3

QU4 AP2302GN-HF_SOT23-3~D@QU4 AP2302GN-HF_SOT23-3~D@

RU84

1

2

10U_0603_6.3V6M~D

1

CU173

2

1U_0402_6.3V6K~D

CU197

1

2

RUN_ON_CPU1.5VS3

+0.75VS

+1.5V_CPU_VDDQ

10U_0603_6.3V6M~D

1

2

2011/08/25 2012/07/25

10U_0603_6.3V6M~D

1

CU174

2

1U_0402_6.3V6K~D

CU198

1

2

1

@

CU176

CU175

2

+1.5V_CPU_VDDQ

1U_0402_6.3V6K~D

CU199

1

2

CPU1.5V_S3_GATE(8,38,57)

Compal Secret Data

1

+

2

1U_0402_6.3V6K~D

CU200

330U_D2_2V_Y

CU168

1U_0402_6.3V6K~D

@

CU201

1

2

Deciphered Date

SHORT

1 2

12

@RU84

@

1K_0402_1%~D

CU154

ST

RU118 0_0402_5%~D

5A

10U_0603_6.3V6M~D

CU171

1U_0402_6.3V6K~D

1

2

1

CU172

2

1U_0402_6.3V6K~D

CU195

1

2

+1.5V_CPU_VDDQ

CU208

1

2

CU196

1

CU170

2

1U_0402_6.3V6K~D

CU194

1

2

1U_0402_6.3V6K~D

+VCCSA_SENSE (58)

H_VCCSA_VID0 (58) H_VCCSA_VID1 (58)

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

+V_DDR_REFA

2

+1.5V_CPU_VDDQ

12

RU107

RU107 100K_0402_5%~D

100K_0402_5%~D

RUN_ON_CPU1.5VS3#

61

QU5A

2N7002DW-7-F_SOT363-6

+1.5V

ST

CU177 0.1U_0402_10V7K~DCU177 0.1U_0402_10V7K~D

12

CU178 0.1U_0402_10V7K~DCU178 0.1U_0402_10V7K~D

12

CU179 0.1U_0402_10V7K~DCU179 0.1U_0402_10V7K~D

12

CU191 0.1U_0402_10V7K~DCU191 0.1U_0402_10V7K~D

12

+1.5V_CPU_VDDQ Source

+1.5V +1.5V_CPU_VDDQ

6720mA

QU6

AO4728L_SO8~D

+VSBP+3VALW

12

RU105

RU105 100K_0402_5%~D

100K_0402_5%~D

RUN_ON_CPU1.5VS3

3

QU5B

5

2N7002DW-7-F_SOT363-6

4

RUN_ON_CPU1.5VS3# (8,34)

Compal Electronics, Inc.

Title

PROCESSOR(6/7) PWR

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

8 7 6 5

12

RU110

RU110 330K_0402_1%

330K_0402_1%

1

AO4728L_SO8~D

1 2 3

4

1

CU204

0.1U_0603_50V_X7R

2

of

12 66Monday, March 26, 2012

0.1

5

UU1H

4

3

2

UU1I

1

BE42

VSS181

A12

VSS1

A16

AA12 AA15 AA17 AA57 AB11

AC57 AC60 AC62 AC64

AD14 AD16

AE57 AF11

AF61 AF63 AF65

AG12 AG15 AG17 AG57

AJ57 AJ60 AJ62

AJ64 AK11 AK14 AK16

AL19

AL25

AL31

AL38

AL44

AL50

AL57

AM61

AN22 AN28 AN35 AN41 AN47 AN54 AP11 AP12 AP15 AP17 AP19 AP25 AP31 AP38 AP44

AP50 AP57 AP63 AP65

AR22 AR28 AR35 AR41 AR47 AR54

AT11 AT19

AM1 AM3

AM7

A20 A24 A30 A36 A42 A52 A56

AB5 AB9

AD1

AD3 AD7

AF5

AF9

AH1 AH3 AH7

AK5 AK9

AP5

AP9

AT1

VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

A8

VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90

VSS

D D

C C

B B

VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180

AT25 AT3 AT31 AT38 AT44 AT50 AT57 AT61 AT7 AU14 AU16 AU22 AU28 AU35 AU41 AU47 AU54 AV19 AV25 AV31 AV38 AV44 AV5 AV50 AV57 AV59 AV63 AV65 AV9 AW16 AW24 AW28 AW32 AW36 AW40 AW44 AW48 AW52 AW56 AY1 AY11 AY3 AY61 AY7 B27 B33 B39 BA14 BA18 BA22 BA26 BA30 BA34 BA38 BA42 BA46 BA50 BA54 BA58 BB39 BB47 BB5 BB63 BB65 BB9 BC12 BC16 BC20 BC24 BC26 BC28 BC32 BC36 BC40 BC44 BC48 BC52 BC56 BC60 BD3 BD35 BD7 BE10 BE14 BE18 BE22 BE26 BE30 BE34 BE38

VSSG_DIE_SENSE

12

RU119

RU119 0_0402_5%~D

0_0402_5%~D

@

BE46 BE50 BE54 BE58 BE62

BG12 BG16 BG20 BG24 BG28 BG36 BG44 BG48 BG52 BG56 BG60

BJ12 BJ16 BJ20 BJ24 BJ32 BJ40 BJ48 BJ52 BJ56

BF5

BG8

C12 C16 C20 C30 C36 C42 C46 C50 C54 C58

D27 D33 D39 D63 E10 E14 E18 E22 E24 E30 E36

E42 E46 E48 E52 E56

E60

G12 G16 G20 G24 G30 G36 G42 G46 G50 G54 G58 G62

H27

H33 H39

VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208

BJ8

VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219

C8

VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231

E4

VSS232 VSS233 VSS234 VSS235 VSS236 VSS237

E6

VSS238 VSS239

F27

VSS240

F33

VSS241

F39

VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254

G8

VSS255 VSS256

H3

VSS257 VSS258 VSS259

J10

VSS260

J14

VSS261

J18

VSS262

J22

VSS263

J24

VSS264

J30

VSS265

J36

VSS266

J42

VSS267

J46

VSS268

J48

VSS269

J52

VSS270

VSS

VSS_NCTF10 VSS_NCTF11 VSS_NCTF12 VSS_NCTF13 VSS_NCTF14 VSS_NCTF15 VSS_NCTF16

VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285 VSS286 VSS287 VSS288 VSS289 VSS290 VSS291 VSS292 VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300 VSS301 VSS302 VSS303 VSS304 VSS305 VSS306 VSS307 VSS308 VSS309 VSS310 VSS311 VSS312 VSS313 VSS314 VSS315 VSS316 VSS317 VSS318 VSS319 VSS320 VSS321 VSS322 VSS323 VSS324 VSS325 VSS326 VSS327 VSS328 VSS329 VSS330 VSS331 VSS332 VSS333 VSS334 VSS335 VSS336 VSS337 VSS338 VSS339 VSS340 VSS341 VSS342 VSS343 VSS344

VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 VSS_NCTF8 VSS_NCTF9

J56 J6 J60 J64 K1 K27 K33 K39 L12 L16 L20 L24 L30 L36 L42 L46 L50 L54 L58 L60 L62 L64 L8 M1 M19 M25 M3 M31 M38 M44 M50 M57 M7 N22 N28 N35 N41 N47 N54 P11 P5 P61 P63 P65 P9 R12 R15 R17 R19 R25 R31 R38 R44 R50 R57 T1 T3 T7 U57 U60 U62 U64 V11 V14 V16 V5 V9 W57 Y1 Y3 Y61 Y63 Y65 Y7

A6 A60 B5 B61 BD1 BD65 BE2 BE64 BH5 BH61 BJ6 BJ60 E2 E64 F1 F65

AV8063801108003_BGA1224~D

A A

5

AV8063801108003_BGA1224~D

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

AV8063801108003_BGA1224~D

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(7/7) VSS

1

13 66Monday, March 26, 2012

0.1

5

DDR_A_DQS#[0..7](9)

DDR_A_DQS[0..7](9)

DDR_A_D[0..63](9)

DDR_A_MA[0..15](9)

D D

All VREF traces should have 10 mil trace width

Layout Note: Place near JDIMM1

+1.5V

1U_0402_6.3V6K~D

CD4

CD3

1

2

C C

B B

A A

+1.5V

10U_0603_6.3V6M~D

1

CD8

CD9

2

Layout Note: Place near JDIMM1.203,204

+0.75VS

1U_0402_6.3V6K~D

CD17

CD18

+3VS

CD18

1

2

2.2U_0603_6.3V6K~D

0.1U_0402_16V7K~D

CD22

CD21

1

2

1

2

Layout Note: Place near JDIMM1.199

5

M1

1U_0402_6.3V6K~D

CD5

1

2

10U_0603_6.3V6M~D

1

CD10

2

1U_0402_6.3V6K~D

CD19

1

2

+1.5V

12

RD2

RD2 1K_0402_1%~D

1K_0402_1%~D

+V_DDR_REFA

12

RD3

RD3 1K_0402_1%~D

1K_0402_1%~D

1U_0402_6.3V6K~D

CD6

10U_0603_6.3V6M~D

CD11

1U_0402_6.3V6K~D

CD20

10U_0603_6.3V6M~D

1

2

CD13

CD12

2

4

+V_DDR_REFA

@

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D CD1

CD1

1

2

DDR_CKE0_DIMMA(9) DDR_CKE1_DIMMA (9)

QT

330U_D2_2.5VY_R15M~D

1

CD7

+

2

DDR_CS1_DIMMA#(9)

RD8 10K_0402_5%~DRD8 10K_0402 _5%~D

1 2

RD9 10K_0402_5%~DRD9 10K_0402 _5%~D

1 2

4

3

+1.5V

JDIMM1

+V_DDR_REFA

DDR_A_D0 DDR_A_D1

DDR_A_D2

0.1U_0402_16V7K~D

CD2

DDR_A_BS2(9)

M_CLK_DDR0(9) M_CLK_DDR#0(9)

DDR_A_BS0(9)

DDR_A_WE#(9) DDR_A_CAS#(9)

DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10

DDR_A_BS0

DDR_A_WE# DDR_A_CAS#

DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

+3VS

+0.75VS

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET#

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

BELLW_80011-1021

BELLW_80011-1021 CONN@

CONN@

VSS3

DQS#0

DQS0 VSS6

VSS8 DQ12 DQ13

VSS10

VSS12

DQ14 DQ15

VSS14

DQ20 DQ21

VSS16

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

VSS24

DQ30 DQ31

VSS26

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

DQ4 DQ5

DQ6 DQ7

DM1

DM2

CK1

CK1#

BA1

NC2

DM4

DM6

SDA

SCL

VTT2

+1.5V

2

DDR_A_D4

4

DDR_A_D5

6 8

DDR_A_DQS#0

10

DDR_A_DQS0

12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22

DDR_A_D13

24 26 28

DDR3_DRAMRST#

30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20

40

DDR_A_D21

42 44 46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60

DDR_A_DQS#3

62

DDR_A_DQS3

64 66

DDR_A_D30

68

DDR_A_D31

70 72

DDR_CKE1_DIMMA

74 76

DDR_A_MA15

78

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA# M_ODT0

M_ODT1

+VREF_CA

DDR_A_D36 DDR_A_D37

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

PCH_SMBDATA PCH_SMBCLK

+0.75VS

2.2U_0603_6.3V6K~D

1

2

PCH_SMBDATA (6,15,17,39,43) PCH_SMBCLK (6,15,17,39,43)

2

DDR3_DRAMRST# (8,15)

M_CLK_DDR1 (9) M_CLK_DDR#1 (9)

DDR_A_BS1 (9) DDR_A_RAS# (9)

DDR_CS0_DIMMA# (9) M_ODT0 (9)

M_ODT1 (9)

0.1U_0402_16V7K~D

@

CD15

CD16

1

2

DRAMRST_CNTRL_PC H(8,17)

M3

+V_DDR_REFB(15)

+1.5V

12

RD4

RD4 1K_0402_1%~D

1K_0402_1%~D

12

RD5

RD5 1K_0402_1%~D

1K_0402_1%~D

RD6 0_0402_5%~D@RD6 0_0402_5%~D@

+V_DDR_REFA

DRAMRST_CNTRL_PC H

+V_DDR_REFB

DRAMRST_CNTRL_PC H

1 2

RD7 0_0402_5%~D@RD7 0_0402_5%~D@

D

1 3

PT

2

1 2

D

1 3

PT

2

S

QD1

QD1 BSS138-G_SOT23-3

BSS138-G_SOT23-3

G

S

QD2

QD2 BSS138-G_SOT23-3

BSS138-G_SOT23-3

G

1

12

+V_DDR_REFA_R (9)

RD17

@RD17

@

1K_0402_1%~D

+V_DDR_REFB_R (9)

RD18

@RD18

@

1K_0402_1%~D

M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

DDRIII DIMMA

LA-7851P

1

0.1

of

14 66Monday, March 26, 2012

5

M1

D D

C C

B B

A A

DDR_B_DQS#[0..7](9)

DDR_B_DQS[0..7](9)

DDR_B_D[0..63](9)

DDR_B_MA[0..15](9)

+1.5V

1U_0402_6.3V6K~D

CD26

CD25

1

2

+1.5V

10U_0603_6.3V6M~D

1

2

+0.75VS

CD31

CD30

2

Layout Note: Place near JDIMMB.203,204

1U_0402_6.3V6K~D

CD39

1

2

5

Layout Note: Place near JDIMMB

1U_0402_6.3V6K~D

CD27

1

2

10U_0603_6.3V6M~D

1

CD32

2

1U_0402_6.3V6K~D

CD41

CD40

1

2

CD28

10U_0603_6.3V6M~D

1

CD33

CD34

2

1U_0402_6.3V6K~D

CD42

1

2

+1.5V

12

RD11

RD11 1K_0402_1%~D

1K_0402_1%~D

12

RD12

RD12 1K_0402_1%~D

1K_0402_1%~D

10U_0603_6.3V6M~D

1

CD35

2

Layout Note: Place near JDIMMB.199

+V_DDR_REFB

All VREF traces should have 10 mil trace width

4

+V_DDR_REFB(14)

0.1U_0402_16V7K~D

2.2U_0603_6.3V6K~D

@

CD23

CD24

1

2

+3VS

CD24

1

2

0.1U_0402_16V7K~D

1

2

4

2.2U_0603_6.3V6K~D

CD43

CD44

1

2

Note: Check voltage tolerance of VREF_DQ at the DIMM socket

DDR_CKE2_DIMMB(9)

DDR_CS3_DIMMB#(9)

RD16 10K_0402_5%~DRD16 10K_0402_5%~D

1 2

RD15 10K_0402_5%~DRD15 10K_0402_5%~D

+3VS

1 2

DDR_B_BS2(9)

M_CLK_DDR2(9) M_CLK_DDR#2(9)

DDR_B_BS0(9)

DDR_B_WE#(9) DDR_B_CAS#(9)

3

8/15 update for SSI

+1.5V

+V_DDR_REFB

DDR_B_D0 DDR_B_D1

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13

DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

+3VS

+0.75VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

JDIMM2

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

BELLW_80001-2021

CONN@

2

VSS

4

DQ4

6

DQ5

8

VSS

10

DQS0#

12

DQS0

14

VSS

16

DQ6

18

DQ7

20

VSS

22

DQ12

24

DQ13

26

VSS

28

DM1

30

RESET#

32

VSS

34

DQ14

36

DQ15

38

VSS

40

DQ20

42

DQ21

44

VSS

46

DM2

48

VSS

50

DQ22

52

DQ23

54

VSS

56

DQ28

58

DQ29

60

VSS

62

DQS3#

64

DQS3

66

VSS

68

DQ30

70

DQ31

72

VSS

74

CKE1

76

VDD

78

A15

80

A14

82

VDD

84

A11

86

A7

88

VDD

90

A6

92

A4

94

VDD

96

A2

98

A0

100

VDD

102

CK1

104

CK1#

106

VDD

108

BA1

110

RAS#

112

VDD

114

S0#

116

ODT0

118

VDD

120

ODT1

122

NC

124

VDD

126

VREF_CA

128

VSS

130

DQ36

132

DQ37

134

VSS

136

DM4

138

VSS

140

DQ38

142

DQ39

144

VSS

146

DQ44

148

DQ45

150

VSS

152

DQS5#

154

DQS5

156

VSS

158

DQ46

160

DQ47

162

VSS

164

DQ52

166

DQ53

168

VSS

170

DM6

172

VSS

174

DQ54

176

DQ55

178

VSS

180

DQ60

182

DQ61

184

VSS

186

DQS7#

188

DQS7

190

VSS

192

DQ62

194

DQ63

196

VSS

198

EVENT#

200

SDA

202

SCL

204

VTT

206

GND2

208

BOSS2

Compal Secret Data

Deciphered Date

2

+1.5V

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR3_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB# M_ODT2

M_ODT3

+VREF_CB

DDR_B_D36 DDR_B_D37

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

PCH_SMBDATA PCH_SMBCLK

+0.75VS

2

DDR3_DRAMRST# (8,14)

DDR_CKE3_DIMMB (9)

M_CLK_DDR3 (9) M_CLK_DDR#3 (9)

DDR_B_BS1 (9) DDR_B_RAS# (9)

DDR_CS2_DIMMB# (9) M_ODT2 (9)

M_ODT3 (9)

2.2U_0603_6.3V6K~D

@

CD37

1

2

PCH_SMBDATA (6,14,17,39,43) PCH_SMBCLK (6,14,17,39,43)

1

2

Title

Size Document Number Rev

Date: Sheet of

+1.5V

12

RD13

RD13 1K_0402_1%~D

1K_0402_1%~D

0.1U_0402_16V7K~D

12

RD14

CD38

1K_0402_1%~D

Compal Electronics, Inc.

DDRIII DIMMB

LA-7851P

1

0.1

15 66Monday, March 26, 2012

1

15 66Monday, March 26, 2012

0.1

5

4

3

2

1

RTC CRYSTAL

UH1A

PCH_RTCX1

RH1 10M_0402_5%RH1 10M_0402_5%

1 2

YH1

QT

1 2

32.768KHZ_12.5PF_9H03200019

D D

1

CH3

18P_0402_50V8J~D

2

PCH_RTCX2

1

CH4

CH4 18P_0402_50V8J~D

18P_0402_50V8J~D

2

+RTCVCC

RH2 1M_0402_5%~DRH2 1M_0402_5%~D

1 2

+RTCVCC

RH3 20K_0402_5%~DRH3 20K_0402_5%~D

1 2

RH4 20K_0402_5%~DRH4 20K_0402_5%~D

1 2

SM_INTRUDER# HDA_SPKR

CH5

1U_0603_10V6K~D

CH6

1U_0603_10V6K~D

1

12

CMOS

CLRP1

SHORT PADS

2

1

12

CLRP2

SHORT PADS

2

ME CMOS

CLP1 & CLP2 place near DIMM

HDA_SPKR(46)

HDA_SDIN0(46)

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

HDA_RST#

HDA_SDIN0

PCH Strap PIN

INTVRMEN Integrated 1.05V VRM Enable/Disable

+RTCVCC

RH13 330K_0402_5%RH13 330K_0402_5%

1 2

RH16 330K_0402_5%@RH16 330K_0402_5%@

1 2

H：Integrated VRM enable

*

C C

L：Integrated VRM disable

PCH_INTVRMEN

ODD_EJECT(38,43)

PT

RH95 0_0402_5%~D@ RH95 0_0402_5%~D@

1 2

DP_PCH_HPD(18,37)

SPKR No Reboot

+3VS

RH17 1K_0402_5%~D@RH17 1K_0402_5%~D@

1 2

LOW=Default

*

HIGH=No Reboot

If the signal i s sampled high, this indicate that the system is strapped to the "No Reboot" mo de

HDA_SPKR

SSI2

T7PAD~D @T7PAD~D @

HDA_SDOUT

DP_PCH_HPD

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPI_CLK

PCH_SPI_CS#

PCH_SPI_CS1#

PCH_SPI_SI

PCH_SPI_SO

UH1A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST # / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

BD82HM77 QPRG C1 BGA 989P

@

JTAG

RTCIHDA

SPI

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP

SATA 6G

SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

LPC_AD0

C38

LPC_AD1

A38

LPC_AD2

B37

LPC_AD3

C37

LPC_FRAME#

D36

E36 K36

SERIRQ

V5

AM3 AM1 AP7 AP5

AM10 AM8

SATA_PTX_DRX_N1

AP11

SATA_PTX_DRX_P1

AP10

AD7 AD5

SATA_PTX_DRX_N2

AH5

SATA_PTX_DRX_P2

AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

AH1

PCH_SATALED#

P3

PCH_GPIO21

V14

BBS_BIT0

P1

CH18 0.01U_0402_16V7K~DCH18 0.01U_0402_16V7K~D CH17 0.01U_0402_16V7K~DCH17 0.01U_0402_16V7K~D

CH9 0.01U_0402_16V7K~DCH9 0.01U_0402_16V7K~D CH10 0.01U_0402_16V7K~DCH10 0.01U_0402_16V7K~D

SATA_COMP

SATA3_COMP

RBIAS_SATA3

RH21 37.4_0402_1%RH21 37.4_0402_1%

RH22 49.9_0402_1%RH22 49.9_0402_1%

RH28 750_0402_1%~D RH28 750_0402_1%~D

RH14 10K_0402_5%~D@RH14 10K_0402_5%~D@

RH12 10K_0402_5%~DRH12 10K_0402_5%~D

RH29 10K_0402_5%~DRH29 10K_0402_5%~D

BBS_BIT0 (19)

LPC_AD0 (38,40,42) LPC_AD1 (38,40,42) LPC_AD2 (38,40,42) LPC_AD3 (38,40,42)

LPC_FRAME# (38,40,42)

SERIRQ (38,40)

1 2 1 2

1 2

SERIRQ

SATA_PRX_DTX_N0 (43) SATA_PRX_DTX_P0 (43) SATA_PTX_DRX_N0 (43) SATA_PTX_DRX_P0 (43)

SATA_PRX_DTX_N1 (42) SATA_PRX_DTX_P1 (42) SATA_PTX_DRX_N1_C (42) SATA_PTX_DRX_P1_C (42)

SATA_PRX_DTX_N2 (43) SATA_PRX_DTX_P2 (43) SATA_PTX_DRX_N2_C (43) SATA_PTX_DRX_P2_C (43)

+1.05VS_VCC_SATA

+VCCP

+3VS

1 2

+3VS

HDD

SSD

ODD

UH1

QCR1@

S IC BD82HM77 SLJ8C C1 BGA 989P PCH

UH1

QCR3@

QCR3@RH10 10K_0402_5%~DRH10 10K_0402_5%~D

S IC BD82HM77 SLJ8C C1 BGA 989P PCH A31!

RTC Battery

+RTCBATT

+3VLP

W=20mils

3

1

2

RH34

RH34 1K_0402_5%~D

1K_0402_5%~D

1 2

W=20mils

2

DH1

DH1 BAT54CW_SOT323-3

BAT54CW_SOT323-3

CH12

CH12 1U_0603_10V6K~D

1U_0603_10V6K~D

QT

+RTCVCC

HDA_SYNC On-Die PLL Voltage Regulator Voltage Select

+3V_PCH

RH32 1K_0402_5%~D RH32 1K_0402_5%~D

1 2

This signal has a weak interna l pull-down On Die PLL VR i s supplied by

1.5V when smapl ed high

1.8V when sampl ed low

*

B B

Needs to be pul led High for Hu ron River platf rom

HDA_SDO Flash Descriptor Security Override/Intel ME Debug Mode

+3V_PCH

RH23 1K_0402_5%~D@RH23 1K_0402_5%~D@

1 2

Low = Disabled

*

High = Enabled

ME debug mode , this signal has a weak internal PD

L=>security measures defined in the Flash Descriptor will be in effect (default)

H=>Flash Descriptor Security will be overridden

HDA_SYNC

HDA_SDOUT

HD Audio

HDA_BITCLK_AUDIO(46)

HDA_SYNC_AUDIO(46)

HDA_RST_AUDIO#(46)

HDA_SDOUT_AUDIO(46)

HDA_SDO(38)

HDA_BITCLK_AUDIO HDA_BIT_CLK

RH7 33_0402_5%~DRH7 33_0402_5%~D

1 2

RH8 1M_0402_5%~DRH8 1M_0402_5%~D

1 2

RH5 33_0402_5%~DRH5 33_0402_5%~D

1 2

RH6 33_0402_5%~DRH6 33_0402_5%~D

1 2

RH15 33_0402_5% RH15 33_0402_5%

1 2

RH11 1K_0402_5%~DRH11 1K_0402_5%~D

1 2

+5VS

G

2

13

D

S

D

S

PT

QH1

BSS138-G_SOT23-3

1 2

RH9 0_0402_5%~D@RH9 0_0402_5%~D@

HDA_SYNCHDA_SYNC_R

HDA_RST#

HDA_SDOUT

for enable ME code programing

SPI ROM FOR ME ( 8MByte )

+3V_PCH

RH33 3.3K_0402_5%RH33 3.3K_0402_5%

1 2

RH38 3.3K_0402_5%RH38 3.3K_0402_5%

1 2

RH40 3.3K_0402_5%RH40 3.3K_0402_5%

1 2

PCH_SPI_CS#

PCH_SPI_WP#

PCH_SPI_HOLD#

PCH_SPI_CS# PCH_SPI_SO

UH2

1

CS#

2

DO(IO1)

3

WP#(IO2)

4

GND

W25Q64FVSSIG_SO8

HOLD#(IO3)

DI(IO0)

SSI2

+3V_PCH

1

CH11

0.1U_0402_16V7K~D

PCH_SPI_HOLD# PCH_SPI_CLKPCH_SPI_WP# PCH_SPI_SI

2

QT

8

VCC

7 6

CLK

5

Reserve for EMI

CH24 10P_0402_50V8J~D@CH24 10P_0402_50V8J~D@

JTAG

+3V_PCH +3V_PCH+3V_PCH

A A

12

RH18

@RH18

@

200_0402_5%

12

RH24

RH24 100_0402_1%~D

100_0402_1%~D

12

RH19

@RH19

@

200_0402_5%

12

RH25

RH25 100_0402_1%~D

100_0402_1%~D

12

RH20

@RH20

@

200_0402_5%

PCH_JTAG_TCKPCH_JTAG_TMSPCH_JTAG_TDO PCH_JTAG_TDI

12

RH26

RH26 100_0402_1%~D

100_0402_1%~D

5

12

RH35

RH35 51_0402_5%

51_0402_5%

4

1 2

CH1 10P_0402_50V8J~D@CH1 10P_0402_50V8J~D@

1 2

CH2 10P_0402_50V8J~D@CH2 10P_0402_50V8J~D@

1 2

Reserve for RF please close to UH1

HDA_BITCLK_AUDIO

HDA_BIT_CLK

HDA_SDOUT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

3

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (1/8) SATA,HDA,SPI, LPC

LA-7851P

1

16 66Monday, March 26, 2012

0.1

5

PCIE_PRX_GLANTX_N1(41)

10/100/1G LAN --->

D D

MiniWLAN (Mini Card 1)--->

CARD_READER --->

C C

10/100/1G LAN --->

MiniWLAN (Mini Card 1)--->

Card Reader --->

B B

A A

PCIE_PRX_GLANTX_P1(41) PCIE_PTX_GLANRX_N1(41) PCIE_PTX_GLANRX_P1(41)

PCIE_PRX_WLANTX_N3(42)

PCIE_PRX_WLANTX_P3(42) PCIE_PTX_WLANRX_N3(42) PCIE_PTX_WLANRX_P3(42)

PCIE_PRX_CARDTX_N4(40)

PCIE_PRX_CARDTX_P4(40) PCIE_PTX_CARDRX_N4(40) PCIE_PTX_CARDRX_P4(40)

CLK_PCIE_LAN#(41) CLK_PCIE_LAN(41)

LANCLK_REQ#(41)

CLK_PCIE_MINI3#(42) CLK_PCIE_MINI3(42)

MINI3CLK_REQ#(42)

CLK_PCIE_CD#(40) CLK_PCIE_CD(40)

CDCLK_REQ#(40)

CLK_CPU_ITP#(6) CLK_CPU_ITP(6)

CLK_RES_ITP#(8) CLK_RES_ITP(8)

CH15 0.1U_0402_10V7K~DCH15 0.1U_0402_10V7K~D

1 2

CH16 0.1U_0402_10V7K~DCH16 0.1U_0402_10V7K~D

1 2

CH19 0.1U_0402_10V7K~DCH19 0.1U_0402_10V7K~D

1 2

CH20 0.1U_0402_10V7K~DCH20 0.1U_0402_10V7K~D

1 2

CH21 0.1U_0402_10V7K~DCH21 0.1U_0402_10V7K~D

1 2

CH22 0.1U_0402_10V7K~DCH22 0.1U_0402_10V7K~D

1 2

RH66 10K_0402_5%~DRH66 10K_0402_5%~D

+3V_PCH

RH69 10K_0402_5%~DRH69 10K_0402_5%~D

+3VS

RH74 10K_0402_5%~DRH74 10K_0402_5%~D

+3VS

RH77 10K_0402_5%~DRH77 10K_0402_5%~D

+3V_PCH

RH81 10K_0402_5%~DRH81 10K_0402_5%~D

+3V_PCH

RH83 10K_0402_5%~DRH83 10K_0402_5%~D

+3V_PCH

RH84 10K_0402_5%~DRH84 10K_0402_5%~D

+3V_PCH

RH88 10K_0402_5%~DRH88 10K_0402_5%~D

+3V_PCH

RH90 10K_0402_5%~DRH90 10K_0402_5%~D

+3V_PCH

RH91 0_0402_5%~D@RH91 0_0402_5%~D@ RH92 0_0402_5%~D@RH92 0_0402_5%~D@

ST

RH107 0_0402_5%~D@ RH107 0_0402_5%~D@ RH109 0_0402_5%~D@ RH109 0_0402_5%~D@

1 2

1 2 1 2

4

PCIE_PRX_GLANTX_N1 PCIE_PRX_GLANTX_P1 PCIE_PTX_GLANRX_N1_C PCIE_PTX_GLANRX_P1_C

PCIE_PRX_WLANTX_N3 PCIE_PRX_WLANTX_P3 PCIE_PTX_WLANRX_N3_C PCIE_PTX_WLANRX_P3_C

PCIE_PRX_CARDTX_N4 PCIE_PRX_CARDTX_P4 PCIE_PTX_CARDRX_N4_C PCIE_PTX_CARDRX_P4_C

T2PAD~D @T2PAD~D @ T3PAD~D @T3PAD~D @

PCIECLKREQ0#

LANCLK_REQ#

PCH_GPIO20

MINI3CLK_REQ#

CDCLK_REQ#

PCH_GPIO44

PEG_B_CLKREQ#

PCH_GPIO45

PCH_GPIO46

CLK_BCLK_ITP# CLK_BCLK_ITP

UH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

BD82HM77 QPRG C1 BGA 989P

@

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

CLOCKS

3

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N

CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

XTAL25_IN

E12

SMBCLK

H14

SMBDATA

C9

DRAMRST_CNTRL_PCH

A12

SML0CLK

C8

SML0DATA

G12

GPIO74

C13

SML1CLK

E14

SML1DATA

M16

M7

T11

No support iAMT

P10

PEG_A_CLKRQ#

M10

CLK_PEG_VGA#

AB37

CLK_PEG_VGA

AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

AM12 AM13

CLKIN_DMI#

BF18

CLKIN_DMI

BE18

CLKIN_GND1

BJ30 BG30

CLKIN_DOT96#

G24

CLKIN_DOT96

E24

CLKIN_SATA#

AK7

CLKIN_SATA

AK5

CLK_PCH_14M

K45

CLK_PCI_LPBACK

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

CLK_PCI_TPM_R CLK_PCI_TPM

K43

KB_DET#

F47

LAN_25M_R

H47

CAM_DET#

K49

KB_DET#

ST

RH44 0_0402_5%~D

SMBCLK (42)

SMBDATA (42)

RH64 10K_0402_5%~DRH64 10K_0402_5%~D

1 2

RH85 90.9_0402_1%RH85 90.9_0402_1%

1 2

RH97 22_0402_1%RH97 22_0402_1%

1 2

RH102 22_0402_1%@ RH102 22_0402_1%@

1 2

RH98 100K_0402_5%~DRH98 100K_0402_5%~D

1 2

SHORT

1 2

CLK_PEG_VGA# (24) CLK_PEG_VGA (24)

CLK_CPU_DMI# (8) CLK_CPU_DMI (8)

T31 PAD~D@ T31 PAD~D@ T30 PAD~D@ T30 PAD~D@

CLK_PCI_LPBACK (19)

KB_DET# (39)

T34 PAD~D@ T34 PAD~D@

EC_LID_OUT#PCH_LID_SW_IN#

DRAMRST_CNTRL_PCH (8,14)

2

SMBCLK

DMN66D0LDW-7_SOT363-6~D

SMBDATA

+3V_PCH

PEG_A_CLKRQ# (24)

+VCCP

PT

+3VS

EC_LID_OUT# (38)

6 1

QH2A

DMN66D0LDW-7_SOT363-6~D

SML1CLK

SML1DATA

CLK_PCI_TPM (40)

LAN_25M (41)

CLK_PCI_TPM

1

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

GPIO74

PCH_LID_SW_IN#

DRAMRST_CNTRL_PCH

+3VS

RH71

2.2K_0402_5%~D

2

5

3

4

QH2B

+3VS

ST

6 1

QH3A

@QH3A

DMN66D0LDW-7_SOT363-6~D

@

DMN66D0LDW-7_SOT363-6~D

CLKIN_GND1 CLKIN_DMI# CLKIN_DMI CLKIN_DOT96# CLKIN_DOT96 CLKIN_SATA# CLKIN_SATA CLK_PCH_14M

If use extenal CLK gen, please place close to CLK gen else, please place close to PCH

XTAL25_IN

XTAL25_OUT

PT PT

CH27

15P_0402_50V8J~D

QT

EMI Request

12

CH13

10P_0402_50V8J~D

RH45 2.2K_0402_5%~DRH45 2.2K_0402_5%~D

1 2

RH46 2.2K_0402_5%~DRH46 2.2K_0402_5%~D

1 2

RH47 2.2K_0402_5%~D RH47 2.2K_0402_5%~D

1 2

RH49 2.2K_0402_5%~D RH49 2.2K_0402_5%~D

1 2

RH50 2.2K_0402_5%~DRH50 2.2K_0402_5%~D

1 2

RH51 2.2K_0402_5%~DRH51 2.2K_0402_5%~D

1 2

RH65 10K_0402_5%~DRH65 10K_0402_5%~D

1 2

RH63 10K_0402_5%~DRH63 10K_0402_5%~D

1 2

RH53

+3VS

12

RH72

2.2K_0402_5%~D

PCH to DDR, XDP, TP, FFS, AMP

PT

2

5

3

4

QH3B

@QH3B

@

RH55 10K_0402_5%~DRH55 10K_0402_5%~D

1 2

RH56 10K_0402_5%~DRH56 10K_0402_5%~D

1 2

RH57 10K_0402_5%~DRH57 10K_0402_5%~D

1 2

RH58 10K_0402_5%~DRH58 10K_0402_5%~D

1 2

RH59 10K_0402_5%~DRH59 10K_0402_5%~D

1 2

RH60 10K_0402_5%~DRH60 10K_0402_5%~D

1 2

RH61 10K_0402_5%~DRH61 10K_0402_5%~D

1 2

RH62 10K_0402_5%~DRH62 10K_0402_5%~D

1 2

RH89 1M_0402_5%~DRH89 1M_0402_5%~D

1 2

YH2

1

IN

OUT

2

GND

25MHZ_18PF_X3G025000DI1H-H~D

1

2

1K_0402_5%~D

PCH_SMBCLK (6,14,15,39,43)

PCH_SMBDATA (6,14,15,39,43)

PCH to EC

PT

3

4

+3V_PCH

PCH_SMLCLK (25,35,38)

PCH_SMLDATA (25,35,38)

1

CH28

CH28 15P_0402_50V8J~D

15P_0402_50V8J~D

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

LA-7851P

1

17 66Monday, March 26, 2012

0.1

5

Compal Electronics, Inc.

UH1C

DMI_CTX_PRX_N0( 7) DMI_CTX_PRX_N1( 7) DMI_CTX_PRX_N2( 7) DMI_CTX_PRX_N3( 7)

DMI_CTX_PRX_P0(7) DMI_CTX_PRX_P1(7) DMI_CTX_PRX_P2(7) DMI_CTX_PRX_P3(7)

DMI_CRX_PTX_N0(7)

D D

XDP_DBRESET#( 6,8)

C C

PM_DRAM_PWRGD(8)

PCH_RSMRST#(38)

PT

SUSPWRDNACK(38)

PBTN_OUT#(6,38)

AC_PRESENT(38)

PCH_GPIO72

RI#

B B

WAKE#

AC_PRESENT

PT

SUSPWRDNACK

PCH_RSMRST#

SYS_PWROK

A A

PCH_PWROK(38)

DMI_CRX_PTX_N1(7) DMI_CRX_PTX_N2(7) DMI_CRX_PTX_N3(7)

DMI_CRX_PTX_P0(7) DMI_CRX_PTX_P1(7) DMI_CRX_PTX_P2(7) DMI_CRX_PTX_P3(7)

+1.05VS_VCC_EXP

RH99 49.9_ 0402_1%RH99 49.9_0402_1%

1 2

RH100 750_0402_1%~DRH100 750_0402_1%~D

1 2

4mil width and place within 500mil of the PCH

PCH_PWROK

RH116 10K_0402_5%~DRH116 10K_0402_5%~D

RH117 10K_0402_5%~DRH117 10K_0402_5%~D

RH118 10K_0402_5%~DRH118 10K_0402_5%~D

RH121 10K_0402_5%~DRH121 10K_0402_5%~D

RH124 10K_0402_5%~DRH124 10K_0402_5%~D

RH127 10K_0402_5%~DRH127 10K_0402_5%~D

RH130 10K_0402_5%~DRH130 10K_0402_5%~D

VGATE(6 ,38,59)

RH104 0_0402_5%~D@RH104 0_0402_5%~D@

PCH_RSMRST# PCH_RSMRST#_R

AC_PRESENT

1 2

PCH_PWROK

5

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

DMI_IRCOMP

RBIAS_CPY

SUSACK#

T36PAD~D@ T36PAD~D@

XDP_DBRESET#

SYS_PWROK

1 2

ST

RH105 0_0402 _5%~D

RH106 0_0402 _5%~D

ST

RH108 0_0402 _5%~D

ST

RH110 0_0402 _5%~D

RH112 0_0402 _5%~D

1

2

PM_PWROK_R

SHORT

1 2

APWROK_R

SHORT

1 2

PM_DRAM_PWRGD

SHORT

1 2

SUSPWRDNACK

PBTN_OUT#_R

SHORT

1 2

AC_PRESENT_R

SHORT

1 2

PCH_GPIO72

RI#

+3V_PCH

+3VS

5

UH3

IN1

VCC

OUT

IN2

GND

MC74VHC1G08DFT2G_SC70-5

3

4

1

2

SYS_PWROK

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPW RDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

BD82HM77 QPRG C1 BGA 989P

@

PCH Strap PIN

DSWVRMEN Deep S4/S5 Well On-Die Voltage Regulator Enable

DSWODVREN

H：Enable

*

L：Disable

If strap is sampled high, the Integrated Deep S4/S5 Well (DSW) On-Die VR mode is enabled

CH30

0.1U_0402_16V7K~D

4

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6

DMI

System Power Management

RH119 330K_0402_5%RH119 330K_0402_5 %

RH122 330K_0402_5%@RH122 330K_0402_5%@

FDI_RXP7

FDI

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

12

4

BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9

BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

+RTCVCC

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWODVREN

SHORT

1 2

RH101 0_0402 _5%~D

WAKE#

PM_CLKRUN#

SUS_STAT#

SUSCLK_R

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

PM_SLP_A#

PM_SLP_SUS#

H_PM_SYNC

SHORT

1 2

RH103 0_0402 _5%~D

SHORT

1 2

RH111 0_0 402_5%~D

FDI_CTX_PRX_N0 ( 7) FDI_CTX_PRX_N1 ( 7) FDI_CTX_PRX_N2 ( 7) FDI_CTX_PRX_N3 ( 7) FDI_CTX_PRX_N4 ( 7) FDI_CTX_PRX_N5 ( 7) FDI_CTX_PRX_N6 ( 7) FDI_CTX_PRX_N7 ( 7)

FDI_CTX_PRX_P0 (7) FDI_CTX_PRX_P1 (7) FDI_CTX_PRX_P2 (7) FDI_CTX_PRX_P3 (7) FDI_CTX_PRX_P4 (7) FDI_CTX_PRX_P5 (7) FDI_CTX_PRX_P6 (7) FDI_CTX_PRX_P7 (7)

FDI_INT (7)

FDI_FSYNC0 (7)

FDI_FSYNC1 (7)

FDI_LSYNC0 (7)

FDI_LSYNC1 (7)

ST

T5 PAD~D @T5 PAD~D @

ST

T37 PAD~D @T37 PAD~D @

T35 PAD~D @T35 PAD~D @

H_PM_SYNC (8)

3

PCH_RSMRST#_RPCH_DPWROK

SSI2

WAKE_PCH# (38)

PM_CLKRUN# (40)

SUSCLK (38)

PM_SLP_S5# (38)

PM_SLP_S4# (38)

PM_SLP_S3# (38,40,43)

PT

+3VS

VGA_LVDDEN(35)

VGA_PWM(35 )

LVDS_DDC_CLK(35)

LVDS_DDC_DATA(35)

LVDS_ACLK-(35 ) LVDS_ACLK+(35)

LVDS_A0-(35) LVDS_A1-(35) LVDS_A2-(35)

LVDS_A0+(35) LVDS_A1+(35) LVDS_A2+(35)

PT

LVDS_BCLK-(35 ) LVDS_BCLK+(35)

LVDS_B0-(35) LVDS_B1-(35) LVDS_B2-(35)

LVDS_B0+(35) LVDS_B1+(35) LVDS_B2+(35)

RH137 2.2K_0402_5%~DRH137 2.2K_0402_5%~D

1 2

RH138 2.2K_0402_5%~DRH138 2.2K_0402_5%~D

1 2

RH123 2.37K_0402_1%~DRH123 2.37K_0402_1%~D

1 2

RH132 100K_0402_5%~DRH132 100K_0402_5%~ D

1 2

RH134 100K_0402_5%~DRH134 100K_0402_5%~ D

1 2

+3VS

RH136

8.2K_0402_5%~D

PM_CLKRUN#

1 2

T4PAD~D@ T4PAD~D@

ENBKL VGA_LVDDEN

LVDS_DDC_CLK LVDS_DDC_DATA

CTRL_CLK CTRL_DATA

LVDS_IBG

LVDS_ACLKLVDS_ACLK+

LVDS_A0LVDS_A1LVDS_A2-

LVDS_A0+ LVDS_A1+ LVDS_A2+

LVDS_BCLKLVDS_BCLK+

LVDS_B0LVDS_B1LVDS_B2-

LVDS_B0+ LVDS_B1+ LVDS_B2+

CRT_IREF

12

RH115

RH115 1K_0402_5%~D

1K_0402_5%~D

LVDS_DDC_CLK

LVDS_DDC_DATA

LVDS_IBG

VGA_LVDDEN

ENBKL

ENBKL(38)

2

UH1D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

BD82HM77 QPRG C1 BGA 989P

@

LVDS

CRT

+3VS

RH133 2.2K_0402_5%~DRH133 2.2K_0402_5%~D

RH135 2.2K_0402_5%~DRH135 2.2K_0402_5%~D

RH233 2.2K_0402_5%~DRH233 2.2K_0402_5%~D

RH234 2.2K_0402_5%~DRH234 2.2K_0402_5%~D

RH142 2.2K_0402_5%~D@ RH142 2.2K_0402_5%~D@

RH141 2.2K_0402_5%~D@ RH141 2.2K_0402_5%~D@

PCH Strap PIN

L_DDC_DATA

SDVO_CTRLDATA Port B Detected

RH120

@RH120

@

10K_0402_5%~D

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

DDPC_CTRLDATA Port C Detected

2

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

HDMI

DDPC_CTRLCLK

DDPC_CTRLDATA

mDP

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DMC

1 2

LVDS Detected

1

AP43 AP45

AM42 AM40

AP39

SDVO_INTN

AP40

SDVO_INTP

PCH_SDVO_CTRLCLK

P38

PCH_SDVO_CTRLDATA

M39

AT49

DDPB_AUXN

AT47

DDPB_AUXP

DDPB_HPD

DDPB_0N

DDPB_0P

DDPB_1N

DDPB_1P

DDPB_2N

DDPB_2P

DDPB_3N

DDPB_3P

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

HDMI_PCH_HPD#

AT40

HDMI_A2N_VGA

AV42

HDMI_A2P_VGA

AV40

HDMI_A1N_VGA

AV45

HDMI_A1P_VGA

AV46

HDMI_A0N_VGA

AU48

HDMI_A0P_VGA

AU47

HDMI_A3N_VGA

AV47

HDMI_A3P_VGA

AV49

DP_DDC_CLK

P46

DP_DDC_DATA

P42

PCH_DPC_AUXN

AP47

PCH_DPC_AUXP

AP49

DP_PCH_HPD

AT38

DISP_A0N_PCH

AY47

DISP_A0P_PCH

AY49

DISP_A1N_PCH

AY43

DISP_A1P_PCH

AY45

DISP_A2N_PCH

BA47

DISP_A2P_PCH

BA48

DISP_A3N_PCH

BB47

DISP_A3P_PCH

BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

CTRL_CLK

CTRL_DATA

PCH_SDVO_CTRLCLK

PCH_SDVO_CTRLDATA

DP_DDC_CLK

DP_DDC_DATA

0 = LVDS is not detected 1 = LVDS is detected

0 = Port B is not detected 1 = Port B is detected

0 = Port C is not detected 1 = Port C is detected

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (3/8) DMI,FDI,PM,GFX,DP

LA-7851P

PCH_SDVO_CTRLCLK (36)

PCH_SDVO_CTRLDATA (36)

HDMI_PCH_HPD# (36)

HDMI_A2N_VGA (36)

HDMI_A2P_VGA (36)

HDMI_A1N_VGA (36)

HDMI_A1P_VGA (36)

HDMI_A0N_VGA (36)

HDMI_A0P_VGA (36)

HDMI_A3N_VGA (36)

HDMI_A3P_VGA (36)

DP_DDC_CLK (37) DP_DDC_DATA (37)

PCH_DPC_AUXN (37) PCH_DPC_AUXP (37) DP_PCH_HPD (16,37)

DISP_A0N_PCH (37) DISP_A0P_PCH (37) DISP_A1N_PCH (37) DISP_A1P_PCH (37) DISP_A2N_PCH (37) DISP_A2P_PCH (37) DISP_A3N_PCH (37) DISP_A3P_PCH (37)

PU on DDC Dongle Side

1

0.1

18 66Monday, March 26, 2012

0.1

RPH1

RPH2

RPH3

5

WL_OFF#

18

PCI_PIRQB#

27

PCI_PIRQD#

36

PCI_PIRQC#

45

18

PCH_GPIO52

27

DGPU_PWR_EN#

36

DGPU_HOLD_RST#

45

18

PCI_PIRQA#

27

PCH_GPIO5

36

ODD_DA#

45

WL_OFF#

USB Conn 1 USB Conn 3 (Power share) USB Conn 2

+3VS

8.2K_0804_8P4R_5%

D D

8.2K_0804_8P4R_5%

GNT3# A16 Top-Block Swap Override (Internal PU 20K)

H：Enable

*

L：Default

RH243 1K_0402_5%~D@ RH243 1K_0402_5%~D@

C C

1 2

Boot BIOS Strap

RH245 1K_0402_5%~D@RH245 1K_0402_5%~D@

1 2

RH244 1K_0402_5%~D@RH244 1K_0402_5%~D@

1 2

GPIO19 => BBS_BIT0 GPIO51 => BBS_BIT1

BBS_BIT1

BBS_BIT0 (16)

Boot BIOS Strap

1

0

Boot BIOS Location

LPC

Reserved (NAND)

PCI

SPI

CLK_PCI_LPBACK(17)

CLK_PCI_LPC(38)

CLK_PCI_DEBUG(42)

CLK_PCI_LPBACK CLK_PCI_LPC CLK_PCI_DEBUG

BBS_BIT[1]

BBS_BIT[0]

0 0

0

1

1 1

*

B B

Reserve for EMI

CH14 10P_0402_50V8J~D@ CH14 10P_0402_50V8J~D@

1 2

CH26 10P_0402_50V8J~D@ CH26 10P_0402_50V8J~D@

1 2

PLT_RST#(6,8,38,40,41,42)

A A

5

CLK_PCI_LPC

CLK_PCI_DEBUG

12

RH155

RH155 100K_0402_5%~D

100K_0402_5%~D

+3VS

5

UH5

P

IN1

4

O

IN2

G

SN74AHC1G08DCKR_SC70-5

3

1

2

PCH_PLTRST#

RH157

@RH157

@

10K_0402_5%~D

1 2

4

USB3RN1(44) USB3RN2(45) USB3RN3(44)

USB3RP1(44) USB3RP2(45) USB3RP3(44)

USB3TN1(44) USB3TN2(45) USB3TN3(44)

USB3TP1(44) USB3TP2(45) USB3TP3(44)

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

DGPU_HOLD_RST# PCH_GPIO52 DGPU_PWR_EN#

BBS_BIT1

T6PAD~D @T6PAD~D @

T8PAD~D @T8PAD~D @ T9PAD~D @T9PAD~D @

EN_CAM WL_OFF#

FFS_INT1 ODD_DA# DP_CBL_DET PCH_GPIO5

PCH_PLTRST#

EN_CAM(35) WL_OFF#(42)

FFS_INT1(43)

ODD_DA#(43)

DP_CBL_DET(37)

RH144 22_0402_5%RH144 22_0402_5%

1 2

RH145 22_0402_5%RH145 22_0402_5%

1 2

RH146 22_0402_5%RH146 22_0402_5%

1 2

4

DGPU_PWR_EN(33,60)

USB3RN1 USB3RN2 USB3RN3

USB3RP1 USB3RP2 USB3RP3

USB3TN1 USB3TN2 USB3TN3

USB3TP1 USB3TP2 USB3TP3

CLK_PCI0 CLK_PCI1 CLK_PCI2 CLK_PCI3 CLK_PCI4

PT

0.01U_0402_16V7K~D

UH1E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

USB3Rn1

BC30

USB3Rn2

BE32

USB3Rn3

BJ32

USB3Rn4

BC28

USB3Rp1

BE30

USB3Rp2

BF32

USB3Rp3

BG32

USB3Rp4

AV26

USB3Tn1

BB26

USB3Tn2

AU28

USB3Tn3

AY30

USB3Tn4

AU26

USB3TP1

AY26

USB3Tp2

AV28

USB3Tp3

AW30

USB3Tp4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

BD82HM77 QPRG C1 BGA 989P

@

1

CH99

2

3

AY7

RSVD1

AV7

RSVD2

AU3

RSVD3

BG4

RSVD4

AT10

RSVD5

BC8

RSVD6

AU2

RSVD7

AT4

RSVD8

AT3

RSVD9

AT1

RSVD10

AY3

RSVD11

AT5

RSVD12

AV3

RSVD13

AV1

RSVD14

BB1

RSVD15

BA3

RSVD16

BB5

RSVD17

BB3

RSVD18

BB7

RSVD19

BE8

RSVD20

BD4

RSVD21

BF6

RSVD22

AV5

USB

ST

DGPU_PWR_EN#

2

G

QH6

3

RSVD23 RSVD24

RSVD25

RSVD26 RSVD27

RSVD28 RSVD29

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

AV10

AT8

AY5 BA2

AT12 BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

2011/08/25 2012/07/25

RSVD

USB30

PCI

+3VS

RH247

RH247 10K_0402_5%~D

10K_0402_5%~D

1 2

13

D

S

2N7002_SOT23-3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Intel Anti-Thef t Techonlogy

High=Endabled

NV_ALE

Low=Disable(floating)

NV_ALE

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2

USB20_N4 USB20_P4

USB20_N12 USB20_P12

RH139 1 K_0402_5%~D@R H139 1K_0402_5%~D@

USB20_N0 (44) USB20_P0 (44) USB20_N1 (45) USB20_P1 (45) USB20_N2 (44) USB20_P2 (44)

USB20_N4 (42) USB20_P4 (42)

USB20_N12 (35) USB20_P12 (35)

Within 500 mils

USBRBIAS

RH143 22.6_0402_1%RH143 22.6_0402_1%

1 2

USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#

PLTRST_VGA#(24)

Compal Secret Data

1 2

USB_OC0# (44,45) USB_OC1# (44)

12

RH154

RH154 100K_0402_5%~D

100K_0402_5%~D

Deciphered Date

2

*

+1.8VS

USB Conn 1

USB Conn 3 (Power share)

USB Conn 2

Mini Card(WLAN)

Camera

RH148 0_0402_5%~D@ RH148 0_0402_5%~D@

1 2

PT

+3VS_DELAY

5

UH4

1

P

IN1

4

O

2

IN2

G

SN74AHC1G08DCKR_SC70-5

3

2

USB_OC4# USB_OC0# USB_OC6# USB_OC5#

USB_OC1# USB_OC2# USB_OC3# USB_OC7#

RH151 0_0402_5%~D@ RH151 0_0402_5%~D@

QT

RH152 0_0402_5%~D

12

RH156

RH156 100K_0402_5%~D

100K_0402_5%~D

1

+3V_PCH

RPH4

4 5 3 6 2 7 1 8

10K_1206_8P4R_5%~D

RPH5

4 5 3 6 2 7 1 8

10K_1206_8P4R_5%~D

1 2

SHORT

1 2

Title

PCH (4/8) PCI, USB, NVRAM

Size Document Number Rev

LA-7851P

Date: Sheet of

PCH_PLTRST#

DGPU_HOLD_RST#

Compal Electronics, Inc.

1

DGPU_PWROK (20,37,60)

19 66Monday, March 26, 2012

0.1

5

+3V_PCH

RH189 10K_0402_5%~DRH189 10K_0402_5%~D

1 2

RH183 10K_0402_5%~DRH183 10K_0402_5%~D

1 2

RH179 10K_0402_5%~DRH179 10K_0402_5%~D

1 2

+3VS

RH160 10K_0402_5%~DRH160 10K_0402_5%~D

D D

1 2

RH184 10K_0402_5%~DRH184 10K_0402_5%~D

1 2

RH172 10K_0402_5%~DRH172 10K_0402_5%~D

1 2

RH176 10K_0402_5%~DRH176 10K_0402_5%~D

1 2

RH174 8.2K_0402_5%~DRH174 8.2K_0402_5%~D

1 2

RH180 10K_0402_5%~DRH180 10K_0402_5%~D

1 2

RH171 200K_0402_5%RH171 200K_0402_5%

1 2

RH185 10K_0402_5%~DRH185 10K_0402_5%~D

1 2

RH190 10K_0402_5%~DRH190 10K_0402_5%~D

1 2

RH177 10K_0402_5%~DRH177 10K_0402_5%~D

1 2

RH182 10K_0402_5%~DRH182 10K_0402_5%~D

1 2

EC_SMI#

PCH_GPIO12

HDD_DETECT#

PCH_GPIO0

PCH_GPIO6

PCIE_MCARD1_DET#

PCH_GPIO22

BT_RADIO_DIS#

PCH_GPIO49

ODD_DETECT#

DGPU_PWROK

EC_SCI#

LCD_DBC

LCD_DCR

SSI2

LCD_DBC(35)

SSI2

PCH Strap PIN

C C

GPIO15 TLS Confidentiality

Low - Intel ME Crypto Transpor t Layer Securit y (TLS) cipher suite wi th no confident iality High - Intel ME Crypto Transpo rt Layer Securi ty (TLS) cipher suite wi th confidential ity

*

+3V_PCH

RH158 1K_0402_5%~DRH158 1K_0402_5%~D

1 2

GPIO28 On-Die PLL Voltage Regulator

This signal has a weak internal pull up

H：On-Die voltage regulator enabl e

*

L：On-Die PLL Volt age Regulator d isable

RH165 1K_0402_5%~D@RH165 1K_0402_5%~D@

1 2

B B

PCH_GPIO15

PCH_GPIO28

LCD_DCR(35)

SATA3GP/GPIO37 Reserved

When Unused as GPIO or SATA*GP Use 8.2K-10K pu ll-down to grou nd

4

UH1F

PCH_GPIO1

QT

EC_SCI#(38)

EC_SMI#(38)

ODD_DETECT#(43)

DGPU_PWROK(19,37,60)

T38PAD~D @T38PA D~D @

BT_RADIO_DIS#(42)

T46PAD~D @T46PA D~D @

PCIE_MCARD1_DET#(42)

FFS_INT2(43)

HDD_DETECT#(43)

PCH_GPIO0

PCH_GPIO6

EC_SCI#

EC_SMI#

PCH_GPIO12

PCH_GPIO15

ODD_DETECT#

DGPU_PWROK

PCH_GPIO22

PCH_GPIO27

PCH_GPIO28

BT_RADIO_DIS#

LCD_DBC

PCH_GPIO36

PCH_GPIO37

PCIE_MCARD1_DET#

LCD_DCR

FFS_INT2

PCH_GPIO49

HDD_DETECT#

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

BD82HM77 QPRG C1 BGA 989P

@

3

ODD_EN#

A20GATE

PECI

RCIN#

THRMTRIP#

INIT3_3V#

DF_TVS

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

C40

KB_BL_DET

B41

DGPU Board ID

C41

USB_MCARD1_DET#

A40

GATEA20

P4

PCH_PECI_R

AU16

KB_RST#

P5

AY11

H_THERMTRIP#_C

AY10

INIT3_3V#

T14

NV_CLE

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

DMI and FDI Tx/ Rx Termination Voltage

NV_CLE

GPIO

NCTF

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

PROCPWRGD

CPU/MISC

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

2

ODD_EN# (43)

KB_BL_DET (39)

USB_MCARD1_DET# (42)

RH159 10K_0402_5%~DRH159 10K_0402_5%~D

1 2

RH161 0_0402_5%~D@ RH161 0_0402_5%~D@

1 2

KB_RST# (38)

H_CPUPWRGD (6,8)

RH162 390_0402_5%RH162 390_0402_5%

1 2

T28 PAD~D@T28 PAD~D@

+3VS

GATEA20 (38)

H_PECI (8,38)

H_THERMTRIP# (8)

INIT3_3V

This signal has weak internal PU, can't pull low

+VCCPNAND

Weak internal PU,Do not pull low

RH167 1K_0402_5%~D RH167 1K_0402_5%~D

1 2

12

RH166

2.2K_0402_5%~D

CLOSE TO THE BRANCHING POINT

This signal is a strap for sel ecting DMI and FDI termination vol tage.

DMI Termination Voltage

Set to Vcc when HIGH

NV_CLE

Set to Vss when LOW

1

ODD_EN#

KB_RST#

RN178 10K_0402_5%~DRN178 10K_0402_5%~D

1 2

RH175 10K_0402_5%~DRH175 10K_0402_5%~D

1 2

DGPU Board ID Optional

DGPU Board ID

N13P

H_SNB_IVB# (8)

+3VS

12

DP1.2@

RH186

10K_0402_5%~D

12

DP1.1@

RH187

10K_0402_5%~D

0 = GV(DP1.1@)Graphics

1 = GS(DP1.2@)

+3VS

RH169 10K_0402_5%~DRH169 10K_0402_5%~D

1 2

A A

5

PCH_GPIO37

+3VS

12

TPM@ RH163

TPM@

10K_0402_5%~D

12

NTPM@ RH164

NTPM@

10K_0402_5%~D

RH163

PCH_GPIO1

RH164

4

QT

TPM BOM Optional

PCH_GPIO1

1 = W/TPM

TPM

0 = W/O TPM

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (5/8) GPIO, CPU, MISC

LA-7851P

1

20 66Monday, March 26, 2012

0.1

5

4

3

2

1

D D

UH1G

+VCCP

C C

+VCCP

+3VS

@

JP2

12

PAD-OPEN 43x39

+VCCP

LH3 1U H_LB2012T1R0M_20%~D@LH3 1UH_LB2012T1R0M_20%~D@

Place CH42 Near BJ22 pin

@

JP3

12

PAD-OPEN 43x39

+1.05VS_VCCCORE

1

2

1 2

+1.05VS_VCC_EXP

10U_0805_10V6M~D

1

CH45

2

10U_0805_10V6M~D

CH35

1U_0402_6.3V6K~D

1

CH46

2

1U_0402_6.3V6K~D

CH36

1

2

+VCCP

1

@

CH42

10U_0805_10V6M~D

2

+1.05VS_VCC_EXP

1U_0402_6.3V6K~D

1

CH47

2

1U_0402_6.3V6K~D

CH37

CH38

1

2

+VCCAPLLEXP

3799mA

1U_0402_6.3V6K~D

1

CH49

CH48

2

1730mA

178mA

1

CH51

0.1U_0402_10V7K~D

B B

+VCCP

RH194 0_0603_5%~D@ RH194 0_0603_5%~D@

1 2

Place CH53 Near BG6 pin

0.1U_0402_10V7K~D

2

1

CH53

@CH53

@

1U_0402_6.3V6K~D

2

147mA

+VCCAFDI_VRM

+1.05VS_VCCAPLL_FDI

+VCCP

47mA

+VCCP

UH1G

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

BD82HM77 QPRG C1 BGA 989P

@

POWER

VCC CORE

VCCIO

FDI

CRTLVDS

DMI

DFT / SPI HVCMOS

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCDFTERM[1]

VCCDFTERM[2]

VCCDFTERM[3]

VCCDFTERM[4]

VCCSPI

U48

U47

AK36

AK37

AM37

AM38

AP36

AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

63mA

+VCCADAC

1mA

+VCCTX_LVDS

178mA

147mA

+VCCAFDI_VRM

47mA

75mA

2mA

+VCCPNAND

10mA

1

CH32

0.01U_0402_16V7K~D

2

1

CH33

0.1U_0402_10V7K~D

2

LH1 B LM18PG181SN1_0603~DLH1 BLM18PG181SN1_0603 ~D

1

2

40mA

LH2 0.1U H_MLF1608DR10KT_10%_1608LH2 0.1U H_MLF1608DR10KT_10%_1608

0.01U_0402_16V7K~D

1

CH39

2

+3VS

1

CH43

0.1U_0402_10V7K~D

2

+VCCAFDI_VRM +1.5VS

+VCCP

1

CH50

CH50 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

1

CH52

0.1U_0402_10V7K~D

2

+3V_VCCPSPI

1

CH54

CH54 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

0.01U_0402_16V7K~D

1

CH40

2

22U_0805_6.3V6M~D

1

2

ST

RH197 0_0603_5%~DSHORTRH197 0_0603_5%~DSHORT

JP16

@ JP16

@

PAD-OPEN 43x39

@ JP17

@

PAD-OPEN 43x39

CH41

1 2

12

JP17

12

1 2

+1.8VS

+3V_PCH

1 2

CH34

10U_0805_10V6M~D

0.1uH inductor, 200mA

+VCCP

1

2

PT

+3VS

CH44

CH44 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+3VS

+1.8VS

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

1.05

S0 Iccmax Current (A)

0.002

5

0.001

0.178

0.063

0.0075

1.73

0.047

1.05VccIO 3.799

1.05VccASW 0.803

3.3VccSPI 0.0 1

3.3VccDSW 0.0 01

1.8 0.19VccpNAND

3.3VccRTC NA

3.3VccSus3_3

3.3 / 1.5Vc cSusHDA

0.065

0.01

VccVRM 1.8 / 1.5 0.147

1.05VccCLKDMI

0.075

VccSSC 1.05 0 .095

VccDIFFCLKN 1. 05 0.050

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.04

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (6/8) PWR

LA-7851P

1

0.1

21 66Monday, March 26, 2012

0.1

5

4

3

2

1

+VCCP

RH198 0_0603_5%~D@ RH198 0_0603_5%~D@

+3V_PCH

ST

RH199 0_0603_5%~DSHORTRH199 0_0603_5%~DSHORT

1 2

D D

+VCCP

PT

LH4 10 UH_LBR2012T100M_20%~D@ LH4 10UH_LBR2 012T100M_20%~D@

1 2

+VCCP

C C

+VCCP

PT

LH7 10 UH_LBR2012T100M_20%~DLH7 10UH_LBR2012T100M_20%~D

1 2

LH8 10 UH_LBR2012T100M_20%~DLH8 10UH_LBR2012T100M_20%~D

1 2

B B

A A

RH219 0_0603_5%~D@ RH219 0_0603_5%~D@

1 2

5

1

2

JP18

PAD-OPEN 43x39

+VCCP

+1.05VM_VCCSUS

CH59

@CH59

@

10U_0805_10V6M~D

@

12

220U_B2_2.5VM_R15M

1

CH94

1

+

2

1

CH80

CH80 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

1

CH82

CH82 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

1

CH84

CH84 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

1

CH87

4.7U_0603_6.3V6K~D

2

1 2

1

2

@CH58

@

0.1U_0402_10V7K~D

+VCCP

+1.05VM_VCCASW

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

220U_B2_2.5VM_R15M

1U_0402_6.3V6K~D

1

CH95

CH96

1

+

2

CH55

0.1U_0402_10V7K~D

1

CH58

2

22U_0805_6.3V6M~D

1

2

1U_0402_6.3V6K~D

1

2

1U_0402_6.3V6K~D

CH97

1

CH79

0.1U_0402_10V7K~D

2

1

CH85

0.1U_0402_10V7K~D

2

1

CH88

0.1U_0402_10V7K~D

2

+RTCVCC+VCCP

1

CH90

0.1U_0402_10V7K~D

2

1 2

1

2

22U_0805_6.3V6M~D

CH66

1U_0402_6.3V6K~D

CH69

+VCCSST

+1.05VM_VCCSUS

1

2

1

2

1

2

+PCH_VCCDSW

+VCCAPLL_CPY_PCH

+VCCSUS1

CH62

@CH62

@

1U_0402_6.3V6K~D

803mA

1U_0402_6.3V6K~D

CH70

1

2

+VCCRTCEXT

+VCCAFDI_VRM

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

CH86

@CH86

@

1U_0402_6.3V6K~D

CH89

0.1U_0402_10V7K~D

CH91

0.1U_0402_10V7K~D

+3VS

CH75 1U_0402_6.3V6K~DC H75 1U_0402_6.3V6K~D

1

CH65

2

CH68

1

2

4

+VCCACLK

1mA

+VCCPDSW

75mA

50mA

95mA

2mA

AD49

T16

V12

T38

BH23

AL29

AL24

AA19

AA21

AA24

AA26

AA27

AA29

AA31

AC26

AC27

AC29

AC31

AD29

AD31

W21

W23

W24

W26

W29

W31

W33

N16

Y49

BD47

BF47

AF17 AF33 AF34 AG34

AG33

V16

T17 V19

BJ8

A22

@

1

CH92

1U_0402_6.3V6K~D

2

UH1J

VCCACLK

VCCDSW3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2

VCCIO[14]

DCPSUS[3]

VCCASW[1]

VCCASW[2]

VCCASW[3]

VCCASW[4]

VCCASW[5]

VCCASW[6]

VCCASW[7]

VCCASW[8]

VCCASW[9]

VCCASW[10]

VCCASW[11]

VCCASW[12]

VCCASW[13]

VCCASW[14]

VCCASW[15]

VCCASW[16]

VCCASW[17]

VCCASW[18]

VCCASW[19]

VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA

VCCADPLLB

VCCIO[7] VCCDIFFCLKN[1] VCCDIFFCLKN[2] VCCDIFFCLKN[3]

VCCSSC

DCPSST

DCPSUS[1] DCPSUS[2]

V_PROC_IO

VCCRTC

BD82HM77 QPRG C1 BGA 989P

POWER

Clock and Miscellaneous

CPURTC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCI/GPIO/LPCMISC

SATA USB

HDA

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

V5REF_SUS

VCCSUS3_3[1]

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCCAPLLSATA

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

3

+VCCP

3799mA

N26

VCCIO[29]

P26

VCCIO[30]

P28

VCCIO[31]

T27

VCCIO[32]

T29

VCCIO[33]

VCCIO[34]

DCPSUS[4]

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

65mA

1mA

+PCH_V5REF_SUS

1mA

+PCH_V5REF_RUN

P34

V5REF

N20

N22

P20

P22

AA16

VCC3_3[1]

W16

VCC3_3[8]

T34

VCC3_3[4]

AJ2

VCC3_3[2]

AF13

VCCIO[5]

AH13

VCCIO[12]

AH14

VCCIO[13]

AF14

VCCIO[6]

AK1

AF11

VCCVRM[1]

AC16

VCCIO[2]

AC17

VCCIO[3]

AD17

VCCIO[4]

T21

V21

T19

P32

2011/08/25 2012/07/25

178mA

+VCCSATAPLL

+VCCAFDI_VRM

803mA

+3V_PCH

10mA

1

2

+3V_PCH

1

2

+VCCAFDI_VRM

+VCCP

1

CH93

0.1U_0402_10V7K~D

2

Compal Secret Data

Deciphered Date

CH56

CH56 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

CH60

0.1U_0402_10V7K~D

+3V_PCH

1

0.1U_0402_10V7K~D

2

+3VS

1

CH77

0.1U_0402_10V7K~D

2

ST

RH222 0_0805_5%~DSHORTRH222 0_0805_5%~DSHORT

1

CH83

CH83 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

CH67

+3V_PCH

1 2

+3V_PCH

1

CH71

1U_0402_6.3V6K~D

2

1

CH61

0.1U_0402_10V7K~D

2

+VCCA_USBSUS+VCCA_USBSUS

+3VS

1

2

+VCCP

1

CH78

CH78 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+VCCP+1.05VS_VCC_SATA

+VCCP

1

@CH63

@

1U_0402_6.3V6K~D

2

CH73

0.1U_0402_10V7K~D

+3VS

LH6 10 UH_LBR2012T100M_20%~D@ LH6 10UH_LBR2 012T100M_20%~D@

1 2

1

CH81

@CH81

@

10U_0805_10V6M~D

2

SSI2

+3V_PCH+5V_PCH

21

12

DH2

12

+VCCP

1

2

+3VS+5VS

21

1

2

1

DH2 RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

+PCH_V5REF_SUS

CH64

0.1U_0603_25V7K~D

DH3

DH3 RB751S40T1_SOD523-2~D

RB751S40T1_SOD523-2~D

+PCH_V5REF_RUN

CH72

CH72 1U_0603_10V6K~D

1U_0603_10V6K~D

22 66Monday, March 26, 2012

RH208

10_0402_1%~D

CH63

RH212

10_0402_1%~D

1

CH76

0.1U_0402_10V7K~D

2

PT

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PCH (7/8) PWR

LA-7851P

0.1

5

UH1H

D D

C C

B B

A A

UH1H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

BD82HM77 QPRG C1 BGA 989P

@

4

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

3

UH1I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

BD82HM77 QPRG C1 BGA 989P

@

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

2

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (8/8) VSS

LA-7851P

1

0.1

23 66Monday, March 26, 2012

0.1

5

UV1

N13P-GV-B-A2

GV@

D D

PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_N0

PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_N1

PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_N2

PEG_GTX_C_HRX_P3 PEG_GTX_C_HRX_N3

PEG_GTX_C_HRX_P4 PEG_GTX_C_HRX_N4

PEG_GTX_C_HRX_P5 PEG_GTX_C_HRX_N5

PEG_GTX_C_HRX_P6 PEG_GTX_C_HRX_N6

PEG_GTX_C_HRX_P7 PEG_GTX_C_HRX_N7

PEG_GTX_C_HRX_P8 PEG_GTX_C_HRX_N8

PEG_GTX_C_HRX_P9 PEG_GTX_C_HRX_N9

C C

PEG_GTX_C_HRX_P10 PEG_GTX_C_HRX_N10

PEG_GTX_C_HRX_P11 PEG_GTX_C_HRX_N11

PEG_GTX_C_HRX_P12 PEG_GTX_C_HRX_N12

PEG_GTX_C_HRX_P13 PEG_GTX_C_HRX_N13

PEG_GTX_C_HRX_P14 PEG_GTX_C_HRX_N14

PEG_GTX_C_HRX_P15 PEG_GTX_C_HRX_N15

UV1

GVR1@

S IC N13P-GV-B-A2 FCBGA 908P GPU

B B

UV1

GVR3@

S IC N13P-GV-B-A2 FCBGA 908P GPU A31 !

UV1

GSR1@

S IC N13P-GS-A2 FCBGA 908P GPU

UV1

GSR3@

S IC N13P-GS-A2 FCBGA 908P GPU A31 !

A A

ST

PEG_HTX_C_GRX_P[0..15](7)

PEG_HTX_C_GRX_N[0..15](7)

PEG_GTX_C_HRX_P[0..15](7)

PEG_GTX_C_HRX_N[0..15](7)

CV531 0.22U_0402_16V 7K~DC V531 0.22U_0402_16V7K~D CV532 0.22U_0402_16V 7K~DC V532 0.22U_0402_16V7K~D

CV533 0.22U_0402_16V7K~DCV 533 0.22U_04 02_16V7K~D CV534 0.22U_0402_16V 7K~DC V534 0.22U_0402_16V7K~D

CV535 0.22U_0402_16V7K~DCV 535 0.22U_04 02_16V7K~D CV536 0.22U_0402_16V 7K~DC V536 0.22U_0402_16V7K~D

CV537 0.22U_0402_16V7K~DCV 537 0.22U_04 02_16V7K~D CV538 0.22U_0402_16V 7K~DC V538 0.22U_0402_16V7K~D

CV539 0.22U_0402_16V7K~DCV 539 0.22U_04 02_16V7K~D CV540 0.22U_0402_16V 7K~DC V540 0.22U_0402_16V7K~D

CV541 0.22U_0402_16V7K~DCV 541 0.22U_04 02_16V7K~D CV542 0.22U_0402_16V 7K~DC V542 0.22U_0402_16V7K~D

CV543 0.22U_0402_16V7K~DCV 543 0.22U_04 02_16V7K~D CV544 0.22U_0402_16V 7K~DC V544 0.22U_0402_16V7K~D

CV545 0.22U_0402_16V7K~DCV 545 0.22U_04 02_16V7K~D CV546 0.22U_0402_16V 7K~DC V546 0.22U_0402_16V7K~D

CV547 0.22U_0402_16V7K~DCV 547 0.22U_04 02_16V7K~D CV548 0.22U_0402_16V 7K~DC V548 0.22U_0402_16V7K~D

CV550 0.22U_0402_16V7K~DCV 550 0.22U_04 02_16V7K~D CV551 0.22U_0402_16V 7K~DC V551 0.22U_0402_16V7K~D

CV552 0.22U_0402_16V7K~DCV 552 0.22U_04 02_16V7K~D CV557 0.22U_0402_16V 7K~DC V557 0.22U_0402_16V7K~D

CV558 0.22U_0402_16V7K~DCV 558 0.22U_04 02_16V7K~D CV559 0.22U_0402_16V 7K~DC V559 0.22U_0402_16V7K~D

CV560 0.22U_0402_16V7K~DCV 560 0.22U_04 02_16V7K~D CV561 0.22U_0402_16V 7K~DC V561 0.22U_0402_16V7K~D

CV562 0.22U_0402_16V7K~DCV 562 0.22U_04 02_16V7K~D CV563 0.22U_0402_16V 7K~DC V563 0.22U_0402_16V7K~D

CV564 0.22U_0402_16V7K~DCV 564 0.22U_04 02_16V7K~D CV565 0.22U_0402_16V 7K~DC V565 0.22U_0402_16V7K~D

CV566 0.22U_0402_16V7K~DCV 566 0.22U_04 02_16V7K~D CV567 0.22U_0402_16V 7K~DC V567 0.22U_0402_16V7K~D

QT

12 12

PEG_A_CLKRQ#(17)

PEG_HTX_C_GRX_P[0..15]

PEG_HTX_C_GRX_N[0..15]

PEG_GTX_C_HRX_P[0..15]

PEG_GTX_C_HRX_N[0..15]

PEG_GTX_HRX_P0 PEG_GTX_HRX_N0

PEG_GTX_HRX_P1 PEG_GTX_HRX_N1

PEG_GTX_HRX_P2 PEG_GTX_HRX_N2

PEG_GTX_HRX_P3 PEG_GTX_HRX_N3

PEG_GTX_HRX_P4 PEG_GTX_HRX_N4

PEG_GTX_HRX_P5 PEG_GTX_HRX_N5

PEG_GTX_HRX_P6 PEG_GTX_HRX_N6

PEG_GTX_HRX_P7 PEG_GTX_HRX_N7

PEG_GTX_HRX_P8 PEG_GTX_HRX_N8

PEG_GTX_HRX_P9 PEG_GTX_HRX_N9

PEG_GTX_HRX_P10 PEG_GTX_HRX_N10

PEG_GTX_HRX_P11 PEG_GTX_HRX_N11

PEG_GTX_HRX_P12 PEG_GTX_HRX_N12

PEG_GTX_HRX_P13 PEG_GTX_HRX_N13

PEG_GTX_HRX_P14 PEG_GTX_HRX_N14

PEG_GTX_HRX_P15 PEG_GTX_HRX_N15

RV286 200_0402_1%@RV286 200_0402_1 %@

+3VS_DELAY

2

ST

1 3

D

QV39

2N7002_SOT23-3

RH52 0_0402_5%~D@RH52 0_0402_5%~D@

1 2

G

S

4

PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_N0 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_P4 PEG_HTX_C_GRX_N4 PEG_HTX_C_GRX_P5 PEG_HTX_C_GRX_N5 PEG_HTX_C_GRX_P6 PEG_HTX_C_GRX_N6 PEG_HTX_C_GRX_P7 PEG_HTX_C_GRX_N7 PEG_HTX_C_GRX_P8 PEG_HTX_C_GRX_N8 PEG_HTX_C_GRX_P9 PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_P10 PEG_HTX_C_GRX_N10 PEG_HTX_C_GRX_P11 PEG_HTX_C_GRX_N11 PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_P15 PEG_HTX_C_GRX_N15

PEG_GTX_HRX_P0 PEG_GTX_HRX_N0 PEG_GTX_HRX_P1 PEG_GTX_HRX_N1 PEG_GTX_HRX_P2 PEG_GTX_HRX_N2 PEG_GTX_HRX_P3 PEG_GTX_HRX_N3 PEG_GTX_HRX_P4 PEG_GTX_HRX_N4 PEG_GTX_HRX_P5 PEG_GTX_HRX_N5 PEG_GTX_HRX_P6 PEG_GTX_HRX_N6 PEG_GTX_HRX_P7 PEG_GTX_HRX_N7 PEG_GTX_HRX_P8 PEG_GTX_HRX_N8 PEG_GTX_HRX_P9 PEG_GTX_HRX_N9 PEG_GTX_HRX_P10 PEG_GTX_HRX_N10 PEG_GTX_HRX_P11 PEG_GTX_HRX_N11 PEG_GTX_HRX_P12 PEG_GTX_HRX_N12 PEG_GTX_HRX_P13 PEG_GTX_HRX_N13 PEG_GTX_HRX_P14 PEG_GTX_HRX_N14 PEG_GTX_HRX_P15 PEG_GTX_HRX_N15

CLK_PEG_VGA(17) CLK_PEG_VGA#(17)

PLTRST_VGA#(19)

CLK_REQ#

PEX_TSTCLK_OUT PEX_TSTCLK_OUT#

PLTRST_VGA#

12

RV290

2.49K_0402_1%~D

QT QT

10P_0402_50V8J~D

RV285

RV285 10K_0402_5%~D

10K_0402_5%~D

1 2

CLK_REQ#

10P_0402_50V8J~D

AN12 AM12 AN14 AM14

AN15 AM15 AN17 AM17

AN18 AM18 AN20 AM20

AN21 AM21 AN23 AM23

AN24 AM24 AN26 AM26

AN27 AM27

AH14 AG14

AH17 AG17

AH20 AG20

AH23 AG23

CV575

AP14 AP15

AP17 AP18

AP20 AP21

AP23 AP24

AP26 AP27

AK14

AJ14

AK15

AJ15 AL16 AK16 AK17

AJ17

AK18

AJ18 AL19 AK19 AK20

AJ20

AK21

AJ21 AL22 AK22 AK23

AJ23

AK24

AJ24 AL25 AK25

AL13 AK13 AK12

AJ26 AK26

AJ12 AP29

GS@

UV1A

PEX_RX0 PEX_RX0_N PEX_RX1 PEX_RX1_N PEX_RX2 PEX_RX2_N PEX_RX3 PEX_RX3_N PEX_RX4 PEX_RX4_N PEX_RX5 PEX_RX5_N PEX_RX6 PEX_RX6_N PEX_RX7 PEX_RX7_N PEX_RX8 PEX_RX8_N PEX_RX9 PEX_RX9_N PEX_RX10 PEX_RX10_N PEX_RX11 PEX_RX11_N PEX_RX12 PEX_RX12_N PEX_RX13 PEX_RX13_N PEX_RX14 PEX_RX14_N PEX_RX15 PEX_RX15_N

PEX_TX0 PEX_TX0_N PEX_TX1 PEX_TX1_N PEX_TX2 PEX_TX2_N PEX_TX3 PEX_TX3_N PEX_TX4 PEX_TX4_N PEX_TX5 PEX_TX5_N PEX_TX6 PEX_TX6_N PEX_TX7 PEX_TX7_N PEX_TX8 PEX_TX8_N PEX_TX9 PEX_TX9_N PEX_TX10 PEX_TX10_N PEX_TX11 PEX_TX11_N PEX_TX12 PEX_TX12_N PEX_TX13 PEX_TX13_N PEX_TX14 PEX_TX14_N PEX_TX15 PEX_TX15_N

PEX_REFCLK PEX_REFCLK_N PEX_CLKREQ_N

PEX_TSTCLK_OUT PEX_TSTCLK_OUT_N

PEX_RST_N PEX_TERMP

N13P-GS-A2

CLK_27M_IN

1

2

Part 1 of 7

27MHZ_12PF_X3G027000FC1H-H~D

PCI EXPRESS

ST

YV1

1

2

PEX_WAKE_N

DACA_GREEN

DACA_HSYNC DACA_VSYNC

DACsI2C GPIO

CLK

XTAL_OUTBUFF

IN

OUT

GND

3

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21

DACA_RED

DACA_BLUE

DACA_VDD DACA_VREF DACA_RSET

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL I2CC_SDA

I2CS_SCL

I2CS_SDA

PLLVDD

SP_PLLVDD

VID_PLLVDD

XTAL_IN

XTAL_OUT

XTAL_SSIN

3

4

GPU_VID_4

P6

GPU_VID_3

M3 L6

GPU_GPIO3 H_DPRSLPVR

P5 P7

GPU_VID_1

L7

GPU_VID_2

M7 N8

GPIO8

M1

THM_ALERT#

M2

FBVREF_ALTV

L1

GPU_VID_0

M5

GPU_HOT#_D

N3

GPU_VID_5

M4 N4 P2

GPU_GPIO16

R8 M6 R1

DP_HPD

P3 P4 P1

AJ11

AK9 AL10 AL9

AM9 AN9

AG10 AP9 AP8

I2CA_SCL

R4

I2CA_SDA

R5

I2CB_SCL

R7

I2CB_SDA

R6

I2CC_SCL

R2

I2CC_SDA

R3

EC_SMB_CK2_PX

T4

EC_SMB_DA2_PX

T3

AD8

AE8

AD7

CLK_27M_IN

H3

CLK_27M_OUT

H2

XTALSSIN

H1

XTALOUTBUFF

J4

CLK_27M_OUT

RH67 0_0402_5%~D@RH67 0_0402_5%~D@

RH54 0_0402_5%~D@RH54 0_0402_5%~D@

1 2

RV479 10K_0402_5%~DRV479 10K_0402_5%~D

+CLK_PLLVDD

1 2

RV287 10K_0402_5%~DRV287 1 0K_0402_5%~D

1 2

RV288 10K_0402_5%~DRV288 1 0K_0402_5%~D

1

CV576

10P_0402_50V8J~D

2

1 2

12

RV284

100K_0402_5%~D

EC_SMB_CK2_PX (25) EC_SMB_DA2_PX (25)

GPU_VID_4 (60) GPU_VID_3 (60)

GPU_VID_1 (60) GPU_VID_2 (60)

THM_ALERT# (25) FBVREF_ALTV (29,30,31,32) GPU_VID_0 (60)

GPU_VID_5 (60)

GPU_HOT#_D

DP_HPD (37)

2

+3VS_DELAY

12

0.1U_0402_10V7K~D

@

CV568

1

2

H_DPRSLPVR (60)

RV481

10K_0402_5%~D

0.1U_0402_10V7K~D

@

CV569

1

2

SSI2

DV11 RB751V-40_SOD323-2DV11 RB751V -40_SOD323-2

2 1

DV14 RB751V-40_SOD323-2@DV14 RB751V-40_SOD323-2@

2 1

4.7U_0603_6.3V6K~D

0.1U_0402_10V7K~D

CV570

0.1U_0402_10V7K~D

CV571

1

2

+3VS_DELAY

4.7U_0603_6.3V6K~D

1

CV572

2

RV292 2.2K_0402_5%~DRV292 2.2K_0402_5%~D

RV294 2.2K_0402_5%~DRV294 2.2K_0402_5%~D

RV296 2.2K_0402_5%~DRV296 2.2K_0402_5%~D

RV297 2.2K_0402_5%~DRV297 2.2K_0402_5%~D

RV298 10K_0402_5%~DRV298 10K_0402_5%~D

RV299 2.2K_0402_5%~DRV299 2.2K_0402_5%~D

RV300 2.2K_0402_5%~DRV300 2.2K_0402_5%~D

12

1 2

GPU_GPIO3

GPU_GPIO16

LV2

BLM18PG181SN1_0603~D

1 2

22U_0805_6.3V6M~D

CV573

1

2

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

GPIO8

I2CC_SCL

I2CC_SDA

1

+3VS_DELAY

RV482 10K_0402_5%~DRV482 10K_0402_5%~D

1 2

RV483 10K_0402_5%~DRV483 10K_0402_5%~D

1 2

GPU_HOT# (38)

GPU_VR_HOT# (38,60)

+1.05VSDGPU

PT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

1

0.1

of

24 66Monday, March 26, 2012

5

UV1D

AM6

IFPA_TXC

AN6

D D

C C

DISP_A0P_VGA(37) DISP_A0N_VGA(37) DISP_A1P_VGA(37) DISP_A1N_VGA(37) DISP_A2P_VGA(37) DISP_A2N_VGA(37) DISP_A3P_VGA(37) DISP_A3N_VGA(37)

B B

DISP_AUXP_VGA(37) DISP_AUXN_VGA(37)

A A

IFPA_TXC_N

AP3

IFPA_TXD0

AN3

IFPA_TXD0_N

AN5

IFPA_TXD1

AM5

IFPA_TXD1_N

AL6

IFPA_TXD2

AK6

IFPA_TXD2_N

AJ6

IFPA_TXD3

AH6

IFPA_TXD3_N

AJ9

IFPB_TXC

AH9

IFPB_TXC_N

AP6

IFPB_TXD4

AP5

IFPB_TXD4_N

AM7

IFPB_TXD5

AL7

IFPB_TXD5_N

AN8

IFPB_TXD6

AM8

IFPB_TXD6_N

AK8

IFPB_TXD7

AL8

IFPB_TXD7_N

AK1

IFPC_L0

AJ1

IFPC_L0_N

AJ3

IFPC_L1

AJ2

IFPC_L1_N

AH3

IFPC_L2

AH4

IFPC_L2_N

AG5

IFPC_L3

AG4

IFPC_L3_N

AM1

IFPD_L0

AM2

IFPD_L0_N

AM3

IFPD_L1

AM4

IFPD_L1_N

AL3

IFPD_L2

AL4

IFPD_L2_N

AK4

IFPD_L3

AK5

IFPD_L3_N

AD2

IFPE_L0

AD3

IFPE_L0_N

AD1

IFPE_L1

AC1

IFPE_L1_N

AC2

IFPE_L2

AC3

IFPE_L2_N

AC4

IFPE_L3

AC5

IFPE_L3_N

AE3

IFPF_L0

AE4

IFPF_L0_N

AF4

IFPF_L1

AF5

IFPF_L1_N

AD4

IFPF_L2

AD5

IFPF_L2_N

AG1

IFPF_L3

AF1

IFPF_L3_N

AG3

IFPC_AUX_I2CW_SCL

AG2

IFPC_AUX_I2CW_SDA_N

AK3

IFPD_AUX_I2CX_SCL

AK2

IFPD_AUX_I2CX_SDA_N

AB3

IFPE_AUX_I2CY_SCL

AB4

IFPE_AUX_I2CY_SDA_N

AF3

IFPF_AUX_I2CZ_SCL

AF2

IFPF_AUX_I2CZ_SDA_N

GS@

N13P-GS-A2

Part 4 of 7

NC

GENERAL

MULTI_STRAP_REF0_GND

LVDS/TMDS

TEST

JTAG_TRST_N

SERIAL

NC_0 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8

NC_9 NC_10 NC_11 NC_12 NC_13

BUFRST_N

CEC

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

THERMDP

THERMDN

VDD_SENSE

GND_SENSE

TESTMODE

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

ROM_CS_N

ROM_SI

ROM_SO

ROM_SCLK

4

P8 AC6 AJ28 AJ4 AJ5 AL11 C15 D19 D20 D23 D26 H31 T8 V32

L2

@

L3

1 2

10K_0402_5%~D

STRAP0

J2

STRAP1

J7

STRAP2

J6

STRAP3

J5

STRAP4

J3

MULTI_STRAP_REF0_GND

J1

GPU_THERMAL_D+

K3

GPU_THERMAL_D-

K4

L4

L5

GPU_TESTMODE

AK11

GPU_JTAG_TCK

AM10

GPU_JTAG_TDI

AM11

GPU_JTAG_TDO

AP12

GPU_JTAG_TMS

AP11

GPU_JTAG_TRST#

AN11

H6

ROM_SI_GPU

H5

ROM_SO_GPU

H7

ROM_SCLK_GPU

H4

RV317

GPU_VDD_SENSE (60)

GPU_VSS_SENSE (60)

1 2

+3VS_DELAY

1 2

RV318 40.2K_0402_1%~DGS@ RV318 40.2K_0402_1%~DGS@

T11@ T11@ T12@ T12@ T13@ T13@

RV324

RV324 10K_0402_5%~D

10K_0402_5%~D

ROM_SI_GPU

RV312

30.1K_0402_1%~D

GSS@

RV312

24.9K_0402_1%~D

GSH@

PT

+3VS_DELAY

10K_0402_5%~D

12

RV322

3

Straps

RV304

RV305

RV303

1 2

10K_0402_1%~D

GS@ RV303

GS@

RV311

1 2

10K_0402_1%~D

GV@

RV305

@

1 2

34.8K_0402_1%~D

RV312

10K_0402_1%~D

GV@

10K_0402_1%~D

GS@

4.99K_0402_1%~D

RV313

1 2

15K_0402_1%~D

10K_0402_1%~D

GV@

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

ROM_SCLK_GPU ROM_SI_GPU ROM_SO_GPU

1 2

10K_0402_1%~D

GS@

4.99K_0402_1%~D

RV309

RV310

1 2

10K_0402_1%~D

GV@

GVHMR@

QT

RV302

RV301

@ RV301

@

1 2

STRAP4

RV309

45.3K_0402_1%~D

GS@

VGA Thermal Sensor ADM1032ARMZ

+3VS_DELAY

CV577

@CV577

@

0.1U_0402_16V7K~D

10K_0402_5%~D

@

12

RV320

10K_0402_5%~D

12

RV323

GPU_THERMAL_D+ EC_SMB_DA2_PX

GPU_THERMAL_D-

EC_SMB_CK2_PX(24)

EC_SMB_DA2_PX(24)

CV578 2200P_0402_5 0V7K~D@ CV578 2200P_0402_50V7K~D@

1 2

RV321 4.7K_0402_5%~D@ RV321 4.7K_0402_5%~D@

2.2K_0402_5%~D

EC_SMB_CK2_PX

EC_SMB_DA2_PX

1 2

+3VS_DELAY

RV325

12

2

+3VS_DELAY

RV302

QT

RV306

RV307

1 2

10K_0402_1%~D

GVHAR@ RV307

GVHAR@

GVHMR@ RV306

GVHMR@

RV315

RV314

1 2

10K_0402_1%~D

GS@ RV314

GS@

GVHMR@ RV315

GVHMR@

QT

2

1

2

3

ADM1032ARMZ-2REEL_MS OP8

RV308

10K_0402_1%~D

GVHAR@ RV308

GVHAR@

RV316

10K_0402_1%~D

GVHMR@ RV316

GVHMR@

UV3

@UV3

@

VDD

D+

D-

THERM#4GND

RV302

10K_0402_1%~D

GVHAR@

RV302

10K_0402_1%~D

GVSDR@

RV310

10K_0402_1%~D

GVSCR@

SCLK

SDATA

ALERT#

+3VS_DELAY

8

7

6

5

Address:100_1101

Place close to GPU

12

RV326

2.2K_0402_5%~D

+3VS_DELAY

2

QV21A

DMN66D0LDW-7_SOT363-6~D

QV21A

DMN66D0LDW-7_SOT363-6~D

61

5

4

QV21B

RV319

4.7K_0402_5%~D

1 2

1

2

3

STRAP2STRAP3

RV306

10K_0402_1%~D

GVSCR@

RV306

10K_0402_1%~D

GVSDR@

RV314

10K_0402_1%~D

GVHAR@

EC_SMB_CK2_PX

THM_ALERT#

CV579

@CV579

@

10P_0402_50V8J~D

PCH_SMLCLK (17,35,38)

PCH_SMLDATA (17,35,38)

1

RV315

10K_0402_1%~D

GVSCR@

RV315

10K_0402_1%~D

GVSDR@

RV315

4.99K_0402_1%~D

GS@

THM_ALERT# (24)

ST

STRAP0STRAP1

RV308

10K_0402_1%~D

GVSCR@

RV316

10K_0402_1%~D

GVSDR@

RV308

45.3K_0402_1%~D

GS@

QT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

1

0.1

25 66Monday, March 26, 2012

0.1

5

Close to Pinclose to the GPU

1U_0402_6.3V6K~D

CV590

CV605

12

1U_0402_6.3V6K~D

1

CV591

2

1U_0402_6.3V6K~D

1

@

CV606

2

+IFPAB_PLLVDD

+IFPAB_IOVDD

+IFPCD_PLLVDD

+IFPCD_IOVDD

IFPEF_RSET

1U_0402_6.3V6K~D

1

@

CV592

2

1U_0402_6.3V6K~D

1

CV607

2

4.7U_0603_6.3V6K~D

10U_0603_6.3V6M~D

22U_0805_6.3V6M~D

CV587

1

D D

C C

2

10U_0603_6.3V6M~D

22U_0805_6.3V6M~D

CV602

1

2

4.7U_0603_6.3V6K~D

CV588

1

2

4.7U_0603_6.3V6K~D

CV603

1

2

1

CV589

2

1

@

CV604

2

RV331 10K_0402_5%~DRV331 10K_0402_5%~D

RV333 10K_0402_5%~DRV333 10K_0402_5%~D

RV334 10K_0402_5%~DRV334 10K_0402_5%~D

RV335 10K_0402_5%~DRV335 10K_0402_5%~D

RV336 1K_0402_1%~DRV336 1K_ 0402_1%~D

4.7U_0603_6.3V6K~D

1

2

1

2

0.1U_0402_25V6K~D

CV593

0.1U_0402_25V6K~D

@

CV608

4

+1.5VSDGPU

1

2

1

2

0.1U_0402_25V6K~D

CV594

0.1U_0402_25V6K~D

CV609

+IFPAB_PLLVDD

+IFPAB_IOVDD

+IFPCD_PLLVDD

+IFPCD_IOVDD

+IFPEF_PLLVDD IFPEF_RSET +IFPEF_IOVDD

AA27 AA30 AB27 AB33 AC27 AD27 AE27

AF27

AG27

M27

W27 W30 W33

AH8

AG8 AG9

AG7 AN2 AG6

AD6 AC7 AC8

B13 B16 B19 E13 E16 E19 H10 H11 H12 H13 H14 H15 H16 H18 H19 H20 H21 H22 H23 H24

H8 H9

L27

N27 P27 R27

T27 T30 T33

V27

Y27

AJ8

AF7 AF8 AF6

AB8

UV1E

FBVDDQ_0 FBVDDQ_1 FBVDDQ_2 FBVDDQ_3 FBVDDQ_4 FBVDDQ_5 FBVDDQ_6 FBVDDQ_7 FBVDDQ_8 FBVDDQ_9 FBVDDQ_10 FBVDDQ_11 FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_21 FBVDDQ_22 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27 FBVDDQ_28 FBVDDQ_29 FBVDDQ_30 FBVDDQ_31 FBVDDQ_32 FBVDDQ_33 FBVDDQ_34 FBVDDQ_35 FBVDDQ_36 FBVDDQ_37 FBVDDQ_38 FBVDDQ_39 FBVDDQ_40 FBVDDQ_41 FBVDDQ_42 FBVDDQ_43

IFPAB_PLLVDD IFPAB_RSET IFPA_IOVDD IFPB_IOVDD

IFPC_PLLVDD IFPC_RSET IFPC_IOVDD

IFPD_PLLVDD IFPD_RSET IFPD_IOVDD

IFPEF_PLLVDD IFPEF_RSET IFPE_IOVDD IFPF_IOVDD

N13P-GS-A2

GS@

Part 5 of 7

POWER

FB_CAL_TERM_GND

PEX_IOVDDQ_0 PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8

PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13

PEX_IOVDD_0 PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4 PEX_IOVDD_5

PEX_PLLVDD

VDD33_0 VDD33_1 VDD33_2 VDD33_3

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_GND_SENSE

FB_VDDQ_SENSE

PEX_PLL_HVDD

PEX_SVDD_3V3

3

AG13 AG15 AG16 AG18 AG25 AH15 AH18 AH26 AH27 AJ27 AK27 AL27 AM28 AN28

AG19 AG21 AG22 AG24 AH21 AH25

AG26

J8 K8 L8

+3.3V_RUN_VDD33

M8

J27

H27

H25

F2

RV330 100_0 402_1%~DRV330 100_0402_1%~D

F1

RV332 100_0 402_1%~DRV332 100_0402_1%~D

AH12

AG12

1U_0402_6.3V6K~D

CV580

1

2

PLACE UNDER BGA PLACE NEAR GPU

1U_0402_6.3V6K~D

1

CV595

2

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D

CV610

1

2

1 2

RV327 40.2_0402_1%~DRV3 27 40.2_0402_1%~D

1 2

RV328 40.2_0402_1%~DRV3 28 40.2_0402_1%~D

1 2

RV329 60.4_0402_1%~DRV3 29 60.4_0402_1%~D

1 2

0.1U_0402_10V7K~D

4.7U_0603_6.3V6K~D

@

CV614

CV615

1

2

+1.05VSDGPU

4.7U_0603_6.3V6K~D

1

2

1U_0402_6.3V6K~D

1

2

4.7U_0603_6.3V6K~D

1

@

CV611

2

CV616

CV582

2

4.7U_0603_6.3V6K~D

CV597

1

CV596

2

LV3

CV612

LV3

BLM18AG121SN1D_0603~D

+1.5VSDGPU

+3VS_DELAY

12

0.21A

4.7U_0603_6.3V6K~D

1U_0402_6.3V6K~D

@

CV581

1

10U_0603_6.3V6M~D

@

CV583

CV584

1

2

10U_0603_6.3V6M~D

CV598

1

2

+1.05VSDGPU

0.15A

CV584

10U_0603_6.3V6M~D

CV599

1

2

1

2

1U_0402_6.3V6K~D

1

CV613

2

22U_0805_6.3V6M~D

1

2

22U_0805_6.3V6M~D

1

2

CV585

1

2

+1.05VSDGPU

CV600

1

2

22U_0805_6.3V6M~D

CV586

22U_0805_6.3V6M~D

CV601

1

PEX_IOVDD/Q 3.3A

B B

A A

5

E/F

+3VS_DELAY

LV4

MMZ1608R301AT

1 2

+1.05VSDGPU

4

4.7U_0603_6.3V6K~D

1

12

CV626

2

LV5

BLM18PG221SN1D_2P~D

1 2

1U_0402_6.3V6K~D

1

CV631

2

+3VS_DELAY

1 2

RV337 0_0603_5%~DRV337 0_0603_5%~D

Compal Secret Data

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

1

2

4.7U_0603_6.3V6K~D

0.1U_0402_10V7K~D

CV628

12

CV632

+IFPEF_PLLVDD

0.1U_0402_10V7K~D

@

CV630

CV629

1

2

+IFPEF_IOVDD

1U_0603_10V7K~D

0.1U_0402_10V7K~D

@

CV634

CV635

1

CV633

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1U_0603_10V7K~D

CV627

1

2

Near GPU Near Ball

+3.3V_RUN_VDD33+3.3V_RUN_VDD33

4.7U_0603_6.3V6K~D

1U_0402_6.3V6K~D

4.7U_0603_6.3V6K~D

1

CV617

2

1U_0402_6.3V6K~D

1

CV618

CV619

2

0.1U_0402_10V7K~D

1U_0402_6.3V6K~D

1

2

@

CV621

CV620

2

0.1U_0402_10V7K~D

1

CV623

CV622

2

Title

Size Document Number Rev

Date: Sheet of

0.1U_0402_10V7K~D

1

CV624

CV625

2

Compal Electronics, Inc.

Block Diagram

1

26 66Monday, March 26, 2012

0.1U_0402_10V7K~D

0.1

5

UV1F

AG11

GND_0

A2

GND_1

A33

GND_2

AA13

GND_3

AA15

GND_4

AA17

D D

C C

B B

A A

AA18 AA20 AA22 AB12 AB14 AB16 AB19

AB21 AB23 AB28 AB30 AB32

AC13 AC15 AC17 AC18 AC20 AC22

AE28 AE30 AE32 AE33

AH10 AH13 AH16 AH19

AH22 AH24 AH28 AH29 AH30 AH32 AH33

AK10

AL12 AL14 AL15 AL17 AL18

AL20 AL21 AL23 AL24 AL26 AL28 AL30 AL32 AL33

AM13 AM16 AM19 AM22 AM25

AN10 AN13 AN16 AN19 AN22 AN25 AN30 AN34

AP33

AB2

AB5 AB7

AE2

AE5 AE7

AH2

AH5 AH7

AK7

AL2

AL5

AN1

AN4 AN7 AP2

B10 B22 B25 B28 B31 B34

C10 C13 C19 C22 C25 C28

GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47

AJ7

GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79 GND_80 GND_81 GND_82 GND_83 GND_84

B1

GND_85 GND_86 GND_87 GND_88 GND_89 GND_90 GND_91

B4

GND_92

B7

GND_93 GND_94 GND_95 GND_96 GND_97 GND_98 GND_99

C7

GND_100

N13P-GS-A2

GS@

Part 6 of 7

4

GND

GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151 GND_152 GND_153 GND_154 GND_155 GND_156 GND_157 GND_158 GND_159 GND_160 GND_161 GND_162 GND_163 GND_164 GND_165 GND_166 GND_167 GND_168 GND_169 GND_170 GND_171 GND_172 GND_173 GND_174 GND_175 GND_176 GND_177 GND_178 GND_179 GND_180 GND_181 GND_182 GND_183 GND_184 GND_185 GND_186 GND_187 GND_188 GND_189 GND_190 GND_191 GND_192 GND_193 GND_194 GND_195 GND_196 GND_197 GND_198 GND_199

GND_OPT GND_OPT

D2 D31 D33 E10 E22 E25 E5 E7 F28 F7 G10 G13 G16 G19 G2 G22 G25 G28 G3 G30 G32 G33 G5 G7 K2 K28 K30 K32 K33 K5 K7 M13 M15 M17 M18 M20 M22 N12 N14 N16 N19 N2 N21 N23 N28 N30 N32 N33 N5 N7 P13 P15 P17 P18 P20 P22 R12 R14 R16 R19 R21 R23 T13 T15 T17 T18 T2 T20 T22 T28 T32 T5 T7 U12 U14 U16 U19 U21 U23 V12 V14 V16 V19 V21 V23 W13 W15 W17 W18 W20 W22 W28 Y12 Y14 Y16 Y19 Y21 Y23 AH11

C16 W32

3

+GPU_CORE

AA12 AA14 AA16 AA19 AA21 AA23 AB13 AB15 AB17 AB18 AB20 AB22 AC12 AC14 AC16 AC19 AC21 AC23

M12 M14 M16 M19 M21 M23

UV1G

VDD_0 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23

N13

VDD_24

N15

VDD_25

N17

VDD_26

N18

VDD_27

N20

VDD_28

N22

VDD_29

P12

VDD_30

P14

VDD_31

P16

VDD_32

P19

VDD_33

P21

VDD_34

P23

VDD_35

R13

VDD_36

R15

VDD_37

R17

VDD_38

R18

VDD_39

R20

VDD_40

R22

VDD_41

T12

VDD_42

T14

VDD_43

T16

VDD_44

T19

VDD_45

T21

VDD_46

T23

VDD_47

U13

VDD_48

U15

VDD_49

U17

VDD_50

U18

VDD_51

U20

VDD_52

U22

VDD_53

V13

VDD_54

V15

VDD_55

N13P-GS-A2GS@

Part 7 of 7

POWER

2

+GPU_CORE

V17

VDD_56

V18

VDD_57

V20

VDD_58

V22

VDD_59

W12

VDD_60

W14

VDD_61

W16

VDD_62

W19

VDD_63

W21

VDD_64

W23

VDD_65

Y13

VDD_66

Y15

VDD_67

Y17

VDD_68

Y18

VDD_69

Y20

VDD_70

Y22

VDD_71

U1

XVDD_1

U2

XVDD_2

U3

XVDD_3

U4

XVDD_4

U5

XVDD_5

U6

XVDD_6

U7

XVDD_7

U8

XVDD_8

V1

XVDD_9

V2

XVDD_10

V3

XVDD_11

V4

XVDD_12

V5

XVDD_13

V6

XVDD_14

V7

XVDD_15

V8

XVDD_16

W2

XVDD_17

W3

XVDD_18

W4

XVDD_19

W5

XVDD_20

W7

XVDD_21

W8

XVDD_22

Y1

XVDD_23

Y2

XVDD_24

Y3

XVDD_25

Y4

XVDD_26

Y5

XVDD_27

Y6

XVDD_28

Y7

XVDD_29

Y8

XVDD_30

AA1

XVDD_31

AA2

XVDD_32

AA3

XVDD_33

AA4

XVDD_34

AA5

XVDD_35

AA6

XVDD_36

AA7

XVDD_37

AA8

XVDD_38

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

1

0.1

27 66Monday, March 26, 2012

0.1

5

4

3

2

1

FBA_CMD[0..31]

FBA_D00 FBA_D01 FBA_D02 FBA_D03 FBA_D04 FBA_D05 FBA_D06 FBA_D07 FBA_D08 FBA_D09 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBA_PLL_AVDD

FB_VREF

FB_DLL_AVDD

FB_CLAMP

FBA_DEBUG0 FBA_DEBUG1

THE FBA_ECKBxx ARE

THE FBA_ECKBxx ARE USED ON GK107. NC

USED ON GK107. NC ON GF108 AND GF117

ON GF108 AND GF117

N13P-GS-A2

FBA_D[0..31]

FBA_D[32..63]

FBA_DBI[4..7]

FBA_DBI[0..3]

FBA_EDC[4..7]

FBA_EDC[0..3]

Part 2 of 7

MEMORY INTERFACE

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6

A

FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_CMD_RFU0 FBA_CMD_RFU1

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_WCK01

FBA_WCK01_N

FBA_WCK23

FBA_WCK23_N

FBA_WCK45

FBA_WCK45_N

FBA_WCK67

FBA_WCK67_N

FBA_WCKB01

FBA_WCKB01_N

FBA_WCKB23

FBA_WCKB23_N

FBA_WCKB45

FBA_WCKB45_N

FBA_WCKB67

FBA_WCKB67_N

4

U30 T31 U29 R34 R33 U32 U33 U28 V28 V29 V30 U34 U31 V34 V33 Y32 AA31 AA29 AA28 AC34 AC33 AA32 AA33 Y28 Y29 W31 Y30 AA34 Y31 Y34 Y33 V31

P30 F31 F34 M32 AD31 AL29 AM32 AF34

M30 H30 E34 M34 AF30 AK31 AM34 AF32

M31 G31 E33 M33 AE31 AK30 AN33 AF33

R32 AC32

R30 R31

AB31 AC31

K31 L30 H34 J34 AG30 AG31 AJ34 AK34

J30 J31 J32 J33 AH31 AJ31 AJ32 AJ33

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DBI0 FBA_DBI1 FBA_DBI2 FBA_DBI3 FBA_DBI4 FBA_DBI5 FBA_DBI6 FBA_DBI7

FBA_EDC0 FBA_EDC1 FBA_EDC2 FBA_EDC3 FBA_EDC4 FBA_EDC5 FBA_EDC6 FBA_EDC7

FBA_WCK01 FBA_WCK01# FBA_WCK23 FBA_WCK23# FBA_WCK45 FBA_WCK45# FBA_WCK67 FBA_WCK67#

GDDR5 CMD Mapping Table

<0..31> <32..63> Memory

CMD12 CMD28 RAS# CMD15 CMD31 CAS# CMD5 CMD21 WE# CMD0 CMD16 CS# CMD8 CMD24 ABI# CMD10 CMD26 A0_A10 CMD11 CMD27 A1_A9 CMD2 CMD18 A2_BA0 CMD1 CMD17 A3_BA3 CMD3 CMD19 A4_BA2 CMD4 CMD20 A5_BA1 CMD7 CMD23 A6_A11 CMD6 CMD22 A7_A8 CMD9 CMD25 A12_FRU CMD14 CMD30 CKE# CMD13 CMD29 RESET#

FBB_D[0..31](31)

FBB_D[32..63](32)

FBB_CMD[0..31](31,32)

FBB_DBI[4..7](32)

FBB_DBI[0..3](31)

FBB_EDC[4..7](32)

FBB_EDC[0..3](31)

CLKA0 (29) CLKA0# (29)

CLKA1 (30) CLKA1# (30)

FBA_WCK01 (29) FBA_WCK01# (29) FBA_WCK23 (29) FBA_WCK23# (29) FBA_WCK45 (30) FBA_WCK45# (30) FBA_WCK67 (30) FBA_WCK67# (30)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CHANNEL-B NOT TO USE, NEED TO BE DISABLED

UV1C

FBB_D0

G9

FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20

FBB_D[0..31]

FBB_D[32..63]

FBB_CMD[0..31]

FBB_DBI[4..7]

FBB_DBI[0..3]

FBB_EDC[4..7]

FBB_EDC[0..3]

+FBA_PLL_AVDD

+1.5VSDGPU

Compal Secret Data

2011/08/25 2012/07/25

Compal Secret Data

FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63

+FBA_PLL_AVDD

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D CV636

CV636

1

2

RV346

1 2

60.4_0402_1%~D

Deciphered Date

FBB_D00

E9

FBB_D01

G8

FBB_D02

F9

FBB_D03

F11

FBB_D04

G11

FBB_D05

F12

FBB_D06

G12

FBB_D07

G6

FBB_D08

F5

FBB_D09

E6

FBB_D10

F6

FBB_D11

F4

FBB_D12

G4

FBB_D13

E2

FBB_D14

F3

FBB_D15

C2

FBB_D16

D4

FBB_D17

D3

FBB_D18

C1

FBB_D19

B3

FBB_D20

C4

FBB_D21

B5

FBB_D22

C5

FBB_D23

A11

FBB_D24

C11

FBB_D25

D11

FBB_D26

B11

FBB_D27

D8

FBB_D28

A8

FBB_D29

C8

FBB_D30

B8

FBB_D31

F24

FBB_D32

G23

FBB_D33

E24

FBB_D34

G24

FBB_D35

D21

FBB_D36

E21

FBB_D37

G21

FBB_D38

F21

FBB_D39

G27

FBB_D40

D27

FBB_D41

G26

FBB_D42

E27

FBB_D43

E29

FBB_D44

F29

FBB_D45

E30

FBB_D46

D30

FBB_D47

A32

FBB_D48

C31

FBB_D49

C32

FBB_D50

B32

FBB_D51

D29

FBB_D52

A29

FBB_D53

C29

FBB_D54

B29

FBB_D55

B21

FBB_D56

C23

FBB_D57

A21

FBB_D58

C21

FBB_D59

B24

FBB_D60

C24

FBB_D61

B26

FBB_D62

C26

FBB_D63

H17

FBB_PLL_AVDD

G14

FBB_DEBUG0

G20

FBB_DEBUG1

RV347

1 2

60.4_0402_1%~D

GS@

2

Part 3 of 7

MEMORY INTERFACE

THE FBA_ECKBxx ARE

THE FBA_ECKBxx ARE USED ON GK107.

USED ON GK107. NC ON GF108 AND

NC ON GF108 AND GF117

GF117

N13P-GS-A2

FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8

FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31

FBB_DQM0

FBB_DQM1

FBB_DQM2

FBB_DQM3

FBB_DQM4

FBB_DQM5

FBB_DQM6

FBB_DQM7

FBB_DQS_RN0 FBB_DQS_RN1 FBB_DQS_RN2 FBB_DQS_RN3 FBB_DQS_RN4 FBB_DQS_RN5 FBB_DQS_RN6

B

FBB_DQS_RN7

FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP2 FBB_DQS_WP3 FBB_DQS_WP4 FBB_DQS_WP5 FBB_DQS_WP6 FBB_DQS_WP7

FBB_CMD_RFU0 FBB_CMD_RFU1

FBB_CLK0

FBB_CLK0_N

FBB_CLK1

FBB_CLK1_N

FBB_WCK01

FBB_WCK01_N

FBB_WCK23

FBB_WCK23_N

FBB_WCK45

FBB_WCK45_N

FBB_WCK67

FBB_WCK67_N

FBB_WCKB01

FBB_WCKB01_N

FBB_WCKB23

FBB_WCKB23_N

FBB_WCKB45

FBB_WCKB45_N

FBB_WCKB67

FBB_WCKB67_N

Title

Size Document Number Rev

Date: Sheet of

FBB_CMD1

E14

FBB_CMD2

F14

FBB_CMD3

A12

FBB_CMD4

B12

FBB_CMD5

C14

FBB_CMD6

B14

FBB_CMD7

G15

FBB_CMD8

F15

FBB_CMD9

E15

FBB_CMD10

D15

FBB_CMD11

A14

FBB_CMD12

D14

FBB_CMD13

A15

FBB_CMD14

B15

FBB_CMD15

C17

FBB_CMD16

D18

FBB_CMD17

E18

FBB_CMD18

F18

FBB_CMD19

A20

FBB_CMD20

B20

FBB_CMD21

C18

FBB_CMD22

B18

FBB_CMD23

G18

FBB_CMD24

G17

FBB_CMD25

F17

FBB_CMD26

D16

FBB_CMD27

A18

FBB_CMD28

D17

FBB_CMD29

A17

FBB_CMD30

B17

FBB_CMD31

E17

FBB_DBI0

E11

FBB_DBI1

E3

FBB_DBI2

A3

FBB_DBI3

C9

FBB_DBI4

F23

FBB_DBI5

F27

FBB_DBI6

C30

FBB_DBI7

A24

D9 E4 B2 A9 D22 D28 A30 B23

FBB_EDC0

D10

FBB_EDC1

D5

FBB_EDC2

C3

FBB_EDC3

B9

FBB_EDC4

E23

FBB_EDC5

E28

FBB_EDC6

B30

FBB_EDC7

A23

C12 C20

D12 E12

E20 F20

FBB_WCK01

F8

FBB_WCK01#

E8

FBB_WCK23

A5

FBB_WCK23#

A6

FBB_WCK45

D24

FBB_WCK45#

D25

FBB_WCK67

B27

FBB_WCK67#

C27

D6 D7 C6 B6 F26 E26 A26 A27

Compal Electronics, Inc.

Block Diagram

+1.5VSDGPU

CLKB0 (31) CLKB0# (31)

CLKB1 (32) CLKB1# (32)

FBB_WCK01 (31) FBB_WCK01# (31) FBB_WCK23 (31) FBB_WCK23# (31) FBB_WCK45 (32) FBB_WCK45# (32) FBB_WCK67 (32) FBB_WCK67# (32)

1

FBB_CMD0

D13

12

10K_0402_5%~D

RV409

10K_0402_5%~D

RV410

10K_0402_5%~D

RV414

10K_0402_5%~D

RV418

CKE_H

FBB_CMD30

CKE_L

FBB_CMD14

FBB_CMD29

RST_H*

FBB_CMD13

RST_L*

28 66Monday, March 26, 2012

0.1

FBA_D[0..31](29)

FBA_D[32..63](30)

FBA_CMD[0..31](29,30)

FBA_DBI[4..7](30)

FBA_DBI[0..3](29)

FBA_EDC[4..7](30)

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

+FBA_PLL_AVDD

+FB_VREF

0.1U_0402_10V7K~D

+FBA_PLL_AVDD

CV637

1

2

RV344

1 2

+FBA_PLL_AVDD

1U_0402_6.3V6K~D

22U_0805_6.3V6M~D

CV639

1

2

FBA_EDC[0..3](29)

M29

M28

AG28 AF29 AG29 AF28 AD30 AD29 AC29 AD28

AJ29

AK29

AJ30

AK28 AM29 AM31

AN29 AM30

AN31

AN32

AP30

AP32 AM33

AL31 AK33 AK32 AD34 AD32 AC30 AD33 AF31 AG34 AG32 AG33

AC28

RV345

1 2

60.4_0402_1%~D

+FBA_PLL_AVDD

0.1U_0402_10V7K~D

CV640

1

2

UV1B

L28

L29

N31 P29 R29 P28

J28

H29

J29 H28 G29 E31 E32 F30 C34 D32 B33 C33 F33 F32 H33 H32 P34 P32 P31 P33

L31

L34

L32

L33

U27

H26

K27

E1

R28

GS@

CV641

D D

+1.5VSDGPU

10K_0402_5%~D

12

RV338

CKE_H

FBA_CMD30

+1.5VSDGPU

10K_0402_5%~D

12

RV339

CKE_L

FBA_CMD14

C C

FBA_CMD29

10K_0402_5%~D

12

RV340

RST_H*

FBA_CMD13

10K_0402_5%~D

12

RV341

RST_L*

B B

for Test/Debug

+1.5VSDGPU

1.1K_0402_1%~D

@RV342

@

12

RV342

16mil

+FB_VREF

0.01U_0402_16V7K~D

@ CV638

@

@RV343

@

1.1K_0402_1%~D

12

RV343

1

CV638

2

A A

+1.05VSDGPU

BLM18PG300SN1D_2P~D

1U_0402_6.3V6K~D

1

2

+1.5VSDGPU

NEED FIND 30R BEAD

LV6

1 2

CV642

5

Memory Partition A - Lower 32

UV5

FBA_SEN0

CV663

C13 R13

D13 P13

J12 J11

K10 K11

H10 H11

J10 J13

G12

L12

A10 U10

J14

C10 R10 D11 G11

L11 P11 G14

L14

B10 D10 G10

L10 P10 T10 H14 K14

UV5

MF=0 MF=1 MF=0MF=1

C2

EDC0 EDC3 EDC1 EDC2 EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3# DBI1# DBI2# DBI2# DBI1#

P2

DBI3# DBI0#

CK CK#

J3

CKE#

J5

A12/RFU/NC

K4

A8/A7 A10/A0

K5

A11/A6 A9/A1 BA1/A5 BA3/A3 BA2/A4 BA0/A2

BA3/A3 BA1/A5 BA0/A2 BA2/A4

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

A5

VPP/NC

U5

VPP/NC

J1

MF SEN ZQ

J4

ABI#

G3

RAS# CAS# CS# WE#

L3

CAS# RAS# WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

VREFD VREFD VREFC

J2

RESET#

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD VDD VDD VDD VDD VDD VDD VDD VDD

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS VSS VSS VSS VSS VSS VSS VSS VSS

170-BALL

SGRAM GDDR5

K4G20325FC-HC05_FBGA170~D

@

bits

FBA_EDC0

FBA_EDC2

D D

CLKA0(28) CLKA0#(28)

RV348

40.2_0402_1%~D

1 2

RV349

40.2_0402_1%~D

1

GS@ CV643

GS@

0.01U_0402_16V7K~D

2

C C

B B

A A

FBVREF_ALTV(24,30,31,32)

CV643

CLKA0

CLKA0#

PT

RV352 1K_0402_1%~DRV352 1K_0402_1%~D RV353 1K_0402_1%~DRV353 1K_0402_1%~D RV354 121_0402_1%~DRV354 121_0402_1%~D

+FBA_VREFD_L

+FBA_VREFC_L

10U_0603_6.3V6M~D

1

2

+FBA_VREFD_L

RV357

931_0402_1%

RV359

931_0402_1%

2

G

5

1 2 1 2 1 2

FBA_WCK01#(28) FBA_WCK01(28)

FBA_WCK23#(28) FBA_WCK23(28)

12

1

2

CV650

12

820P_0402_50V7K~D

1

2

CV651

820P_0402_50V7K~D

1U_0402_6.3V6K~D

CV659

1

CV660

2

12

13

D

QV22

SSM3K7002FU_SC70-3~D

S

RV355

1.33K_0402_1%~D

RV356

1.33K_0402_1%~D

0.1U_0402_10V7K~D

1U_0402_6.3V6K~D

1

CV661

2

+1.5VSDGPU

RV358

549_0402_1%~D

RV360

549_0402_1%~D

+FBA_VREFC_L

FBA_DBI0

FBA_DBI2

FBA_CMD14

FBA_CMD9

FBA_CMD6 FBA_CMD7 FBA_CMD4 FBA_CMD3

FBA_CMD1 FBA_CMD2 FBA_CMD11 FBA_CMD10

FBA_CMD8 FBA_CMD12 FBA_CMD0 FBA_CMD15 FBA_CMD5

FBA_WCK01# FBA_WCK01

FBA_WCK23# FBA_WCK23

FBA_CMD13

+1.5VSDGPU

0.1U_0402_10V7K~D

@

CV662

1

2

12

4

NORMAL

4

DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9

DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

A4 A2 B4 B2 E4 E2 F4 F2 A11 A13 B11 B13 E11 E13 F11 F13 U11 U13 T11 T13 N11 N13 M11 M13 U4 U2 T4 T2 N4 N2 M4 M2

B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14

A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7

FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23

+1.5VSDGPU

1

2

64X32 GDDR5

10U_0603_6.3V6M~D

1U_0402_6.3V6K~D

CV652

1

CV653

2

3

UV4

MF=0 MF=1 MF=0MF=1

FBA_EDC3

FBA_EDC1

FBA_DBI3

FBA_DBI1

CLKA0 CLKA0#

FBA_CMD14

FBA_CMD9

FBA_CMD10 FBA_CMD11 FBA_CMD1 FBA_CMD2

FBA_CMD4 FBA_CMD3 FBA_CMD7 FBA_CMD6

RV350

1K_0402_1%~D

+1.5VSDGPU

FBA_WCK23#(28) FBA_WCK23(28)

FBA_WCK01#(28) FBA_WCK01(28)

0.1U_0402_10V7K~D

1U_0402_6.3V6K~D

CV655

1

CV654

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CV656

1

2

+1.5VSDGPU

1

2

CV657

1

2

1U_0402_6.3V6K~D

1

CV664

2

1 2

FBA_SEN0

1 2

RV351

121_0402_1%~D

FBA_CMD8 FBA_CMD15 FBA_CMD5 FBA_CMD12 FBA_CMD0

FBA_WCK23# FBA_WCK23

FBA_WCK01# FBA_WCK01

+FBA_VREFD_L

+FBA_VREFC_L

FBA_CMD13

0.1U_0402_10V7K~D

@

CV658

1

2

0.1U_0402_10V7K~D

1U_0402_6.3V6K~D

CV665

0.1U_0402_10V7K~D

@

CV666

1

2

2011/08/25 2012/07/25

C13 R13

D13 P13

J12 J11

K10 K11

H10 H11

J10 J13

G3

G12

L12

A10 U10 J14

G1

G4

C10 R10 D11

G11

L11 P11

G14

L14

CV667

G5

B10 D10

G10

L10 P10 T10 H14 K14

Compal Secret Data

C2

EDC0 EDC3 EDC1 EDC2 EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3# DBI1# DBI2# DBI2# DBI1#

P2

DBI3# DBI0#

CK CK#

J3

CKE#

J5

A12/RFU/NC

K4

A8/A7 A10/A0

K5

A11/A6 A9/A1 BA1/A5 BA3/A3 BA2/A4 BA0/A2

BA3/A3 BA1/A5 BA0/A2 BA2/A4

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

A5

VPP/NC

U5

VPP/NC

J1

MF SEN ZQ

J4

ABI# RAS# CAS# CS# WE#

L3

CAS# RAS# WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

VREFD VREFD VREFC

J2

RESET#

VDD

L1

VDD VDD

L4

VDD

C5

VDD

R5

VDD VDD VDD VDD VDD VDD VDD VDD VDD

H1

VSS

K1

VSS

B5

VSS VSS

L5

VSS

T5

VSS VSS VSS VSS VSS VSS VSS VSS VSS

170-BALL

SGRAM GDDR5

K4G20325FC-HC05_FBGA170~D

@

Deciphered Date

2

MIRROR

2

DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9

DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

1

FBA_CMD[0..31]

FBA_D[0..31]

FBA_D24

A4

FBA_D25

A2

FBA_D26

B4

FBA_D27

B2

FBA_D28

E4

FBA_D29

E2

FBA_D30

F4

FBA_D31

F2 A11 A13 B11 B13 E11 E13 F11 F13

FBA_D8

U11

FBA_D9

U13

FBA_D10

T11

FBA_D11

T13

FBA_D12

N11

FBA_D13

N13

FBA_D14

M11

FBA_D15

M13 U4 U2 T4 T2 N4 N2 M4 M2

+1.5VSDGPU

B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14

A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14

Title

Block Diagram

Size Documen t Number Rev

Date: Shee t of

FBA_DBI[0..3]

FBA_EDC[0..3]

1U_0402_6.3V6K~D

1

2

Compal Electronics, Inc.

1

CV645

CV644

2

0.1U_0402_10V7K~D

CV646

1

FBA_CMD[0..31] (28,30)

FBA_D[0..31] (28)

FBA_DBI[0..3] (28)

FBA_EDC[0..3] (28)

0.1U_0402_10V7K~D

CV647

1

2

29 66Monday, March 26, 2012

0.1U_0402_10V7K~D

@

CV648

1

2

0.1U_0402_10V7K~D

CV649

0.1

5

Memory Partition A - Upper 32 bits

UV7

MF=0 MF=1 MF=0MF=1

FBA_EDC7

FBA_EDC5

RV364

RV368

1.33K_0402_1%~D

RV369

1.33K_0402_1%~D

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D

1

CV686

2

+1.5VSDGPU

RV371

549_0402_1%~D

RV373

549_0402_1%~D

+FBA_VREFC_H

FBA_DBI7

FBA_DBI5

FBA_CMD30

FBA_CMD25

FBA_CMD26 FBA_CMD27 FBA_CMD17 FBA_CMD18

FBA_CMD20 FBA_CMD19 FBA_CMD23 FBA_CMD22

FBA_CMD24 FBA_CMD31 FBA_CMD21 FBA_CMD28 FBA_CMD16

FBA_WCK67# FBA_WCK67

FBA_WCK45# FBA_WCK45

FBA_CMD29

+1.5VSDGPU

CV687

1

2

12

D D

CLKA1(28) CLKA1#(28)

RV361

40.2_0402_1%~D

1 2

RV362

40.2_0402_1%~D

1

CV668

GS@CV668

GS@

0.01U_0402_16V7K~D

2

C C

B B

A A

FBVREF_ALTV(24,29,31,32)

PT

CLKA1

CLKA1#

+1.5VSDGPU

RV366 1K_0402_1%~DRV366 1K_0402_1%~D

1 2

RV367 121_0402_1%~DRV367 121_0402_1%~D

1 2

FBA_WCK67#(28) FBA_WCK67(28)

FBA_WCK45#(28) FBA_WCK45(28)

+FBA_VREFD_H

1

2

+FBA_VREFC_H

1

2

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

CV684

1

2

+FBA_VREFD_H

RV370

12

931_0402_1%

RV372

12

931_0402_1%

13

D

2

G

SSM3K7002FU_SC70-3~D

G

SSM3K7002FU_SC70-3~D

S

5

1K_0402_1%~D

1 2

12

CV675

12

820P_0402_50V7K~D

CV676

820P_0402_50V7K~D

1

CV685

2

QV23

FBA_SEN2

0.1U_0402_10V7K~D

@

CV688

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

J5

A12/RFU/NC

K4

A8/A7 A10/A0

K5

A11/A6 A9/A1

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

H11

BA0/A2 BA2/A4

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

170-BALL

SGRAM GDDR5

K4G20325FC-HC05_FBGA170~D

@

4

MIRROR

4

DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9

DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

A4 A2 B4 B2 E4 E2 F4 F2 A11 A13 B11 B13 E11 E13 F11 F13 U11 U13 T11 T13 N11 N13 M11 M13 U4 U2 T4 T2 N4 N2 M4 M2

B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14

A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14

FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47

+1.5VSDGPU

1

2

3

UV6

MF=0 MF=1 MF=0MF=1

C2

EDC0 EDC3

C13

FBA_EDC6

FBA_DBI4

FBA_DBI6

CLKA1 CLKA1#

FBA_CMD30

FBA_CMD25

FBA_CMD22 FBA_CMD23 FBA_CMD20 FBA_CMD19

FBA_CMD17 FBA_CMD18 FBA_CMD27 FBA_CMD26

RV363

1K_0402_1%~D

1 2

FBA_SEN2

1 2

RV365

121_0402_1%~D

FBA_CMD24 FBA_CMD28 FBA_CMD16 FBA_CMD31 FBA_CMD21

FBA_WCK45#(28) FBA_WCK45(28)

FBA_WCK67#(28) FBA_WCK67(28)

0.1U_0402_10V7K~D

10U_0603_6.3V6M~D

CV677

1U_0402_6.3V6K~D

1

CV679

CV678

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0402_10V7K~D

CV680

1

2

3

CV681

1

2

+1.5VSDGPU

@

CV682

1

2

1U_0402_6.3V6K~D

1

CV689

2

FBA_WCK45# FBA_WCK45

FBA_WCK67# FBA_WCK67

+FBA_VREFD_H

+FBA_VREFC_H

FBA_CMD29

0.1U_0402_10V7K~D

CV683

1

2

0.1U_0402_10V7K~D

1U_0402_6.3V6K~D

@

CV691

1

CV690

2

2011/08/25 2012/07/25

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

J5

A12/RFU/NC

K4

A8/A7 A10/A0

K5

A11/A6 A9/A1

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

H11

BA0/A2 BA2/A4

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

H1

CV692

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

170-BALL

SGRAM GDDR5

K4G20325FC-HC05_FBGA170~D

@

Compal Secret Data

Deciphered Date

2

NORMAL

2

DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9

DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

1

FBA_CMD[0..31]

FBA_D32

A4

FBA_D33FBA_EDC4

A2

FBA_D34

B4

FBA_D35

B2

FBA_D36

E4

FBA_D37

E2

FBA_D38

F4

FBA_D39

F2 A11 A13 B11 B13 E11 E13 F11 F13

FBA_D48

U11

FBA_D49

U13

FBA_D50

T11

FBA_D51

T13

FBA_D52

N11

FBA_D53

N13

FBA_D54

M11

FBA_D55

M13 U4 U2 T4 T2 N4 N2 M4 M2

+1.5VSDGPU

B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14

A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14

Title

Block Diagram

Size Documen t Number Rev

Date: Shee t of

FBA_D[32..63]

FBA_DBI[4..7]

FBA_EDC[4..7]

1U_0402_6.3V6K~D

1

CV669

CV670

2

Compal Electronics, Inc.

0.1U_0402_10V7K~D

1

2

1

FBA_CMD[0..31] (28,29)

FBA_D[32..63] (28)

FBA_DBI[4..7] (28)

FBA_EDC[4..7] (28)

0.1U_0402_10V7K~D

CV671

CV672

1

2

30 66Monday, March 26, 2012

0.1U_0402_10V7K~D

@

CV673

1

2

0.1U_0402_10V7K~D

CV674

0.1

5

Memory Partition B - Lower 32

UV9

C2 C13 R13

R2

D2 D13 P13

P2

J12 J11

J3

J5

K4

K5 K10 K11

H10 H11

H5

H4

A5

U5

J1 J10 J13

J4 G3

G12

L3

L12

D5 D4

P5 P4

A10 U10

J14

J2

G1

L1

G4

L4 C5

R5 C10 R10

CV713

D11 G11 L11 P11 G14 L14

H1

K1

B5

G5

L5

T5 B10 D10 G10 L10 P10 T10 H14 K14

UV9

MF=0 MF=1 MF=0MF=1

EDC0 EDC3 EDC1 EDC2 EDC2 EDC1 EDC3 EDC0

DBI0# DBI3# DBI1# DBI2# DBI2# DBI1# DBI3# DBI0#

CK CK# CKE#

A12/RFU/NC

A8/A7 A10/A0 A11/A6 A9/A1 BA1/A5 BA3/A3 BA2/A4 BA0/A2

BA3/A3 BA1/A5 BA0/A2 BA2/A4 A9/A1 A11/A6 A10/A0 A8/A7

VPP/NC VPP/NC

MF SEN ZQ

ABI# RAS# CAS# CS# WE# CAS# RAS# WE# CS#

WCK01# WCK23# WCK01 WCK23

WCK23# WCK01# WCK23 WCK01

VREFD VREFD VREFC

RESET#

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

170-BALL

SGRAM GDDR5

K4G20325FC-HC05_FBGA170~D

@

bits

FBB_EDC0

RV381

1.33K_0402_1%~D

RV382

1.33K_0402_1%~D

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D

1

CV711

2

+1.5VSDGPU

RV384

549_0402_1%~D

RV386

549_0402_1%~D

+FBB_VREFC_L

FBB_EDC2

FBB_DBI0

FBB_DBI2

FBB_CMD14

FBB_CMD9

FBB_CMD6 FBB_CMD7 FBB_CMD4 FBB_CMD3

FBB_CMD1 FBB_CMD2 FBB_CMD11 FBB_CMD10

FBB_CMD8 FBB_CMD12 FBB_CMD0 FBB_CMD15 FBB_CMD5

FBB_WCK01# FBB_WCK01

FBB_WCK23# FBB_WCK23

FBB_CMD13

+1.5VSDGPU

0.1U_0402_10V7K~D

CV712

1

2

12

FBB_SEN0

@

D D

CLKB0(28) CLKB0#(28)

RV374

40.2_0402_1%~D

1 2

RV375

40.2_0402_1%~D

0.01U_0402_16V7K~D

1

CV693

2

C C

B B

A A

FBVREF_ALTV(24,29,30,32)

CLKB0

CLKB0#

RV378 1K_0402_1%~DRV378 1K_0402_1%~D

1 2

RV379 1K_0402_1%~DRV379 1K_0402_1%~D

1 2

RV380 121_0402_1%~DRV380 121_0402_1%~D

1 2

FBB_WCK01#(28) FBB_WCK01(28)

FBB_WCK23#(28) FBB_WCK23(28)

+FBB_VREFD_L

1

2

CV700

+FBB_VREFC_L

+FBB_VREFD_L

931_0402_1%

2

G

1

2

CV701

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

CV709

1

2

RV383

12

RV385

12

13

D

QV24

SSM3K7002FU_SC70-3~D

S

5

820P_0402_50V7K~D

CV710

12

4

NORMAL

4

DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9

DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

A4 A2 B4 B2 E4 E2 F4 F2 A11 A13 B11 B13 E11 E13 F11 F13 U11 U13 T11 T13 N11 N13 M11 M13 U4 U2 T4 T2 N4 N2 M4 M2

B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14

A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14

FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7

FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23

+1.5VSDGPU

1

2

3

UV8

MF=0 MF=1 MF=0MF=1

64X32 GDDR5

FBB_EDC3

FBB_EDC1

FBB_DBI3

FBB_DBI1

CLKB0 CLKB0#

FBB_CMD14

FBB_CMD9

FBB_CMD10 FBB_CMD11 FBB_CMD1 FBB_CMD2

FBB_CMD4 FBB_CMD3 FBB_CMD7 FBB_CMD6

RV376

1K_0402_1%~D

+1.5VSDGPU

121_0402_1%~D

FBB_WCK23#(28) FBB_WCK23(28)

FBB_WCK01#(28) FBB_WCK01(28)

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

CV702

1

CV703

2

0.1U_0402_10V7K~D

CV705

CV706

1

CV704

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CV706

3

1

2

+1.5VSDGPU

1U_0402_6.3V6K~D

1

CV714

2

1

2

1

2

1

2

1 2

FBB_SEN0

1 2

RV377

FBB_CMD8 FBB_CMD15 FBB_CMD5 FBB_CMD12 FBB_CMD0

FBB_WCK23# FBB_WCK23

FBB_WCK01# FBB_WCK01

+FBB_VREFD_L

+FBB_VREFC_L

FBB_CMD13

0.1U_0402_10V7K~D

@

CV707

CV708

1

2

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D

@

CV716

CV717

1

CV715

2

Compal Secret Data

2011/08/25 2012/07/25

Compal Secret Data

MF=0 MF=1 MF=0MF=1

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

J5

A12/RFU/NC

K4

A8/A7 A10/A0

K5

A11/A6 A9/A1

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

H11

BA0/A2 BA2/A4

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

170-BALL

SGRAM GDDR5

K4G20325FC-HC05_FBGA170~D

@

Deciphered Date

2

MIRROR

2

DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9

DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

1

FBB_CMD[0..31]

FBB_D[0..31]

FBB_D24

A4

FBB_D25

A2

FBB_D26

B4

FBB_D27

B2

FBB_D28

E4

FBB_D29

E2

FBB_D30

F4

FBB_D31

F2 A11 A13 B11 B13 E11 E13 F11 F13

FBB_D8

U11

FBB_D9

U13

FBB_D10

T11

FBB_D11

T13

FBB_D12

N11

FBB_D13

N13

FBB_D14

M11

FBB_D15

M13 U4 U2 T4 T2 N4 N2 M4 M2

+1.5VSDGPU

B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14

A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14

Title

Block Diagram

Size Document Number Rev

Date: Sheet of

FBB_DBI[0..3]

FBB_EDC[0..3]

1U_0402_6.3V6K~D

CV695

1

2

Compal Electronics, Inc.

1

CV694

2

0.1U_0402_10V7K~D

CV696

1

FBB_CMD[0..31] (28,32)

FBB_D[0..31] (28)

FBB_DBI[0..3] (28)

FBB_EDC[0..3] (28)

0.1U_0402_10V7K~D

CV697

1

2

31 66Monday, March 26, 2012

CV698

1

2

0.1U_0402_10V7K~D

@

CV699

0.1

5

Memory Partition B - Upper 32 bits

UV11

MF=0 MF=1 MF=0MF=1

FBB_EDC7

FBB_EDC5

D D

CLKB1(28) CLKB1#(28)

RV387

40.2_0402_1%~D

1 2

RV388

40.2_0402_1%~D

0.01U_0402_16V7K~D

1

CV718

2

C C

B B

A A

FBVREF_ALTV(24,29,30,31)

CLKB1

CLKB1#

1K_0402_1%~D

+1.5VSDGPU

RV392 1K_0402_1%~DRV392 1K_0402_1%~D RV393 121_0402_1%~DRV393 121_0402_1%~D

+FBB_VREFD_H

+FBB_VREFC_H

1

2

+FBB_VREFD_H

RV396

931_0402_1%

RV398

931_0402_1%

2

G

5

1 2

1 2 1 2

FBB_WCK67#(28) FBB_WCK67(28) FBB_WCK67#(28)

FBB_WCK45#(28) FBB_WCK45(28)

12

1

2

CV725

12

820P_0402_50V7K~D

1

2

CV726

820P_0402_50V7K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

CV734

1

CV735

2

12

13

D

QV25

SSM3K7002FU_SC70-3~D

S

RV390

RV394

1.33K_0402_1%~D

RV395

1.33K_0402_1%~D

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D

1

CV736

2

+1.5VSDGPU

RV397

549_0402_1%~D

RV399

549_0402_1%~D

+FBB_VREFC_H

FBB_DBI7

FBB_DBI5

FBB_CMD30

FBB_CMD25

FBB_CMD26 FBB_CMD27 FBB_CMD17 FBB_CMD18

FBB_CMD20 FBB_CMD19 FBB_CMD23 FBB_CMD22

FBB_CMD24 FBB_CMD31 FBB_CMD21 FBB_CMD28 FBB_CMD16

FBB_WCK67# FBB_WCK67

FBB_WCK45# FBB_WCK45

FBB_CMD29

+1.5VSDGPU

0.1U_0402_10V7K~D

CV737

1

2

12

FBB_SEN2

@

CV738

C2

EDC0 EDC3

C13

EDC1 EDC2

R13

EDC2 EDC1

R2

EDC3 EDC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

J5

A12/RFU/NC

K4

A8/A7 A10/A0

K5

A11/A6 A9/A1

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

H11

BA0/A2 BA2/A4

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

A5

VPP/NC

U5

VPP/NC

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD

U10

VREFD

J14

VREFC

J2

RESET#

G1

VDD

L1

VDD

G4

VDD

L4

VDD

C5

VDD

R5

VDD

C10

VDD

R10

VDD

D11

VDD

G11

VDD

L11

VDD

P11

VDD

G14

VDD

L14

VDD

H1

VSS

K1

VSS

B5

VSS

G5

VSS

L5

VSS

T5

VSS

B10

VSS

D10

VSS

G10

VSS

L10

VSS

P10

VSS

T10

VSS

H14

VSS

K14

VSS

170-BALL

SGRAM GDDR5

K4G20325FC-HC05_FBGA170~D

@

4

MIRROR

4

DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9

DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15

DQ8 DQ16

DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23

DQ0 DQ24

DQ1 DQ25

DQ2 DQ26

DQ3 DQ27

DQ4 DQ28

DQ5 DQ29

DQ6 DQ30

DQ7 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

A4 A2 B4 B2 E4 E2 F4 F2 A11 A13 B11 B13 E11 E13 F11 F13 U11 U13 T11 T13 N11 N13 M11 M13 U4 U2 T4 T2 N4 N2 M4 M2

B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14

A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14

FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63

FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47

+1.5VSDGPU

1

2

3

UV10

MF=0 MF=1 MF=0MF=1

C2

EDC0 EDC3

C13

FBB_EDC6

FBB_DBI4

FBB_DBI6

CLKB1 CLKB1#

FBB_CMD30

FBB_CMD25

FBB_CMD22 FBB_CMD23 FBB_CMD20 FBB_CMD19

FBB_CMD17 FBB_CMD18 FBB_CMD27 FBB_CMD26

RV389

1K_0402_1%~D

1 2

FBB_SEN2

1 2

RV391

121_0402_1%~D

FBB_CMD24 FBB_CMD28 FBB_CMD16 FBB_CMD31 FBB_CMD21

0.1U_0402_10V7K~D

1

2

1U_0402_6.3V6K~D

CV740

FBB_WCK45# FBB_WCK45

FBB_WCK67# FBB_WCK67

+FBB_VREFD_H

+FBB_VREFC_H

FBB_CMD29

CV733

0.1U_0402_10V7K~D

@

CV741

1

2

0.1U_0402_10V7K~D

1

2

Compal Secret Data

FBB_WCK45#(28) FBB_WCK45(28)

FBB_WCK67(28)

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

CV727

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D

CV730

1

CV729

2

Issued Date

CV730

1

2

3

1

CV728

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0402_10V7K~D

CV731

1

2

+1.5VSDGPU

0.1U_0402_10V7K~D

@

CV732

1

2

1U_0402_6.3V6K~D

1

CV739

2

2011/08/25 2012/07/25

R13

R2

D2 D13 P13

P2

J12 J11

J3

J5

K4

K5 K10 K11

H10 H11

H5

H4

A5

U5

J1 J10 J13

J4

G3

G12

L3 L12

D5 D4

P5 P4

A10 U10

J14

J2

G1

L1

G4

L4

C5

R5 C10 R10 D11 G11

L11 P11 G14

L14

H1

CV742

K1 B5

G5

L5

T5 B10 D10 G10

L10

P10

T10 H14 K14

K4G20325FC-HC05_FBGA170~D

@

Deciphered Date

EDC1 EDC2 EDC2 EDC1 EDC3 EDC0

DBI0# DBI3# DBI1# DBI2# DBI2# DBI1# DBI3# DBI0#

CK CK# CKE#

A12/RFU/NC

A8/A7 A10/A0 A11/A6 A9/A1 BA1/A5 BA3/A3 BA2/A4 BA0/A2

BA3/A3 BA1/A5 BA0/A2 BA2/A4 A9/A1 A11/A6 A10/A0 A8/A7

VPP/NC VPP/NC

MF SEN ZQ

ABI# RAS# CAS# CS# WE# CAS# RAS# WE# CS#

WCK01# WCK23# WCK01 WCK23

WCK23# WCK01# WCK23 WCK01

VREFD VREFD VREFC

RESET#

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

170-BALL

SGRAM GDDR5

2

NORMAL

2

DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9

DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

1

FBB_CMD[0..31]

FBB_D32

A4

FBB_D33FBB_EDC4

A2

FBB_D34

B4

FBB_D35

B2

FBB_D36

E4

FBB_D37

E2

FBB_D38

F4

FBB_D39

F2 A11 A13 B11 B13 E11 E13 F11 F13

FBB_D48

U11

FBB_D49

U13

FBB_D50

T11

FBB_D51

T13

FBB_D52

N11

FBB_D53

N13

FBB_D54

M11

FBB_D55

M13 U4 U2 T4 T2 N4 N2 M4 M2

+1.5VSDGPU

B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14

A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14

Title

Block Diagram

Size Document Number Rev

Date: Sheet of

FBB_D[32..63]

FBB_DBI[4..7]

FBB_EDC[4..7]

1U_0402_6.3V6K~D

1

CV719

CV720

2

Compal Electronics, Inc.

1

0.1U_0402_10V7K~D

CV721

1

2

FBB_CMD[0..31] (28,31)

FBB_D[32..63] (28)

FBB_DBI[4..7] (28)

FBB_EDC[4..7] (28)

0.1U_0402_10V7K~D

@

CV722

1

2

32 66Monday, March 26, 2012

CV723

1

2

0.1U_0402_10V7K~D

CV724

0.1

5

4

3

2

1

+1.05VS to +1.05VSDGPU

+VCCP

UZ1

UZ1 SI4634DY-T1-GE3

D D

3.3VS_GFX_EN

1

CZ2

@CZ2

@

10U_0805_10V6M~D

2

RZ5 47K_0402_5%~DRZ5 47K_0402_5%~D

1 2

PT

SI4634DY-T1-GE3

8 7 6 5

4

1

0.1U_0402_25V6K~D

2

PT

+1.05VSDGPU

3A

1 2 3

CZ6

1

CZ3

@ CZ3

@

0.1U_0402_16V7K~D

2

PT

1

CZ4

@CZ4

@

10U_0805_10V6M~D

2

+3VS to +3VS_DELAY

PT

DGPU_PWR_EN(19,60)

DGPU_PWR_EN

+3VALW

12

RZ3

RZ3 100K_0402_5%~D

100K_0402_5%~D

3.3VS_GFX_ON#

61

DMN66D0LDW-7_SOT363-6~D

QZ2A

2

DMN66D0LDW-7_SOT363-6~D

QZ2B

5

+VSBP

12

RZ8

40.2K_0402_1%~D

3

4

3.3VS_GFX_EN

+3VS +3VS_DELAY

ST

RZ4 0_0402_5%~D

SHORT

RZ4 0_0402_5%~D

SHORT

1 2

12

RZ41

RZ41 150K_0402_5%~D

150K_0402_5%~D

D

S

45

G

3

1

@

0.1U_0402_25V6K~D

2

1.4A

CZ7

QZ1

QZ1 SI3456DDV-T1-GE3_TSOP6~D

SI3456DDV-T1-GE3_TSOP6~D

6

2 1

PT

C C

GPU Power Up Power Rail Sequence

Driver call

+3V_GPU

to enable GPU

Power EN

+GPU_CORE

+1.5V_GPU

+1.05V_GPU

+1.5V to +1.5VSDGPU

+1.5V

UZ2

SIR818DP-T1_POWERPAK-SO8-5~D

B B

1

CZ16

@CZ16

@

10U_0805_10V6M~D

2

3.3VS_GFX_EN

PT

RZ44 20K_0402_5%~DRZ44 20K_0402_5%~D

SIR818DP-T1_POWERPAK-SO8-5~D

5

1 2

+1.5VSDGPU

ST

9A

3 2 1

4

1

CZ13

0.1U_0402_25V6K~D

2

1

CZ14

@CZ14

@

0.1U_0402_16V7K~D

2

PT

1

CZ17

@CZ17

@

10U_0805_10V6M~D

2

The ramp time for any rail must be more than 40us.

GPU Power Down Sequence

First rail to power down

Last rail to power down

Toff < 10ms

Discharge

PT

A A

DGPU_PWR_EN#_D DGPU_PWR_EN#_D

+1.5VSDGPU +1.05VSDGPU

12

RZ10

ST

22_0402_5%~D

2N7002DW-7-F_SOT363-6

61

QZ5A

2

5

+GPU_CORE

12

RZ11

RZ11 22_0402_5%~D

22_0402_5%~D

2N7002DW-7-F_SOT363-6

3

QZ5B

DGPU_PWR_EN#_D 3.3VS_GFX_ON#

4

12

61

2

RZ15

RZ15 22_0402_5%~D

22_0402_5%~D

2N7002DW-7-F_SOT363-6

QZ17A

4

+3VS_DELAY

12

3

5

4

RZ6

RZ6 100_0603_5%~D

100_0603_5%~D

2N7002DW-7-F_SOT363-6

QZ17B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

NV3V3Pgood

27Mhz

GPU all PG

CLK REQ#

100MHz

GPU Reset#

PCIe Training

GPU Disable call

Link tear down

GPU Reset#

Power EN

27Mhz

100MHz

NV3V3Pgood

Call Return

Deciphered Date

GPU Power Up Sub-system Sequence

T1

T9 T2 T3

T8

T4 T5 T6 T7

GPU Power Down Sub-system Sequence

T1

T2 T3 T4 T5 T 6

2

T7

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

1

33 66Monday, March 26, 2012

T1 Custom T2 >0 T3 >0 T4 >0 T5 >100us T6 >0 T7 <48ms T8 500ms T9 >0

T1 Custom T2 >0 T3 >0 T4 <=0 T5 >=0 T6 Custom T7 Custom

0.1

A

+5VALW to +5VS

+5VALW +VSBP

12

RZ20

RZ20 100K_0402_5%~D

1 1

SUSP#(38,55,56,57)

100K_0402_5%~D

SUSP

61

2

QZ10A

DMN66D0LDW-7_SOT363-6~D

5

+5VALW

QZ6

QZ6 SI4800BDY-T1-GE3_SO8

SI4800BDY-T1-GE3_SO8

8

12

RZ14

RZ14 100K_0402_5%~D

100K_0402_5%~D

3

QZ10B

QZ10B DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

4

7

5

+5VS_PWR_EN +3VS_PWR_EN

PT

1 2 36

4

1

CZ15

0.1U_0603_50V7K~D

2

B

+5VS

2825mA

1

CZ11

10U_0805_10V6M~D

2

+3VALW to +3VS

SUSP

C

2

G

+VSBP

12

RZ17

RZ17 100K_0402_5%~D

100K_0402_5%~D

13

D

S

+3VALW

ST

QZ9

QZ9 2N7002_SOT23-3

2N7002_SOT23-3

QZ8

QZ8 SI4800BDY-T1-GE3_SO8

SI4800BDY-T1-GE3_SO8

8 7

5

4

1

2

PT

1 2 36

CZ38

0.1U_0603_50V_X7R

+3VS

1607mA

1

CZ20

CZ20 10U_0805_10V6M~D

10U_0805_10V6M~D

2

D

E

+1.5V To +1.5VS +3VALW to +3V_PCH

+3VALW

RZ35

+VSBP

12

RZ27

RZ27 330K_0402_5%

330K_0402_5%

3V/5V_PCH_PWR_EN+1.5VS_PWR_EN

3

12

QZ13B

DMN66D0LDW-7_SOT363-6~D

QZ13B

DMN66D0LDW-7_SOT363-6~D

5

RZ28

1.5M_0402_5%~D

4

SSI2

SI3456DDV-T1-GE3_TSOP6~D

D

6

2 1

SSI2SSI2

+1.5VS

12

RZ34

@ RZ34

@

470_0402_5%

+1.5VS_D

DMN66D0LDW-7_SOT363-6~D

3

@

QZ14B

5

4

RUN_ON_CPU1.5VS3#(8,12)

+VSBP

2 2

SUSP

2

G

Discharge

3 3

+5VALW

12

RZ33

@RZ33

@

100K_0402_5%~D

SYSON#

SSM3K7002F_SC59-3

13

D

@

2

G

S

EMI Request

@

QZ15

SYSON

SYSON(38,57)

4 4

1

CZ42

0.1U_0402_25V6K~D

2

SSI2 SSI2

12

RZ21

RZ21 330K_0402_5%

330K_0402_5%

ST

13

D

QZ11

QZ11 2N7002_SOT23-3

2N7002_SOT23-3

S

+1.5V +5VS +3VS

12

RZ39

@RZ39

@

470_0402_5%

+1.5V_D

SSM3K7002FU_SC70-3~D

13

D

2

G

@

G

@

QZ20

S

CZ43

0.1U_0402_25V6K~D

QT

1

2

+1.5V +1.5VS

12

RZ29

1.5M_0402_5%~D

SUSP SUSP

UZ4

SI3456DDV-T1-GE3_TSOP6~D

D

6

S

45 2 1

G

3

1

CZ41

0.1U_0603_50V_X7R

2

RZ13

@RZ13

@

470_0603_5%

1 2

+5VS_D

DMN66D0LDW-7_SOT363-6~D

61

@

QZ7A

2

992mA

1

CZ39

10U_0805_10V6M~D

2

12

@RZ37

@

470_0402_5%

+3VS_D

3

5

4

SSI2

RZ30

RZ36

@RZ36

@

470_0402_5%

SSM3K7002FU_SC70-3~D

@

QZ21

2

12

SUSP

PCH_PWR_EN(38)

SSI2

100K_0402_5%~D

+3V_PCH

12

RZ37

DMN66D0LDW-7_SOT363-6~D

@

QZ7B

PCH_PWR_EN# SUSP

+3V_PCH_D

13

D

2

G

S

+3VALW

12

61

2

RZ26

RZ26 100K_0402_5%~D

100K_0402_5%~D

PCH_PWR_EN#

DMN66D0LDW-7_SOT363-6~D

QZ13A

+VCCP

12

@RZ35

@

470_0402_5%

+VCCP_D

DMN66D0LDW-7_SOT363-6~D

61

@

QZ14A

QZ12

S

156mA

45

G

3

1

CZ48

0.1U_0603_50V_X7R

2

+3V_PCH

RUN_ON_CPU1.5VS3#

+5VALW to +5V_PCH

1

CZ45

CZ45 10U_0805_10V6M~D

10U_0805_10V6M~D

2

+1.5V_CPU_VDDQ

2

SSI2

12

+1.5V_CPU_VDDQ_CHG

61

RZ32

@ RZ32

@

470_0402_5%

DMN66D0LDW-7_SOT363-6~D

@

QZ16A

SI3456DDV-T1-GE3_TSOP6~D

6

2 1

RUN_ON_CPU1.5VS3#

QH5

D

S

G

3

1

2

+5V_PCH+5VALW

1mA

45

CZ49

0.1U_0603_50V_X7R

+0.75VS

12

@ RZ31

@

470_0402_5%

+DDR_CHG

DMN66D0LDW-7_SOT363-6~D

3

@

5

4

RZ31

QZ16B

1

CH57

CH57 10U_0805_10V6M~D

10U_0805_10V6M~D

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

A

B

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

C

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DC/DC Interface

LA-7851P

E

34 66Monday, March 26, 2012

0.1

5

LCD PWR CTRL

+LCDVDD +5VALW

12

RV401

RV401 100_0805_1%

100_0805_1%

D D

SSM3K7002FU_SC70-3~D

DV6

VGA_LVDDEN(18)

EC_ENVDD(38)

VGA_LVDDEN

EC_ENVDD

DV6

2

3

BAT54CW-7-F_SOT323-3~D

13

D

QV26

2

G

S

1

12

RV405

RV405 10K_0402_5%~D

10K_0402_5%~D

2

G

PT

12

RV402

RV402 10K_0402_5%~D

10K_0402_5%~D

RV404 150K_0402_5%~DRV404 150K_0402_5%~D

1 2

13

D

QV28

QV28 BSS138W-7-F_SOT323-3

BSS138W-7-F_SOT323-3

S

4

PT

1

CV745

0.1U_0402_16V7K~D

2

3

LVDS Conn.

+LCDVDD +3VS

1

CV3501

0.1U_0402_16V7K~D

+3VS

W=60mils

+LCDVDD

S

PT

QV27

2

QV27

G

AO3419L_SOT23-3

D

PT

1 3

+LCDVDD

W=60mils

1

CV746

4.7U_0805_10V6

2

1

CV747

0.1U_0402_16V7K~D

2

0.1U_0402_16V7K~D

2

+3VS

SSI2

RV438 0_0402_5%~D@ RV438 0_0402_5%~D@

1 2

RV416 0_0402_5%~D@ RV416 0_0402_5%~D@

1 2

DV3503 CH751H-40PT_SOD323-2~DDV3503 CH 751H-40PT_SOD323-2~D

BKOFF#(38)

VGA_PWM(18)

EC_INV_PWM(38)

2 1

DV10 RB751V-40_SOD323-2@D V10 RB751V-40_SOD323-2@

2 1

DV13 RB751V-40_SOD323-2DV13 RB751V-40_SOD323-2

2 1

1

CV3508

CV3508 10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

ST

1

CV3502

0.1U_0402_16V7K~D

2

LCD_DBC

PT

SSI2

DISPOFF#

12

RV403

RV403 10K_0402_5%~D

10K_0402_5%~D

INV_PWM

12

RV408

RV408 100K_0402_5%~D

100K_0402_5%~D

2

W=60mils

+LCDVDD

+3VS

LCD_TEST(38) LVDS_DDC_CLK(18) LVDS_DDC_DATA(18)

LVDS_A0-(18)

LVDS_A0+(18)

LVDS_A1-(18)

LVDS_A1+(18)

LVDS_A2-(18)

LVDS_A2+(18)

LVDS_ACLK-(18)

LCD_DCR(20)

LVDS_ACLK+(18)

LVDS_B0-(18)

LVDS_B0+(18)

LVDS_B1-(18)

LVDS_B1+(18)

LVDS_B2-(18)

LVDS_B2+(18)

LVDS_BCLK-(18)

LVDS_BCLK+(18)

SSI2

LCD_DBC(20)

+INV_PWR_SRC

LCD_TEST

LVDS_A0LVDS_A0+

LVDS_A1LVDS_A1+

LVDS_A2LVDS_A2+

LVDS_ACLKLVDS_ACLK+

LCD_DCRLCD_DCR

LVDS_B0LVDS_B0+

LVDS_B1LVDS_B1+

LVDS_B2LVDS_B2+

LVDS_BCLKLVDS_BCLK+

INV_PWM DISPOFF# LCD_DBC

W=60mils

1

JLVDS

CONNTST40MGND1

39

LCD_VDD

38

LCD_VDD

37

V_EDID

36

BIST

35

EDID_CLK

34

EDID_DATA

33

LVDS_A0-

32

LVDS_A0+

31

LVDS_A1-

30

LVDS_A1+

29

LVDS_A2-

28

LVDS_A2+

27

GND

26

LVDS_A_CLK-

25

LVDS_A_CLK+

24

GND

23

LVDS_B0-

22

LVDS_B0+

21

LVDS_B1-

20

LVDS_B1+

19

LVDS_B2-

18

LVDS_B2+

17

GND

16

LCD_B_CLK-

15

LCD_B_CLK+

14

VR_GND

13

VR_GND

12

VR_GND

11

CONNTST_GND

10

PWM

9

DISP_ON/OFF#

8

NC

7

VR_SRC

6

VR_SRC

5

VR_SRC

4

BREATH_WHITE_LED

3

BATT_YELLOW_LED

2

BATT_WHITE_LED

1

GND

ACES_59003-04006-001

CONN@

MGND2 MGND3 MGND4 MGND5 MGND6

ST

41 42 43 44 45 46

LCD backlight PWR CTRL

C C

1

CV752

0.1U_0402_25V6K~D

2

+INV_PWR_SRC

60mil

PT

B+

RV411 0_0603_5%~D@ RV411 0_0603_5%~D@

1 2

QV29

QV29 SI3457BDV-T1-E3_TSOP6~D

SI3457BDV-T1-E3_TSOP6~D

D

6

S

60mil

12

CV751

0.1U_0402_25V6K~D

+LCDVDD_R

PT PT

12

13

D

2

G

S

1

2

ST

SHORT

EN_INVPWR(38)

B B

1 2

RV415 0_0402_5%~D

4 5

RV412

RV412 1M_0402_5%~D

1M_0402_5%~D

PWR_SRC_ON

RV413

RV413 1M_0402_5%~D

1M_0402_5%~D

QV30

QV30 SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

2 1

G

3

Wedcam PWR CTRL

+3VS_CAM+3VS

253mA

RV440 0_0603_5%~D@RV440 0_0603_5%~D@

1 2

S

D

QV31 SI2301CDS-T1-GE3_SOT23-3

2

G

12

RV421

RV421 100K_0402_5%~D

100K_0402_5%~D

ST

13

D

QV33

QV33 2N7002_SOT23-3

2N7002_SOT23-3

S

1

CV757

0.1U_0402_16V7K~D

2

A A

EN_CAM(19)

D

13

G

2

1

CV755

@CV755

@

10U_0805_10V6M~D

2

PT

CCD Conn.

+3VS

PCH_SMLDATA(17,25, 38)

PCH_SMLCLK(17,25,38)

+3VS_CAM

1

CV749

0.1U_0402_16V7K~D

2

QM4A

@ QM4A

DMN66D0LDW-7_SOT363-6~D

@

6 1

RM23 0_0402_5%~D

1 2

QT

DMN66D0LDW-7_SOT363-6~D

QT

ST

RV417 100_0402_5%~DRV417 100_0402_5%~D

1 2

USB20_P12

USB20_N12

RI27 0_0402_5%~D

ST

RI26 0_0402_5%~D

DMIC_CLK_R USB20_N12_R

6

5

DMIC0_R

4

IP4223CZ6_SO6~D

1

CV748

0.1U_0402_16V7K~D

2

ST

For Ambient Light Sensor

USB20_P12(19)

USB20_N12(19)

* Reserved for EMI/ESD/RF need to close to JCCD

1

CV750

10U_0805_10V6M~D

2

+3VS +3VS

2

SHORT

@ QM4B

@

RM15 0_0402_5%~D

LV11

@LV11

@

DLW21SN900SQ2L_0805_4P~D

1

4

1 2

DV7

@ DV7

@

V I/O

V BUS

V I/O

QM4B

SHORT

1 2

V I/O

Ground

V I/O

3

SHORT

5

2

3

1

2

3

@ RH96

@

2.2K_0402_5%~D

4

USB20_P12_R

RH96

12

CV754

@CV754

@

10P_0402_50V8J~D

USB20_P12_R

USB20_N12_R

12

RH94

@ RH94

@

2.2K_0402_5%~D

CCD_SMBCLK

CCD_SMBDATA

USB20_P12_R USB20_N12_R

DMIC0_R

DMIC_CLK_R CCD_SMBCLK CCD_SMBDATA

Remove PIN7 CAM_DET#

ST

RV424 0_0402_5%~D

SHORT

RV424 0_0402_5%~D

SHORT

DMIC0(46)DMIC_CLK(46)

1 2

* Reserved for LCD sequence tuning

+5VALW

12

RV420

@RV420

@

100K_0402_5%~D

61

QV32A

@ QV32A

@

DMN66D0LDW-7_SOT363-6~D

+LCDVDD_R

DMN66D0LDW-7_SOT363-6~D

2

PT

DMIC0_RDMIC_CLK_R

12

@CV753

@

10P_0402_50V8J~D

+3VS_CAM

CV753

+INV_PWR_SRC

5

+3VS

JCCD

1

2

3

4

5

6

7

8

9

10

11

GND

12

GND

ACES_87036-1001-CP

CONN@

12

RV419

@ RV419

@

820_0805_1%

3

QV32B

@QV32B

@

DMN66D0LDW-7_SOT363-6~D

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

LVDS /camera conn.

LA-7851P

1

35 66Monday, March 26, 2012

0.1

5

HDMI Cost Reduce type

4

3

2

1

Place close to JHDMI1

RV422 0_0402_5%~D@RV422 0_0402_5%~D@

CV758 0.1U_0402_10V7K~DCV758 0.1U_0402_10V7K~D

HDMI_A3N_VGA(18)

+3VS

HDMI_A3P_VGA(18)

HDMI_A0N_VGA(18) HDMI_A0P_VGA(18)

HDMI_A1N_VGA(18) HDMI_A1P_VGA(18)

HDMI_A2N_VGA(18) HDMI_A2P_VGA(18)

13

D

QV34

2

G

2N7002_SOT23-3

G

2N7002_SOT23-3

S

PT

D D

C C

12

CV759 0.1U_0402_10V7K~DCV759 0.1U_0402_10V7K~D

12

CV760 0.1U_0402_10V7K~DCV760 0.1U_0402_10V7K~D

12

CV761 0.1U_0402_10V7K~DCV761 0.1U_0402_10V7K~D

12

CV762 0.1U_0402_10V7K~DCV762 0.1U_0402_10V7K~D

12

CV763 0.1U_0402_10V7K~DCV763 0.1U_0402_10V7K~D

12

CV764 0.1U_0402_10V7K~DCV764 0.1U_0402_10V7K~D

12

CV765 0.1U_0402_10V7K~DCV765 0.1U_0402_10V7K~D

12

PT

RV436 470_0402_5%RV436 470_0402_5%

1 2

RV435 470_0402_5%RV435 470_0402_5%

1 2

RV434 470_0402_5%RV434 470_0402_5%

1 2

RV433 470_0402_5%RV433 470_0402_5%

1 2

RV432 470_0402_5%RV432 470_0402_5%

1 2

RV431 470_0402_5%RV431 470_0402_5%

1 2

RV430 470_0402_5%RV430 470_0402_5%

1 2

RV429 470_0402_5%RV429 470_0402_5%

1 2

TMDS_TXCN TMDS_TXCP

TMDS_TX0N TMDS_TX0P

TMDS_TX1N TMDS_TX1P

TMDS_TX2N TMDS_TX2P

TMDS_TX2P

TMDS_TX2N

TMDS_TX1P

TMDS_TX1N

TMDS_TX0P

TMDS_TX0N

TMDS_TXCP

TMDS_TXCN

TMDS_TXCP

TMDS_TX0N

TMDS_TX0P

TMDS_TX1N

TMDS_TX1P

TMDS_TX2N

TMDS_TX2P

HDMI DDC

B B

ST

DV9

RB751V40_SC76-2

+5V_HDMI_DDC

+3VS

2.2K_0402_5%~D

2

DDC_CLK_HDMI

PCH_SDVO_CTRLCLK(18)

PCH_SDVO_CTRLDATA(18)

A A

5

4

QV35B

DMN66D0LDW-7_SOT363-6~D

61

QV35A

DMN66D0LDW-7_SOT363-6~D

3

DDC_DAT_HDMI

RV445

12

RV447

2.2K_0402_5%~D

Place close to JHDMI1

1 2

LV7

PT

1

4

DLW21SN900HQ2L_0805_4P~D

RV423 0_0402_5%~D@RV423 0_0402_5%~D@

1 2

RV425 0_0402_5%~D@RV425 0_0402_5%~D@

1 2

LV8

PT

1

4

DLW21SN900HQ2L_0805_4P~D

RV426 0_0402_5%~D@RV426 0_0402_5%~D@

1 2

RV428 0_0402_5%~D@RV428 0_0402_5%~D@

1 2

LV9

PT

1

4

DLW21SN900HQ2L_0805_4P~D

RV437 0_0402_5%~D@RV437 0_0402_5%~D@

1 2

RV439 0_0402_5%~D@RV439 0_0402_5%~D@

1 2

LV10

PT

1

4

DLW21SN900HQ2L_0805_4P~D

RV441 0_0402_5%~D@RV441 0_0402_5%~D@

1 2

+5VS

12

RV443

@RV443

@

0_0402_5%~D

1 2

TMDS_L_TXCN

2

TMDS_L_TXCP

3

TMDS_L_TX0N

2

TMDS_L_TX0P

3

TMDS_L_TX1N

2

TMDS_L_TX1P

3

TMDS_L_TX2N

2

TMDS_L_TX2P

3

For EMI

SSI2

1

CV797

@CV797

@

4.7P_0402_50V8C~D

2

1

CV800

@CV800

@

4.7P_0402_50V8C~D

2

1

CV802

@CV802

@

4.7P_0402_50V8C~D

2

1

CV804

@CV804

@

4.7P_0402_50V8C~D

2

HDMI HPD

HDMI_PCH_HPD#(18)

1

CV798

@CV798

@

4.7P_0402_50V8C~D

2

1

CV799

@CV799

@

4.7P_0402_50V8C~D

2

1

CV801

@CV801

@

4.7P_0402_50V8C~D

2

1

CV803

@CV803

@

4.7P_0402_50V8C~D

2

+5VS

2 1 3

NC

BAT1000-7-F_SOT23-3~D

+3VS

12

RV442

RV442 1M_0402_5%~D

1M_0402_5%~D

QV36 2N7002_SOT23-3

W=40mils

DV8

FV1 1.5A_6V_1206L150PR~DFV1 1.5A_6V_1206L150PR~D

For EMI Reserve

SSI2

CV768 0.1U_0402_25V6K~D@ CV768 0.1U_0402_25V6K~D@

CV795 0.1U_0402_25V6K~D@ CV795 0.1U_0402_25V6K~D@

CV796 0.1U_0402_25V6K~D@ CV796 0.1U_0402_25V6K~D@

close to JHDMI

+3VS

G

2

PT

13

D

S

D

S

12

1

2

1 2

HDMI_HPLUG

12

RV446

RV446 20K_0402_5%~D

20K_0402_5%~D

8/26 JHDMI change to XPS14 CIS Symbol

8/16 update for SSI

JHDMI

HDMI_HPLUG

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D CV766

CV766

+VDISPLAY_VCC

10U_0603_6.3V6M~D

DDC_DAT_HDMI

CV767

1

DDC_CLK_HDMI HDMI_Reserved HDMI_CEC

2

TMDS_L_TXCN

TMDS_L_TXCP TMDS_L_TX0N

TMDS_L_TX0P TMDS_L_TX1N

TMDS_L_TX1P TMDS_L_TX2N

TMDS_L_TX2P

HDMI_HPLUG

HDMI_Reserved

HDMI_CEC

JHDMI

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

GND

3

D2-

GND

2

D2_shield

GND

1

D2+

CONN@

GND

CONCR_099AMAC19CBACNF

20 21 22 23

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

HDMI

LA-7851P

1

36 66Monday, March 26, 2012

0.1

5

Mini DP

CV771 0.1U_0402_10V6K~DDP1.2@ CV771 0.1U_0402_10V6K~DDP1.2@

DISP_A0P_VGA(25) DISP_A0N_VGA(25)

D D

DISP_A1P_VGA(25) DISP_A1N_VGA(25) DISP_A2P_VGA(25) DISP_A2N_VGA(25) DISP_A3P_VGA(25) DISP_A3N_VGA(25)

DISP_AUXP_VGA(25) DISP_AUXN_VGA(25)

DISP_A0P_PCH(18) DISP_A0N_PCH(18) DISP_A1P_PCH(18) DISP_A1N_PCH(18) DISP_A2P_PCH(18) DISP_A2N_PCH(18) DISP_A3P_PCH(18) DISP_A3N_PCH(18)

DP_DDC_CLK(18) DP_DDC_DATA(18)

C C

PCH_DPC_AUXP(18) PCH_DPC_AUXN(18)

RV450 0_0402_5%~DDP1.2@ RV450 0 _0402_5%~DDP1.2@ RV451 0_0402_5%~DDP1.2@ RV451 0 _0402_5%~DDP1.2@

RV457 0_0402_5%~DDP1.1@ RV457 0 _0402_5%~DDP1.1@ RV458 0_0402_5%~DDP1.1@ RV458 0 _0402_5%~DDP1.1@

RV459 0_0402_5%~DDP1.1@ RV459 0 _0402_5%~DDP1.1@ RV460 0_0402_5%~DDP1.1@ RV460 0 _0402_5%~DDP1.1@

CV772 0.1U_0402_10V6K~DDP1.2@ CV772 0.1U_0402_10V6K~DDP1.2@ CV773 0.1U_0402_10V6K~DDP1.2@ CV773 0.1U_0402_10V6K~DDP1.2@ CV774 0.1U_0402_10V6K~DDP1.2@ CV774 0.1U_0402_10V6K~DDP1.2@ CV775 0.1U_0402_10V6K~DDP1.2@ CV775 0.1U_0402_10V6K~DDP1.2@ CV776 0.1U_0402_10V6K~DDP1.2@ CV776 0.1U_0402_10V6K~DDP1.2@ CV777 0.1U_0402_10V6K~DDP1.2@ CV777 0.1U_0402_10V6K~DDP1.2@ CV778 0.1U_0402_10V6K~DDP1.2@ CV778 0.1U_0402_10V6K~DDP1.2@

CV779 0.1U_0402_10V6K~DDP1.1@ CV779 0.1U_0402_10V6K~DDP1.1@ CV780 0.1U_0402_10V6K~DDP1.1@ CV780 0.1U_0402_10V6K~DDP1.1@ CV781 0.1U_0402_10V6K~DDP1.1@ CV781 0.1U_0402_10V6K~DDP1.1@ CV782 0.1U_0402_10V6K~DDP1.1@ CV782 0.1U_0402_10V6K~DDP1.1@ CV783 0.1U_0402_10V6K~DDP1.1@ CV783 0.1U_0402_10V6K~DDP1.1@ CV784 0.1U_0402_10V6K~DDP1.1@ CV784 0.1U_0402_10V6K~DDP1.1@ CV785 0.1U_0402_10V6K~DDP1.1@ CV785 0.1U_0402_10V6K~DDP1.1@ CV786 0.1U_0402_10V6K~DDP1.1@ CV786 0.1U_0402_10V6K~DDP1.1@

1 2 1 2

12 12 12 12 12 12 12 12

DISP_A0P DISP_A0N DISP_A1P DISP_A1N DISP_A2P DISP_A2N DISP_A3P DISP_A3N

DISP_AUXP DISP_AUXN

DISP_A0P DISP_A0N DISP_A1P DISP_A1N DISP_A2P DISP_A2N DISP_A3P DISP_A3N

DISP_AUXP DISP_AUXN

DISP_AUXP_C DISP_AUXN_C

4

DP_CBL_DET(19)

CAB_DET_SINK#

Close to JMDP1

2N7002_SOT23-3

DP_CBL_DET

PT

QV37

+3VS

12

RV452

RV452 100K_0402_5%~D

100K_0402_5%~D

13

D

2

G

S

ST

RV449

RV449 0_0402_5%~D

0_0402_5%~D

SHORT

1 2

+3VS

12

RV453

RV453 1M_0402_5%~D

1M_0402_5%~D

3

FV2

1 2

1.5A_6V_1206L150PR~D

12

RV454

RV454 1M_0402_5%~D

1M_0402_5%~D

+3VS_DP

DISP_HPD_SINK DISP_A0P CAB_DET_SINK DISP_A0N DISP_CEC

DISP_A1P DISP_A3P DISP_A1N DISP_A3N

DISP_A2P DISP_CLK_AUXP_CONN DISP_A2N DISP_DAT_AUXN_CONN

2

CV770

0.1U_0402_16V7K~D

CV770

0.1U_0402_16V7K~D

10U_0603_6.3V6M~D

1

CV769

2

JMDP

1 2 3 4 5 6 7 8 9

10 11 12 13 14 15 16 17 18 19

ACON_MAR2A-20K1200

CONN@

RV456 5.1M_0402_5%RV456 5.1M_0402_5%

CV787 22U_0805_6.3V6 M~DCV787 22U _0805_6.3V6M~D

CV788 0.1U_0402_10V6 K~DCV788 0.1U_0402_ 10V6K~D

12

1

2

CONN@

QT

GND HPD LANE0_P CONFIG1 LANE0_N CONFIG2 GND GND LANE1_P LANE3_P LANE1_N LANE3_N GND GND LANE2_P AUX_CH_P LANE2_N

GND1

AUX_CH_N

GND2

GND

GND3

DP_PWR20GND4

CPU

Graphics

DP signal

mDP DP 1.1 DP 1.1 DP 1.2 DP 1.2

21 22 23 24

Config 1 Config 3 Config 4 Config 5

Core i3 DC

N13P-GV (1GB)

Core i5 DC

N13P-GV (1GB)

PCH PCH GPU

1

Core i5 DC

N13P-GS (2GB)

Core i7 QC

N13P-GS (2GB)

GPU

DDC Dongle SW for DP

RV461 0_0402_5%~DDP1.2@ RV461 0 _0402_5%~DDP1.2@

+3VS_DELAY

+3VS

B B

+3VS_DDC

A A

1 2

RV462 0_0402_5%~DDP1.1@ RV462 0 _0402_5%~DDP1.1@

1 2

RV468 100K_0402_5%~DDP1.1@ RV468 100K_0402_5%~DDP1.1@

1 2

RV471 100K_0402_5%~DDP1.1@ RV471 100K_0402_5%~DDP1.1@

+3VS_DDC

CAB_DET_SINK# DISP_AUXP

CAB_DET_SINK# DISP_AUXN

DISP_DAT_AUXN_CONN

+3VS_DDC

CV789 0.1U_0402_10V6K~DDP1.1@ CV 789 0.1U_0402_10V6K~DDP1.1@

RV465 0_0402_5%~DDP1.2@ RV465 0_0402_5%~DDP1.2@

RV476 0_040 2_5%~DD P1.2@ RV476 0_0402_5%~DDP1.2@

CV794 0.1U_0 402_10V6K~DDP1.1@ CV794 0.1U_0402_10V6K~DDP1.1@

1 2

12

DISP_CLK_AUXP_R

UV13

1 2

3

4 5

6

7

PI3C3125LEX_TSSOP14~D

BE0 A0

B0

BE1 A1

B1

GND

12

VCC BE3

BE2

DISP_DAT_AUXN_R

+3VS_DDC

14

CAB_DET_SINK

13

DISP_AUXP_C

12

A3

11

B3

A2

B2

10

9

8

CAB_DET_SINK

DISP_AUXN_C

DP1.1A@ --> DP output from iGPU

1

CV790

0.1U_0402_10V6K~D

2

CV791 0.1U_0402_10V6K~D

12

DP1.2@

RV470 100K_0402_5%~D

1 2

DP1.2@

CV792 0.1U_0402_10V6K~D

12

DP1.2@

RV472 100K_0402_5%~D

1 2

DP1.2@

RV467

2K_0402_5%~D

DP1.1@

DISP_AUXPDISP_CLK_AUXP_CONN

DISP_AUXN

+3VS_DDC

RV473

100K_0402_5%~D

DP1.2@

+3VS_DDC

12

RV469

2K_0402_5%~D

DP1.1@

12

RV474

RV474 100K_0402_5%~D

100K_0402_5%~D

DP1.2@

DP HPD to PCH (iGPU)

+3VS

ST

C

QV38

2

1 2

B

MMBT3904_SOT23-3~D

RV464 0_0402_5%~D

SHORT

RV464 0_0402_5%~D

SHORT

DP_PCH_HPD(16,18)

1 2

QT

B

RV463 150K_0402_5%RV463 150K_04 02_5%

E

3 1

12

RV466

RV466 10K_0402_5%~D

10K_0402_5%~D

DP HPD for DGPU output (Optimus)

+3VS_DELAY

1

DP1.2@

CV793

0.1U_0402_16V7K~D

UV14

DP1.2@ UV14

DP1.2@

SN74AHC1G08DCKR_SC70-5

DP1.2@

RV475 0_0402_5%~D

DGPU_PWROK(19,20,60)

RV475 0_0402_5%~D

DISP_HPD_SINK

12

1

2

RV478 0_0402_5%~D

1 2

DP1.1@

2

5

P

IN1

IN2

DP_HPD

4

O

G

3

DISP_HPD_SINK

DP_HPD (24)

DP1.2@ --> DP output from dGPU

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Mini DP

LA-7851P

1

0.1

37 66Monday, March 26, 2012

0.1

5

+3VALW_EC

10U_0603_6.3V6M~D

CE22

1

2

KSI[0..7](39)

KSO[0..16](39)

PT

SSI2

PT

EC to BAT,Charge

ST

RE34 0_0402_5%~D

SHORT

RE34 0_0402_5%~D

SHORT

1 2

RE35 0_0402_5%~D

SHORT

RE35 0_0402_5%~D

SHORT

1 2

PT

EC_WLAN_WAKE#(42)

PT

AUD_MUTE#(46,47)

BATT_TURBO_BOOST(53)

QT

RE61 0_0402_5%~D

RE39 0_0402_5%~D

SUSCLK(18)

Y4A

RE39 0_0402_5%~D

ST

+3VS

1

CE19

0.1U_0402_16V7K~D

2

5

UE2 SN74LVC1G06DCKR_SC70-5

P

2

G3NC

1

0.1U_0402_16V7K~D

1

CE4

2

GATEA20(20) KB_RST#(20)

SERIRQ(16,40)

LPC_FRAME#(16,40,42)

CLK_PCI_LPC(19)

PLT_RST#(6,8,19,40,41,42)

EC_SCI#(20)

KSI[0..7]

KSO[0..16]

SUSPWRDNACK(18)

EC_SMB_CK1(52,53) EC_SMB_DA1(52,53)

EC_SMI#(20)

EC_INV_PWM(35)

SYSTEM_FAN_FB(39)

WAKE_PCH#(18)

USB_PWR_EN#(44)

SHORT

1 2

SHORT

1 2

12

RE42

RE42 100K_0402_5%~D

100K_0402_5%~D

0.1U_0402_16V7K~D

1

2

LPC_AD3(16,40,42) LPC_AD2(16,40,42) LPC_AD1(16,40,42) LPC_AD0(16,40,42)

PS_ID(52)

100K_0402_5%~D

CE5

BATT_TURBO_BOOST

RE40

CLK_PCI_LPC

RE13

SSI2

+3VLP

+3VALW

1

22P_0402_50V8J~D

2

EMI Request

SSI2

PT

CE15

@ CE15

@

PCH_SMLCLK

PCH_SMLDATA

KSO3

PLT_RST#

EC_RST#

RE56 0_0402_5%~D@RE56 0_0402_5%~D@

1 2

ST

RE60 0_0402_5%~D

SHORT

RE60 0_0402_5%~D

SHORT

1 2

QT

BATT_CAP_LED#_LV5(48)

EC_RST#

EC_SMB_CK1

EC_SMB_DA1

EAPD#_R

WAKE_PCH#

EC KB9012

12

D D

33_0402_5%~D

12

CE11

CE11 10P_0402_50V8J~D

10P_0402_50V8J~D

SSI2

+3VALW_EC

RE11 47K_0402_5%~DRE11 47K_0402_5%~D

1 2

RE17 2.2K_0402_5%~DRE17 2.2K_0402_5%~D

1 2

RE18 2.2K_0402_5%~DRE18 2.2K_0402_5%~D

1 2

RE28 10K_0402_5%~D@RE28 10K_0402_5%~D@

1 2

RE33 10K_0402_5%~D@RE33 10K_0402_5%~D@

C C

1 2

+3VS

RE36 2.2K_0402_5%~DRE36 2.2K_0402_5%~D

1 2

RE37 2.2K_0402_5%~DRE37 2.2K_0402_5%~D

1 2

RE43 10K_0402_5%~D@RE43 10K_0402_5%~D@

1 2

RE57 10K_0402_5%~DRE57 10K_0402_5%~D

1 2

CE14 0.1U_0402_16V7K~DCE14 0.1U_0402_16V7K~D

1 2

EC to Ambient Light Sensor, GPU

ST

T43 revrese under Keyboard for easy to debug

B B

A A

H_PROCHOT#(8,53)

SSI2

T43 PAD@ T43 PAD@

EC_RX(42)

VR_HOT#(59)

PCH_SMLCLK(17,25,35) PCH_SMLDATA(17,25,35)

PM_SLP_S3#(18,40,43) PM_SLP_S5#(18)

PT

USBCHG_DET_EC#

EC_TX(42)

PT

GPU_VR_HOT#(24,60)

ST

12

RE41

RE41 0_0402_5%~D

0_0402_5%~D

SHORT

H_PROCHOT# H_PROCHOT#_EC

1

CE21

47P_0402_50V8J~D

2

5

0.1U_0402_16V7K~D

1

CE6

2

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_LPC PLT_RST# EC_RST# EC_SCI# BATT_CAP_LED#_LV5

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16

SUSPWRDNACK

EC_SMB_CK1 EC_SMB_DA1 PCH_SMLCLK PCH_SMLDATA

PM_SLP_S3#_R PM_SLP_S5#_R EC_SMI# PS_ID PBTN_SW# EC_WLAN_WAKE#

EC_INV_PWM SYSTEM_FAN_FB WAKE_PCH# EC_TX EC_RX AUD_MUTE#

USB_PWR_EN#

GPU_PROTECT

EC_CRY2

12

1

2

HWPG

4

0.1U_0402_16V7K~D

1

CE7

2

K13

E12 E13 D12 D13 C12 C13 D10

H12 H13 H10

G10 G13 G12 F13 F12 F10

E10

M11 N11 K10

N12 M13

CE18

CE18 20P_0402_50V8J~D

20P_0402_50V8J~D

4

1000P_0402_50V7K~D

1

CE8

CE9

2

UE1

M2

GA20/GPIO00

L2

KBRST#/GPIO01

M3

SERIRQ#

K4

LFRAME#

N3

LAD3

M4

LAD2

K5

LAD1

N4

LPC & MISC

LAD0

N5

PCICLK

M5

PCIRST#/GPIO05 ECRST#

N6

SCI#/GPIO0E

M6

CLKRUN#/GPIO1D

D9

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37

J13

KSO0/GPIO20

J12

KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24

H9

KSO5/GPIO25

G9

KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C

F9

KSO13/GPIO2D KSO14/GPIO2E

E9

KSO15/GPIO2F

E8

KSO16/GPIO48

D8

KSO17/GPIO49

A8

SCL0/GPIO44

A7

SDA0/GPIO45

B8

SCL1/GPIO46

A6

SDA1/GPIO47

J5

PM_SLP_S3#/GPIO04

N9

PM_SLP_S5#/GPIO07

L13

EC_SMI#/GPIO08

K6

LID_SW#/GPIO0A

N7

SUSP#/GPIO0B

M7

PBTN_OUT#/GPIO0C

N8

EC_PME#/GPIO0D

K8

EC_THERM#/GPIO11 FAN_SPEED1/FANFB0/GPIO14 FANFB1/GPIO15 EC_TX/GPIO16

K9

EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19

L12

NUMLED#/GPIO1A

J1

XCLKI

K1

XCLKO

KB9012BF-A3_LFBGA128

SA_PGOOD(58)

+1.5V_PWROK(57)

+1.8V_PWROK(55)

POK(52,54)

LE1

LE1 FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

1 2

J7

K12

M12

VCC

PWM Output

DA Output

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SPI Device Interface

SM Bus

GPIO

GND

J8

J9

+EC_VCCA

1

2

ECAGND

ST

RE10 0_0402_5%~D

B11

K7

J4

J6

VCC

AVCC

INVT_PWM/PWM0/GPIO0F

BEEP#/PWM1/GPIO10

FANPWM0/GPIO12

ACOFF/FANPWM1/GPIO13

BATT_TEMP/AD0/GPI38

BATT_OVP/AD1/GPI39

ADP_I/AD2/GPI3A

AD Input

SPI Flash ROM

GPIO

GPO

GPI

GND

G2

J10

N13

ST

RE27 0_0402_5%~D

1 2

RE45 0_0402_5%~D

1 2

RE46 0_0402_5%~D

1 2

SSI2

RE24 0_0402_5%~D@RE24 0_0402_5%~D@

1 2

AD3/GPI3B AD4/GPI42

SELIO2#/AD5/GPI43

DAC_BRIG/DA0/GPO3C

EN_DFAN1/DA1/GPO3D

IREF/DA2/GPO3E

DA3/GPO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXIOA00 SDICLK/GPXIOA01

SDIDO/GPXIOA02

SDIDI/GPXIOD00

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04

EC_ON/GPXIOA05

EC_SWI#/GPXIOA06

ICH_PWROK/GPXIOA07

BKOFF#/GPXIOA08

WL_OFF#/GPXIOA09

GPXIOA10 GPXIOA11

PM_SLP_S4#/GPXIOD01

ENBKL/GPXIOD02

GPXIOD03 GPXIOD04 GPXIOD05 GPXIOD06 GPXIOD07

AGND

20mil

A11

ECAGND

LE2 FBMA-L11-160808-800LMT_0603

SHORT

CE10

0.1U_0402_16V7K~D

SHORT

1 2

MOSI MISO

SPICS#

V18R

1 2

+3VALW_EC

12

3

+3VLP

CE13 100P_0402_50V8J~D

1 2

KB_LED_PWM

M9

BEEP#

M8

VGATE

M10

ACOFF

N10

EC_BATT_PRS

B13

ODD_EJECT_R

A13

ADP_I

B12

AD_BID0

A12

PWRSHARE_EN_EC#

E7

AOAC_THERMAL

D7

BATT_CAP_LED#_LV1

B10

EN_DFAN1

A9

EC_ENVDD

A10

BATT_CAP_LED#_LV2

B9

EAPD#_R

D6

PWRSHARE_OE#

E6

AC_PRESENT

E5

PCH_PWROK

D5

TP_CLK

A5

TP_DATA

B5

EN_INVPWR

B1

EN_WOL

A1

HDA_SDO

C1 C2

BATT_CAP_LED#_LV4

J2

BATT_CAP_LED#_LV3

K2

WLAN_EN#

M1 N2

GPU_HOT#_R GPU_HOT#

ENBKL

B6

PCH_PWR_EN

B7

BATBTN#

B4

BATT_CHG_LED#

A4

CAPS_LED#

B3

LCD_TEST

A3

BATT_LOW_LED#

A2

SYSON

B2

VR_ON

H5

PM_SLP_S4#

N1

PCH_RSMRST#

D4

EC_LID_OUT#

D1

VCIN1_PH_R

D2

H_PROCHOT#_EC

E2

VCOUT0_PH#

E4

BKOFF#

E1

CPU1.5V_S3_GATE

F4

EC_LAN_WAKE#

F2

HWPG

F1

AC_IN

F5

EC_ON

G1 G5

LID_SW_IN#

H1

SUSP#

G4

PBTN_OUT#

H4 H2

EC_PECI

RE38 43_0402_1% RE38 43_0402_1%

+V18R

L1

1

4.7U_0805_10V6

2

KB_LED_PWM (39) BEEP# (46) VGATE (6,18,59) ACOFF (53)

ADP_I (52,53)

PWRSHARE_EN_EC# (45)

BATT_CAP_LED#_LV1 (48) EN_DFAN1 (39) EC_ENVDD (35) BATT_CAP_LED#_LV2 (48)

ST

RE16 0_0402_5%~D

SHORT

RE16 0_0402_5%~D

SHORT

1 2

PWRSHARE_OE# (45) AC_PRESENT (18) PCH_PWROK (18) TP_CLK (39) TP_DATA (39)

EN_INVPWR (35)

HDA_SDO (16)

ST

RE25 0_0402_5%~D

SHORT

RE25 0_0402_5%~D

SHORT

1 2

BATT_CAP_LED#_LV4 (48) BATT_CAP_LED#_LV3 (48)

RE22 0_0402_5%~D

SHORT

RE22 0_0402_5%~D

SHORT

1 2

ENBKL (18)

PCH_PWR_EN (34)

BATT_CHG_LED# (48) CAPS_LED# (39) LCD_TEST (35) BATT_LOW_LED# (48) SYSON (34,57) VR_ON (59) PM_SLP_S4# (18)

PCH_RSMRST# (18) EC_LID_OUT# (17)

ST

BKOFF# (35) CPU1.5V_S3_GATE (8,12,57)

EC_ON (54)

LID_SW_IN# (40) SUSP# (34,55,56,57) PBTN_OUT# (6,18)

1 2

CE17

RE26 0_0402_5%~D

SHORT

RE26 0_0402_5%~D

SHORT

1 2

ECAGNDEC_BATT_PRS

Close to pin B13

EC_BATT_PRS (52,53)

ST

RE31 0_0402_5%~D

1 2

VCIN0_PHVCIN0_PH_R

QT

SSI2

VCOUT0_PH#

SSI2

EC_ON_CTRL#

Power on Circuit

H_PECI (8,20)

BATBTN#(48)

PBTN_SW#(39)

2

SSI2

SHORT

EAPD# (40,46,47)

EN_WOL (41)

VCIN0_PH (52)

WLAN_EN# (42)

GPU_HOT# (24)

QT

RE32 100K_0402_5%~DRE32 100K_0402_5%~D

1 2

VCIN1_PH

VCOUT0_PH# (54)

EC_LAN_WAKE# (41)

AC_IN (53)

RE47 10K_0402_5%~DRE47 10K_0402_5%~D

+3VLP

1 2

RE48 10K_0402_5%~DRE48 10K_0402_5%~D

1 2

PBTN_SW#

SSI2

USBCHG_DET#(45)

RE29

RE29 10K_0402_5%~D

10K_0402_5%~D

HWPG

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/08/25 2012/07/25

DE7 RB751V40_SC76-2DE7 RB751V40_SC76-2

1 2

DE10 RB751V40_SC76-2DE10 RB751V40_SC76-2

1 2

Compal Secret Data

Deciphered Date

2

ODD_EJECT (16,43)

PT

SSI2

VCIN1_PH (52)

SSI2

PT

ST

AC_IN

SSI2

ST

+3VLP

DE8 RB751V40_SC76-2DE8 R B751V40_SC76-2

DE9 RB751V40_SC76-2DE9 R B751V40_SC76-2

+3VALW_EC

+3VLP

1

SSI2

Board ID

12

RE9

RE9 100K_0402_5%~D

100K_0402_5%~D

AD_BID0

12

RE12

RE12 56K_0402_5%

56K_0402_5%

Analog Board ID definition, Please see page 4.

RE14 4.7K_0402_5%~DRE14 4.7K_0402_5%~D

1 2

RE15 4.7K_0402_5%~DRE15 4.7K_0402_5%~D

1 2

RE58 100K_0402_5%~D@ RE58 100K_0402_5%~D@

1 2

RE30 10K_0402_5%~DRE30 10K_0402_5%~D

1 2

CE16 100P_0402_50V8J~DCE16 100P_0402_50V8J~D

1 2

CE23 1U_0402_6.3V6K~DC E23 1U_0402_6.3V6K~D

1 2

1

2

TP_CLK

TP_DATA

SYSON

EC_ON

+3VALW_EC

Ra

QT

Rb

AOAC_THERMAL

+3VLP

ST

12

R45

R45 47K_0402_1%~D

47K_0402_1%~D

AOAC_THERMAL

1 2

12

RE55

RE55 10K_0402_5%~D

10K_0402_5%~D

USBCHG_DET_EC#

ST

12

RE50

RE50 100K_0402_5%~D

100K_0402_5%~D

USBCHG_DET#_D

12

ST

RE44

@RE44

@

150K_0402_5%

Title

Size Document Number Rev

Date: Sheet of

12

R46

R46 100K_0402_1%_TSM0B104F4251RZ

100K_0402_1%_TSM0B104F4251RZ

+3VLP

12

QT

RE59

RE59 1M_0402_5%~D

1M_0402_5%~D

QE1

QE1 2N7002_SOT23-3

2N7002_SOT23-3

PT

1

2

ST

+3VLP

PT

12

13

D

2

G

S

Compal Electronics, Inc.

EC ENE-KB930/ ENE3810

LA-7851P

CE12

0.1U_0402_16V7K~D

+3VS

RE49

RE49 100K_0402_5%~D

100K_0402_5%~D

EC_ON_CTRL#BATBTN#

CE26

0.1U_0402_25V6K~D

USBCHG_DET_D (54)

38 66Monday, March 26, 2012

0.1

5

Power on Button

D D

QT

SW1

2

1

DTSM-61N-S-V-T-R(756)_4P

C C

4

3

2

3

DE2

@DE2

@

PESD24VS2UT_SOT23-3~D

1

4

PBTN_SW# (38)

3

FAN Control

+3VS +5VS

SYSTEM_FAN_FB(38)

+FAN_POWER +FAN_POWER+5VS

1

CE54

2.2U_0603_6.3V6K~D

2

1

CE56

1000P_0402_50V7K~D

2

12

RE51

RE51 100K_0402_5%~D

100K_0402_5%~D

DE4 CH751H-40PT_SOD323-2~DDE4 CH751H-40PT_SOD323-2~D

1

2

1

2

2 1

CE27

0.01U_0402_16V7K~D

CE57

2.2U_0603_6.3V6K~D

EN_DFAN1(38)

40mil

12

RE53

10K_0402_5%~D

+5VS

EN_DFAN1

+FAN_POWER

40mil

SSI2

UE4

1

VEN

Thermal Pad

2

VIN

3

VO

4

VSET

G996RD1U_TDFN8_3X3

GND GND GND GND

1 2 3 4 5

9 8 7 6 5

1

JFAN

1 2 3 G1 G2

ACES_50271-0030N-001

CONN@

INT_KBD CONNTouch pad

L1 BLM18AG601SN1D_0603~DL1 BLM18AG601SN1D_0603~D

TP_CLK(38)

TP_DATA(38)

12

C13

10P_0402_50V8J~D

B B

1 2

L2 BLM18AG601SN1D_0603~DL2 BLM18AG601SN1D_0603~D

1 2

12

C15

10P_0402_50V8J~D

PCH_SMBDATA(6,14,15,17,43)

PCH_SMBCLK(6,14,15,17,43)

12

C14

10P_0402_50V8J~D

ST

DE6

@DE6

PESD5V0U2BT_SOT23-3~D

@

2

3

1

Keyboard back light

+5VS +5VS_KBL +5VS_KBL

20mil

ST

0.75A_24V_1812L075-24DR~OK

1

C11

C11 1U_0603_10V6K~D

1U_0603_10V6K~D

A A

2

12

F1

1

C12

10U_0603_6.3V6M~D

2

5

KB_BL_DET(20)

KB_LED_PWM(38)

KB_BL_DET

TP_CLK_R TP_DATA_R

12

C16

10P_0402_50V8J~D

TP_CLK_R TP_DATA_R

3

1

R30 47K_0402_5%~DR30 47K_0402_5%~D

1 2

12

R31

R31 100K_0402_5%~D

100K_0402_5%~D

13

2

G

4

+3VS

2

DE5

@DE5

@

PESD5V0U2BT_SOT23-3~D

0809 update.

20mil

KB_BL_PWM

D

Q11

SSM3K7002FU_SC70-3~D

S

JTP

1

2

3

4

5

6

7

G1

8

G2

ACES_51522-00601-001

CONN@

SSI2

JKBL

4

G2

4

3

G1

3

2

1

ACES_50504-0040N-001

CONN@

CAPS_LED#(38)

KSO16

CE28 100P_0402_50V8J~D@CE28 100P_0 402_50V8J~D@

KSO15

KSO14

KSO13

KSO12

KSI0

6 5

KSO11

KSO10

KSI1

KSI2

KSO9

KSI3

KSO8

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1 2

CE30 100P_0402_50V8J~D@CE30 100P_0 402_50V8J~D@

1 2

CE32 100P_0402_50V8J~D@CE32 100P_0 402_50V8J~D@

1 2

CE34 100P_0402_50V8J~D@CE34 100P_0 402_50V8J~D@

1 2

CE36 100P_0402_50V8J~D@CE36 100P_0 402_50V8J~D@

1 2

CE38 100P_0402_50V8J~D@CE38 100P_0 402_50V8J~D@

1 2

CE40 100P_0402_50V8J~D@CE40 100P_0 402_50V8J~D@

1 2

CE42 100P_0402_50V8J~D@CE42 100P_0 402_50V8J~D@

1 2

CE44 100P_0402_50V8J~D@CE44 100P_0 402_50V8J~D@

1 2

CE46 100P_0402_50V8J~D@CE46 100P_0 402_50V8J~D@

1 2

CE48 100P_0402_50V8J~D@CE48 100P_0 402_50V8J~D@

1 2

CE50 100P_0402_50V8J~D@CE50 100P_0 402_50V8J~D@

1 2

CE52 100P_0402_50V8J~D@CE52 100P_0 402_50V8J~D@

1 2

+3VALW

12

RE52

100K_0402_5%~D

Compal Secret Data

2011/08/25 2012/07/25

Compal Secret Data

+VSBP

12

100K_0402_5%~D

13

D

2

G

S

KSI[0..7](38)

KSO[0..16](38)

KB_DET#

1

2

KSO7

KSO6

KSO5

KSO4

KSO3

KSI4

KSO2

KSO1

KSO0

KSI5

KSI6

KSI7

Deciphered Date

+5VS

RE54

ST

QE6

QE6 2N7002_SOT23-3

2N7002_SOT23-3

CE29 100P_0402_50V8J~D@CE29 100P_0402_50V 8J~D@

1 2

CE59

0.1U_0402_25V6K~D

EMI Request

CE31 100P_0402_50V8J~D@CE31 100P_0402_50V 8J~D@

1 2

CE33 100P_0402_50V8J~D@CE33 100P_0402_50V 8J~D@

1 2

CE35 100P_0402_50V8J~D@CE35 100P_0402_50V 8J~D@

1 2

CE37 100P_0402_50V8J~D@CE37 100P_0402_50V 8J~D@

1 2

CE39 100P_0402_50V8J~D@CE39 100P_0402_50V 8J~D@

1 2

CE41 100P_0402_50V8J~D@CE41 100P_0402_50V 8J~D@

1 2

CE43 100P_0402_50V8J~D@CE43 100P_0402_50V 8J~D@

1 2

CE45 100P_0402_50V8J~D@CE45 100P_0402_50V 8J~D@

1 2

CE47 100P_0402_50V8J~D@CE47 100P_0402_50V 8J~D@

1 2

CE49 100P_0402_50V8J~D@CE49 100P_0402_50V 8J~D@

1 2

CE51 100P_0402_50V8J~D@CE51 100P_0402_50V 8J~D@

1 2

CE53 100P_0402_50V8J~D@CE53 100P_0402_50V 8J~D@

1 2

2

KSI[0..7]

KSO[0..16]

QT

D

1 3

2

1

2

G

ST

S

RE84 470_0402_5%~DRE84 470_0402_5%~D

QE4

2N7002_SOT23-3

CE58

@CE58

@

0.1U_0402_25V6K~D

KB_DET#(17)

Title

Size Document Number Rev

Custom

Date: Sheet of

1 2

ST

KB_DET# KSI7 KSI6 KSI4 KSI2 KSI5 KSI1 KSI3 KSI0 KSO5 KSO4 KSO7 KSO6 KSO8 KSO3 KSO1 KSO2 KSO0 KSO12 KSO16 KSO15 KSO13 KSO14 KSO9 KSO11 KSO10 KB_CAPS_LED

Compal Electronics, Inc.

SW/TP/SCREW

LA-7851P

KB_CAPS_LED

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

ACES_88514-3001

1

PT

JKB

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

CONN@

31

GND

32

GND

0.1

39 66Monday, March 26, 2012

0.1

5

4

3

2

1

ATMEL TPM

+3VS

TPM@ C1

TPM@

TPM@ C2

TPM@

0.1U_0402_25V6K~D

4700P_0402_25V7K~D

D D

ST

LPC_AD0(16,38,42) LPC_AD1(16,38,42) LPC_AD2(16,38,42) LPC_AD3(16,38,42)

CLK_PCI_TPM(17)

LPC_FRAME#(16,38,42)

PLT_RST#(6,8,19,38,41,42)

SERIRQ(16,38)

PM_CLKRUN#(18)

CLK_PCI_TPM

12

R2

33_0402_5%~D

C C

12

C8

C8 10P_0402_50V8J~D

10P_0402_50V8J~D

EMI Request

4700P_0402_25V7K~D

1

C1

C2

2

CLK_PCI_TPM LPC_LFRAME# PLT_RST#

QT

+3VS

U1

5

SB3V

28

LPCPD#

26

LAD0

23

LAD1

20

LAD2

17

LAD3

21

LCLK

22

LFRAME#

16

LRESET#

27

SERIRQ

15

CLKRUN#

1

ATEST_1

2

ATEST_2

3

ATEST_3

AT97SC3204-X2A18-AB_TSSOP28

TPM@

VCC_0 VCC_1 VCC_2

V_BAT NBO_13 NBO_14

GPIO6

TESTBI

TESTI

NC_7

GND_4 GND_11 GND_18 GND_25

ST

+3VS

10 19 24

12 13 14

6

9 8

PP

7

4 11 18 25

1

2

TPM@ C3

TPM@

2200P_0402_50V7K~D

C3

R1 4.7K_0402_5%~D@ R1 4.7K_0402_5%~D@

1

2

1 2

TPM@ C4

TPM@

2200P_0402_50V7K~D

1

C4

2

ST

TPM@ C6

TPM@

TPM@ C5

TPM@

0.1U_0402_25V6K~D

2200P_0402_50V7K~D

1

C6

C5

2

+3VS

PCIe Re-driver for Cardreader

+3VS

PCIE_EQ1

SHORT

1 2

SHORT

1 2

SHORT

1 2

SHORT

1 2

PCIE_DE1 PCIE_OS1 PCIE_EN_RXD

PCIE_PRX_CARDTX_RE_P4_C PCIE_PRX_CARDTX_RE_N4_C PCIE_PTX_CARDRX_RE_P4 PCIE_PTX_CARDRX_RE_N4

PCIE_PLTRST# PCIE_PS

PCIE_PRX_CARDTX_RE_R_P4 PCIE_PRX_CARDTX_RE_R_N4

PCIE_PTX_CARDRX_RE_R_P4 PCIE_PTX_CARDRX_RE_R_N4

PT

PLT_RST#

RN43 0_0402_5%~D@ RN43 0_0402_5%~D@

C20 0.1U_0402_10V7K~D@ C20 0.1U_0402_10V7K~D@ C21 0.1U_0402_10V7K~D@ C21 0.1U_0402_10V7K~D@

PT

PM_SLP_S3#(18,38,43)

PCIE_PRX_CARDTX_RE_P4 PCIE_PRX_CARDTX_RE_N4

SSI2

Re-driver bypass

PCIE_PRX_CARDTX_RE_P4

PT

PCIE_PRX_CARDTX_RE_N4

PCIE_PTX_CARDRX_RE_P4 PCIE_PTX_CARDRX_RE_N4

Signal Control Pin Setting

1 2

1 2 1 2

R44 0_0402_5%~D@ R44 0_0402_5%~D@

1 2

ST ST

RN44 0_0402_5%~D

RN44 0_0402_5%~D RN45 0_0402_5%~D

RN45 0_0402_5%~D

RN46 0_0402_5%~D

RN46 0_0402_5%~D RN47 0_0402_5%~D

RN47 0_0402_5%~D

PT

U2

@ U2

@

1

VCC

13

VCC

2

EQ1

3

DE1

4

OS1

5

EN_RXD

8

RX1+

9

RX1-

11

TX2+

12

TX2-

7

RST#

14

PS

24

RSVD

SN65LVPE501RGER_VQFN24_4X4

17

EQ2

16

DE2

15

OS2

23

TX1+

22

TX1-

20

RX2+

19

RX2-

6

GND

10

GND

18

GND

21

GND

25

GPAD

RN48 0_0402_5%~D

RN48 0_0402_5%~D RN49 0_0402_5%~D

RN49 0_0402_5%~D

RN50 0_0402_5%~D

RN50 0_0402_5%~D RN51 0_0402_5%~D

RN51 0_0402_5%~D

PCIE_EQ2 PCIE_DE2 PCIE_OS2

PCIE_PRX_CARDTX_P4_C PCIE_PRX_CARDTX_N4_C PCIE_PTX_CARDRX_P4 PCIE_PTX_CARDRX_N4

SHORT

1 2

SHORT

1 2

SHORT

1 2

SHORT

1 2

PCIE_EQ1 PCIE_EQ2 PCIE_DE1 PCIE_DE2 PCIE_OS1 PCIE_OS2 PCIE_PS PCIE_PLTRST#

C7 0.1U_0402_10V7K~D@ C7 0.1U_0402_10V7K~D@

1 2

C9 0.1U_0402_10V7K~D@ C9 0.1U_0402_10V7K~D@

1 2

PCIE_PRX_CARDTX_P4 PCIE_PRX_CARDTX_N4

PCIE_PTX_CARDRX_P4 PCIE_PTX_CARDRX_N4

12

+3VS

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D

1

@

C22

2

PT

PCIE_PRX_CARDTX_P4 PCIE_PRX_CARDTX_N4

+3VS

4.99K_0402_1%~D

@

R5

4.99K_0402_1%~D

@

R6

12

@

R34

R32

4.99K_0402_1%~D

12

@

R35

R33

4.99K_0402_1%~D

12

@

R3

4.99K_0402_1%~D

12

@

R4

PT

1U_0402_6.3V6K~D

1

@

C25

C23

2

PCIE_PRX_CARDTX_P4 (17) PCIE_PRX_CARDTX_N4 (17) PCIE_PTX_CARDRX_P4 (17)

PCIE_PTX_CARDRX_N4 (17)

4.99K_0402_1%~D

12

@

R36

R38

4.99K_0402_1%~D

12

@

R37

R39

0.1U_0402_10V7K~D

@

C24

4.99K_0402_1%~D

12

@

R42

R40

4.99K_0402_1%~D

12

@

R41

R43

Lid Switch

0.1U_0402_16V7K~D

B B

0.1U_0402_16V7K~D

Screw Hole

H2

H_2P3

@

1

PT

H3

@H3

@

H_3P9

1

A A

PT

H10

H_2P0X1P5

@

1

H4

H_3P7

@

1

SSI2

+3VALW +3VALW

U5

APX9131AAI-TRG_SOT23-3

VDD2VOUT

H_2P0

GND

1

H12

H_2P3

@

1

H13

H_2P8

@

1

H14

PT

1

@

1

C17

2

0825 ME request change LID SW PN to SA00003B900

H9

H11

@

@ H5

@

H11

H_2P3

@

1

H5

1

H_2P3

H_4P0X3P7

SSI2

3

NUT

12

R28

@R28

@

47K_0402_5%~D

1

C18

C18 10P_0402_50V8J~D

10P_0402_50V8J~D

2

H6

H_4P0

@

FD1

FD1 FIDUCAL@

FIDUCAL@

1

H_4P0

1

SSI2

5

M/B to D/B conn.

PT

+3VS

+RTCVCC

+5VS_JTB1

ST

PT

+AVDD_AC97

1

CM33

0.1U_0402_16V4Z~D

2

1

CM30

0.01U_0402_25V7K

2

+MIC1_VREFO

RN52 0_0402_5%~DRN52 0_0402_5%~D

1 2

RN53 0_0402_5%~D@ RN53 0_0402_5%~D@

1 2

ST

1

2

3

ST

CM31

0.047U_0402_16V4Z~D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

LID_SW_IN#

FD2

FD3

FIDUCIAL@

FIDUCAL@

1

H7

@

SSI2

1

LID_SW_IN# (38)

+5VS

FD4

FD4 FIDUCIAL@

FIDUCIAL@

1

ST

H8

H_3P3

@

1

4

+3VS

+5VS_JTB1

ST

CPVREF(46)

1

CM32

4.7U_0603_6.3V6K~D

2

Compal Secret Data

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

JTB1

1

JTB1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

GND

28

GND

ACES_51522-02601-001

CONN@

40 66Monday, March 26, 2012

0.1

PCIE_PTX_CARDRX_RE_P4 PCIE_PTX_CARDRX_RE_N4

PCIE_PRX_CARDTX_RE_P4

CLK_PCIE_CD(17)

CLK_PCIE_CD#(17)

CDCLK_REQ#(17)

EAPD#(38,46,47) I2C_SDA(46) I2C_SCL(46)

MIC_PRESENT#(47)

MIC1(46)

SHP_HPD#(47) HP2_OUTR(46)

HP2_OUTL(46)

JACK_PLUG#(47)

HP_OUTR(46)

HP_OUTL(46)

PCIE_PRX_CARDTX_RE_N4

PLT_RST#

AGND

JTB2

1

2

3

GND

4

GND

ACES_88231-02001

CONN@

AGND

CONN@

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CONN & LID

LA-7851P

5

Giga LAN

+3VALW

PT

1U_0402_6.3V6K~D

CL1

D D

EN_WOL(38)

PCIE_PRX_GLANTX_P1(17)

PCIE_PRX_GLANTX_N1(17)

PCIE_PTX_GLANRX_P1(17)

C C

+3VS

PCIE_PTX_GLANRX_N1(17)

LAN_25M(17)

RL11 1K_0402_5%~DRL11 1K_040 2_5%~D

1 2

12

QT

RL15 0_0402_5%~D

SHORT

RL15 0_0402_5%~D

SHORT

+LAN_IO

B B

1 2

12

RL4

RL4 10K_0402_5%~D

10K_0402_5%~D

LANCLK_REQ#(17)

PLT_RST#(6,8,19,38,40,42)

CLK_PCIE_LAN(17)

CLK_PCIE_LAN#(17)

RL13

RL13 15K_0402_5%

15K_0402_5%

ENSWREG

RL18

@RL18

@

0_0402_5%~D

3.3V : Enable switching regulator 0V : Disable switching regulator

100K_0402_5%~D

12

RL2

1

2

EN_WOL#

RL3

RL3 10K_0402_5%~D

10K_0402_5%~D

1 2

QT

13

D

QL5

2

G

SSM3K7002FU_SC70-3~D

G

SSM3K7002FU_SC70-3~D

S

CL20 0.1U_0402_16V7K~DC L20 0.1U_0402_16V7K~D

1 2

CL21 0.1U_0402_16V7K~DC L21 0.1U_0402_16V7K~D

1 2

RL10 0_0402_5%~D@RL10 0_0402_5%~D@

RL16 10K_0402_5%~D@RL16 10K_0402_5%~D@

1 2

+LAN_IO

W=60milsW=60mils

+LAN_IO

D

S

D

S

1 2

13

QL3

QL3 AO3419L_SOT23-3

AO3419L_SOT23-3

G

2

PCIE_PRX_GLANTX_P1_C

PCIE_PRX_GLANTX_N1_C

RL12 10K_0402_5%~DRL12 10K_0402_5%~D

1 2

RL14 1K_0402_5%~DRL14 1K_040 2_5%~D

1 2

ENSWREG

+LAN_VDDREG

12

RL17

2.49K_0402_1%~D

1.5A

XTLO

XTLI

LAN_WAKE#

ISOLATEB

4

22

23

17 18

16

25

19 20

43

44

28

26

14 15 38

33

34 35

46

24 49

+LAN_IO

12

@RL1

@

470_0603_5%

13

D

EN_WOL#

UL1

HSOP

HSON

HSIP HSIN

CLKREQB

PERSTB

REFCLK_P REFCLK_N

CKXTAL1

CKXTAL2

LANWAKEB

ISOLATEB

NC/SMBCLK NC/SMBDATA GPO/SMBALERT

ENSWREG

VDDREG VDDREG

RSET

GND PGND

RTL8111F-CGT_QFN48_6X6

D

2

G

S

LED3/EEDO LED1/EESK

EECS/SCL

EEDI/SDA

NC/MDIP2 NC/MDIN2 NC/MDIP3 NC/MDIN3

PT

RL1

QL4

@

QL4

@

SSM3K7002FU_SC70-3~D

31 37 40

LED0

RL8 10K_0402_5%~DRL8 10K_0402_5%~D

30

RL9 10K_0402_5%~DRL9 10K_0402_5%~D

32

LAN_MDIP0

1

MDIP0 MDIN0 MDIP1 MDIN1

DVDD10 DVDD10 DVDD10

DVDD33 DVDD33

AVDD33 AVDD33 AVDD33 AVDD33

EVDD10

AVDD10 AVDD10 AVDD10 AVDD10

REGOUT

LAN_MDIN0

2

LAN_MDIP1

4

LAN_MDIN1

5

LAN_MDIP2

7

LAN_MDIN2

8

LAN_MDIP3

10

LAN_MDIN3

11

13 29 41

27 39

12 42 47 48

+LAN_EVDD10

21

3 6 9 45

+LAN_SROUT1.05

36

3

+LAN_IO

0.1U_0402_16V7K~D

1

2

0.1U_0402_16V7K~D

CL2

1

2

0.1U_0402_16V7K~D

CL3

CL4

1

2

These caps close to Pin 12,27,39,42,47,48

+LAN_IO

1 2 1 2

+LAN_VDD

+LAN_IO

+LAN_VDD

0.1U_0402_16V7K~D

CL5

1

2

ST

RL5 0_0603_5%~DSHORTRL5 0_0603_5%~DSHORT

1 2

0.1U_0402_16V7K~D

1

2

0.1U_0402_16V7K~D

CL7

CL6

CL7

1

2

W=40mils

+LAN_VDDREG

4.7U_0603_6.3V6K~D

1

CL16

2

RJ45

RJ45_TX3-

RJ45_TX3+

RJ45_RX1-

RJ45_TX2-

RJ45_TX2+

RJ45_RX1+

RJ45_TX0-

RJ45_TX0+

Transformer

2

0.1U_0402_16V7K~D

CL17

JLAN1

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

SANTA_130460-1

CONN@

+LAN_VDD

0.1U_0402_16V7K~D

CL8

1

2

0.1U_0402_16V7K~D

CL9

CL10

1

2

These caps close to Pin 3,6,9,13,29,41,45

+LAN_VDD

ST

RL6 0_0603_5%~DSHORTRL6 0_0603_5%~DSHORT

1 2

12

GND

11

GND

10

GND

9

GND

1

0.1U_0402_16V7K~D

CL11

CL12

1

2

0.1U_0402_16V7K~D

CL14

CL13

1

2

W=20mils

+LAN_EVDD10

1

2

1U_0402_6.3V6K~D

0.1U_0402_16V7K~D

CL19

CL18

1

2

TL1

YL1

SSI2

XTLI XTLO

1

15P_0402_50V8J~D

2

A A

YL1

25MHZ_12PF_7V25000012

1

GND

2

CL22

3

GND

4

W=60mils

+LAN_SROUT1.05

1

2

PT

CL25

15P_0402_50V8J~D

W=60mils

LL1 2.2UH +-5% NLC252018T-2R2J-N LL1 2.2UH +-5% NLC252018T-2R2J-N

1 2

PT

EC_LAN_WAKE#(38)

+LAN_VDD

4.7U_0603_6.3V6K~D

0.1U_0402_16V7K~D

CL23

1

CL24

2

These components close to Pin 36

( Should be place within 200 mils )

5

4

+LAN_IO

12

RL7

RL7 10K_0402_5%~D

10K_0402_5%~D

2

G

ST

1 3

D

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

S

QL6

QL6 2N7002_SOT23-3

2N7002_SOT23-3

Issued Date

3

LAN_WAKE#

2011/08/25 2012/07/25

+V_DAC

LAN_MDIP3

+V_DAC LAN_MDIN2 LAN_MDIP2

+V_DAC LAN_MDIN1 LAN_MDIP1

+V_DAC LAN_MDIN0 LAN_MDIP0

1

CL26

0.01U_0402_16V7K~D

2

Compal Secret Data

Deciphered Date

TL1

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+ TD2-6MX2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

X'FORM_ IH-160 LAN

2

MCT1 MX1+

MX1-

MCT2 MX2+

MCT3 MX3+

MX3-

MCT4 MX4+

MX4-

24

RJ45_TX3-LA N_MDIN3

23

RJ45_TX3+

22

21

RJ45_TX2-

20

RJ45_TX2+

19

18

RJ45_RX1-

17

RJ45_RX1+

16

15

RJ45_TX0-

14

RJ45_TX0+

13

Title

Size Document Number Rev

Custom

Date: Sheet of

RL19 75_0603_1%RL19 75_0603_ 1%

1 2

RL20 75_0603_1%RL20 75_0603_ 1%

1 2

RL21 75_0603_1%RL21 75_0603_ 1%

1 2

RL22 75_0603_1%RL22 75_0603_ 1%

1 2

Compal Electronics, Inc.

P25-LAN RTL8111E

LA-7851P

1

CL27

CL27 1000P_1808_3KV7K~D

1000P_1808_3KV7K~D

2

41 66Monday, March 26, 2012

0.1

5

WLAN / BT4.0 PCIE Mini Card

T10PAD~D @T10PAD~D @ T29PAD~D @T29PAD~D @

SSI2

JWLAN

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

EC_TX_R EC_RX_R

47

49

51

53

GND1

ACES_51722-0520W-001

CONN@

RM12 100K_0402_5%~DRM12 100K _0402_5%~D

1 2

DLW21SN900SQ2L_0805_4P~D

1

4

ST

RM20 0_0402_5%~D

RM21 0_0402_5%~D

+3VS_WLAN

RM26 10K_0402_5%~D@ RM26 10K _0402_5%~D@

MINI3CLK_REQ#

CLK_PCIE_MINI3# CLK_PCIE_MINI3

CLK_PCI_DEBUG

PCIE_PRX_WLANTX_ N3 PCIE_PRX_WLANTX_ P3

PCIE_PTX_WLANRX_ N3 PCIE_PTX_WLANRX_ P3

PCIE_MCARD1_DET#

+3VS_WLAN

1 2

PT

SSI2

EC_WLAN_W AKE#(38)

MINI3CLK_REQ#(17)

CLK_PCIE_MINI3#(17) CLK_PCIE_MINI3(17)

CLK_PCI_DEBUG(19)

PCIE_PRX_WLANTX_ N3(17) PCIE_PRX_WLANTX_ P3(17)

PCIE_PTX_WLANRX_ N3(17) PCIE_PTX_WLANRX_ P3(17)

PCIE_MCARD1_DET#(20)

EC_TX(38)

EC_RX(38)

BT_RADIO_DIS#(20)

RM10 0_0402_5%~DR M10 0_0402_5%~D

RM13 0_0402_5%~DR M13 0_0402_5%~D

SSI2

RM11 1K_0402_5%~DRM11 1K_040 2_5%~D

D D

C C

Reserve for EMI

USB20_N4(19)

USB20_P4(19)

1

CM20

@CM20

@

0.1U_0402_16V7K~D

2

+3VS_WLAN+3VS_WLAN

1

@CM21

@

1000P_0402_50V7K~D

2

CM21

LM1

@LM1

@

1

4

SHORT

1 2

SHORT

1 2

GND2

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

2 4 6 8

4

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

2

3

+1.5VS_WLAN

2

3

+3VS_WLAN

RM16 0_0402_5%~DRM16 0_0402_5%~D

1 2

RM14 0_0402_5%~DRM14 0_0402_5%~D

1 2

RM17 0_0402_5%~DRM17 0_0402_5%~D

1 2

RM19 0_0402_5%~DRM19 0_0402_5%~D

1 2

RM22 0_0402_5%~DRM22 0_0402_5%~D

1 2

WL_OFF#_R PLT_RST#

MINI1_SMBCLK MINI1_SMBDATA

USB20_N4_R USB20_P4_R USB_MCARD2_DET#

EC_TX_R

USB20_N4_R

USB20_P4_R

3

PT

12

RM28

10K_0402_5%~D

QV40 2N7002_SOT23-3

LPC_LFRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

PLT_RST# (6,8,19,38,40,41)

USB_MCARD1_DET# (20)

+1.5VS +1.5VS_WLAN

JUMP_43X39

+1.5VS_WLAN

4.7U_0805_10V6

4.7U_0805_10V6 CM6

CM6

1

2

@JP11

@

2

0.1U_0402_16V7K~D

JP11

CM7

LPC_FRAME# (16,38,40) LPC_AD3 (16,38,40) LPC_AD2 (16,38,40) LPC_AD1 (16,38,40) LPC_AD0 (16,38,40)

112

0.1U_0402_16V7K~D

0.01U_0402_16V7K~D

1

CM8

2

CM9

1

2

+3VS+3VS_WLAN

1 3

D

47P_0402_50V8J~D

@

CM10

2

12

RH82

2.2K_0402_5%~D

+3VS_WLAN+3 VS_WLAN

4

RM8 0_0402_5%~D@ RM8 0_0402_5%~D@

1 2

RM9 0_0402_5%~D@ RM9 0 _0402_5%~D@

5

QM3B

DMN66D0LDW-7_SOT363-6~D

3

1 2

2

G

WL_OFF#WL_OFF#_R

S

WL_OFF# (19)

2.2K_0402_5%~D

MINI1_SMBCLK

MINI1_SMBDATA

RH93

12

1

QM3A

DMN66D0LDW-7_SOT363-6~D

61

SMBCLK (17)

SMBDATA (17)

WLAN power control for AOAC

WLAN_EN#(38)

SSI2

ST

+3VALW

12

RM24

RM24 10K_0402_5%~D

10K_0402_5%~D

SSI2

2

G

+VSBP

12

RM18

RM18 330K_0402_5%

330K_0402_5%

SSM3K7002FU_SC70-3~D

13

D

QM2

S

+3VALW

WLAN_EN

SSI2

5

1

CM18

CM18 10U_0805_10V6M~D

10U_0805_10V6M~D

2

12

RM27

1.5M_0402_5%~D

SSI2

QM1

AON7212L_DFN8-5

4

1

0.1U_0603_50V_X7R

2

CM26

+3VS_WLAN

1 2 3

1

2

1350mA

47P_0402_50V8J~D

0.1U_0402_16V7K~D

4.7U_0805_10V6

4.7U_0805_10V6 CM1

CM1

0.1U_0402_16V7K~D

CM2

CM3

1

2

47P_0402_50V8J~D

0.01U_0402_16V7K~D

@

CM5

CM4

1

2

mSATA SSD

B B

SATA_PRX_DTX_P1(16)

SATA_PRX_DTX_N1(16)

SATA_PTX_DRX_N1_C(16) SATA_PTX_DRX_P1_C(16)

SATA_PRX_DTX_P1 SATA_PRX_DTX_N1

SATA_PTX_DRX_N1_C SATA_PTX_DRX_P1_C

PT

T45PAD~D @T45PAD~D @ T39PAD~D @T39PAD~D @

A A

5

4

+3V_mSATA

JSSD

1

3

5

7

9

9 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

GND153GND2

ACES_88913-5204

CONN@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+3V_mSATA

2

4

6

8

10

12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

Compal Secret Data

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

T19 PAD~D@ T19 PAD~D@ T20 PAD~D@ T20 PAD~D@

2

@JP12

@

2

JUMP_43X39

JP12

+3V_mSATA+3VS

112

0.01U_0402_25V7K

0.01U_0402_25V7K CM11

CM11

1

2

Title

Size Document Number Rev

Custom

LA-7851P

Date: Sheet of

0.1U_0402_25V6K~D

0.047U_0402_16V7K

1

CM12

2

Compal Electronics, Inc.

WLAN/WWAN/SIM/BT

4.7U_0805_10V6

4.7U_0805_10V6 CM14

1

2

CM14

1

CM13

2

1

47P_0402_50V8J~D

@

CM15

0.1

42 66Monday, March 26, 2012

0.1

5

SATA III Re-driver for HDD

1

CN1

0.01U_0402_16V7K~D

2

D D

PM_SLP_S3#(18,38,40)

C C

Free Fall Sensor

+3VS

B B

RN33 100K_0402_5%~DRN33 100K_0402_5%~D

+3VS_RD

1

CN14

CN14 10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

2

FFS_INT1(19) FFS_INT2(20)

PCH_SMBDATA(6,14,15,17,39)

PCH_SMBCLK(6,14,15,17,39)

1 2

1

CN2

0.1U_0402_25V6K~D

2

PM_SLP_S3#

RN10 0_0402_5%~D@ RN10 0_0402_5%~D@

1 2

RN11 0_0402_5%~D@ RN11 0_0402_5%~D@

1 2

RN12 0_0402_5%~D@ RN12 0_0402_5%~D@

1 2

SATA_PTX_DRX_P0(16)

SATA_PTX_DRX_N0(16)

SATA_PRX_DTX_P0(16)

SATA_PRX_DTX_N0(16)

PAD-OPEN1x1m

1 2

UN1

RN42 0_0402_5%~D@ RN42 0_0402_5%~D@

1 2

SATA_PTX_DRX_P0_C

SATA_PTX_DRX_N0_C

SATA_PRX_DTX_P0_C

SATA_PRX_DTX_N0_C

SATA_BPRE1 SATA_APRE1

SATA_TEST

SATA_PTX_DRX_P0 SATA_PTX_DRX_P0_C SATA_PTX_DRX_N0

SATA_PRX_DTX_P0 SATA_PRX_DTX_P0_C SATA_PRX_DTX_N0 SATA_PRX_DTX_N0_C

1

CN15

0.1U_0402_25V6K~D

2

FFS_INT1 FFS_INT2

PCH_SMBDATA PCH_SMBCLK

FFS_INT1

UN1

7

EN

1

A_INp

2

A_INn

5

B_OUTp

4

B_OUTn

17

B_PRE1

19

A_PRE1

18

TEST

3

GND

13

GND

21

EPAD

PS8520BTQFN20GTR2_TQFN20_4X4

CN19 0.01U_0402_16V7K~DCN19 0.01U_0402_16V7K~D

1 2

CN18 0.01U_0402_16V7K~DCN18 0.01U_0402_16V7K~D

1 2

CN11 0.01U_0402_16V7K~DCN11 0.01U_0402_16V7K~D

1 2

CN10 0.01U_0402_16V7K~DCN10 0.01U_0402_16V7K~D

1 2

UN2

LNG3DM

1

VDD_IO

14

VDD

11

INT 1

9

INT 2

7

SDO/SA0

6

SDA / SDI / SDO

4

SCL/SPC

8

CS

LNG3DMTR_LGA16_3X3~D

@JP13

@

GND GND

JP13

RES RES RES RES

A_PRE0 B_PRE0

A_OUTp A_OUTn

NC NC

4

+3VS_RD+3VS

+3VS_RD

6

VDD

16

VDD

10

NC

REXT_SATA

20

REXT

SATA_APRE0

9

SATA_BPRE0

8

SATA_PTX_DRX_P0_RC

15

SATA_PTX_DRX_N0_RC SATA_PTX_DRX_N0_RC1

14

SATA_PRX_DTX_P0_RC

11

B_INp

SATA_PRX_DTX_N0_RC

12

B_INn

SATA_PTX_DRX_N0_C

10 13 15 16

5 12

2 3

FFS_INT2

1

CN28

0.01U_0402_16V7K~D

2

RN3 0_0402_5%~D@ RN3 0_0402_5%~D@

1 2

RN4 0_0402_5%~D@ RN4 0_0402_5%~D@

1 2

CN12 0.01U_0402_16V7K~DCN12 0.01U_0402_16V7K~D

1 2

CN13 0.01U_0402_16V7K~DCN13 0.01U_0402_16V7K~D

1 2

CN8 0.01U_0402_16V7K~DCN8 0.01U_0402_16V7K~D

1 2

CN9 0.01U_0402_16V7K~DCN9 0.01U_0402_16V7K~D

1 2

REXT_SATA

+3VS

12

RN26

RN26 100K_0402_5%~D

100K_0402_5%~D

61

2

QN2A

QN2A DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

1

0.1U_0402_25V6K~D

2

+3VS_RD

SATA_PTX_DRX_P0_RC1

SATA_PRX_DTX_P0_RC1 SATA_PRX_DTX_N0_RC1

12

RN40

4.99K_0402_1%~D

+5VS

12

RN23

RN23 100K_0402_5%~D

100K_0402_5%~D

3

5

QN2B

DMN66D0LDW-7_SOT363-6~D

4

CN29

FFS_INT2_Q

3

HDD CONN

2

SATA_PTX_DRX_P0_RC1 SATA_PTX_DRX_N0_RC1

SATA_PRX_DTX_N0_RC1 SATA_PRX_DTX_P0_RC1

+3VS

HDD_DETECT#(20)

+5VS_HDD

HDD_DETECT#

FFS_INT2_Q

1

JHDD

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

GND

22

GND

23

GND

24

GND

J-L_UCNR2234B020-0

CONN@

Place near HDD CONN (JHDD1)

+3VS

1

CN3

0.1U_0402_16V7K~D

2

+5VS_HDD

1

CN4

CN4 1000P_0402_50V7K~D

1000P_0402_50V7K~D

2

1

CN5

0.1U_0402_16V7K~D

2

1

CN6

CN6 1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

1

CN7

10U_0805_10V6M~D

2

HDD power control for AOAC

SSI2

PM_SLP_S3#

ST

RN29 0_0402_5%~D

SHORT

RN29 0_0402_5%~D

SHORT

1 2

12

RN30

100K_0402_5%~D

2

+3VALW

12

RN25

RN25 100K_0402_5%~D

100K_0402_5%~D

61

DMN66D0LDW-7_SOT363-6~D

QN3A

+VSBP

12

RN24

RN24 330K_0402_5%

330K_0402_5%

HDD_EN_5V

3

DMN66D0LDW-7_SOT363-6~D

QN3B

5

4

ST

12

6

2 1

RN27

1.5M_0402_5%~D

ST

1300mA

D

S

45

QN1

QN1 SI3456DDV-T1-GE3_TSOP6~D

SI3456DDV-T1-GE3_TSOP6~D

G

3

1

CN16

0.1U_0603_50V7K~D

2

+5VS_HDD+5VALW

ODD power control

+5VS

RN39 0_1206_5%~D@ RN39 0_1206_5%~D@

1 2

D

+VSBP

SSI2

12

RN36

RN36 330K_0402_5%

330K_0402_5%

ODD_EN

QT

13

D

5

2

G

D

QN5

QN5 SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

A A

ODD_EN#(20)

1

CN20

CN20 1U_0402_6.3V6K

1U_0402_6.3V6K

2

6

2 1

+5VS_ODD

1300mA

S

45

QN4

QN4 SI3456DDV-T1-GE3_TSOP6~D

SI3456DDV-T1-GE3_TSOP6~D

G

3

12

RN38

1.5M_0402_5%~D

1

CN27

0.1U_0402_25V6K~D

2

4

ODD Ejection

ODD_DA#(19)

ODD_EJECT(16,38)

ODD_DA#

13

D

2

G

S

Issued Date

3

S

12

RN41

RN41 10K_0402_5%~D

10K_0402_5%~D

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

+5VS_ODD

PT

QT

QN6

QN6 SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

2011/08/25 2012/07/25

Placea caps. near ODD/B CONN.

1

CN22

1000P_0402_50V7K~D

2

SATA_PTX_DRX_P2_C(16)

SATA_PTX_DRX_N2_C(16)

SATA_PRX_DTX_N2(16)

SATA_PRX_DTX_P2(16)

ODD_DETECT#(20)

Compal Secret Data

Deciphered Date

1

CN23

0.1U_0402_25V6K~D

2

CN24

PT

1

CN25

10U_0805_10V6M~D

2

ODD_DA#

1

1U_0402_10V6K

2

CN21 0.01U_0402_16V7K~DCN21 0.01U_0402_16V7K~D

1 2

CN26 0.01U_0402_16V7K~DCN26 0.01U_0402_16V7K~D

1 2

2

SATA_PRX_DTX_N2_C SATA_PRX_DTX_P2_C

ODD/B CONN

+5VS_ODD

Compal Electronics, Inc.

Title

DC/DC INTERFACE

Size Document Number Rev

Custom

LA-7851P

Date: Sheet of

SSI2

JODD

1

2

3

4

5

6

7

8

9

10

11

G1

11

12

G2

12

ACES_50504-0120N-001

CONN@

1

13 14

43 66Monday, March 26, 2012

0.1

5

4

3

2

1

USB3.0 / USB2.0

SSI2

JUSB1

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

TAIWI_USB008-097CRL-TW

CONN@

+USB3_VCCA

+USB3_VCCB

10

GND

11

GND

12

GND

13

GND

12

RI6

24.9K_0402_1%~D

USB_PWR_EN#(38)

+USB3_VCCA

1

2

ST

+3VALW

USB3TP1_D+

USB3TN1_D-

150U_B2_6.3V-M~D

10U_0805_10V6K~D

0.1U_0402_25V6K~D

1

+

CI1

1

@

CI18

2

0.1U_0402_25V6K~D

1

@

CI2

CI19

2

3

1

USBP0_R_D+

USBP0_R_DUSB3RP1_D+

PESD5V0U2BT_SOT23-3~D

2

USB3RN1_D-

@

DI2

PT

2.5A / Channel

UI1

ST

1 2

RI14

RI14 10K_0402_5%~D

10K_0402_5%~D

1

GND

2

IN

3

IN

4

EN1# EN2#5FAULT#2

TPS2560DRCR-PG1.1_SON10_3X3~D

FAULT1#

OUT1 OUT2

T-PAD

10 9 8 7

ILIM

6 11

USB_OC0# (19,45)

USB_OC1# (19)

LI1

LI1 DLW21SN900SQ2L_0805_4P~D

D D

C C

USB20_N0(19)

USB20_P0(19)

USB3TN1(19)

USB3TP1(19)

USB3RN1(19)

USB3RP1(19)

USB20_N0

USB20_P0

USB3TN1

1 2

CI3 0.01U_0402_16V7K~DCI3 0.01U_0402_16V7K~D

USB3TP1

1 2

CI4 0.01U_0402_16V7K~DCI4 0.01U_0402_16V7K~D

USB3RN1

USB3RP1

USB3T_N1

DLW21SN900SQ2L_0805_4P~D

1

4

RI1 0_0402_5%~D@RI1 0_0402_5%~D@

1 2

RI2 0_0402_5%~D@RI2 0_0402_5%~D@

1 2

LI2

@LI2

@

DLW21SN900HQ2L_0805_4P~D

4

1

ST

RI3 0_0402_5%~D

SHORT

RI3 0_0402_5%~D

SHORT

1 2

RI4 0_0402_5%~D

SHORT

RI4 0_0402_5%~D

SHORT

1 2

LI3

@LI3

@

DLW21SN900HQ2L_0805_4P~D

4

1

ST

RI5 0_0402_5%~D

SHORT

RI5 0_0402_5%~D

SHORT

1 2

RI7 0_0402_5%~D

SHORT

RI7 0_0402_5%~D

SHORT

1 2

2

3

PT

3

2

PT

3

2

USBP0_R_D-

USBP0_R_D+

USB3TN1_D-

USB3TP1_D+USB3T_P1

USB3RN1_D-

USB3RP1_D+

PT

DI1

@

USB3RN1_D-

USB3RP1_D+

USB3TN1_D-

USB3TP1_D+

@

1

2

4

5

3

8

IP4292CZ10-TB_XSON10U10~D

10

9

7

6

USB3RN1_D-

USB3RP1_D+

USB3TN1_D-

USB3TP1_D+

Place close to JUSB1

+5VALW

1

CI5

10U_0805_10V6K~D

2

1

CI6

0.1U_0402_25V6K~D

2

USB3.0 / USB2.0

LI4

LI4 DLW21SN900SQ2L_0805_4P~D

USB20_N2(19)

B B

USB20_P2(19)

USB3TN3(19)

USB3TP3(19)

USB20_N2

USB20_P2

USB3TN3

1 2

CI9 0.01U_0402_16V7K~DCI9 0.01U_0402_16V7K~D

USB3TP3

1 2

CI10 0.01U_0402_16V7K ~DCI10 0.01U_0402_16V7K~D

USB3T_N3

DLW21SN900SQ2L_0805_4P~D

1

4

RI8 0_0402_5%~D@RI8 0_0402_5%~D@

1 2

RI9 0_0402_5%~D@RI9 0_0402_5%~D@

1 2

LI5

@LI5

@

DLW21SN900HQ2L_0805_4P~D

4

1

ST

RI10 0_0402_5%~D

SHORT

RI10 0_0402_5%~D

SHORT

1 2

RI11 0_0402_5%~D

SHORT

RI11 0_0402_5%~D

SHORT

1 2

2

3

PT

3

2

USBP2_R_D-

USBP2_R_D+

USB3TN3_D-

USB3TP3_D+USB3T_P3

PT

DI4

@

USB3RN3_D-

USB3RP3_D+

USB3TN3_D-

USB3TP3_D+

@

1

2

4

5

3

8

IP4292CZ10-TB_XSON10U10~D

10

9

7

6

USB3RN3_D-

USB3RP3_D+

USB3TN3_D-

USB3TP3_D+

Place close to JUSB2

+USB3_VCCB

1

2

ST

USB3TP3_D+

USB3TN3_D-

10U_0805_10V6K~D

150U_B2_6.3V-M~D

CI7

+

10U_0805_10V6K~D

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D CI8

1

@

CI20

2

CI8

1

@

CI21

2

3

USBP2_R_D+

USBP2_R_DUSB3RP3_D+

PESD5V0U2BT_SOT23-3~D

USB3RN3_D-

2

@

DI3

1

PT

SSI2

JUSB2

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2 6 4 5

GND

D-

GND

SSRX+ GND

GND

SSRX-

GND

TAIWI_USB008-097CRL-TW

CONN@

10 11 12 13

LI6

@LI6

@

DLW21SN900HQ2L_0805_4P~D

USB3RN3(19)

A A

USB3RP3(19)

USB3RN3

USB3RP3

5

DLW21SN900HQ2L_0805_4P~D

4

1

ST

RI12 0_0402_5%~D

SHORT

RI12 0_0402_5%~D

SHORT

1 2

RI13 0_0402_5%~D

SHORT

RI13 0_0402_5%~D

SHORT

1 2

4

PT

3

2

USB3RN3_D-

USB3RP3_D+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

USB conn.

LA-7851P

1

44 66Monday, March 26, 2012

0.1

5

4

3

2

1

RI19

+5VALW

1

2

ST

CI11

CI11 10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

CI12

0.1U_0402_16V7K~D

2

PWRSHARE_EN _EC# (38)

PWRSHARE_EN _EC#

ST

+3VALW

12

RI15

RI15 10K_0402_5%~D

10K_0402_5%~D

+5VALW

2.0A

UI2

1

GND

2

IN

3

EN1#

4

EN2#

TPS2062ADR_SO8~D

OC1# OUT1 OUT2 OC2#

+5V_CHGUSB

8 7 6 5

USB_OC0# (19,44)

USB Powershare

D D

ST

RI17 0_0402_5%~D

SHORT

RI17 0_0402_5%~D

SHORT

PWRSHARE_OE#(38)

USB20_N1(19) USB20_P1(19)

C C

1 2

+5VALW

1

0.1U_0402_25V6K~D

2

Pericom(SA00004RE0L)and Maxim(SA000058H0L) part used Samsung i9100 phone can't detected by OS issue

SB# PWRSHARE_EN _EC#

SLG55584AVTR_TDFN8_2X2

CI13

QT

UI3

8

CB

7

TDM

6

TDP

5

SELCDP

VDD

Thermal Pad

CEN

1 2

DM

3

DP

4 9

PWRSHARE_EN _EC#_R USBP1_DUSBP1_D+ SEL

ST

RI28 0_0402_5%~D@ RI28 0_0402_5%~D@

+5VALW

1 2

12

RI18

RI18 10K_0402_5%~D

10K_0402_5%~D

12

@RI19

@

10K_0402_5%~D

USB3.0 / USB2.0

LI7

LI7 DLW21SN900SQ2L_0805_4P~D

USBP1_D- USBP1_R_D-

USBP1_D+

B B

USB3TN2(19)

USB3TP2(19)

USB3RN2(19)

USB3RP2(19)

A A

USB3TN2

USB3TP2

USB3RN2

USB3RP2

5

12

CI16 0.01U_0402_16V7K ~DCI16 0.01U_0402_16V7K~D

12

CI17 0.01U_0402_16V7K ~DCI17 0.01U_0402_16V7K~D

USB3T_N2

DLW21SN900SQ2L_0805_4P~D

1

4

RI20 0_0402_5%~D@R I20 0_0402_5%~D@

1 2

RI21 0_0402_5%~D@R I21 0_0402_5%~D@

1 2

LI8

@LI8

@

DLW21SN900HQ2L_0805_4P~D

4

1

ST

RI22 0_0402_5%~D

SHORT

RI22 0_0402_5%~D

SHORT

1 2

RI23 0_0402_5%~D

SHORT

RI23 0_0402_5%~D

SHORT

1 2

LI9

@LI9

@

DLW21SN900HQ2L_0805_4P~D

4

1

ST

RI24 0_0402_5%~D

SHORT

RI24 0_0402_5%~D

SHORT

1 2

RI25 0_0402_5%~D

SHORT

RI25 0_0402_5%~D

SHORT

1 2

2

3

PT

3

2

PT

3

2

4

USBP1_R_D+

USB3TN2_D-

USB3TP2_D+USB3T_P2

USB3RN2_D-

USB3RP2_D+

+5V_CHGUSB

1

+

2

USB3TP2_D+

USB3TN2_D-

150U_B2_6.3V-M~D

10U_0805_10V6K~D

1

@

CI14

CI22

2

@

CI23

1

CI15

0.1U_0402_25V6K~D

2

3

1

USBP1_R_D+

USBP1_R_DUSB3RP2_D+

2

DI5

PESD5V0U2BT_SOT23-3~D

DI5

PESD5V0U2BT_SOT23-3~D

USB3RN2_D-

USBCHG_DET#(38)

PT

DI6

@

USB3RN2_D-

USB3RP2_D+

USB3TN2_D-

USB3TP2_D+

@

1

2

4

5

3

8

IP4292CZ10-TB_XSON10U10~D

Place close to JUSB3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

USBCHG_DET#

USB3RN2_D-

10

USB3RP2_D+

9

USB3TN2_D-

7

USB3TP2_D+

6

SSI2

JUSB3

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

10

Plug_DET

TAIWI_USB006-107CRL-TW

CONN@

Title

USB conn.

Size Document Number Rev

LA-7851P

Date: Sheet

Date: Sheet of

11

GND

12

GND

13

GND

14

GND

Compal Electronics, Inc.

45 66Monday, March 26, 2012

1

45 66Monday, March 26, 2012

of

0.1

A

B

C

D

E

F

G

H

HD Audio Codec

+5VS

LA6 BLM21PG600SN1D_0805~DLA6 BLM21PG600SN1D_0805~D

1 2

1 1

10U_0805_10V6K~D

1

CA5

2

Close to PIN39 Close to PIN46

DMIC_CLK

12

CA26

@CA26

@

10P_0402_50V8J~D

DMIC0

12

CA29

@CA29

2 2

+3VS

@

10P_0402_50V8J~D

CA26 near UA2 CA29 near UA2

12

RA16

@RA16

@

4.7K_0402_5%~D

HDA_RST_AUDIO#

1

CA34

@CA34

@

100P_0402_50V8J~D

2

Close to UA2

3 3

Beep sound

EC Beep

RA6 47K_0402_5%~DRA6 47K_0402_5%~D

BEEP#(38)

1 2

PCI Beep

RA7 47K_0402_5%~DRA7 47K_0402_5%~D

HDA_SPKR(16)

4 4

A

1 2

30mil

0.1U_0402_16V7K~D

1

CA6

2

+3VS

Single Head Phone

PT

MIC1(40)

10K_0402_5%~D

+5VS_PVDD

10U_0805_10V6K~D

0.1U_0402_16V7K~D

1

CA7

CA8

2

+3VS

PT

RA9 3.3K_0402_5%RA9 3.3K_0402_5%

1 2

RA10 3.3K_0402_5%RA10 3.3K_0402_5%

1 2

HP_OUTL(40) HP_OUTR(40)

PT

ST

RA18 1K_0402_5%~DRA18 1K_0402_5%~D

1 2

PT

ST

CPVREF(40)

Close to PIN16

CA16 1U_0402_6.3V6KCA16 1U_0402_6.3V6K

1 2

12

RA11

B

For EMI

ST

RA5 0_0603_5%~DSHORTRA5 0_0603_5%~DSHORT

1 2

I2C_SDA I2C_SCL

QT

CA27 150U_B2_6.3VM_R35M

12

+

CA33 150U_B2_6.3VM_R35M

12

+

I2C_SDA(40)

I2C_SCL(40)

CA17 4.7U_0603_6.3V6K~DCA17 4.7U_0603_6.3V6K~D

10mil

DMIC0(35)

DMIC_CLK(35)

AUD_MUTE#(38,47)

HDA_RST_AUDIO#(16)

SENSE A#(47)

Close to Chip Side

PT

RA17 0_0402_5%~DRA17 0_0402_5%~D

1 2

10mil

PT

MONO_IN

1

CA18

0.1U_0402_16V7K

2

AGNDAGND

+3VS_DVDD

PT

1 2

CA22 2.2U_0603_10V6KCA22 2.2U_0603_10V6K

CA11 near Pin9 CA10 near Pin1

2.2U_0603_10V6K

1

CA9

2

I2C_SDA I2C_SCL

DMIC0

DMIC_CLK

AUD_MUTE#

MONO_IN

HDA_RST_AUDIO#

SENSE A#

1 2

12

RA12

0_0402_5%~D

AGND

CPVREF_R

PT

JUMP_43X39

0.1U_0402_16V7K~D

HP_OUTL_C HP_OUTR_C

CPVREF_R AC_JDREF

QT

AGND

@ JP4

@

@ JP5

@

@ JP6

@

@ JP8

@

GND

C

1

CA10

2

MIC1_L

EMI Request

1

CA35

@CA35

@

0.1U_0402_25V6K~D

2

JP4

12

JP5

12

JP6

12

JP8

12

+AVDD_AC97

+5VS_PVDD

50mA

0.1U_0402_16V7K~D

CA11

1

9

46

DVDD

PVDD139PVDD2

DVDD_IO

23

LINE1_L

24

LINE1_R

14

SDA

15

SCL

21

MIC1_L

22

MIC1_R

2

GPIO0/DMIC_DATA

3

GPIO1/DMIC_CLK

4

PD#

16

PCBEEP

11

RESET#

12

LRCK

13

MCK

17

SENSE A

18

SENSE B

36

CBP

35

CBN

31

CPVREF

43

PVSS2

42

PVSS1

7

DVSS

UA2 ALC3260-CG_QFN48_7X7UA2 ALC3260-CG_QFN48_7X7

QT

AGND

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

HP_OUT_L

HP_OUT_R

SYNC

BCLK

SDATA_OUT

SDATA_IN

EAPD/ SCLK

SPDIFO/SDATA

GPIO3

LINE1_VREFO

MIC1_VREFO

GPIO2

VREF

JDREF

CPVEE

AVSS1 AVSS2

AGND

49

PT

RC filter close to UA2 pin40~45

AUD_SPK_RC_L+

AUD_SPK_RC_L-

AUD_SPK_RC_R+

AUD_SPK_RC_R-

D

200mA2000mA

38

AVDD125AVDD2

40 41

45 44

32 33

10

6

5 8

47 48

20

29

30

28

27

19

34

26 37

RA22 33K_0402_1%RA22 33K_0402_1%

RA23 33K_0402_1%RA23 33K_0402_1%

RA35 33K_0402_1%RA35 33K_0402_1%

RA36 33K_0402_1%RA36 33K_0402_1%

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0402_16V7K~D

1

CA12

2

AGND

AUD_SPK_RC_L+ AUD_SPK_RC_L-

AUD_SPK_RC_R+ AUD_SPK_RC_R-

HP2_OUTL HP2_OUTR

10mil

HDA_SYNC_AUDIO

HDA_BITCLK_AUDIO

HDA_SDOUT_AUDIO

SDIN_CODEC

10mil

AC97_VREF

RA15

CA23 2.2U_0603_10V6KCA23 2.2U_0603_10V6K

PT

AGND

1 2

ST

Issued Date

LDO

+5VS

RA4 10K_0402_5%~DRA4 10K_0402_5%~D

1 2

QT

20mil

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D 10U_0805_10V6K

10U_0805_10V6K

1

CA13

CA14

2

Close to PIN38

RA13 33_0402_5%~DRA13 33_0402_5%~D

1 2

+MIC1_VREFO

1 2

Close to Chip Side

20K_0402_1%~D

1

2

2011/08/25 2012/07/25

E

1

2

LA1 0_0603_5%~DSHORTLA1 0_0603_5%~DSHORT

1 2

ST

Combo JACK

HP2_OUTL (40) HP2_OUTR (40)

HDA_SYNC_AUDIO (16)

HDA_BITCLK_AUDIO (16)

HDA_SDOUT_AUDIO (16)

EAPD# (38,40,47)

10mil

1

CA24

2.2U_0603_10V6K

2

AGND AGND

1

CA30

CA15

2

120P_0402_50V8J~D

Compal Secret Data

10U_0805_10V6K~D

0.1U_0402_16V7K~D

1

CA1

CA2

2

A_LDO_EN

PT

1

PT

CA25

0.1U_0402_16V7K~D

2

RA25 33K_0402_1%RA25 33K_0402_1%

1 2

RA26 33K_0402_1%RA26 33K_0402_1%

1 2

RA27 33K_0402_1%RA27 33K_0402_1%

1 2

RA34 33K_0402_1%RA34 33K_0402_1%

1 2

1

CA31

CA28

2

120P_0402_50V8J~D

Deciphered Date

+VDDA

HDA_SDIN0 (16)

F

1 2 3

RT9043-GB_SOT23-5~D

AGND

UA1

VOUT

VIN GND

FB

EN

Adjustable Output

HDA_SYNC_AUDIO

HDA_SDOUT_AUDIO

1

CA44

2

120P_0402_50V8J~D

+VDDA+5VS

+VDDA=4.81V

PT

RA1

RA2

10K_0402_1%~D

HDA_BITCLK_AUDIO

CA19

CA19 10P_0402_50V8J~D

10P_0402_50V8J~D

20mil

12

10U_0805_10V6K~D

1

2

12

0.1U_0402_16V7K~D

1

CA3

CA4

2

AGNDAGNDAGND

RA14

RA14 33_0402_5%~D

33_0402_5%~D

5

4

30.1K_0402_1%~D

ADJ

12

EMI Request

12

CA21

10P_0402_50V8J~D

CA48 1U_0402_16V6KCA48 1U_0402_16V6K

CA49 1U_0402_16V6KCA49 1U_0402_16V6K

CA50 1U_0402_16V6KCA50 1U_0402_16V6K

CA52 1U_0402_16V6KCA52 1U_0402_16V6K

1

CA66

CA65

120P_0402_50V8J~D

CA67

2

120P_0402_50V8J~D

Title

Size Document Number Rev

Custom

Date: Sheet of

G

1

CA20

QT

1 2

Compal Electronics, Inc.

HD Audio ALC275/Audio Jack

CA20

22P_0402_50V8J~D

2

QT

AUD_SPK_L+ (47)

AUD_SPK_L- (47)

AUD_SPK_R+ (47)

AUD_SPK_R- (47)

46 66Monday, March 26, 2012

H

A

B

C

D

E

Audio AMP

QT

PT

1 1

2 2

+VSBP

QT

RA53 0_0603_5%~DSHORTRA53 0_0603_5%~DSHORT

1 2

Close to UA5 pi n3,pin4,pin11,p in12

RA45 33K_0402_1%RA45 33K_0402_1%

AUD_SPK_L+(46)

AUD_SPK_L-(46)

AUD_SPK_R+(46)

AUD_SPK_R-(46)

1 2

RA41 33K_0402_1%RA41 33K_0402_1%

1 2

RA48 33K_0402_1%RA48 33K_0402_1%

1 2

RA46 33K_0402_1%RA46 33K_0402_1%

1 2

ST

RA50 0_0402_5%~D

SHORT

AUD_MUTE#(38,46)

EAPD#(38,40,46)

1 2

DE3 RB751V40_SC76-2DE3 RB751V40_SC76-2

1 2

1

2

60.4K_0402_1%~D

RA49

ST

RA47 10_0805_5%~DRA47 10_0805_5%~D

100P_0402_25V8K

1

CA42

CA41

2

12

60.4K_0402_1%~D

AGND

100K_0402_5%~D

QT

ST

1 2

1

CA45

2

ST

RA51

10U_0805_25V6K

1

CA46

2

12

+5VS

100K_0402_5%~D

12

RZ40

61

QA15A

2

DMN66D0LDW-7_SOT363-6~D

10U_0805_25V6K

0.1U_0402_25V6K~D

1

CA43

CA47

2

QT

CA53 1U_0402_16V6KCA53 1U_0402_16V6K

CA58 1U_0402_16V6KCA58 1U_0402_16V6K

CA59 1U_0402_16V6KCA59 1U_0402_16V6K

CA60 1U_0402_16V6KCA60 1U_0402_16V6K

RA52

60.4K_0402_1%~D

+5VS

ST

RZ38

5

1U_0603_25V6-K~D

1

CA71

2

1 2

12

RA58

60.4K_0402_1%~D

MUTE#

12

3

QA15B

QA15B DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D

4

1

2

CA32

@CA32

@

2.2U_0603_10V6K

UA5

7

AVCC

15

PVCCR

16

PVCCR

27

PVCCL

28

PVCCL

3

LINP

4

LINN

12

RINP

11

RINN

5

GAIN0

6

GAIN1

1

SD#

2

FAULT#

13

NC

29

GND

TPA3113D2PWPR_HTSSOP28

BSPL

OUTPL

OUTNL

BSNL

BSPR

OUTPR

OUTNR

BSNR

PBTL

PLIMIT

GVDD

PGND PGND AGND

ST

CA61 0.22U_0603_16V7KCA61 0.22U_0603_16V7K

SPKL+

26

25

23

SPKL-

22

SPKR+

17

18

20

SPKR-

21

14

10

9

24 19 8

AGND

1 2

CA62 0.22U_0603_16V7KCA62 0.22U_0603_16V7K

CA72 0.22U_0603_16V7KCA72 0.22U_0603_16V7K

1 2

CA73 0.22U_0603_16V7KCA73 0.22U_0603_16V7K

12

RA61

RA61 10K_0402_1%~D

10K_0402_1%~D

1

CA76

1U_0603_25V6-K~D

2

LA8 0_0603_5%~DSHORTLA8 0_0603_5%~DSHORT

LA7 0_0603_5%~DSHORTLA7 0_0603_5%~DSHORT

1 2

12

RA60

RA60 10K_0402_1%~D

10K_0402_1%~D

QT

1

CA75

1U_0603_25V6-K~D

2

SPK_L+ SPK_LSPK_R+ SPK_R-

1000P_0603_50V7K~D

1

2

SPK_L+

SPK_L-

SPK_R+

SPK_R-

Int. Speaker Conn.

40mil = For 4ohm 2W Speaker

1000P_0603_50V7K~D

1

@

CA55

CA54

2

1

@

CA56

2

3

@

CA57

DA4

@

1

2

3

2

DA5

@

1

PJDLC05C_SOT23-3

JSPK1

1

2

3

4

5

G1

6

G2

ACES_50224-00401-001

CONN@

For ESD

3 3

SENSE PIN

PT

RA8 10K_0402_1%~DRA8 10K_0402_1%~D

1 2

SENSE A#(46)

4 4

SENSE A# MIC_PRESENT#

A

RA38 20K_0402_1%~DRA38 20K_0402_1%~D

1 2

RA37 39.2K_0402_1%RA37 39.2K_0402_1%

1 2

SHP_HPD#

JACK_PLUG#

B

SHP_HPD# (40)

MIC_PRESENT# (40)

JACK_PLUG# (40)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Combo JACK Mic SW

Combo JACK Mic SW change to Audio/B in PT

Compal Secret Data

Deciphered Date

2012/07/212011/08/25

D

PT

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Speaker/Audio Jack

LA-7851P

E

47 66Monday, March 26, 2012

0.1

5

4

3

2

1

R11

R11 100K_0402_5%~D

100K_0402_5%~D

2

G

2

G

Q6A

Q7A

+5VALW

12

R12

R12 100K_0402_5%~D

100K_0402_5%~D

61

D

S

12

R18

R18 100K_0402_5%~D

100K_0402_5%~D

61

D

S

R10 820_0402_5%~DR10 820_0402_5%~D

1 2

34

D

Q6B

5

G

DMN66D0LDW-7_SOT363-6~D

S

IBAT2 BAT2

R16 820_0402_5%~DR16 820_0402_5%~D

1 2

34

D

Q7B

5

G

DMN66D0LDW-7_SOT363-6~D

S

BAT1IBAT1

BATT_CAP_LED#_LV3(38) BATT_CAP_LED#_LV5(38)

BATT_CAP_LED#_LV4(38)

12

R20

R20 100K_0402_5%~D

100K_0402_5%~D

DMN66D0LDW-7_SOT363-6~D

12

R23

R23 100K_0402_5%~D

100K_0402_5%~D

DMN66D0LDW-7_SOT363-6~D

BATT LED

12

D D

BATT_CAP_LED#_LV1(38)

DMN66D0LDW-7_SOT363-6~D

12

R17

R17 100K_0402_5%~D

100K_0402_5%~D

C C

BATT_CAP_LED#_LV2(38)

DMN66D0LDW-7_SOT363-6~D

+5VALW +5VALW

12

R21

R21 100K_0402_5%~D

100K_0402_5%~D

61

D

Q8A

2

G

S

+5VALW

12

R24

R24 100K_0402_5%~D

100K_0402_5%~D

61

D

Q9A

2

G

S

IBAT3 BAT3 IBAT5 BAT5

R19 820_0402_5%~DR19 820_0402_5%~D

1 2

34

D

Q8B

5

G

DMN66D0LDW-7_SOT363-6~D

S

IBAT4 BAT4

R22 820_0402_5%~DR22 820_0402_5%~D

1 2

34

D

Q9B

5

G

DMN66D0LDW-7_SOT363-6~D

S

BATBTN#(38)

12

R26

R26 100K_0402_5%~D

100K_0402_5%~D

DMN66D0LDW-7_SOT363-6~D

10mil ALL

@D8

PESD24VS2UT_SOT23-3~D

@

12

R27

R27 100K_0402_5%~D

100K_0402_5%~D

5

G

61

D

Q10A

2

G

S

+5VALW

BAT1 BAT2 BAT3 BAT4 BAT5 BATBTN#

2

3

D8

1

34

D

Q10B

S

0809 update

1 2 3 4 5 6 7 8

ACES_51524-0080N-001

DMN66D0LDW-7_SOT363-6~D

JBLED

1 2 3 4 5 6 7 8

CONN@

R25 820_0402_5%~DR25 820_0402_5%~D

1 2

9

G1

10

G2

Charge LED

+5VALW

B B

QT QT

R15 100_0402_5%~DR15 100_0402_5%~D

12

R13

R13 100K_0402_5%~D

100K_0402_5%~D

BATT_LOW_LED#(38)

DMN66D0LDW-7_SOT363-6~D

A A

5

12

R14

R14 100K_0402_5%~D

100K_0402_5%~D

Q4B

5

G

61

D

Q4A

2

G

S

1 2

34

D

DMN66D0LDW-7_SOT363-6~D

S

4

BATT_LOW_LED#_D

12

R7

R7 100K_0402_5%~D

100K_0402_5%~D

BATT_CHG_LED#(38)

DMN66D0LDW-7_SOT363-6~D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

+5VALW

R9 100_0402_5%~DR9 100_0402_5%~D

34

D

Q3B

S

1 2

DMN66D0LDW-7_SOT363-6~D

Compal Secret Data

Deciphered Date

12

R8

R8 100K_0402_5%~D

100K_0402_5%~D

5

G

61

D

Q3A

2

G

S

PWR_LED#_D

2012/07/152011/08/25

2

Title

Size Document Number Rev

C

Date: Sheet of

+5VALW

0809 update

JLED

PWR_LED#_D BATT_LOW_LED#_D

1 2 3 4

ACES_50504-0040N-001

CONN@

Compal Electronics, Inc.

Speaker/Audio Jack

1

1 2

5

G1

3

6

G2

4

LA-7841P

0.1

48 66Monday, March 26, 2012

0.1

5

EN_INVPWR

SI3457BDV

RT8207MZQW

D D

ADAPTER

BATTERY

SYSON

TPS51212DSCR

SUSP#

B+

VR_ON

ISL95836HRTZ

CHARGER

EC_ON / VCOUT0_PH

RT8205LZQW

C C

PU200

QV29

PU300

PU500

PU700

+INV_PWR_SRC

CPU1.5V_S3_GATE

SUSP#

+1.5V

+0.75VS

+VCCP

+VCC_CORE / +VCC_GFXCORE_AXG

PWRSHARE_EN_EC#

PCH_PWR_EN

+5VALW

+V1.05S_VCCP_PWRGOOD

+3VALW

PM_SLP_S3#

SUSP#

PCH_PWR_EN

EN_WOL

SUSP#

AO4728L

QU6

SI3456DDV

UZ4

TPS2062ADR

UI2

SI3456DDV

QN1

SI4800BDY

QZ6

AO3419L

QH5

TPS51461RGER

PU600

SI3456DDV

QZ12

AO3419L

QL3

SY8033BDBC

PU400

SI4800BDY

QZ8

+1.5V_CPU_VDDQ

+1.5VS

+5V_CHGUSB

+5VS_HDD

+5VS

+5V_PCH

+VCCSA

+3V_PCH

+LAN_IO

+1.8VS

+3VS

4

ODD_EN#

EN_DFAN1

EC_ENVDD / VGA_LVDDEN

EN_CAM

WLAN_EN

FDC655BN

QN4

APE8873M

UE4

AO3419L

QV27

SI2301CDS

QV31

SI3456DDV

QM1

+5VS_ODD

+FAN_POWER

+LCDVDD

+3VS_CAM

+3VS_WLAN

3

+VCC_CORE/+VCC_GFXCORE_AXG

+1.5V_CPU_VDDQ

Power Button & BATBTN & USBCHG_DET

PWRBTN#

PCH

DPWROK

RSMRST# PCH_RSMRST#

ACPRESENT

SLP_S5#

SLP_S3#

APWROK

PWROK

SYS_PWROK

18

ISL95836HRTZ-T

PGOOD

AO4728L

2

AC mode Ta -> Tb -> Tc DC mode Tc -> Ta -> Tb

EC_ON

ON/OFF

Tc

Ta

ENE KB9012

PBTN_OUT#

4

PCH_DPWROK

5

6

AC_PRESENT

7

PM_SLP_S5#

8

PM_SLP_S3#

10

PCH_APWROK

11

PCH_PWROK

17

VR_ON

16

VGATE

CPU1.5V_S3_GATE

13

SA_PGOOD

4

SYSON

9

SUSP#

12

15

RT8205LZQW

PGOOD

+3V/+5V_ALW

+VSBP

TP0610K

Tb

AO3419L/SI3456DDVPCH_PWR_EN

RT8207MZQW

+3V/+5V_PCH

+1.5V/+0.75VS

PGOOD

SY8033BDBC

SI4800BDY

SI3456DDV

TPS51212DSCR

PGOOD

+1.8VS

PGOOD

+3VS

+5VS

+1.5VS

+VCCP

TPS51461RGER

14

PGOOD

1

+VCCSA

GPU

+3VS

AO3419L

DGPU_PWR_EN

QZ1

+3VS_DELAY

B B

A A

RC delay

B+

ISL62883CHRTZ

PU800

+GPU_CORE

+1.5V

RC delay

SI4634DY

UZ2

+1.5VSDGPU

5

RC delay

+VCCP

SI4634DY

UZ1

+1.05VSDGPU

+3VLP

100k

Power Button

A

BATBTN

B

USBCHG_DET

C

Charger_LDO

4

3

ON/OFF

2

PBTN_SW#

BATBTN#

+3V_ALW

10k

USBCHG_DET#

+3VLP

100k

2n7002

150k

When press power button : A -> 2 -> 3 -> A1 When press Battery button : B -> 2 -> 3 -> B1 When USB charge device plug in : C -> 2 -> 3 -> C1

+3V_ALW

ENE KB9012

EC check which button is pressed

4

PCH_PWR_EN

...

PCH_PWROK

BATT_CAP_LED#_LV[1...5]

PWRSHARE_OE# & PWRSHARE_EN_EC#

EC_ON

+3V_ALW

10k

VCOUT0_PH#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

Turn on Other

A1

system power

Turn on

B1

Battery LED

Turn on USB

C1

power charge

RT8205LZQW

3

Compal Secret Data

2011/08/25 2012/07/25

Deciphered Date

+3V/+5V_ALW

Compal Electronics, Inc.

Title

Power Sequence

Size Docum ent Number Rev

Date: Sheet of

1

49 66Monday, March 26 , 2012

0.1

5

D D

C C

4

3

2

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/08/25 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

1

50 66Monday, March 26, 2012

0.1

5

D D

C C

4

3

2

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/08/29 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

1

51 66Monday, March 26, 2012

0.1

A

1

PC902

2

SM24_SOT23

SM24_SOT23 PD905

PD905

1

@

3

VIN

12

1000P_0402_50V7K~D

EC_SMB_CK1 (38,53)

EC_SMB_DA1 (38,53)

PR915

100_0402_5%~D

1 2

PL900

JDCIN9

SINGA_2DC-S060-021F_5P -T

7

GND_2

6

GND_1

5

V-

4

1 1

2 2

V-

12

PC904

100P_0402_50V8J~D

2

V+

1

V+

3

ID

PL902

SMB3025500YA_2P

1 2

PC905

0.01U_0402_25V7K~D

JBATT9

1

2

3

4

5

6

7

8

9

10

11

ACES_50290-01101-001

1

PC906

2

CLK_SMB DAT_SMB BATT_PRS

ADPIN

1

12

PC900

2

PR920

@

1.8K_1206_5%~D

PSID

BATT++BATT+

SM24_SOT23

SM24_SOT23 PD904

PD904

1

@

12

PC907

100P_0402_50V8J~D

1000P_0402_50V7K~D

@

2

3

PR913

100_0402_5%~D

1 2

PL900

SMB3025500YA_2P

1 2

12

PC901

1000P_0402_50V7K~D

100P_0402_50V8J~D

PL901

BLM18BD102SN1D_0603~D

12

PR917

100_0402_5%~D

1 2

PR918

PR918 0_0402_5%~D

0_0402_5%~D

SHORT

1 2

2

PC903

100P_0402_50V8J~D

B

EC_BATT_PRS (38,53)

PR916

10K_0402_1%~D

1 2

ACES_50271-0020N-001

+3VALW_EC

JRTC9

GND GND

C

+RTCBATT

1

2

3 4

@

PD900

1 2

RB751V40_SC76-2

2

1

3

PD902

PD902 SM24_SOT23

SM24_SOT23

+RTCBATT

+3VLP

PR903

100K_0402_1%~D

1 2

PSID-1

@

POK(38,54)

1 2

+5VALW

PR906

15K_0402_1%~D

B+

PR910

100K_0402_1%~D

1 2

PR911

0_0402_5%~D

SHORT

VSB_N_002

1

2

@

PR900

0_0402_5%~D

1 2

PQ900

FDV301N-G_SOT23-3~ D

D

1 3

2

B

100K_0402_1%~D

VSB_N_003

13

D

2

G

S

PC910

0.1U_0402_16V7K

33_0402_5%~D

S

PSID-3PSID-3

1 2

G

2

PSID-2

C

PQ901

PQ901 MMST3904-7-F_SOT3 23~D

MMST3904-7-F_SOT3 23~D

E

3 1

12

PR908

PR909

22K_0402_1%

1 2

PQ904

PQ904 SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

PD901

BAV99W-7-F_SOT323-3~D

PR902

PR904

10K_0402_1%~D

12

PC908

0.22U_0603_25V7K

VSB_N_001

3

1

12

2

+5VALW

PQ903

PQ903 SI3457CDV

SI3457CDV

S

4 5

G

3

D

+3VALW+5VALW

PR901

2.2K_0402_5%~D

1 2

PS_ID (38)

D

6

2 1

PC909

+VSBP

12

0.1U_0402_25V6K~D

PH901 under CPU botten side :

CPU thermal protection at 90 degree C Recovery at 50 degree C

ADP_I(38,53)

3 3

JIMBTY battery connector

SMART

SMARTSMART Battery:

Battery:

Battery:Battery:

01.BAT+

01.BAT+01.BAT+

02.BAT+

02.BAT+02.BAT+

03.BAT+

03.BAT+03.BAT+

04.CLK_SMB

04.CLK_SMB04.CLK_SMB

05.DAT_SMB

05.DAT_SMB05.DAT_SMB

06.BATT_PRS

06.BATT_PRS06.BATT_PRS

07.SYS_PRS

07.SYS_PRS07.SYS_PRS

08.

08.08.

09.GND

09.GND09.GND

10.GND

10.GND10.GND

11.GND

11.GND11.GND

close EC

@

PR936

13.7K_0402_1%

1 2

12

PR937

13.7K_0402_1%

PC911

1 2

0.1U_0402_25V6K~D

VCIN0_PH(38)VCIN1_PH(38)

100K_0402_1%_TSM0B104F4251R Z

PH901

+3VLP

16.9K_0402_1%

16.9K_0402_1% PR935

PR935

1 2

12

close CPU

CPU thermal

4 4

Compal Electronics, Inc.

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

Title

Size Document N umber R ev

Date: Sheet of

Compal Electronics, Inc.

PWR-DCIN / BATT CONN / OTP

LA-7851P

D

52 63Monday, March 26, 2012

0.1

A

B

C

D

Iada=0~4.62A(90W)

ADP_I = 19.9*Iadapter*Rsense

PQ100

P2

PQ102

AO4423L_SO8

PQ101

PQ101 AO4407A_SO8

AO4407A_SO8

ACOV

2K_0603_5%

2

ACOFF

8 7

5

12

PR102

PDTA144EU_SOT323-3

200K_0402_1%~D

V1

2

61

PQ106A

DMN66D0LDW-7

PR121

200K_0402_5%~D

1 2

PR140

@ PR140

@

0_0402_5%~D

2

PQ111

12

@

13

D

PQ112

2N7002-7-F_SOT23-3

S

H_PROCHOT# (8,38)

10K_0402_1%~D

1U_0603_25V6K

1 1

VIN

12

5

PR144

PACIN

1M_0402_5%~D

ACOFF(38)

12

PR142

PR141

2K_0603_5%

@

3

PQ113B

4

DMN66D0LDW-7

PACIN

DDTC115EUA-7-F_SOT323-3

PC124

@ PC124

@

1U_0603_25V6K

2

G

12

PR101

3.3_1210_5%~D

12

PR103

3.3_1210_5%~D

1 2

PC107

2.2U_0805_25V6K

2 2

3 3

ACOFF

12

PR146

5.1K_0805_1%

13

D

2

PQ906

G

S

2N7002-7-F_SOT23-3

2

12

0.1U_0402_16V7K~D

12

PC130

SSI2

PR147

5.1K_0805_1%

5.1K_0805_1% 1M_0402_5%~D

1M_0402_5%~D

61

PQ113A

DMN66D0LDW-7

1 2

200K_0402_1%~D

EC_BATT_PRS(38,52)

12

PR143

12

PR145

13

PQ103

2

13

PR109

PC127

@PC127

@

4

47K

5

+3VALW

1 2 36

12

PC104

0.1U_0603_25V7K~D

PQ106B

DMN66D0LDW-7

A+

AC_IN(38)

121K_0402_1%~D

13

D

2

G

S

0.1U_0603_25V7K~D

PR111

GNDA_24737

PACIN

PR119

47K

1 3

PQ104

DDTC115EUA-7-F_SOT323-3

3

4

1 2

@

12

1 2 3 6

12

PR104

200K_0402_1%~D

12

1000P_0402_25V8J~D

150K_0402_1%~D

12

EC_SMB_CK1(38,52)

EC_SMB_DA1(38,52)

ADP_I(38,52)

A+

PQ905

2N7002-7-F_SOT23-3

AO4423L_SO8

4

PC111

1 2

PR114

49.9K_0402_1%~D

1 2

CHARGER_LDO

12

PR116

100K_0402_5%~D

13

D

S

2N7002-7-F_SOT23-3

GNDA_24737

G

100P_0402_50V8J~D

P3 B+

8 7

5

VIN

2

3

1 2

PC105

1

5600P_0402_25V7K~D

10_1206_1%

1U_0603_25V6K

PR112

1 2

316K_0402_1%~D

12

PR117

1 2

100K_0402_5%~D

12

PR122

@

121K_0402_1%~D

PR129

100_0402_1%~D

1 2

GNDA_24737

PC115

@ PC115

@

1000P_0402_25V8J~D

1 2

PR138

0_0402_5%~D

1 2

OVSETIN

PR118

@

PR134

0_0402_5%~D

1 2

2

PQ109

PR124

0_0402_5%~D

SHORT

1 2

0_0402_5%~D

SHORT

1 2

PC123

VIN

PR126

PD100

BAS40CW_SOT323-3

PR110

PC110

GNDA_24737

ACOV

0_0402_5%~D

100K_0402_1%~D

0.01U_0402_25V7K

VIN

PR100

0.01_2512_1%

1

2

CSIP

GNDA_24737

PC106

1 2

0.1U_0603_25V7K~D

12

PU100

6

5

9

8

7

+3VALW

PR130

PC125

PR139

@

1 2

316K_0402_1%~D

ACDET

ACOK#

SCL

SDA

IOUT

PR125

PR127

12

ACSETIN_A

0_0402_5%~D

1 2

10K_0402_5%~D

121K_0402_1%~D

12

4

CSIN

3

PR105

SHORT

PC109

0.1U_0603_25V7K~D

2

20

VCC

BQ24737

11

1 2

12

ACP

ILIM10IFAULT#

PR128 0_0402_5%~D

PR106

PR106 0_0402_5%~D

0_0402_5%~D

SHORT

1 2

1

ACN

CMPIN

4

CMPIN_1

SHORT

12

PR135

1 2

GNDA_24737

BATT_TURBO_BOOST

GNDA_24737

1 2

3

CMPOUT

PHASE

LODRV

SRN12SRP

13

12

PR133

6.8_0402_1%~D

1 2

PC121

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D 0_0402_5%~D

0_0402_5%~D

PC126

1 2

@

PC108

0.1U_0603_25V7K~D

PR136

@ PR136

@

3M_0402_5%

1 2

PR137

@ PR137

@

0_0402_5%~D

1 2

14

GND

17

BTST

16

REGN

18

HIDRV

19

15

21

PAD

GNDA_24737

12

PR132

10_0402_1%~D

(38)

0.1U_0603_25V7K~D

@PJP100

@

2

CMPIN_1

PACIN

BST

CHARGER_LDO

DH_CHG

LX_CHG

DL_CHG

1 2

PR131

0_0402_5%~D

PC122

12

0.1U_0603_25V7K~D

PJP100

112

JUMP_43X118

PR113

0_0603_5%~D

1 2

BAT54HT1G_SOD323-2~D

SHORT

@

GNDA_24737

BST_CHGA

1 2

12

PC100

4.7U_0805_25V6-K

0.047U_0603_25V7K~D

PD103

0.1U_0402_16V7K~D

12

PC101

4.7U_0805_25V6-K

PC112

PC113

1U_0603_10V6K~D

1 2

12

PC103

PC102

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D 2200P_0402_25V7K~D

2200P_0402_25V7K~D

12

4

12

@

PC128

OP soultion

PR136/3Mohm

PR137/0ohm

PR139/316kohm

PR138/11.5kohm PR138/0ohm

PC115/1000pF

PR140/NC

PR117/NC

PR118/NC

PR116/100kohm

CHG_B+

10K_0402_1%~D

786

5

PQ107

AO4466L_SO8~D

123

4.7UH_ETQP3W4R7WFN_5.5A_20%

786

5

PQ110

AO4712L_SO8~D

123

ACDET soultion

PR119/121kohm

PQ109/NC

4 4

PR121/47kohm

PR134/NC

PR122/NC

PQ100

AO4407A_SO8

1 2 3 6

4

PR108

1 2

PQ105

13

DDTC115EUA-7-F_SOT323-3

V1

PR115

100K_0402_1%~D

PL100

1 2

12

PR123

4.7_1206_5%~D

12

PC116

680P_0402_50V7K~D

PR136/NC

PR137/NC

PR139/NC

PC115/NC

PR140/NC

PR117/100kohm

PR118/0ohm

PR116/100kohm

PR119/121kohm

PQ109/2N7002

PR121/47kohm

PR134/NC

PR122/NC

8 7

5

47K_0402_1%~D

2

12

CHG

PR107

1 2

PR120

0.01_2512_1%

1

2

VIN

12

PC114

2200P_0402_25V7K~D

4

3

1

PC117

2

@

10U_0805_25V6K~D

1

PC119

PC118

2

@

10U_0805_25V6K~D

BATT+

1

PC120

2

10U_0805_25V6K~D

3S3P

CC = 5.1A

CV = 3S (12.6V)

Compal Electronics, Inc.

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR-Charger

LA-7851P

D

53 63Monday, March 26, 2012

0.1

A

1 1

B+

PJP200

@PJP200

@ 2

112

JUMP_43X118

2 2

3 3

USBCHG_DET_D(38)

VCOUT0_PH#(38)

4 4

A

EC_ON(38)

12

PC201

+3VALWP

B++

12

PC202

0.1U_0402_25V6K~D

0.1U_0402_25V6K~D 2200P_0402_50V7K~D

2200P_0402_50V7K~D

PD906 RB751V40_SC76-2PD906 RB751V40_SC76-2

PD903 RB751V40_SC76-2PD903 RB751V40_SC76-2

PD907 RB751V40_SC76-2PD907 RB751V40_SC76-2

PC203

4.7U_0805_25V6-K

PL200

4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%

1 2

1

+

PC210

2

150U_D2_6.3VM~D

SSM6N7002FU-2N_SOT363-6

12

1 2

PR208

4.7_1206_5%

PC212

PQ204A

680P_0603_50V7K

B

+3VLP

PQ200

PQ200 AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

241

12

SNUB_3V

12

5

PQ202

AON7702A_DFN8-5

123

ENTRIP1ENTR IP1

61

N_3_5V_001

2

G

@

@ 12

PC217

2.2U_0603_10V6K

B

@

4

12

13

D

PQ205

2N7002-7-F_SOT23-3

S

0.22U_0603_10V7K

PC221

0.1U_0402_16V7K~D

5

1 2

PR214

100K_0402_5%

1

PC205

2

10U_0603_6.3V6M

PC208

12

B++

PD200

@ PD200

@

BZT52-B5V6S_SOD323-2

1 2

PR219

0_0402_5%

VCOUT0_PH#(38)

ENTRIP2

34

PQ204B

SSM6N7002FU-2N_SOT363-6

PR206

1 2

2.2_0603_5%~D

21

499K_0402_1%

1 2

@

PR211

0_0402_5%~D

VL

PR210

2VREF_8205

+5VALWP

C

2VREF_8205

1U_0603_16V6K

12

PC200

@

PC220

0.1U_0402_25V6K~D

1 2

PR200

13.7K_0402_1%

1 2

PR202

20K_0402_1%~D

105K_0402_1%~D

1 2

BST_3V

UG_3V

LX_3V

LG_3V

12

PR212

200K_0402_1%~D

1 2

PR204

25

P PAD

7

VOUT2

8

VREG3

9

BOOT2

10

UGATE2

11

PHASE2

12

LGATE2

12

PC215

1U_0603_10V6K

FB_3V

ENTRIP2

6

ENTRIP2

EN

13

PR215

PR215 0_0402_5%~D

0_0402_5%~D

SHORT

1 2

B++

PJP201

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m PJP203

PJP203

1 2

PAD-OPEN 4x4m

PR217

0_0402_5%~D

1 2

SHORT

3

4

5

FB2

TONSEL

SKIPSEL

14

15

12

5VALWP TDC 7.9A Peak Current 11.2A OCP current 13.5A

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

100P_0402_50V8J~D

FB_5V

ENTRIP1

2

1

FB1

REF

UGATE1

PHASE1

LGATE1

VIN16GND

17

12

PC214

4.7U_0805_10V6K

PC216

0.1U_0402_25V6K~D

+5VALW

PC219

1 2

PR201

30.9K_0402_1%

1 2

PR203

20K_0402_1%~D

1 2

PR216

127K_0402_1%

1 2

PU200

PU200 RT8205LZQW(2)_WQFN24_4X4

RT8205LZQW(2)_WQFN24_4X4

ENTRIP1

24

VOUT1

23

PGOOD

22

BOOT1

21

20

19

SECFB18VREG5

VL

PR207

BST_5V

1 2

2.2_0603_5%~D

UG_5V

LX_5V

LG_5V

+3VALWP

3.3VALWP TDC 5.7A Peak Current 8A OCP current 9.6A

D

B++

12

PC206

0.1U_0402_25V6K~D

POK (38,52)

BST1_5VBST1_3V

0.1U_0402_16V7K~D

PJP202

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m PJP204

PJP204

1 2

PAD-OPEN 4x4m

D

12

PC204

PC207

4.7U_0805_25V6-K

2200P_0402_50V7K~D

PC209

0.22U_0603_10V7K

12

@

PC218

+3VALW

E

PQ201

PQ201 AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

241

5

4

12

123

PQ203

AON7702A_DFN8-5

Title

Size Document Number Rev

Date: Sheet of

PL201

2.2UH_FDSD0630-H-2R2M-P3_8.3A_20%

1 2

12

PR209

4.7_1206_5%

SNUB_5V

12

PC213

680P_0603_50V7K

Compal Electronics, Inc.

PWR-3VALWP/5VALWP

LA-7851P

E

+5VALWP

1

+

PC211

2

150U_D2_6.3VM~D

0.1

54 63Monday, March 26, 2012

0.1

A

B

C

D

1 1

PJP400

1 2

PAD-OPEN 3x3m

SUSP#(34,38,56,57)

2 2

1 2

PR402

0_0402_5%~D

1

2

EN_1.8VSP

PC400

22U_0805_6.3V6M~D

47K_0402_5%~D

+1.8V_PWROK(38)

1.8VSP_VIN

@

PR403

12

10

9

8

5

1

@

PC404

0.1U_0402_10V7K~D

2

PU400

PVIN

SVIN

EN

4

TP

11

1.8VSP_LX

2

LX

PG

3

LX

1.8VSP_FB

6

FB

NC

7

1

SY8033BDBC_DFN10_3X3

12

SNUB_1.8VSP

12

1UH_3.2A_20%

1 2

PR400

4.7_1206_5%

PC405

680P_0603_50V7K

PL400

Ra

PR401

20K_0402_1%

Rb

12

PC401

12

PR404

10K_0402_1%~D

+1.8VS+3VALW

1

2

12

22P_0402_50V8J~D

12

PC402

PC403

22U_0805_6.3VAM

+1.8VSP TDC 1.3A Peak Current 1.9A OCP current 2.3A

<Vo=1.8V> VFB=0.6V Vo=VFB*(1+Ra/Rb)=0.6*(1+20K/10K)=1.8V

3 3

4 4

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

C

Title

Size Document N umber R ev

Date: Sheet of

Compal Electronics, Inc.

PWR-1.8VSP

LA-7851P

D

55 63Monday, March 26, 2012

0.1

5

+3VS

D D

+V1.05S_VCCP_PW RGOOD(58)

PR502

49.9K_04 02_1%~D

@

PC505

1 2

1

2

PR503

0_0402_ 5%~D

SUSP#(34,38,55,57)

C C

1 2

0.1U_040 2_16V7K

TRIP_+V1.0 5S_VCCPP

EN_+V1.0 5S_VCCPP

FB_+V1.0 5S_VCCPP

RF_+V1.0 5S_VCCPP

12

PR505

470K_04 02_1%

4.99K_04 02_1%

4

PR500

PR500 100K_04 02_5%

100K_04 02_5%

1 2

PU500

1

PGOOD

2

TRIP

3

EN

4

VFB

5

TST

TPS5121 2DSCR_SON10_ 3X3

@

PC510

1000P_0 402_50V7K~D

12

PR507

12

VBST

DRVH

V5IN

DRVL

3

+V1.05S_ VCCPP_B+

5

PQ501

4

PC504

0.1U_060 3_50V7K~D

PR501

BST_+V1 .05S_VCCPP

10

UG_+V1.0 5S_VCCPP

9

SW_ +V1.05S_VCCPP

8

SW

TP

7

6

11

+V1.05S_ VCCPP_5V

LG_+V1.0 5S_VCCPP

12

PR506

1.2K_040 2_1%@

PR501

1 2

2.2_0603 _5%~D

PC506

1 2

1U_0603 _6.3V6M

0.1U_060 3_50V7K~D

1 2

+5VALW

SIR818DP-T 1_POWERPA K-SO8-5~D

PQ500

123

SIR472DP-T1-GE3_POWERPAK8-5~D

5

321

12

PR504

4.7_1206 _5%

1

PC508

PC508 1000P_0 402_50V7K~D

1000P_0 402_50V7K~D

2

12

PC500

0.1U_0402_25V6K~D

PL500

0.47UH_1 7.7A

1 2

1

PJP500

@ PJP500

@

2

112

JUMP_43 X118

12

PC501

PC502

PC503

4.7U_0805_25V6-K

2

0.1U_040 2_10V7K~D

PC509

@

1

4.7U_0805_25V6-K

PR508

12

0_0402_ 5%~D

SHORT

2200P_0402_50V7K~D

B+

+VCCP

VCCIO_SENSE (11)

PR510

10K_040 2_1%~D

1 2

PR511

B B

12

0_0402_ 5%~D

SHORT

VSSIO_SENSE (11)

+VCCP(1.05V) TDC 13A Peak Current 19A OCP current 22.8A TYP MAX H/S Rds(on) 10mohm , 14.5mohm L/S Rds(on) :3mohm , 3.6mohm

A A

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet o f

Compal Electronics, Inc.

PWR-V1.05S_VCCPP

LA-7851P

56 63Monday, March 26 , 2012

1

0.1

5

PJP301

@ PJP301

@

B+

D D

+1.5V

C C

2

JUMP_43 X118

1

+

2

112

PC308

PC308 220U_6.3 V_17M

220U_6.3 V_17M

1.5V_B+

12

PL300

0.56UH_3 0A

1 2

12

PC302

PC300

4.7U_0805_25V6K~D

PC303

4.7U_0805_25V6K~D

0.1U_0402_25V6K~D

12

PR302

PQ302

4.7_1206_5%~D

@

SNUB_1.5V

12

PC311

680P_0603_50V7K~D

SYSON(3 4,38)

SIR818DP-T1_POWERPAK-SO8-5~D

12

321

4

PC304

2200P_0402_50V7K~D

5

4

PR306

0_0402_ 5%~D

1 2

3

PR300

1 2

2.2_0603 _5%~D

PC301

0.22U_06 03_10V7K

1 2

5

123

321

SIR818DP-T1_POWERPAK-SO8-5~D

4

5

4

12

PC313

0.1U_040 2_16V7K~D

@

+5VALW

PR303

5.1_0603 _5%~D

1 2

PC310

1U_0603 _10V6K~D

+1.5V_PWROK(38)

PQ300

SIR472DP-T1-GE3_POWERPAK8-5~D

PQ301

PR301

6.2K_040 2_1%~D

1 2

1U_0603 _10V6K~D

CPU1.5V_S3_GATE(8,12 ,38)

BOOT_1.5 V

DH_1.5V

SW_ 1.5V

DL_1.5V

PC307

VDD_1.5V

SUSP#(34,38,55,56)

CS_1.5V

+5VALW

1.5V_B+

S5_1.5V

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR305

1M_0402 _1%~D

1 2

@

PR308

0_0402_ 5%~D

1 2

PR309

0_0402_ 5%~D

16

RT8207M ZQW_W QFN20_3X3

10

18

17

PHASE

PGOOD

BOOT

UGATE

S5

TON

8

9

S3_1.5V

VLDOIN_1.5 V

20

19

VTT

VLDOIN

VTTGND

VTTSNS

VTTREF

FB

S3

6

7

PU300

PAD

GND

VDDQ

2

PJP300

PAD-OPEN 1x1m

21

1

2

3

4

5

1.5V_FB

12

PC314

220P_04 02_50V7K~D

1 2

PR304

10.2K_04 02_1%

PR307

10K_040 2_1%~D

1 2

+1.5V

VTTREF_ 1.5V

+1.5V

12

0.75Volt +/- 5% TDC 0.7A Peak Current 1A OCP Current 1.2A

1

PC306

PC305

10U_0603_6.3V6M

12

@

2

10U_0603_6.3V6M

PC312

0.1U_040 2_16V7K~D

+1.5V

1

PC309

0.033U_0 402_16V7~D

+0.75VSP

B B

@

PJP305

+0.75VSP

1 2

PAD-OPEN 3x3m

+0.75VS

1.5VP TDC 14 A Peak Current 20 A OCP current 24A TYP MAX H/S Rds(on) :10mohm , 14.5mohm L/S Rds(on) :3mohm , 3.6mohm

A A

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet o f

Compal Electronics, Inc.

PWR-1.5VP/0.75VSP

LA-7851P

57 63Monday, March 26 , 2012

1

0.1

5

4

3

2

1

VID [0] VID[1] VCCSA Vout

The 1k PD on the VCCSA VIDs are empty. These should be stuffed to ensure that VCCSA VID is 00 prior to VCCIO stability.

PR600

1K_0402_5%~D

D D

SA_PGOOD(38)

+5VALW

PR603

10_0402_1%~D

PC616

12

3300P_0402_50V7K

10_0402_1%~D

19

PGND

20

PGND

21

PGND

22

VIN

23

VIN

24

VIN

12

PC617

PC601

2.2U_0603_10V7K

1 2

C C

12

1 2

PC612

PC613

PAD-OPEN 43X118

+3VALW

B B

PAD-OPEN 43X118

+VCCSA_PWR_SRC +VCCSA_PWR_SRC

12

PJP600

PC613

0.1U_0402_25V6K~D

2200P_0402_50V7K~D

12

PC615

PC614

4.7U_0805_25V6-K

0.22U_0402_10V6K

100K_0402_5%

@

12

18

V5DRV

GND

1

PR609

5.1K_0402_5%

PR601

1 2

17

2

+3VS

12

PC600

1U_0603_10V6K

16

V5FILT

PGOOD

COMP

VREF

3

12

PC618

0.01U_0402_25V7K

1K_0402_5%~D

12

H_VCCSA_VID1 (12)

12

+VCCSA_PHASE

PR607

@ PR607

@

33K_0402_5%

H_VCCSA_VID0 (12)

PR604

0_0402_5%~D

1 2

PR605

2.2_0603_5%~D

+VCCSA_BT_1+VCCSA_BT

1 2

1

2 12

12

PC602

0.1U_0603_50V7K~D

PC603

@

1000P_0402_50V7K~D

PR606

@PR606

@

4.7_1206_5%

+V1.05S_VCCP_PWRGOOD (56)

12

PL600

0.47UH_17.7A

1 2

PC604

PC605

1 2

@

22U_0805_6.3V6M

PR602

PR602 1K_0402_5%~D

1K_0402_5%~D

+VCCSA_EN

PU600

13

14

15

VID1

SLEW

4

1 2

EN

VID0

VOUT

MODE

5

6

TPS51461RGER_QFN24_4X4~D

12

BST

11

SW

10

SW

9

SW

8

SW

7

SW

25

TP

0 0 0.9V 0 1 0.8V 1 0 0.725V 1 1 0.675V

output voltage adjustable network

+VCC_SAP TDC 4.2A Peak Current 6 A OCP current 7.2 A

1 2

100_0402_1%~D

PC606

0.1U_0402_10V7K~D

PR608

1

PC607

2

PR610

0_0402_5%~D

SHORT

1 2

22U_0805_6.3V6M

12

PC609

PC610

PC608

1 2

22U_0805_6.3V6M

PC610

PC611

1 2

22U_0805_6.3V6M

2200P_0402_50V7K~D

+VCCSA_SENSE (12)

22U_0805_6.3V6M

+VCCSA

1 2

A A

Compal Electronics, Inc.

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

5

4

3

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR-VCC_SAP

LA-7851P

1

58 63Monday, March 26, 2012

0.1

5

PR701

12

3.83K_0402_1%~D

VSUMG+

D D

C C

B B

A A

PR706

2.61K_0402_1%~D

1 2

PH701

PH701 10KB_0402_5%_ERTJ0ER103J~D

10KB_0402_5%_ERTJ0ER103J~D

1 2

VSUMG-

1

PC714

2

0.1U_0402_16V7K

VR_SVID_DAT(11)

VR_SVID_ALRT#(11)

VR_SVID_CLK(11)

VAXG_core TDC 21.5A Peak Current 33A OCP current 40A Load line -3.9mV/A FSW=300kHz DCR 0.82mohm +/- 5% TYP MAX H/S Rds(on) :12.2mohm , 15mohm L/S Rds(on) :2.7mohm , 3.3mohm

PH700

470K_0402_5%_ERTJ0EV474J~D

1 2

PR704

27.4K_0402_1%~D

+VCCP

12

PR717

130_0402_1%~D

VR_HOT#(38)

@PR725

@

1 2

+VCCP

499_0402_1%~D

5

12

PR725

PR726

1 2

3.83K_0402_1%~D

NTCG

1 2

12

PR709

11K_0402_1%~D

PR719

54.9_0402_1%~D

12

43P_0603_50V8

Local sense put on HW site

VCC_AXG_SENSE(12)

VSS_AXG_SENSE(12)

1

PC711

PC710

2

@

0.22U_0402_10V6K

0.1U_0402_16V7K

0_0402_5%~D

+5VS

VSUM+

VSUM-

1 2

VR_ON(38)

PC717

1 2

PH702

470K_0402_5%_ERTJ0EV474J~D

12

PR727

27.4K_0402_1%~D

PR741

2.61K_0402_1%~D

PC745

PR720

SHORT

12

PH703

10KB_0402_5%_ERTJ0ER103J~D

.1U_0402_16V7K~D

1 2

PR723

1 2

0_0402_5%~D

+5VS

12

PR744

11K_0402_1%~D

PR707 100_0402_1%~D

100_0402_1%~D

PR712

357_0402_1%

VSUM-

12

@PC702

@

330P_0402_50V7K~D

0.01U_0402_16V7K~D

@PR707

@

12

ISEN2G NTCG

NTC

COMP

PC731

PC732

12

PC741

PC742

0.1U_0402_25V6K~D

4

PC702

1 2

PC706

12

PC712

470P_0402_50V7K~D

1 2

@

1 2 3 4 5 6 7 8 9

10

41

PC726

22P_0402_50V8J

12

@

PR736

0_0402_5%~D

1 2

12

0.22U_0402_6.3V6K~D

12

0.22U_0402_6.3V6K~D

1

2

0.22U_0402_10V6K

PR750

@PR750

@

1 2

649_0402_1%~D

4

@

12

PC707

39

40

RTNG

ISUMNG

ISUMPG ISEN1G ISEN2G NTCG SCLK ALERT# SDA VR_HOT# VR_ON NTC

TP

ISEN212FB17ISUMP14ISEN3/FB2

11

ISEN3

ISEN2

PC743

0.047U_0402_16V7K

12

PR748

340_0402_1%

@

PC746

1 2

2200P_0402_25V7K~D

2.55K_0402_1%

499_0402_1%~D

330P_0402_50V7K~D

37

38

36

FBG

COMPG

15

13

ISEN1

PR702

PR705

LGATE1G

35

34

PWM2G

PGOODG

LGATE1G

ISUMN

RTN16ISEN1

1 2

12

390P_0402_50V7K~D

PWMG2

PHASE1G

UGATE1G

BOOT1G

33

32

31

BOOT1G

PHASE1G

UGATE1G

BOOT2 UGATE2 PHASE2 LGATE2

VCCP

VDD

PWM3 LGATE1 PHASE1 UGATE1

COMP

PGOOD

BOOT1

ISL95836HRTZ-T_TQFN40_5X5~D

18

19

20

BOOT1

PR728

1 2

1.91K_0402_1%~D

COMP

FB

PR733

499_0402_1%~D

PR737

2K_0402_1%

PC737

330P_0402_50V7K~D

1 2

@

PC738

0.01U_0402_16V7K~D

1 2

PC739

330P_0402_50V7K~D

2K_0402_1%

267K_0402_1%~D

PC703

12

1 2

150K_0402_1%~D

PR716

12

0_0402_5%~D

SHORT

30 29 28 27 26 25 24 23 22 21

PU700

PC728

470P_0402_50V7K~D

12

@PC737

@

330P_0402_50V7K~D

PR703

PR708

BOOT2 UGATE2 PHASE2 LGATE2

PWM3 LGATE1 PHASE1 UGATE1

12

PC700

PR700

1 2

Local sense put on HW site

3

PC701

12

+5VS

VGATE (6,18,38)

+3VS

267K_0402_1%~D

PR740

1 2

2K_0402_1%

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT D ELL'S EXPRESS W RITTEN CONSENT.

3

12

150P_0402_50V8J~D

PC708

12

39P_0402_50V7K~D

UGATE1G

PHASE1G

2.2_0603_5%~D

BOOT1G

LGATE1G

12

PC729

47P_0402_50V7K~D

12

PR738

12

PC730

150P_0402_50V8J~D

PC733

1 2

680P_0402_50V7K~D

VCCSENSE (11)

VSSSENSE (11)

PR710

PR721

0_0402_5%~D

SHORT

PC718

1U_0603_10V6K~D

12

0.22U_0603_10V7K

12

PR722

0_0603_5%~D

1 2

SHORT

PR751

1_0603_5%

@ PR724

@

12

PC719

1U_0603_10V6K~D

UGATE2

PHASE2

BOOT2

2.2_0603_5%~D

LGATE2

1 2

PR734

21K_0402_1%~D

UGATE1

PHASE1

BOOT1

PR742

2.2_0603_5%~D

LGATE1

PC713

12

PR724 1_0603_5%

1_0603_5%

0.22U_0603_10V7K

PR729

PC740

0.22U_0603_10V7K

12

4

5

4

+5VS

+5VALW

CSD87351Q5D_SON8~D

PC725

12

PQ706

CSD87351Q5D_SON8~D

12

PQ703

2

3

4

321

GFX_B+

5

SIR818DP-T1_POWERPAK-SO8-5~D

2

3

4

2

12

PC747

PC748

PC704

@

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50V7K

2200P_0402_50V7K

PQ700

SIR472DP-T1-GE3_POWERPAK8-5~D

123

5

PQ701

4

1

8

CPU_B+

2

PQ702

321

SIR818DP-T1_POWERPAK-SO8-5~D

PC752

@

0.1U_0402_25V6

1

7 6 5

8

12

PC750

@

0.1U_0402_25V6

7 6 5

1

@

PL700

HCB4532KF-800T90_1812

1 2

PJP700

@ PJP700

@

12

PC705

PC709

4.7U_0805_25V6-K

12

PR711

4.7_1206_5%~D

12

PC715

680P_0402_50V7K~D

12

PC720

PC751

@

4.7U_0805_25V6-K

2200P_0402_50V7K

12

4.7_1206_5%~D

12

PC734

PC749

@

4.7U_0805_25V6-K

2200P_0402_50V7K

12

PR743

4.7_1206_5%~D

12

PC744

2

12

4.7U_0805_25V6-K

0.36UH_PDME104T -R36MS0R825_37A _20%~D

1 2

VCC_core TDC 33A Peak Current 53A OCP current 71A Load line -1.9mV/A FSW=300kHz DCR 0.82mohm +/-5% TYP MAX H/S Rds(on) :5.9mohm , 7.2mohm L/S Rds(on) :2.2mohm , 2.5mohm

12

PC721

4.7U_0805_25V6-K

PR730

ISEN2

PC727

VSUM+

680P_0402_50V7K~D

12

PC736

PC735

4.7U_0805_25V6-K

112

JUMP_43X118

PL701

0.36UH_37A

4

3

PR714

3.65K_0603_1%~D

CPU_B+

1

12

10K_0603_1%~D

+

PC722

PC723

2

@

4.7U_0805_25V6-K

0.36UH_PDME104T -R36MS0R825_37A _20%~D

PR731

1 2

PR735

1 2

3.65K_0603_1%~D

VSUM-

12

0.36UH_PDME104T -R36MS0R825_37A _20%~D

PR745

ISEN1

10K_0603_1%~D

VSUM+

680P_0402_50V7K~D

VSUM-

Title

Size Document Number Rev

Date: Sheet of

V1P_VCORE

1 2

PR747

1 2

3.65K_0603_1%~D

Compal Electronics, Inc.

PWR-CPU_CORE

LA-7851P

1

2

1

+

PC724

100U_25V_M

2

@

0.36UH_37A

4

3

V2P_VCORE

PR739

12

1_0402_5%~D

PL704

0.36UH_37A

4

3

PR749

12

1_0402_5%~D

B+

12

1_0402_5%~D

1_0402_5%~D PR715

PR715

@

PL702

HCB4532KF-800T90_1812

1 2

PJP701

@ PJP701

@

2

112

JUMP_43X118

100U_25V_M

PL703

1

2

1

2

V1N_VCORE

10K_0402_1%~D

59 63Monday, March 26, 2012

1

+VCC_GFXCORE_AXG

VSUMG-VSUMG+

+VCC_CORE

PR732

V2N_VCORE

ISEN1

12

10K_0402_1%~D

+VCC_CORE

PR746

ISEN2

12

B+

0.1

8

PR818

2.2K_0402_5%

1 2

1.91K_0402_1%~D

1 2

12

@

1.91K_0402_1%~D

1.91K_0402_1%~D PR825

PR825

PR827

2.2K_0402_5%

1 2

PR828

12

22P_0402_50V8J~D

PC811

1 2

390P_0402_50V7K~D

ISEN2_VGA

ISEN1_VGA

@

PR844

100_0402_5%~D

1 2

PR848

0_0402_5%~D

SHORT

PR855

0_0402_5%~D

SHORT

1 2

@

PR856

100_0402_5%~D

1 2

+3VS_DELAY

@

PR819

1 2

PC808

PC814

0.22U_0402_10V6K~D

1000P_0402_50V7K~D

H H

DGPU_PWR_EN(19,33)

G G

F F

E E

D D

C C

B B

H_DPRSLPVR(24)

DGPU_PWROK(19,20,37)

GPU_VR_HOT#(24,38)

@

PR833

4.02K_0402_1%~D

1 2

470K_0402_5%_ERTJ0EV474J~D

PR836

PR835

8.06K_0402_1%

@ PR835

@

1 2

249K_0402_1%

22P_0402_50V8J~D

PC813

1 2

150P_0402_50V8J~D

+3VS

12

PC812

1 2

GPU_VDD_SENSE(25)

GPU_VSS_SENSE(25)

+3VS

@ PR831

@

1000P_0402_50V7K~D

PC809

1 2

412K_0402_1%

+GPU_CORE

PR826

0_0402_5%~D

1 2

+3VS

@ PR829

@

2.2K_0402_5%

1 2

PR831

27.4K_0402_1%

@ PH800

@

1

2

PR840

47K_0402_1%~D

PR829

12

PH800

PR837

562_0402_1%

1 2

PR839

3.57K_0402_1%

1 2

12

@

PR842

54.9K_0402_1%

@

PR809

PR809 10K_0402_1%~D

10K_0402_1%~D

1 2

PR806

1K_0402_1%~D

1 2

0.1U_0402_16V7K

H_DPRSLPVR

PSI#

1

PC815

2

0.22U_0402_10V6K~D

PC822

330P_0402_50V7K~D

PC828

7

PC803

CLK_ENABLE#

PU800

1

PGOOD

2

PSI#

3

RBIAS

4

VR_TT#

5

NTC

6

VW

7

COMP

8

FB

9

ISEN3

10

ISEN2

41

AGND

VSUM-_VGA

12

1

2

38

39

40

VR_ON

CLK_EN#

DPRSLPVR

ISEN111VSEN12RTN13ISUM-14ISUM+15VDD

1 2

GPU_VID_6

GPU_VID_5

37

12

SHORT

0_0402_5%~D

0_0402_5%~D PR810

PR810

GPU_VID_3

GPU_VID_4

35

VID4

17

16

12

PR845

82.5_0402_1%~D

PC823

@

1.65K_0402_1%~D

GPU_VID_0

GPU_VID_1

GPU_VID_2

GPU_VID_3

GPU_VID_4

GPU_VID_5

H_DPRSLPVR

PSI#

GPU_VID_1

GPU_VID_0

GPU_VID_2

VID031VID132VID233VID334VID536VID6

30

BOOT2

29

UGATE2

28

PHASE2

27

VSSP2

26

LGATE2

25

VCCP

24

PWM3

23

LGATE1

22

VSSP1

21

PHASE1

VIN

IMON18BOOT119UGATE1

ISL62883CHRTZ-T_TQFN40_5X5

20

0_0402_5%~D

1 2

PR841

0_0402_5%~D

1 2

PR843

12

1_0402_5%~D

PC817

PC816

1U_0603_10V6K

0.22U_0603_25V7K

@

PC824

0.01U_0402_25V7K

0.1U_0402_16V7K

PR857

1 2

6

GS/0.9V GV/0.875V

PR800 2.2K_0402_5%~D@ PR800 2.2K_0402_5%~D@

1 2

PR801 2.2K_0402_5%~DPR801 2.2K_0402_5%~D

1 2

PR802 2.2K_0402_5%~DGV@ PR802 2.2K_0402_5%~DGV@

1 2

PR805 2.2K_0402_5%~DGS@ PR805 2.2K_0402_5%~DGS@

1 2

PR804 2.2K_0402_5%~D@ PR804 2.2K_0402_5%~D@

1 2

PR803 2.2K_0402_5%~DPR803 2.2K_0402_5%~D

1 2

PR807 2.2K_0402_5%~D@ PR807 2.2K_0402_5%~D@

1 2

PR808 2.2K_0402_5%~DPR808 2.2K_0402_5%~D

1 2

PR811 2.2K_0402_5%~DPR811 2.2K_0402_5%~D

1 2

PR812 2.2K_0402_5%~D@ PR812 2.2K_0402_5%~D@

1 2

PR814 2.2K_0402_5%~DPR814 2.2K_0402_5%~D

1 2

PR813 2.2K_0402_5%~D@ PR813 2.2K_0402_5%~D@

1 2

PR815 2.2K_0402_5%~D@ PR815 2.2K_0402_5%~D@

1 2

PR817 2.2K_0402_5%~D@ PR817 2.2K_0402_5%~D@

1 2

GPU_VID_5 (24)

GPU_VID_4 (24)

GPU_VID_3 (24)

GPU_VID_2 (24)

GPU_VID_1 (24)

GPU_VID_0 (24)

PC807

PC807 1U_0603_10V6K

1U_0603_10V6K

1 2

PR834

0_0402_5%~D

SHORT

12

PC810

PC810 1U_0603_10V6K

1U_0603_10V6K

PR838

SHORT

+VGA_B+

+5VS

1

PC825

2

0.1U_0402_16V7K

PR853

1

PC830

0.1U_0402_16V7K

2

+5VS

VSUM+_VGA

12

PR846

2.61K_0402_1%

12

PH801

PH801 10K_0402_1%_TSM0A103F34D1RZ

10K_0402_1%_TSM0A103F34D1RZ

11K_0402_1%~D

Layout Note: Place near Phase1 Choke

5

+3VS_DELAY

2.2_0603_5%~D

BOOT2_VGA BOOT2_2_VGA

1 2

PR832

0_0402_5%~D

SHORT

VSUM-_VGA

2.2_0603_5%~D

+5VS

BOOT1_VGA

PR816

1 2

UGATE1_VGA

PHASE1_VGA

LGATE1_VGA

PR847

2.2_0603_5%~D

1 2

UGATE2_VGA

BOOT1_1_VGA

PC804

0.22U_0603_10V7K

1 2

LGATE2_VGA

0.22U_0603_10V7K

1 2

4

5

4

PQ800

SIR472DP-T1-GE3_POWERPAK8-5~D

123

5

PQ802

321

SIR818DP-T1_POWERPAK-SO8-5~D

5

4

PQ803

123

SIR472DP-T1-GE3_POWERPAK8-5~D

5

PQ804

4

PQ804

321

SIR818DP-T1_POWERPAK-SO8-5~D

PC821

4

3

+VGA_B+

12

PC832

PC800

PC831

@

0.1U_0402_25V6

PHASE2_VGA

5

4

321

SIR818DP-T1_POWERPAK-SO8-5~D

5

4

321

12

PR820

PQ801

PQ805

SIR818DP-T1_POWERPAK-SO8-5~D

4.7_1206_5%

12

PC806

680P_0603_50V7K

12

PC834

PC833

@

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50V7K

2200P_0402_50V7K

PR851

PC829

PC800

@

2200P_0402_50V7K

PR821

1 2

3.65K_0603_1%~D

VSUM+_VGA

N13P-GS TDC 50A Peak Current 6 0A OCP current 85A FSW=400kHz DCR 0.97mohm +/ - 5%

T YP MAX H/S Rds(on) :12 .2mohm , 15mohm L/S Rds(on) :2. 7mohm , 3.3mohm

12

PC818

4.7U_0805_25V6-K

12

PR849

4.7_1206_5%

3.65K_0603_1%~D

12

680P_0603_50V7K

2

12

PC802

PC801

4.7U_0805_25V6-K

PL800

0.22UH_FDUE0640-H-R22M=P3_25A_20%~D

PR822

PR822 10K_0603_1%~D

10K_0603_1%~D

@

1 2

ISEN2_VGA

PC819

1 2

VSUM+_VGA

@

PR824

10K_0402_1%~D

1 2

+VGA_B+

1

PC820

2

10U_0805_25V6K~D

PL801

0.22UH_FDUE0640-H-R22M=P3_25A_20%~D

V1P_VGA V1N_VGA

PR850

PR850 10K_0603_1%~D

10K_0603_1%~D

@

1 2

PR854

10K_0402_1%~D

1 2

ISEN1_VGA

@

PL802

HCB4532KF-800T90_1812

1 2

PJP800

@ PJP800

@

2

112

JUMP_43X118

12

V2N_VGAV2P_VGA

V1N_VGA

12

PR852

1_0402_5%~D

V2N_VGA

12

PR823

PR823 1_0402_5%~D

1_0402_5%~D

VSUM-_VGA

1

B+

+GPU_CORE

1

+

PC805

2

330U_D2_2V_Y

+GPU_CORE

12

1

+

PC827

PC826

2

330U_D2_2V_Y

A A

8

7

6

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

Title

Size Document Number Rev

Date: Sheet of

2

Compal Electronics, Inc.

PWR-VGA_CORE

LA-7851P

60 63Monday, March 26, 2012

1

0.1

5

+VCC_CORE

12

PC1219

PC1219 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

D D

C C

B B

12

+VCC_CORE

@

PC1228

PC1228 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

@

PC1236

PC1236 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

@

PC1259

PC1259 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

PC1280

PC1280 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

@

PC1298

PC1298 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1

PC1315

PC1315 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

PC1322

PC1322 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

12

PC1220

PC1220 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1229

PC1229 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1237

PC1237 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

@

PC1260

PC1260 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

@

PC1282

PC1282 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1299

PC1299 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1

PC1316

PC1316 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

PC1323

PC1323 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

12

@

PC1221

PC1221 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

@

PC1230

PC1230 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1238

PC1238 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1261

PC1261 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1283

PC1283 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

@

PC1302

PC1302 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1

PC1317

PC1317 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

PC1324

PC1324 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

12

@

PC1222

PC1222 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

@

PC1231

PC1231 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

@

PC1239

PC1239 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1262

PC1262 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1286

PC1286 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1293

PC1293 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1

PC1318

PC1318 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

PC1325

PC1325 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

4

3

+VCC_CORE +VCC_GFXCORE_AXG

12

PC1223

PC1223 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1232

PC1232 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1240

PC1240 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1263

PC1263 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

@

PC1284

PC1284 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1295

PC1295 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

1

PC1319

PC1319 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

PC1326

PC1326 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

12

PC1233

PC1233 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

@

PC1241

PC1241 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1264

PC1264 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

@

PC1277

PC1277 1U_0402 _6.3V6K~D

1U_0402 _6.3V6K~D

12

PC1296

1U_0402 _6.3V6K~D

Design guilde: iGfx_Cout

1.22uF*6 (SE000000I10)

2.10uF*8 (SE000005T8L)

3.1uF*9 (SE000000K8L)

4.470uF 4.5m *2 (SGA00004200)

+VCC_GFXCORE_AXG

1

2

PC1225

PC1224

22U_0805_6.3V6M~D

12

PC1253

PC1254

10U_0603_6.3V6M~D

12

PC1281

12

PC1300

1

+

PC1313

2

12

PC1276

1U_0402_6.3V6K~D

12

PC1292

1U_0402_6.3V6K~D

1

+

PC1314

2

470U_D2_2VM_R4.5M

2

1

+VCCP

Design guilde: +1.05V_RUN_VTT

1.1uF*26 (SE000000K8L)

2.10uF*10 (SE000005T8L)

3.330uF 6m *2 (SGA00001Q80)

+VCCP

1

2

PC1226

PC1227

22U_0805_6.3V6M~D

12

PC1256

PC1255

10U_0603_6.3V6M~D

12

PC1278

PC1287

1U_0402_6.3V6K~D

12

PC1294

PC1301

1U_0402_6.3V6K~D

1

2

PC1235

PC1234

22U_0805_6.3V6M~D

12

10U_0603_6.3V6M~D

12

1U_0402_6.3V6K~D

12

1U_0402_6.3V6K~D

22U_0805_6.3V6M~D

12

PC1258

PC1257

10U_0603_6.3V6M~D

12

PC1279

PC1285

1U_0402_6.3V6K~D

PC1297

1U_0402_6.3V6K~D

12

PC1244

PC1242

1U_0402_6.3V6K~D

PC1265

1U_0402_6.3V6K~D

PC1244

PC1243

1U_0402_6.3V6K~D

12

PC1267

PC1266

1U_0402_6.3V6K~D

12

PC1303

PC1304

10U_0603_6.3V6M~D

12

PC1245

1U_0402_6.3V6K~D

12

PC1268

1U_0402_6.3V6K~D

12

PC1305

10U_0603_6.3V6M~D

12

PC1246

PC1247

1U_0402_6.3V6K~D

12

PC1269

PC1270

1U_0402_6.3V6K~D

@

12

PC1306

PC1307

10U_0603_6.3V6M~D

12

PC1249

PC1248

1U_0402_6.3V6K~D

12

PC1271

PC1272

1U_0402_6.3V6K~D

12

PC1288

@

12

PC1308

PC1309

10U_0603_6.3V6M~D

12

PC1250

1U_0402_6.3V6K~D

12

PC1273

1U_0402_6.3V6K~D

12

PC1289

1U_0402_6.3V6K~D

12

PC1310

10U_0603_6.3V6M~D

12

PC1251

PC1252

1U_0402_6.3V6K~D

12

1U_0402_6.3V6K~D

12

1U_0402_6.3V6K~D

12

10U_0603_6.3V6M~D

1U_0402_6.3V6K~D

12

PC1275

PC1274

1U_0402_6.3V6K~D

12

PC1290

PC1291

1U_0402_6.3V6K~D

12

PC1312

PC1311

10U_0603_6.3V6M~D

1

+

PC1320

PC1321

2

330U_X_2VM_R6M

1

PC1327

PC1327 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

PC1336

PC1336 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

A A

1

PC1341

PC1341 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

5

1

PC1328

PC1328 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

PC1337

PC1337 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

PC1342

PC1342 10U_080 5_10V6K

10U_080 5_10V6K

2

1

PC1329

PC1329 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

@

PC1338

PC1338 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

PC1343

PC1343 10U_080 5_10V6K

10U_080 5_10V6K

2

1

PC1330

PC1330 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

PC1339

PC1339 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

PC1344

PC1344 10U_080 5_10V6K

10U_080 5_10V6K

2

1

PC1331

PC1331 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

PC1340

PC1340 22U_080 5_6.3VAM

22U_080 5_6.3VAM

2

1

PC1345

PC1345 10U_080 5_10V6K

10U_080 5_10V6K

2

4

+VCC_CORE

1

+

2

+VCC_CORE

1

+

PC1333

PC1334

PC1332

2

330U_D2_2V_Y

PC1334

2

330U_D2_2V_Y

1

+

PC1346

PC1335

2

330U_D2_2V_Y

Design guilde: Vcore_Cout

1.1uF*20 (SE00000888L),reserve 8pcs is not stuff

2.22uF*20 (SE000008L80)

3.470uF 4.5m *4 (SGA00004X80)

4.10uF*4 (SE000004880)

Red @ is for 20% Cap reduces

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Compal Electronics, Inc.

Title

Size Docum ent Number Rev

Date: Sheet o f

Compal Electronics, Inc.

PROCESSOR DECOUPLING

LA-7851P

61 63Monday, March 26 , 2012

1

0.1

5

4

3

2

1

+GPU_CORE (place under GPU) +GPU_CORE (place near GPU)

D D

C C

4.7U_0603_6.3V6K~D

PC1176

12

1

PC1189

PC1190

2

0.1U_0402_16V7K

4.7U_0603_6.3V6K~D

PC1177

12

1

PC1191

2

0.1U_0402_16V7K

4.7U_0603_6.3V6K~D

PC1178

PC1179

12

1

2

PC1179

12

1

PC1193

PC1192

2

@

0.1U_0402_16V7K

4.7U_0603_6.3V6K~D

PC1180

12

1

PC1209

2

@

0.1U_0402_16V7K

4.7U_0603_6.3V6K~D

PC1181

PC1182

12

1

2

PC1182

12

1

PC1211

PC1210

2

@

0.1U_0402_16V7K

+GPU_CORE +GPU_CORE

4.7U_0603_6.3V6K~D

PC1184

PC1183

12

4.7U_0603_6.3V6K~D

@

1

2

@

PC1194

12

4.7U_0603_6.3V6K~D

@

PC1186

PC1185

12

4.7U_0603_6.3V6K~D

@

PC1195

12

4.7U_0603_6.3V6K~D

@

PC1196

PC1197

12

PC1197

12

47U_0805_6.3V6M~D

PC1212

12

4.7U_0603_6.3V6K~D

22U_0805_6.3V6M

@

PC1214

PC1213

12

4.7U_0603_6.3V6K~D

PC1215

12

4.7U_0603_6.3V6K~D

PC1216

PC1217

12

PC1217

12

4.7U_0603_6.3V6K~D

@

PC1218

12

Red @ is for 20% Cap reduces

Design guilde: +GPU_CORE_Cout Under GPU

1.4.7uF*10 (SE00000G30L),.reserve 5pcs is not stuff

2.0.1uF*4 (SE076104K80)),.reserve 4pcs is not stuff Near GPU

1.47uF*1 (SE000001120)

2.22uF*1 (SE00000PL0L)

3.4.7uF*5 (SE00000G30L

4.reserve D-case cap is not stuff

B B

A A

Compal Electronics, Inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

Title

Size Docum ent Number Rev

Date: Sheet o f

Compal Electronics, Inc.

GPU DECOUPLING

LA-7851P

62 63Monday, March 26 , 2012

1

0.1

5

4

3

2

1

[AC in]

B+

ACIN

+3VLP

EC_ON

D D

C C

B B

PCH Output

A A

PCH Output

+5VALW

+3VALW

PBTN_SW#

PCH_PWR_EN

Output

+3V_PCH

Output

PCH_DPWROK

PCH_RSMRST#

Output

SUSCLKPCH Output

AC_PRESENT

Output

PBTN_OUT#

Output

PM_SLP_S5#

Input

PM_SLP_S4#

Input

WLAN_EN

Output

+3VS_WLAN

SYSON

Output

+1.5V

+1.5V_PWROK

PM_SLP_S3#Input

SUSP#

Output

+5VS

+3VS

+1.5VS

+1.8VS

+1.8V_PWROK

+VCCP

+V1.05S_VCCP_PWRGOOD

+VCCSA

SA_PGOOD

CPU1.5V_S3_GATEOutput

+1.5V_CPU_VDDQ

+0.75VSP

HWPG

Input

Output

VR_ON

PCH_PWROK

Output

PM_DRAM_PWRGD

H_CPUPWRGD

SVID

+VCC_CORE

VGATE

Input

SYS_PWROK

PCH_PLTRST#

Ta

Tb

Tc

Td

Te

Tf+VSBP

T1

T2

10ms < T3 (DPWROK assert at least 10 ms after VccDSW power are valid)

10ms < T4 (RSMRST# de-assert at least 10 ms after VccSUS power are valid)

T5

5

T6 < 90ms

16ms < T7 < 4s

30us < T8

1ns < Tg < 4s

Minimum duration of PWRBTN # assertion = 16mS after SUSCLK stable

T9

T10

T11

T12

T13

30us < T14

T15

[Battery only, AC absent]

B+

ACIN Ta

PBTN_SW#

EC_ON

+5VALW

+3VALW

+VSBP

T16

T17

T18

T19

4

1ns < Tg < 4s

Tc+3VLP

Td

Te

Tf

Tg

T20

T21

T22

T23

T24

T25

T26

T27

T28

T29

T30

99ms < T31

T32

T33

5ms > T34

T35

T36

3

EC pay attention timing

T37

T38

Discrete Power On Sequence

[AC in]

Ta

ACIN

Tb

+3VLP

Tc

EC_ON +5VALW

Td

EC_ON

Te

EC_ON

Tf

PBTN_SW#

Tg

ITEM Measure Point

PBTN_SW#

T1

PCH_PWR_EN

T2

+3V_PCH

T3

+3V_PCH

T4

PCH_RSMRST# SUSCLK

T5

PCH_RSMRST# AC_PRESENT

T6 T7

PM_SLP_S5# PM_SLP_S4#

T8 T9

WLAN_EN +3VS_W LAN

T10

PM_SLP_S4# SYSON

T11 T12 T13

PM_SLP_S4# PM_SLP_S3#

T14

PM_SLP_S3# SUSP#

T15

SUSP# +5VS

T16

SUSP#

T17

SUSP#

T18

SUSP# +1.8VS

T19

+1.8VS +1.8V_PW ROK

T20

SUSP# +VCCP

T21

+VCCP

T22

+V1.05S_VCCP_PWRGOOD

T23

+VCCSA SA_PGOOD

T24

SA_PGOOD VR_ON

T25

CPU1.5V_S3_GATE VR_ON

T26

CPU1.5V_S3_GATE +1.5V_CPU_VDDQ

T27 T28

+0.75VSP HWPG

T29

HWPG VR_ON

T30

HWPG PCH_PW ROK

T31 T32 T33

VR_ON SVID

T34

H_CPUPWRGD +VCC_CORE

T35 T36 T37

SYS_PWROK PCH_PLTRST #

T38

SUSP# DG PU_PWREN

T39

DGPU_PWREN

T40

DGPU_PWREN

T41

DGPU_PWREN

T42

DGPU_PWREN

T43

ACINB+

To

+3VLP

To

EC_ON

To To

+3VALW

To

+VSBP

To

Low pluse width

PCH_PWR_EN

To

+3V_PCH

To

PCH_DPWROK

To

PCH_RSMRST#

To To To

Low pluse widthPBTN_OUT#

To To

WLAN_ENPM_SLP_S5#

To To To

+1.5VSYSON

To

+1.5V_PWROK+1.5V

To To To To

+3VS

To

+1.5VS

To To To To

+V1.05S_VCCP_PWRGOOD

To

+VCCSA

To To To To To

+0.75VSPCPU1.5V_S3_GATE

To To To To

PM_DRAM_PWRGDPCH_PWROK

To

H_CPUPWRGDPM_DRAM_PWRGD

To To To

VGATE+VCC_CORE

To

SYS_PWROKVGATE

To To To

+3VS_DELAY

To

+GPU_CORE

To

+1.5VSDGPU

To

+1.05VSDGPU

To

GPU power on sequence

SUSP#

DGPU_PWREN

+3VS_DELAY

+GPU_CORE

+1.5VSDGPU

+1.05VSDGPU

T39

RC Delay

T40

T41

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

RC Delay

T42

Issued Date

TimeMeasure PointITEM

N/A

Time

RC Delay

T43

2011/08/25 2012/07/25

2

[Battery only, AC absent]

Measure PointITEM Time

B+ ACIN

Ta Tb

PBTN_SW# +3VLP

Tc

+3VLP

Td

EC_ON +5VALW

Te

EC_ON

Tf Tg

Compal Secret Data

Deciphered Date

To

EC_ON

To To

+3VALW

To

+VSBPEC_ON

To

N/ALow pluse widthPBTN_SW #

Compal Electronics, Inc.

Title

Power Sequence

Size Document Number Rev

Date: Sheet of

1

63 63Monday, March 26, 2012

0.1

5

D D

C C

4

3

2

1

B B

A A

X02

Compal Electronics, Inc.

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR-PIR

LA-7851P

64 64Monday, March 26, 2012

1

0.1

5

D D

C C

4

3

2

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/08/29 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

1

65 65Monday, March 26, 2012

0.1

5

D D

C C

4

3

2

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/08/29 2012/07/25

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

1

66 66Monday, March 26, 2012

0.1

Compal LA-7852P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual