A
COMPAL CONFIDENTIAL
B
C
D
E
1 1
PCB NO :
BOM P/N :
MODEL NAME :
GPIO P/N:
2 2
E4 VC GPIO map rev 1.1
QALA0
LA-7761P (DAZ0LH00100)
4319EI31L01,4319EI31L02,4319EI31L03,4319EI31L04.
Dalmore 15 UMA
Ivy Bridge + Panther POINT
2012-02-22
REV : 1.0 (A00)
@ : Nopop Component
3 3
CONN@ : Connector Component
MB Type
TPM
DTP 2@3@3@
4 4
MB PCB
MB PCB
Part Number Description
Part Number Description
DA60000OS00
DA60000OS00
A
PCB 0LH LA-7761P REV0 M/B UMA
PCB 0LH LA-7761P REV0 M/B UMA
B
BOM P/N
4319EI31L01(R3)
4319EI31L03(R1)
1@
4319EI31L02(R3)
4319EI31L04(R1)
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Cover Sheet
Cover Sheet
Cover Sheet
LA-7761P
LA-7761P
LA-7761P
1 59Wednesday, February 22, 2012
1 59Wednesday, February 22, 2012
1 59Wednesday, February 22, 2012
E
1.0
1.0
1.0
A
B
C
D
E
Block Diagram
Memory BUS (DDR3)
Ivy Bridge
1 1
On IO board
CRT CONN
DOCKING PORT
pg38
2 2
EXPRESS
DAI
USB2.0 [3,6]
SATA5
DOCK LAN
USB3.0 [4]
1/2 Mini Card
Card
3 3
USB10
CPU XDP Port
PCH XDP Port
VGA
VGA
HDMI CONN
PCIE5
PP
USB8
pg7
pg14
For MB/DOCK
Video Switch
PI3V713-AZLEX
pg25
SDXC/MMC
PCIE2
1/2 Mini Card
WLAN/WiFi
Smart Card
RFID
pg23
HDMI level shifter
PS8171
LVDS CONN
pg33
PCI Express BUS
Full Mini Card
WWAN
USB5USB4
TDA8034HN
Fingerprint
CONN
pg25
pg23
Card Reader
PCIE1PCIE3
OZ600FJ0
Option
China TCM1.2
FP_USB
VGA
DPB
DPC
DPD
LVDS
pg33
100MHz
SSX44B
USH
BCM5882
USB7
USH Module
PCIE x1
pg32pg34pg34pg34pg35
LPC BUS
33MHz
WiFi ON/OFF
on SNIFFER board
DC/DC Interface
4 4
LED
pg43
pg42
A
PWM FAN
pg22
SMSC SIO
ECE5048
EMC4022
pg38
pg22
B
BC BUS
TP CONN
SMSC KBC
MEC5055
pg40
KB CONN
pg41 pg41
rPGA CPU
FDI
Lane x 8
INTEL
Panther POINT-M
BGA
SPI
S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s
W25Q64CVSSIG
64M 4K sector
W25Q32BVSSIG
32M 4K sector
Discrete TPM
AT97SC3204
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
pg6~11
DMI2
Lane x 4
pg14~21
pg14
pg14 pg27
PCIE4
pg32
1333/1600 MHz
USB
PCI Express BUS
HD Audio I/F
FFS LNG3DM
E-Module
pg28
USB2.0[13]
USB2.0[11]
USB2.0[12]
SATA[4]
USB2.0[2]
USB2.0[0]
USB2.0[1,9]
HDD
PI5USB1457A USB
Power Share
100MHz
pg27
DDRIII-DIMM X2
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
Touch Screen
BT 4.0
Camera
SATA Repeater
PS8513B
pg36
HDA Codec
MDC
RJ11
on IO board
D
pg12~13
pg24
pg41
Trough Cable
pg24
pg37
USB3.0[1]
USB3.0[2]
on IO board
92HD93
pg29
Trough LVDS Cable
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
E-SATA
USB 2.0 Port
USB 3.0 Port
USB 2.0 Port
USB3.0/2.0
pg37
pg36
DOCK LAN
INT.Speaker
pg29
Combo Jack RJ45
DAI
on IO board
To Docking side
Dig.
MIC
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
UMA Block Diagram
UMA Block Diagram
UMA Block Diagram
LA-7761P
LA-7761P
LA-7761P
E
Intel Lewisville
82579LM
pg30
LAN SWITCH
PI3L720
pg31
2 59Wednesday, February 22, 2012
2 59Wednesday, February 22, 2012
2 59Wednesday, February 22, 2012
pg30
1.0
1.0
1.0
5
4
3
2
1
POWER STATES
State
S0 (Full ON) / M0
D D
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF
S4 (Suspend to DISK) / M3 ON ON OFF
S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF HIGH
S5 (SOFT OFF) / M-OFF
Signal
SLP
S3#
HIGH
LOW HIGH HIGH
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
SLP
SLP
S5#
S4#
HIGH HIGH
LOW
LOW
SLP
A#
HIGH
HIGH
ALWAYS
PLANE
ON
M
PLANE
ON
SUS
RUN
PLANE
PLANE
ON ON ON
OFF
OFF
CLOCKS
OFF
OFF
OFF
USB 3.0 PORT#
1
2
3
4
Connetion
JUSB1 (Right side)
JUSB2 (Left side)
NA
DOCKING
PCH
USB PORT#
0
1
2
3
4
5
6
7
8
JUSB1 (Right side)
JUSB2 (Left side)
JESA1 (Right side ESATA)
DOCKING
WLAN
WWAN
DOCKING
USH->BIO
JMINI3(Flash)
DESTINATION
PM TABLE
C C
power
plane
State
S0
S3
+PWR_SRC
+PWR_SRC_S
+5V_ALW
+3.3V_ALW
+3.3V_ALW_PCH
+3.3V_RTC_LDO
ON
+3.3V_SUS
+1.5V_MEM
ON ON
ON
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+0.75V_DDR_VTT
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN
OFFON
+3.3V_M +3.3V_M
+1.05V_M
ON
ON
+1.05V_M
(M-OFF)
ON
OFF
SATA
SATA 0
SATA 1
SATA 2
SATA 3
SATA 4
SATA 5
DESTINATION
HDD
ODD/ E3 Module Bay
NA
NA
ESATA
Dock
USH
9
10 Express card
11
12
13 LCD Touch
0
1
JUSB (Left side)
Bluetooth
Camera
BIO
NA
S5 S4/AC
S5 S4/AC don't exist
B B
ON
OFF
OFFOFF
OFF
OFF
ON
need to update Power Status and PM
Table
A A
OFF
OFFOFF
UMA DP/HDMI Port
Port B
Port C
Port D
Connetion
MB HDMI Conn
Dock DP port 2
Dock DP port 1
PCI EXPRESS
Lane 1
Lane 2
Lane 3
Lane 4
Lane 5
Lane 6
Lane 7
Lane 8 None
DESTINATION
MINI CARD-1 WWAN
MINI CARD-2 WLAN
Express card
E3 Module Bay (USB3)
1/2vMINI CARD-3 PCIE
MMI
10/100/1G LOM
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Index and Config.
Index and Config.
Index and Config.
LA-7761P
LA-7761P
LA-7761P
3 59Wednesday, February 22, 2012
3 59Wednesday, February 22, 2012
3 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
4
3
2
1
EN_INVPWR
D D
ADAPTER
1.05V_0.8V_PWROK
BATTERY
+PWR_SRC
C C
3.3V_ALW
CHARGER
FDC654P
(Q21)
ISL95836
(PU700)
TP0610K-T1-E3
(PQ4)
+BL_PWR_SRC
+VCC_GFXCORE
+PWR_SRC_S
ALWON
RT8205
(PU100)
+5V_ALW
1.05V_VTTPWRGD
TPS51461
(PU600)
SIO_SLP_S3#
DMN3030L
(Q55)
+5V_RUN+VCC_SA
SIO_SLP_S3#
+5V_HDD
MODC_EN
SI3456BDVSI3456BDV
(Q30)(Q27)
+5V_MOD
+3.3V_ALW
ISL95836
(PU700)
B B
1.05V_0.8V_PWROK
+VCC_CORE
TPS51212
(PU500)
CPU_VTT_ON
+1.05V_RUN_VTT +1.05V_M
TPS51212
(PU400)
SIO_SLP_A#
CPU1.5V_S3_GATE
RT8207
(PU200)
SIO_SLP_S4#
+1.5V_MEM
SIO_SLP_S3#
SIO_SLP_S3#
AUX_EN_WOWL
SYN470DBC
(PU300)
0.75V_DDR_VTT_ON
+1.8V_RUN
SI3456
(Q38)
+3.3V_WLAN
PCH_ALW_ON
SI3456
(Q49)
+3.3V_ALW
_PCH
SIO_SLP_S4#
S13456
(Q54)
SIO_SLP_LAN#
SI3456
DMN3030L
(Q34) (Q61)
+3.3V_LAN+3.3V_SUS
SIO_SLP_S3#
+3.3V_RUN
SIO_SLP_A#
SI3456
(Q58)
+3.3V_M
MCARD_MISC_PWREN
SI3456
(Q42)
+3.3V_PCIE
_FLASH
MCARD_WWAN_PWREN
SI3456
(Q40)
+3.3V_PCIE
_WWAN
SIO_SLP_S3#
AO4304L
(QC3)
AO4304L
(Q59)
Pop option
+3.3V_M
SI4164DY
A A
(Q63)
+1.05V_RUN
5
Pop option
+1.0V_LAN
+0.75V_DDR_VTT+1.5V_RUN+1.5V_CPU_VDDQ
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Power Rail
Power Rail
Power Rail
LA-7761P
LA-7761P
LA-7761P
4 59Wednesday, February 22, 2012
4 59Wednesday, February 22, 2012
4 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
SMBUS Address [0x9a]
H14
C9
MEM_SMBCLK
MEM_SMBDATA
PCH
D D
B4
A3
B5
A4
LAN_SMBCLK
LAN_SMBDATA
2.2K
2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT
LCD_SMBCLK
LCD_SMDATA
+3.3V_ALW_PCH
C8
G12
E14M16
SML1_SMBDATA
SML1_SMBCLK
B6A5
3A
3A
1A
1A
C C
1B
1B
2.2K
2.2K
2.2K
2.2K
4
2.2K
2.2K
2.2K
2.2K
+3.3V_ALW_PCH
+3.3V_LAN
28
31
LOM
+3.3V_ALW
+3.3V_ALW
2N7002
2N7002
SMBUS Address [C8]
127
129
DOCKING
3
SMBUS Address
APR_EC: 0x48
SPR_EC: 0x70
MSLICE_EC: 0x72
USB: 0x59
AUDIO: 0x34
SLICE_BATTERY: 0x17
SLICE_CHARGER: 0x13
202
200
202
200
2
DIMMA
DIMMB
53
51
53
51
XDP1
XDP2
SMBUS Address [A0]
SMBUS Address [A4]
SMBUS Address [TBD]
SMBUS Address [TBD]
1
10K
G Sensor
WWAN
+3.3V_RUN
SMBUS Address [3B]
SMBUS Address [TBD]
10K
4
6
30
32
2.2K
4
+3.3V_ALW
100 ohm
100 ohm
+3.3V_SUS
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
10
9
7
6
M9
L9
7
8
Charger
100
100
BATTERY
CONN
SMBUS Address [0x16]
USH
SMBUS Address [0xa4]
Express card
SMBUS Address [0x12]
2
MBATT
3
SMBUS Address [TBD]
29
E3 Module Bay
30
3
SMBUS Address [0xd2]
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
SMBUS TOPOLOGY
SMBUS TOPOLOGY
SMBUS TOPOLOGY
LA-7761P
LA-7761P
LA-7761P
5 59Wednesday, February 22, 2012
5 59Wednesday, February 22, 2012
5 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
KBC
A56
1C1CB59
PBAT_SMBCLK
PBAT_SMBDAT
2.2K
2.2K
2.2K
A50
B53
A49
B52
USH_SMBCLK
USH_SMBDAT
2.2K
2.2K
CARD_SMBCLK
CARD_SMBDAT
1E
B B
1E
MEC 5055
2B
2B
2.2K
B50
A47
CHARGER_SMBCLK
CHARGER_SMBDAT
1G
1G
2.2K
2.2K
2.2K
B7
A7
BAY_SMBDAT
BAY_SMBCLK
2D
A A
2D
5
5
4
3
2
1
(1)PEG_RCOMPO (H22) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC2.
(2)PEG_ICOMPO use 12mil connect to RC2
+1.05V_RUN_VTT
12
RC2
RC2
24.9_0402_1%~D
D D
DMI_CRX_PTX_N0<16>
DMI_CRX_PTX_N1<16>
DMI_CRX_PTX_N2<16>
DMI_CRX_PTX_N3<16>
DMI_CRX_PTX_P0<16>
DMI_CRX_PTX_P1<16>
DMI_CRX_PTX_P2<16>
DMI_CRX_PTX_P3<16>
DMI_CTX_PRX_N0<16>
DMI_CTX_PRX_N1<16>
DMI_CTX_PRX_N2<16>
DMI_CTX_PRX_N3<16>
DMI_CTX_PRX_P0<16>
DMI_CTX_PRX_P1<16>
DMI_CTX_PRX_P2<16>
DMI_CTX_PRX_P3<16>
FDI_CTX_PRX_N0<16>
FDI_CTX_PRX_N1<16>
FDI_CTX_PRX_N2<16>
FDI_CTX_PRX_N3<16>
C C
B B
FDI_CTX_PRX_N4<16>
FDI_CTX_PRX_N5<16>
FDI_CTX_PRX_N6<16>
FDI_CTX_PRX_N7<16>
FDI_CTX_PRX_P0<16>
FDI_CTX_PRX_P1<16>
FDI_CTX_PRX_P2<16>
FDI_CTX_PRX_P3<16>
FDI_CTX_PRX_P4<16>
FDI_CTX_PRX_P5<16>
FDI_CTX_PRX_P6<16>
FDI_CTX_PRX_P7<16>
FDI_FSYNC0<16>
FDI_FSYNC1<16>
FDI_INT<16>
FDI_LSYNC0<16>
FDI_LSYNC1<16>
(1) EDP_COMPIO use 4mil trace to RC1
(2) EDP_ICOMPO use 12mil to RC1
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
EDP_COMP
JCPU1A
JCPU1A
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD#
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
CONN@
CONN@
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
J22
J21
H22
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
24.9_0402_1%~D
PEG_COMP
PEG Compensation
PEG_ICOMPI and RCOMPO signals should be shor ted and routed
with - max leng th = 500 mils - typical imped ance = 43 mohm s
PEG_ICOMPO sign als should be routed with - m ax length = 50 0 mils
- typical imped ance = 14.5 mo hms
JCPU1I
JCPU1I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
M34
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
H33
VSS205
H30
VSS206
H27
VSS207
H24
VSS208
H21
VSS209
H18
VSS210
H15
VSS211
H13
VSS212
H10
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
G35
VSS223
G32
VSS224
G29
VSS225
G26
VSS226
G23
VSS227
G20
VSS228
G17
VSS229
G11
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
VSS
VSS
CONN@
CONN@
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
DP Compensation
+1.05V_RUN_VTT
12
RC1
RC1
24.9_0402_1%~D
A A
eDP_COMPIO and ICOMPO signals should be shor ted near
balls and route d with typical impedance <25 mohms
5
24.9_0402_1%~D
EDP_COMP
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (1/6)
Sandy Bridge (1/6)
Sandy Bridge (1/6)
LA-7761P
LA-7761P
LA-7761P
6 59Wednesday, February 22, 2012
6 59Wednesday, February 22, 2012
6 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
Follow DG Rev0.71 SM_DRAMPWROK topology
+3.3V_ALW_PCH
CC156 0.1U_0402_25V6K~DC C156 0.1U_0402_25V6K~D
1 2
5
UC2
UC2
1
RUNPWROK<39,40>
+3.3V_ALW_PCH
D D
+1.05V_RUN_VTT
1 2
RC18 200_0402_1%~DRC18 200_0402_1%~D
PM_DRAM_PWR GD<16>
1 2
RC126 56_0402_5%~D@RC126 56_0402_5%~D@
1 2
RC128 49.9_0402_1%~D@RC128 49.9_0402_1%~D@
1 2
RC44 62_0402_5%~DRC44 62_0402_5%~D
H_THERMTRIP#
H_CATERR#
H_PROCHOT#
P
B
2
A
G
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
RUN_ON_CPU1.5VS3#<11,42>
RUNPWROK_AND PM_DRAM_PWR GD_CPU
4
O
+1.5V_CPU_VDDQ
RC64
39_0402_5%~D
39_0402_5%~D
1 2
13
D
D
QC1
QC1
2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
G
G
S
S
INTEL suggest RC64 and QC1 NO stuff by default
JCPU1B
JCPU1B
4
12
RC12
RC12
200_0402_1%~D
200_0402_1%~D
1 2
RC28 130_0402_1%~DRC28 130_0402_1%~D
@RC64
@
@
@
CONN@
CONN@
3
+3.3V_ALW_PCH
12
RC124
@RC124
@
1K_0402_5%~D
1K_0402_5%~D
SYS_PWROK_XDP
The resistor fo r HOOK2 should beplaced
such that the s tub is very sm all on CFG0 net
H_CPUPWRGD
SIO_PWRBTN#_R<14,16>
CFG0
SYS_PWROK<16,39>
DDR_XDP_WAN_ SMBDAT<12,13,14,15,27,34>
DDR_XDP_WAN_ SMBCLK<12,13,14,15,27,34>
+1.05V_RUN_VTT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
Place near JXDP1
PXDP@
PXDP@
1 2
RC5 1K_0402_5%~D
RC5 1K_0402_5%~D
1 2
RC6 0_0402_5%~D@ RC6 0_0402_5%~D@
PXDP@
PXDP@
1 2
RC7 1K_0402_5%~D
RC7 1K_0402_5%~D
1 2
RC9 0_0402_5%~D@ RC9 0_0402_5%~D@
1 2
RC125 0_0402_5%~D@RC125 0_0402_5%~D@
1 2
RC127 0_0402_5%~D@RC127 0_0402_5%~D@
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CC66
CC66
CC65
CC65
2
XDP_PREQ#
XDP_PRDY#
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
CFG10<9>
CFG11<9>
CFG10
CFG11
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
H_CPUPWRGD_XDP
CFD_PWRBTN#_X DP
SYS_PWROK_XDP
DDR_XDP_SMBDAT_R 1
DDR_XDP_SMBCLK_R 1
XDP_TCLK
+1.05V_RUN_VTT +1.05V_RUN_VTT
JXDP1
JXDP1
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A0
11
OBSDATA_A1
13
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10
33
OBSDATA_B2
35
OBSDATA_B3
37
GND12
39
PWRGOOD/HOOK0
41
HOOK1
43
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH-030-01-L-D-A
SAMTE_BSH-030-01-L-D-A
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND1
OBSFN_C0
OBSFN_C1
GND3
GND5
GND7
OBSFN_D0
OBSFN_D1
GND9
GND11
GND13
GND15
TRST#
TMS
GND17
CONN@
CONN@
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
TD0
54
56
TDI
58
60
1
CFG16
CFG17
CFG0
CFG1
CFG2
CFG3
CFG8
CFG9
CFG4
CFG5
CFG6
CFG7
CLK_XDP
CLK_XDP#
XDP_RST#_RXDP_HOOK2
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
CFG16 <9>
CFG17 <9>
CFG0 <9>
CFG1 <9>
CFG2 <9>
CFG3 <9>
CFG8 <9>
CFG9 <9>
CFG4 <9>
CFG5 <9>
CFG6 <9>
CFG7 <9>
Follow check list 0.5
C C
H_PROCHOT#<40,51,52>
H_THERMTRIP#<22>
H_THERMTRIP#_R
B B
H_CPUPWRGD<18>
PCH_PLTRST#_R
Buffered reset to CPU
A A
PCH_PLTRST#<14,17>
CPU_DETECT#<39>
VR1 TOPOLOGY
100P_0402_50V8J~D
100P_0402_50V8J~D
@
@
1
CE11
CE11
2
100P_0402_50V8J~D
100P_0402_50V8J~D
@
@
1
CE10
CE10
2
H_CATERR#
PECI_EC<40>
H_PROCHOT#_R
1 2
RC57 56_0402_5%~DRC57 56_0402_5%~D
1 2
RC129 0_0402_5%~DRC129 0_0402_5%~D
Close to JCBU1
H_THERMTRIP#_RH_THERMTRIP#_R
place RC129 near CPU
H_PM_SYNC<16>
RC25 0_0402_5%~DRC25 0_0402_5%~D
5
H_PM_SYNC
VCCPWRGOOD_0_RVCCPWRGOOD_0_R
1 2
PM_DRAM_PWR GD_CPU
PCH_PLTRST#_R
UC1
UC1
1
NC
VCC
2
A
GND3Y
SN74LVC1G07DCKR_SC70-5~D
SN74LVC1G07DCKR_SC70-5~D
Open drain buffer
+3.3V_RUN
5
4
C26
AN34
AL33
AN33
AL32
AN32
AM34
AP33
V8
AR33
+1.05V_RUN_VTT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CC140
CC140
2
PCH_PLTRST#_BUF
PROC_SELECT#
SKTOCC#
CATERR#
PECI
PROCHOT#
THERMTRIP#
PM_SYNC
UNCOREPWRGOOD
SM_DRAMPWR OK
RESET#
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
RC4
75_0402_1%~D
RC4
75_0402_1%~D
12
PCH_PLTRST#_R
1 2
RC10 43_0402_5%~DRC10 43_0402_5%~D
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
CLOCKS
CLOCKS
DDR3
DDR3
JTAG & BPM
JTAG & BPM
4
DPLL_REF_CLK
DPLL_REF_CLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
MISC
MISC
XDP_PREQ#
BCLK
BCLK#
PRDY#
PREQ#
TRST#
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
TCK
TMS
TDO
TDI
CPU_DMI
A28
CPU_DMI#
A27
CPU_DPLL
A16
CPU_DPLL#
A15
Remove DPLL Ref clock (for eDP only)
DDR3_DRAMRST#_CP U
R8
SM_RCOMP0
AK1
SM_RCOMP1
A5
SM_RCOMP2
A4
SM_RCOMP2 --> 15mil
SM_RCOMP1/0 --> 20mil
XDP_PRDY#
AP29
XDP_PREQ#
AP27
XDP_TCLK
AR26
XDP_TMS
AR27
XDP_TRST#
AP30
XDP_TDI_R
AR28
XDP_TDO_R
AP26
XDP_DBRESET#_R
AL35
XDP_OBS0_R
AT28
XDP_OBS1_R
AR29
XDP_OBS2_R
AR30
XDP_OBS3_R
AT30
XDP_OBS4_R
AP32
XDP_OBS5_R
AR31
XDP_OBS6_R
AT31
XDP_OBS7_R
AR32
1 2
RC13 0_0402_5%~D@ RC13 0_0402_5%~D@
1 2
RC15 0_0402_5%~D@ RC15 0_0402_5%~D@
1 2
RC16 1K_0402_5%~DRC16 1K_0402_5%~D
1 2
RC17 1K_0402_5%~DRC17 1K_0402_5%~D
Max 500mils
1 2
RC26 0_0402_5%~DRC26 0_0402_5%~D
1 2
RC30 0_0402_5%~D@ RC30 0_0402_5%~D@
1 2
RC31 0_0402_5%~D@ RC31 0_0402_5%~D@
1 2
RC33 0_0402_5%~D@ RC33 0_0402_5%~D@
1 2
RC34 0_0402_5%~D@ RC34 0_0402_5%~D@
1 2
RC36 0_0402_5%~D@ RC36 0_0402_5%~D@
1 2
RC37 0_0402_5%~D@ RC37 0_0402_5%~D@
1 2
RC38 0_0402_5%~D@ RC38 0_0402_5%~D@
1 2
RC39 0_0402_5%~D@ RC39 0_0402_5%~D@
CLK_CPU_DMI <15>
CLK_CPU_DMI# <15>H_SNB_IVB#<18>
RC50
RC50
4.99K_0402_1%~D
4.99K_0402_1%~D
DDR_HVREF_RST_PCH<15>
DDR_HVREF_RST_GATE<40>
XDP_DBRESET#
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
For ESD concern, please put near CPU
XDP_DBRESET#_R
100P_0402_50V8J~D
100P_0402_50V8J~D
@
@
1
CE15
CE15
2
Avoid stub in t he PWRGD path
while placing r esistors RC25 & RC130
VCCPWRGOOD_0_R
100P_0402_50V8J~D
100P_0402_50V8J~D
@
@
1
CE12
CE12
2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
12
RC130
RC130
10K_0402_5%~D
10K_0402_5%~D
+1.05V_RUN_VTT
RC48 0_0402_5%~D@ RC48 0_0402_5%~D@
12
XDP_DBRESET# <14,16>
SM_RCOMP2
SM_RCOMP1
SM_RCOMP0
1 2
D
S
D
S
13
QC2
QC2
G
G
BSS138W-7-F_SOT323-3~D
BSS138W-7-F_SOT323-3~D
2
DDR_HVREF_RST
1
CC177
CC177
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
1 2
RC46 0_0402_5%~D@RC46 0_0402_5%~D@
1 2
RC47 0_0402_5%~D@ RC47 0_0402_5%~D@
1 2
RC23 0_0402_5%~D@ RC23 0_0402_5%~D@
XDP_TDO_R XDP_TDO
RC42
RC42
140_0402_1%~D
140_0402_1%~D
1 2
RC24 0_0402_5%~D@ RC24 0_0402_5%~D@
12
12
RC45
RC45
RC43
RC43
25.5_0402_1%~D
25.5_0402_1%~D
2
CLK_XDP
CLK_XDP#
DDR3_DRAMRST# <12>
XDP_TDIXDP_TDI_R
12
200_0402_1%~D
200_0402_1%~D
XDP_RST#_R
1 2
RH107 0_0402 _5%~D@RH107 0_0402_5%~D@
1 2
RH106 0_0402 _5%~D@RH106 0_0402_5%~D@
CLK_XDP_ITP<9>
CLK_XDP_ITP#<9>
DDR_HVREF_RST <12>
M3 control
PXDP@
PXDP@
1 2
RC8 1K_0402_5%~D
RC8 1K_0402_5%~D
1 2
RH109 0_0402 _5%~D@ RH109 0_0402_5%~D@
1 2
RH108 0_0402 _5%~D@ RH108 0_0402_5%~D@
PLTRST_XDP# <17>
CLK_CPU_ITP <15>
CLK_CPU_ITP# <15>
PU/PD for JTAG signals
+3.3V_RUN
XDP_DBRESET#_R
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TDO_R
XDP_TCLK
XDP_TRST#
1 2
RC19 1K_0402_5%~DRC19 1K_0402_5%~D
RC27 51_0402_1%~DRC27 51_0402_1%~D
RC29 51_0402_1%~DRC29 51_0402_1%~D
RC32 51_0402_1%~D@ RC32 51_0402_1%~D@
RC35 51_0402_1%~DRC35 51_0402_1%~D
RC40
RC40
RC41
RC41
12
12
12
12
12
51_0402_1%~D
51_0402_1%~D
12
51_0402_1%~D
51_0402_1%~D
+1.05V_RUN_VTT
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (2/6)
Sandy Bridge (2/6)
Sandy Bridge (2/6)
LA-7761P
LA-7761P
LA-7761P
7 59Wednesday, February 22, 2012
7 59Wednesday, February 22, 2012
7 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
4
3
2
1
JCPU1D
AM5
AM6
AR3
AN3
AN2
AN1
AN9
AN8
AR6
AR5
AR9
AJ11
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA10
JCPU1D
C9
SB_DQ[0]
A7
SB_DQ[1]
D10
SB_DQ[2]
C8
SB_DQ[3]
A9
SB_DQ[4]
A8
SB_DQ[5]
D9
SB_DQ[6]
D8
SB_DQ[7]
G4
SB_DQ[8]
F4
SB_DQ[9]
F1
SB_DQ[10]
G1
SB_DQ[11]
G5
SB_DQ[12]
F5
SB_DQ[13]
F2
SB_DQ[14]
G2
SB_DQ[15]
J7
SB_DQ[16]
J8
SB_DQ[17]
K10
SB_DQ[18]
K9
SB_DQ[19]
J9
SB_DQ[20]
J10
SB_DQ[21]
K8
SB_DQ[22]
K7
SB_DQ[23]
M5
SB_DQ[24]
N4
SB_DQ[25]
N2
SB_DQ[26]
N1
SB_DQ[27]
M4
SB_DQ[28]
N5
SB_DQ[29]
M2
SB_DQ[30]
M1
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
AP3
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
AP2
SB_DQ[39]
AP5
SB_DQ[40]
SB_DQ[41]
AT5
SB_DQ[42]
AT6
SB_DQ[43]
AP6
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
AT8
SB_DQ[50]
AT9
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
AA9
SB_BS[0]
AA7
SB_BS[1]
R6
SB_BS[2]
SB_CAS#
AB8
SB_RAS#
AB9
SB_WE#
JCPU1C
JCPU1C
D D
C C
B B
DDR_A_D[0..63]<12>
DDR_A_BS0<12>
DDR_A_BS1<12>
DDR_A_BS2<12>
DDR_A_CAS#<12>
DDR_A_RAS#<12>
DDR_A_WE#<12>
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
G10
N10
M10
AG6
AG5
AK6
AK5
AH5
AH6
AK8
AK9
AH8
AH9
AL9
AL8
AE8
AD9
AF9
F10
AJ5
AJ6
AJ8
AJ9
C5
D5
D3
D2
D6
C6
C2
C3
F8
G9
F9
F7
G8
G7
K4
K5
K1
K2
M8
N8
N7
M9
N9
M7
V6
J1
J5
J4
J2
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
CONN@
CONN@
M_CLK_DDR0
AB6
SA_CK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_CLK_DDR#0
DDR_CKE0_DIMMA
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
M_ODT0
M_ODT1
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
M_CLK_DDR0 <12>
M_CLK_DDR#0 <12>
DDR_CKE0_DIMMA <12>
M_CLK_DDR1 <12>
M_CLK_DDR#1 <12>
DDR_CKE1_DIMMA <12>
DDR_CS0_DIMMA# <12>
DDR_CS1_DIMMA# <12>
M_ODT0 <12>
M_ODT1 <12>
DDR_A_DQS#[0..7] <12>
DDR_A_DQS[0..7] <12>
DDR_A_MA[0..15] <12>
DDR_B_D[0..63]<13>
DDR_B_BS0<13>
DDR_B_BS1<13>
DDR_B_BS2<13>
DDR_B_CAS#<13>
DDR_B_RAS#<13>
DDR_B_WE#<13>
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
CONN@
CONN@
M_CLK_DDR2
AE2
SB_CK[0]
SB_CLK#[0]
SB_CKE[0]
SB_CK[1]
SB_CLK#[1]
SB_CKE[1]
SB_CK[2]
SB_CLK#[2]
SB_CKE[2]
SB_CK[3]
SB_CLK#[3]
SB_CKE[3]
SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]
SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AD2
R9
AE1
AD1
R10
AB2
AA2
T9
AA1
AB1
T10
AD3
AE3
AD6
AE6
AE4
AD4
AD5
AE5
D7
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_CLK_DDR#2
DDR_CKE2_DIMMB
M_CLK_DDR3
M_CLK_DDR#3
DDR_CKE3_DIMMB
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
M_ODT2
M_ODT3
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
M_CLK_DDR2 <13>
M_CLK_DDR#2 <13>
DDR_CKE2_DIMMB <13>
M_CLK_DDR3 <13>
M_CLK_DDR#3 <13>
DDR_CKE3_DIMMB <13>
DDR_CS2_DIMMB# <13>
DDR_CS3_DIMMB# <13>
M_ODT2 <13>
M_ODT3 <13>
DDR_B_DQS#[0..7] <13>
DDR_B_DQS[0..7] <13>
DDR_B_MA[0..15] <13>
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
A A
TYCO_2013620-3_IVYBRIDGE
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (3/6)
Sandy Bridge (3/6)
Sandy Bridge (3/6)
LA-7761P
LA-7761P
LA-7761P
8 59Wednesday, February 22, 2012
8 59Wednesday, February 22, 2012
8 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
4
3
2
1
CFG Straps for Processor
CFG2
D D
CFG0<7>
CFG1<7>
CFG2<7>
CFG3<7>
CFG4<7>
CFG5<7>
CFG6<7>
CFG7<7>
CFG8<7>
CFG9<7>
CFG10<7>
+VCC_GFXCORE
VAXG_VAL_SENSE
1 2
RC122 49.9_0402_1%~D@RC122 49.9_0402_1%~D@
RC123 49.9_0402_1%~D@RC123 49.9_0402_1%~D@
C C
+VCC_CORE
RC120 49.9_0402_1%~D@RC120 49.9_0402_1%~D@
RC121 49.9_0402_1%~D@RC121 49.9_0402_1%~D@
B B
1 2
1 2
1 2
12
RC69
@ RC69
@
100_0402_1%~D
100_0402_1%~D
VSSAXG_VAL_SENSE
VCC_VAL_SNESE
12
RC71
@ RC71
@
100_0402_1%~D
100_0402_1%~D
VSS_VAL_SNESE
CFG11<7>
CFG16<7>
CFG17<7>
T22PAD~D @T22PAD~D @
T28PAD~D @T28PAD~D @
T29PAD~D @T29PAD~D @
T30PAD~D @T30PAD~D @
T31PAD~D @T31PAD~D @
T33PAD~D @T33PAD~D @
T35PAD~D @T35PAD~D @
T36PAD~D @T36PAD~D @
T37PAD~D @T37PAD~D @
T38PAD~D @T38PAD~D @
T40PAD~D @T40PAD~D @
T41PAD~D @T41PAD~D @
T42PAD~D @T42PAD~D @
T43PAD~D @T43PAD~D @
T44PAD~D @T44PAD~D @
T45PAD~D @T45PAD~D @
T46PAD~D @T46PAD~D @
T47PAD~D @T47PAD~D @
T48PAD~D @T48PAD~D @
T52PAD~D @T52PAD~D @
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SNESE
VSS_VAL_SNESE
JCPU1E
JCPU1E
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
J15
RSVD27
CONN@
CONN@
T39 PAD~D@T39 PAD~D@
T1 PAD~D@T1 PAD~D@
T2 PAD~D@T2 PAD~D@
T3 PAD~D@T3 PAD~D@
T4 PAD~D@T4 PAD~D@
T5 PAD~D@T5 PAD~D@
T6 PAD~D@T6 PAD~D@
T7 PAD~D@T7 PAD~D@
T8 PAD~D@T8 PAD~D@
T11 PAD~D@T11 PAD~D@
T13 PAD~D@T13 PAD~D@
T15 PAD~D@T15 PAD~D@
T16 PAD~D@T16 PAD~D@
T17 PAD~D@T17 PAD~D@
T18 PAD~D@T18 PAD~D@
T19 PAD~D@T19 PAD~D@
T20 PAD~D@T20 PAD~D@
T21 PAD~D@T21 PAD~D@
T23 PAD~D@T23 PAD~D@
T24 PAD~D@T24 PAD~D@
T25 PAD~D@T25 PAD~D@
T26 PAD~D@T26 PAD~D@
T27 PAD~D@T27 PAD~D@
T32 PAD~D@T32 PAD~D@
T34 PAD~D@T34 PAD~D@
CLK_XDP_ITP <7>
CLK_XDP_ITP# <7>
T49 PAD~D@T49 PAD~D@
T50 PAD~D@T50 PAD~D@
T51 PAD~D@T51 PAD~D@
T53 PAD~D@T53 PAD~D@
PEG Static Lane Reversal - CFG2 is for the 16x
1:(Default) Normal Operation; Lane #
CFG2
definition matches socket pin map definition
0:Lane Reversed
Display Port Presence Strap
1 : Disabled; No Physical Display Port
CFG4
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
PCIE Port Bifurcation Straps
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG[6:5]
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD37
RSVD38
RSVD39
RSVD40
RSVD51
RSVD52
BCLK_ITP
BCLK_ITP#
KEY
AH27
AH26
L7
AG7
AE7
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AN35
AM35
AT2
AT1
AR1
B1
VCC_DIE_SENSE
VSS_DIE_SENSE
CFG
CFG
RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
RSVD_NCTF5
RSVD_NCTF6
RSVD_NCTF7
RSVD_NCTF8
RESERVED
RESERVED
RSVD_NCTF9
RSVD_NCTF10
RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13
CFG4
CFG6
CFG5
RC54
@RC54
@
1K_0402_5%~D
1K_0402_5%~D
12
RC51
@RC51
@
1K_0402_5%~D
1K_0402_5%~D
12
RC52
@RC52
@
1K_0402_5%~D
1K_0402_5%~D
12
12
RC53
@RC53
@
1K_0402_5%~D
1K_0402_5%~D
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
CFG7
12
RC56
@RC56
@
1K_0402_5%~D
1K_0402_5%~D
PEG DEFER TRAINING
1: (Default) PEG Train immediately
CFG7
following xxRESETB de assertion
A A
0: PEG Wait for BIOS for training
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (4/6)
Sandy Bridge (4/6)
Sandy Bridge (4/6)
LA-7761P
LA-7761P
LA-7761P
9 59Wednesday, February 22, 2012
9 59Wednesday, February 22, 2012
9 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
+VCC_CORE
53A
D D
C C
B B
A A
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
4
POWER
JCPU1F
JCPU1F
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
POWER
CORE SUPPLY
CORE SUPPLY
PEG AND DDR
PEG AND DDR
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
SENSE LINES SVID
SENSE LINES SVID
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VIDALERT#
VIDSCLK
VIDSOUT
8.5A
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
VIDSCLK VIDSOUT
AJ35
AJ34
B10
A10
3
+1.05V_RUN_VTT
H_CPU_SVIDALRT#
VIDSCLK
VIDSOUT
1
2
VCCSENSE_R
VSSSENSE_R
VTT_SENSE
VSSIO_SENSE_R
Note: Place the PU resistors close to CPU
RC61 close to C PU 300 - 1500m ils
100P_0402_50V8J~D
100P_0402_50V8J~D
@
@
CE13
CE13
H_CPU_SVIDALRT#
VIDSCLK <51>
1 2
RC61 43_0402_5%~DRC61 43_0402_5%~D
+1.05V_RUN_VTT
12
RC63
RC63
130_0402_1%~D
130_0402_1%~D
VIDSOUT < 51>
H_CPU_SVIDALRT# must be routed between the
VIDSOUT and VIDSCLK lines to reduce cross
talk. 18 mils spacing to others.
100P_0402_50V8J~D
100P_0402_50V8J~D
@
@
1
CE14
CE14
2
Place RC66, RC70near CPU
1 2
RC67 0_0402_5%~D@ RC67 0_0402_5%~D@
1 2
RC68 0_0402_5%~D@ RC68 0_0402_5%~D@
RC98 10_0402_1%~DRC98 10_0402_1%~D
10_0402_1%~D
10_0402_1%~D
12
RC133
RC133
12
+1.05V_RUN_VTT
VTT_SENSE <49>
VSSIO_SENSE_R <49>
2
+1.05V_RUN_VTT
12
RC60
RC60
75_0402_1%~D
75_0402_1%~D
CAD Note: Place the PU
resistors close to CPU
RC63 close to C PU 300 - 1500m ils
+VCC_CORE
RC75
@RC75
@
100_0402_1%~D
100_0402_1%~D
1 2
12
RC66
RC66
100_0402_1%~D
100_0402_1%~D
12
RC70
RC70
100_0402_1%~D
100_0402_1%~D
VCCSENSE <51>
VSSSENSE <51>
VIDALERT_N <51>
1
Iccmax current changed for PD DG Rev0.7
CPU Power Rail Table
Voltage Rail
VCC
VCCIO
VAXG
VCCPLL
VDDQ
VCCSA
+1.5V_MEM 1.5
Description
*
5A to Mem contr oller(+1.5V_CP U_VDDQ)
5-6A to 2 DIMMs /channel
2-5A to +1.5V_R UN & +0.75V_DD R_VTT
Voltage
0.65-1.3
1.05
0.0-1.1
1.8
1.5
0.65-0.9
S0 Iccmax
Current (A)
53
8.5
26
3
5
6
12-16
*
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
5
4
CONN@
CONN@
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (5/6)
Sandy Bridge (5/6)
Sandy Bridge (5/6)
LA-7761P
LA-7761P
LA-7761P
10 59Wednesday, February 22, 2012
10 59Wednesday, February 22, 2012
10 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
4
3
2
1
+1.5V_CPU_VDDQ Source
+3.3V_ALW2
12
RC74
RC74
100K_0402_5%~D
2
+VCC_GFXCORE
330U_D2_2.5VM_R6M~D
330U_D2_2.5VM_R6M~D
CC176
CC176
1
+
+
2
61
100K_0402_5%~D
RUN_ON_CPU1.5VS3#
QC4A
QC4A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
JCPU1G
JCPU1G
33A
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
1.2A
B6
A6
A2
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
D D
SIO_SLP_S3#<16,27,35,36,39,42,47>
CPU1.5V_S3_GATE<40>
C C
B B
1 2
RC96 1K_0402_5%~D@RC96 1K_0402_5%~D@
1 2
RC97 1K_0402_5%~D@RC97 1K_0402_5%~D@
A A
+1.8V_RUN
1 2
RC82 0_0402_5%~D@RC82 0_0402_5%~D@
1 2
RC79 0_0402_5%~D@RC79 0_0402_5%~D@
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC173
CC173
2
2
5
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CC174
CC174
CC175
CC175
2
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
VCCPLL1
VCCPLL2
VCCPLL3
+PWR_SRC_S
5
4
+1.5V_MEM +1 .5V_CPU_VDDQ
12
RC72
RC72
330K_0402_1%~D
330K_0402_1%~D
RUN_ON_CPU1.5VS3
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
QC4B
QC4B
4
RUN_ON_CPU1.5VS3# <7,42>
POWER
POWER
SENSE
SENSE
GRAPHICS
GRAPHICS
1.8V RAIL
1.8V RAIL
AO4304L_SO8
AO4304L_SO8
8
7
6
5
1M_0402_5%~D
1M_0402_5%~D
12
RC143
RC143
VAXG_SENSE
VSSAXG_SENSE
LINES
LINES
SM_VREF
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
VREFMISC
VREFMISC
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VCCSA_SENSE
VCCSA_VID[0]
VCCSA_VID[1]
VCCIO_SEL
QC3
QC3
CONN@
CONN@
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
1
2
3
4
0.022U_0402_25V7K~D
0.022U_0402_25V7K~D
1
CC136
CC136
2
AK35
AK34
AL1
B4
D1
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
6A
M27
M26
L26
J26
J25
J24
H26
H25
H23
C22
C24
A19
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
CC135
CC135
1
2
+VCC_GFXCORE
12
RC99
RC99
100_0402_1%~D
100_0402_1%~D
12
RC100
RC100
100_0402_1%~D
100_0402_1%~D
+V_SM_VREF_CNT
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
5A
1 2
RC140 0_0402_5%~D@ RC140 0_0402_5%~D@
20K_0402_5%~D
20K_0402_5%~D
@
@
RC73
RC73
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
CC161
CC161
2
2
1
2
3
+1.5V_MEM
100_0402_1%~D
100_0402_1%~D
10U_0603_6.3V6M
10U_0603_6.3V6M
CC162
CC162
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@
@
CC168
CC168
+V_DDR_SMREF
1K_0402_1%~D
1K_0402_1%~D
12
@
@
RC80
RC80
1K_0402_1%~D
1K_0402_1%~D
12
@
@
RC81
RC81
RUN_ON_CPU1.5VS3
RC76
@RC76
@
1 2
+V_SM_VREF should
have 10 mil trace width
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
CC164
CC164
CC163
CC163
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC170
CC170
CC169
CC169
2
2
added VCCSA_VID_0 to Power page
VCCSA_VID_0 <50>
VCCSA_VID_1 <50>
+1.5V_CPU_VDDQ
1K_0402_1%~D
1 2
RC134 0_0402 _5%~D@ RC134 0_0402_5%~D@
@QC5
@
NTR4503NT1G_SOT23-3~D
NTR4503NT1G_SOT23-3~D
1
VCC_AXG_SENSE <51>
VSS_AXG_SENSE <51>
+1.5V_CPU_VDDQ
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
CC166
CC166
CC165
CC165
2
2
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
CC172
CC172
CC171
CC171
+
+
2
2
VCCP_PWRCTR L <49>
QC5
3
2
CC178 0.1U_0402_10V7K~DC C178 0.1U_0402_10V7K~D
CC179 0.1U_0402_10V7K~DC C179 0.1U_0402_10V7K~D
CC149 0.1U_0402_10V7K~DC C149 0.1U_0402_10V7K~D
330U_D2_2VM_R6M~D
330U_D2_2VM_R6M~D
1
CC150 0.1U_0402_10V7K~DC C150 0.1U_0402_10V7K~D
+
+
CC167
CC167
2
1K_0402_1%~D
12
RC84
RC84
1K_0402_1%~D
1K_0402_1%~D
12
RC78
RC78
12
12
12
12
+VCC_SA
VCCSA_SENSE <50>
check pull high on power side
2
JCPU1H
JCPU1H
AT35
VSS1
AT32
VSS2
AT29
+V_SM_VREF_CNT
6A
+1.5V_MEM
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
VSS3
AT27
VSS4
AT25
VSS5
AT22
VSS6
AT19
VSS7
AT16
VSS8
AT13
VSS9
AT10
VSS10
AT7
VSS11
AT4
VSS12
AT3
VSS13
AR25
VSS14
AR22
VSS15
AR19
VSS16
AR16
VSS17
AR13
VSS18
AR10
VSS19
AR7
VSS20
AR4
VSS21
AR2
VSS22
AP34
VSS23
AP31
VSS24
AP28
VSS25
AP25
VSS26
AP22
VSS27
AP19
VSS28
AP16
VSS29
AP13
VSS30
AP10
VSS31
AP7
VSS32
AP4
VSS33
AP1
VSS34
AN30
VSS35
AN27
VSS36
AN25
VSS37
AN22
VSS38
AN19
VSS39
AN16
VSS40
AN13
VSS41
AN10
VSS42
AN7
VSS43
AN4
VSS44
AM29
VSS45
AM25
VSS46
AM22
VSS47
AM19
VSS48
AM16
VSS49
AM13
VSS50
AM10
VSS51
AM7
VSS52
AM4
VSS53
AM3
VSS54
AM2
VSS55
AM1
VSS56
AL34
VSS57
AL31
VSS58
AL28
VSS59
AL25
VSS60
AL22
VSS61
AL19
VSS62
AL16
VSS63
AL13
VSS64
AL10
VSS65
AL7
VSS66
AL4
VSS67
AL2
VSS68
AK33
VSS69
AK30
VSS70
AK27
VSS71
AK25
VSS72
AK22
VSS73
AK19
VSS74
AK16
VSS75
AK13
VSS76
AK10
VSS77
AK7
VSS78
AK4
VSS79
AJ25
VSS80
TYCO_2013620-3_IVYBRIDGE
TYCO_2013620-3_IVYBRIDGE
VSS
VSS
CONN@
CONN@
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Sandy Bridge (6/6)
Sandy Bridge (6/6)
Sandy Bridge (6/6)
LA-7761P
LA-7761P
LA-7761P
11 59Wednesday, February 22, 2012
11 59Wednesday, February 22, 2012
11 59Wednesday, February 22, 2012
1
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
1.0
1.0
1.0
5
+V_DDR_REFA_M3
+V_DDR_REF
D D
Populate RD1, De-Populate RD7 for Intel DDR3
VREFDQ multiple methods M1
Populate RD7, De-Populate RD1 for Intel DDR3
VREFDQ multiple methods M3
All VREF traces should
have 10 mil trace width
DDR_A_DQS#[0..7]<8>
DDR_A_D[0..63]<8>
DDR_A_DQS[0..7]<8>
DDR_A_MA[0..15]<8>
C C
Layout Note:
Place near JDIMM1
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD3
CD3
2
+1.5V_MEM
B B
A A
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD7
CD7
1
1
2
2
Layout Note:
Place near JDIMM1.203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD17
CD17
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD4
CD4
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD8
CD8
CD9
CD9
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD18
CD18
2
5
1U_0402_6.3V6K~D
1
1
CD5
CD5
CD6
CD6
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD10
CD10
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD19
CD19
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD11
CD11
CD51
CD51
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CD20
CD20
330U_SX_2VY~D
330U_SX_2VY~D
@CD13
@
1
CD14
CD14
CD13
1
+
+
2
2
RD2 10K_0402_5%~DRD2 10K_0402_5%~D
1 2
1 2
RD3 10K_0402_5%~DRD3 10K_0402_5%~D
RD7 0_0402_5%~D@ RD7 0_0402_5%~D@
RD1 0_0402_5%~D@ RD1 0_0402_5%~D@
+3.3V_RUN
1 2
1 2
4
+DIMM1_VREF_DQ
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD1
CD1
1
2
DDR_CKE0_DIMMA<8>
DDR_A_BS2<8>
M_CLK_DDR0<8>
DDR_A_BS0<8>
DDR_A_WE#<8>
DDR_A_CAS#<8>
DDR_CS1_DIMMA#<8>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
CD21
CD21
2
DDR_A_D0
DDR_A_D1
CD2
CD2
1
DDR_A_D2
2
DDR_A_D3
DDR_A_D8
DDR_A_D9 DDR_A_D13
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_BS2
DDR_A_MA3
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
+0.75V_DDR_VTT
CD22
CD22
2
JDIMM1 H=5.2
JDIMM1
CONN@JDIMM1
CONN@
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
TYCO_2-2013289-2~D
TYCO_2-2013289-2~D
3
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
ODT0
VDD
ODT1
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
VTT
GND2
2
2-3A to 1 DIMMs/channel
+1.5V_MEM+1.5V_MEM
2
DDR_A_D4
4
DDR_A_D5
6
8
DDR_A_DQS#0
10
DDR_A_DQS0
12
14
DDR_A_D6
16
DDR_A_D7
18
20
DDR_A_D12
22
24
26
28
DDR3_DRAMRST#_R
30
32
DDR_A_D14
34
DDR_A_D15
36
38
DDR_A_D20DDR_A_D16
40
DDR_A_D21
42
44
46
48
DDR_A_D22
50
DDR_A_D23
52
54
DDR_A_D28
56
DDR_A_D29
58
60
DDR_A_DQS#3
62
DDR_A_DQS3
64
66
DDR_A_D30
68
DDR_A_D31
70
72
74
76
DDR_A_MA15
78
A15
A14
A11
A7
A6
A4
A2
A0
S0#
NC
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
DDR_A_MA14
DDR_A_MA11DDR_A_MA12
DDR_A_MA7DDR_A_MA9
DDR_A_MA6DDR_A_MA8
DDR_A_MA4DDR_A_MA5
DDR_A_MA2
DDR_A_MA0DDR_A_MA1
M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
M_ODT1
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
+0.75V_DDR_VTT
DDR_CKE1_DIMMA <8>
M_CLK_DDR1 <8>
M_CLK_DDR#1 <8>M_CLK_DDR#0<8>
DDR_A_BS1 <8>
DDR_A_RAS# <8>
DDR_CS0_DIMMA# <8>
M_ODT0 <8>
M_ODT1 <8>
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD15
CD15
1
2
DDR_XDP_WAN_ SMBDAT <7,13,14,15,27,34>
DDR_XDP_WAN_ SMBCLK <7,13,14,15,27,34>
+DIMM1_VREF_CA
DDR_HVREF_RST<7>
RD11 0_0402_5%~D@ RD11 0_0402_5%~D@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD16
CD16
1
2
DDR3_DRAMRST#_R
+DIMM0_1_VREF_CPU
DDR_HVREF_RST
+DIMM0_1_CA_CPU
DDR_HVREF_RST
RD28 1K_0402_5%~DRD28 1K_0402_5%~D
M3 Circuit (Processo r Generat ed SO-DIMM VREF_DQ)
12
+V_DDR_REF
1 2
RD29 0_0402_5%~D@ RD29 0_0402_5%~D@
RD30 0_0402_5%~D@ RD30 0_0402_5%~D@
1 2
S
S
G
G
2
1 2
S
S
G
G
2
+1.5V_MEM
12
QD1
QD1
D
D
BSS138_G_SOT23-3
BSS138_G_SOT23-3
13
QD2
QD2
D
D
BSS138_G_SOT23-3
BSS138_G_SOT23-3
13
RD27
RD27
1K_0402_5%~D
1K_0402_5%~D
1
DDR3_DRAMRST# <7>DDR3_DRAMRST#_R<13>
+V_DDR_REFA_M3
+V_DDR_REFB_M3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
DDRIII-SODIMM SLOT1
LA-7761P
LA-7761P
LA-7761P
12 59Wednesday, February 22, 2012
12 59Wednesday, February 22, 2012
12 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
D D
Populate RD4, De-Populate RD8 for Intel DDR3
VREFDQ multiple methods M1
Populate RD8, De-Populate RD4 for Intel DDR3
VREFDQ multiple methods M3
DDR_B_DQS#[0..7]<8>
DDR_B_D[0..63]<8>
DDR_B_DQS[0..7]<8>
DDR_B_MA[0..15]<8>
C C
+1.5V_MEM
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD25
CD25
2
+1.5V_MEM
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
B B
A A
10U_0603_6.3V6M~D
CD30
CD30
CD29
CD29
1
1
2
2
Layout Note:
Place near JDIMM2.203,204
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD39
CD39
2
Layout Note:
Place near JDIMM2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD26
CD26
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD31
CD31
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CD40
CD40
2
2
5
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD27
CD27
CD28
CD28
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
CD34
CD34
CD33
CD33
CD32
CD32
1
1
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CD42
CD42
CD41
CD41
2
All VREF traces should
have 10 mil trace width
330U_SX_2VY~D
330U_SX_2VY~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@CD35
@
1
CD36
CD36
CD35
1
+
+
2
2
+V_DDR_REFB_M3
+V_DDR_REF
4
+DIMM2_VREF_DQ
1 2
RD8 0_0402_5%~D@ RD8 0_0402_5%~D@
1 2
RD4 0_0402_5%~D@ RD4 0_0402_5%~D@
+3.3V_RUN
RD5 10K_04 02_5%~DRD 5 10K_0402_5%~D
+3.3V_RUN
12
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD23
CD23
1
2
1
2
DDR_CKE2_DIMMB<8>
DDR_B_BS2<8>
M_CLK_DDR2<8>
M_CLK_DDR#2<8>
DDR_B_BS0<8>
DDR_B_WE#<8>
DDR_B_CAS#<8>
DDR_CS3_DIMMB#<8>
10K_0402_5%~D
10K_0402_5%~D
12
RD6
RD6
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD24
CD24
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
CD43
CD43
3
+1.5V_MEM
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
+0.75V_DDR_VTT
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
CD44
CD44
1
2
JDIMM2
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
TYCO_2-2013310-2~D
TYCO_2-2013310-2~D
CONN@JDIMM2
CONN@
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
RESET#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1
CK1#
VDD
RAS#
VDD
ODT0
VDD
ODT1
VDD
VREF_CA
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
EVENT#
SDA
SCL
GND2
2
2-3A to 1 DIMMs/channel
+1.5V_MEM
2
DDR_B_D4
4
DDR_B_D5
6
8
DDR_B_DQS#0
10
DDR_B_DQS0
12
14
DDR_B_D6
16
DDR_B_D7
18
20
DDR_B_D12
22
DDR_B_D13
24
26
28
DDR3_DRAMRST#_R
30
32
DDR_B_D14
34
DDR_B_D15
36
38
DDR_B_D20
40
DDR_B_D21
42
44
46
48
DDR_B_D22
50
DDR_B_D23
52
54
DDR_B_D28
56
DDR_B_D29
58
60
DDR_B_DQS#3
62
DDR_B_DQS3
64
66
DDR_B_D30
68
DDR_B_D31
70
72
DDR_CKE3_DIMMB
74
76
DDR_B_MA15
78
A15
A14
A11
A7
A6
A4
A2
A0
BA1
S0#
NC
VTT
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
M_ODT3
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
+0.75V_DDR_VTT
JDIMMB H=9.2
DDR3_DRAMRST#_R <12>
DDR_CKE3_DIMMB <8>
M_CLK_DDR3 <8>
M_CLK_DDR#3 <8>
DDR_B_BS1 <8>
DDR_B_RAS# <8>
DDR_CS2_DIMMB# <8>
M_ODT2 <8>
M_ODT3 <8>
+DIMM2_VREF_CA
0.1U_0402_25V6K~D
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1
2
DDR_XDP_WAN_ SMBDAT <7,12,14,15,27,34>
DDR_XDP_WAN_ SMBCLK <7,12,14,15,27,34>
0.1U_0402_25V6K~D
CD37
CD37
1
2
1
RD15 0_0402_5%~D@ RD15 0_0402_5%~D@
CD38
CD38
12
+V_DDR_REF
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
DDRIII-SODIMM SLOT2
LA-7761P
LA-7761P
LA-7761P
13 59Wednesday, February 22, 2012
13 59Wednesday, February 22, 2012
13 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
CMOS settingCMOS_CLR1
TPM setting
Clear ME RTC Registers
Keep ME RTC Registers
12
RH38
RH38
330K_0402_1%~D
330K_0402_1%~D
PCH_INTVRMEN
12
RH39
@RH39
@
330K_0402_1%~D
330K_0402_1%~D
1
1
@
@
ME1 SHORT PADS~D
ME1 SHORT PADS~D
1 2
CH5 1U_0402_6.3V6K~DCH5 1U_0402_6.3V6K~D
PCH_AZ_CODEC_SDOUT<29>
PCH_AZ_CODEC_SYNC<29>
PCH_AZ_CODEC_RST#<29>
PCH_AZ_CODEC_BITCLK< 29>
27P_0402_50V8J~D
27P_0402_50V8J~D
Clear CMOSShunt
Keep CMOS
CH101
@CH101
@
Open
ME_CLR1
Shunt
Open
+RTC_CELL
D D
INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable Internal VRs
*
Low - Enable External VRs
C C
PCH_AZ_SYNC is sampled
at the rising edge of RSMRST# pin.
So signal should be PU to the ALWAYS rail.
+3.3V_ALW_PCH
On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V
when sampled low
+RTC_CELL
2
2
1 2
RH29 33_0402_5%~DRH29 33_0402_5%~D
1 2
RH26 33_0402_5%~DRH26 33_0402_5%~D
1 2
RH27 33_0402_5%~DRH27 33_0402_5%~D
1 2
RH25 33_0402_5%~DRH25 33_0402_5%~D
1
+3.3V_ALW_PCH
2
12
RH66
RH66
1K_0402_5%~D
1K_0402_5%~D
PCH_AZ_SYNC
12
RH282
@RH282
@
100K_0402_5%~D
100K_0402_5%~D
1 2
RH22 20K_0402_5%~DRH22 20K_0402_5%~D
1 2
RH23 20K_0402_5%~DRH23 20K_0402_5%~D
1 2
RH11 1M_0402_5%~DRH11 1M_0402_5%~D
1
1
@
@
CMOS1 SHORT PADS~D
CMOS1 SHORT PADS~D
1 2
CH4
CH4
CMOS place near DIMM
PCH_AZ_SDOUT
PCH_AZ_SYNC_Q
PCH_AZ_RST#
PCH_AZ_BITCLK
12
RH288
@ RH288
@
0_0603_5%~D
0_0603_5%~D
+3.3V_ALW_PCH_JTAG
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PCH_AZ_MDC_SDOUT<41>
RH59 51_0402_1%~DRH59 51_0402_1%~D
RH44 200_0402_1%~DRH44 200_0402_1%~D
RH45 200_0402_1%~DRH45 200_0402_1%~D
RH43 200_0402_1%~DRH43 200_0402_1%~D
Follow INTEL CRB 0.7
B B
S
PCH_AZ_SYNC_Q
1 2
RH31 1M_0402_5%~DRH31 1M_0402_5%~D
INTEL HDA_SYNC
isolation circuit
12
R890
R890
3.3K_0402_5%~D
3.3K_0402_5%~D
SPI_PCH_CS0# SPI_PCH_CS0#_R
1 2
R935 47_0402_5%~DR935 47_0402_5%~D
SPI_PCH_DIN SPI_DIN64
1 2
R894 33_0402_5%~DR894 33_0402_5%~D
SPI_WP#_SEL
SPI_WP#_SEL<39>
A A
1 2
R898 0_0402_5%~D@R898 0_0402_5%~D@
SPI_WP#_SEL_R
SPI_PCH_CS0#_R
SPI_DIN64
SPI_WP#_SEL_R
S
G
G
2
+5V_RUN
200 MIL SO8
64Mb Flash ROM
U52
X76@ U52
X76@
1
VCC
/CS
2
DO
/HOLD
3
1
2
3
CLK
/WP
GND4DIO
W25Q64CVSSIG_SO8
W25Q64CVSSIG_SO8
U54
CONN@ U54
CONN@
VCC
/CS
DO
/HOLD
CLK
/WP
GND4DIO
WIESO_G6179HT0143-001_8P-T
WIESO_G6179HT0143-001_8P-T
4
USB_OC0#_R<17>
USB_OC1#_R<17>
USB_OC2#<17>
USB_OC3#<17>
USB_OC4#_R<17>
USB_OC5#<17>
USB_OC6#<17>
SIO_EXT_SMI#<17,40>
SLP_ME_CSW_DEV#<18,39>
USB_MCARD1_DET#<18,34>
PCH_GPIO36<18>
PCH_GPIO37<18>
PCH_GPIO16<18>
TEMP_ALERT#<18,39>
PCH_GPIO15<18>
SIO_EXT_SCI#_R<18>
PCH_RSMRST#_Q<16,41>
CH2
CH2
15P_0402_50V8J~D
15P_0402_50V8J~D
CH3
CH3
15P_0402_50V8J~D
15P_0402_50V8J~D
PCH_AZ_MDC_BITCLK<41>
PCH_AZ_MDC_SYNC<41>
PCH_AZ_MDC_RST#<41>
PCH_AZ_CODEC_SDIN0<29>
PCH_AZ_MDC_SDIN1<41>
ME_FWP<39>
12
12
12
12
D
D
13
QH7
QH7
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
+3.3V_SPI
8
7
SPI_CLK64
6
SPI_DO64
5
+3.3V_SPI
8
SPI_HOLD#
7
SPI_CLK64
6
SPI_DO64
5
USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#_R
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
SLP_ME_CSW_DEV#
USB_MCARD1_DET#
HDD_DET#_R
BBS_BIT0_R
PCH_GPIO36
PCH_GPIO37
PCH_GPIO16
TEMP_ALERT#
PCH_GPIO15
SIO_EXT_SCI#_R
12
12
YH1
YH1
32.768KHZ_12.5PF_Q13FC1350000~D
32.768KHZ_12.5PF_Q13FC1350000~D
PCH_RTCX2_R
12
12
CH100
@CH100
@
27P_0402_50V8J~D
27P_0402_50V8J~D
SPKR<29>
+3.3V_ALW_PCH
12
12
RH48
RH48
@
@
@
@
100_0402_1%~D
100_0402_1%~D
PCH_AZ_SYNC
C746
C746
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
12
R891
R891
3.3K_0402_5%~D
3.3K_0402_5%~D
SPI_PCH_CLK
1 2
R899 33_0402_5%~DR899 33_0402_5%~D
SPI_PCH_DO
1 2
R901 33_0402_5%~DR901 33_0402_5%~D
RH24 1K_0402_5%~DPXDP@ RH24 1K_0402_5%~DPXDP@
1 2
RH286 0_0402_5%~D@ RH286 0_0402_5%~D@
1 2
RH32 33_0402_5%~DRH32 33_0402_5%~D
1 2
RH33 33_0402_5%~DRH33 33_0402_5%~D
1 2
RH34 33_0402_5%~DRH34 33_0402_5%~D
1 2
RH287 1K_0402_5%~D@ RH287 1K_0402_5%~D@
1 2
RH36 33_0402_5%~DRH36 33_0402_5%~D
1 2
RH50 1K_0402_5%~DRH50 1K_0402_5%~D
12
RH49
RH49
RH47
RH47
@
@
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
100_0402_1%~D
SPI_HOLD#
12
@
@
RE1
RE1
33_0402_5%~D
33_0402_5%~D
1
@
@
CE1
CE1
27P_0402_50V8J~D
27P_0402_50V8J~D
2
1 2
RH1 33_0402_5%~DPXDP@ RH1 33_0402_5%~DPXDP@
1 2
RH3 33_0402_5%~DPXDP@ RH3 33_0402_5%~DPXDP@
1 2
RH4 33_0402_5%~DPXDP@ RH4 33_0402_5%~DPXDP@
1 2
RH5 33_0402_5%~DPXDP@ RH5 33_0402_5%~DPXDP@
1 2
RH6 33_0402_5%~DPXDP@ RH6 33_0402_5%~DPXDP@
1 2
RH7 33_0402_5%~DPXDP@ RH7 33_0402_5%~DPXDP@
1 2
RH8 33_0402_5%~DPXDP@ RH8 33_0402_5%~DPXDP@
1 2
RH9 33_0402_5%~DPXDP@ RH9 33_0402_5%~DPXDP@
1 2
RH10 33_0402_5%~DPXDP@ RH10 33_0402_5%~DPXDP@
1 2
RH12 33_0402_5%~DPXDP@ RH12 33_0402_5%~DPXDP@
1 2
RH13 33_0402_5%~DPXDP@ RH13 33_0402_5%~DPXDP@
1 2
RH14 33_0402_5%~DPXDP@ RH14 33_0402_5%~DPXDP@
1 2
RH15 33_0402_5%~DPXDP@ RH15 33_0402_5%~DPXDP@
1 2
RH16 33_0402_5%~DPXDP@ RH16 33_0402_5%~DPXDP@
1 2
RH17 33_0402_5%~DPXDP@ RH17 33_0402_5%~DPXDP@
1 2
RH18 33_0402_5%~DPXDP@ RH18 33_0402_5%~DPXDP@
1 2
RH19 33_0402_5%~DPXDP@ RH19 33_0402_5%~DPXDP@
1 2
RH20 33_0402_5%~DPXDP@ RH20 33_0402_5%~DPXDP@
RSMRST#_XDP
1 2
PCH_RTCX1
12
RH2
RH2
10M_0402_5%~D
10M_0402_5%~D
PCH_RTCX2
PCH_RTCRST#
SRTCRST#
INTRUDER#
PCH_INTVRMEN
PCH_AZ_BITCLK
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_MDC_SDIN1
PCH_AZ_SDOUT
PCH_GPIO33
USB30_SMI#<28>
USB30_SMI#
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_CS1#
PCH_SPI_DO
PCH_SPI_DIN
SPI_PCH_CS1#
1 2
R936 47_0402_5%~DR936 47_0402_5%~D
SPI_PCH_DIN SPI_DIN32
1 2
R895 33_0402_5%~DR895 33_0402_5%~D
3
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
XDP_FN16
XDP_FN17
DDR_XDP_WAN_SMBDAT<7,12,13,15,27,34>
DDR_XDP_WAN_SMBCLK<7,12,13,15,27, 34>
PCH_AZ_SYNCPCH_AZ_SYNC_Q
SPI_PCH_CS1#_R
SPI_PCH_CS1#_R
SPI_DIN32
+3.3V_ALW_PCH
1.05V_0.8V_PWROK<40,51>
UH4A
UH4A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_ EN# / GPIO3 3
N32
HDA_DOCK_ RST# / GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
RH283 1K_0402_5%~DPXDP@ RH283 1K_0402_5%~DPXDP@
SIO_PWRBTN#_R<7,16>
RH284 0_0402_5%~DPXDP@ RH284 0_0402_5%~DPXDP@
1 2
1 2
RH285 0_0402_5%~DPXDP@ RH285 0_0402_5%~DPXDP@
RTCIHDA
RTCIHDA
JTAG
JTAG
SPI
SPI
BBS_BIT0 - BIOS BOOT STRAP BIT 0
200 MIL SO8
32Mb Flash ROM
U53
X76@ U53
X76@
1
CS#
VCC
2
DO
HOLD#
3
WP#
CLK
4
GND
DI
W25Q32BVSSIG_SO8
W25Q32BVSSIG_SO8
U55
CONN@ U55
CONN@
1
CS#
VCC
2
DO
HOLD#
3
WP#
4
GND
WIESO_G6179HT0143-001_8P-T
WIESO_G6179HT0143-001_8P-T
1
PXDP@
PXDP@
CH1
CH1
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
1 2
1 2
RH21 0_0402_5%~DPXDP@ RH21 0_0402_5%~DPXDP@
LPC
LPC
FWH4 / L FRAME#
LDRQ1# / GPIO23
SATA
SATA
SATA0GP / GPIO21
SATA1GP / GPIO19
8
7
6
5
8
7
6
CLK
5
DI
SATA3RCOMP O
+3.3V_SPI
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
1.05V_0.8V_PWROK_R
PCH_PWRBTN#_XDP
DDR_XDP_WAN_SMBDAT_R2
DDR_XDP_WAN_SMBCLK_R2
C38
FWH0 / L AD0
A38
FWH1 / L AD1
B37
FWH2 / L AD2
C37
FWH3 / L AD3
D36
E36
LDRQ0#
K36
V5
SERIRQ
AM3
SATA0RXN
AM1
SATA0RXP
AP7
SATA0TXN
AP5
SATA0TXP
AM10
SATA1RXN
AM8
SATA1RXP
AP11
SATA 6G
SATA 6G
SATA1TXN
AP10
SATA1TXP
AD7
SATA2RXN
AD5
SATA2RXP
AH5
SATA2TXN
AH4
SATA2TXP
AB8
SATA3RXN
AB10
SATA3RXP
AF3
SATA3TXN
AF1
SATA3TXP
Y7
SATA4RXN
Y5
SATA4RXP
AD3
SATA4TXN
AD1
SATA4TXP
Y3
SATA5RXN
Y1
SATA5RXP
AB3
SATA5TXN
AB1
SATA5TXP
Y11
SATAICOMPO
Y10
SATAICOMPI
AB12
AB13
SATA3COMPI
AH1
SATA3RBIA S
P3
SATALED#
V14
P1
C745
C745
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
SPI_HOLD#
1 2
R897 33_0402_5%~DR897 33_0402_5%~D
SPI_DO32SPI_WP#_SEL_R
1 2
R900 33_0402_5%~DR900 33_0402_5%~D
+3.3V_SPI
SPI_HOLD#
SPI_CLK32SPI_WP#_SEL_R
SPI_DO32
SPI_CLK32SPI_CLK64
2
+3.3V_ALW_PCH
1
GND0
3
OBSFN_A0
5
OBSFN_A1
7
GND2
9
OBSDATA_A 0
11
OBSDATA_A 1
13
GND4
15
OBSDATA_A 2
17
OBSDATA_A 3
19
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8
27
OBSDATA_B 0
29
OBSDATA_B 1
31
GND10
33
OBSDATA_B 2
35
OBSDATA_B 3
37
GND12
39
PWRGOO D/HOOK0
41
HOOK1
43
VCC_OBS_ AB
45
HOOK2
47
HOOK3
49
GND14
51
SDA
53
SCL
55
TCK1
57
TCK0
59
GND16
SAMTE_BSH-030-01-L-D-A
SAMTE_BSH-030-01-L-D-A
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
LPC_LDRQ1#
IRQ_SERIRQ
SATA_COMP
RH40 37.4_0402_1%~DR H40 37.4_0402_1%~D
SATA3_COMP
RH42 49.9_0402_1%~DR H42 49.9_0402_1%~D
RBIAS_SATA3
RH46 750_0402_1%~DRH46 750_0402_1%~D
SATA_ACT#
HDD_DET#_R
BBS_BIT0_R
QH1 BSS138W-7-F_SOT323-3~D
QH1 BSS138W-7-F_SOT323-3~D
PCH_PLTRST#<7,17>
SPI_PCH_CLKSPI_CLK32
SPI_PCH_DO
12
@
@
RE2
RE2
33_0402_5%~D
33_0402_5%~D
1
@
@
CE2
CE2
27P_0402_50V8J~D
27P_0402_50V8J~D
2
JXDP2
JXDP2
OBSFN_C0
OBSFN_C1
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSFN_D0
OBSFN_D1
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
ITPCLK/HOOK 4
ITPCLK#/HOO K5
VCC_OBS_ CD
RESET#/HOO K6
DBR#/HOOK 7
CONN@
CONN@
LPC_LAD0 <32,34,39,40>
LPC_LAD1 <32,34,39,40>
LPC_LAD2 <32,34,39,40>
LPC_LAD3 <32,34,39,40>
LPC_LFRAME# <32,34, 39,40>
LPC_LDRQ1# <39>
IRQ_SERIRQ <32,39,40>
PSATA_PRX_DTX_N0_C <27>
PSATA_PRX_DTX_P0_C <27>
PSATA_PTX_DRX_N0_C <27>
PSATA_PTX_DRX_P0_C <27>
SATA_ODD_PRX_DTX_N1_C <28>
SATA_ODD_PRX_DTX_P1_C <28>
SATA_ODD_PTX_DRX_N1_C <28>
SATA_ODD_PTX_DRX_P1_C <28>
ESATA_PRX_DTX_N4_C <37>
ESATA_PRX_DTX_P4_C <37>
ESATA_PTX_DRX_N4_C <37>
ESATA_PTX_DRX_P4_C <37>
SATA_PRX_DKTX_N5_C <38>
SATA_PRX_DKTX_P5_C <38>
SATA_PTX_DKRX_N5_C <38>
SATA_PTX_DKRX_P5_C <38>
1 2
1 2
1 2
SATA_ACT# <43>
D
D
1 3
G
G
2
+3.3V_SPI
1 2
RH290 0_0402_5%~D@ RH290 0_0402_5%~D@
S
S
SPI_PCH_CS1#
SPI_PCH_DO
SPI_PCH_DIN
SPI_PCH_CLK
SPI_PCH_CS0#
+1.05V_RUN
+1.05V_RUN
1
3
5
7
9
11
13
15
AMPHE_G25161021A6EU
AMPHE_G25161021A6EU
GND1
GND3
GND5
GND7
GND9
GND11
GND13
GND15
TRST#
GND17
JSPI1
JSPI1
CONN@
CONN@
TD0
TDI
TMS
1
3
5
7
9
11
13
15
G117G2
G319G4
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
2
4
6
8
10
12
14
16
1
XDP_FN16
XDP_FN17
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
XDP_FN15
+3.3V_ALW_PCH
RSMRST#_XDP
HDD
XDP_DBRESET#
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMSPCH_JTAG_TCK
PCH_GPIO33
RH355 100K_0402_5%~DRH355 100K_0402_5%~D
IRQ_SERIRQ
RH28 8.2K_0402_5%~DRH28 8.2K_0402_5%~D
BBS_BIT0_R
RH52 4.7K_0402_5%~DRH52 4.7K_0402_5%~D
INTEL feedback 0302
XDP_DBRESET# <7,16>
ODD/ E Module Bay
SPKR
RH35 10K_0402_5%~D@ RH35 10K_0402_5%~D@
No Reboot Strap
Low = Default
SPKR
High = No Reboot
E-SATA
DOCK
+3.3V_RUN
12
RH30
RH30
10K_0402_5%~D
10K_0402_5%~D
PCH_SATA_MOD_EN# <40>
PCH_SPI_CS1# SPI_PCH_CS1#
2
PCH_SPI_DO SPI_PCH_DO
4
PCH_SPI_DIN SPI_PCH_DIN
6
PCH_SPI_CLK SPI_PCH_CLK
8
PCH_SPI_CS0# SPI_PCH_CS0#
10
12
14
16
18
20
HDD_DET# <27>
RH345 0_0402_5%~DRH345 0_0402_5%~D
RH346 0_0402_5%~DRH346 0_0402_5%~D
RH347 0_0402_5%~DRH347 0_0402_5%~D
RH348 0_0402_5%~DRH348 0_0402_5%~D
RH349 0_0402_5%~DRH349 0_0402_5%~D
1 2
RH350 0_0402_5%~DRH350 0_0402_5%~D
12
12
12
12
12
12
12
+3.3V_M
+3.3V_RUN
12
+3.3V_RUN
12
+3.3V_SPI
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (1/8)
PCH (1/8)
PCH (1/8)
LA-7761P
LA-7761P
LA-7761P
14 59Wednesday, February 22, 2012
14 59Wednesday, February 22, 2012
14 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
D D
PCIE_PRX_WANTX_N 1<34>
WWAN (Mini Card 1)--->
WLAN (Mini Card 2)--->
EXPRESS Card--->
E3 Module Bay--->
1/2 MINI CARD-3 PCIE
(Mini Card 3)--->
C C
MMI --->
10/100/1G LAN --->
WWAN (Mini Card 1)--->
10/100/1G LAN --->
MMI--->
B B
PP (Mini Card 3)--->
Express card--->
WLAN (Mini Card 2)--->
eModule Bay--->
A A
PCIE_PRX_WANTX_P 1<34>
PCIE_PTX_WANRX_N 1<34>
PCIE_PTX_WANRX_P 1<34>
PCIE_PRX_WLANTX_ N2<34>
PCIE_PRX_WLANTX_ P2<34>
PCIE_PTX_WLANRX_ N2<34>
PCIE_PTX_WLANRX_ P2<34>
PCIE_PRX_EXPTX_N3<35>
PCIE_PRX_EXPTX_P3<35>
PCIE_PTX_EXPRX_N3<35>
PCIE_PTX_EXPRX_P3<35>
PCIE_PRX_EMBTX_N4<28>
PCIE_PRX_EMBTX_P4<28>
PCIE_PTX_EMBRX_N4<28>
PCIE_PTX_EMBRX_P4<28>
PCIE_PRX_WPANTX _N5<34>
PCIE_PRX_WPANTX _P5<34>
PCIE_PTX_WPANRX _N5<34>
PCIE_PTX_WPANRX _P5<34>
PCIE_PRX_MMITX_N6<33>
PCIE_PRX_MMITX_P6<33>
PCIE_PTX_MMIRX_N6<33>
PCIE_PTX_MMIRX_P6<33>
PCIE_PRX_GLANTX_N7<30>
PCIE_PRX_GLANTX_P7<30>
PCIE_PTX_GLANRX_N7<30>
PCIE_PTX_GLANRX_P7<30>
CLK_PCIE_MINI1#<34>
CLK_PCIE_MINI1<34>
+3.3V_ALW_PCH
MINI1CLK_REQ#<34>
CLK_PCIE_LAN#<30>
CLK_PCIE_LAN<30>
LANCLK_REQ#<30>
CLK_PCIE_MMI#<33>
CLK_PCIE_MMI<33>
+3.3V_RUN
MMICLK_REQ#<33>
CLK_PCIE_MINI3#<34>
CLK_PCIE_MINI3<34>
+3.3V_ALW_PCH
MINI3CLK_REQ#<34>
CLK_PCIE_EXP#< 35>
CLK_PCIE_EXP<35>
+3.3V_ALW_PCH
EXPCLK_REQ#<35>
CLK_PCIE_MINI2#<34>
CLK_PCIE_MINI2<34>
+3.3V_ALW_PCH
MINI2CLK_REQ#<34>
+3.3V_ALW_PCH
CLK_PCIE_EMB#<28>
CLK_PCIE_EMB<28>
+3.3V_ALW_PCH
EMBCLK_REQ#<28>
CLK_CPU_ITP#<7>
CLK_CPU_ITP<7>
RH307 0_0402 _5%~D@RH307 0_0402_5%~D@
RH308 0_0402 _5%~D@RH308 0_0402_5%~D@
RH81 10K_0402_5%~DRH81 10K_0402_5%~D
RH82 0_0402_5%~D@ RH82 0_0402_ 5%~D@
RH83 0_0402_5%~D@ RH83 0_0402_ 5%~D@
RH85 0_0402_5%~D@ RH85 0_0402_ 5%~D@
RH86 0_0402_5%~D@ RH86 0_0402_ 5%~D@
RH87 10K_0402_5%~DRH87 10K_04 02_5%~D
RH88 0_0402_5%~D@ RH88 0_0402_ 5%~D@
RH90 0_0402_5%~D@ RH90 0_0402_ 5%~D@
RH152 10K_0402_5%~DRH152 10K_0402_5%~D
RH92 0_0402_5%~D@ RH92 0_0402_ 5%~D@
RH93 0_0402_5%~D@ RH93 0_0402_ 5%~D@
RH94 10K_0402_5%~DRH94 10K_04 02_5%~D
RH95 0_0402_5%~D@ RH95 0_0402_ 5%~D@
RH96 0_0402_5%~D@ RH96 0_0402_ 5%~D@
RH97 10K_0402_5%~DRH97 10K_04 02_5%~D
RH98 10K_0402_5%~DRH98 10K_0402_5%~D
RH310 0_0402_5%~D@ RH310 0_0402_5%~D@
RH312 0_0402_5%~D@ RH312 0_0402_5%~D@
RH104 10K_0402_5%~DRH104 10K_0402_5%~D
RH280 0_0402_5%~D@ RH280 0_0402_5%~D@
RH281 0_0402_5%~D@ RH281 0_0402_5%~D@
PCIE REQ power rail:
suspend: 0 3 4 5 6 7
core: 1 2
5
1 2
1 2
4
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
4
PCIE_PRX_WANTX_N 1
PCIE_PRX_WANTX_P 1
PCIE_PTX_WANRX_N 1
PCIE_PTX_WANRX_P 1
PCIE_PRX_WLANTX_ N2
PCIE_PRX_WLANTX_ P2
PCIE_PTX_WLANRX_ N2
PCIE_PTX_WLANRX_ P2
PCIE_PRX_EXPTX_N3
PCIE_PRX_EXPTX_P3
PCIE_PTX_EXPRX_N3
PCIE_PTX_EXPRX_P3
PCIE_PRX_EMBTX_N4
PCIE_PRX_EMBTX_P4
PCIE_PTX_EMBRX_N4
PCIE_PTX_EMBRX_P4
PCIE_PRX_WPANTX _N5
PCIE_PRX_WPANTX _P5
PCIE_PTX_WPANRX _N5
PCIE_PTX_WPANRX _P5
PCIE_PRX_MMITX_N6
PCIE_PRX_MMITX_P6
PCIE_PTX_MMIRX_N6
PCIE_PTX_MMIRX_P6
PCIE_PRX_GLANTX_N7
PCIE_PRX_GLANTX_P7
PCIE_PTX_GLANRX_N7
PCIE_PTX_GLANRX_P7
PCIE_MINI1#
PCIE_MINI1
MINI1CLK_REQ#
PCIE_LAN#
PCIE_LAN
LANCLK_REQ#
PCIE_MMI#
PCIE_MMI
MMICLK_REQ#
PCIE_MINI3#
PCIE_MINI3
MINI3CLK_REQ#
PCIE_EXP#
PCIE_EXP
EXPCLK_REQ#
PCIE_MINI2#
PCIE_MINI2
MINI2CLK_REQ#
PEG_B_CLKRQ#
PCIE_EMB#
PCIE_EMB
EMBCLK_REQ#
CLK_BCLK_ITP#
CLK_BCLK_ITP
UH4B
UH4B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0# / GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1# / GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2# / GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4# / GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5# / GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ# / GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6# / GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7# / GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
3
PCH_SMB_ALERT#
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
XTAL25_IN
E12
H14
C9
A12
C8
G12
C13
E14
M16
M7
T11
P10
M10
AB37
AB38
AV22
AU22
AM12
AM13
BF18
BE18
BJ30
BG30
G24
E24
AK7
AK5
K45
H45
V47
V49
Y47
K43
F47
H47
K49
PCI_TPM_TCM
SIO_14M
CLK_80H
JETWAY_14M
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH
LAN_SMBCLK
LAN_SMBDATA
PCH_GPIO74
SML1_SMBCLK
SML1_SMBDATA
PCH_CL_CLK1
PCH_CL_DATA1
PCH_CL_RST1#
PEG_A_CLKRQ#
CLK_CPU_DMI#
CLK_CPU_DMI
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
CLK_PCI_LOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SMBUSController
SMBUSController
SML1ALERT# / PCHHOT# / GPIO74
PCI-E*
PCI-E*
CLOCKS
CLOCKS
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
FLEX CLOCKS
FLEX CLOCKS
2
MEM_SMBCLK
MEM_SMBDATA
DDR_HVREF_RST_PCH <7>
LAN_SMBCLK <30>
LAN_SMBDATA <30>
SML1_SMBCLK <40>
SML1_SMBDATA <40>
PCH_CL_CLK1 <34>
PCH_CL_DATA1 <34>
PCH_CL_RST1# <34>
CLK_CPU_DMI# <7>
CLK_CPU_DMI <7>
CLK_PCI_LOOPBACK <17>
1 2
RH100 90.9_0402_1%~DRH100 90.9_0402_1%~D
RH311 22_0402_5%~DRH311 22_0402_5%~D
RH313 22_0402_5%~DRH313 22_0402_5%~D
RH314 22_0402_5%~DRH314 22_0402_5%~D
RH315 22_0402_5%~D@ RH315 22_0402_5%~D@
2
3
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+1.05V_RUN
12
12
12
12
+3.3V_RUN
5
QH5B
QH5B
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
6 1
4
CLK_BUF_DMI#
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD
CLK_PCH_14M
QH5A
QH5A
SML1_SMBCLK
SML1_SMBDATA
DDR_HVREF_RST_PCH
PCH_GPIO74
MEM_SMBCLK
MEM_SMBDATA
PCH_SMB_ALERT#
PEG_A_CLKRQ#
LAN_SMBCLK
LAN_SMBDATA
1
DDR_XDP_WAN_ SMBCLK <7,12,13,14,27,34>
DDR_XDP_WAN_ SMBDAT <7,12,13,14,27,34>
+3.3V_ALW_PCH
1 2
RH298 2.2K_0402_5%~DRH298 2.2K_0402_5%~D
1 2
RH299 2.2K_0402_5%~DRH299 2.2K_0402_5%~D
RH300 1K_0402_5%~DRH300 1K_0402_5%~D
RH301 10K_0402_5%~DRH301 10K_0402_5%~D
RH302 2.2K_0402_5%~DRH302 2.2K_0402_5%~D
RH303 2.2K_0402_5%~DRH303 2.2K_0402_5%~D
RH304 10K_0402_5%~DRH304 10K_0402_5%~D
RH80 10K_0402_5%~DRH80 10K_0402_5%~D
RH305 2.2K_0402_5%~DRH305 2.2K_0402_5%~D
RH306 2.2K_0402_5%~DRH306 2.2K_0402_5%~D
1 2
RH74 10K_0402_5%~DRH74 10K_04 02_5%~D
1 2
RH75 10K_0402_5%~DRH75 10K_04 02_5%~D
1 2
RH91 10K_0402_5%~DRH91 10K_04 02_5%~D
1 2
RH76 10K_0402_5%~DRH76 10K_04 02_5%~D
1 2
RH77 10K_0402_5%~DRH77 10K_04 02_5%~D
1 2
RH78 10K_0402_5%~DRH78 10K_04 02_5%~D
1 2
RH79 10K_0402_5%~DRH79 10K_04 02_5%~D
1 2
RH183 10K_0402_5%~DRH183 10K_0402_5%~D
+3.3V_ALW_PCH
12
12
12
12
12
12
+3.3V_LAN
12
12
CLOCK TERMINATION for FCIM and need close to PCH
12
YH2
YH2
3
4
OUT
GND
GND
1
IN
2
CLK_PCI_TPM_TCM <32>
CLK_SIO_14M <39>
PCLK_80H < 34>
JETWAY_CLK14M <32>
12
RH99
RH99
1M_0402_5%~D
1M_0402_5%~D
CH18
CH18
10P_0402_50V8J
10P_0402_50V8J
RH309 0_0402_5%~D@ RH309 0_0402_5%~D@
25MHZ_10PF_Q22FA2380049900~D
25MHZ_10PF_Q22FA2380049900~D
2
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (2/8)
PCH (2/8)
PCH (2/8)
LA-7761P
LA-7761P
LA-7761P
1
2
CH19
CH19
1
10P_0402_50V8J
10P_0402_50V8J
1.0
1.0
15 59Wednesday, February 22, 2012
15 59Wednesday, February 22, 2012
15 59Wednesday, February 22, 2012
1.0
5
+3.3V_ALW_PCH
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3
DMI_COMP_R
RBIAS_CPY
SUSACK#_R
SYS_RESET#
SYS_PWROK_R
PCH_PWROK
PM_DRAM_PWRGD_R
PCH_RSMRST#_R
ME_SUS_PWR_ACK_R
SIO_PWRBTN#_R
AC_PRESENT
PCH_BATLOW#
PCH_RI#
SUS_STAT#/LPCPD#
ME_SUS_PWR_ACK
PCH_PCIE_WAKE#
SIO_SLP_LAN#
PCH_RI#
CLKRUN#
ME_RESET#
PM_APWROK_R
UH4C
UH4C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT / GPIO31
E10
BATLOW# / GPIO72
A10
RI#
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
1 2
RH318 10K_0402_5%~D@ RH318 10K_0402_5%~D@
1 2
RH144 10K_0402_5%~DRH144 10K_0402_5%~D
D D
+3.3V_RUN
C C
+1.05V_RUN
1 2
RH111 49.9_0402_1%~ DRH111 49.9_04 02_1%~D
1 2
RH112 750_0402_1%~DRH112 75 0_0402_1%~D
SUSACK#<39> PCH_DPWROK < 39>
B B
SYS_PWROK<7 ,39>
RESET_OUT#<40>
PM_DRAM_PWRGD<7>
PCH_RSMRST#_Q
ME_SUS_PWR_ACK<40>
SIO_PWRBTN#_R<7,14>
SIO_PWRBTN#<40>
AC_PRESENT<40>
+3.3V_ALW_PCH
A A
1 2
RH142 10K_0402_5%~DRH142 10K_0402_5%~D
1 2
RH319 10K_0402_5%~D@ RH319 10K_0402_5%~D@
1 2
RH140 10K_0402_5%~DRH140 10K_0402_5%~D
1 2
RH137 8 .2K_0402_5%~DRH137 8 .2K_0402_5%~D
1 2
RH138 8 .2K_0402_5%~D@ RH138 8.2K_0 402_5%~D@
DMI_CTX_PRX_N0<6>
DMI_CTX_PRX_N1<6>
DMI_CTX_PRX_N2<6>
DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P0<6>
DMI_CTX_PRX_P1<6>
DMI_CTX_PRX_P2<6>
DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N0<6>
DMI_CRX_PTX_N1<6>
DMI_CRX_PTX_N2<6>
DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P0<6>
DMI_CRX_PTX_P1<6>
DMI_CRX_PTX_P2<6>
DMI_CRX_PTX_P3<6>
1 2
RH114 0_0402_5%~D@ RH114 0_0402_5%~D@
1 2
RH116 0_0402_5%~D@ RH116 0_0402_5%~D@
1 2
RH117 0_0402_5%~D@ RH117 0_0402_5%~D@
1 2
RH320 0_0402_5%~D@ RH320 0_0402_5%~D@
1 2
RH120 0_0402_5%~D@ RH120 0_0402_5%~D@
1 2
RH121 0_0402_5%~D@ RH121 0_0402_5%~D@
1 2
RH122 0_0402_5%~D@ RH122 0_0402_5%~D@
1 2
RH139 8.2K_0402_5%~DRH139 8.2K_0402_5%~D
4
XDP_DBRESET#<7,14>
PCH_DPWROK PCH_RSMRST#_R
ME_SUS_PWR_ACK_R SUSACK#_R
DMI
FDI
DMI
FDI
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
System Power Management
System Power Management
SLP_LAN# / GPIO29
RH141 8 .2K_0402_5%~D@ RH141 8.2K_0 402_5%~D@
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
SLP_SUS#
PMSYNCH
FDI_INT
WAKE#
SLP_S4#
SLP_S3#
SLP_A#
12
RH113 0_0402_5%~D@ RH113 0_0402_5%~D@
RH321 0_0402_5%~D@ RH321 0_0402_5%~D@
RH323 0_0402_5%~D@ RH323 0_0402_5%~D@
1 2
1 2
1 2
RH357 0_0402 _5%~D@ RH357 0_0402_5%~D@
ME_RESET#
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
1 2
+3.3V_RUN
UC3
@UC3
@
1
B
2
A
SYS_PWROKRESET_OUT#
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWODVREN
PCH_DPWROK
PCH_PCIE_WAKE#
CLKRUN#
SUS_STAT#/LPCPD#
SUSCLK
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_A#
SIO_SLP_SUS#
H_PM_SYNC
SIO_SLP_LAN#
CH99
@CH99
@
1 2
5
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
P
4
O
G
74AHC1G09GW_TSSOP5~D
74AHC1G09GW_TSSOP5~D
3
FDI_CTX_PRX_N0 <6>
FDI_CTX_PRX_N1 <6>
FDI_CTX_PRX_N2 <6>
FDI_CTX_PRX_N3 <6>
FDI_CTX_PRX_N4 <6>
FDI_CTX_PRX_N5 <6>
FDI_CTX_PRX_N6 <6>
FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6>
FDI_CTX_PRX_P1 <6>
FDI_CTX_PRX_P2 <6>
FDI_CTX_PRX_P3 <6>
FDI_CTX_PRX_P4 <6>
FDI_CTX_PRX_P5 <6>
FDI_CTX_PRX_P6 <6>
FDI_CTX_PRX_P7 <6>
FDI_INT <6>
FDI_FSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC0 <6>
FDI_LSYNC1 <6>
RH127 3 30K_0402_1%~DRH127 3 30K_0402_1%~D
1 2
RH129 3 30K_0402_1%~D@ RH129 330K_0402_1%~D@
1 2
PCH_PCIE_WAKE# <40>
CLKRUN# <32,39,40>
T56 PAD~DT56 PAD~D
T57 PAD~DT57 PAD~D
T58 PAD~DT58 PAD~D
SIO_SLP_S5# <40>
T59 PAD~DT59 PAD~D
SIO_SLP_S4# <39,42,46>
SIO_SLP_S3# <11,27,35,36,39,42,47>
SIO_SLP_A# <39,42,48>
T62 PAD~DT62 PAD~D
SIO_SLP_SUS# <39>
T63 PAD~DT63 PAD~D
H_PM_SYNC <7>
SIO_SLP_LAN# <30,39>
SYS_RESET#
PM_APWROK< 40>
3
1 2
RH131 150 _0402_1%~DRH131 150_0402_1%~D
1 2
RH132 150 _0402_1%~DRH132 150_0402_1%~D
1 2
RH133 150 _0402_1%~DRH133 150_0402_1%~D
1 2
RH134 100 K_0402_5%~DRH134 100 K_0402_5%~D
+3.3V_ALW2
5
UH5
SIO_SLP_A#
PM_APWROK
PANEL_BKEN_PCH<24>
BIA_PWM_PCH<2 4>
LDDC_CLK_PCH<24>
LDDC_DATA_PCH<24>
Minimum speacing of 20mils for LVD_IBG
+RTC_CELL
PCH_CRT_HSYNC<23>
PCH_CRT_VSYNC<23>
RH344 2.3 7K_0402_1%~DRH344 2.37K_0402_1%~D
LCD_ACLK-_PCH<24>
LCD_ACLK+_PCH<24>
LCD_A0-_PCH< 24>
LCD_A1-_PCH< 24>
LCD_A2-_PCH< 24>
LCD_A0+_PCH< 24>
LCD_A1+_PCH< 24>
LCD_A2+_PCH< 24>
LCD_BCLK-_PCH<24>
LCD_BCLK+_PCH<24>
LCD_B0-_PCH< 24>
LCD_B1-_PCH< 24>
LCD_B2-_PCH< 24>
LCD_B0+_PCH< 24>
LCD_B1+_PCH< 24>
LCD_B2+_PCH< 24>
PCH_CRT_BLU<23>
PCH_CRT_GRN<23>
PCH_CRT_RED<23>
UH5
1
P
B
O
2
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
1 2
RH118 0_0402_5%~D@ RH118 0_0402_5%~D@
ENVDD_PCH<24,39 >
1 2
RH123 20_0402_1%~DRH123 20 _0402_1%~D
1 2
1 2
RH124 20_0402_1%~DRH124 20 _0402_1%~D
1K_0402_0.5%~D
1K_0402_0.5%~D
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
CH108
CH108
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
PM_APWROK_R
4
PANEL_BKEN_PCH
ENVDD_PCH
BIA_PWM_PCH
LDDC_CLK_PCH
LDDC_DATA_PCH
LVD_IBG
LCD_ACLK-_PCH
LCD_ACLK+_PCH
LCD_A0-_PCH
LCD_A1-_PCH
LCD_A2-_PCH
LCD_A0+_PCH
LCD_A1+_PCH
LCD_A2+_PCH
LCD_BCLK-_PCH
LCD_BCLK+_PCH
LCD_B0-_PCH
LCD_B1-_PCH
LCD_B2-_PCH
LCD_B0+_PCH
LCD_B1+_PCH
LCD_B2+_PCH
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
HSYNC
VSYNC
CRT_IREF
12
RH126
RH126
2
2.2K_0402_5%~D
2.2K_0402_5%~D
DSWODVREN - On Die DSW VR Enable
Enabled (DEFAULT)
HIGH: RH127 STUFFED,
RH129 UNSTUFFED
Disabled
LOW: RH129 STUFFED,
RH127 UNSTUFFED
Intel request DDPB can not support eDP
UH4D
UH4D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
LVDS
LVDS
Digital Display Interface
Digital Display Interface
CRT
CRT
+3.3V_RUN
2.2K_0402_5%~D
2.2K_0402_5%~D
12
12
RH316
RH316
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
RH317
RH317
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
PCH_SDVO_CTRLCLK
PCH_SDVO_CTRLDATA
PCH_SDVO_CTRLCLK
PCH_SDVO_CTRLDATA
HDMIB_PCH_HPD <25>
TMDSB_PCH_N2 <25>
TMDSB_PCH_P2 <25>
TMDSB_PCH_N1 <25>
TMDSB_PCH_P1 <25>
TMDSB_PCH_N0 <25>
TMDSB_PCH_P0 <25>
TMDSB_PCH_CLK# <25>
TMDSB_PCH_CLK <25>
PCH_DDPC_CTRLCLK <26>
PCH_DDPC_CTRLDATA <26>
DPC_PCH_DOCK_AUX# <2 6>
DPC_PCH_DOCK_AUX <26 >
DPC_PCH_DOCK_HPD <38>
DPC_PCH_LANE_N0 <3 8>
DPC_PCH_LANE_P0 <38>
DPC_PCH_LANE_N1 <3 8>
DPC_PCH_LANE_P1 <38>
DPC_PCH_LANE_N2 <3 8>
DPC_PCH_LANE_P2 <38>
DPC_PCH_LANE_N3 <3 8>
DPC_PCH_LANE_P3 <38>
PCH_DDPD_CTRLCLK <26>
PCH_DDPD_CTRLDATA <26>
DPD_PCH_DOCK_AUX# <2 6>
DPD_PCH_DOCK_AUX <26 >
DPD_PCH_DOCK_HPD <38>
DPD_PCH_LANE_N0 <3 8>
DPD_PCH_LANE_P0 <38>
DPD_PCH_LANE_N1 <3 8>
DPD_PCH_LANE_P1 <38>
DPD_PCH_LANE_N2 <3 8>
DPD_PCH_LANE_P2 <38>
DPD_PCH_LANE_N3 <3 8>
DPD_PCH_LANE_P3 <38>
1
PCH_CRT_DDC_CLK <23>
PCH_CRT_DDC_DAT <23>
RH351 2 .2K_0402_5%~DRH351 2 .2K_0402_5%~D
RH352 2 .2K_0402_5%~DRH352 2 .2K_0402_5%~D
12
12
PCH_SDVO_CTRLCLK <25 >
PCH_SDVO_CTRLDATA <25>
+3.3V_RUN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sh eet of
Date: Sh eet of
Date: Sh eet of
Compal Electronics, Inc.
PCH (3/8)
PCH (3/8)
PCH (3/8)
LA-7761P
LA-7761P
LA-7761P
1
16 59Wednesday, February 22, 2012
16 59Wednesday, February 22, 2012
16 59Wednesday, February 22, 2012
1.0
1.0
1.0
+3.3V_RUN
5
4
3
2
1
1 2
RH324 8.2K_0402_5%~DRH324 8.2K_0402_5%~D
1 2
RH325 8.2K_0402_5%~DRH325 8.2K_0402_5%~D
1 2
RH326 8.2K_0402_5%~DRH326 8.2K_0402_5%~D
D D
C C
1 2
RH329 8.2K_0402_5%~DRH329 8.2K_0402_5%~D
1 2
RH327 10K_0402_5%~DRH327 10K_0402_5%~D
1 2
RH330 10K_0402_5%~DRH330 10K_0402_5%~D
1 2
RH331 10K_0402_5%~DRH331 10K_0402_5%~D
1 2
RH328 10K_0402_5%~DRH328 10K_0402_5%~D
1 2
RH332 10K_0402_5%~DRH332 10K_0402_5%~D
1 2
RH359 10K_0402_5%~DRH359 10K_0402_5%~D
PCI_GNT3#
12
RH333
@RH333
@
1K_0402_5%~D
1K_0402_5%~D
A16 swap overri de Strap/Top-B lock
Swap Override jumper
PCI_GNT#3
B B
1
CH20
CH20
8.2P_0402_50V8D~D
8.2P_0402_50V8D~D
2
Low = A16 swap
High = Default
1
2
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
LCD_CBL_DET#
CAM_MIC_CBL_DET#
BT_DET#
PCH_GPIO3
PCIE_MCARD2_DET#
PLTRST_USH#<32>
PLTRST_MMI#<33>
PLTRST_XDP#<7>
PLTRST_LAN#<30>
PLTRST_EMB#<28>
CH21
CH21
8.2P_0402_50V8D~D
8.2P_0402_50V8D~D
HDD_FALL_INT<27>
1 2
RH335 0_0402_5%~D@RH335 0_0402_5%~D@
1 2
RH336 0_0402_5%~D@RH336 0_0402_5%~D@
1 2
RH337 0_0402_5%~D@RH337 0_0402_5%~D@
1 2
RH338 0_0402_5%~D@RH338 0_0402_5%~D@
1 2
RH340 0_0402_5%~D@RH340 0_0402_5%~D@
CLK_PCI_5048<39>
CLK_PCI_MEC<40>
CLK_PCI_DOCK<38>
CLK_PCI_LOOPBACK<15>
CLK_PCI_5048CLK_PCI_MEC CLK_PC I_LOOPBACK
1
CH110
CH110
8.2P_0402_50V8D~D
8.2P_0402_50V8D~D
2
USB3RN1<36>
USB3RN2<36>
USB3RN4<38>
USB3RP1<3 6>
USB3RP2<3 6>
USB3RP4<3 8>
USB3TN1<36>
USB3TN2<36>
USB3TN4<38>
USB3TP1<36>
USB3TP2<36>
USB3TP4<38>
PCIE_MCARD2_DET#<34>
BT_DET#<41>
LCD_CBL_DET#<24>
CAM_MIC_CBL_DET#<24>
1 2
RH334 0_0402_5%~D@ RH334 0_0402_5%~D@
RH160 22_0402_5%~DRH160 22_0402_5%~D
RH102 33_0402_5%~DRH102 33_0402_5%~D
RH103 22_0402_5%~DRH103 22_0402_5%~D
12
1 2
12
1 2
RH105 33_040 2_5%~DRH105 33_ 0402_5%~D
T72PAD~D @T72PAD~D @
T64PAD~D @T64PAD~D @
T73PAD~D @T73PAD~D @
T65PAD~D @T65PAD~D @
T74PAD~D @T74PAD~D @
T66PAD~D @T66PAD~D @
T67PAD~D @T67PAD~D @
T75PAD~D @T75PAD~D @
T76PAD~D @T76PAD~D @
T77PAD~D @T77PAD~D @
T68PAD~D @T68PAD~D @
T69PAD~D @T69PAD~D @
T78PAD~D @T78PAD~D @
T79PAD~D @T79PAD~D @
T80PAD~D @T80PAD~D @
T70PAD~D @T70PAD~D @
T81PAD~D @T81PAD~D @
T71PAD~D @T71PAD~D @
T82PAD~D @T82PAD~D @
T83PAD~D @T83PAD~D @
T84PAD~D @T84PAD~D @
T85PAD~D @T85PAD~D @
T86PAD~D @T86PAD~D @
T87PAD~D @T87PAD~D @
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
BT_DET#
BBS_BIT1
PCI_GNT3#
LCD_CBL_DET#
PCH_GPIO3
CAM_MIC_CBL_DET#
FFS_PCH_INT
T104PAD~D @T104PAD~D @
PCH_PLTRST#
PCI_5048
PCI_MEC
PCI_DOCK
PCI_LOOPBACKOUT
UH4E
UH4E
BG26
TP1
BJ26
TP2
BH25
TP3
BJ16
TP4
BG16
TP5
AH38
TP6
AH37
TP7
AK43
TP8
AK45
TP9
C18
TP10
N30
TP11
H3
TP12
AH12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
AB46
TP19
AB45
TP20
B21
TP21
M20
TP22
AY16
TP23
BG46
TP24
BE28
USB3Rn1
BC30
USB3Rn2
BE32
USB3Rn3
BJ32
USB3Rn4
BC28
USB3Rp1
BE30
USB3Rp2
BF32
USB3Rp3
BG32
USB3Rp4
AV26
USB3Tn1
BB26
USB3Tn2
AU28
USB3Tn3
AY30
USB3Tn4
AU26
USB3TP1
AY26
USB3Tp2
AV28
USB3Tp3
AW30
USB3Tp4
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1# / GPIO50
C44
REQ2# / GPIO52
E40
REQ3# / GPIO54
D47
GNT1# / GPIO51
E42
GNT2# / GPIO53
F46
GNT3# / GPIO55
G42
PIRQE# / GPIO2
G40
PIRQF# / GPIO3
C42
PIRQG# / GPIO4
D44
PIRQH# / GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
AY7
RSVD1
AV7
RSVD2
AU3
RSVD3
BG4
RSVD4
AT10
RSVD5
BC8
RSVD6
AU2
RSVD7
AT4
RSVD8
AT3
RSVD9
AT1
RSVD10
AY3
RSVD11
AT5
RSVD12
AV3
RSVD13
AV1
RSVD14
BB1
RSVD15
BA3
RSVD16
BB5
RSVD17
BB3
RSVD18
BB7
RSVD19
BE8
RSVD20
BD4
RSVD21
BF6
RSVD22
AV5
RSVD
RSVD
USB30
USB30
PCI
PCI
USB
USB
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+
USBP11USBP11+
USBP12USBP12+
USBP13USBP13+
USBRBIAS
USB_OC0#_R
USB_OC1#_R
USB_OC2#
USB_OC3#
USB_OC4#_R
USB_OC5#
USB_OC6#
USBP0- <36>
USBP0+ <36>
USBP1- <36>
USBP1+ <36>
USBP2- <37>
USBP2+ <37>
USBP3- <38>
USBP3+ <38>
USBP4- <34>
USBP4+ <34>
USBP5- <34>
USBP5+ <34>
USBP6- <38>
USBP6+ <38>
USBP7- <32>
USBP7+ <32>
USBP8- <34>
USBP8+ <34>
USBP9- <36>
USBP9+ <36>
USBP10- <35>
USBP10+ <35>
USBP11- <41>
USBP11+ <41>
USBP12- <24>
USBP12+ <24>
USBP13- <24>
USBP13+ <24>
1 2
RH151
RH151
22.6_0402_1%~D
22.6_0402_1%~D
Route single-end 50-ohms and max 500-mils length.
Minimum spacing to other signals: 15 mils
1 2
RH339 0_0402_5%~D@RH339 0_0402_5%~D@
1 2
RH341 0_0402_5%~D@RH341 0_0402_5%~D@
1 2
RH356 0_0402_5%~D@RH356 0_0402_5%~D@
SIO_EXT_SMI#
----->Right Side Top
----->Right Side Bottom
----->Right side E-SATA
----->MLK DOCK
----->WLAN/WIMAX
----->WWAN/UWB
----->DOCK
----->USH
----->Flash
----->Left side
----->Express Card
----->Blue Tooth
----->Camera
----->LCD Touch
USB_OC0# <36>
USB_OC1# <36>
USB_OC2# <14>
USB_OC3# <14>
USB_OC4# <36>
USB_OC5# <14>
USB_OC6# <14>
SIO_EXT_SMI# <14,40>
USB_OC0#_R <14>
USB_OC1#_R <14>
USB_OC4#_R <14>
INTEL feedback 0307
USB_OC0#_R
USB_OC1#_R
USB_OC3#
USB_OC4#_R
USB_OC5#
USB_OC6#
SIO_EXT_SMI#
USB_OC2#
+3.3V_ALW_PCH
RPH1
RPH1
4 5
3 6
2 7
1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
RPH2
RPH2
4 5
3 6
2 7
1 8
10K_1206_8P4R_5%~D
10K_1206_8P4R_5%~D
For RF noise
solution.
A A
PCH_PLTRST#<7,14>
PCH_PLTRST#
5
+3.3V_RUN
1
B
2
A
5
P
G
3
CH102
CH102
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
UH3
UH3
PCH_PLTRST#_EC
4
O
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
PCH_PLTRST#_EC <32,34,35,39,40>
4
Boot BIOS Strap
BBS_BIT1 Boot BIOS Location
*
SATA_SLPD
(BBS_BIT0)
0 0
0 1
1 0
1 1
LPC
Reserved (NAND)
PCI
SPI
3
BBS_BIT1
12
RH342
@RH342
@
1K_0402_5%~D
1K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PCH (4/8)
PCH (4/8)
PCH (4/8)
LA-7761P
LA-7761P
LA-7761P
17 59Wednesday, February 22, 2012
17 59Wednesday, February 22, 2012
17 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
4
3
2
1
+3.3V_ALW_PCH
RH53
RH53
4.7K_0402_5%~D
D D
C C
B B
A A
4.7K_0402_5%~D
1 2
SLP_ME_CSW_DE V#
12
RH353
RH353
1K_0402_5%~D
1K_0402_5%~D
@
@
Note: PCH has internal pull up 20k ohm on
E3_PAID_TS_DET# (GPIO27)
SLP_ME_CSW_DEV# PLL ON DIE VR ENABLE
ENABLED - HIGH DEFAULT
DISABLED - LOW
+3.3V_ALW_PCH
SIO_EXT_WAKE# USH_DET#
RH177 10K_0402_5%~DRH177 10K_0402_5%~D
RH354 1K_0402_5%~DRH354 1K_0402_5%~D
+3.3V_ALW_PCH
RH170 10K_0402_5%~DRH170 10K_0402_5%~D
+3.3V_RUN
RH171 10K_0402_5%~D@ RH171 10K_0402_5%~D@
RH173 1K_0 402_5%~D@ RH173 1K_0402_5%~D@
RH272 10K_0402_5%~DRH272 10K_0402_5%~D
RH266 10K_0402_5%~DRH266 10K_0402_5%~D
RH181 10K_0402_5%~DRH181 10K_0402_5%~D
RH178 10K_0402_5%~DRH178 10K_0402_5%~D
1 2
RH269 8.2K_0402_5%~DRH269 8.2K_0402_5%~D
1 2
RH163 10K_0402_5%~DRH163 10K_0402_5%~D
12
12
12
12
12
12
12
12
PCH_GPIO15
PCH_GPIO36
12
PCH_GPIO37
12
PCH_GPIO17
12
PCH_GPIO16
12
KB_DET#
PCH_GPIO36
PCH_GPIO37
PCH_GPIO16
TEMP_ALERT#
MEDIA_DET#
IO1_LOOP#
PCH_GPIO17
IO_LOOP#
5
1 2
RH174 10K_0402_5%~DRH174 10K_0402_5%~D
RH172 10K_0402_5%~DRH172 10K_0402_5%~D
RH273 1K_0402_5%~D@ RH273 1K_0402_5%~D@
RH265 10K_0402_5%~D@ RH265 10K_0402_5%~D@
SIO_EXT_SCI#_R<14>
SIO_EXT_SCI#<40>
USH_DET#<32>
IO_LOOP#<36>
IO1_LOOP#<36>
SIO_EXT_WAKE#<39>
PM_LANPHY_ENABLE<30>
PCH_GPIO15<14>
PCH_GPIO16<14>
MEDIA_DET#<36 >
PCIE_MCARD1_DET#<34>
E3_PAID_TS_DET#<24>
SLP_ME_CSW_DE V#<14,39>
USB_MCARD1_DET#<14,34>
PCH_GPIO36<14>
PCH_GPIO37<14>
TEMP_ALERT#<14,39>
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
+3.3V_RUN
TPM_ID0
FFS_INT2<27>
KB_DET#<41>
RH267
1@ RH267
1@
10K_0402_5%~D
10K_0402_5%~D
1 2
12
RH270
2@ RH270
2@
10K_0402_5%~D
10K_0402_5%~D
SIO_EXT_SCI#
1 2
RH259 0_0402_5%~D@ RH259 0_0402_5%~D@
USH_DET#
IO_LOOP#
IO1_LOOP#
PM_LANPHY_ENABLE
PCH_GPIO15
PCH_GPIO16
PCH_GPIO17
MEDIA_DET#
E3_PAID_TS_DET#
SLP_ME_CSW_DE V#
USB_MCARD1_DET#
PCH_GPIO36
PCH_GPIO37
TPM_ID0
TPM_ID1
FFS_INT2
TEMP_ALERT#
KB_DET#
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
+3.3V_RUN
3@ RH268
3@
TPM_ID1
4@ RH271
4@
4
12
RH268
20K_0402_5%~D
20K_0402_5%~D
12
RH271
2.2K_0402_5%~D
2.2K_0402_5%~D
UH4F
UH4F
T7
BMBUSY# / GPIO0
A42
TACH1 / GPIO1
H36
TACH2 / GPIO6
E38
TACH3 / GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL / GPIO12
G2
GPIO15
U2
SATA4GP / GPIO16
D40
TACH0 / GPIO17
T5
SCLOCK / GPIO22
E8
GPIO24
E16
GPIO27
P8
GPIO28
K1
STP_PCI# / GPIO34
K4
GPIO35
V8
SATA2GP / GPIO36
M5
SATA3GP / GPIO37
N2
SLOAD / GPIO38
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
V3
SATA5GP / GPIO49 / TEMP_ALERT#
D6
GPIO57
A4
VSS_NCTF_1
A44
VSS_NCTF_2
A45
VSS_NCTF_3
A46
VSS_NCTF_4
A5
VSS_NCTF_5
A6
VSS_NCTF_6
B3
VSS_NCTF_7
B47
VSS_NCTF_8
BD1
VSS_NCTF_9
BD49
VSS_NCTF_10
BE1
VSS_NCTF_11
BE49
VSS_NCTF_12
BF1
VSS_NCTF_13
BF49
VSS_NCTF_14
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
China TPM
No TPM, No China TPM
TBD
TPM
GPIO
GPIO
NCTF
NCTF
TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71
A20GATE
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
CPU/MISC
CPU/MISC
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
0
0
1 1
3
PECI
RCIN#
NC_1
TPM_ID1TPM_ID0
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
0
1
CONTACTLESS_DET#
PCH_GPIO69
PCIE_MCARD3_DET#
SIO_A20GATE
SIO_RCIN#
H_CPUPWRGD
PCH_THRMTRIP#_R
INIT3_3V#
DF_TVS
NC_1
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
CONTACTLESS_DET# <32>
PCIE_MCARD3_DET# <34>
USB_MCARD2_DET# <34>
SIO_A20GATE <40>
SIO_RCIN# <40>
H_CPUPWRGD <7>
T106PAD~D@T106PAD~D
@
T108PAD~D @T108PAD~D @
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
1
2
H_SNB_IVB#<7>
2
+1.05V_RUN_VTT
12
RH262 56_0402_5%~DRH262 56_0402_5%~D
CH97
CH97
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
RH150 0_0402_5%~D@ RH150 0_0402_5%~D@
CONTACTLESS_DET#
PCH_GPIO69
1 2
RH256 10K _0402_5%~DRH256 10K_0402_5%~D
1 2
RH260 1.5K_0402 _1%~DRH260 1.5K_0402_1%~D
SIO_A20GATE
SIO_RCIN#
SIO_EXT_SCI#
PLACE RH150 CLO SE TO THE BRAN CHING POINT
( TO CPU and NV RAM CONNECTOR)
+VCCDFTERM
12
RH158 10K_0402_5%~DRH158 10K_0402_5%~D
RH203 10K_0402_5%~DRH203 10K_0402_5%~D
1 2
RH263 10K_0402_5%~DRH263 10K_0402_5%~D
1 2
RH164 100K_0402_5%~DRH164 100K_0402_5%~D
RH149 need to close to CPU
RH149
RH149
2.2K_0402_5%~D
2.2K_0402_5%~D
1 2
RH358 1K_ 0402_5%~DRH358 1K_0402_5%~D
DMI & FDI Termination Voltage
DF_TVS
Set to Vss when LOW
Set to Vcc when HIGH
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (5/8)
PCH (5/8)
PCH (5/8)
LA-7761P
LA-7761P
LA-7761P
+3.3V_RUN
12
+3.3V_RUN
12
12
DF_TVSDF_TVS_R
1.0
1.0
18 59Wednesday, February 22, 2012
18 59Wednesday, February 22, 2012
18 59Wednesday, February 22, 2012
1
1.0
5
4
3
2
1
LH1
POWER
+1.05V_RUN
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
CH30
CH30
D D
+1.05V_RUN
+1.05V_RUN
C C
+3.3V_RUN
B B
@ RH247
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
1 2
RH247
CH51
CH51
2
+1.05V_RUN
1UH_LB2012T1R0M_20%~D
1UH_LB2012T1R0M_20%~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH44
CH44
CH45
CH45
2
2
+1.05V_RUN
+1.05V_RUN_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
2
1
2
+1.05V_+1.5V_1.8V_RUN
CH33
CH33
CH32
CH32
2
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH46
CH46
CH47
CH47
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH31
CH31
2
+VCCAPLLEXP
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@
@
CH40
CH40
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH48
CH48
+VCCAPLL_FDI
UH4G
UH4G
AA23
VCCCORE[1]
AC23
VCCCORE[2]
AD21
VCCCORE[3]
AD23
VCCCORE[4]
AF21
VCCCORE[5]
AF23
VCCCORE[6]
AG21
VCCCORE[7]
AG23
VCCCORE[8]
AG24
VCCCORE[9]
AG26
VCCCORE[10]
AG27
VCCCORE[11]
AG29
VCCCORE[12]
AJ23
VCCCORE[13]
AJ26
VCCCORE[14]
AJ27
VCCCORE[15]
AJ29
VCCCORE[16]
AJ31
VCCCORE[17]
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
VCCIO[15]
AN17
VCCIO[16]
AN21
VCCIO[17]
AN26
VCCIO[18]
AN27
VCCIO[19]
AP21
VCCIO[20]
AP23
VCCIO[21]
AP24
VCCIO[22]
AP26
VCCIO[23]
AT24
VCCIO[24]
AN33
VCCIO[25]
AN34
VCCIO[26]
BH29
VCC3_3[3]
AP16
VCCVRM[2]
BG6
VccAFDIPLL
AP17
VCCIO[27]
AU20
VCCDMI[2]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRTLVDS
CRTLVDS
DMI
DMI
DFT / SPI HVCMOS
DFT / SPI HVCMOS
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCDFTERM[1]
VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]
VCCSPI
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
+VCCADAC
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
CH34
CH34
2
2
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
CH103
CH103
2
1
CH43
CH43
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VCCCLKDMI
1
CH50
CH50
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
+VCCDFTERM
1
CH52
CH52
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+VCCSPI
1
CH54
CH54
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 2
LH1
1UH_GLFR1608T1R0M-LR_20%~D
1UH_GLFR1608T1R0M-LR_20%~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1
CH35
CH35
CH36
CH36
2
+1.8V_RUN_LVDS
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
CH104
CH104
2
+3.3V_RUN
CH49
CH49
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
RH205 0_0603_5%~D@ RH205 0_0603_5%~D@
@
@
1
CH106
CH106
2
RH276 0_0805_5%~D@RH27 6 0_0805_5%~D@
PJP66
@PJP66
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
RH202 0_0603_5%~D@ RH202 0_0603_5%~D@
RH204 0_0603_5%~D@ RH204 0_0603_5%~D@
12
+3.3V_RUN
100NH_HK1608R10J-T_5%_0603~D
100NH_HK1608R10J-T_5%_0603~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH105
CH105
1
2
+1.05V_RUN_VTT
12
INTEL feedback 0302
12
12
12
INTEL feedback 0307
LH8
LH8
12
0.1uH inductor, 200mA
CPN: SHI0110BJ0L
+1.05V_RUN
+3.3V_RUN
+1.8V_RUN
+3.3V_M
+3.3V_RUN
+3.3V_RUN
+1.8V_RUN
PCH Power Rail Table
Voltage Rail
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC3
VccADPLLA
VccADPLLB
VccCore
VccDMI
Voltage
1.05
3.3
3.3
1.05
1.05
1.05
1.05
S0 Iccmax
Current (A)
0.001
5
5
0.001
0.001
0.288
0.063
0.08
0.08
1.7
0.047
1.05VccIO 3.711
VccASW
VccSPI
VccDSW3_3 0.001
1.05
3.3
3.3
0.903
0.01
1.8 0.002VCCDFTERM
3.3Vcc RTC 6uA
3.3Vcc Sus3_3
3.3Vcc SusHDA
0.126
0.01
VccVRM 1.8 / 1 .5 0.16 7
1.05VccClkDMI 0.07
1.05VccSSC
VccDIFFCLKN 0.055
1.05
VccALVDS 3.3
0.095
0.001
1.8Vcc TX_LVDS 0.04
+1.05V_RUN
+VCCAPLL_FDI
1 2
RH195 0.022_0805_1%@RH195 0.022_0805_1%@
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
RH197 0_0603_5%~D@ RH197 0_0603_5%~D@
A A
12
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (6/8)
PCH (6/8)
PCH (6/8)
LA-7761P
LA-7761P
LA-7761P
19 59Wednesday, February 22, 2012
19 59Wednesday, February 22, 2012
19 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
4
3
2
1
S
S
G
G
CH107
CH107
1
2
3300P_0402_50V7K~D
3300P_0402_50V7K~D
1
CH62
@CH62
@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
20 59Wednesday, February 22, 2012
20 59Wednesday, February 22, 2012
20 59Wednesday, February 22, 2012
+5V_ALW_PCH+5V_ALW
12
RH278
RH278
CH98
CH98
20K_0402_5%~D
20K_0402_5%~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1.0
1.0
1.0
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW2
D D
+1.05V_RUN
C C
+3.3V_RUN
1 2
RH215 0.022_0805_ 1%RH215 0.022_0805_1%
Note: If EMI concern, pop
with SHI00008S0L, 10UH +-20%
1 2
RH201 0_0402_5%~D@ RH201 0_0402_5%~D@
1 2
RH253 0_0402_5%~D@ RH253 0_0402_5%~D@
LH3
@ LH3
@
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
+1.05V_M
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
+1.05V_RUN
@
@
CH58
CH58
2
+3.3V_RUN_VCC_CLKF33
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
@
@
2
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH73
CH73
2
Note: Place VCCDIFFCLKN with a trace
specially for XCLK_RCOMP (RH100.2)
B B
+1.05V_M
RH248 0.022_0805_ 1%@ RH248 0.022_0805_1%@
A A
+1.05V_RUN
1 2
+1.05V_M_VCCSUS
+1.05V_RUN_VTT
+1.05V_RUN
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
5
1
CH85
CH85
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
LH6
LH6
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
1 2
LH7
LH7
1
CH96
CH96
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
220U_D2_2VY_R15M
220U_D2_2VY_R15M
1
CH94
CH94
+
+
2
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+1.05V_RUN_VCCA_A_DPL
1
2
1 2
RH200 0.022_0805_ 1%@ RH200 0.022_0805_1%@
CH55
CH55
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
@
@
CH57
CH57
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH64
CH64
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH67
CH67
2
CH74
CH74
1
CH78
CH78
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
CH79
CH79
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 2
1
CH84
CH84
2
1
1
CH87
CH87
CH86
CH86
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+1.05V_RUN_VCCA_B_DPL
220U_D2_2VY_R15M
220U_D2_2VY_R15M
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH92
CH92
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
CH95
CH95
CH93
CH93
1
+
+
2
2
+VCCACLK
1
2
1
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
CH65
CH65
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
CH68
CH68
2
2
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
CH81
CH81
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
+VCCSST
+1.05V_M_VCCSUS
1
CH83
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
+RTC_CELL
1
2
4
+VCCDSW3_3
+PCH_VCCDSW
+3.3V_RUN_VCC_CLKF33
+VCCAPLL_CPY_PCH
+VCCSUS1
@
@
CH61
CH61
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH69
CH69
+VCCRTCEXT
@CH83
@
1
CH89
CH89
CH88
CH88
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
UH4J
UH4J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3[5]
BH23
VCCAPLLDMI2
AL29
VCCIO[14]
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
AA26
VCCASW[4]
AA27
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
AC27
VCCASW[9]
AC29
VCCASW[10]
AC31
VCCASW[11]
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
N16
DCPRTC
Y49
VCCVRM[4]
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO[7]
AF33
VCCDIFFCLKN[1]
AF34
VCCDIFFCLKN[2]
AG34
VCCDIFFCLKN[3]
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS[1]
V19
DCPSUS[2]
BJ8
V_PROC_IO
A22
VCCRTC
1
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
CH90
CH90
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
POWER
POWER
Clock and Miscellaneous
Clock and Miscellaneous
CPURTC
CPURTC
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
SATA USB
SATA USB
HDA
HDA
3
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
VCCSUS3_3[1]
V5REF
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCAPLLSATA
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
1
2
1
CH59
CH59
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+PCH_V5REF_SUS
+VCCA_USBSUS
+PCH_V5REF_RUN
1
2
1
CH91
CH91
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
CH56
CH56
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
CH70
CH70
1U_0603_10V6K~D
1U_0603_10V6K~D
+3.3V_RUN
1
CH76
CH76
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
+VCCSATAPLL
+1.05V_+1.5V_1.8V_RUN
CH60
CH60
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH66
CH66
2
1
CH72
CH72
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
1
CH82
CH82
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
2
2
+1.05V_RUN
ALW_ON_3.3V#<42>
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
CH75
CH75
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
CH77
CH77
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2
1
@CH80
@
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
2
+1.05V_M
+3.3V_ALW_PCH
+3.3V_ALW_PCH
CH80
+1.05V_RUN
+3.3V_ALW_PCH
+PWR_SRC_S
12
RH279
RH279
100K_0402_5%~D
100K_0402_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
5V_ALW_PCH_ENAB LE
13
D
D
QH6
QH6
2
G
SSM3K7002FU_SC70-3~D
G
SSM3K7002FU_SC70-3~D
S
S
10_0402_1%~D
10_0402_1%~D
CRB 0.7 RH208,RH213 trace width 20mil.
10_0402_1%~D
10_0402_1%~D
+3.3V_RUN
+1.05V_RUN
LH5
@LH5
@
10UH_LBR2012T100M_20%~D
10UH_LBR2012T100M_20%~D
1 2
RH208
RH208
RH213
RH213
QH4
QH4
+3.3V_ALW_PCH+5V _ALW_PCH
12
+3.3V_RUN+5V_RUN
12
+VCCA_USBSUS
+1.05V_RUN
D
D
1 3
2
1
2
21
DH2
DH2
RB751V40_SC76-2
RB751V40_SC76-2
+PCH_V5REF_SUS
1
CH63
CH63
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
21
DH3
DH3
RB751V40_SC76-2
RB751V40_SC76-2
+PCH_V5REF_RUN
1
CH71
CH71
1U_0603_10V6K~D
1U_0603_10V6K~D
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (7/8)
PCH (7/8)
PCH (7/8)
LA-7761P
LA-7761P
LA-7761P
1
5
D D
C C
B B
A A
UH4H
UH4H
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
4
AK38
VSS[80]
AK4
VSS[81]
AK42
VSS[82]
AK46
VSS[83]
AK8
VSS[84]
AL16
VSS[85]
AL17
VSS[86]
AL19
VSS[87]
AL2
VSS[88]
AL21
VSS[89]
AL23
VSS[90]
AL26
VSS[91]
AL27
VSS[92]
AL31
VSS[93]
AL33
VSS[94]
AL34
VSS[95]
AL48
VSS[96]
AM11
VSS[97]
AM14
VSS[98]
AM36
VSS[99]
AM39
VSS[100]
AM43
VSS[101]
AM45
VSS[102]
AM46
VSS[103]
AM7
VSS[104]
AN2
VSS[105]
AN29
VSS[106]
AN3
VSS[107]
AN31
VSS[108]
AP12
VSS[109]
AP19
VSS[110]
AP28
VSS[111]
AP30
VSS[112]
AP32
VSS[113]
AP38
VSS[114]
AP4
VSS[115]
AP42
VSS[116]
AP46
VSS[117]
AP8
VSS[118]
AR2
VSS[119]
AR48
VSS[120]
AT11
VSS[121]
AT13
VSS[122]
AT18
VSS[123]
AT22
VSS[124]
AT26
VSS[125]
AT28
VSS[126]
AT30
VSS[127]
AT32
VSS[128]
AT34
VSS[129]
AT39
VSS[130]
AT42
VSS[131]
AT46
VSS[132]
AT7
VSS[133]
AU24
VSS[134]
AU30
VSS[135]
AV16
VSS[136]
AV20
VSS[137]
AV24
VSS[138]
AV30
VSS[139]
AV38
VSS[140]
AV4
VSS[141]
AV43
VSS[142]
AV8
VSS[143]
AW14
VSS[144]
AW18
VSS[145]
AW2
VSS[146]
AW22
VSS[147]
AW26
VSS[148]
AW28
VSS[149]
AW32
VSS[150]
AW34
VSS[151]
AW36
VSS[152]
AW40
VSS[153]
AW48
VSS[154]
AV11
VSS[155]
AY12
VSS[156]
AY22
VSS[157]
AY28
VSS[158]
3
UH4I
UH4I
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
BB20
VSS[175]
BB22
VSS[176]
BB24
VSS[177]
BB28
VSS[178]
BB30
VSS[179]
BB38
VSS[180]
BB4
VSS[181]
BB46
VSS[182]
BC14
VSS[183]
BC18
VSS[184]
BC2
VSS[185]
BC22
VSS[186]
BC26
VSS[187]
BC32
VSS[188]
BC34
VSS[189]
BC36
VSS[190]
BC40
VSS[191]
BC42
VSS[192]
BC48
VSS[193]
BD46
VSS[194]
BD5
VSS[195]
BE22
VSS[196]
BE26
VSS[197]
BE40
VSS[198]
BF10
VSS[199]
BF12
VSS[200]
BF16
VSS[201]
BF20
VSS[202]
BF22
VSS[203]
BF24
VSS[204]
BF26
VSS[205]
BF28
VSS[206]
BD3
VSS[207]
BF30
VSS[208]
BF38
VSS[209]
BF40
VSS[210]
BF8
VSS[211]
BG17
VSS[212]
BG21
VSS[213]
BG33
VSS[214]
BG44
VSS[215]
BG8
VSS[216]
BH11
VSS[217]
BH15
VSS[218]
BH17
VSS[219]
BH19
VSS[220]
H10
VSS[221]
BH27
VSS[222]
BH31
VSS[223]
BH33
VSS[224]
BH35
VSS[225]
BH39
VSS[226]
BH43
VSS[227]
BH7
VSS[228]
D3
VSS[229]
D12
VSS[230]
D16
VSS[231]
D18
VSS[232]
D22
VSS[233]
D24
VSS[234]
D26
VSS[235]
D30
VSS[236]
D32
VSS[237]
D34
VSS[238]
D38
VSS[239]
D42
VSS[240]
D8
VSS[241]
E18
VSS[242]
E26
VSS[243]
G18
VSS[244]
G20
VSS[245]
G26
VSS[246]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
BD82PPSM-QNHN-A0_BGA989~D
BD82PPSM-QNHN-A0_BGA989~D
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
2
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCH (8/8)
PCH (8/8)
PCH (8/8)
LA-7761P
LA-7761P
LA-7761P
21 59Wednesday, February 22, 2012
21 59Wednesday, February 22, 2012
21 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
Place under CPU
Place C266 close to the Q12 as possible
C
@
@
D D
100P_0402_50V8J~D
100P_0402_50V8J~D
C C
100P_0402_50V8J~D
100P_0402_50V8J~D
B B
2
C266
C266
1
(1) DP2/DN2 for SODIMM on Q14, place Q14 close to SODIMM and C272 close to Q14
(2) DP4/DN4 for Skin on Q13, place Q13 close to Vcore VR choke.
1
C272
@C272
@
2
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
C
2
B
B
E
E
Q12
Q12
3 1
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
100P_0402_50V8J~D
100P_0402_50V8J~D
1
E
E
31
@
2
+1.05V_RUN_VTT
H_THERMTRIP#<7>
@
C277
C277
B
B
2
Q13
Q13
C
C
MMBT3904WT1G_SC70-3~D
MMBT3904WT1G_SC70-3~D
1 2
PMST3904_SOT323-3~D
PMST3904_SOT323-3~D
C
C
2
B
B
E
E
3 1
Q14
Q14
REM_DIODE1_P_4022
REM_DIODE1_N_4022
REM_DIODE2_P_4022
REM_DIODE2_N_4022
R399
R399
2.2K_0402_5%~D
2.2K_0402_5%~D
2
B
B
Q16
Q16
+3.3V_M
12
C
C
E
E
3 1
R395
R395
8.2K_0402_5%~D
8.2K_0402_5%~D
THERMATRIP2#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C278
C278
1
2
4
+FAN1_VOUT
+5V_RUN
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C276
C276
C275
C275
1
1
+3.3V_RUN
2
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C305
C305
1
2
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
R1639 0_0603_5%~D@R1639 0_0603_5%~D@
C738
C738
1
2
+3.3V_M
1 2
C270 2200P_0402_50V7K~DC270 2200P_0402_50V7K ~D
C271 2200P_0402_50V7K~DC271 2200P_0402_50V7K ~D
MAX8731_IINP<52>
PCH_PWRGD#<40>
3
RB751V40_SC76-2D2RB751V40_SC76-2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C219
C219
D2
1
2
2 1
+3.3V_RUN_EMC_VDDL
1 2
R389 10K_040 2_5%~DR389 10K_040 2_5%~D
12
R404 10K_0402_5%~DR404 10K_0402_5%~D
SMSC request
R391 1K_0402 _5%~DR39 1 1K_0402_5%~D
FAN1_DET#
FAN1_TACH_FB
VDD_PWRGD
REM_DIODE1_N_4022
REM_DIODE1_P_4022
REM_DIODE2_N_4022
REM_DIODE2_P_4022
12
12
1 2
+RTC_CELL
VCP2
R3874.7K_0402_5%~D R3874.7K_0402_5%~D
VSET_4021
FAN1_TACH_FB
FAN1_DET#
3V_PWROK#
2
JFAN1
CONN@JFAN1
CONN@
1
1
2
2
3
5
3
G1
4
6
4
G2
E-T_3801K-Q04N-01R
E-T_3801K-Q04N-01R
Change to EMC4021 for cost saving
U9
U9
2
VDD_H
3
VDD_H
6
VDD_L
13
VDD_PWRGD
23
DN1/THERM
24
DP1/VREF_T
26
DN2/DP4
27
DP2/DN4
30
N/C
29
N/C
31
VCP
25
VIN
28
VSET
10
TACH/GPIO1
11
TEST3
15
GPIO3/PWM/THERMTRIP_SIO
12
3V_PWROK#
16
RTC_PWR3V
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
EMC4021-1-EZK-TR_QFN32_5X5~D
EMC4021-1-EZK-TR_QFN32_5X5~D
1
C274
C274
2
THERMTRIP2#
SYS_SHDN#
POWER_SW#
ACAVAIL_CLR
ATF_INT#/BC_IRQ#
SMCLK/BC_CLK
SMDATA/BC_DATA
ADDR_MODE/XEN
FAN_OUT
FAN_OUT
VDD
TEST1
TEST2
VSS
17
18
N/C
19
20
21
9
5
4
8
7
1
32
14
22
33
THERMATRIP2#
POWER_SW#
BC_INT#_EMC4022
+VCC_4022
+ADDR_XEN
+FAN1_VOUT
1 2
12
R403
R403
10K_0402_5%~D
10K_0402_5%~D
SMSC request
BC_INT#_EMC4022
FAN1_TACH_FB
FAN1_DET#
1 2
R390 47K_0402_1%~D@R 390 47K _0402_1%~D@
ACAV_IN <40,52,53>
BC_INT#_EMC4022 <40>
BC_CLK_EMC4022 <4 0>
BC_DAT_EMC4022 <40>
+VCC_4022
R3934.7K_0402_5%~D R3934.7K_0402_5%~D
1
12
R385 10K_040 2_5%~DR385 10K_0402_5%~D
12
R426 10K_040 2_5%~DR426 10K_0402_5%~D
12
R402 10K_040 2_5%~DR402 10K_0402_5%~D
THERM_STP# <45>
+RTC_CELL
+3.3V_M
12
R388
R388
22_0402_5%~D
22_0402_5%~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C1179
C1179
C273
C273
2
2
+3.3V_M
12
R406
R406
1.33K_0402_1%
1.33K_0402_1%
VSET_4021
POWER_SW#
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C282
C282
2
U10
U10
4
+RTC_CELL
5
P
O
G
3
B
A
1 2
C281 0.1U_0402_25V6K~DC281 0.1U_0402_25V6K~D
1
2
DOCK_PWR_SW # <40>
POWER_SW_IN# <40>
Rest=1330, Tp=93degree
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
FAN & Thermal Sensor
FAN & Thermal Sensor
FAN & Thermal Sensor
LA-7761P
LA-7761P
LA-7761P
22 59Wednesday, February 22, 2012
22 59Wednesday, February 22, 2012
22 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
2
1
B B
PCH_CRT_RED
PCH_CRT_GRN
PCH_CRT_BLU
PCH_CRT_HSYNC
PCH_CRT_VSYNC
PCH_CRT_DDC_DAT
PCH_CRT_DDC_CLK
CRT_SWITCH
1 2
R556 4.7K_0402_5%~DR556 4.7K_0402_5%~D
+3.3V_RUN
PCH_CRT_RED<16>
PCH_CRT_GRN<16>
PCH_CRT_BLU<16>
PCH_CRT_HSYNC<16>
PCH_CRT_VSYNC<16>
PCH_CRT_DDC_DAT<16>
PCH_CRT_DDC_CLK<16>
+3.3V_RUN
CRT_SWITCH<39>
0
1
SW for MB/DOCK
U18
U18
1
R
2
G
5
B
6
H_SOURCE
7
V_HOURCE
9
SDA_SOURCE
10
SCL_SOURCE
30
SEL
29
TEST
8
Reserved
3
GND
11
GND
28
GND
31
GND
33
GPAD
TS3V713ELRTGR_TQFN32_6X3~D
TS3V713ELRTGR_TQFN32_6X3~D
Source
ChanelSEL1/SEL2
MBA=B1
APR/SPR
A=B2
5V VDD
VDD
VDD
VDD
H1_OUT
V1_OUT
SDA1
SCL1
H2_OUT
V2_OUT
SDA2
SCL2
R1
G1
B1
R2
G2
B2
+5V_RUN +3.3V_RUN
16
4
23
32
RED_CRT
27
GREEN_CRT
25
BLUE_CRT
22
HSYNC_BUF
20
VSYNC_BUF
18
DAT_DDC2_CRT
12
CLK_DDC2_CRT
14
RED_DOCK
26
GREEN_DOCK
24
BLUE_DOCK
21
HSYNC_DOCK
19
VSYNC_DOCK
17
DAT_DDC2_DOCK
13
CLK_DDC2_DOCK
15
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
@
@
C332
C332
2
2
RED_CRT <36>
GREEN_CRT <36>
BLUE_CRT <36>
HSYNC_BUF <36>
VSYNC_BUF <36>
DAT_DDC2_CRT <36>
CLK_DDC2_CRT <36>
RED_DOCK <38>
GREEN_DOCK <38>
BLUE_DOCK <38>
HSYNC_DOCK <38>
VSYNC_DOCK <38>
DAT_DDC2_DOCK <38>
CLK_DDC2_DOCK <38>
+3.3V_RUN
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
@
@
C333
C333
C334
C334
2
2
+5V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C335
C335
C336
C336
2
0.1U_0402_25V6K~D
1
C339
C339
2
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
1
Date: Sheet of
Compal Electronics, Inc.
CRT/Video switch
CRT/Video switch
CRT/Video switch
LA-7761P
LA-7761P
LA-7761P
23 59Wednesday, February 22, 2012
23 59Wednesday, February 22, 2012
23 59Wednesday, February 22, 2012
1.0
1.0
1.0
5
JLVDS1
D D
46
45
44
43
42
C C
41
ACES_59003-04006-001
ACES_59003-04006-001
CONN@JLVDS1
CONN@
+5V_ALW for panel side LED power
1
GND
VR_SRC
VR_SRC
VR_SRC
PWM
VR_GND
VR_GND
VR_GND
GND
LVDS_B2+
LVDS_B2-
LVDS_B1+
LVDS_B1-
LVDS_B0+
LVDS_B0-
GND
GND
LVDS_A2+
LVDS_A2-
LVDS_A1+
LVDS_A1-
LVDS_A0+
LVDS_A0-
EDID_DATA
EDID_CLK
BIST
V_EDID
LCD_VDD
LCD_VDD
CONNTST
12
2
3
4
5
6
7
8
NC
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
R1137
R1137
10K_0402_5%~D
10K_0402_5%~D
C246 0.1U_0603_50V7K~DC246 0.1U_0603 _50V7K~D
DISP_ON
1 2
LE92 BLM18BB221SN1D_2P~DLE92 BLM18BB221SN1D_2P~D
LDDC_DATA_PCH
LDDC_CLK_PCH
LCD_TST
D66
D66
RB751V40_SC76-2
RB751V40_SC76-2
D68
D68
RB751V40_SC76-2
RB751V40_SC76-2
BATT_WHITE_LED
BATT_YELLOW_LED
BREATH_WHITE_LED
DISP_ON/OFF#
CONNTST_GND
LCD_B_CLK+
LCD_B_CLK-
LVDS_A_CLK+
LVDS_A_CLK-
MGND6
MGND5
MGND4
MGND3
MGND2
MGND1
BIA_PWM_LVDS DISP_ON
1 2
+3.3V_RUN
+LCDVDD
21
21
+5V_ALW
BATT_WHITE_LED <43>
BATT_YELLOW_LED <43>
BREATH_WHITE_LED <43>
+BL_PWR_SRC
PANEL_HDD_LED <43>
BIA_PWM_LVDS
LCD_B2+_PCH <16>
LCD_B2-_PCH <16>
LCD_B1+_PCH <16>
LCD_B1-_PCH <16>
LCD_B0+_PCH <16>
LCD_B0-_PCH <16>
LCD_A2+_PCH <16>
LCD_A2-_PCH <16>
LCD_A1+_PCH <16>
LCD_A1-_PCH <16>
LCD_A0+_PCH <16>
LCD_A0-_PCH <16>
LDDC_DATA_PCH <16>
LDDC_CLK_PCH <16>
LCD_TST <39>
LCD_CBL_DET# <17>
4
+3.3V_RUN
1 2
R159 2.2K_0402_5%~DR159 2.2K_0402_5%~D
1 2
R160 2.2K_0402_5%~DR160 2.2K_0402_5%~D
LDDC_CLK_PCH
LDDC_DATA_PCH
Place near to JLVDS1
LCD_BCLK+_PCH <16>
5P_0402_50V8C~D
5P_0402_50V8C~D
5P_0402_50V8C~D
5P_0402_50V8C~D
1
C40
C40
@
@
2
5P_0402_50V8C~D
5P_0402_50V8C~D
1
@
@
C42
C42
2
LCD_BCLK-_PCH <16>
@
@
C41
C41
LCD_ACLK+_PCH <16>
LCD_ACLK-_PCH <16>
5P_0402_50V8C~D
5P_0402_50V8C~D
@
@
C43
C43
+LCDVDD
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C298
C298
1
2
1
2
Close to JLVDS1.42,43
D67
D67
12
R1138
R1138
100K_0402_5%~D
100K_0402_5%~D
21
RB751V40_SC76-2
RB751V40_SC76-2
D69
D69
21
RB751V40_SC76-2
RB751V40_SC76-2
3
LCD Power
LCD_VCC_TEST_EN<39>
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C243
C243
1
2
Close to JLVD1.41
PANEL_BKEN_PCH <16>BIA_PWM_PCH <16>
PANEL_BKEN_EC <39>BIA_PWM_EC <40>
2
+LCDVDD
12
R413
R413
130_0402_1%~D
130_0402_1%~D
61
Q19A
1
Q19A
EN_LCDPWR
PDTC124EU_SC70-3~D
PDTC124EU_SC70-3~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
D6
D6
2
ENVDD_PCH<16,39>
3
BAT54CW_SOT323-3~D
BAT54CW_SOT323-3~D
+LCVDVDD_CHG
2
2
Q20
Q20
+3.3V_ALW
40mil
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C297
C297
2
EN_INVPWR<40>
+PWR_SRC_S +3.3V_ALW
10K_0402_5%~D
10K_0402_5%~D
12
R414
R414
5
13
+PWR_SRC
12
R422
R422
100K_0402_5%~D
100K_0402_5%~D
1 2
R423 47K_0402_5%~DR423 47K _0402_5%~D
12
R412
R412
470K_0402_5%~D
470K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q19B
Q19B
4
FDC654P-G_SSOT-6~D
FDC654P-G_SSOT-6~D
PWR_SRC_ON
EN_INVPWR
+LCDVDD
4.7M_0402_5%~D
4.7M_0402_5%~D
12
R1632
R1632
Q21
Q21
D
D
S
S
4 5
G
G
3
D
D
1 3
4 5
Q22
Q22
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
1
Q18
Q18
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
S
S
6
2
1
G
G
3
0.022U_0402_25V7K~D
0.022U_0402_25V7K~D
1
C293
C293
2
40mil
6
2
1
1
C296
C296
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
2
S
S
G
G
2
FDC654P: P CHANNAL
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C292
C292
1
2
+BL_PWR_SRC
Panel backlight power control by EC
For Webcam
B B
Q23
+CAMERA_VDD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C299
C299
1
1
C300
C300
10U_0805_10V6K~D
2
10U_0805_10V6K~D
2
CCD_OFF<39>
CCD_OFF
Webcam PWR CTRL
A A
5
Q23
PMV65XP_SOT23-3~D
PMV65XP_SOT23-3~D
D
S
D
S
1 3
G
G
2
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C301
C301
1
2
TYCO_2041190-8~D
TYCO_2041190-8~D
USBP12+<17>
USBP12-<17>
4
+CAMERA_VDD
JCAM1
JCAM1
G1
G2
CONN@
CONN@
1
2
3
4
5
6
7
8
CAM_MIC_CBL_DET#
1
USBP12_D+
2
USBP12_D-
3
4
DMIC_CLK
5
6
DMIC0
7
8
9
10
1
1
USBP12- USBP12_D-
4
4
DLW21SN121SQ2L_4P~D
DLW21SN121SQ2L_4P~D
R427 0_0402_5%~D@ R427 0_0402_5%~D@
R428 0_0402_5%~D@ R428 0_0402_5%~D@
3
L10
L10
1 2
1 2
2
1
2
3
CAM_MIC_CBL_DET# <17>
DMIC_CLK <29>
DMIC0 <29>
D8
PESD5V0U2BT_SOT23-3~DD8PESD5V0U2BT_SOT23-3~D
USBP12_D+USBP12+
2
3
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
Touch Screen Connector
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
@
@
Q125B
Q125B
5
4
TOUCH_SCREEN_PD#<39>
USBP13-<17>
USBP13+<17>
10K_0402_5%~D
10K_0402_5%~D
12
@
@
R431
R431
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
@
@
Q125A
Q125A
2
L11
@L11
@
DLW21SN121SQ2L_4P~D
DLW21SN121SQ2L_4P~D
4
4
1
1
1 2
R429 0_0402_5%~D@ R429 0_0402_5%~D@
1 2
R430 0_0402_5%~D@ R430 0_0402_5%~D@
+5V_TSP
+5V_TSP +5V_RUN+5V_RUN
Q32
@
Q32
@
PMV65XP_SOT23-3~D
PMV65XP_SOT23-3~D
D
D
1 3
G
G
2
USBP13_D-
3
3
USBP13_D+
2
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
S
S
@
@
C306
C306
1
2
E3_PAID_TS_DET#<18>
USBP13_DUSBP13_D+
1
2
2
3
1
C302
@C302
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+5V_TSP
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
@
@
D86
D86
JTCH1
JTCH1
1
2
3
4
5
6
8
1
G2
2
3
4
5
6
G1
TYCO_2041190-6~DCONN@
TYCO_2041190-6~DCONN@
7
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
eDP & CAM &TS Conn
eDP & CAM &TS Conn
eDP & CAM &TS Conn
LA-7761P
LA-7761P
LA-7761P
24 59Wednesday, February 22, 2012
24 59Wednesday, February 22, 2012
24 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
2
+5V_RUN
BAT1000-7-F_SOT23-3~D
L100
L100
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
L19
@L19
TMDSB_PCH_CLK_C
TMDSB_PCH_CLK<16>
TMDSB_PCH_CLK#<16>
B B
TMDSB_PCH_P0< 16>
TMDSB_PCH_N0<16>
+3.3V_RUN
HDMI_CEC
R1165 10K_0402_5%~DR1165 10K_0402_5%~D
TMDSB_PCH_P2_C HDMI_OB
TMDSB_PCH_N2_C
TMDSB_PCH_P1_C
TMDSB_PCH_N1_C
TMDSB_PCH_P0_C
TMDSB_PCH_N0_C
TMDSB_PCH_CLK_C
TMDSB_PCH_CLK#_C
A A
PCH_SDVO_CTRLDATA<16>
R452 604_0402_1%R452 604_0402_1%
R450 604_0402_1%R450 604_0402_1%
R448 604_0402_1%R448 604_0402_1%
R449 604_0402_1%R449 604_0402_1%
R454 604_0402_1%R454 604_0402_1%
R453 604_0402_1%R453 604_0402_1%
R456 604_0402_1%R456 604_0402_1%
R455 604_0402_1%R455 604_0402_1%
+3.3V_RUN
PCH_SDVO_CTRLCLK<16>
HDMIB_PCH_HPD<16>
12
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R458 10K_0402_5%~DR458 10K_0402_5%~D
1 2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
+3.3V_RUN
Q120A
Q120A
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
5
3
4
Q120B
Q120B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1M_0402_5%~D
1M_0402_5%~D
R1168
R1168
1 2
13
D
D
2
G
G
Q26
Q26
S
S
PCH_SDVO_CTRLCLK_R
61
PCH_SDVO_CTRLDATA_R
+3.3V_RUN
G
G
2
HDMI_HPD_SINK
13
D
S
D
S
Q121
Q121
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
TMDSB_PCH_P1< 16>
TMDSB_PCH_N1<16>
TMDSB_PCH_P2< 16>
TMDSB_PCH_N2<16>
1 2
R1153 2.2K_0402_5%~DR1153 2.2K_0402_5%~D
1 2
R1152 2.2K_0402_5%~DR1152 2.2K_0402_5%~D
1 2
R1128 20K_0402_5%~DR1128 20K_0402_5%~D
2
TMDSB_PCH_CLK#
+5V_HDMI_DDC
TMDSB_PCH_P0
TMDSB_PCH_N0
TMDSB_PCH_P1
TMDSB_PCH_N1
TMDSB_PCH_P2
TMDSB_PCH_N2
+5V_RUN
RB751VM-40TE-17_SOD323-2~D
RB751VM-40TE-17_SOD323-2~D
21
@
@
12
C353 0.1U_0402_10V7K~DC353 0.1U_0402_10V7 K~D
C352 0.1U_0402_10V7K~DC352 0.1U_0402_10V7 K~D
C351 0.1U_0402_1 0V7K~DC351 0.1U_0402_10V7K~D
C350
C350
C347 0.1U_0402_1 0V7K~DC347 0.1U_0402_10V7K~D
C346 0.1U_0402_1 0V7K~DC346 0.1U_0402_10V7K~D
C349 0.1U_0402_1 0V7K~DC349 0.1U_0402_10V7K~D
C348 0.1U_0402_1 0V7K~DC348 0.1U_0402_10V7K~D
D65
D65
12
R1163
R1163
0_0402_5%~D
0_0402_5%~D
TMDSB_PCH_CLK#_C
12
TMDSB_PCH_P0_C
12
TMDSB_PCH_N0_C
12
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
TMDSB_PCH_P1_C
12
TMDSB_PCH_N1_C
12
TMDSB_PCH_P2_C
12
TMDSB_PCH_N2_C
12
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
@
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
L20
@L20
@
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
L22
@L22
@
1
1
4
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
1 2
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
1
4
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
9NH_0402HS-9N0EJTS_5%~D
9NH_0402HS-9N0EJTS_5%~D
L101
L101
L102
L102
L103
L103
L104
L104
L105
L105
L106
L106
L21
@L21
@
1
4
L107
L107
1 2
2
2
3
3
2
2
3
3
2
2
3
3
2
2
3
3
TMDSB_CON_CLKTMDSB_PCH_CLK
TMDSB_CON_CLK#
1.8P_0402_50V8
1.8P_0402_50V8
1
1
C1209
C1209
2
2
TMDSB_CON_P0
TMDSB_CON_N0
1.8P_0402_50V8
1.8P_0402_50V8
1
1
C1211
C1211
2
2
TMDSB_CON_P1
TMDSB_CON_N1
1.8P_0402_50V8
1.8P_0402_50V8
1
1
C1213
C1213
2
2
TMDSB_CON_P2
TMDSB_CON_N2
1.8P_0402_50V8
1.8P_0402_50V8
1
C1215
C1215
2
1.8P_0402_50V8
1.8P_0402_50V8
C1210
C1210
1.8P_0402_50V8
1.8P_0402_50V8
C1212
C1212
1.8P_0402_50V8
1.8P_0402_50V8
C1214
C1214
1.8P_0402_50V8
1.8P_0402_50V8
1
C1216
C1216
2
BAT1000-7-F_SOT23-3~D
21
3
D4
D4
NC
NC
+5V_RUN_HDMI
0.5A_15V_SMD1812P050TFF20.5A_15V_SMD1812P050TF
21
F2
1 2
1
0_1206_5%~D
0_1206_5%~D
@
@
R5
R5
1
+VDISPLAY_VCC
10U_0805_10V6K~D
10U_0805_10V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C338
C338
1
1
C337
C337
2
2
HDMI_HPD_SINK
PCH_SDVO_CTRLDATA_R
PCH_SDVO_CTRLCLK_R
HDMI_CEC
TMDSB_CON_CLK#
TMDSB_CON_CLK
TMDSB_CON_N0
TMDSB_CON_P0
TMDSB_CON_N1
TMDSB_CON_P1
TMDSB_CON_N2
TMDSB_CON_P2
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HDMI port
HDMI port
HDMI port
LA-7761P
LA-7761P
LA-7761P
JHDMI1
CONN@JHDMI1
CONN@
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKCK_shield
CK+
D0D0_shield
D0+
D1D1_shield
D1+
GND
D2-
GND
D2_shield
GND
D2+
GND
TYCO_2041343-1~D
TYCO_2041343-1~D
25 59Wednesday, February 22, 2012
25 59Wednesday, February 22, 2012
25 59Wednesday, February 22, 2012
23
22
21
20
1.0
1.0
1.0
5
4
3
2
1
AUX/DDC SW for DPC to E-DOCK
U20
C357
D D
DPC_PCH_DOCK_AUX<16>
DPC_DOCK_AUX<38>
DPC_PCH_DOCK_AUX#<16>
DPC_DOCK_AUX#<38>
DPC_CA_DET<38>
C C
C357
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C360 0.1U_0402_10V7K~DC360 0.1U_0402_10V7K~D
DPC_AUX_C
12
DPC_DOCK_AUX
DPC_AUX#_C
12
DPC_DOCK_AUX#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
U20
1
BE0
2
A0
3
B0
4
BE1
5
A1
6
B1
7
GND
PI3C3125LEX_TSSOP14~D
PI3C3125LEX_TSSOP14~D
+5V_RUN
12
C365
C365
5NC1
P
A2Y
G
3
14
VCC
13
BE3
12
A3
11
B3
10
BE2
9
A2
8
B2
U21
U21
DPC_CA_DET#DPC_CA_DET
4
TC7SET04FU_SSOP5~D
TC7SET04FU_SSOP5~D
+3.3V_RUN
1 2
C356
C356
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PCH_DDPC_CTRLCLK <16>
PCH_DDPC_CTRLDATA <16>
There is a new die for PI3C3125. Sample availabe on May.
AUX/DDC SW for DPD to E-DOCK
U23
C367
C367
0.1U_0402_10V7K~D
DPD_PCH_DOCK_AUX<16>
DPD_PCH_DOCK_AUX#<16>
B B
0.1U_0402_10V7K~D
DPD_DOCK_AUX<38>
C368 0.1U_0402_10V7K~DC368 0.1U_0402_10V7K~D
DPD_DOCK_AUX#<38>
DPD_AUX_C
12
DPD_DOCK_AUX
DPD_AUX#_C
12
DPD_DOCK_AUX#
U23
1
2
3
4
5
6
7
VCC
BE0
BE3
A0
B0
BE1
A1
BE2
B1
GND
PI3C3125LEX_TSSOP14~D
PI3C3125LEX_TSSOP14~D
14
13
12
A3
11
B3
10
9
A2
8
B2
+3.3V_RUN
1 2
C366
C366
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PCH_DDPD_CTRLCLK <16>
PCH_DDPD_CTRLDATA <16>
+5V_RUN
12
C369
C369
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
DPD_CA_DET<38>
+3.3V_RUN
1 2
R487 2.2K_0402_5%~DR487 2.2K_0402_5%~D
1 2
R488 2.2K_0402_5%~DR488 2.2K_0402_5%~D
A A
1 2
R489 2.2K_0402_5%~DR489 2.2K_0402_5%~D
1 2
R490 2.2K_0402_5%~DR490 2.2K_0402_5%~D
1 2
R491 1M_0 402_5%~DR491 1M_0402_5%~D
1 2
R492 1M_0 402_5%~DR492 1M_0402_5%~D
5
PCH_DDPC_CTRLCLK
PCH_DDPC_CTRLDATA
PCH_DDPD_CTRLCLK
PCH_DDPD_CTRLDATA
DPD_CA_DET
DPC_CA_DET
5NC1
U24
U24
P
A2Y
G
3
DPD_CA_DET#DPD_CA_DET
4
TC7SET04FU_SSOP5~D
TC7SET04FU_SSOP5~D
Intel WW18 Strapping option
Intel WW18 Strapping option
4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DP125
DP125
DP125
LA-7761P
LA-7761P
LA-7761P
1
26 59Wednesday, February 22, 2012
26 59Wednesday, February 22, 2012
26 59Wednesday, February 22, 2012
1.0
1.0
1.0
5
4
3
2
1
D D
+3.3V_ALW2
12
R500
@ R500
@
100K_0402_5%~D
+3.3V_RUN
12
PJP53
PJP53
PAD-OPEN1x1m
PAD-OPEN1x1m
Free Fall Sensor
+3.3V_RUN_FFS
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
C C
+3.3V_RUN
1 2
R501 10K_0402_5%~DR501 10K _0402_5%~D
1 2
R502 10K_0402_5%~DR502 10K _0402_5%~D
1 2
R503 100K_0402_5%~DR503 100K_0402_5%~D
B B
FFS_INT2<18>
2
DDR_XDP_WAN_ SMBDAT
DDR_XDP_WAN_ SMBCLK
HDD_FALL_INT
FFS_INT2
2
C387
C387
DDR_XDP_WAN_ SMBDAT<7,12,13,14,15,34>
DDR_XDP_WAN_ SMBCLK<7,12,13,14,15,34>
+3.3V_RUN
12
R508
R508
100K_0402_5%~D
100K_0402_5%~D
61
C388
C388
2
HDD_FALL_INT<17>
HDD_FALL_INT
FFS_INT2
U88
U88
LNG3DM
LNG3DM
VDD_IO
VDD
INT 1
INT 2
SDO/SA0
SDA / SDI / SDO
SCL/SPC
CS
GND
GND
RES
RES
RES
RES
NC
NC
1
14
11
9
7
6
4
8
LNG3DMTR_LGA16_3X3~D
LNG3DMTR_LGA16_3X3~D
10
13
15
16
5
12
2
3
For HDD Temp.
JSATA1
1
GND
2
RX+
3
RX-
4
GND
5
TX-
6
TX+
7
GND
8
3.3V
9
3.3V
10
3.3V
11
GND
12
GND
13
GND
14
5V
15
5V
16
5V
17
GND
18
Reserved
19
GND
20
12V
21
12V
22
12V
SANTA_196003-1
SANTA_196003-1
Main SATA +5V Default
+3.3V_RUN_HDD
+5V_HDD
FFS_INT2_Q
SATA_PTX_DRX_P0
SATA_PTX_DRX_N0
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
HDD_DET#
PSATA_PTX_DRX_P0_C<14>
PSATA_PTX_DRX_N0_C<14>
PSATA_PRX_DTX_N0_C<14>
PSATA_PRX_DTX_P0_C<14>
+5V_HDD
12
R506
@R506
@
100K_0402_5%~D
100K_0402_5%~D
FFS_INT2_Q
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q29B
Q29B
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q29A
Q29A
4
+3.3V_RUN
+5V_HDD
1
2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
C395
C395
2
12
C383 0.01U_0402_16V7K~DC383 0.01U_0402_16 V7K~D
12
C384 0.01U_0402_16V7K~DC384 0.01U_0402_16 V7K~D
12
C385 0.01U_0402_16V7K~DC385 0.01U_0402_16 V7K~D
12
C386 0.01U_0402_16V7K~DC386 0.01U_0402_16 V7K~D
PJP64
PJP64
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
HDD_DET#<14>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C396
C396
CONN@JSATA1
CONN@
GND1
GND2
RUN_ON<35,39,42,47>
SIO_SLP_S3#<11,16,35,36,39,42,47>
23
24
1 2
R1621 0_04 02_5%~D@R1621 0_0402_5%~D@
1 2
R1624 0_04 02_5%~D@R1624 0_0402_5%~D@
100K_0402_5%~D
R505
@R505
@
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
@
@
2
12
+PWR_SRC_S
5
Q28A
Q28A
HDD PWR
12
R499
@R499
@
100K_0402_5%~D
100K_0402_5%~D
HDD_EN_5V
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
@
@
Q28B
Q28B
1M_0402_5%~D
1M_0402_5%~D
12
4
+5V_ALW
2
1
G
G
3
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
@
@
@
@
C393
C393
1
R516
R516
2
+5V_HDD Source
6
D
D
Q27
@
Q27
@
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
S
S
+5V_HDD
4 5
10U_0805_10V6K~D
10U_0805_10V6K~D
@
@
1
12
C394
C394
R504
@R504
@
2
100K_0402_5%~D
100K_0402_5%~D
112
+5V_RUN
2
PJP3
@PJP3
@
JUMP_43X79
JUMP_43X79
SHORT DEFAULT
Pleace near HDD CONN
+3.3V_RUN_HDD
A A
5
4
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
2
C399
C399
C402
C402
2
Pleace near HDD CONN
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
HDD CONNECTOR
HDD CONNECTOR
HDD CONNECTOR
LA-7761P
LA-7761P
LA-7761P
27 59Wednesday, February 22, 2012
27 59Wednesday, February 22, 2012
27 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
+3.3V_ALW
ZODD_WAKE#
1 2
R510 10K_0402_5%~DR510 10K_0402_5%~D
R513 10K_0402_5%~DR513 10K_0402_5%~D
+3.3V_ALW_PCH
D D
R514 100K_0402_5%~DR514 100K_0402_5%~D
1 2
1 2
MOD_MD
USB30_SMI#
4
3
2
1
For ODD
JSATA2
JSATA2
1
SATA_ODD_PTX_DRX_P1_C<14>
SATA_ODD_PTX_DRX_N1_C< 14>
SATA_ODD_PRX_DTX_N1_C< 14>
SATA_ODD_PRX_DTX_P1_C<14>
+5V_MOD
1000P_0402_50V7K~D
1000P_0402_50V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C398
C398
C397
C397
2
2
C C
Pleace near ODD CONN
B B
MOD_MD
DEVICE_DET#<40>
CLK_PCIE_EMB<15>
CLK_PCIE_EMB#<15>
PCIE_PRX_EMBTX_P4<15>
PCIE_PRX_EMBTX_N4<15>
PCIE_PTX_EMBRX_P4<15>
PCIE_PTX_EMBRX_N4<15>
EMBCLK_REQ#<15>
PCIE_WAKE#<34,35,40>
PLTRST_EMB#<17>
BAY_SMBDAT<40,44>
BAY_SMBCLK<40,44>
MOD_SATA_PCIE#_DET<39>
Q76
Q76
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
S
D
S
13
G
G
2
MODC_EN#
Q123B
Q123B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
4
5
USB30_EN
+3.3V_ALW
12
C407 0.01U_0402_16V7K~DC407 0.01U_0402_16 V7K~D
12
C406 0.01U_0402_16V7K~DC406 0.01U_0402_16 V7K~D
12
C405 0.01U_0402_16V7K~DC405 0.01U_0402_16 V7K~D
12
C404 0.01U_0402_16V7K~DC404 0.01U_0402_16 V7K~D
EMBCLK_REQ#
PCIE_WAKE#
PLTRST_EMB#
BAY_SMBDAT
BAY_SMBCLK
1 2
R1183 10K _0402_5%~DR1 183 10K_0402_5%~D
ZODD_WAKE#
USB30_SMI#
SATA_ODD_PTX_DRX_P1
SATA_ODD_PTX_DRX_N1
SATA_ODD_PRX_DTX_N1
SATA_ODD_PRX_DTX_P1
+5V_MOD
PCIE_PTX_EMBRX_P4_C
C4090.1U_ 0402_10V7K~D C4090.1U_0402_10V7K~D
12
PCIE_PTX_EMBRX_N4_C
C4080.1U_ 0402_10V7K~D C4080.1U_0402_10V7K~D
12
+5V_MOD
ZODD_WAKE# <39>
USB30_SMI# <14>
MOD_MD
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
GND
A+
AGND
BB+
GND
DP
+5V
+5V
MD
GND
GND
GND
REFCLK+
REFCLKGND
PETX+
PETXGND
GND
PERX+
PERXGND
+5V
CLKREQ#
WAKE#
PERST#
SMB_DATA
SMB_CLK
HPD
GND1
GND2
TYCO_2-2129116-3
TYCO_2-2129116-3
CONN@
CONN@
MOD_SATA_PCIE#_DET
32
33
+3.3V_ALW
12
61
2
+5VMOD Source
MODC_EN<39>
R512
R512
100K_0402_5%~D
100K_0402_5%~D
R515
R515
100K_0402_5%~D
100K_0402_5%~D
USB30_EN
Q123A
Q123A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+PWR_SRC_S
5
12
R507
R507
470K_0402_5%~D
470K_0402_5%~D
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q31B
Q31B
4
+3.3V_ALW2
12
R509
R509
100K_0402_5%~D
100K_0402_5%~D
MODC_EN#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q31A
Q31A
2
12
MOD_EN
4.7M_0402_5%~D
4.7M_0402_5%~D
12
+5V_ALW
6
2
1
D
D
Q30
Q30
G
G
SI3456DDV-T1-GE3_TSOP6~D
3
1
R517
R517
2
SI3456DDV-T1-GE3_TSOP6~D
S
S
+5V_MOD +5V_RUN
0.022U_0402_25V7K~D
0.022U_0402_25V7K~D
4 5
10U_0805_10V6K~D
10U_0805_10V6K~D
C400
C400
1
C401
C401
2
@PJP4
@
12
R511
R511
100K_0402_5%~D
100K_0402_5%~D
PJP4
112
JUMP_43X79
JUMP_43X79
2
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
ODD CONNECTOR
ODD CONNECTOR
ODD CONNECTOR
LA-7761P
LA-7761P
LA-7761P
28 59Wednesday, February 22, 2012
28 59Wednesday, February 22, 2012
28 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
2
Internal Speakers Header
15 mils trace
INT_SPK_L+
INT_SPK_LINT_SPK_R+
INT_SPK_R-
B B
C973 2200P_0402 _50V7KC973 2200P_040 2_50V7K
C974 2200P_0402 _50V7KC974 2200P_040 2_50V7K
1
1
2
2
12
12
R1659 3.3_0402_5%~DR1659 3.3_0402_5%~D
R1658 3.3_0402_5%~DR1658 3.3_0402_5%~D
Close to U72
Close to U72 pin5 Close to U72 pin6
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
12
R1077
@R10 77
@
47_0402_5%~D
47_0402_5%~D
1
C978
@C978
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2
Place closely to Pin 13.
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
A A
Place closely to Pin 14
+3.3V_RUN
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
DVDD_IO should match
with HDA Bus level
L91 BLM18PG121SN1D_0603L91 BLM18PG121SN1D_0603
1 2
L92 BLM18PG121SN1D_0603L92 BLM18PG121SN1D_0603
1 2
L93 BLM18PG121SN1D_0603L93 BLM18PG121SN1D_0603
1 2
L94 BLM18PG121SN1D_0603L94 BLM18PG121SN1D_0603
1 2
C975 2200P_0402 _50V7KC975 2200P_040 2_50V7K
C976 2200P_0402 _50V7KC976 2200P_040 2_50V7K
1
1
2
2
12
12
R1660 3.3_0402_5%~DR1660 3.3_0402_5%~D
R1661 3.3_0402_5%~DR1661 3.3_0402_5%~D
12
R1076
@R1076
@
10_0402_1%~D
10_0402_1%~D
1
C977
@C977
@
10P_0402_50V8J~D
10P_0402_50V8J~D
2
AUD_SENSE_A
61
2
Q107A
Q107A
12
3
4
INT_SPKL_L+
INT_SPKR_LINT_SPKR_R+
INT_SPKR_R-
3
2
3
AZ5125-02S.R7G_SOT23-3
AZ5125-02S.R7G_SOT23-3
DE2
DE2
1
R1086
R1086
20K_0402_1%~D
20K_0402_1%~D
5
Q107B
Q107B
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
Add for solve pop noise and detect issue
AUD_SENSE_B
12
12
R1080
61
R1080
20K_0402_1%~D
20K_0402_1%~D
3
5
Q106B
Q106B
4
DMN66D0LDW-7_ SOT363-6~D
DMN66D0LDW-7_ SOT363-6~D
39.2K_0402_1%~D
39.2K_0402_1%~D
12
R1081
R1081
100K_0402_5%~D
100K_0402_5%~D
2
Q106A
Q106A
R1079
R1079
JSPK1
1
2
3
4
5
6
2
AZ5125-02S.R7G_SOT23-3
AZ5125-02S.R7G_SOT23-3
DE1
DE1
1
BCLK: Audio serial data bus bi t clock input/output
LRCK: Audio serial data bus word clock input/output
AUD_NB_MUTE#<39>
+3.3V_RUN
+VDDA_AVDD
R1083
R1083
2.49K_0402_1%~D
2.49K_0402_1%~D
12
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+3.3V_RUN
1
C980
C980
12
2
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1
2
1
2
R1078
R1078
2.49K_0402_1%~D
2.49K_0402_1%~D
C979
C979
+3.3V_RUN
12
R1087
R1087
100K_0402_5%~D
100K_0402_5%~D
@C967
@
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
+VDDA_AVDD
12
R1082
R1082
100K_0402_5%~D
100K_0402_5%~D
2
+3.3V_RUN +3.3V_RUN_DVDD +3.3 V_RUN_DVDD
CONN@JSPK1
CONN@
1
2
3
4
GND
GND
ACES_50279-0040N-001
ACES_50279-0040N-001
PCH_AZ_CODEC_BITCLK<14>
PCH_AZ_CODEC_SDOUT<14>
PCH_AZ_CODEC_SYNC<14>
PCH_AZ_CODEC_SDIN0<14>
PCH_AZ_CODEC_RST#<14>
1 2
10K_0402_5%~DR1099 10K_0402_5%~DR1 099
AUD_HP_NB_SENSE <36,39 >
C967
DOCK_MIC_DET <39>DOCK_HP_DET<39>
PJP60
@PJP60
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
Place R1096 close to codec
R1096
R1096
1U_0603_10V6K~D
1U_0603_10V6K~D
1
C952
C952
2
1 2
I2S_MCLK
I2S_BCLK
I2S_DO
I2S_LRCLK
I2S_DI#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C994
C994
2
33_0402_5%~D
33_0402_5%~D
+DVDD_CORE
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C953
C953
2
2
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_SDOUT
PCH_AZ_SDIN0_R
PCH_AZ_CODEC_RST#
1 2
33_0402_5%~DR1097 33_0402_5%~DR1097
10U_0805_10V6K~D
10U_0805_10V6K~D
C954
C954
Place R1097 close to codec
place at AGND and DGND plane
1 2
C981
C981
100P_0402_50V8J~D
100P_0402_50V8J~D
1 2
C982
C982
100P_0402_50V8J~D
100P_0402_50V8J~D
1 2
C983
C983
100P_0402_50V8J~D
100P_0402_50V8J~D
Resistor SENSE_A SENSE_B
39.2K
20K
10K
5.11K
2.49K
PORT A
PORT B
NA
SPDIFOUT0
SPDIFOUT1 (DMIC1)
Pull-up to AVDD
External MICPORT A
PORT B
PORT C
PORT D
HeadPhone Out
Dock Audio
Internal SPK
Place C994, C952~C957 close to Codec
U72
U72
1
DVDD_CORE
3
DVDD_IO
9
DVDD
6
BITCLK
5
SDATA_OUT
10
SYNC
8
SDATA_IN
11
RESET#
15
I2S_MCLK
16
I2S_SCLK
17
I2S_DOUT
18
I2S_LRCLK
24
I2S_DIN
19
No Connect
20
No Connect
47
EAPD
7
DVSS
42
PVSS
49
GND
92HD93B2X5NLGXWBX8_Q FN48_7X7~D
92HD93B2X5NLGXWBX8_Q FN48_7X7~D
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
place at Codec bottom side
PJP62
@PJP62
@
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
R162, R163, R164, R165,R166 CO-lay with U73
PORT E
DMIC1/GPIO0/SPDIFOUT1
SPDIFOUT0//GPIO3/Aux_Out
DAI_BCLK#
DAI_LRCK#
DAI_DO#
DAI_12MHZ#
AVDD1
AVDD2
PVDD
PVDD
SENSE_A
SENSE_B
PORTA_L
PORTA_R
VrefOut_A
PORTB_L
PORTB_R
PORTD_+L
PORTD_-L
PORTD_+R
PORTD_-R
MONO_OUT
PC_BEEP
DMIC_CLK/GPIO 1
DMIC_0/GPIO 2
CAP+
CAP-
VREFFILT
CAP2
Vreg
AVSS1
AVSS
AVSS
1 2
R162 2 2_0402_5%~DR162 22_ 0402_5%~D
1 2
R163 0_ 0402_5%~D@ R163 0_0402_5 %~D@
1 2
R164 0_ 0402_5%~D@ R164 0_0402_5 %~D@
1 2
R165 2 2_0402_5%~DR165 22_ 0402_5%~D
PORT F
DMIC0
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EN_I2S_NB_CODEC#<39>
place close to pin27
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1U_0603_10V6K~D
1U_0603_10V6K~D
1
1
C957
C957
2
2
C957 place close to pin38
27
38
+VDDA_PVDD
45
39
AUD_SENSE_A
13
AUD_SENSE_B
14
MIC_IN_L
28
MIC_IN_R
29
+VREFOUT
23
AUD_HP_OUT_L
31
AUD_HP_OUT_R
32
INT_SPK_L+
40
INT_SPK_L-
41
INT_SPK_R+
44
INT_SPK_R-
43
25
AUD_PC_BEEP
12
DMIC_CLK_L
2
4
46
48
36
1
C962
C962
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
Place C962 close to Codec
2
35
21
22
34
V-
37
26
30
33
+3.3V_RUN +3.3V_RUN
2
1
I2S_BCLK DAI_BCLK#
I2S_LRCLK
I2S_DO
EN_I2S_NB_CODEC#
R1540
R1540
1K_0402_5%~D
1K_0402_5%~D
@
@
C1105 0.1U_0402 _25V6K~DC1105 0.1U_0402_ 25V6K~D
C1106 0.1U_0402 _25V6K~DC1106 0.1U_0402_ 25V6K~D
1 2
LE3 BLM18BB221SN1D _2P~DLE3 BLM18 BB221SN1D_2P~D
Place LE3 close to codec
1 2
R169 0 _0402_5%~D@R169 0_0402_5%~D@
1 2
R1641 0_0402_5%~D@R1641 0_0402_5%~ D@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C1103
C1103
U73
@U73
@
16
VCC
2
1A
4
2A
6
3A
10
4A
12
5A
14
6A
1
OE1#
12
15
OE2#
CD74HC366M96_SO16~D
CD74HC366M96_SO16~D
1
BLM21PG600SN1D_0805~ D
+VDDA_AVDD
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C955
C955
C956
C956
2
1 2
2.2U_0603_6.3V6K~DC1163 2.2U_0603_6.3 V6K~DC1163
+VREFOUT
1 2
R1143 2.2K_0402_5%~DR114 3 2 .2K_0402_5%~D
12
12
EN_I2S_NB_CODEC#
BLM21PG600SN1D_0805~ D
DMIC_CLK <24>
DMIC0 <24>
Place C963~C966 close to Codec
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
1
C963
C963
2
2
R1647, C1165, R1648 for
jack detect of ALC290,
place close to JIO1
DA204U_SOT323-3~D
DA204U_SOT323-3~D
2
3
3
@D54
@
D54
1
I2S_DI#
R166 0_ 0402_5%~D@ R166 0_0402_5 %~D@
1
1 2
GND
3
1Y#
5
2Y#
7
3Y#
9
4Y#
11
5Y#
13
6Y#
8
1
L77
L77
1 2
MIC_IN_R <36>
AUD_HP_OUT_L <36>
AUD_HP_OUT_R < 36>
1U_0603_10V6K~D
1U_0603_10V6K~D
1
C965
C965
C964
C964
2
DA204U_SOT323-3~D
DA204U_SOT323-3~D
3
2
@D55
@
D55
1
2
1
DAI_DI
+5V_RUN
10U_0805_10V6K~D
10U_0805_10V6K~D
1
C958
C958
2
10U_0805_10V6K~D
10U_0805_10V6K~D
C966
C966
DA204U_SOT323-3~D
DA204U_SOT323-3~D
2
@D56
@
D56
+5V_RUN
@
@
0_0805_5%~D
0_0805_5%~D
12
R1095
R1095
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C959
C959
2
1 2
R1119 100K_0402_5%~DR1119 100K_0402_5%~D
1 2
R1120 100K_0402_5%~DR1120 100K_0402_5%~D
1 2
R1141 10K_ 0402_5%~D@R11 41 10K_0402_5%~D@
1 2
R1142 10K_ 0402_5%~D@R11 42 10K_0402_5%~D@
3
1
+3.3V_RUN
1
2
2
DA204U_SOT323-3~D
DA204U_SOT323-3~D
3
10U_0805_10V6K~D
10U_0805_10V6K~D
C960
C960
@D57
@
D57
DAI_LRCK#
DAI_DO#
DAI_12MHZ#I2S_MCLK
1
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C961
C961
2
2
D58
@D58
@
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DAI_DI
+VREFOUT
SPKR <14>
BEEP <40>
DAI_BCLK# <38>
DAI_LRCK# <38>
DAI_DO# <38>
DAI_12MHZ# <38>
DAI_DI <38>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sh eet of
Date: Sh eet of
Date: Sh eet of
Compal Electronics, Inc.
Azalia (HD) Codec
Azalia (HD) Codec
Azalia (HD) Codec
LA-7761P
LA-7761P
LA-7761P
29 59Wednesday, February 22, 2012
29 59Wednesday, February 22, 2012
29 59Wednesday, February 22, 2012
1U_0603_10V6K~D
1U_0603_10V6K~D
C1180
C1180
1
2
1.0
1.0
1.0
5
+3.3V_LAN
1 2
R545 10K_040 2_5%~D@R545 10K_0402_5%~D@
1 2
R546 10K_040 2_5%~D@R546 10K_0402_5%~D@
D D
PM_LANPHY_ENABLE<18>
C C
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
+3.3V_LAN
R549
R549
10K_0402_5%~D
10K_0402_5%~D
1 2
R555 0_0402_5%~D@ R555 0_0402_5%~D@
R557
@R557
@
10K_0402_5%~D
10K_0402_5%~D
Y3
Y3
25MHZ_18PF_X3G025000DI1H-H~D
25MHZ_18PF_X3G025000DI1H-H~D
1
IN
33P_0402_50V8J~D
33P_0402_50V8J~D
2
2
1
GND
C470
C470
GND
OUT
12
12
LANCLK_REQ#<15>
PLTRST_LAN#<17>
CLK_PCIE_LAN<15>
CLK_PCIE_LAN#<15>
PCIE_PRX_GLANTX_P7<15>
PCIE_PRX_GLANTX_N7<15>
PCIE_PTX_GLANRX_P7<15>
PCIE_PTX_GLANRX_N7<15>
LAN_SMBCLK<15>
LAN_SMBDATA<15>
SMBus Device Address 0xC8
1 2
R1144 0_0402_5%~D@ R1144 0_0402_5%~D@
3
4
33P_0402_50V8J~D
33P_0402_50V8J~D
2
C471
C471
1
1 2
R1187 0_0402_5%~D@ R1187 0_0402_5%~D@
C458 0.1U_0402_10V7K~DC458 0.1U_0402_10V7K~ D
C459 0.1U_0402_10V7K~DC459 0.1U_0402_10V7K~ D
1 2
C460 0.1U_0402_10V7K~DC460 0.1U_0402_10V7K~ D
1 2
C461 0.1U_0402_10V7K~DC461 0.1U_0402_10V7K~ D
1 2
R551 0_0402_5%~D@R551 0_0402_ 5%~D@
1 2
R552 0_0402_5%~D@R552 0_0402_ 5%~D@
LAN_DISABLE#_R<39>
T142 PAD~DT142 PAD~D
T143 PAD~DT143 PAD~D
1K_0402_5%~D
1K_0402_5%~D
12
12
12
R561
R561
4
+3.3V_RUN
12
R547
R547
10K_0402_5%~D
10K_0402_5%~D
LANCLK_REQ#_R
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_PRX_GLANTX_P7_C
PCIE_PRX_GLANTX_N7_C
PCIE_PTX_GLANRX_P7_C
PCIE_PTX_GLANRX_N7_C
LAN_SMBCLK_R
LAN_SMBDATA_R
LAN_DISABLE#_R
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
XTALO
XTALI
LAN_TEST_EN
RES_BIAS
3.01K_0402_1%~D
3.01K_0402_1%~D
12
R562
R562
U31
U31
48
CLK_REQ_N
36
PE_RST_N
44
PE_CLKP
45
PE_CLKN
38
PETp
39
PETn
41
PERp
42
PERn
28
SMB_CLK
31
SMB_DATA
3
LAN_DISABLE_N
26
LED0
27
LED1
25
LED2
32
JTAG_TDI
34
JTAG_TDO
33
JTAG_TMS
35
JTAG_TCK
9
XTAL_OUT
10
XTAL_IN
30
TEST_EN
12
RBIAS
MDI
MDI
PCIE
PCIE
RSVD_VCC3P3_1
RSVD_VCC3P3_2
SMBUS
SMBUS
VDD3P3_OUT
JTAG LED
JTAG LED
82579_QFN48_6X6~D
82579_QFN48_6X6~D
MDI_PLUS0
MDI_MINUS0
MDI_PLUS1
MDI_MINUS1
MDI_PLUS2
MDI_MINUS2
MDI_PLUS3
MDI_MINUS3
RSVD_NC
VDD3P3_IN
VDD3P3_15
VDD3P3_19
VDD3P3_29
VDD1P0_47
VDD1P0_46
VDD1P0_37
VDD1P0_43
VDD1P0_11
VDD1P0_40
VDD1P0_22
VDD1P0_16
VDD1P0_8
CTRL_1P0
VSS_EPAD
13
14
17
18
20
21
23
24
VCT_LAN_R1
6
+RSVD_VCC3P3_1
1
+RSVD_VCC3P3_2
2
5
4
15
19
29
47
46
37
43
11
40
22
16
8
REGCTL_PNP10
7
49
3
LAN_TX0+
LAN_TX0-
LAN_TX1+
LAN_TX1-
LAN_TX2+
LAN_TX2-
LAN_TX3+
LAN_TX3-
R152 0_0402_5%~D@ R152 0_0402_5%~D@
R553 4.7K_0402_5%~DR553 4.7K_0402_5%~D
R554 4.7K_0402_5%~DR554 4.7K_0402_5%~D
+3.3V_LAN_OUT
1
+1.0V_LAN
2
12
12
12
C464
C464
1U_0603_10V6K~D
1U_0603_10V6K~D
Note:
+1.0V_LAN will work at 0.95V to 1.15V
+3.3V_LAN
+3.3V_LAN
2
REGCTL_PNP10
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C466
C466
2
1 2
4.7UH_CBC2012T4R7M_20%~D
4.7UH_CBC2012T4R7M_20%~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
1
C467
C467
2
2
L29
L29
Idc max=330mA
+1.0V_LAN
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C463
C463
C462
C462
1
2
Place R548, C46 2, C463 and L2 9 close to U31
+1.0V_LAN
C468
C468
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1
C469
C469
2
+3.3V_LAN
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1177
C1177
1
2
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
C1178
C1178
1
2
Place C1178 clo se to pin5
1
@R548
@
0_0805_5%~D
0_0805_5%~D
1 2
R548
+1.05V_M
+3.3V_M
+1.0V_LAN POWER OPTIONS
R563
@ R563
Need to verify A3 silicon drive
power before removing C427
KDS crystal vender verify
driving level in A3
+3.3V_LAN
B B
1 2
L30 12NH_0603CS-120EJTS_5%~DL30 12NH_0603CS -120EJTS_5%~D
1 2
L31 12NH_0603CS-120EJTS_5%~DL31 12NH_0603CS -120EJTS_5%~D
LAN_TX1+
1 2
L33 12NH_0603CS-120EJTS_5%~DL33 12NH_0603CS -120EJTS_5%~D
LAN_TX1-
1 2
L32 12NH_0603CS-120EJTS_5%~DL32 12NH_0603CS -120EJTS_5%~D
1 2
L34 12NH_0603CS-120EJTS_5%~DL34 12NH_0603CS -120EJTS_5%~D
LAN_TX2-
1 2
L35 12NH_0603CS-120EJTS_5%~DL35 12NH_0603CS -120EJTS_5%~D
1 2
L36 12NH_0603CS-120EJTS_5%~DL36 12NH_0603CS -120EJTS_5%~D
LAN_TX3-
1 2
L37 12NH_0603CS-120EJTS_5%~DL37 12NH_0603CS -120EJTS_5%~D
DOCKED
DOCKED<39>
A A
Layout Notice : Place bead as
close PI3L500 as possible
FROM NIC DOCKED
5
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C472
C472
2
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
1: TO DOCK
0: TO RJ45
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C473
C473
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C474
C474
2
LAN_TX0+RLAN_TX0+
LAN_TX0-RLAN_TX0-
LAN_TX1+R
LAN_TX1-R
LAN_TX2+RLAN_TX2+
LAN_TX2-R
LAN_TX3+RLAN_TX3+
LAN_TX3-R
39
U32
U32
2
A0+
3
A0-
6
A1+
7
A1-
9
A2+
10
A2-
11
A3+
12
A3-
13
SEL
15
LEDA0
16
LEDA1
42
LEDA2
5
PD
43
PAD_GND
PI3L720ZHEX_TQFN42_9X3P5~D
PI3L720ZHEX_TQFN42_9X3P5~D
VDD1VDD4VDD8VDD14VDD21VDD30VDD
4
LAN ANALOG
SWITCH
38
B0+
37
B0-
34
B1+
33
B1-
29
B2+
28
B2-
25
B3+
24
B3-
17
LEDB0
18
LEDB1
41
LEDB2
36
C0+
35
C0-
32
C1+
31
C1-
27
C2+
26
C2-
23
C3+
22
C3-
19
LEDC0
20
LEDC1
40
LEDC2
SW_LAN_TX0+
SW_LAN_TX0-
SW_LAN_TX1+
SW_LAN_TX1-
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX3+
SW_LAN_TX3-
LAN_ACTLED_YEL#
LED_100_ORG#
LED_10_GRN#
DOCK_LOM_TRD0+
DOCK_LOM_TRD0-
DOCK_LOM_TRD1+
DOCK_LOM_TRD1-
DOCK_LOM_TRD2+
DOCK_LOM_TRD2-
DOCK_LOM_TRD3+
DOCK_LOM_TRD3-
DOCK_LOM_ACTLED_YEL#
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#
SW_LAN_TX0+ <31>
SW_LAN_TX0- <31>
SW_LAN_TX1+ <31>
SW_LAN_TX1- <31>
SW_LAN_TX2+ <31>
SW_LAN_TX2- <31>
SW_LAN_TX3+ <31>
SW_LAN_TX3- <31>
LAN_ACTLED_YEL# <31>
LED_100_ORG# <31>
LED_10_GRN# <31>
DOCK_LOM_TRD0+ <38>
DOCK_LOM_TRD0- <38>
DOCK_LOM_TRD1+ <38>
DOCK_LOM_TRD1- <38>
DOCK_LOM_TRD2+ <38>
DOCK_LOM_TRD2- <38>
DOCK_LOM_TRD3+ <38>
DOCK_LOM_TRD3- <38>
DOCK_LOM_ACTLED_YEL# <38>
DOCK_LOM_SPD100LED_ORG# <38>
DOCK_LOM_SPD10LED_GRN# <38>
TO
DOCK
3
Shared with PCH
1.05V SVR
STUFF: R548
NO STUFF: L29
Internal SRV
*
STUFF: L29
NO STUFF: R548
SIO_SLP_LAN#<16,39>
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
2
+3.3V_ALW2
2
+3.3V_LAN
1
B
2
A
12
R565
R565
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
Q35A
Q35A
C478
C478
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 2
5
P
4
O
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
U15
U15
Q34
Q34
SI3456DDV-T1-GE3_TSOP6~D
+PWR_SRC_S
12
R564
R564
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q35B
Q35B
5
4
WLAN_LAN_DISB# <39>
SI3456DDV-T1-GE3_TSOP6~D
ENAB_3VLAN
1M_0402_5%~D
1M_0402_5%~D
12
R1638
R1638
D
D
6
S
S
2
1
G
G
3
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
C477
C477
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Intel 82579 (Hanksville) / LAN SW
Intel 82579 (Hanksville) / LAN SW
Intel 82579 (Hanksville) / LAN SW
LA-7761P
LA-7761P
LA-7761P
1
@
0_1206_5%~D
0_1206_5%~D
1 2
+3.3V_LAN+3.3V_ALW
45
30 59Wednesday, February 22, 2012
30 59Wednesday, February 22, 2012
30 59Wednesday, February 22, 2012
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
2
C476
C476
C475
C475
2
1.0
1.0
1.0
5
D D
SW_LAN_TX0+<30>
SW_LAN_TX0-<30>
+TRM_CT1
+TRM_CT2
1
C480
C480
2
+TRM_CT3
+TRM_CT4
1
C484
C484
2
SW_LAN_TX1+<30>
SW_LAN_TX1-<30>
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
SW_LAN_TX2+<30>
SW_LAN_TX2-<30>
SW_LAN_TX3+<30>
SW_LAN_TX3-<30>
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
C C
1
2
C479
C479
0.47U_0603_10V7K~D
0.47U_0603_10V7K~D
1
C483
C483
2
0.47U_0603_10V7K~D
B B
0.47U_0603_10V7K~D
SW_LAN_TX0+
SW_LAN_TX0-
SW_LAN_TX1+
SW_LAN_TX1-
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX3+
SW_LAN_TX3-
4
T156
T156
1
TD1+
2
TD1-
3
TDCT1
4
TDCT2
5
TD2+
6
TD2-
7
TD3+
8
TD3-
9
TDCT3
10
TDCT4
11
TD4+
12
TD4-
350uH_IH-115-F~D
350uH_IH-115-F~D
1:1
1:1
1:1
1:1
1 2
C485 1000P_1808_3KV7K~DC485 100 0P_1808_3KV7K~D
TX1+
TX1-
TXCT1
TXCT2
TX2+
TX2-
1:1
1:1
TX3+
TX3-
TXCT3
TXCT4
1:1
1:1
TX4+
TX4-
NB_LAN_TX0+
24
NB_LAN_TX0-
23
Z2805
22
Z2807
21
NB_LAN_TX1+
20
NB_LAN_TX1-
19
NB_LAN_TX2+
18
NB_LAN_TX2-
17
Z2806
16
Z2808
15
NB_LAN_TX3+
14
NB_LAN_TX3-
13
GND
CHASSIS
GND_CHASSIS
3
+3.3V_LAN
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0603_10V6K~D
1U_0603_10V6K~D
1
1
C481
C481
2
1
C482
C482
2
2
2
470P_0402_50V7K~D
470P_0402_50V7K~D
C1167
C1167
1
+3.3V_LAN:20mils
+3.3V_LAN
LAN_ACTLED_YEL#<30>
12
12
12
R571 75_0402_1%~DR 571 75_0402_1%~D
R574 75_0402_1%~DR 574 75_0402_1%~D12R573 75_0402_1%~DR 573 75_0402_1%~D
R572 75_0402_1%~DR 572 75_0402_1%~D
LED_10_GRN#<30>
LED_100_ORG#<30>
1 2
R1166 150_0402_5%~DR1166 150_0402_5%~D
NB_LAN_TX3-
NB_LAN_TX3+
NB_LAN_TX1-
NB_LAN_TX2-
NB_LAN_TX2+
NB_LAN_TX1+
NB_LAN_TX0-
NB_LAN_TX0+
1 2
R1653 150_0402_5%~DR1653 150_0402_5%~D
1 2
R1167 150_0402_5%~DR1167 150_0402_5%~D
JLOM1
10
Yellow LED -
9
Yellow LED +
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
11
Green LED-
13
Orange LED-
12
Green-Orange LED +
TYCO_2041337-1~D
TYCO_2041337-1~D
CONN@JLOM1
CONN@
GND
GND
14
15
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
RJ45 Conn
RJ45 Conn
RJ45 Conn
LA-7761P
LA-7761P
LA-7761P
31 59Wednesday, February 22, 2012
31 59Wednesday, February 22, 2012
31 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
D D
+3.3V_RUN_TPM+3.3V_RUN
PJP61
PJP61
1 2
PAD-OPEN1x1m
+3.3V_RUN_TPM
CLK_PCI_TPM_TCM
12
RE5
@ RE5
@
33_0402_5%~D
33_0402_5%~D
C C
1
@
@
2
CE3
CE3
27P_0402_50V8J~D
27P_0402_50V8J~D
PAD-OPEN1x1m
1 2
R873 0_0402_5%~D@ R873 0_0402_5%~D@
+3.3V_SB3V
SP_TPM_LPC_EN<39>
+3.3V_RUN
R1666 10K _0402_5%~D@R1666 10K_0402_5%~D@
R1665 0_0402_5%~D@ R1665 0_0402_5%~D@
LPC_LAD0<14,34,39,40>
LPC_LAD1<14,34,39,40>
LPC_LAD2<14,34,39,40>
LPC_LAD3<14,34,39,40>
CLK_PCI_TPM_TCM< 15>
LPC_LFRAME#<14,34,39,40>
PCH_PLTRST#_EC<17,34,35,39,40>
IRQ_SERIRQ<14,39,40>
CLKRUN#<16,39,40>
1 2
1 2
D87 RB751S40T1_SOD523-2~D@D87 RB751S40T1_SOD523-2~D@
+3.3V_SB3V
1
2
SP_TPM_LPC_EN_R
21
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLK_PCI_TPM_TCM
LPC_LFRAME#
PCH_PLTRST#_EC
IRQ_SERIRQ
CLKRUN#
TCM_BA1
4
4700P_0402_25V7K~D
4700P_0402_25V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1@
1@
1@
1@
1
C45
C45
C44
C44
2
ATMEL TPM for E4
U39
1@ U39
1@
5
SB3V
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
1
ATEST_1
2
ATEST_2
3
ATEST_3
AT97SC3204-X2A14-AB_TSSOP28
AT97SC3204-X2A14-AB_TSSOP28
VCC_0
VCC_1
VCC_2
V_BAT
NBO_13
NBO_14
GPIO6
TESTBI
TESTI
NC_7
GND_4
GND_11
GND_18
GND_25
10
19
24
12
13
14
6
9
8
7
4
11
18
25
NC_12
JETWAY_CLK14M
NC_PNC_P
NC_6
TCM_BA0
PP
+3.3V_RUN_TPM
1 2
C554 1U_0402_6.3V6K~D@C554 1U_04 02_6.3V6K~D@
R656 4.7K_0402_5%~D@ R656 4.7K_0402_5%~D@
3
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
1
1@
1@
C550
C550
2
2
JETWAY_CLK14M <15>
+3.3V_RUN_TPM
1 2
2
+3.3V_SUS
+5V_RUN
USH_SMBCLK
USH_SMBDAT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C52
C52
1
2
1
USBP7-<17>
USBP7+<17>
USH_SMBCLK<40>
USH_SMBDAT<40>
BCM5882_ALERT#<39>
BT_COEX_STATUS2<41>
BT_PRI_STATUS<41>
PLTRST_USH#<17>
USH_PWR_STATE #<39>
CONTACTLESS_DET#<18>
USH_DET#<18>
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
TYCO_2-2041070-0
TYCO_2-2041070-0
1 2
R589 2.2K_0402_5%~DR589 2.2K_0402_5%~D
1 2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1
1
1@
1@
C551
C551
1@
1@
1@
1@
C553
C553
C552
C552
2
2
R585 2.2K_0402_5%~DR585 2.2K_0402_5%~D
+3.3V_SUS
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C53
C53
1
2
+3.3V_RUN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C51
C51
1
2
JUSH1
JUSH1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
GND1
GND2
1
Co-lay U37 and U38
LPC layout: Place TCM first and then end LPC with TPM.
B B
LOW:Power Down Mode
High:Working Mode
SP_TPM_LPC_EN_R
+3.3V_RUN_TPM
12
12
12
R658
@R658
@
10K_0402_5%~D
10K_0402_5%~D
12
R660
1@ R660
1@
10K_0402_5%~D
10K_0402_5%~D
TCM_BA0
TCM_BA1
R657
@R657
@
10K_0402_5%~D
10K_0402_5%~D
R659
1@ R659
1@
10K_0402_5%~D
10K_0402_5%~D
A A
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PCH_PLTRST#_EC
IRQ_SERIRQ
CLKRUN#
PP
TCM_BA1
TCM_BA0
China TCM: NationZ & Jetway co-lay
VDD_0
VDD_1
VDD_2
NC_5
NC_12
NC_13
NC_1
NC_2
NC_6
NC_8
NC_P
+3.3V_RUN_TPM
10
19
24
11
18
25
4
5
12
13
1
2
6
8
14
NC_12
JETWAY_CLK14M
NC_6
NC_P
U37
4@ U37
4@
28
LPCPD#
26
LAD0
23
LAD1
20
LAD2
17
LAD3
21
LCLK
22
LFRAME#
16
LRESET#
27
SERIRQ
15
CLKRUN#
7
PP
3
BA_1
9
BA_0
SSX44-B-D-T1_TSSOP28~D
SSX44-B-D-T1_TSSOP28~D
GND_11
GND_18
GND_25
GND_4
+3.3V_SB3V
JETWAY_CLK14MCLK_PCI_TPM_TCM
12
@
@
RE6
RE6
33_0402_5%~D
33_0402_5%~D
1
@
@
CE4
CE4
27P_0402_50V8J~D
27P_0402_50V8J~D
2
USH_PWR_STATE #
12
R1640
R1640
1M_0402_5%~D
1M_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
TPM/TCM
TPM/TCM
TPM/TCM
LA-7761P
LA-7761P
LA-7761P
32 59Wednesday, February 22, 2012
32 59Wednesday, February 22, 2012
32 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
A
1 1
B
C
D
E
+3.3V_RUN
+1.5V_RUN
+PE_VDDH
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
2
2 2
C574
C574
C573
C573
2
place close to pin U38.32
3 3
4 4
L47
L47
1 2
BLM18BD601SN1D_0603~D
BLM18BD601SN1D_0603~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C561
C561
C562
C562
2
2
CLK_PCIE_MMI<15>
CLK_PCIE_MMI#<15>
PCIE_PRX_MMITX_P6<15>
PCIE_PRX_MMITX_N6<15>
PCIE_PTX_MMIRX_P6<15>
PCIE_PTX_MMIRX_N6<15>
PLTRST_MMI#<17>
MMICLK_REQ#<15>
L45
L45
BLM18PG471SN1D_2P~D
BLM18PG471SN1D_2P~D
1 2
C569 0.1U_0402_10V7K~DC569 0.1U_0402_10V7K~D
1 2
C571 0.1U_0402_10V7K~DC571 0.1U_0402_10V7K~D
1 2
C567 0.1U_0402_10V7K~DC567 0.1U_0402_10V7K~D
1 2
C568 0.1U_0402_10V7K~DC568 0.1U_0402_10V7K~D
1 2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
1
C577
C577
2
2
1 2
L44 BLM18BD601SN1D_0603~ DL44 BLM18BD 601SN1D_0603~D
C578 4.7U_0603_6.3V6K~DC578 4.7U_0603_6.3V6K~D
R677 191_0402_1%~DR677 191_040 2_1%~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C576
C576
C575
C575
2
+3.3VDDH
+VDDH_SD +OZ_AVDD
+PE_VDDH
+PE_VDDH
12
PCIE_PRX_MMITX_P6_C
PCIE_PRX_MMITX_N6_C
PCIE_PTX_MMIRX_P6_C
PCIE_PTX_MMIRX_N6_C
1 2
U38
U38
16
3.3VDDH
9
VDDH
32
PE_VDDH
2
PE_REFCLKP
1
PE_REFCLKM
6
PE_TXP
7
PE_TXM
5
PE_RXP
4
PE_RXM
3
PE_REXT
33
GPAD
13
PE_RST#
14
MULTI-IO1
31
MULTI-IO2
OZ600FJ0LN_QFN32_5X5~D
OZ600FJ0LN_QFN32_5X5~D
MMI_VCC_OUT
SD_CMD/MS_BS
DVDD
AVDD
SKT_VCC
SD_D1
SD_D2
MMI_D0
MS_D1
MS_D2
MMI_D3
MMI_D4
MMI_D5
MMI_D6
MMI_D7
MS_CD#
MMI_CLK
SD_CD#
SD_WPI
+OZ_DVDD
10
8
+SKT_VCC
17
15
SD/MMCDAT1_R
28
SD/MMCDAT2_R
26
SD/MMCDAT0_R
29
27
25
SD/MMCDAT3_R
24
SD/MMCDAT4_R
23
SD/MMCDAT5_R
22
SD/MMCDAT6_R
21
20
11
SD/MMCCMD_R
19
18
SD/MMCCD#
12
SDWP
30
1
2
R663 33_0402_5%~DR663 33_0402_5%~D
R664 33_0402_5%~DR664 33_0402_5%~D
R665 33_0402_5%~DR665 33_0402_5%~D
R668 33_0402_5%~DR668 33_0402_5%~D
R669 33_0402_5%~DR669 33_0402_5%~D
R670 33_0402_5%~DR670 33_0402_5%~D
R672 33_0402_5%~DR672 33_0402_5%~D
R673 33_0402_5%~DR673 33_0402_5%~D
R674 33_0402_5%~DR674 33_0402_5%~D
R676 10_0402_1%~DR676 10_0402_1%~D
EMI request
SD/MMCCLK
@
@
RE678
RE678
22_0402_5%~D
22_0402_5%~D
1 2
1
CE757
@CE757
@
33P_0402_50V8J~D
33P_0402_50V8J~D
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C565
C565
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
C566
C566
+3.3V_RUN_CARD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C559
C559
2
C564
C564
SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT0
SD/MMCDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7SD/MMCDAT7_R
SD/MMCCMD
SD/MMCCLKSD/MMCCLK_R
SD/MMCCLK
33P_0402_50V8J~D
33P_0402_50V8J~D
@
@
CE758
CE758
1
EMI request
2
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
12
1
C572
C572
2
1
C560
C560
2
+3.3V_RUN_CARD
Note: The trace need to route as
daisy-chain and the trace of SD signals
need to route as short as possible
SD/MMCCLK
10K_0402_5%~D
10K_0402_5%~D
R826
R826
SD/MMCCMD
SD/MMCDAT0
SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7
SDWP
SD/MMCCD#
SD/MMCCD#
SDWP
JSD1
8
CLK/SD-5
9
VCC/VDD/SD-4
10
VSS1/SD-3
12
CMD/SD-2
4
DAT0/SD-7
3
DAT1/SD-8
15
DAT2/SD-9
14
DAT3/SD-1
13
DAT4/MMC-10
11
DAT5/MMC-11
7
DAT6/MMC-12
5
DAT7/MMC-13
1
WP SW/SD
2
CD SW/SD
16
GND SW
17
CD SW
18
WP SW
19
CD&WP/SW/GND
20
CD&WP/SW/GND
6
GND/VSS2/SD6
T-SOL_156-3000000901~D
T-SOL_156-3000000901~D
CONN@JSD1
CONN@
GND1
GND2
21
22
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C563
C563
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C570
C570
2
only for MMC/SD
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
A
B
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C
D
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Card Reader OZ600FJ0
Card Reader OZ600FJ0
Card Reader OZ600FJ0
LA-7761P
LA-7761P
LA-7761P
33 59Wednesday, February 22, 2012
33 59Wednesday, February 22, 2012
33 59Wednesday, February 22, 2012
E
1.0
1.0
1.0
5
USB_MCARD2_DET#
PCIE_MCARD2_DET#_R
D D
+1.5V_RUN
C C
+3.3V_PCIE_WWAN
B B
MINI1CLK_REQ#<15>
CLK_PCIE_MINI1#<15>
CLK_PCIE_MINI1<15>
PCIE_PRX_WANTX_N 1<15>
PCIE_PRX_WANTX_P 1<15>
PCIE_PTX_WANRX_N 1<15>
PCIE_PTX_WANRX_P 1<15>
PCIE_MCARD2_DET#<17>
33P_0402_50V8J~D
33P_0402_50V8J~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C593
C593
2
2
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C610
C610
2
2
R694 100K_0402_5%~DR694 100K_0402_5%~D
R695 10K_0402_5%~D@ R695 10K_0402_5%~D@
HW_GPS_DISABLE2#<39>
C594
C594
33P_0402_50V8J~D
33P_0402_50V8J~D
1
C611
C611
C612
C612
2
SIM Card Push-Push
+SIM_PWR
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
@
@
@
@
1
1
C636
C636
C639
C639
2
2
A A
+3.3V_RUN
12
+3.3V_PCIE_WWAN
12
Mini WWAN/GPS/LTE/UWB H=9
PCIE_WAKE#
MINI1CLK_REQ#
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
PCIE_PRX_WANTX_N 1
PCIE_PRX_WANTX_P 1
C597 0.1U_0402_10V7K~DC597 0.1U_0402_10V7 K~D
PCIE_PTX_WANRX_N 1_C
1 2
PCIE_PTX_WANRX_P 1_C
1 2
C599 0.1U_0402_10V7K~DC599 0.1U_0402_10V7 K~D
PCIE_MCARD2_DET#_R
1 2
R725 0_0402_5%~D@ R725 0_0402_5%~D@
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
33P_0402_50V8J~D
33P_0402_50V8J~D
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
1
1
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
2
1
1
+
+
C613
C613
C614
C614
C615
C615
2
UIM_RESET
UIM_CLK
C616
C616
5
2
UIM_RESET
UIM_CLK
33P_0402_50V8J~D
33P_0402_50V8J~D
1
2
2
@C628
@
1
C628
2
330U_D2E_6.3VM_R25~D
330U_D2E_6.3VM_R25~D
@
@
+
+
C1176
C1176
JSIM1
1
VCC
2
RST
3
CLK
4
NC
SUYIN_254070FB008S205ZL
SUYIN_254070FB008S205ZL
@U40
@
1
2
3
33P_0402_50V8J~D
33P_0402_50V8J~D
@C629
@
SRV05-4.TCT_SOT23-6~D
SRV05-4.TCT_SOT23-6~D
C629
DDR_XDP_WAN_ SMBCLK<7,12,13,14,15,27>
DDR_XDP_WAN_ SMBDAT<7,12,13,14,15,27>
JMINI1
1
1
3
3
5
5
7
7
9
9
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
G153G2
BELLW_80003-7041
BELLW_80003-7041
PWR
Rail
+3.3V
+3.3Vaux
+1.5V
U40
CONN@JMINI1
CONN@
2
4
6
8
10
LED_WWAN _OUT#
Voltage
Tolerance
+-9%
+-9%
+-5%
CONN@JSIM1
CONN@
5
GND
6
VPP
7
I/O
8
NC
9
GND
10
GND
6
5
4
+3.3V_PCIE_WWAN+3.3V_PCIE_WWAN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
1
2
R719
R719
1 2
UIM_VPP
UIM_DATA
UIM_VPP
UIM_DATA
33P_0402_50V8J~D
33P_0402_50V8J~D
@C630
@
1
C630
2
4
R1157 0_0402_5%~D@ R1157 0_0402_5%~D@
R1158 0_0402_5%~D@ R1158 0_0402_5%~D@
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
1 2
R704 0_0402_5%~D@ R704 0_0402_5%~D@
WWAN_SM BCLK
WWAN_SM BDAT
USBP5USBP5+
USB_MCARD2_DET#
LED_WWAN _OUT#LED_W WAN_OUT#
+3.3V_PCIE_WWAN
100K_0402_5%~D
100K_0402_5%~D
S
S
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
G
G
Q77
Q77
12
12
2
13
D
D
+3.3V_PCIE_WWAN
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
2.2K_0402_5%~D
@R1160
@
@R1159
@
12
12
R1160
R1159
WWAN_SM BCLK
WWAN_SM BDAT
+1.5V_RUN
+SIM_PWR
WWAN_RA DIO_DIS# <39>
PCH_PLTRST#_EC <17,32,35,39,40>
USBP5- <17>
USBP5+ <17>
USB_MCARD2_DET# <18>
PCIE_MCARD2_DET#USB_MCARD2_DET#
1 2
R697 0_0402_5%~D@ R697 0_0402_5%~D@
WIRELESS_LED# <39,43>
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
+SIM_PWR
33P_0402_50V8J~D
33P_0402_50V8J~D
@C631
@
C631
4
250 (Wake enable)
250
5 (Not wake enable)
375
NA
3
WLAN_RADIO_DIS#<39>
COEX2_WLAN_ACTIVE<41>
COEX1_BT_ACTIVE<41>
PCIE_PTX_WLANRX_ N2<15>
PCIE_PTX_WLANRX_ P2<15>
COEX2_WLAN_ACTIVE
C600
@C600
@
33P_0402_50V8J~D
33P_0402_50V8J~D
1 2
R693 0_0402_5%~D@ R693 0_0402_5%~D@
D31 R B751V40_SC76-2D31 RB751V40_SC76-2
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE
MINI2CLK_REQ#<15>
CLK_PCIE_MINI2#<15>
CLK_PCIE_MINI2<15>
HOST_DEBUG_RX<40>
PCIE_PRX_WLANTX_ N2<15>
PCIE_PRX_WLANTX_ P2<15>
PCIE_MCARD1_DET#<18>
PCH_CL_CLK1<15>
PCH_CL_DATA1<15>
+1.5V_RUN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C601
C601
2
2
21
PCIE_WAKE#< 28,35,40>
MSCLK<40>
C596 0.1U_0402_10V7K~DC596 0.1U_0402_10V7K~ D
1 2
1 2
C598 0.1U_0402_10V7K~DC598 0.1U_0402_10V7K~ D
PCH_CL_RST1#<15>
+3.3V_WLAN
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C602
C602
2
2
Mini WLAN/WIMAX H=9
WLAN_RADIO_DIS#_R
PCIE_WAKE#
1 2
R700 0_0402_5 %~D@R700 0_0402_5%~D@
1 2
R702 0_0402_5 %~D@R702 0_0402_5%~D@
PCIE_PRX_WLANTX_ N2
PCIE_PRX_WLANTX_ P2
PCIE_PTX_WLANRX_ N2_C
PCIE_PTX_WLANRX_ P2_C
PCIE_MCARD1_DET#
1 2
R707 0_0402_5%~D@ R707 0_0402_5%~D@
check
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@ C603
@
1
1
C603
C604
C604
2
2
C605
C605
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
1
2
+3.3V_WLAN
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
C606
C606
1
JMINI2
1
1
3
3
5
5
7
7
9
9
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
G153G2
BELLW_80003-7041
BELLW_80003-7041
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C608
C608
C607
C607
2
R698 0_0402_5%~D@ R698 0_0402_5%~D@
CONN@JMINI2
CONN@
10
1 2
+3.3V_WLAN
2
2
4
4
6
6
8
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
WIMAX_LED#
WLAN_LED#
PCIE_MCARD1_DET#USB_MCARD1_DET#
+1.5V_RUN
MSDATA
WLAN_RADIO_DIS#_R
R703 0_0402_5%~D@ R703 0_0402_5%~D@
USBP4USBP4+
USB_MCARD1_DET#
WIMAX_LED#
WLAN_LED#
WIMAX_LED# STUDY FOR DEBUG
R718
R718
1 2
100K_0402_5%~D
100K_0402_5%~D
1/2 Minicard Pink Pather/60GHz Card H=9
+3.3V_PCIE_FLASH
COEX2_WLAN_ACTIVE
MINI3CLK_REQ#<15>
CLK_PCIE_MINI3#<15>
CLK_PCIE_MINI3<15>
PCLK_80H<15>
PCIE_PRX_WPANTX _N5<15>
PCIE_PRX_WPANTX _P5<15>
PCIE_PTX_WPANRX _N5<15>
PCIE_PTX_WPANRX _P5<15>
PCIE_MCARD3_DET#<18>
+3.3V_RUN
+1.5V_RUN
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1
2
3
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
C619
C619
+3.3V_PCIE_FLASH
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
1
C620
C620
2
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
@ C621
@
C621
PCIE_WAKE#
1 2
R709 0_0402_5%~D@ R709 0_0402_5%~D@
MINI3CLK_REQ#
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
PCH_PLTRST#_EC
PCLK_80H
PCIE_PRX_WPANTX _N5
PCIE_PRX_WPANTX _P5
C617 0.1U_0402_10V7K~DC617 0.1U_0402_10V7K~D
C618 0.1U_0402_10V7K~DC618 0.1U_0402_10V7K~D
R711 100K_04 02_5%~DR 711 100K_0402_5%~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
2
1 2
1 2
1 2
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
1
C622
C622
2
PCIE_PTX_WPANRX _N5_C
PCIE_PTX_WPANRX _P5_C
PCIE_MCARD3_DET#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
C624
C624
C623
C623
1
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
1
C625
C625
C626
C626
1
2
1
3
5
7
9
2
JMINI3
1
3
5
7
9
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
G153G2
BELLW_80003-7041
BELLW_80003-7041
CONN@JMINI3
CONN@
10
2
4
6
8
+3.3V_PCIE_FLASH
2
4
6
LPC_LFRAME#
8
LPC_LAD3
10
LPC_LAD2
12
LPC_LAD1
14
LPC_LAD0
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
1 2
R710 0_0402_5%~D@ R710 0_0402_5%~D@
USBP8USBP8+
USB_MCARD3_DET#
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
PCIE_MCARD1_DET#
PCIE_MCARD1_DET#
USB_MCARD1_DET#
12
1 2
R706 0_0402_5%~D@ R706 0_0402_5%~D@
R705
R705
1 2
100K_0402_5%~D
100K_0402_5%~D
2
Q124A
Q124A
USB_MCARD3_DET# PCIE_MCARD3_DET#
+1.5V_RUN
PCH_PLTRST#_EC
R712 100K_0402_5%~D@R712 100K_0402_5%~D@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Mini Card
Mini Card
Mini Card
LA-7761P
LA-7761P
LA-7761P
1 2
R692 100K_0402_5%~DR692 100K_0402_5%~D
1 2
R699 100K_04 02_5%~D@R 699 100K_0402_5%~D@
1 2
R701 100K_04 02_5%~DR 701 100K_0402_5%~D
1 2
C595 4700P_0402_25V7K~DC595 4700P_0402_25V7K~D
PCH_PLTRST#_EC
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
LPC_LFRAME# <14,32,39,40>
LPC_LAD3 <14,32,39,40>
LPC_LAD2 <14,32,39,40>
LPC_LAD1 <14,32,39,40>
LPC_LAD0 <14,32,39,40>
HOST_DEBUG_TX <40>
USB_MCARD1_DET# <14,18>
MSDATA
USB_MCARD3_DET#
1
2
MSDATA <40>
+3.3V_WLAN
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
Q124B
Q124B
61
1 2
R708 0_0402_5%~D@ R708 0_0402_5%~D@
USBP8- <17>
USBP8+ <17>
12
WPAN Noise
C627
@C627
@
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1
+3.3V_ALW_PCH
+3.3V_RUN
USBP4- <17>
USBP4+ <17>
WIRELESS_LED#WIRELESS_LED#
3
just reserve
+3.3V_ALW_PCH
34 59Wednesday, February 22, 2012
34 59Wednesday, February 22, 2012
34 59Wednesday, February 22, 2012
1.0
1.0
1.0
5
4
3
2
1
Power Control for Mini card1
+3.3V_ALW
D D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
AUX_EN_WOW L<39>
C C
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MCARD_WW AN_PWREN<39>
B B
+3.3V_ALW
Q39A
Q39A
2
12
R716
R716
100K_0402_5%~D
100K_0402_5%~D
Power Control for Mini card2
Q41A
Q41A
12
100K_0402_5%~D
100K_0402_5%~D
+PWR_SRC_S
100K_0402_5%~D
100K_0402_5%~D
12
R713
R713
5
61
+3.3V_ALW
100K_0402_5%~D
100K_0402_5%~D
12
R721
R721
MCARD_WW AN_PWREN#
61
2
R726
R726
100K_0402_5%~D
100K_0402_5%~D
6
12
R714
R714
2
1
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q39B
Q39B
4
Q38
Q38
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
S
S
45
G
G
3
1M_0402_5%~D
1M_0402_5%~D
12
R1620
R1620
+PWR_SRC_S
5
12
3
4
+3.3V_ALW
470K_0402_5%~D
470K_0402_5%~D
R722
R722
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q41B
Q41B
1
2
+3.3V_WLAN
12
4700P_0402_25V7K~D
4700P_0402_25V7K~D
C632
C632
Q40
Q40
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
220P_0402_25V8J
4.7M_0402_5%~D
4.7M_0402_5%~D
12
220P_0402_25V8J
1
C644
R1625
R1625
C644
2
R715
R715
20K_0402_5%~D
20K_0402_5%~D
+3.3V_PCIE_WWAN
12
R723
R723
1K_0402_5%~D
1K_0402_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q73
Q73
G
G
S
S
MCARD_WW AN_PWREN#
2
+1.5V_RUN
+3.3V_RUN +3.3V_CARD
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C635
C635
2
SIO_SLP_S3#<11,16,27,36,39,42,47>
RUN_ON<27,39,42,47>
PCH_PLTRST#_EC<17,32,34,39,40>
1 2
R734 0_0402_5%~D@ R734 0_0402_5%~D@
1 2
R717 0_0402_5%~D@ R717 0_0402_5%~D@
0.1U_0402_25V6K~D
+3.3V_RUN
+3.3V_CARD
+1.5V_CARD
+1.5V_RUN
USBP10-<17>
USBP10+<17>
1
2
1
C634
C634
2
EXPRCRD_STBY_R#
Note: Add connection on pin4, pin5, pin 13
and pin14 to support GMT 2nd source part
Power Control for Mini card3
+3.3V_ALW
+3.3V_ALW
Q43A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MCARD_MISC_PW REN<39>
A A
Q43A
2
12
R733
R733
100K_0402_5%~D
100K_0402_5%~D
+PWR_SRC_S
470K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
12
R728
R728
61
470K_0402_5%~D
12
R729
R729
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q43B
Q43B
5
4
Q42
Q42
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
4.7M_0402_5%~D
4.7M_0402_5%~D
12
R1628
R1628
1
2
220P_0402_25V8J
220P_0402_25V8J
C650
C650
+3.3V_PCIE_FLASH
12
20K_0402_5%~D
20K_0402_5%~D
R730
R730
+3.3V_CARDAUX
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
Express Card PWR S/W
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C633
C633
U41
U41
17
12
20
1
6
19
4
5
13
14
16
TPS2231MRGPR-2_QFN20_4X4~D
TPS2231MRGPR-2_QFN20_4X4~D
AUXOUT
AUXIN
3.3VIN23.3VOUT
1.5VOUT
1.5VIN
SHDN#
STBY#
SYSRST#
CPUSB#
OC#
NC
NC
RCLKEN
NC
NC
NC
Express Card Conn.
1 2
R724 0_0402_5%~D@R724 0_0402_5%~D@
1 2
R727 0_0402_5%~D@R727 0_0402_5%~D@
1
1
4
4
L49 DLW21 SN900SQ2L_0805_4P~DL49 DLW21SN900SQ2L_0805_ 4P~D
+3.3V_CARD
C646
C646
2
2
3
3
CARD_SMBDAT<40>
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C649
C649
PCIE_PRX_EXPTX_N3<15>
2
PCIE_PRX_EXPTX_P3<15>
PCIE_PTX_EXPRX_N3<15>
PCIE_PTX_EXPRX_P3<15>
PERST#
CPPE#
GND
PAD
CARD_SMBCLK<40>
CLK_PCIE_EXP#< 15>
CLK_PCIE_EXP<15>
C641
C641
C645
C645
JEXP1
1
GND1
2
USB_D-
3
USB_D+
4
CPUSB#
5
RESERVED
6
RESERVED
7
SMB_CLK
8
SMB_DAT
9
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PER_N0
PER_P0
GND
PET_N0
PET_P0
GND
GND
GND
GND
GND
SANTA_130801-08
SANTA_130801-08
+1.5V_CARD+3.3V_SUS
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
CONN@JEXP1
CONN@
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
C638
C638
C637
C637
2
+3.3V_CARDAUX
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
R731
R731
CE18 0.1U_0402_25V6K~DCE18 0.1U_0402_25V 6K~D
1
2
12
0.1U_0402_25V6K~D
1
2
+1.5V_CARD
2.2K_0402_5%~D
2.2K_0402_5%~D
R732
R732
1
C640
C640
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
C642
C642
C643
C643
2
2
15
3
11
CARD_RESET#
8
EXPRCRD_CPPE#
10
CPUSB#
9
18
7
21
PCIE_WAKE#<28,34,40>
EXPCLK_REQ#<15>
CE16 0.1U_0402_25V6K~DCE16 0.1U_0402_25V 6K~D
CE17 0.1U_0402_25V6K~DCE17 0.1U_0402_25V 6K~D
1
1
2
2
+3.3V_SUS
2.2K_0402_5%~D
2.2K_0402_5%~D
12
USBP10_DUSBP10_D+
CPUSB#
CARD_SMBCLK
CARD_SMBDAT
CARD_RESET#
EXPRCRD_CPPE#
C647 0.1U_0402_10V7K~DC647 0.1U_0402_10V7K~D
PCIE_PTX_EXPRX_N3_C
1 2
PCIE_PTX_EXPRX_P3_C
1 2
C648 0.1U_0402_10V7K~DC648 0.1U_0402_10V7K~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PCIE-SATA SW / PCIE PWR
PCIE-SATA SW / PCIE PWR
PCIE-SATA SW / PCIE PWR
LA-7761P
LA-7761P
LA-7761P
35 59Wednesday, February 22, 2012
35 59Wednesday, February 22, 2012
35 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
L95
USB3RN1<17>
USB3RP1<17>
D D
USB3TN1<17>
USB3TP1<17>
USB3TN1
C412 0.1U_0402_10V7K~DC412 0.1U_0402_10V7 K~D
USB3TP1
C413 0.1U_0402_10V7K~DC413 0.1U_0402_10V7 K~D
USB3RN1
USB3RP1
USB3T_N1
12
12
L95
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1605 0_0402_5%~D@R1605 0_0402_5%~D@
1 2
R1604 0_0402_5%~D@R1604 0_0402_5%~D@
L96
L96
4
4
1
1
DLW21SN900HQ2L_0805_4P~D
DLW21SN900HQ2L_0805_4P~D
1 2
R1606 0_0402_5%~D@R1606 0_0402_5%~D@
1 2
R1603 0_0402_5%~D@R1603 0_0402_5%~D@
4
DLW21SN900SQ2L_0805_4P~D
3
3
2
2
3
3
2
2
USB3RN1_D-
USB3RP1_D+
USB3TN1_D-
USB3TP1_D+USB3T_P1
USBP0_D- USBP0_R_D-
USBP0_D+
USB3TP1_D+ USB3TP1_D+
USB3TN1_D- U SB3TN1_D-
USB3RP1_D+ USB3RP1_D+
USB3RN1_D- USB3RN1_D-
DLW21SN900SQ2L_0805_4P~D
1
1
2
4
L51
L51
R736 0_0402_5%~D@ R736 0_0402_5%~D@
R740 0_0402_5%~D@ R740 0_0402_5%~D@
D78
D78
1
2
4
5
3
8
IP4292CZ10-TBR_XSON10_2.5X1~D
IP4292CZ10-TBR_XSON10_2.5X1~D
4
1 2
1 2
3
2
3
10
9
7
6
3
USBP0_R_D+
+5V_USB_CHG_PWR
150U_D2_6.3VY_R15M~D
150U_D2_6.3VY_R15M~D
1
C651
C651
+
+
2
2
JUSB1
CONN@JUSB1
CONN@
1
VBUS
2
D-
3
D+
4
GND
5
StdA-SSRX-
6
StdA-SSRX+
7
8
9
GND
GND-DRAIN
GND
StdA-SSTX-
GND
StdA-SSTX+
GND
LOTES_AUSB0015-P001A
LOTES_AUSB0015-P001A
10
11
12
13
3
2
1
USBP0_R_DUSBP0_R_D+
USB3RN1_DUSB3RP1_D+
D72
PESD5V0U2BT_SOT23-3~D
D72
PESD5V0U2BT_SOT23-3~D
USB3TN1_DUSB3TP1_D+
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C654
C654
2
1
+5V_ALW
+5V_ALW
1
2
JBTB1
65
GND
63
GND
61
GND
59
59
57
57
55
55
53
53
51
51
49
49
47
47
45
45
43
43
41
41
39
39
37
37
35
35
33
33
31
31
29
29
27
27
25
25
23
23
21
21
19
19
17
17
15
15
13
13
11
11
9
9
7
7
5
5
3
3
1
1
TYCO_2041315-1~D
TYCO_2041315-1~D
10U_0805_10V6K~D
10U_0805_10V6K~D
C676
C676
CONN@JBTB1
CONN@
GND
GND
GND
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
PWRSHARE_EN #
1
ESATA_USB_PWR _EN#<39>
C675
C675
2
66
64
62
60
60
58
58
56
56
54
54
52
52
50
50
48
48
46
46
44
44
42
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
R154 0_0402_5%~D@R154 0_0402_5%~D@
40
R155 0_0402_5%~DR155 0_0402_5%~D
38
36
34
32
30
28
26
24
22
20
18
16
14
MIC_IN_R
12
10
AUD_HP_OUT_R
8
6
AUD_HP_OUT_L
4
2
1 2
1 2
1
2
D-
3
D+
4
9
10K_0402_5%~D
10K_0402_5%~D
1 2
R784 0_0402_5%~D@ R784 0_0402_5%~D@
R1613
@R1613
@
PWRSHARE_EN
USBP0_DUSBP0_D+
SEL
+5V_ALW
100K_0402_5%~D
100K_0402_5%~D
1 2
13
D
D
Q126
Q126
S
S
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
1 2
0211 modify follow USB mapping
R816
R816
100K_0402_5%~D
100K_0402_5%~D
1 2
PWRSHARE_EN #
13
D
D
Q48
Q48
2
R1614
R1614
G
SSM3K7002FU_SC70-3~D
G
SSM3K7002FU_SC70-3~D
S
S
SB#
2
G
G
USBx2 /USB3.0x1 / CRT/ AUDIO JACK IO BOARD
USBP1+<17>
USBP1-<17>
USBP9+<17>
USBP9-<17>
RED_CRT<23>
GREEN_CRT<23>
BLUE_CRT<23>
DAT_DDC2_CRT<23>
CLK_DDC2_CRT<23>
HSYNC_BUF<23>
VSYNC_BUF<23>
USB_SIDE_EN#<39>
USB_OC0#<17>
USB_OC4#<17>
AUD_HP_NB_SENSE<29,39>
IO_LOOP#<18>
RED_CRT
GREEN_CRT
BLUE_CRT
DAT_DDC2_CRT
CLK_DDC2_CRT
HSYNC_BUF
VSYNC_BUF
AUD_HP_NB_SENSE
IO_LOOP#
3
USB_PWR_SHR_V BUS_EN<39>
R153 0_0402_5%~D@ R153 0 _0402_5%~D@
SIO_SLP_S3#<11,16,27,35,39,42,47>
1
2
+3.3V_ALW
USB_PWR_SHR_E N#<39>
C1002
C1002
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
IO1_LOOP#<18>
1
C1184
C1184
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
LID_CL#<39,43>
WIRELESS_ON#/OFF<39>
5
C C
Defult on,
WIRELESS_ON/OFF#:
B B
LOW: ON
HIGH: OFF
A A
1 2
R1626 0_0402_5%~D@R1626 0_0402_5%~D@
1 2
MEDIA_DET#<18 >
BATT_YELLOW<43>
BATT_WHITE<43>
SATA_LED< 43>
WLAN_LED<43>
VOL_MUTE<40>
VOL_DOWN<40>
VOL_UP<40>
MEDIA_DET#
BATT_YELLOW
BATT_WHITE
SATA_LED
WLAN_LED
VOL_MUTE
VOL_DOWN
VOL_UP
power 20mil
normal trace 50ohm
+5V_ALW
1
2
SB#
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C715
C715
USBP0-<17>
USBP0+<17>
MEDIA BOARD
JSF1
CONN@JSF1
CONN@
1
1
2
2
3
3
4
4
5
7
5
G1
6
8
6
G2
PS_HPF10052-06M000R
PS_HPF10052-06M000R
U2
U2
8
7
6
5
PI5USB1457AZAEX_TDFN8_2X2~ D
PI5USB1457AZAEX_TDFN8_2X2~ D
JLED1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
GND
18
GND
ACES_51524-0160N-001
ACES_51524-0160N-001
SB
YY+
VDD
CONN@JLED1
CONN@
GND
INT
SEL
4
U48
U48
1
GND
2
IN
3
IN
4
EN1#
EN2#5FAULT#2
TPS2560DRCR-PG1.1_SON10_3X3~D
TPS2560DRCR-PG1.1_SON10_3X3~D
USB3RN2 <17>
USB3RP2 <17>
USB3TN2 <17>
USB3TP2 <17>
MIC_IN_R <29>
AUD_HP_OUT_R <29>
AUD_HP_OUT_L <29>
2
10
FAULT1#
9
OUT1
8
OUT2
7
ILIM
6
11
T-PAD
1
C1185
C1185
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2
+5V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
0211 modify follow USB mapping
USB_OC0# <17>
USB_OC1# <17>
+5V_ALW
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+5V_USB_CHG_PWR
+SATA_SIDE_PWR
12
R748
R748
24.9K_0402_1%~D
24.9K_0402_1%~D
+3.3V_RUN+5V_RUN+5V_ALW
1
2
C1001
C1001
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
Place close
to JIO1.40,42
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
IO BOARD/ USB3.0
IO BOARD/ USB3.0
IO BOARD/ USB3.0
LA-7761P
LA-7761P
LA-7761P
Place close to
JIO1.30,32,34,36
1
1
C998
C998
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1.0
1.0
36 59Wednesday, February 22, 2012
36 59Wednesday, February 22, 2012
36 59Wednesday, February 22, 2012
1.0
5
4
3
2
1
+3.3V_RUN
PAD-OPEN1x1m
PAD-OPEN1x1m
1 2
D D
+3.3V_RUN_PS8513
ESATA_PTX_DRX_P4_C<14>
ESATA_PTX_DRX_N4_C<14>
ESATA_PRX_DTX_N4_C<14>
ESATA_PRX_DTX_P4_C<14>
C C
ESATA_PTX_DRX_P4_C
ESATA_PTX_DRX_N4_C
ESATA_PRX_DTX_P4_C ESATA_PRX_DTX_P4
1 2
R741 0_0402_5%~D@ R741 0_0402_5%~D@
ESATA_PTX_DRX_P4
12
C663 0.01U_0402_ 16V7K~DC663 0.01U_0402_16V7K~D
C664 0.01U_0402_ 16V7K~DC664 0.01U_0402_16V7K~D
C665 0.01U_0402_ 16V7K~DC665 0.01U_0402_16V7K~D
C666 0.01U_0402_ 16V7K~DC666 0.01U_0402_16V7K~D
ESATA_PTX_DRX_N4
12
ESATA_PRX_DTX_N4ESATA_PRX_DTX_N4_C
12
12
ESATA Repeater
U44
U44
7
EN
17
NC_GND_VDD
19
18
1
2
4
5
3
13
21
PS8513BTQFN20GTR-A0_TQFN20_4X4
PS8513BTQFN20GTR-A0_TQFN20_4X4
PREXT/NC/VDD
NC_GND_VDD
NC/GND/VDD
NC_GND_VDD
A_INp
A_INn
B_OUTn
B_OUTp
GND
GND
GND
Note: +ESATA_DEW1, +ESATA_DEW2, +ESATA_EQ1, +ESATA_EQ2 need to
route 10 mils and R1584~R1587 need to change to 10k and no
stuff R1584, R1585 to support TI SN75LVCP601
PJP9
PJP9
VCC
VCC
A_PRE
B_PRE
A_OUTp
A_OUTn
B_INp
B_INn
+3.3V_RUN_PS8513
6
16
20
10
9
8
15
14
11
12
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
1
C662
C662
C661
C661
2
2
REXT
ESATA_PE1
ESATA_PE2
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
ESATA_PRX_DTX_P4_RP
ESATA_PRX_DTX_N4_RP
+SATA_SIDE_PWR
150U_D2_6.3VY_R15M~D
150U_D2_6.3VY_R15M~D
1
+
+
2
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
12
12
@
@
@
@
R1595
R1595
R1594
R1594
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
C668
C668
C667
C667
1
2
0_0402_5%~D
@
@
0_0402_5%~D
0_0402_5%~D
12
12
R742
R742
R743
R743
JESA1
CONN@
JESA1
CONN@
1
B B
L90
L90
USBP2-<17>
USBP2+<17>
1
1
4
4
DLW21SN900SQ2L_0805_4P~D
DLW21SN900SQ2L_0805_4P~D
1 2
R1150 0_0402_5%~D@ R1150 0_0402_5%~D@
1 2
R1151 0_0402_5%~D@ R1151 0_0402_5%~D@
USBP2_D-
2
2
USBP2_D+
3
3
2
3
D74
D74
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
1
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP SATA_PRX_D TX_P4
1 2
C671 0.01U_0402_16V7K~DC671 0.01U_0402_16V7K~D
1 2
C672 0.01U_0402_16V7K~DC672 0.01U_0402_16V7K~D
1 2
C673 0.01U_0402_16V7K~DC673 0.01U_0402_16V7K~D
1 2
C674 0.01U_0402_16V7K~DC674 0.01U_0402_16V7K~D
USBP2_DUSBP2_D+
SATA_PTX_DRX_P4
SATA_PTX_DRX_N4
SATA_PRX_DTX_N4
VBUS
2
D-
USB
USB
3
D+
4
GND
5
GND
6
A+
ESATA
ESATA
7
A-
8
GND
9
B-
10
B+
11
GND
12
GND
13
GND
14
GND
15
GND
FOX_3Q38111-RA5C5-8H~D
FOX_3Q38111-RA5C5-8H~D
Place D74 close to JESATA1
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
USB/ESATA/IO/MDC
USB/ESATA/IO/MDC
USB/ESATA/IO/MDC
LA-7761P
LA-7761P
LA-7761P
37 59Wednesday, February 22, 2012
37 59Wednesday, February 22, 2012
37 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
4
3
2
1
JDOCK1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
146
147
148
153
154
155
156
157
158
12
12
12
12
12
12
12
12
SLICE_BAT_PRES#
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
@
@
1
CE6
CE6
2
DOCK_DET_1
DPD_CA_DET
DPD_DOCK_LANE_P0DPD _PCH_LANE_P0_C
DPD_DOCK_LANE_N0
DPD_DOCK_LANE_P1
DPD_DOCK_LANE_N1
DPD_DOCK_LANE_P2
DPD_DOCK_LANE_N2
DPD_DOCK_LANE_P3
DPD_DOCK_LANE_N3
DPD_DOCK_AUX
DPD_DOCK_AUX#
BLUE_DOCK
RED_DOCK
GREEN_DOCK
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
3
C702
C702
1
2
D33
D33
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
DOCK_LOM_SPD10LED_GRN#<30>
C690 0.1U_0402_10V7K~DC690 0.1U_0402_10V7K~D
D D
C C
B B
DPD_PCH_LANE_P0<16>
DPD_PCH_LANE_N0<16>
DPD_PCH_LANE_P1<16>
DPD_PCH_LANE_N1<16>
DPD_PCH_LANE_P2<16>
DPD_PCH_LANE_N2<16>
DPD_PCH_LANE_P3<16>
DPD_PCH_LANE_N3<16>
DPD_PCH_DOCK_HPD<16> DPC_PCH_DOCK_HPD <16>
Close to DOCK
Its for Enhance ESD on dock issue.
DPD_PCH_DOCK_HPD
12
C679 0.1U_0402_10V7K~DC679 0.1U_0402_10V7K~D
12
C681 0.1U_0402_10V7K~DC681 0.1U_0402_10V7K~D
12
C683 0.1U_0402_10V7K~DC683 0.1U_0402_10V7K~D
12
C692 0.1U_0402_10V7K~DC692 0.1U_0402_10V7K~D
12
C685 0.1U_0402_10V7K~DC685 0.1U_0402_10V7K~D
12
C687 0.1U_0402_10V7K~DC687 0.1U_0402_10V7K~D
12
C689 0.1U_0402_10V7K~DC689 0.1U_0402_10V7K~D
12
12
R757
R757
100K_0402_5%~D
100K_0402_5%~D
DPD_PCH_LANE_N0_C
DPD_PCH_LANE_P1_C
DPD_PCH_LANE_N1_C
DPD_PCH_LANE_P2_C
DPD_PCH_LANE_N2_C
DPD_PCH_LANE_P3_C
DPD_PCH_LANE_N3_C
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
1
C695
C695
2
+DOCK_PWR_BAR
RE7 33_0402_5%~DRE7 33_0402_5%~D
RE8 33_0402_5%~DRE8 33_0402_5%~D
RE9 33_0402_5%~DRE9 33_0402_5%~D
RE10 33_0402_5%~DRE10 33_0402_5%~D
RE13 33_0402_5%~DRE13 33_0402_5%~D
RE14 33_0402_5%~DRE14 33_0402_5%~D
RE15 33_0402_5%~DRE15 33_0402_5%~D
RE16 33_0402_5%~DRE16 33_0402_5%~D
DPD_DOCK_AUX<26>
DPD_DOCK_AUX#<26>
DPD_PCH_DOCK_HPD
+NBDOCK_DC_IN_SS
BLUE_DOCK<23>
RED_DOCK<23>
GREEN_DOCK<23>
HSYNC_DOCK<23>
VSYNC_DOCK<23>
CLK_MSE<40>
DAT_MSE<40>
DAI_BCLK#<29>
DAI_LRCK#<29>
DAI_DI<29>
DAI_DO#<29>
DAI_12MHZ#<29>
D_LAD0<39>
D_LAD1<39>
D_LAD2<39>
D_LAD3<39>
D_LFRAME#<39>
D_CLKRUN#<39>
D_SERIRQ<39>
D_DLDRQ1#<39>
CLK_PCI_DOCK<17>
DOCK_SMB_CLK<40>
DOCK_SMB_DAT<40>
DOCK_SMB_ALERT#<39,53>
DOCK_PSID<44>
DOCK_PWR_BTN#<40>
SLICE_BAT_PRES#<39,53> DOCK_DET# <39>
1
2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
GND1
PWR1
PWR1
PWR1
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
JAE_WD2F144W B1
JAE_WD2F144W B1
CONN@JDOCK1
CONN@
PWR2
PWR2
PWR2
GND2
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
Shield_G
DOCK_AC_OFF
2
2
4
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
149
150
151
152
159
160
161
162
163
164
DPC_CA_DET
DPC_DOCK_LANE_P0
DPC_DOCK_LANE_N0
DPC_DOCK_LANE_P1
DPC_DOCK_LANE_N1
DPC_DOCK_LANE_P2
DPC_DOCK_LANE_N2
DPC_DOCK_LANE_P3
DPC_DOCK_LANE_N3
DPC_DOCK_AUX
DPC_DOCK_AUX#
DPC_PCH_DOCK_HPD
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5
SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5
USBP6_R_D+
USBP6_R_D-
DOCK_DET_R#
0.1U_0603_50V7K~D
0.1U_0603_50V7K~D
C703
C703
1
2
DOCK_AC_OFF <39,53>
DOCK_LOM_SPD100LED_ORG# <30>
DPC_CA_DET <26>DPD_CA_DET<26>
RE17 33_0402_5%~DRE17 33_0402_5%~D
1 2
RE18 33_0402_5%~DRE18 33_0402_5%~D
1 2
RE19 33_0402_5%~DRE19 33_0402_5%~D
1 2
RE20 33_0402_5%~DRE20 33_0402_5%~D
1 2
RE21 33_0402_5%~DRE21 33_0402_5%~D
1 2
RE22 33_0402_5%~DRE22 33_0402_5%~D
1 2
RE23 33_0402_5%~DRE23 33_0402_5%~D
1 2
RE24 33_0402_5%~DRE24 33_0402_5%~D
1 2
DPC_DOCK_AUX <26>
DPC_DOCK_AUX# <26>
ACAV_DOCK_SRC# <53>
DAT_DDC2_DOCK < 23>
CLK_DDC2_DOCK <23>
12
C697 0.01U_0402_16V7K~DC697 0.01U_0402_16 V7K~D
12
C698 0.01U_0402_16V7K~DC698 0.01U_0402_16 V7K~D
1 2
C699 0.01U_0402_16V7K~DC699 0.01U_0402_16 V7K~D
1 2
C700 0.01U_0402_16V7K~DC700 0.01U_0402_16 V7K~D
USBP3+ <17>
USBP3- <17>
CLK_KBD <40>
DAT_KBD <40>
USB3RN4 <17>
USB3RP4 <17>
USB3TN4 <17>
USB3TP4 <17>
BREATH_LED# <39,43>
DOCK_LOM_ACTLED_YEL# <30>
DOCK_LOM_TRD0+ <30>
DOCK_LOM_TRD0- <30>
DOCK_LOM_TRD1+ <30>
DOCK_LOM_TRD1- <30>
+LOM_VCT
DOCK_LOM_TRD2+ <30>
DOCK_LOM_TRD2- <30>
DOCK_LOM_TRD3+ <30>
DOCK_LOM_TRD3- <30>
DOCK_DCIN_IS+ <52>
DOCK_DCIN_IS- <52>
DOCK_POR_RST# <40>
+DOCK_PWR_BAR
DPC_PCH_LANE_P0_C
DPC_PCH_LANE_N0_C
DPC_PCH_LANE_P1_C
DPC_PCH_LANE_N1_C
DPC_PCH_LANE_P2_C
DPC_PCH_LANE_N2_C
DPC_PCH_LANE_P3_C
DPC_PCH_LANE_N3_C
DAI_12MHZ# DAI_BCLK#
12
RE11
@RE11
@
10_0402_1%~D
10_0402_1%~D
1
CE8
@CE8
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
2
C691 0.1U_0402_10V7K~DC691 0.1U_0402_10V7K~D
C680 0.1U_0402_10V7K~DC680 0.1U_0402_10V7K~D
C682 0.1U_0402_10V7K~DC682 0.1U_0402_10V7K~D
C684 0.1U_0402_10V7K~DC684 0.1U_0402_10V7K~D
C693 0.1U_0402_10V7K~DC693 0.1U_0402_10V7K~D
C686 0.1U_0402_10V7K~DC686 0.1U_0402_10V7K~D
C688 0.1U_0402_10V7K~DC688 0.1U_0402_10V7K~D
C694 0.1U_0402_10V7K~DC694 0.1U_0402_10V7K~D
SATA_PRX_DKTX_P5_C <14>
SATA_PRX_DKTX_N5_C <14>
SATA_PTX_DKRX_P5_C <14>
SATA_PTX_DKRX_N5_C <14>
+LOM_VCT
1
2
RB751V40_SC76-2
RB751V40_SC76-2
L99
@ L99
@
2
2
3
3
DLW21SN121SQ2L_4P~D
DLW21SN121SQ2L_4P~D
1 2
R1672 0_0402_5%~DR1672 0_0402_5%~D
1 2
R1673 0_0402_5%~DR1673 0_0402_5%~D
@
@
C701
C701
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
D32
D32
21
12
12
12
12
12
12
12
12
1
1
4
4
12
RE12
@RE12
@
10_0402_1%~D
10_0402_1%~D
1
CE9
@CE9
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
2
DPC_PCH_LANE_P0 < 16>
DPC_PCH_LANE_N0 <16>
DPC_PCH_LANE_P1 < 16>
DPC_PCH_LANE_N1 <16>
DPC_PCH_LANE_P2 < 16>
DPC_PCH_LANE_N2 <16>
DPC_PCH_LANE_P3 < 16>
DPC_PCH_LANE_N3 <16>
0.033U_0402_16V7K~D
0.033U_0402_16V7K~D
1
C696
C696
Close to DOCK
2
Its for Enhance ESD on dock issue.
USBP6+ <17>
USBP6- <17>
CLK_PCI_DOCK
12
R756
R756
33_0402_5%~D
33_0402_5%~D
1
C704
C704
12P_0402_50V8J~D
12P_0402_50V8J~D
2
DOCK_DET#
R755 100K_04 02_5%~DR 755 100K_0402_5%~D
DPC_PCH_DOCK_HPD
1 2
12
R758
R758
100K_0402_5%~D
100K_0402_5%~D
+3.3V_ALW
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
5
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DOCKING CONN
DOCKING CONN
DOCKING CONN
LA-7761P
LA-7761P
LA-7761P
38 59Wednesday, February 22, 2012
38 59Wednesday, February 22, 2012
38 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
+3.3V_ALW
1 2
R796 10K_040 2_5%~DR796 10K_0402_5%~D
1 2
R798 100K_04 02_5%~DR 798 100K_0402_5%~D
1 2
R761 100K_04 02_5%~DR 761 100K_0402_5%~D
1 2
D D
C C
B B
R763 100K_04 02_5%~DR 763 100K_0402_5%~D
1 2
R760 100K_04 02_5%~DR 760 100K_0402_5%~D
1 2
R774 100K_04 02_5%~DR 774 100K_0402_5%~D
1 2
R776 100K_04 02_5%~DR 776 100K_0402_5%~D
1 2
R768 10K_040 2_5%~DR768 10K_0402_5%~D
1 2
R769 100K_04 02_5%~DR 769 100K_0402_5%~D
1 2
R778 100K_04 02_5%~DR 778 100K_0402_5%~D
1 2
R762 10K_040 2_5%~DR762 10K_0402_5%~D
1 2
R771 100K_04 02_5%~DR 771 100K_0402_5%~D
+3.3V_RUN
1 2
R457 100K_04 02_5%~DR 457 100K_0402_5%~D
1 2
R766 100K_04 02_5%~D@R 766 100K_0402_5%~D@
1 2
R772 10K_040 2_5%~D@R772 10K_0402_5%~D@
1 2
R767 100K_04 02_5%~DR 767 100K_0402_5%~D
1 2
R775 10K_040 2_5%~DR775 10K_0402_5%~D
1 2
R1582 100K _0402_5%~DR1582 100K_0402_5%~D
1 2
R1583 100K _0402_5%~DR1583 100K_0402_5%~D
1 2
R3 100K_0402 _5%~DR3 100K_0402_5%~D
+3.3V_ALW
VGA_ID
1 2
R800 100K_0402_5%~DR800 100K_0402_5%~D
5
DYN_TURB_PWR_ALRT#
HW_GPS_DISABLE2#
PROCHOT_GATE
CPU_DETECT#
SLICE_BAT_PRES#
WWAN_RA DIO_DIS#
USB_PWR_SHR_E N#
USB_SIDE_EN#
ESATA_USB_PWR _EN#
USB_PWR_SHR_V BUS_EN
DOCK_SMB_ALERT#
WIRELESS_ON#/OFF
MCARD_PCIE_SATA#
WIRELESS_ON#/OFF
SP_TPM_LPC_EN
LCD_TST
SYS_LED_MASK#
DGPU_PWR_EN
GFX_MEM_VTT_ON
CHARGE_EN
VGA_ID
1 2
R803 100K_0402_5%~D@R803 100K_0402_5%~D@
CRT_SWITCH<23>
MDC_RST_DIS#<41>
MCARD_MISC_PW REN<35>
PROCHOT_GATE<52>
DOCK_SMB_ALERT#<38,53>
TOUCH_SCREEN_PD#<24>
USB_SIDE_EN#<36>
EN_I2S_NB_CODEC#<29>
USH_PWR_STATE #<32>
EN_DOCK_PWR_BAR<53>
PANEL_BKEN_EC<24>
ENVDD_PCH<16,24>
LCD_TST<24>
PSID_DISABLE#<44>
PBAT_PRES#<44,53>
DOCKED<30>
DOCK_DET#<38>
AUD_NB_MUTE#<29>
MCARD_WW AN_PWREN<35>
LCD_VCC_TEST_EN<24>
CCD_OFF<24>
AUD_HP_NB_SENSE<29,36>
ESATA_USB_PWR _EN#<36>
MODULE_ON<53>
SLICE_BAT_ON<53>
SLICE_BAT_PRES#<38,53>
MODULE_BATT_PRES#<44,53>
CHARGE_MODULE_BATT<53>
CHARGE_PBATT<53>
DEFAULT_OVRDE<53>
USB_PWR_SHR_E N#<36>
CPU_DETECT#<7>
MOD_SATA_PCIE#_DET<28>
T116 PAD~D@ T116 PA D~D@
ZODD_WAKE#<28>
BCM5882_ALERT#<32>
SUSACK#<16>
T111 PAD~D@ T111 PA D~D@
T110 PAD~D@ T110 PA D~D@
T109 PAD~D@ T109 PA D~D@
SLP_ME_CSW_DE V#<14,18>
LAN_DISABLE#_R<30>
SYS_LED_MASK#<43>
SIO_EXT_WAKE#<18>
WIRELESS_LED#<34,43>
USB_PWR_SHR_V BUS_EN<36>
WLAN_RADIO_DIS#<34>
WIRELESS_ON#/OFF<36>
BT_RADIO_DIS#<41>
WWAN_RA DIO_DIS#<34>
SYS_PWROK<7,16>
T114 PAD~D@ T114 PA D~D@
CPU_VTT_ON<49>
PCH_DPWROK<16>
R797 0_0402_5%~D@ R797 0_0402_5%~D@
VGA_ID0
Discrete
0
UMA 1
A A
ME_FWP PCH has internal 20K PD.
(suspend power rail)
ME_FWP
12
R793
@R793
@
1K_0402_5%~D
1K_0402_5%~D
5
4
CRT_SWITCH
MDC_RST_DIS#
MCARD_MISC_PW REN
PROCHOT_GATE
LID_CL_SIO#
DOCK_SMB_ALERT#
USB_SIDE_EN#
EN_I2S_NB_CODEC#
USH_PWR_STATE #
EN_DOCK_PWR_BAR
PANEL_BKEN_EC
ENVDD_PCH
LCD_TST
PSID_DISABLE#
PBAT_PRES#
DOCKED
DOCK_DET#
AUD_NB_MUTE#
MCARD_WW AN_PWREN
LCD_VCC_TEST_EN
CCD_OFF
AUD_HP_NB_SENSE
ESATA_USB_PWR _EN#
MODULE_ON
SLICE_BAT_ON
SLICE_BAT_PRES#
MODULE_BATT_PRES#
CHARGE_MODULE_BATT
CHARGE_PBATT
DEFAULT_OVRDE
USB_PWR_SHR_E N#
GFX_MEM_VTT_ON
MCARD_PCIE_SATA#
CPU_DETECT#
DGPU_PWR_EN
MOD_SATA_PCIE#_DET
DP_HDMI_HPD
ZODD_WAKE#
BCM5882_ALERT#
EDID_SELECT#
DGPU_PWROK
VGA_ID
3.3V_RUN_GFX_ON
SLP_ME_CSW_DE V#
LAN_DISABLE#_R
CHARGE_EN
SYS_LED_MASK#
DYN_TURB_PWR_ALRT#
1 2
WIRELESS_LED#
USB_PWR_SHR_V BUS_EN
WLAN_RADIO_DIS#
WIRELESS_ON#/OFF
BT_RADIO_DIS#
WWAN_RA DIO_DIS#
SYS_PWROK
DGPU_SELECT#
CPU_VTT_ON
1 2
R802 0_0402_5%~D@R802 0_0402_5%~D@
4
U46
U46
B52
GPIOA0
A49
GPIOA1
B53
GPIOA2
A50
GPIOA3
B54
GPIOA4
A51
GPIOA5
B55
GPIOA6
A52
GPIOA7
A33
GPIOB0
B36
GPIOB1
A34
GPOC2
B37
GPOC3
A35
GPOC4
B38
GPOC5
A36
GPOC6/TACH4
A37
GPIOC7
B40
GPIOD0
A38
GPIOC1
B41
GPIOC0
A39
GPIOB7
B42
GPIOB6
A40
GPIOB5
B43
GPIOB4
A41
GPIOB3
B44
GPIOB2
B32
GPIOD1
A31
GPIOD2
B33
GPIOD3
B15
GPIOD4
A15
GPIOD5
B16
GPIOD6
A16
GPIOD7
A1
GPIOE0/RXD
B2
GPIOE1/TXD
A2
GPIOE2/RTS#
B3
GPIOE3/DSR#
A3
GPIOE4/CTS#
B45
GPIOE5/DTR#
A42
GPIOE6/RI#
B4
GPIOE7/DCD#
A59
GPIOF0
B62
GPIOF1
A58
GPIOF2
B61
GPIOF3/TACH8
A56
GPIOF4/TACH7
B59
GPIOF5
A55
GPIOF6
B58
GPIOF7
B47
GPIOG0/TACH5
A45
GPIOG1
B48
GPIOG2
A46
GPIOG3
B49
GPIOG4
A47
GPIOG5
B50
GPIOG6
A48
GPIOG7/TACH6
B13
GPIOH0
A13
GPIOH1
A53
SYSOPT1/GPIOH2
B57
SYSOPT0/GPIOH3
B14
GPIOH4
A14
GPIOH5
B17
GPIOH6
B18
GPIOH7
1
2
B5
A17
B30
A43
A54
VCC1
VCC1
VCC1
VCC1
VCC1
GPIOJ1/TACH1
GPIOJ2/TACH2
GPIOK1/TACH3
GPIOM3/PWM4
GPIOM4/PWM6
14.318MHZ/GPIOM0
CLK32/GPIOM2
DB Version 0.4
ECE5048-LZY_DQFN132_11X11~D
ECE5048-LZY_DQFN132_11X11~D
DB Version 0.4
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
1
C705
C705
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
GPIOI0
GPIOI1
GPIOI2/TACH0
GPIOI3
GPIOI4
GPIOI5
GPIOI6
GPIOI7
GPIOJ0
GPIOJ3
GPIOJ4
GPIOJ5
GPIOJ6
GPIOJ7
GPIOK0
GPIOK2
GPIOK3
GPIOK4
GPIOK5
GPIOK6
GPIOK7
GPIOL0/PWM7
GPIOL1/PWM8
GPIOL2/PWM0
GPIOL3/PWM1
GPIOL4/PWM3
GPIOL5/PWM2
GPIOL6
GPIOL7/PWM5
GPIOM1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
PCICLK
CLKRUN#
LDRQ1#
SER_IRQ
DLAD0
DLAD1
DLAD2
DLAD3
DLFRAME#
DCLKRUN#
DLDRQ1#
DSER_IRQ
BC_INT#
BC_DAT
BC_CLK
PWRGD
OUT65
TEST_PIN
CAP_LDO
VSS
3
2
+3.3V_ALW
1
1
C706
C706
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
A23
B63
A60
A61
B65
A62
B66
A63
B67
A64
A5
B6
A6
B7
A7
B8
A8
B9
B10
A10
B11
A11
B12
A12
B60
A57
B64
B68
A9
B1
A18
A44
B34
B39
B51
A27
A26
B26
B25
A21
B22
A28
B20
A22
B21
A32
B35
B29
B28
A25
A24
B23
A19
B24
A20
A29
B31
A30
A4
B56
B19
B46
B27
C1
EP
C708
C708
C707
C707
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
SIO_SLP_A#
0.75V_DDR_VTT_ON
1 2
R765 0_0402_5%~D@R765 0_0402_5%~D@
SIO_SLP_LAN#
SIO_SLP_SUS#
MODC_EN
DOCK_HP_DET
DOCK_MIC_DET
ME_FWP
MASK_SATA_LED#
LED_SATA_DIAG_OUT#
TEMP_ALERT#_R TEMP_ALERT#
RUN_ON
SUS_ON
BAT1_LED#
BAT2_LED#
USH_PWR_ON
HW_GPS_DISABLE2#
BREATH_LED#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PCH_PLTRST#_EC
CLK_PCI_5048
CLKRUN#
LPC_LDRQ1#
IRQ_SERIRQ
CLK_SIO_14M
D_LAD0
D_LAD1
D_LAD2
D_LAD3
D_LFRAME#
D_CLKRUN#
D_DLDRQ1#
D_SERIRQ
BC_INT#_ECE5048
BC_DAT_ECE5048
BC_CLK_ECE5048
RUNPWROK
SP_TPM_LPC_EN
1 2
R804 1K_0402_5%~DR804 1K_0402_5%~D
+CAP_LDO
1
1
C709
C709
2
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C714
C714
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
C710
C710
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
SIO_SLP_A# <16,42,48>
0.75V_DDR_VTT_ON <46>
SIO_SLP_S4# <16,42,46>
SIO_SLP_S3# <11,16,27,35,36,42,47>
IMVP_PWRGD <51>
IMVP_VR_ON < 51>
DOCK_AC_OFF_EC
AUX_EN_WOW L <35>
WLAN_LAN_DISB# <30>
SIO_SLP_LAN# <16,30>
SIO_SLP_SUS# <16>
GPIO_PSID_SELECT <44>
MODC_EN <28>
DOCK_HP_DET <29>
DOCK_MIC_DET <29>
ME_FWP <14>
MASK_SATA_LED# <43>
1.8V_RUN_PWRGD <47>
LED_SATA_DIAG_OUT# <43 >
RUN_ON <27,35,42,47>
SPI_WP#_SEL <14>
SUS_ON <42>
BAT1_LED# <43>
BAT2_LED# <43>
T117PAD~D @T117PAD~D @
HW_GPS_DISABLE2# <34>
BREATH_LED# <38,43>
LPC_LAD0 <14,32,34,40>
LPC_LAD1 <14,32,34,40>
LPC_LAD2 <14,32,34,40>
LPC_LAD3 <14,32,34,40>
LPC_LFRAME# <14,32,34,40>
PCH_PLTRST#_EC <17,32,34,35,40>
CLK_PCI_5048 <17>
CLKRUN# <16,32,40>
LPC_LDRQ1# <14>
IRQ_SERIRQ <14 ,32,40>
CLK_SIO_14M <15>
EC_32KHZ_ECE5048 <40>
D_LAD0 <38>
D_LAD1 <38>
D_LAD2 <38>
D_LAD3 <38>
D_LFRAME# <3 8>
D_CLKRUN# <38>
D_DLDRQ1# <38>
D_SERIRQ <38>
BC_INT#_ECE5048 <40>
BC_DAT_ECE5048 <40>
BC_CLK_ECE5048 <40>
RUNPWROK <7,40>
SP_TPM_LPC_EN <32>
+CAP_LDO trace width 20 mils
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
trace width 20 mils
trace width 20 mils
R794
@R794
@
10_0402_1%~D
10_0402_1%~D
C712
@C712
@
R738 0_0402_5%~D@R738 0_0402_5%~D@
ACAV_IN_NB <40,52,53>
1
2
DOCK_AC_OFF_EC <53>
1 2
CLK_PCI_5048CLK_SIO_14M
12
1
2
R795
@R795
@
10_0402_1%~D
10_0402_1%~D
C713
@C713
@
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
+3.3V_ALW
C711 0.1U_0402_25V6K~D@ C711 0.1U_0402_25V6K~D@
5
P
B
O
A
G
U47
3
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
TEMP_ALERT# <14,18>
12
LID_CL_SIO#
1
2
1 2
2 1
4
D34
@D34
@
RB751S40T1_SOD523-2~D
RB751S40T1_SOD523-2~D
@U4 7
@
+3.3V_ALW
12
R805
R805
100K_0402_5%~D
100K_0402_5%~D
1
C716
C716
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
2
R807 10_0402_1 %~DR807 10_0402_1 %~D
1
DOCK_AC_OFF <38,53>
12
R770
@R770
@
33K_0402_5%~D
33K_0402_5%~D
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
RUN_ON
CPU_VTT_ON
0.75V_DDR_VTT_ON
SLICE_BAT_ON
SUS_ON
12
+3.3V_RUN
R777 100K_04 02_5%~DR 777 100K_0402_5%~D
R780 100K_04 02_5%~DR 780 100K_0402_5%~D
R782 100K_04 02_5%~DR 782 100K_0402_5%~D
R786 100K_04 02_5%~DR 786 100K_0402_5%~D
R789 100K_04 02_5%~DR 789 100K_0402_5%~D
R790 100K_04 02_5%~DR 790 100K_0402_5%~D
R791 100K_04 02_5%~DR 791 100K_0402_5%~D
R878 100K_04 02_5%~DR 878 100K_0402_5%~D
12
12
12
12
12
12
12
12
LID_CL# <36,43>
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
ECE5048
ECE5048
ECE5048
LA-7761P
LA-7761P
LA-7761P
39 59Wednesday, February 22, 2012
39 59Wednesday, February 22, 2012
39 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
+3.3V_ALW
C720
C720
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1 2
5
U50
1
B
2
A
1
1
2
2
U50
P
4
O
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
JTAG1
@SHORT PADS~D
@SHORT PADS~D
CONN@JTAG1
CONN@
1.05V_0.8V_PWROK
1.05V_0.8V_PWROK <14,51>
DOCK_POR_RST#<38>
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
+3.3V_ALW
12
10K_0402_5%~D
10K_0402_5%~D
12
100_0402_1%~D
100_0402_1%~D
12
1.05V_VTTPWRGD
VCCSAPWROK
PCIE_WAKE#
BC_DAT_EMC4022
BC_DAT_ECE5048
BC_DAT_ECE1117
PBAT_SMBDAT
PBAT_SMBCLK
LPC_LDRQ#_MEC
CHARGER_SMBDAT
CHARGER_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
R824
R824
@
@
R836
R836
JTAG_RST# citcu it
close to U51.B5 7
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C735
C735
2
1.05V_VTTPWRGD<49,50>
VCCSAPWROK<50>
Modify name net
+3.3V_ALW
D D
C C
R759 10K_0402_5%~DR759 10K_0402_5%~D
R821 100K_0402_5%~DR821 100K _0402_5%~D
R814 100K_0402_5%~DR814 100K _0402_5%~D
R817 100K_0402_5%~DR817 100K _0402_5%~D
R818 2.2K_0402_5%~DR818 2.2K_0402_5%~D
R820 2.2K_0402_5%~DR820 2.2K_0402_5%~D
R823 100K_0402_5%~D@ R823 100K_0402_5 %~D@
R827 2.2K_0402_5%~DR827 2.2K_0402_5%~D
R828 2.2K_0402_5%~DR828 2.2K_0402_5%~D
R829 2.2K_0402_5%~DR829 2.2K_0402_5%~D
R822 2.2K_0402_5%~DR822 2.2K_0402_5%~D
EC firmware can configure those un-used SMBUS pins as GPO (Output),
then it's OK to leave these un-used pins No-Connect.
JTAG_RST#
32 KHz Clock
C741
C741
1 2
39P_0402_50V8J~D
39P_0402_50V8J~D
MEC_XTAL2
Y6
Y6
32.768KHZ_12.5PF_Q13FC1350000~D
32.768KHZ_12.5PF_Q13FC1350000~D
JDEG2
JDEG2
G1
G2
CONN@
CONN@
1
2
3
4
5
6
7
8
9
10
1 2
C743
C743
1 2
39P_0402_50V8J~D
39P_0402_50V8J~D
+3.3V_ALW
49.9_0402_1%~D
49.9_0402_1%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
R864
R864
1
2
3
4
5
MSCLK
6
MSDATA
7
8
HOST_DEB_RX
9
10
Place closely pin A29
CLK_PCI_MEC
10_0402_1%~D
10_0402_1%~D
4.7P_0402_50V8C~D
4.7P_0402_50V8C~D
5
R858
R858
@R885
@
@ C747
@
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
12
R861
R861
JTAG_TDI
JTAG_TMS
JTAG_CLK
JTAG_TDO
R853 0_0402_5%~D@R 853 0_0402_5%~D@
R855 0_0402_5%~D@R 855 0_0402_5%~D@
+3.3V_ALW
1 2
1 2
10K_0402_5%~D
10K_0402_5%~D
12
R859
R859
R860
R860
12
R885
1
C747
2
B B
A A
MEC_XTAL1
11
12
TYCO_1-2041070-0~D
TYCO_1-2041070-0~D
EC_32KHZ_ECE5048<39>
@R850
@
10K_0402_5%~D
10K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
12
12
12
R849
R849
R850
R848
R848
R847
R847
HOST_DEBUG_TXHOST_DEB_TX
HOST_DEBUG_RX
R875 C744
240K 4700p
130K 4700p
4700p
62K
*
4700p
33K
4700p
8.2K
4700p
4.3K
4700p
2K
1K
4700p
BOARD_ID rise time is measured from 5%~68%.
4
SML1_SMBDATA<15>
SML1_SMBCLK<15>
CLK_TP_SIO<41>
DAT_TP_SIO<41>
CLK_KBD<38>
DAT_KBD<38>
CLK_MSE<38>
DAT_MSE<38>
PBAT_SMBDAT<44>
PBAT_SMBCLK<44>
DOCK_POR_RST#
PCH_ALW_ON<42,4 4>
BIA_PWM_EC< 24>
BC_CLK_ECE5048<39>
BC_DAT_ECE5048<39>
BC_INT#_ECE5048<39>
BC_CLK_EMC4022<22>
BC_DAT_EMC4022<22>
BC_INT#_EMC4022<22>
PCH_PCIE_WAKE#<16>
PCIE_WAKE#<28,34,35>
BC_CLK_ECE1117<41>
BC_DAT_ECE1117<41>
BC_INT#_ECE1117<41>
SIO_SLP_S5#<16>
ACAV_IN_NB<39,52,53>
SIO_EXT_SMI#<14 ,17>
SIO_RCIN#<18>
IRQ_SERIRQ<14,32,39>
PCH_PLTRST#_EC<17,32,34,35,39>
CLK_PCI_MEC<17>
LPC_LFRAME#<14,32,34,39>
LPC_LAD0<14,32,34,39>
LPC_LAD1<14,32,34,39>
LPC_LAD2<14,32,34,39>
LPC_LAD3<14,32,34,39>
CLKRUN#<16,32,39 >
SIO_EXT_SCI#<18>
MEC_XTAL2 MEC_X TAL2_R
R1068 0_0402_5%~D@ R10 68 0_04 02_5%~D@
1 2
R867 0_0402_5%~D@ R867 0_0 402_5%~D@
SML1_SMBDATA
SML1_SMBCLK
CLK_TP_SIO
DAT_TP_SIO
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
PBAT_SMBDAT
PBAT_SMBCLK
JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
JTAG_RST#
C736 0.1U_0402_25V6K~DC736 0.1U_0402_25V6K~D
12
PCH_ALW_ON
BIA_PWM_EC
BC_CLK_ECE5048
BC_DAT_ECE5048
BC_INT#_ECE5048
BC_CLK_EMC4022
BC_DAT_EMC4022
BC_INT#_EMC4022
PCH_PCIE_WAKE#
PCIE_WAKE#
BC_CLK_ECE1117
BC_DAT_ECE1117
BC_INT#_ECE1117
BEEP
BEEP<29>
SIO_SLP_S5#
ACAV_IN_NB
SIO_EXT_SMI#
SIO_RCIN#
LPC_LDRQ#_MEC
IRQ_SERIRQ
PCH_PLTRST#_EC
CLK_PCI_MEC
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLKRUN#
SIO_EXT_SCI#
MEC_XTAL1
12
+3.3V_ALW
REV
X00
X01
X02
A00
BOARD_ID
4
+RTC_CELL
R815
@R815
@
0_0402_5%~D
0_0402_5%~D
1 2
U51
U51
PS/2 INTERFACE
PS/2 INTERFACE
A5
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
B6
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
A37
GPIO110/PS2_CLK2/GPTP-IN6
B40
GPIO111/PS2_DAT2/GPTP-OUT6
A38
GPIO112/PS2_CLK1A
B41
GPIO113/PS2_DAT1A
A39
GPIO114/PS2_CLK0A
B42
GPIO115/PS2_DAT0A
B59
GPIO154/I2C1C_DATA/PS2_CLK1B
A56
GPIO155/I2C1C_CLK/PS2_DAT1B
JTAG INTERFACE
JTAG INTERFACE
A51
GPIO145/I2C1K_DATA/JTAG_TDI
B55
GPIO146/I2C1K_CLK/JTAG_TDO
B56
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
A53
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
B57
JTAG_RST#
FAN PWM & TACH
FAN PWM & TACH
B22
GPIO050/FAN_TACH1
A21
GPIO051/FAN_TACH2
B23
GPIO052/FAN_TACH3
B24
GPIO053/PWM0
A23
GPIO054/PWM1
B25
GPIO055/PWM2
A24
GPIO056/PWM3
BC-LINK
BC-LINK
A43
GPIO123/BCM_A_CLK
B45
GPIO122/BCM_A_DAT
A42
GPIO121/BCM_A_INT#
A12
GPIO022/BCM_B_CLK
B13
GPIO023/BCM_B_DAT
A13
GPIO024/BCM_B_INT#
B20
GPIO044/BCM_C_CLK
A18
GPIO043/BCM_C_DAT
B19
GPIO042/BCM_C_INT#
A20
GPIO047/LSBCM_D_CLK
B21
GPIO046/LSBCM_D_DAT
A19
GPIO045/LSBCM_D_INT#
A16
GPIO032/GPTP-IN3/BCM_E_CLK
B16
GPIO31/GPTP-OUT2/BCM_E_DAT
A15
GPIO30/GPTP-IN2/BCM_E_INT#
HOST INTERFACE
HOST INTERFACE
A6
GPIO011/nSMI
A27
GPIO061/LPCPD#
B29
LDRQ#
A28
SER_IRQ
B30
LRESET#
A29
PCI_CLK
B31
LFRAME#
A30
LAD0
B32
LAD1
A31
LAD2
B33
LAD3
A32
CLKRUN#
A33
GPIO100/nEC_SCI
MASTER CLOCK
MASTER CLOCK
A61
XTAL1
A62
XTAL2
B62
GPIO160/32KHZ_OUT
B34
NC1
A64
NC2
B68
NC3
C739 close to U51.B12
12
R875
R875
33K_0402_5%~D
33K_0402_5%~D
1
C744
C744
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
+RTC_CELL_VBAT
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C723
C723
2
AGND
B66
15mil
+3.3V_ALW
12
SYSTEM_ID
4700P_0402_25V7K~D
4700P_0402_25V7K~D
1
2
CHIPSET_ID for BID
function
B64
A11
A22
VBAT
VTR[1]
DB Version 0.12
DB Version 0.12
VSS[1]
VSS[4]
B11
B60
least
15mil
R871
R871
1K_0402_5%~D
1K_0402_5%~D
C742
C742
B35
VTR[2]
3
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C725
C725
2
A41
A58
A52
A26
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]B3VTR[8]
MISC INTERFACE
MISC INTERFACE
GPIO025/UART_CLK
GPIO124/GPTP-OUT5/UART_RX
GPIO101/ECGP_SCLK
GPIO103/ECGP_MISO
GPIO105/ECGP_MOSI
GPIO102/HSPI_SCLK
GPIO104/HSPI_MISO
GPIO106/HSPI_MOSI
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
GPIO001/ECSPI_CS1
GPIO002/ECSPI_CS2
GPIO014/GPTP-IN7/HSPI_CS1
GPIO040/GPTP-OUT3/HSPI_CS2
GPIO015/GPTP-OUT7
GPIO017/GPTP-OUT8
GPIO027/GPTP-OUT1
GPIO107/nRESET_OUT
GPIO152/GPTP-OUT4
SMBUS INTERFACE
SMBUS INTERFACE
GPIO003/I2C1A_DATA
GPIO004/I2C1A_CLK
GPIO005/I2C1B_DATA
GPIO006/I2C1B_CLK
GPIO012/I2C1H_DATA/I2C2D_DATA
GPIO013/I2C1H_CLK/I2C2D_CLK
GPIO130/I2C2A_DATA
GPIO131/I2C2A_CLK
GPIO132/I2C1G_DATA
GPIO140/I2C1G_CLK
GPIO141/I2C1F_DATA/I2C2B_DATA
GPIO142/I2C1F_CLK/I2C2B_CLK
GPIO143/I2C1E_DATA
GPIO144/I2C1E_CLK
DELL PWR SW INF
DELL PWR SW INF
PECI
PECI
I2S
I2S
VR_CAP
VSS_RO
EP
C1
B12
B54
+VR_CAP
1
C740
C740
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
2
+3.3V_M
RESET_OUT#
2
G
G
3
1
2
GPIO021/RC_ID1
GPIO020/RC_ID2
GPIO120/UART_TX
VCC_PRWGD
GPIO060/KBRST
GPIO116/MSDATA
GPIO117/MSCLK
GPIO127/A20M
GPIO153/LED3
GPIO156/LED1
GPIO157/LED2
PROCHOT#/PWM4
GPIO016/GPTP-IN8
GPIO026/GPTP-IN1
GPIO125/GPTP-IN5
GPIO151/GPTP-IN4
VCI_OVRD_IN
MEC5055-LZY_DQFN132_11X11~D
MEC5055-LZY_DQFN132_11X11~D
12
13
D
D
S
S
C729
C729
C727
C727
2
2
A10
B10
B14
B44
B46
B26
A25
B36
B37
B38
A34
A35
A36
A40
B43
A45
A55
A57
B61
B65
nFWP
A46
B2
A2
B8
B18
A8
B9
A9
A14
B15
A17
GPIO041
B39
A44
B47
GPIO126
A54
B58
A3
B4
A4
B5
B7
A7
B48
B49
A47
B50
B52
A49
B53
A50
A59
BGPO0
B63
VCI_IN2#
A60
VCI_OUT
A63
VCI_IN1#
B67
VCI_IN0#
B1
A1
VCI_IN3#
B51
PECI_VREF
A48
PECI
B17
I2S_DAT
B27
I2S_CLK
B28
I2S_WS
R893
R893
100K_0402_5%~D
100K_0402_5%~D
PCH_PWRGD# <22>
Q50
Q50
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
C731
C731
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
C726
C726
2
SYSTEM_ID
BOARD_ID
DDR_ON
HOST_DEBUG_TX
HOST_DEBUG_RX
RUNPWROK
EN_INVPWR
DDR_HVREF_RST_GATE
DYN_TUR_CURRNT_SET#
CPU1.5V_S3_GATE
MSDATA
MSCLK
SIO_A20GATE
PS_ID
FWP#
PROCHOT#_EC
ME_SUS_PWR_ACK
1.5V_SUS_PWRGD
PM_APWROK
1.05V_A_PWRGD
ALW_PW RGD_3V_5V
DEVICE_DET#
RESET_OUT#
PCH_RSMRST#
AC_PRESENT
SIO_PWRBTN#
DOCK_SMB_DAT
DOCK_SMB_CLK
LCD_SMBDAT
LCD_SMBCLK
BAY_SMBDAT
BAY_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
CHARGER_SMBDAT
CHARGER_SMBCLK
CARD_SMBDAT
CARD_SMBCLK
USH_SMBDAT
USH_SMBCLK
LAT_ON_SW#
ALWON
VCI_IN1#
POWER_SW _IN#
ACAV_IN
DOCK_PWR_SW #
+PECI_VREF
PECI_EC_R
R1656 100K_0402_5%~DR1656 100K_0402_5%~D
R1657 100K_0402_5%~DR1657 100K_0402_5%~D
1
1
C739
C739
C728
C728
2
2
2
R884 1K_0402_5%~DR884 1K_040 2_5%~D
1 2
R886 1K_0402_5%~DR886 1K_040 2_5%~D
1 2
R887 1K_0402_5%~DR887 1K_040 2_5%~D
1 2
1 2
R863 43_0402_5%~DR863 43_0402_5%~D
1 2
1 2
+3.3V_ALW
12
R872
R872
10K_0402_5%~D
10K_0402_5%~D
FWP#
@R879
@
1 2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
DEVICE_DET# <28>
R879
10K_0402_5%~D
10K_0402_5%~D
+3.3V_ALW
1
C732
C732
C730
C730
2
DDR_ON <46>
HOST_DEBUG_TX <34>
HOST_DEBUG_RX <34>
RUNPWROK <7,39>
EN_INVPWR <24>
PCH_SATA_MOD_EN# <14>
DDR_HVREF_RST_GATE <7>
DYN_TUR_CURRNT_SET# <52>
CPU1.5V_S3_GATE <11>
MSDATA <34>
MSCLK <34>
SIO_A20GATE <18>
PS_ID <44>
VOL_MUTE
VOL_DOWN
ME_SUS_PWR_ACK <16>
1.5V_SUS_PWRGD <46>
PM_APWROK < 16>
1.05V_A_PWRGD <48 >
ALW_PW RGD_3V_5V <45>
RESET_OUT# <16>
PCH_RSMRST# <41>
AC_PRESENT <16>
SIO_PWRBTN# <16>
DOCK_SMB_DAT <38>
DOCK_SMB_CLK <38>
BAY_SMBDAT <28,4 4>
BAY_SMBCLK <28,44>
CHARGER_SMBDAT <52>
CHARGER_SMBCLK <52>
CARD_SMBDAT <35>
CARD_SMBCLK <35>
USH_SMBDAT <32 >
USH_SMBCLK <32>
ALWON <45>
ACAV_IN <22,52,53>
GPIO024/THSEL_STRAP note
i.THSEL_STRAP =1 (selects thermistor on diode channel 1)
ii.THSEL_STRAP = 0 (selects remote diode on diode channel 1)
VCI_IN1#
2
VOL_MUTE <36>
VOL_UP <36>
VOL_DOWN <36>
Bat2 = Amber LE D
Bat1 = Blue LED
20mA drive pins
R863 close to
U51& least 250mils
PECI_EC <7>
R1156 100K_0402_5%~DR1156 100K_0402_5%~D
1 2
R869 10K_0402_5%~DR869 10K_0402_5%~D
1 2
R876 100K_0402_5%~DR876 100K_0402_ 5%~D
1 2
R880 100K_0402_5%~DR880 100K_0402_ 5%~D
1 2
R881 100K_0402_5%~DR881 100K_0402_ 5%~D
1 2
R882 100K_0402_5%~DR882 100K_0402_ 5%~D
1 2
R883 10K_0402_5%~DR883 10K_0402_5%~D
1 2
R843 8.2K_0402_5%~D@ R843 8.2K_0402_5%~D@
1 2
R889 100K_0402_5%~DR889 100K_0402_ 5%~D
1 2
R892 10K_0402_5%~DR892 10K_0402_5%~D
2
1 2
R862 0_0402_5%~D@R862 0_0402_5%~D@
1
C737
C737
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
12
MSDATA
DDR_ON
PCH_ALW_ON
DOCK_POR_RST#
EN_INVPWR
1.05V_0.8V_PWROK
RESET_OUT#
CPU1.5V_S3_GATE
PCH_RSMRST#
+RTC_CELL
POWER_SW _IN#<22>
DOCK_PWR_SW #<22>
+1.05V_RUN_VTT
+1.05V_RUN_VTT
1 2
R1179 10K_0402_5%~D@ R1179 10K_0402_5%~D@
PROCHOT#_EC
1 2
R812 100K_0 402_5%~D@ R812 100K_0402_5%~D@
1
+RTC_CELL
POWER_SW _IN#
DOCK_PWR_SW #
DYN_TUR_CURRNT_SET#
12
1
2
+RTC_CELL
12
R825 10K_0402_5%~DR825 10K_0402_5%~ D
1
2
LAT_ON_SW#
13
D
D
2
G
G
S
S
R1180 0_0402_5%~D@ R1180 0_0402_5%~D@
RUNPWROK
RUN_ON_ENABLE#<42>
AC_PRESENT
LCD_SMBCLK
LCD_SMBDAT
DOCK_SMB_DAT
DOCK_SMB_CLK
BAY_SMBDAT
BAY_SMBCLK
DEVICE_DET#
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
VOL_MUTE
VOL_DOWN
VOL_UP
R810
R810
100K_0402_5%~D
100K_0402_5%~D
R811 10K_0402_5%~DR811 10K_0402_5%~D
C722
C722
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
R819
R819
100K_0402_5%~D
100K_0402_5%~D
1 2
C734
C734
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
1 2
C721
@C721
@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 2
1 2
C733
@C733
@
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 2
+RTC_CELL
12
R870
R870
100K_0402_5%~D
100K_0402_5%~D
Q47
@
Q47
@
+3.3V_RUN
12
R799
R799
10K_0402_5%~D
10K_0402_5%~D
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
2
Q45
Q45
G
G
S
S
12
R835 10K_0402_5%~DR835 10K_0402_5%~ D
12
R418 2.2K_0402_5%~DR418 2.2K_0 402_5%~D
12
R420 2.2K_0402_5%~DR420 2.2K_0 402_5%~D
12
R838 2.2K_0402_5%~DR838 2.2K_0 402_5%~D
12
R841 2.2K_0402_5%~DR841 2.2K_0 402_5%~D
12
R854 2.2K_0402_5%~DR854 2.2K_0 402_5%~D
12
R856 2.2K_0402_5%~DR856 2.2K_0 402_5%~D
12
R1171 100K_0402_5%~DR1171 100K_0402_5%~ D
12
R1125 100K_0402_5%~DR1125 100K_0402_5%~ D
12
R845 4.7K_0402_5%~DR845 4.7K_0 402_5%~D
12
R846 4.7K_0402_5%~DR846 4.7K_0 402_5%~D
12
R851 4.7K_0402_5%~DR851 4.7K_0 402_5%~D
12
R852 4.7K_0402_5%~DR852 4.7K_0 402_5%~D
12
R1169 100K_0402_5%~D@ R1169 100K _0402_5%~D@
12
R1197 100K_0402_5%~D@ R1197 100K _0402_5%~D@
12
R1118 100K_0402_5%~D@ R1118 100K _0402_5%~D@
POWER_SW #_MB <43>
DOCK_PWR_BTN# <38>
+3.3V_ALW_PCH
+3.3V_ALW
+5V_RUN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
MEC5055
MEC5055
MEC5055
LA-7761P
LA-7761P
LA-7761P
1
H_PROCHOT# <7,51,52>
+3.3V_RUN
40 59Wednesday, February 22, 2012
40 59Wednesday, February 22, 2012
40 59Wednesday, February 22, 2012
1.0
1.0
1.0
5
Touch Pad
DAT_TP_SIO<40>
D D
CLK_TP_SIO<40>
+3.3V_TP
4.7K_0402_5%~D
4.7K_0402_5%~D
12
10P_0402_50V8J~D
10P_0402_50V8J~D
1
2
+3.3V_TP
1
2
4.7K_0402_5%~D
4.7K_0402_5%~D
12
R903
R903
R902
R902
L54 BLM18AG601SN1D_0603~DL54 BLM18AG601SN1D_0603~D
L55 BLM18AG601SN1D_0603~DL55 BLM18AG601SN1D_0603~D
10P_0402_50V8J~D
10P_0402_50V8J~D
C752
C752
1
C751
C751
2
TP_CLK
TP_DATA
C755
C755
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4
3
2
1
BlueTooth
Touch Pad Conn. Pitch=0.5mm
BT_COEX_STATUS2
JTP1
CONN@JTP1
CONN@
1
1 2
1 2
R1162 0_06 03_5%~D@R1162 0_0603_5%~D@
1
2
2
3
3
4
4
5
5
6
9
6
G1
7
10
7
G2
8
8
PS_HPF05052-081000R
PS_HPF05052-081000R
+3.3V_TP
12
12
3
10P_0402_50V8J~D
10P_0402_50V8J~D
C750
C750
PESD5V0U2BT_SOT23-3~D
PESD5V0U2BT_SOT23-3~D
2
D37
D37
1
TP_DATA
TP_CLK
10P_0402_50V8J~D
10P_0402_50V8J~D
1
C749
C749
2
+3.3V_TP
1
2
TP_CLK
TP_DATA
PS2_DAT_TS
PS2_CLK_TS
+3.3V_ALW +3.3V_RUN
R1161 0_0603_5%~D@ R1161 0_0603_5%~D@
+3.3V_RUN
1 2
R1133 1K_0402_ 5%~DR1133 1K_ 0402_5%~D
R1134 1K_0402_ 5%~DR1134 1K_ 0402_5%~D
1 2
BT_PRI_STATUS
BT_DET#<17>
COEX1_BT_ACTIVE<34>
BT_COEX_STATUS2<32>
BT_PRI_STATUS<32>
BT_ACTIVE<43>
BT_RADIO_DIS#<39>
COEX2_WLAN_ACTIVE<34>
USBP11-<17>
USBP11+<17>
BT_COEX_STATUS2
BT_PRI_STATUS
10K_0402_5%~D
10K_0402_5%~D
33P_0402_50V8J~D
33P_0402_50V8J~D
12
C753
C753
1
2
+3.3V_RUN
1 2
C748
C748
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
Pitch: 1.0
CONN@
CONN@
JBT1
JBT1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
G1
14
G2
ACES_50224-0120N-001
100P_0402_50V8J~D
100P_0402_50V8J~D
@C754
@
C754
R904
R904
1
2
ACES_50224-0120N-001
Place close to JTP1
C C
Keyboard
KB_DET#<18>
+3.3V_ALW
+5V_RUN
BC_INT#_ECE1117<40>
BC_DAT_ECE1117<40>
BC_CLK_ECE1117<40>
1
C756
C756
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
2
+5V_RUN+3.3V_ALW
1
2
C758
C758
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
Place close to JKB1
B B
PS2_CLK_TS
PS2_DAT_TS
Pitch: 1.0
JKB1
CONN@JKB1
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
GND
12
GND
PS_HPF10052-10M000R
PS_HPF10052-10M000R
MDC
PCH_AZ_MDC_SDOUT<14>
PCH_AZ_MDC_SYNC<14>
PCH_AZ_MDC_SDIN1<14>
1 2
RH362 33_0402_5%~DRH362 33_0402_5%~D
MDC CONN. H=5.5, Pitch=0.8
PCH_AZ_MDC_SDOUT
MDC_SDIN
PCH_AZ_MDC_RST1#
JMDC1
1
GND1
3
IAC_SDATA_OUT
5
GND2
7
IAC_SYNC
9
IAC_SDATA_IN
11
IAC_RESET#
CONN@JMDC1
CONN@
IAC_BITCLK
GND13GND14GND15GND16GND17GND
2
RES0
4
RES1
6
3.3V
8
GND3
10
GND4
12
TYCO_2041302-1~D
TYCO_2041302-1~D
18
W=20 mil
PCH_AZ_MDC_BITCLK <14>
+3.3V_ALW_PCH
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
C718
C718
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
C717
C717
2
RSMRST#
3
RSMRST#
+3.3V_ALW_PCH
R1622
R1622
1 2
10K_0402_5%~D
10K_0402_5%~D
PCH_RSMRST#_Q
EC SIDE
PCH_RSMRST#<40>
R1623
@ R1623
@
0_0402_5%~D
0_0402_5%~D
PCH_RSMRST#
+5V_ALW_PCH
12
R1629
R1629
33_0402_5%~D
33_0402_5%~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1
C289
C289
2
A A
U4
U4
1
VCC
RESET#
2
GND
RT9818A-44GU3_SC70-3~D
RT9818A-44GU3_SC70-3~D
5
+3.3V_ALW
1 2
12
C288 0.1U_0402_25V6K~DC288 0.1U_0402_25V6K~D
5
U7
U7
1
P
B
4
O
2
A
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
R1655
@R1655
@
0_0402_5%~D
0_0402_5%~D
1 2
PCH_RSMRST#_Q <14,16>
PCH_AZ_MDC_RST#<14>
R752
R752
10K_0402_5%~D
10K_0402_5%~D
MDC_RST_DIS#<39>
+5V_ALW
1 3
12
D
S
D
S
Q44
Q44
G
G
2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
PCH_AZ_MDC_RST1#
12
R751
R751
100K_0402_5%~D
100K_0402_5%~D
R753 10_0402_5%~DR753 10_0402_5%~D
R754 10_0402_5%~DR754 10_0402_5%~D
SDOUT_TERMPCH_AZ_MDC_S DOUT
12
BITCLK_TERMPCH_AZ_MDC_B ITCLK
12
C677
C677
10P_0402_50V8J~D
10P_0402_50V8J~D
1 2
1 2
C678
C678
10P_0402_50V8J~D
10P_0402_50V8J~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Int KB/TP/BT/RSMRST/MDC
Int KB/TP/BT/RSMRST/MDC
Int KB/TP/BT/RSMRST/MDC
LA-7761P
LA-7761P
LA-7761P
41 59Wednesday, February 22, 2012
41 59Wednesday, February 22, 2012
41 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
+3.3V_ALW_PCH Source
+3.3V_ALW2
12
R907
R907
100K_0402_5%~D
100K_0402_5%~D
D D
Q51A
Q51A
2
ALW_ON_3.3V#
61
ALW_ON_3.3V#<20>
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
PCH_ALW_ON<40,44>
+PWR_SRC_S
12
3
5
4
R905
R905
100K_0402_5%~D
100K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q51B
Q51B
4
+3.3V_ALW +3.3V_ALW_ PCH
ALW_ENABLE
1M_0402_5%~D
1M_0402_5%~D
12
R1619
R1619
Q49
Q49
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
1
C762
C762
3300P_0402_50V7K~D
3300P_0402_50V7K~D
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
12
C760
C760
1
2
R908
R908
20K_0402_5%~D
20K_0402_5%~D
3
DC/DC Interface
SIO_SLP_S3#<11,16,27,35,36,39,47>
RUN_ON<27,35,39,47>
1 2
R735 0_0402_5%~D@ R735 0_0402_5%~D@
1 2
R744 0_0402_5%~D@R744 0_0402_ 5%~D@
2
1
+1.5V_RUN Source
+3.3V_ALW2
12
R909
R909
100K_0402_5%~D
100K_0402_5%~D
RUN_ON_ENABLE#
DMN66D0LDW-7_SOT363-6~D
RUN_ON_ENABLE#<40 >
DMN66D0LDW-7_SOT363-6~D
61
Q52A
Q52A
2
+PWR_SRC_S
12
3
5
4
+1.5V_MEM
R920
R920
470K_0402_5%~D
470K_0402_5%~D
1.5V_RUN_ENABLE
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q52B
Q52B
12
Q59
Q59
AO4304L_SO8
AO4304L_SO8
8
7
6
5
4
470P_0402_50V7K~D
2.2M_0402_5%
2.2M_0402_5%
R1610
R1610
470P_0402_50V7K~D
1
2
+1.5V_RUN
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
3
C771
C771
12
C769
C769
1
2
R921
R921
20K_0402_5%~D
20K_0402_5%~D
+3.3V_SUS Source
+3.3V_ALW2
12
R915
R915
100K_0402_5%~D
100K_0402_5%~D
C C
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SUS_ON<39>
SIO_SLP_S4#
1 2
R1607 0_04 02_5%~D@ R1607 0 _0402_5%~D@
1 2
R1608 0_0402_5%~D@ R1608 0_0402_5%~D@
Q53A
Q53A
2
SUS_ON_3.3V#
61
+PWR_SRC_S
12
3
5
4
R911
R911
100K_0402_5%~D
100K_0402_5%~D
SUS_ENABLE
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q53B
Q53B
+3.3V_ALW
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
6
2
1
1M_0402_5%~D
1M_0402_5%~D
12
R1618
R1618
Q54
Q54
D
D
S
S
45
G
G
3
1
C767
C767
4700P_0402_25V7K~D
4700P_0402_25V7K~D
2
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C765
C765
+3.3V_SUS
12
+PWR_SRC_S
20K_0402_5%~D
20K_0402_5%~D
R914
R914
12
1.05V_RUN_ENABLE
13
D
D
2
G
G
S
S
R930
R930
330K_0402_5%~D
330K_0402_5%~D
Q64
Q64
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
+1.05V_RUN Source
+1.05V_M
Q63
Q63
SI4164DY-T1-GE3_SO8~D
SI4164DY-T1-GE3_SO8~D
8
7
5
1M_0402_5%~D
1M_0402_5%~D
12
R1611
R1611
+1.05V_RUN
1
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
36
4
100P_0402_50V8J~D
100P_0402_50V8J~D
1
C773
C773
2
12
C772
C772
1
R931
R931
20K_0402_5%~D
20K_0402_5%~D
2
+5V_RUN Source
+3.3V_M Source
+3.3V_ALW2
12
61
Q57A
B B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SIO_SLP_A#<16,39,48>
SIO_SLP_A#
Q57A
2
+PWR_SRC_S
R918
R918
100K_0402_5%~D
100K_0402_5%~D
A_ON_3.3V#
5
12
R917
R917
470K_0402_5%~D
470K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
Q57B
Q57B
4
+3.3V_ALW
A_ENABLE
12
4.7M_0402_5%~D
4.7M_0402_5%~D
R1617
R1617
Q58
Q58
SI3456DDV-T1-GE3_TSOP6~D
SI3456DDV-T1-GE3_TSOP6~D
D
D
6
S
S
45
2
1
G
G
3
1
C770
C770
220P_0402_25V8J
220P_0402_25V8J
2
1
2
+3.3V_M
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
C768
C768
12
R919
@R919
@
20K_0402_5%~D
20K_0402_5%~D
A_ON_3.3V#
2
G
G
+3.3V_M
12
13
R916
R916
39_0603_5%~D
39_0603_5%~D
+3.3V_M_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
D
D
Q60
Q60
S
S
Discharg Circuit
+3.3V_SUS +1.5V_RUN +3.3V_RUN+5V_RUN+3.3V_ALW_PCH
12
R922
@R922
@
1K_0402_5%~D
1K_0402_5%~D
+3.3V_SUS_CHG
@
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q65
SUS_ON_3.3V#
A A
Q65
2
G
G
ALW_ON_3.3V#
S
S
2
G
G
12
R928
@R928
@
1K_0402_5%~D
1K_0402_5%~D
+3.3V_ALWPCH_CHG
@
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q66
Q66
S
S
RUN_ON_ENABLE#
2
G
G
12
R923
@R923
@
1K_0402_5%~D
1K_0402_5%~D
+5V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
S
S
12
R924
@R924
@
1K_0402_5%~D
1K_0402_5%~D
+1.5V_RUN_CHG
@
@
@
Q67
Q67
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q68
Q68
2
G
G
S
S
2
G
G
12
R929
@R929
@
39_0603_5%~D
39_0603_5%~D
+3.3V_RUN_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
@
@
Q69
Q69
S
S
+1.05V_RUN +0.75V_DDR_VTT+1.5V_CPU_VDDQ
2
G
G
12
R925
@R925
@
39_0402_5%~D
39_0402_5%~D
+1.05V_RUN_CHG
@
@
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q70
Q70
S
S
RUN_ON_CPU1.5VS3#<7,11>
2
G
G
12
R926
R926
220_0402_5%~D
220_0402_5%~D
+1.5V_CPU_VDDQ_CHG
13
D
D
S
S
12
R927
R927
22_0603_5%~D
22_0603_5%~D
+DDR_CHG
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q71
Q71
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
13
D
D
Q72
2
Q72
G
G
S
S
+PWR_SRC_S
12
13
D
D
2
G
G
S
S
+PWR_SRC_S
12
13
D
D
2
G
G
S
S
R906
R906
470K_0402_5%~D
470K_0402_5%~D
5V_RUN_ENABLE
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q62
Q62
R912
R912
470K_0402_5%~D
470K_0402_5%~D
3.3V_RUN_ENABLE
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D
Q56
Q56
+5V_ALW
Q55
Q55
DMN3030LSS-13_SOP8L-8
DMN3030LSS-13_SOP8L-8
8
7
5
+3.3V_RUN Source
8
7
5
1M_0402_5%~D
1M_0402_5%~D
@
@
12
R1627
R1627
1
2
36
4
220P_0402_25V8J
220P_0402_25V8J
1
C763
C763
2
Q61
Q61
DMN3030LSS-13_SOP8L-8
DMN3030LSS-13_SOP8L-8
1
2
36
4
220P_0402_25V8J
220P_0402_25V8J
1
C766
C766
2
1
2
+5V_RUN
10U_0805_10V4Z~D
10U_0805_10V4Z~D
C761
C761
+3.3V_RUN+3.3V_ALW
1
2
12
R910
R910
20K_0402_5%~D
20K_0402_5%~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
12
C764
C764
R913
R913
20K_0402_5%~D
20K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
POWER CONTROL
POWER CONTROL
POWER CONTROL
LA-7761P
LA-7761P
LA-7761P
42 59Wednesday, February 22, 2012
42 59Wednesday, February 22, 2012
42 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
4
3
2
1
+3.3V_ALW
12
R932
R932
10K_0402_5%~D
21
21
10K_0402_5%~D
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SYS_LED_MASK#
+3.3V_ALW
12
R937
R937
100K_0402_5%~D
100K_0402_5%~D
Q78A
Q78A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
MASK_BASE_LEDS#
Q74A
Q74A
2
Q84B
Q84B
4
5
2
Q74B
5
12
R950
R950
100K_0402_5%~D
100K_0402_5%~D
Q74B
3
4
RB751V40_SC76-2
RB751V40_SC76-2
5
RB751V40_SC76-2
RB751V40_SC76-2
3
Q78B
Q78B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
4
D59
D59
D62
D62
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
D D
C C
SATA_ACT#<14>
MASK_SATA_LED#<39>
LED_SATA_DIAG_OUT#< 39>
WIRELESS_LED#<34,39>
BT_ACTIVE<41>
HDD LED solution for White LED
+5V_ALW
2
61
3
2
Q75
Q75
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R934 1K_0402_5%~DR934 1K_0402_5%~D
Q81
Q81
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R938 1.8K_0402_5%~DR938 1.8K_0402_5%~D
WLAN LED solution for White LED
+5V_ALW
61
2
Q79
Q79
PDTA114EU_SC70-3~D
PDTA114EU_SC70-3~D
1 3
1 2
R939 1.4K_0402_1%~DR939 1.4K_0402_1%~D
SATA_LED < 36>
PANEL_HDD_LED <24>
WLAN_LED <36>
Q83B
Q83B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
3
BAT2_LED#<39>
BAT1_LED#<39>
BREATH_LED#<38,39>
4
5
MASK_BASE_LEDS#
Q83A
Q83A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
2
MASK_BASE_LEDS#
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
Q84A
Q84A
2
MASK_BASE_LEDS#
61
BAT2_LED#_Q
BAT1_LED#_Q
POWER_SW#_MB<40>
1 2
R949 680_0402_5%~DR 949 680_0402_5%~D
1 2
R958 620_0402_5%~DR958 620_0402_5%~D
R951
R951
330_0402_5%~D
330_0402_5%~D
1 2
R953
R953
330_0402_5%~D
330_0402_5%~D
1 2
LED1
LED1
LTW-193ZDS5_WHITE~D
LTW-193ZDS5_WHITE~D
Place LED1 close to SW1
POWER_SW#_MB
D23
D23
1
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
BREATH_WHITE_LED_SNIFFBREATH_LED#_Q
21
3
2
BATT_WHITE <36>
BATT_YELLOW <36>
BATT_WHITE_LED <24>
BATT_YELLOW_LED <24>
SW1
SW1
SKRBAAE010_4P~D
SKRBAAE010_4P~D
2
4
Battery LED
1 2
R957 220_0402_5%~DR957 220_0402_5%~D
1 2
R955 1.8K_0402_5%~DR955 1.8K_0402_5%~D
1
3
Breath LED
+5V_ALW
BREATH_WHITE_LED <24>
PWR SW
POWER & INSTANT ON SWITCH
B B
LED Circuit Control Table
SYS_LED_MASK# LID_CL#
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
Do not Mask LEDs (Lid Opened)
Fiducial Mark
FD1
@FD1
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
A A
FD2
@FD2
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD3
@FD3
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
FD4
@FD4
@
1
FIDUCIAL MARK~D
FIDUCIAL MARK~D
H2
@H2
@
H1
@ H1
@
H_2P8
H_2P8
H_2P8
H_2P8
1
@H13
@
H12
@ H12
@
H_2P8
H_2P8
H_2P8
H_2P8
1
5
@ H4
@
H3
@H3
@
H_2P8
H_2P8
H_2P8
H_2P8
1
1
H13
@ H15
@
H14
@H14
@
H_2P3
H_2P3
H_2P3
H_2P3
1
1
@ H6
@
H4
H5
@H5
@
H_2P8
H_2P8
H_2P8
H_2P8
1
1
H15
H16
@H16
@
@ H17
@
H_3P3
H_3P3
H_3P3
H_3P3
1
1
0
1 0
H6
H7
@H7
@
@H8
@
H_2P8
H_2P8
H_2P8
H_2P8
1
1
H18
@H18
@
@H19
@
H17
H_3P3
H_3P3
H_3P3
H_3P3
1
1
X
11
H9
@ H9
@
H10
@H10
@
H8
H_2P8
H_2P8
H_2P8
H_2P8
1
@H20
@
H_6P1
H_6P1
1
H22
@H22
@
H21
@ H21
@
H20
H_2P5X8P0
H_2P5X8P0
1
1
4
H_2P5N
H_2P5N
1
@H23
@
H_2P8
H_2P8
H23
1
1
H19
1
SYS_LED_MASK#<39>
3
SYS_LED_MASK#
LID_CL#
LID_CL#<36,39>
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1
2
+3.3V_ALW
B
A
C778 0.1U_0402_25V6K~DC778 0.1U_0402_25V6K~D
1 2
5
U58
U58
P
MASK_BASE_LEDS#
4
O
G
TC7SH08FU_SSOP5~D
TC7SH08FU_SSOP5~D
3
EMI CLIP
CLIP1
CLIP1
EMI_CLIP
EMI_CLIP
1
GND
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
PWR SW/LED/PAD/ME
PWR SW/LED/PAD/ME
PWR SW/LED/PAD/ME
LA-7761P
LA-7761P
LA-7761P
1
43 59Wednesday, February 22, 2012
43 59Wednesday, February 22, 2012
43 59Wednesday, February 22, 2012
1.0
1.0
1.0
5
4
3
2
1
ESD Diodes
1
@
@
PD1
PD1
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
Media Bay Battery Connector
MBATT1
@ MBATT1
D D
PC2
PC2
@
1
1
Z5304
2
2
Z5305
3
3
Z5306
4
4
5
5
12
2200P_0402_50V7K~D
2200P_0402_50V7K~D
6
6
7
GND
8
GND
SUYIN_150010GR006M500ZR
SUYIN_150010GR006M500ZR
Primary Battery Connector
11
GND
10
GND
9
9
8
8
7
7
6
6
PBATT1
@ PBATT1
@
5
5
4
4
3
3
2
2
1
1
12
PC5
PC5
C C
2200P_0402_50V7K~D
2200P_0402_50V7K~D
SUYIN_200275MR009G50PZR
SUYIN_200275MR009G50PZR
B B
Z4304
Z4305
Z4306
GND
GND
NB_PSID
2
3
100_0402_5%~D
100_0402_5%~D
PR3
PR3
1 2
1
@
@
PD5
PD5
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
3
PR7
PR7
100_0402_5%~D
100_0402_5%~D
1 2
100_0402_5%~D
100_0402_5%~D
1
2
PR4
PR4
100_0402_5%~D
100_0402_5%~D
1 2
ESD Diodes
PR9
PR9
100_0402_5%~D
100_0402_5%~D
1 2
PL4
PL4
BLM18BD102SN1D_0603~D
BLM18BD102SN1D_0603~D
@
@
PD2
PD2
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
3
PR5
PR5
1 2
1
@
@
PD6
PD6
PESD24VS2UT_SOT23-3~D
PESD24VS2UT_SOT23-3~D
2
3
PR8
PR8
100_0402_5%~D
100_0402_5%~D
1 2
12
MBATT+_C
BAY_SMBCLK <28,40>
BAY_SMBDAT <28, 40>
PBAT_SMBCLK <40>
PBAT_SMBDAT <40>
PR14
PR14
1 2
100K_0402_1%~D
100K_0402_1%~D
PR16
PR16
1 2
15K_0402_1%~D
15K_0402_1%~D
PBATT+_C
PR11
@ PR11
@
1 2
0_0402_5%~D
0_0402_5%~D
D
D
1 3
2
B
B
E
E
2
C
C
3 1
PL1
PL1
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
PJP1
PJP1
2 1
12
PAD-OPEN 1x2m
PAD-OPEN 1x2m
PC1
PC1
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
1 2
12
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PC4
PC4
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR13
PR13
33_0402_5%~D
33_0402_5%~D
S
S
1 2
PQ2
PQ2
FDV301N_G_NL_SOT23-3~D
FDV301N_G_NL_SOT23-3~D
G
G
PQ3
PQ3
MMST3904-7-F_SOT323-3~D
MMST3904-7-F_SOT323-3~D
+3.3V_ALW
PBATT+
2
1
PR15
PR15
10K_0402_1%~D
10K_0402_1%~D
PR2
PR2
PR17
PR17
1 2
10K_0402_5%~D@
10K_0402_5%~D@
12
100K_0402_5%~D
100K_0402_5%~D
+3.3V_ALW
PR6
PR6
+3.3V_ALW
PR12
PR12
12
100K_0402_5%~D
100K_0402_5%~D
1 2
2.2K_0402_5%~D
2.2K_0402_5%~D
MODULE_BATT_PRES# <39,53>
PBAT_PRES# <39,53>
DOCK_PSID<38> GPIO_PSID_SELECT <39>
NB_PSID_TS5A63157
PSID_DISABLE# <39>
MPBATT+
PL2
PL2
PL3
PL3
PJP2
PJP2
+5V_ALW
3
PD7
PD7
@
@
DA204U_SOT323~D
DA204U_SOT323~D
+5V_ALW
12
+COINCELL
+3.3V_RTC_LDO
3
PD4
PD4
BAS40-05W_SC70-3-3~D
BAS40-05W_SC70-3-3~D
1
2
12
PR1
PR1
1K_0402_5%~D
1K_0402_5%~D
Z4012
2
+RTC_CELL
1
1
PC3
PC3
1U_0603_10V4Z~D
1U_0603_10V4Z~D
2
PU1
PU1
NO
GND
NC3COM
TS5A63157DCKR_SC70-6~D
TS5A63157DCKR_SC70-6~D
6
IN
5
V+
4
COIN RTC Battery
JRTC1
@JRT C1
@
1
+COINCELL
+5V_ALW
PS_ID <40>
1
G
22G
TYCO_2-1775293-2~D
TYCO_2-1775293-2~D
3
4
DC_IN+ Source
+DC_IN
PL5
PL5
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
1 2
1
12
PD13
2
PL6
PL6
1 2
PD13
@
@
12
VZ0603M260APT_0603
VZ0603M260APT_0603
PC16
PC16
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PS_HPW15003-05M101R
PS_HPW15003-05M101R
5
5
-DCIN_JACK
4
4
3
3
+DCIN_JACK
2
A A
PJPDC1
@ PJPDC1
@
2
1
1
12
PC18
PC18
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
5
PC13
PC13
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
FBMJ4516HS720NT_2P~D
FBMJ4516HS720NT_2P~D
+DC_IN
PC10
PC10
12
PR23
@ PR23
@
4.7K_0805_5%~D
4.7K_0805_5%~D
12
1 2
PR20
PR20
1M_0402_5%~D
1M_0402_5%~D
0.022U_0805_50V7K~D
0.022U_0805_50V7K~D
12
PR26
PR26
4
PQ5
PQ5
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
1
S
2
S
3
S
4
G
PR24
PR24
1 2
10K_0402_5%~D
10K_0402_5%~D
1M_0402_5%~D
1M_0402_5%~D
8
D
7
D
6
D
5
D
SOFT_START_GC <53>
12
12
PC12
PC12
PC11
PC11
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
+DC_IN_SS
12
12
PC14
PC14
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
12
PCH_ALW_ON<40,42>
PR22
PR22
PC15
PC15
PC19
PC19
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
100K_0402_5%~D
100K_0402_5%~D
10U_0805_25V6K
+3.3V_ALW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
+PWR_SRC
PR27
PR27
0_0402_5%
0_0402_5%
1 2
PR25
@ PR25
@
0_0402_5%
0_0402_5%
VSB_N_002
1 2
12
12
PC8
PC8
PR19
PR19
100K_0402_1%
PR21
PR21
22K_0402_1%
22K_0402_1%
1 2
VSB_N_003
13
D
D
PQ6
PQ6
2
G
SSM3K7002FU_SC70-3
G
SSM3K7002FU_SC70-3
S
S
12
PC17
PC17
.1U_0402_16V7K
.1U_0402_16V7K
100K_0402_1%
VSB_N_001
2
TP0610K-T1-GE3_SOT23-3
TP0610K-T1-GE3_SOT23-3
0.22U_0603_25V7K
0.22U_0603_25V7K
2
+PWR_SRC_S
13
12
PC9
PC9
PQ4
PQ4
0.1U_0603_25V7K
0.1U_0603_25V7K
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+DCIN
+DCIN
+DCIN
LA-7761P
LA-7761P
LA-7761P
1
0.3
0.3
44 60Wednesday, February 22, 2012
44 60Wednesday, February 22, 2012
44 60Wednesday, February 22, 2012
0.3
A
3.3V +/- 5%
TDC 5.73A
Peak Current 8.19A
OCP current 9.828A
OCP Setting 11.6A
OVP Setting 3.696V
Low side Rds(on),max 17m
1 1
Low side Rds(on),typ 12.1m
Choke DCR 10m
Bulk Cap ESR 25m
Frequency 375Khz
@
@
PJP100
PJP100
1 2
PAD-OPEN 1x3m
+PWR_SRC
PAD-OPEN 1x3m
PL100
PL100
1UH_PCMB053T-1R0MS_7A_ 20%
1UH_PCMB053T-1R0MS_7A_ 20%
2 2
12
+3.3V_ALWP
3 3
+DC1_PWR_SRC
12
12
PC102
PC102
PC100
PC100
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
2200P_0402_50V7K
12
12
PC103
PC103
PC119
PC119
@
@
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
PL101
PL101
2.2UH_FDSD0630-H-2R2M-P3_8.3A_20%
2.2UH_FDSD0630-H-2R2M-P3_8.3A_20%
1 2
1
+
PC110
220U_6.3V_M+PC110
220U_6.3V_M
2
PR109
PR109
4.7_1206_5%
4.7_1206_5%
PC112
PC112
820P_0603_50V7K
820P_0603_50V7K
+PWR_SRC
B
C
D
5V +/- 5%
TDC 4.61A
Peak Current 6.59A
2VREF_6182
OCP current 7.908A
OCP Setting 8.56A
OVP Setting 5.6V
Low side Rds(on),max 13.6m
12
PC101
PC101
1U_0603_16V6K
1U_0603_16V6K
PC121
PC121
100P_0402_50V8J~D
100P_0402_50V8J~D
1 2
PR101
Vout_3V =0.7 (1+ PR101/PR103) Vout_5V =0.7 (1+ PR102/PR104)
+3.3V_RTC_LDO
+3.3V_ALW2
PR100
@PR100
@
0_0402_5%~D
0_0402_5%~D
1 2
12
PC107
PQ100
PQ100
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
12
SNUB_3V
12
123
123 5
4
5
PQ102
PQ102
4
FDMC8878_MLP8-5
FDMC8878_MLP8-5
@PD100
@
1 2
PC107
10U_0805_6.3V6M
10U_0805_6.3V6M
PC108
PC108
0.22U_0603_16V7K
0.22U_0603_16V7K
1 2
PR113
@PR113
PD100
MMSZ5229BS_SOD323-2
MMSZ5229BS_SOD323-2
@
499K_0402_1%~D
499K_0402_1%~D
12
PR107
PR107
1 2
2.2_0603_5%
2.2_0603_5%
PR111
PR111
@
@
300K_0402_1%
300K_0402_1%
13K_0402_1%
13K_0402_1%
20K_0402_1%
20K_0402_1%
169K_0402_1%~N
169K_0402_1%~N
BST_3V
UG_3V
LX_3V
LG_3V
12
PC115
PC115
@
@
1U_0603_10V6K
1U_0603_10V6K
PR101
1 2
PR103
PR103
FB_3V
1 2
PR105
PR105
ENTRIP2
1 2
PU100
PU100
25
P PAD
7
VO2
8
VREG3
9
BOOT2
10
UGATE2
11
PHASE2
12
LGATE2
12
+DC1_PWR_SRC
2VREF_6182
4
5
6
FB2
TONSEL
ENTRIP2
SKIPSEL
EN
14
15
13
PC120
PC120
100P_0402_50V8J~D
100P_0402_50V8J~D
1 2
PR102
PR102
30.9K_0402_1%
30.9K_0402_1%
1 2
PR104
PR104
20K_0402_1%
20K_0402_1%
1 2
FB_5V
ENTRIP1
1 2
2
3
1
FB1
REF
ENTRIP1
VO1
PGOOD
BOOT1
UGATE1
PHASE1
LGATE1
NC18VREG5
VIN16GND
17
RT8205LZQW(2) WQFN 24P PW M
RT8205LZQW(2) WQFN 24P PW M
+5V_ALW2
12
PC114
PC114
4.7U_0805_10V6K
4.7U_0805_10V6K
12
PC116
PC116
0.1U_0603_25V7K
0.1U_0603_25V7K
PR106
PR106
90.9K_0402_1%
90.9K_0402_1%
24
23
22
21
20
19
BST_5V
UG_5V
LX_5V
LG_5V
PR108
PR108
1 2
2.2_0603_5%
2.2_0603_5%
100K_0402_1%
100K_0402_1%
+DC1_PWR_SRC
12
12
PC106
PC106
PC105
PC105
PC104
PC104
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
2200P_0402_50V7K
PC109
PC109
0.22U_0603_16V7K
0.22U_0603_16V7K
BST1_5VBST1_3V
1 2
+3.3V_ALW
PR112
PR112
1 2
Low side Rds(on),typ 10.8m
Choke DCR 14m
Bulk Cap ESR 25m
Frequency 300khz
12
12
PC118
PC118
@
@
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
4
123 5
5
4
PQ103
PQ103
FDMC7692S_MLP8-5
FDMC7692S_MLP8-5
ALW_PWRGD_3V _5V <40>
PQ101
PQ101
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
PR110
PR110
123
PL102
PL102
3.3UH_FDSD0630-H-3R3M=P3_6.6A_20%
3.3UH_FDSD0630-H-3R3M=P3_6.6A_20%
1 2
12
4.7_1206_5%
4.7_1206_5%
SNUB_5V
12
PC113
PC113
820P_0603_50V7K
820P_0603_50V7K
E
+5V_ALWP
1
+
PC111
220U_6.3V_M+PC111
220U_6.3V_M
2
ENTRIP2
34
5
PQ104B
PQ104B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
PR115
PR115
2K_0402_5%
2K_0402_5%
1 2
ALWON<40>
PR116
A
PR116
0_0402_5%
0_0402_5%
1 2
4 4
THERM_STP#<22>
2
12
PC117
PC117
@
@
1U_0603_10V6K
1U_0603_10V6K
ENTRIP1
61
2
13
PQ105
PQ105
PDTC115EU_SOT323-3
PDTC115EU_SOT323-3
PQ104A
PQ104A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
PR114
PR114
100K_0402_1%
100K_0402_1%
1 2
B
+5V_ALW2
PJP101
PJP101
@
@
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PJP102
PJP102
@
@
+5V_ALWP
+3.3V_ALWP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PJP103
PJP103
@
@
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
@
@
PJP104
PJP104
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
D
+5V_ALW
12
PC122
PC122
0.1U_0603_25V7K
0.1U_0603_25V7K
+3.3V_ALW
12
PC123
PC123
0.1U_0603_25V7K
0.1U_0603_25V7K
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+5V_ALW/3.3V_ALW
+5V_ALW/3.3V_ALW
+5V_ALW/3.3V_ALW
LA-7761P
LA-7761P
LA-7761P
45 60Wednesday, February 22, 2012
45 60Wednesday, February 22, 2012
45 60Wednesday, February 22, 2012
E
0.3
0.3
0.3
5
4
3
2
1
1.5V +/- 5%
TDC 7.14A
Peak Current 10.2A
OCP current 12.24A
OCP Setting 13.33A
PJP200
PJP200
@
+PWR_SRC
D D
@
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
1UH_FDU E1040D-H-1R0M-P 3_21.3A_20%
1UH_FDU E1040D-H-1R0M-P 3_21.3A_20%
+1.5V_MEN_P
C C
Mode Level +0.75V_P +V_DDR_REF
S5 L off off
S3 L off on
S0 H on on
Note: S3 - sleep ; S5 - power off
B B
1
2
OVP Setting 1.725V
Low side Rds(on),max 5.1m
Low side Rds(on),typ 4.2m
Choke DCR 5m
Bulk Cap ESR 10m
1.5V_B+
12
12
PC201
PC201
PC200
PC200
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
PL200
PL200
1 2
12
PC209
+
+
PC208
PC208
390U_2.5 V_M
390U_2.5 V_M
PC209
820P_0603_50V7K
820P_0603_50V7K
SNUB_1.5V
PR203
PR203
1 2
4.7_0805_5%~N
4.7_0805_5%~N
SIO_SLP_S 4#<16,3 9,42>
Frequency 300Khz
0.75V +/- 5%
TDC 0.525A
Peak Current 0.75A
OCP Current 0.9A
OVP Setting 0.8625V
@
@
PJP204
PU200
PU200
PAD
GND
21
1
2
3
4
5
1.5V_FB
PJP204
12
PAD-OPEN 1x1m
PAD-OPEN 1x1m
PC214
@P C214
@
0.1U_040 2_16V7K~D
0.1U_040 2_16V7K~D
1 2
PR207
@ PR20 7
@
0_0402_ 5%~D
0_0402_ 5%~D
PR209
PR209
0_0402_ 5%~D
0_0402_ 5%~D
1 2
+1.5V_MEN_P
12
PC205
PC205
+1.5V_MEN_P
12
12
PC213
PC213
0.1U_040 2_16V7K~D
0.1U_040 2_16V7K~D
@
@
+0.75V_P
12
PC206
PC206
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
+V_DDR_REF
PC211
PC211
0.033U_0 402_16V7~D
0.033U_0 402_16V7~D
PR200
PR200
1 2
2.2_0603 _5%
2.2_0603 _5%
12
12
PC202
PC202
PC203
PC203
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
DDR_ON<40>
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1.5V_SUS _PWRGD< 40>
PR206
@P R206
@
0_0402_ 5%~D
0_0402_ 5%~D
1 2
@P R210
@
0_0402_ 5%~D
0_0402_ 5%~D
1 2
PR210
5
PQ200
PQ200
123
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
5
PQ201
PQ201
123
SIR466DP-T1-GE3_POWERPAK8-5~D
SIR466DP-T1-GE3_POWERPAK8-5~D
1 2
4
+5V_ALW
4
+3.3V_ALW
PR204
PR204
100K_04 02_1%~D
100K_04 02_1%~D
12
PC204
PC204
0.22U_0603_16V7K~D
0.22U_0603_16V7K~D
1U_0603 _10V6K~D
1U_0603 _10V6K~D
12
PC212
@PC212
@
0.1U_040 2_16V7K~D
0.1U_040 2_16V7K~D
PR202
PR202
5.1_0603 _5%~D
5.1_0603 _5%~D
1 2
PC210
PC210
BOOT_1.5 V
PR201
PR201
5.62K_04 02_1%
5.62K_04 02_1%
1 2
PC207
PC207
1U_0603 _10V6K~D
1U_0603 _10V6K~D
S5_1.5V
DH_1.5V
SW_ 1.5V
DL_1.5V
VDD_1.5V
0.75V_DD R_VTT_ON<39>
CS_1.5V
+5V_ALW
PGOOD_1 .5V
1.5V_B+
15
LGATE
14
PGND
13
CS
RT8207M ZQW_W QFN20_3X3
RT8207M ZQW_W QFN20_3X3
12
VDDP
11
VDD
PR205
PR205
1M_0402 _1%~D
1M_0402 _1%~D
1 2
@P R208
@
0_0402_ 5%~D
0_0402_ 5%~D
1 2
16
PHASE
PGOOD
10
PR208
17
UGATE
TON
9
VLDOIN_1.5 V
18
20
19
BOOT
S5
8
VTT
VLDOIN
VTTGND
VTTSNS
VTTREF
VDDQ
FB
S3
6
7
PJP201
@P JP201
@
2
112
JUMP_1x3m
JUMP_1x3m
PJP202
@P JP202
+1.5V_MEN_P
A A
@
2
JUMP_1x3m
JUMP_1x3m
112
+1.5V_MEM +0.75V_DDR_VTT
+0.75V_P
@
@
PJP203
PJP203
PAD-OPEN 1x1m
PAD-OPEN 1x1m
12
+1.5V_ME N_P
For T_V
：：：：
VDDQ = Vref (1+ PR207/PR209) , Vref = 0.75V
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size Documen t Number Rev
Size Documen t Number Rev
Size Documen t Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.5V_MEN/+0.75V_DDR_VTT
+1.5V_MEN/+0.75V_DDR_VTT
+1.5V_MEN/+0.75V_DDR_VTT
LA-7761P
LA-7761P
LA-7761P
46 60Wednesd ay, February 22, 2012
46 60Wednesd ay, February 22, 2012
46 60Wednesd ay, February 22, 2012
1
0.5
0.5
0.5
A
B
PR300
PR300
10K_0402_5%~D
10K_0402_5%~D
12
+3.3V_RUN
C
D
1.8V +/- 5%
TDC 0.652A
Peak Current 0.931A
OCP current 1.117A
1 1
1.8V_RUN_PWRGD <3 9>
OCP Setting 5A
OVP Setting 1.854V
Frequency 1Mhz
PU300
PU300
PJP301
@PJP301
+3.3V_ALW
RUN_ON<27,35,39,42>
2 2
SIO_SLP_S3#<11,16,27,35,36,39,42>
@
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
PR303 0_0402_5%@ PR303 0_0402_5%@
12
1 2
PR306
@PR30 6
@
0_0402_5%~D
0_0402_5%~D
1 2
PC300
PC300
22U_0805_6.3VAM
22U_0805_6.3VAM
EN_1.8VSPEN_ 1.8VSP
1.8VSP_VIN
12
PC307
PC307
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR304
@PR30 4
@
47K_0402_5%
47K_0402_5%
12
12
PC304
PC304
@
@
0.1U_0402_10V7K
0.1U_0402_10V7K
4
10
PVIN
PG
9
PVIN
8
SVIN
5
EN
TP
NC
7
11
SYN470DBC_DFN10_3X3
SYN470DBC_DFN10_3X3
1.8VSP_LX
2
LX
3
LX
1.8VSP_FB
6
FB
NC
1
1UH_NRS4018T1R 0NDGJ_3.2A_30%
1UH_NRS4018T1R 0NDGJ_3.2A_30%
12
SNUB_1.8VSP
12
PR301
PR301
@
@
4.7_0805_5%~D
4.7_0805_5%~D
PC305
PC305
@
@
680P_0603_50V7K
680P_0603_50V7K
PL301
PL301
1 2
20K_0402_1%
20K_0402_1%
10K_0402_1%
10K_0402_1%
PR302
PR302
PR305
PR305
12
12
12
PC301
PC301
12
22P_0402_50V8J
22P_0402_50V8J
12
12
PC306
PC306
PC303
PC302
PC302
PC303
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
47P_0402_50V8J~D
47P_0402_50V8J~D
<Vo=1.8V> VFB=0.6V
Vo=VFB*(1+PR302/PR305)=0.6*(1+20K/10K)=1.8V
+1.8V_RUNP
PJP300
@PJP300
@
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
+1.8V_RUNP
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
C
+1.8V_RUN
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.8V_RUN
+1.8V_RUN
+1.8V_RUN
LA-7761P
LA-7761P
LA-7761P
D
47 60Wednesday, February 22, 2012
47 60Wednesday, February 22, 2012
47 60Wednesday, February 22, 2012
0.5
0.5
0.5
5
4
3
2
1
+1.05V +/- 5%
PJP400
@PJP400
TDC 4.751A
Peak Current 6.69A
OCP setting 11.77A
+V1.05SP_B+
@
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
+PWR_SRC
OVP Setting 1.3125V
Low side Rds(on) Typ : 10.8m
D D
Low side Rds(on) Max : 13.6m
Cap ESR : 15m
Frequency 300Khz
PR402
PR402
110K_0402_1%
110K_0402_1%
1 2
PR403
@PR40 3
@
0_0402_5%~D
0_0402_5%~D
SIO_SLP_A#<1 6,39,42>
1 2
S0 mode be high level
C C
PC407
PC407
0.1U_0402_16V7K
0.1U_0402_16V7K
1.05V_A_PWRGD<40>
12
@
@
+3.3V_ALW
PR400
PR400
100K_0402_1%~D
100K_0402_1%~D
TRIP_+V1.05SP
EN_+V1.05SP
FB_+V1.05SP
RF_+V1.05SP
12
PR405
PR405
470K_0402_1%
470K_0402_1%
12
PU400
PU400
1
2
3
4
5
4.87K_0402_1%~D
4.87K_0402_1%~D
VBST
PGOOD
TRIP
DRVH
EN
VFB
RF
TPS51212DSCR_SON10_ 3X3
TPS51212DSCR_SON10_ 3X3
PR406
PR406
SW
V5IN
DRVL
TP
12
10
9
8
7
6
11
BST_+V1.05SP
UG_+V1.05SP
SW_+V1.05SP
LG_+V1.05SP
+5V_ALW
12
PC405
PC405
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PR401
PR401
2.2_0603_5%
2.2_0603_5%
1 2
PC404
PC404
0.1U_0603_16V7K
0.1U_0603_16V7K
1 2
4
4
PQ400
PQ400
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
123 5
5
12
PQ401
PQ401
@PR40 4
@
4.7_1206_5%
4.7_1206_5%
FDMC7692S_MLP8-5
FDMC7692S_MLP8-5
123
12
@PC40 8
@
1000P_0603_50V7K
1000P_0603_50V7K
12
PC402
PC402
PC401
PC401
0.1U_0402_25V6
0.1U_0402_25V6
PL400
1UH_FDSD0630-H-1 R0M=P3_11A_20%
1UH_FDSD0630-H-1 R0M=P3_11A_20%
PR404
PC408
PL400
1 2
12
12
2200P_0402_50V7K
2200P_0402_50V7K
12
PC403
PC403
PC400
PC400
4.7U_0805_25V6K
4.7U_0805_25V6K
4.7U_0805_25V6K
4.7U_0805_25V6K
+1.05V_MP
1
+
+
PC406
PC406
2
220U_D2 SX_2VY_R9M
220U_D2 SX_2VY_R9M
Vout_1.05V_M = 0.7 + 0.7 (PR406/PR407)
PJP401
@PJP401
PR407
B B
PR407
10K_0402_1%
10K_0402_1%
1 2
+1.05V_MP
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
@
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
PJP402
@PJP402
@
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
+1.05V_M
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.05V_M
+1.05V_M
+1.05V_M
LA-7761P
LA-7761P
LA-7761P
48 60Wednesday, February 22, 2012
48 60Wednesday, February 22, 2012
48 60Wednesday, February 22, 2012
1
0.5
0.5
0.5
5
+1.05V +/- 5%
TDC 5.983A
Peak Current 8.548A
OCP Setting 11.77A
+3.3V_RUN
OVP Setting 1.3125V
Low side Rds(on) Typ : 10.8m
D D
Low side Rds(on) Max : 13.6m
Cap ESR : 15m
Frequency 300Khz
1.05V_VTTPWRGD<40,50>
PR501
PR501
110K_0402_1%
110K_0402_1%
1 2
PR503
@PR50 3
@
0_0402_5%~D
0_0402_5%~D
CPU_VTT_ON<39>
C C
1 2
@
@
PC506
PC506
0.1U_0402_16V7K
0.1U_0402_16V7K
12
TRIP_+V1.05S_VCCPP
EN_+V1.05S_VCCPP
FB_+V1.05S_VCCPP
RF_+V1.05S_VCCPP
12
PR505
PR505
470K_0402_1%
470K_0402_1%
1 2
PR507
PR507
4.32K_0402_1%
4.32K_0402_1%
4
PR500
PR500
100K_0402_5%
100K_0402_5%
PU500
PU500
1
2
3
4
5
VBST
PGOOD
TRIP
DRVH
EN
VFB
RF
TPS51212DSCR_SON10_ 3X3
TPS51212DSCR_SON10_ 3X3
SW
V5IN
DRVL
TP
Vout_1.05V_RUN = 0.7 + 0.7 (PR507/PR510)
12
BST_+V1.05S_VCCPP
10
9
8
7
6
11
UG_+V1.05S_VCCPP
SW_+V1.05S_VCCPP
LG_+V1.05S_VCCPP
PR502
PR502
2.2_0603_5%
2.2_0603_5%
1 2
3
PC504
PC504
0.1U_0603_16V7K
0.1U_0603_16V7K
1 2
12
PC505
PC505
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
+5V_ALW
2
@PJP500
+V1.05S_VCCPP_B+
12
12
PC502
PC502
PC501
PC501
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_50V7K
2200P_0402_50V7K
PQ500
123 5
5
123
PQ500
FDMC8884_POWER33-8-5
FDMC8884_POWER33-8-5
PQ501
PQ501
FDMC7692S_MLP8-5
FDMC7692S_MLP8-5
VTT_SENSE_FB
VTT_SENSE_R_FB
PL500
PR504
PC508
PL500
1 2
@
@
1UH_FDSD0630-H-1 R0M=P3_11A_20%
1UH_FDSD0630-H-1 R0M=P3_11A_20%
12
@PR50 4
@
4.7_1206_5%
4.7_1206_5%
12
@PC50 8
@
1000P_0603_50V7K
1000P_0603_50V7K
4
4
12
12
PC500
PC500
PC503
PC503
4.7U_0805_25V6K
4.7U_0805_25V6K
4.7U_0805_25V6K
4.7U_0805_25V6K
12
PC510
PC510
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
PR508
@PR50 8
@
0_0402_5%~D
0_0402_5%~D
PR514
@PR51 4
@
0_0402_5%~D
0_0402_5%~D
@
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
1
+
+
PC507
PC507
2
220U_D2_2VY_R15M
220U_D2_2VY_R15M
12
12
1
PJP500
+PWR_SRC
+1.05VTTP
VTT_SENSE <10>
VSSIO_SENSE_R <10>
B B
+3.3V_RUN
12
PR509
PR509
71.5K_0402_1%
71.5K_0402_1%
13
D
PR510
PR510
10K_0402_1%
10K_0402_1%
1 2
PR513
@PR513
@
10K_0402_1%
A A
5
10K_0402_1%
1 2
D
PQ502
PQ502
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
2
G
G
S
S
12
PC509
PC509
@
@
.01U_0402_16V7K~D
.01U_0402_16V7K~D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
10K_0402_5%
10K_0402_5%
1 2
PR511
PR511
PR512
PR512
0_0402_5%
0_0402_5%
12
VCCP_PWRCTRL <11>
From GPIO
VCCP_PWRCTRL = "High" , Vo = 1.05V (SNB)
VCCP_PWRCTRL = "Low" , Vo = 1V (IVB)
3
+1.05VTTP
DELL CONFIDENTIAL/PROPRIETARY
2
PJP501
@PJP501
@
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
PJP502
@PJP502
@
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
LA-7761P
LA-7761P
LA-7761P
1
49 60Wednesday, February 22, 2012
49 60Wednesday, February 22, 2012
49 60Wednesday, February 22, 2012
0.5
0.5
0.5
5
VCCSA + / - 5%
TDC 4.2A
Peak Current 6 A
OCP current 7.2 A
OCP Settting 6. 75A
OVP Setting VCC SA*120%
Frequency 1Mhz
D D
4
3
2
1
VID [0] VID[1] VCCSA Vout
The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.
PR601
PR601
1K_0402_5%
1K_0402_5%
12
PR602
@PR602
+3.3V_RUN
12
PR603
PR603
100K_0402_5%
PR600
@ PR600
@
0_0402_5%~D
0_0402_5%~D
VCCSAPWROK<40>
12
100K_0402_5%
+VCCSA_PWRGD+VCCSA_PWRGD
@
0_0402_5%~D
0_0402_5%~D
1 2
@PR604
@
0_0402_5%~D
0_0402_5%~D
1 2
PR605
PR605
1K_0402_5%
1K_0402_5%
VCCSA_VID_1 <11>
PR604
VCCSA_VID_0 <11>
12
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V
output voltage adjustable netw ork
+5V_ALW
PR606
PR606
10_0402_1%
12
3300P_0402_50V7K
3300P_0402_50V7K
10_0402_1%
19
20
21
22
23
24
PC617
PC617
12
PU600
PU600
PGND
PGND
PGND
VIN
VIN
VIN
PC602
PC602
2.2U_0603_10V7K
2.2U_0603_10V7K
1 2
C C
1
PC613
PC613
PC600
PC600
1 2
+3.3V_ALW
PJP600
@PJP600
@
2 1
PAD-OPEN 1x2m~D
PAD-OPEN 1x2m~D
2
2200P_0402_50V7K
2200P_0402_50V7K
0.1U_0603_25V7K
0.1U_0603_25V7K
GNDA_VCCSA
B B
PC615
PC615
PC614
PC614
1 2
1 2
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
+VCCSA_PWR_SRC
PC616
PC616
0.22U_0402_10V6K
0.22U_0402_10V6K
PC601
PC601
1 2
12
18
17
V5FILT
V5DRV
TPS51461RGER_QFN24_4X4~D
TPS51461RGER_QFN24_4X4~D
GND
VREF
1
2
12
PR613
PR613
5.1K_0402_1%
5.1K_0402_1%
1U_0603_10V6K
1U_0603_10V6K
16
15
VID1
PGOOD
COMP
SLEW
3
4
1 2
PC618
PC618
0.01U_0402_25V7K
0.01U_0402_25V7K
+VCCSA_EN
13
14
EN
VID0
12
BST
+VCCSA_PHASE
11
SW
10
SW
9
SW
8
SW
7
SW
25
TP
VOUT
MODE
5
6
33K_0402_5%
33K_0402_5%
PR610
@PR610
@
PR607
@PR607
@
0_0402_5%~D
0_0402_5%~D
1 2
PR608
PR608
2.2_0603_1%
2.2_0603_1%
1 2
12
+VCCSA_BT_1+VCCSA_BT
12
PC604
@ PC604
@
1000P_0603_50V7K
1000P_0603_50V7K
12
PR609
@PR609
@
4.7_1206_5%
4.7_1206_5%
1.05V_VTTPWRGD <40,49>
PC603
PC603
0.1U_0603_16V7K
0.1U_0603_16V7K
1 2
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 2
PL600
PL600
+VCCSA_P
PC605
PC605
1 2
@
@
22U_0805_6.3V6M
22U_0805_6.3V6M
12
PC606
PC606
1 2
PC607
PC607
@
@
0.1U_0402_10V7K
0.1U_0402_10V7K
22U_0805_6.3V6M
22U_0805_6.3V6M
PR611
PR611
100_0402_5%
100_0402_5%
PR612
@PR612
@
0_0402_5%~D
0_0402_5%~D
PC609
PC609
PC608
PC608
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
12
12
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
VCCSA_SENSE <11>
12
PC611
PC611
PC612
PC612
1 2
PC610
PC610
2200P_0402_50V7K
2200P_0402_50V7K
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PJP601
@ PJP601
@
+VCCSA_P
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
PJP602
PJP602
@
@
PAD-OPEN1x1m
PAD-OPEN1x1m
+VCC_SA
12
GNDA_VCCSA
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
+VCC_SA
+VCC_SA
+VCC_SA
LA-7761P
LA-7761P
LA-7761P
1
50 60Wednesday, February 22, 2012
50 60Wednesday, February 22, 2012
50 60Wednesday, February 22, 2012
0.5
0.5
0.5
5
VCC_core
TDC 36A
Peak Current 53A
OCP current 63.5A
Load line 1.9
Low side Mosfet Rds(on), max 3.3m
Low side Mosfet Rds(on), typ 2.7m
Choke 0.36u +/-20%
Choke DCR 0.82m +/-5%
D D
VSUMG+
12
12
PR707
PR707
2.61K_0402_1%
2.61K_0402_1%
12
PR709
PR709
11K_0402_1%
11K_0402_1%
PH700
PH700
VSUMG-
PR712
PR712
1 2
3.83K_0402_1%
3.83K_0402_1%
C C
H_PROCHOT#
+1.05V_RUN_VTT
PR730 54.9_0402_1%PR730 54.9_0402_1%
12
PR735 75_0402_5%@ PR735 75_0402_5%@
B B
A A
12
PR737 130_0402_1%PR737 130_0402_1%
12
Tune Vcore load line
Ri = PR750
Rdroop = PR740
Rsum = PR738 PR755
Tune Vgfx load line
Rig = PR711
Rdroopg = PR702
Rsumg = PR758
10K_0402_5%_ERTJ0ER103J
10K_0402_5%_ERTJ0ER103J
12
PC711
PC711
.1U_0402_16V7K
.1U_0402_16V7K
12
PH701
SCLK
ALERT#
SDA
PH701
PR715
PR715
12
27.4K_0402_1%
27.4K_0402_1%
PR724
@PR724
@
1 2
0_0402_5%
0_0402_5%
VIDSCLK<10>
VIDALERT_N<10>
VIDSOUT<10>
470K_0402_5%_ TSM0B474J4702RE
470K_0402_5%_ TSM0B474J4702RE
Vcore Output Cap : 470u ESR 4.5m 4pcs
10u 0805 10pcs / 22u 0805 16pcs
VCC_AXG_SENSE<11>
330P_0402_50V7K~D
330P_0402_50V7K~D
0.01U_0402_50V7K
0.01U_0402_50V7K
PR710
@PR710
@
649_0402_1%~D
649_0402_1%~D
1 2
PR711
PR711
422_0402_1%
422_0402_1%
1 2
12
12
ALERT#
SDA
VR_HOT#
PR722 0_0402_5%@PR722 0_0402_5%@
1 2
PR723 0_0402_5%~D@ PR723 0_0402_5%~D@
1 2
12
PH702
PH702
470K_0402_5%_ TSM0B474J4702RE
470K_0402_5%_ TSM0B474J4702RE
PR727
PR727
27.4K_0402_1%
27.4K_0402_1%
12
PC720 10P_0402_50V8JPC720 10P_0402_50V8J
COMP
PR732 0_0402_5%@PR732 0_0402_5%@
1 2
PC724
@PC724
@
PC726
PC726
VSUM-
PC728
PC728
12
12
PR747 11K_0402_1%PR747 11K_0402_1%12PH703
PH703
12
10K_0402_5%_ERTJ0ER103J
10K_0402_5%_ERTJ0ER103J
12
PC707
PC707
12
PC719
PC719
12
PC708
PC708
.1U_0603_16V7K~D
.1U_0603_16V7K~D
0.022U_0402_25V7K
0.022U_0402_25V7K
VSUMG-
+5V_ALW
PR721
@PR721
@
0_0402_5%~D
0_0402_5%~D
1.05V_0.8V_PWROK<14,40>
43P_0402_50V8J~D
43P_0402_50V8J~D
VSS_AXG_SENSE<11>
12
PC709
PC709
0.1U_0402_25V6
0.1U_0402_25V6
PC712 0.22U_0402_16V7K~D@ PC712 0.22U_0402_16V7K~D@
PC713 0.22U_0402_16V7K~D@ PC713 0.22U_0402_16V7K~D@
PR716 0_0402_5%PR716 0_0402_5%
1 2
PR718 0_0402_5%PR718 0_0402_5%
1 2
PR719 0_0402_5%PR719 0_0402_5%
1 2
1 2
IMVP_VR_ON<39>
PR725
PR725
1 2
3.83K_0402_1%
3.83K_0402_1%
+5V_ALW
VSUM+
VSUM-
PR713 0_0402_5%~D@PR713 0_0402_5%~D@
1 2
PR746
PR746
2.61K_0402_1%
2.61K_0402_1%
PC743
PC743
.1U_0402_16V7K
.1U_0402_16V7K
PC703
PC703
@
@
12
PC706
PC706
1 2
12
@PC710
@
3300P_0402_50V7K~D
3300P_0402_50V7K~D
ISEN1G
ISEN2G
NTCG
SCLK
VR_EN
NTC
12
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
12
12
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
PC738
PC738
PC739
PC739
@PR754
@
1 2
649_0402_1%~D
649_0402_1%~D
4
0.22U_0603_10V7K
0.22U_0603_10V7K
PC710
1
2
3
4
5
6
7
8
9
10
41
PC740
PC740
PR754
PU700
PU700
ISUMPG
ISEN1G
ISEN2G
NTCG
SCLK
ALERT#
SDA
VR_HOT#
VR_ON
NTC
TP
12
0.047U_0402_25V7K~D
0.047U_0402_25V7K~D
PR750
PR750
365_0402_1%~D
365_0402_1%~D
@
@
1 2
2200P_0402_25V7K~D
2200P_0402_25V7K~D
499_0402_1%~D
499_0402_1%~D
39
38
40
RTNG
ISUMNG
ISEN212FB17ISUMP14ISEN3/FB2
11
13
ISEN3
ISEN1
ISEN2
12
PC744
PC744
3
PR701
37
FBG
COMPG
PR702
PR702
2.8K_0402_1%
2.8K_0402_1%
PR704
PR704
@PR708
@
1 2
0_0402_5%
0_0402_5%
PGOODG
36
35
34
PWM2G
PGOODG
LGATE1G
RTN16ISEN1
15
PR708
33
18
COMP
12
12
32
31
BOOT1G
PHASE1G
UGATE1G
COMP
PGOOD19ISUMN
BOOT1
20
PGOOD
PR701
2K_0402_1%
2K_0402_1%
PR703
PR703
267K_0402_1%
267K_0402_1%
PC704
PC704
12
470P_0402_50V7K~D
470P_0402_50V7K~D
IMVP_PWRGD
30
BOOT2
29
UGATE2
28
PHASE2
27
LGATE2
26
VCCP
25
VDD
24
PWM3
23
LGATE1
22
PHASE1
21
UGATE1
ISL95836HRTZ-T_TQFN40_5X5~D
ISL95836HRTZ-T_TQFN40_5X5~D
BOOT1
PR726
@PR726
@
0_0402_5%~D
0_0402_5%~D
1 2
PR736
PR736
12
499_0402_1%~D
499_0402_1%~D
PR740
PR740
2K_0402_1%~D
2K_0402_1%~D
@
@
PC737
PC737
1 2
330P_0402_50V7K
330P_0402_50V7K
PC741
PC741
1 2
0.01U_0402_50V7K
0.01U_0402_50V7K
PR728 1.91K_0402_1%PR728 1.91K_0402_1%
PC722
PC722
470P_0402_50V7K~D
470P_0402_50V7K~D
12
12
2K_0402_1%
2K_0402_1%
330P_0402_50V7K~D
330P_0402_50V7K~D
12
12
150P_0402_50V8F~D
150P_0402_50V8F~D
PC705
PC705
1 2
68P_0402_50V8J~D
68P_0402_50V8J~D
LGATE1G
PHASE1G
UGATE1G
BOOT1G
BOOT2
UGATE2
PHASE2
LGATE2
VCCP
PWM3
LGATE1
PHASE1
UGATE1
IMVP_PWRGD <39>
12
22P_0402_50V8J~D
22P_0402_50V8J~D
PR741
PR741
12
267K_0402_1%
267K_0402_1%
PR744
PR744
1 2
PC701
PC701
12
PC702
PC702
12
+3.3V_ALW
PC723
PC723
12
PC727
PC727
150P_0402_50V8F~D
150P_0402_50V8F~D
PC729
PC729
1 2
680P_0402_50V7K~D
680P_0402_50V7K~D
VCCSENSE <10>
VSSSENSE <10>
Take PR742 off , set vcore / vgfx voltage to 1.1V.
0.22U_0603_16V7K
0.22U_0603_16V7K
PR714
@PR714
@
0_0402_5%~D
0_0402_5%~D
1 2
12
PC714
PC714
12
12
PR705
PR705
PC750
PC750
PR763
PR763
2.2_0603_5%
2.2_0603_5%
12
PC715
PC715
1U_0603_10V6K
1U_0603_10V6K
UGATE2
PHASE2
BOOT2
LGATE2
PR742
PR742
21K_0402_1%~D
21K_0402_1%~D
1 2
BOOT1
2.2_0603_5%
2.2_0603_5%
LGATE1
VGFX_CORE
TDC 21.5A
Peak Current 33A
OCP current 40A
Load line 3.9
150K_0402_1%~D
150K_0402_1%~D
PQ708
PQ708
4
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ710
PQ710
1 2
4
12
SIR818DP-T1-GE3_POWERPAK8-5~D
SIR818DP-T1-GE3_POWERPAK8-5~D
+5V_ALW
PR717
PR717
1 2
0_0603_5%~D
0_0603_5%~D
PR720
PR720
12
1_0402_1%~D
1_0402_1%~D
1U_0603_10V6K
1U_0603_10V6K
PR729
PR729
1 2
12
2.2_0603_5%
2.2_0603_5%
0.22U_0603_16V7K
0.22U_0603_16V7K
UGATE1
PHASE1
PR749
PR749
1 2
12
PC742
PC742
0.22U_0603_16V7K
0.22U_0603_16V7K
PC721
PC721
PQ704
PQ704
2
Low side Mosfet Rds(on), max 3.3m
Low side Mosfet Rds(on), typ 2.7m
Choke 0.36u +/-20%
Choke DCR 0.82m +/-5%
+GFX_PWR_SRC
5
123
5
123
PQ700
PQ700
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
4
PQ702
PQ702
4
SIR818DP-T1-GE3_POWERPAK8-5~D
SIR818DP-T1-GE3_POWERPAK8-5~D
4
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ706
PQ706
4
SIR818DP-T1-GE3_POWERPAK8-5~D
SIR818DP-T1-GE3_POWERPAK8-5~D
5
PQ709
PQ709
@
@
4
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
5
PQ711
PQ711
4
SIR818DP-T1-GE3_POWERPAK8-5~D
SIR818DP-T1-GE3_POWERPAK8-5~D
5
123
5
123
5
PQ705
PQ705
@
@
4
123
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
5
PQ707
PQ707
4
123
SIR818DP-T1-GE3_POWERPAK8-5~D
SIR818DP-T1-GE3_POWERPAK8-5~D
12
PC746
PC746
10U_0805_25V6K
10U_0805_25V6K
123
12
PR760
PR760
4.7_1206_5%
4.7_1206_5%
12
123
VGFX Output Cap : 470u ESR 4.5m 2pcs
22u 0805 12pcs
+VCC_PWR_SRC
5
PQ701
PQ701
@
@
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
4
123
5
PQ703
PQ703
4
123
SIR818DP-T1-GE3_POWERPAK8-5~D
SIR818DP-T1-GE3_POWERPAK8-5~D
+VCC_PWR_SRC
5
123
5
123
12
12
PC748
PC748
PC749
PC747
PC747
PC751
PC751
PC733
PC733
10U_0805_25V6K
10U_0805_25V6K
PC749
@
@
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
680P_0603_50V7K
680P_0603_50V7K
PC716
PC716
12
10U_0805_25V6K
0.36UH_FDUE1040J-H-R36M=P3_33A_20%
0.36UH_FDUE1040J-H-R36M=P3_33A_20%
4
GP1_SW GP1_Vo
3
PR758
PR758
PR761
PR761
@
@
10K_0603_1%
10K_0603_1%
1 2
1 2
3.65K_0603_1%
3.65K_0603_1%
ISEN1G
12
12
PC717
PC717
PC718
PC718
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
12
PR731
PR731
4.7_1206_5%
4.7_1206_5%
ISEN2
12
10K_0603_1%
10K_0603_1%
PC725
PC725
680P_0603_50V7K
680P_0603_50V7K
VSUM+
12
PC734
PC734
PC735
PC735
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
12
PR751
PR751
4.7_1206_5%
4.7_1206_5%
ISEN1
12
10K_0603_1%
10K_0603_1%
PC745
PC745
680P_0603_50V7K
680P_0603_50V7K
VSUM+
12
12
PC753
PC753
PC752
PC752
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_25V7K~D
2200P_0402_25V7K~D
PL704
PL704
1
2
12
12
PC700
PC700
PC754
PC754
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
@
@
PR733
PR733
1 2
PR738
PR738
1 2
3.65K_0603_1%
3.65K_0603_1%
VSUM-
12
12
PC736
PC736
PC756
PC756
@
@
10U_0805_25V6K
10U_0805_25V6K
0.36UH_FDUE1040J-H-R36M=P3_33A_20%
0.36UH_FDUE1040J-H-R36M=P3_33A_20%
PR752
PR752
1 2
PR755
PR755
1 2
3.65K_0603_1%
3.65K_0603_1%
VSUM-
1
PJP702
PJP702
@
@
1 2
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
+PWR_SRC
+VCC_GFXCORE
12
PR759
PR759
1_0402_5%
1_0402_5%
VSUMG-VSUMG+
PL705
PL705
FBMA-L11-453215-800LMA90T_2
FBMA-L11-453215-800LMA90T_2
12
PC755
PC755
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_25V7K~D
2200P_0402_25V7K~D
0.36UH_FDUE1040J-H-R36M=P3_33A_20%
0.36UH_FDUE1040J-H-R36M=P3_33A_20%
4
3
P2_SW
PR743
PR743
12
1_0402_5%
1_0402_5%
12
PC757
PC757
0.1U_0402_25V6
0.1U_0402_25V6
2200P_0402_25V7K~D
2200P_0402_25V7K~D
PL702
PL702
4
3
P1_SW
PR757
PR757
12
1_0402_5%
1_0402_5%
PJP700
PJP700
@
@
1 2
PAD-OPEN 1x3m
PAD-OPEN 1x3m
1 2
PL701
PL701
PC730
PC730
1 2
1
2
12
1
+VCC_CORE
2
P2_Vo
@PR734
@
10K_0402_1%
10K_0402_1%
1
+
+
PC731
PC731
2
100U_25V_M~D
100U_25V_M~D
+VCC_CORE
P1_Vo
PR753
@PR753
@
10K_0402_1%
10K_0402_1%
+PWR_SRC
PR734
1
2
ISEN1
12
1
+
+
+
+
PC732
PC732
2
100U_25V_M~D
100U_25V_M~D
100U_25V_M~D
100U_25V_M~D
ISEN2
12
DELL CONFIDENTIAL/PROPRIETARY
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD P ARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
+VCC_CORE
+VCC_CORE
+VCC_CORE
LA-7761P
LA-7761P
LA-7761P
51 60W ednesday, February 22, 2012
51 60W ednesday, February 22, 2012
51 60W ednesday, February 22, 2012
1
0.5
0.5
0.5
A
PD1300@
PD1300@
2 1
ES2AA-13-F
ES2AA-13-F
8
+DC_IN_SS
SI4835DDY-T1-GE3_SO8~D
SI4835DDY-T1-GE3_SO8~D
1 1
PR1317
PR1317
49.9K_0402_1%~D
49.9K_0402_1%~D
PC1307
PC1307
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
2 2
GNDA_CHG
CHARGER_SMBCLK<40>
CHARGER_SMBDAT<40>
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
7
5
PQ1300
PQ1300
+SDC_IN
MAX8731A_LDO
PR1313
PR1313
1 2
226K_0402_1%~D
226K_0402_1%~D
12
+5V_ALW
PC1316
PC1316
ACAV_IN<22,40,53>
12
GNDA_CHG
MAX8731_IINP<22>
12
1
2
36
4
PR1300
@PR1300
@
0_0402_5%~D
0_0402_5%~D
1 2
MAX8731_REF
12
PR1310
PR1310
@
@
10K_0402_1%~D
10K_0402_1%~D
12
PR1316
PR1316
15.8K_0402_1%~D
15.8K_0402_1%~D
12
PR1329
PR1329
@
@
8.45K_0402_1%~D
8.45K_0402_1%~D
PR1311
PR1311
10K_0402_5%~D
10K_0402_5%~D
@
@
12
12
PC1323
PC1323
220P_0402_50V8J~D
220P_0402_50V8J~D
DC_BLOCK_GC <53>
+CHGR_DC_IN<53>
PR1320 0_0402_5%~D@PR1320 0_0402_5%~D@
1 2
1 2
PR1323
@PR1323
@
200K_0402_5%~D
200K_0402_5%~D
12
PR1325
PR1325
PC1321
@ PC1321
@
4.7K_0402_5%~D
4.7K_0402_5%~D
120P_0402_50VNPO~D
120P_0402_50VNPO~D
1 2
12
PC1324
PC1324
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
+DOCK_PWR_BAR
+DC_IN_SS
@
@
12
PC1325
PC1325
@
@
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
CSS_GC<53>
BAT54CW_SOT323~D
BAT54CW_SOT323~D
PC1320
PC1320
PC1326
PC1326
Maximum charging current is 7.2A
3 3
4 4
DYN_TUR_CURRENT_SET#
65W
90W
DYN_TUR_CURRNT_SET#<40>
High
Low
PQ1309
PQ1309
2N7002A-7_SOT23-3
2N7002A-7_SOT23-3
+3.3V_ALW2
12
PR1341
PR1341
150K_0402_1%~D
150K_0402_1%~D
12
12
PR1349
PR1349
PR1350
PR1350
150K_0402_1%~D
150K_0402_1%~D
66.5K_0402_1%~D
66.5K_0402_1%~D
13
D
D
2
G
G
S
S
MAX8731_IINP
12
PC1341
PC1341
100P_0402_50V8J~D
100P_0402_50V8J~D
PR1343
PR1343
20K_0402_1%~D
20K_0402_1%~D
1 2
12
Adapter Protection Circuit fot Turbo Mode
+5V_ALW
PC1340
PC1340
220P_0402_50V8J~D
220P_0402_50V8J~D
12
PC1336
PC1336
@
@
100P_0402_50V8J~D
100P_0402_50V8J~D
2
3
PR1309
@PR1309
@
1 2
1_0805_5%~D
1_0805_5%~D
GNDA_CHG
@ PC1318
@
2200P_0402_50V7K~D
2200P_0402_50V7K~D
1 2
56P_0402_50V8~D
56P_0402_50V8~D
12
PC1327
PC1327
@
@
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
12
PC1337
PC1337
@
@
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
3
2
B
+SDC_IN
@PR1302
@
0_0402_5%~D
0_0402_5%~D
1 2
PD801
PD801
0.1U_0805_50V7M~D
0.1U_0805_50V7M~D
12
PC1318
10K_0402_5%~D
10K_0402_5%~D
12
1U_0603_10V6K~D
1U_0603_10V6K~D
PR1340
PR1340
1.8M_0402_1%
1.8M_0402_1%
1 2
8
PU1303A
PU1303A
P
+
O
-
G
LM393DR_SO8~D
LM393DR_SO8~D
4
PR1302
1
PC1306
PC1306
12
MAX8731_IINP
1 2
PR1324
@PR1324
@
7.5K_0402_5%~D
7.5K_0402_5%~D
MAX8731_REF
PR1327
@ PR1327
@
1 2
GNDA_CHG
1
@
@
12
PC1300
PC1300
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PQ1302
PQ1302
NTR4502PT1G_SOT23-3~D
NTR4502PT1G_SOT23-3~D
PC1303
PC1303
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
GNDA_CHG
+DCIN
12
PC1328
PC1328
@
@
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
+5V_ALW
PR1334
PR1334
1 2
PR1301
PR1301
0.01_1206_1%~D
0.01_1206_1%~D
4
3
13
D
D
2
G
G
S
S
CSSP_1
PR1303
@PR1303
@
10K_0402_5%~D
10K_0402_5%~D
12
PR1304
PR1304
10_0402_5%~D
10_0402_5%~D
PC1304
PC1304
0.047U_0603_25V7K~D
0.047U_0603_25V7K~D
1 2
1
28
PU1300
PU1300
NC
22
DCIN
CSSP
2
ACIN
13
ACOK
11
VDDSMB
10
SCL
9
SDA
14
NC
8
ICM
6
VCOMP
5
NC
4
ICOMP
3
VREF
7
NC
12
GND
29
TP
ISL88731CHRTZ-T_TQFN28_5X5~D
ISL88731CHRTZ-T_TQFN28_5X5~D
PR1339
@PR1339
@
0_0402_5%~D
0_0402_5%~D
1 2
221K_0402_1%~D
221K_0402_1%~D
61
2
PQ1307A
PQ1307A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1
2
13
D
D
PQ1301
PQ1301
2
G
NTR4502PT1G_SOT23-3~D
G
NTR4502PT1G_SOT23-3~D
S
S
CSSN_1
12
12
PR1305
PR1305
10_0402_5%~D
10_0402_5%~D
PC1305
PC1305
1 2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
27
26
VCC
CSSN
BOOT
25
BOOT
21
VDDP
24
UGATE
23
PHASE
20
LGATE
19
PGND
18
CSOP
17
CSON
15
VFB
16
NC
GNDA_CHG
H_PROCHOT# <7,40,51>
34
12
PC1347
PC1347
1000P_0402_50V7K~D
1000P_0402_50V7K~D
SI3993CDV-T1-GE3_TSOP6
SI3993CDV-T1-GE3_TSOP6
12
PR1306
PR1306
100K_0402_1%~D
100K_0402_1%~D
GNDA_CHG
ICOUT
PR1318
PR1318
2.2_0603_1%~D
2.2_0603_1%~D
1 2
MAX8731A_LDO
PR1322
PR1322
12
0_0603_1%~D
0_0603_1%~D
PC1317
PC1317
220P_0402_50V7K~D
220P_0402_50V7K~D
VFB
PR1328
PR1328
1 2
100_0402_5%~D
100_0402_5%~D
PJP1301
PJP1301
1 2
PAD-OPEN1x1m
PAD-OPEN1x1m
PQ1307B
PQ1307B
5
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
+PWR_SRC
1
2
PQ1303A
PQ1303A
S
S
G
G
1
PR1307
PR1307
4.7_0603_1%~D
4.7_0603_1%~D
BOOT_D
12
PC1310
PC1310
@
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
CHG_LGATE
74AHC1G08GW_SSOP5~D
74AHC1G08GW_SSOP5~D
C
PL1300
PL1300
1UH_PCMB053T-1R0MS_7A_20%
1UH_PCMB053T-1R0MS_7A_20%
PJP1300
PJP1300
1 2
PAD-OPEN 4x4m
PAD-OPEN 4x4m
PC1346
PC1346
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
D
D
65
PQ1303B
PQ1303B
SI3993CDV-T1-GE3_TSOP6
SI3993CDV-T1-GE3_TSOP6
S
S
D
D
42
12
G
G
3
PR1312
@ PR1312
@
0_0402_5%~D
0_0402_5%~D
PC1309
PC1309
1 2
1U_0603_10V6K~D
1U_0603_10V6K~D
GNDA_CHG
2 1
1 2
PC13111U_0603_10V6K~DPC13111U_0603_10V6K~D
CHG_UGATE
+VCHGR_B
BAT54WS-7-F_SOD323-2~D
BAT54WS-7-F_SOD323-2~D
+VCHGR
MAX8731_REF
+DC_IN
12
PR1335
PR1335
232K_0402_1%~D
232K_0402_1%~D
12
12
PR1346
PR1346
22.6K_0402_1%~D
22.6K_0402_1%~D
100P_0402_50V8J~D
100P_0402_50V8J~D
1 2
12
4
100K_0402_1%~D
100K_0402_1%~D
PR1319
PR1319
PD1301
PD1301
PC1338
PC1338
12
FBMA-L11-453215-800LMA90T_2
FBMA-L11-453215-800LMA90T_2
PC1301
PC1301
47P_0402_50V8J~D
47P_0402_50V8J~D
4
12
PC1319
PC1319
@
@
3300P_0402_50V7K~D
3300P_0402_50V7K~D
4
12
PR1336
PR1336
47K_0402_1%~D
47K_0402_1%~D
12
PC1339
PC1339
PR1347
PR1347
42.2K_0402_1%~D
42.2K_0402_1%~D
+3.3V_ALW
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
12
5
PU1302
PU1302
1
P
B
O
2
A
G
3
CHAGER_SRC
PL1302
PL1302
12
12
12
PC1302
PC1302
@
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
DOCK_DCIN_IS+ < 38>
DOCK_DCIN_IS- <38>
DK_CSS_GC <53>
5
PQ1304
PQ1304
123
SIR472DP-T1-GE3_POWERPAK8-5~D
SIR472DP-T1-GE3_POWERPAK8-5~D
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
5
100P_0402_50V8J~D
100P_0402_50V8J~D
12
1000P_0603_50V7K~D
1000P_0603_50V7K~D
PQ1305
PQ1305
1 2
123
SI7716ADN-T1-GE3_POWERPAK8-5
SI7716ADN-T1-GE3_POWERPAK8-5
PR1333
PR1333
1M_0402_1%~D
1M_0402_1%~D
1 2
+5V_ALW
8
PU1303B
PU1303B
5
P
+
O
6
-
G
LM393DR_SO8~D
LM393DR_SO8~D
4
12
100K_0402_5%~D
100K_0402_5%~D
PC1342
PC1342
PROCHOT_GATE <39>
To preset system to throtlle
switching from AC to DC
PC1322
PC1322
PR1332
PR1332
4.7_1206_5%~D
4.7_1206_5%~D
GNDA_CHG
7
+3.3V_ALW
PR1351
PR1351
2nd ()
Main ()
2nd
Main
2nd
Main
2nd
Main
PL1301
PL1301
+VCHGR_L
12
PC1333
@PC1333
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
@
@
12
13
D
D
2
G
G
S
S
PQ1306
PQ1306
2N7002A-7_SOT23-3
2N7002A-7_SOT23-3
PR1313
316K
226K
PC1324
@
0.01u
PR1327
10K
@
12
PC1312
PC1312
PC1313
PC1313
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
PR1326
PR1326
0.01_1206_1%~D
0.01_1206_1%~D
4
3
12
PR1330
PR1330
10_0402_5%~D
10_0402_5%~D
PC1334
PC1334
1 2
0.22U_0603_25V7K~D
0.22U_0603_25V7K~D
MAX8731_REF
12
PR1338
PR1338
10K_0402_1%~D
10K_0402_1%~D
12
PR1348
PR1348
41.2K_0402_1%~D
41.2K_0402_1%~D
ACAV_IN <22,40,53>
12
PC1314
PC1314
1
2
0_0402_5%~D
0_0402_5%~D
PR1331
PR1331
PR1342
@PR1342
@
0_0402_5%~D
0_0402_5%~D
1 2
BQ24747
ISL88731C
PC1323
220P
PR1323
200K
PC1318
2200P
12
10U_0805_25V6K
10U_0805_25V6K
12
PC1335
@PC1335
@
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
D
PU1300 PR1311
10K
@
@
PR1324
7.5K
@
@
PC1320
56P
@
@
12
12
PC1343
PC1343
PC1315
PC1315
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
+VCHGR
PC1329
PC1329
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1 2
12
GNDA_CHG
12
12
PC1331
PC1331
PC1330
PC1330
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
ACAV_IN_NB <39,40,53>
PC1321
2nd
Main
120P
@
PC1333
2nd
Main
0.1u
@
PR1316
PR1310
@
@
15.8K
10K
12
PC1344
PC1344
10U_0805_25V6K
10U_0805_25V6K
PC1327
1u
@
PC1334
0.1u
0.22u
PC1345
PC1345
12
10U_0805_25V6K
10U_0805_25V6K
PC1326
PR1330
0 ohm
10 ohm
@
0.01u
12
PC1332
PC1332
10U_0805_25V6K
10U_0805_25V6K
PR1322
2nd
Main
A
1 ohm
0 ohm
PR1319
@
4.7 ohm
PC1309
@
1u
PC1305
@
0.1u
B
PR1304
0 ohm
10 ohm
PR1305
0 ohm
10 ohm
0.1u
0.047u
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Charger
Charger
Charger
LA-7761P
LA-7761P
LA-7761P
D
52 60Wednesday, February 22, 2012
52 60Wednesday, February 22, 2012
52 60Wednesday, February 22, 2012
0.5
0.5
0.5
PC1304
5
1
B
2
A
3
61
PQ909A
PQ909A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
2
5
PU901
PU901
1
P
B
2
A
G
3
34
5
SLICE_BAT_ON<39>
PD917
PD917
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
PR961
@PR961
@
1 2
0_0402_5%~D
0_0402_5%~D
5
+VCHGR
PU902
PU902
P
4
O
G
+VCHGR
4
O
12
PR920
PR920
1K_0402_5%~D
1K_0402_5%~D
1 2
FDN338P-G_SSOT3~D
FDN338P-G_SSOT3~D
D
D
1 3
G
G
2
12
5
PR900
PR900
12
100K_0402_5%~D
100K_0402_5%~D
PR908
PR908
1K_0402_5%~D
1K_0402_5%~D
PR906
PR906
10K_0402_5%~D
10K_0402_5%~D
2
PC904
PC904
PR915
PR915
@
@
1 2
100K_0402_5%~D
100K_0402_5%~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
PR919
PR919
10K_0402_5%~D
10K_0402_5%~D
61
2
PQ910A
PQ910A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
PR935 0_0402_5%~D@ PR935 0_0402_5%~D@
PR938
PR938
@
@
+3.3V_ALW2
ACAV_DOCK_SRC#<38>
PQ915
PQ915
S
S
DOCK_SMB_ALERT# <38,39>
PC914
PC914
1500P_0402_7K~D
1500P_0402_7K~D
12
PC900
PC900
@
@
1 2
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
12
61
PQ904A
PQ904A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SI4835DDY-T1-GE3_SO8~D
SI4835DDY-T1-GE3_SO8~D
1
2
3 6
12
PR926
@ PR926
@
0_0402_5%~D
0_0402_5%~D
1 2
PBATT+
PR931
PR931
200K_0402_1%~D
200K_0402_1%~D
2
12
499K_0402_1%~D
499K_0402_1%~D
+DC_IN
1 2
PR946 100K_0402_5%~DPR946 100K_0402_5%~D
+SDC_IN
ACAV_IN<22,40,52>
+3.3V_ALW2
+3.3V_ALW2
PC915
PC915
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 2
ACAV_IN<22,40,52>
CHARGE_MODULE_BATT
74AHC1G08GW_SSOP5~D
74AHC1G08GW_SSOP5~D
D D
MODULE_BATT_PRES#
+3.3V_ALW2
PC916
PC916
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 2
ACAV_IN<22,40,52>
CHARGE_PBATT<39>
74AHC1G08GW_SSOP5~D
74AHC1G08GW_SSOP5~D
C C
PQ909B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
B B
A A
SLICE_BAT_PRES#
PQ909B
PBAT_PRES#<39,44>
DEFAULT_OVRDE<39>
12
12
PD916
PD916
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
PQ900
PQ900
SI4835DDY-T1-GE3_SO8~D
SI4835DDY-T1-GE3_SO8~D
1
2
3 6
4
PQ913
PQ913
4
34
5
PQ908B
PQ908B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
PD910
PD910
1 2
12
61
PR936
@ PR936
@
0_0402_5%~D
0_0402_5%~D
PQ907A
PQ907A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1 2
PR944 47_0805_5%~DPR944 47_0805_5%~D
0.1U_0603_50V4Z~D
0.1U_0603_50V4Z~D
SOFT_START_GC<44>
PR951
@ PR951
@
0_0402_5%~D
0_0402_5%~D
1 2
DC_BLOCK_GC<52>
PR955
@PR955
@
1 2
0_0402_5%~D
0_0402_5%~D
PR957
@PR957
@
1 2
0_0402_5%~D
0_0402_5%~D
8
7
5
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
5
PBAT_PRES#<39,44>
PC910
PC910
PQ908A
PQ908A
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
8
7
5
PR916
PR916
20K_0402_1%~D
20K_0402_1%~D
1 2
61
2
PD911
PD911
1 2
34
PQ907B
PQ907B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1 2
12
PR948 0_0402_5%~D@ PR948 0_0402_5%~D@
1 2
PC911
PC911
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
+DOCK_PWR_BAR
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PQ906A
PQ906A
2
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
SLICE_BAT_PRES#<38,39>
+DC_IN_SS
+CHGR_DC_IN<52>
CD3301_DCIN
ACAVDK_SRC
ERC1
12
1 2
61
1 2
12
ACAVIN
P33ALW2
@PR932
@
0_0402_5%~D
0_0402_5%~D
4
PR921
PR921
20K_0402_1%~D
20K_0402_1%~D
PD913
PD913
PD912
PD912
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
PR932
1 2
PU900
PU900
1
DC_IN
2
SS_GC
3
ERC1
4
ACAVDK_SRC
5
GND
6
SDC_IN
7
DC_BLK_GC
8
ACAV_IN
9
P33ALW2
37
TP
CSS_GC<52>
DK_CSS_GC<52>
4
PQ906B
PQ906B
1 2
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
PQ905B
PQ905B
PR939 0_0402_5%~D@ PR939 0_0402_5%~D@
1 2
PR940 0_0402_5%~D@ PR940 0_0402_5%~D@
1 2
PR943 0_0402_5%~D@ PR943 0_0402_5%~D@
12
PC912
PC912
0.047U_0603_25V7K~D
0.047U_0603_25V7K~D
34
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
1 2
34
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
36
NC
CSS_GC10DK_CSS_GC11ERC312ERC213GND14PWR_SRC
ERC3
@
@
5
PD915
PD915
5
PR937
@PR937
@
0_0402_5%~D
0_0402_5%~D
1 2
CHGVR_DCIN
DK_PWRBAR
DC_IN_SS
33
34
35
DC_IN_SS
DK_PWRBAR
CHARGERVR_DCIN
ERC2
12
PC913
PC913
0.1U_0402_25V4Z~D
0.1U_0402_25V4Z~D
1 2
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
MPBATT+
12
PR903
PR903
390K_0402_5%~D
390K_0402_5%~D
12
PR909
PR909
390K_0402_5%~D
390K_0402_5%~D
PBATT+
12
PR913
PR913
390K_0402_5%~D
390K_0402_5%~D
5
12
PR922
PR922
390K_0402_5%~D
390K_0402_5%~D
PR925
@PR925
@
0_0402_5%~D
0_0402_5%~D
MODULE_ON <39>
MPBATT+
12
PR933
PR933
PR934 100K_0402_5%~D@PR934 100K_0402_5%~D@
510K_0402_5%~D
510K_0402_5%~D
1 2
MODULE_BATT_PRES# <39,44>
PBATT+
PR941
@PR941
@
0_0402_5%~D
0_0402_5%~D
1 2
28
29
30NC31
32
GND
PBatt+
P50ALW
PBATT_OFF
BLK_MOSFET_GC
DK_AC_OFF_EN
ACAV_IN_NB
DSCHRG_MOSFET_GC
DK_AC_OFF_EN
SL_BAT_PRES#
BLKNG_MOSFET_GC
NBDK_DCINSS
SS_DCBLK_GC
EN_DK_PWRBAR17P33ALW
16
15
18
P33ALW
EN_DK_PWRBAR
STSTART_DCBLOCK_GC
3301_PWRSRC
12
PR904
PR904
PR905
PR905
820_0603_1%~D
820_0603_1%~D
620K_0402_5%~D
620K_0402_5%~D
1 2
34
5
PQ904B
PQ904B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
12
PR914
PR914
PR917
PR917
820_0603_1%~D
820_0603_1%~D
620K_0402_5%~D
620K_0402_5%~D
1 2
34
PQ910B
PQ910B
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
61
P50ALW
CD_PBATT_OFF
27
26
DK_AC_OFF
25
24
23
GND
CD3301BRHHR_QFN36_6X6~D
CD3301BRHHR_QFN36_6X6~D
1 2
22
21
20
19
PR959 0_0402_5%~D@ PR959 0_0402_5%~D@
1 2
PR960 0_0402_5%~D@ PR960 0_0402_5%~D@
1 2
PR963 0_0402_5%~D@ PR963 0_0402_5%~D@
DK_AC_OFF_ENCD3301_SDC_IN
SL_BAT_PRES#
1
S
2
S
3
S
4
G
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
PQ901
PQ901
12
PC903
PC903
0.01U_0603_25V7K~D
0.01U_0603_25V7K~D
PQ912
PQ912
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
1
S
D
2
S
D
3
S
D
4
G
D
12
PC907
PC907
0.01U_0603_25V7K~D
0.01U_0603_25V7K~D
PQ905A
PQ905A
2
12
PR928
PR928
DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D
@
@
499K_0402_1%~D
499K_0402_1%~D
PR945 0_0402_5%~D@ PR945 0_0402_5%~D@
1 2
PR947 0_0402_5%~D@ PR947 0_0402_5%~D@
1 2
PR949 0_0402_5%~D@ PR949 0_0402_5%~D@
1 2
+3.3V_ALW
EN_DOCK_PWR_BAR <39>
1 2
1M_0402_5%~D
1M_0402_5%~D
PR962
PR962
@
@
+PWR_SRC
3
PR901
PR901
330K_0402_5%~D
8
D
7
D
6
D
5
D
MPBATT_IN_SS
8
7
PBATT_IN_SS
6
5
DEFAULT_OVRDE<39>
12
PR923
PR923
10K_0402_5%~D
10K_0402_5%~D
PQ911
PQ911
DMN65D8LW-7_SOT323-3~D
DMN65D8LW-7_SOT323-3~D
13
D
D
2
G
G
S
S
+5V_ALW
PR953 0_0402_5%~D@ PR953 0_0402_5%~D@
1 2
BLKNG_MOSFET_GC
PR956 0_0402_5%~D@ PR956 0_0402_5%~D@
1 2
PR958 0_0402_5%~D@ PR958 0_0402_5%~D@
1 2
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
3
330K_0402_5%~D
1 2
PR912
PR912
330K_0402_5%~D
330K_0402_5%~D
1 2
ACAV_IN <22,40,52>
SLICE_BAT_ON <39>
DOCK_AC_OFF <38,39>
3301_ACAV_IN_NB
PR954 0_0402_5%~D@ PR954 0_0402_5%~D@
1 2
SLICE_BAT_PRES# <38,39>
+NBDOCK_DC_IN_SS
ACAV_IN_NB <39,40,52>
DOCK_AC_OFF_EC <39>
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
PD903
PD903
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
PD904
PD904
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
8
7
6
5
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
SDMK0340L-7-F_SOD323-2~D
2
PD901 PDS5100H-13_POWERDI5-3~DPD901 PDS5100H-13_POWERDI5-3~D
2
1
3
PQ902
PQ902
1
8
S
D
2
7
S
D
3
6
S
D
4
5
G
D
12
12
12
PR910
PR910
499K_0402_1%~D
499K_0402_1%~D
PD905 PDS5100H-13_POWERDI5-3~DPD905 PDS5100H-13_POWERDI5-3~D
2
1
3
PQ914
PQ914
1
S
D
2
S
D
3
S
D
4
G
D
PD907
PD907
12
PD908
PD908
12
12
PR924
PR924
499K_0402_1%~D
499K_0402_1%~D
1 2
1M_0402_5%~D
1M_0402_5%~D
PR952
PR952
2
+DOCK_PWR_BAR
PR942
@PR942
@
0_0402_5%~D
0_0402_5%~D
1 2
1
S2AA-13-F
S2AA-13-F
PD902
PD902
2 1
PQ903
PQ903
1
8
S
D
2
7
S
D
3
6
D
5
D
FDS6679AZ_G_SO8~D
FDS6679AZ_G_SO8~D
PR907
PR907
330K_0402_5%~D
330K_0402_5%~D
1 2
S
G
12
4
PC902
PC902
PR911
@PR911
@
0_0402_5%~D
0_0402_5%~D
STSTART_DCBLOCK_GC
1 2
PC905
PC905
2200P_0402_50V7K~D
2200P_0402_50V7K~D
0.47U_0805_25V7K~D
0.47U_0805_25V7K~D
+PWR_SRC
12
12
PC906
PC906
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Selector
Selector
Selector
LA-7761P
LA-7761P
LA-7761P
1
53 60Wednesday, February 22, 2012
53 60Wednesday, February 22, 2012
53 60Wednesday, February 22, 2012
0.5
0.5
0.5
5
4
3
2
1
+VCC_CORE
1
PC1000
PC1000
10U_080 5_4VAM
10U_080 5_4VAM
2
D D
1
PC1005
PC1005
10U_080 5_4VAM
10U_080 5_4VAM
2
1
PC1001
PC1001
10U_080 5_4VAM
10U_080 5_4VAM
2
1
PC1006
PC1006
10U_080 5_4VAM
10U_080 5_4VAM
2
1
PC1002
PC1002
10U_080 5_4VAM
10U_080 5_4VAM
2
1
PC1007
PC1007
10U_080 5_4VAM
10U_080 5_4VAM
2
1
PC1003
PC1003
10U_080 5_4VAM
10U_080 5_4VAM
2
1
PC1008
PC1008
10U_080 5_4VAM
10U_080 5_4VAM
2
+VCC_CORE +VCC_GFXCORE
1
PC1004
PC1004
10U_080 5_4VAM
10U_080 5_4VAM
2
1
PC1009
PC1009
10U_080 5_4VAM
10U_080 5_4VAM
2
+VCC_GFXCORE
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1012
PC1012
PC1011
PC1011
1
1
2
1
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1013
PC1013
22U_0805_6.3V6M
PC1014
PC1014
1
1
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1016
PC1016
PC1015
PC1015
1
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1018
PC1018
1
1
PC1017
PC1017
2
2
+VCC_CORE
1
PC1019
PC1019
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1043
PC1043
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
C C
1
PC1060
PC1060
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1020
PC1020
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1044
PC1044
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1061
PC1061
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1021
PC1021
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1045
PC1045
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1062
PC1062
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1022
PC1022
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1046
PC1046
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1063
PC1063
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1023
PC1023
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1053
PC1053
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1064
PC1064
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
1
PC1068
PC1068
22U_080 5_6.3VAM
22U_080 5_6.3VAM
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1035
PC1035
PC1036
1
2
1
+
+
2
PC1036
1
2
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
1
PC1056
PC1056
+
+
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1038
PC1038
PC1037
PC1037
1
1
2
2
470U_D2_2VM_R4.5M~D
470U_D2_2VM_R4.5M~D
PC1057
PC1057
Below is 458544_CRV_PDDG_0.5 Table 5-8.
5 x 22 µF (0805)
Socket Bottom
5 x (0805) no-stuff
sites
7 x 22 µF (0805)
Socket Top
2 x (0805) no-stuff
sites
+1.05V_RUN_VTT
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
PC1024
PC1024
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
PC1025
PC1025
2
2
+1.05V_R UN_VTT
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
PC1027
PC1027
PC1026
PC1026
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
@
@
PC1047
PC1047
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
PC1028
PC1028
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
@
@
PC1048
PC1048
2
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
PC1029
PC1029
PC1030
PC1030
2
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
@
@
@
@
PC1050
PC1050
PC1049
PC1049
2
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
PC1031
PC1031
2
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
@
@
PC1051
PC1051
2
2
330U_X_2VM_R6M
330U_X_2VM_R6M
1
+
+
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
PC1032
PC1032
2
1
@
@
PC1052
PC1052
2
1
PC1065
PC1065
+
+
2
PC1034
PC1034
PC1033
PC1033
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
@
@
PC1055
PC1055
PC1054
PC1054
2
330U_X_2VM_R6M
330U_X_2VM_R6M
330U_X_2VM_R6M
330U_X_2VM_R6M
1
@
@
PC1067
PC1067
PC1066
PC1066
+
+
2
+VCC_CORE
1
+
+
PC1076
PC1076
330U_D2 _2VM_R9M
B B
A A
330U_D2 _2VM_R9M
2
1
+
+
PC1072
PC1072
470U_D2 _2VM_R4.5M~D
470U_D2 _2VM_R4.5M~D
2
1
+
+
PC1073
PC1073
330U_D2 _2VM_R9M
330U_D2 _2VM_R9M
2
1
+
+
PC1074
PC1074
330U_D2 _2VM_R9M
330U_D2 _2VM_R9M
2
1
+
+
PC1075
PC1075
330U_D2 _2VM_R9M
330U_D2 _2VM_R9M
2
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size Documen t Number Rev
Size Documen t Number Rev
Size Documen t Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
PROCESSOR DECOUPLING
LA-7761P
LA-7761P
LA-7761P
54 60Wednesd ay, February 22, 2012
54 60Wednesd ay, February 22, 2012
54 60Wednesd ay, February 22, 2012
1
0.5
0.5
0.5
5
V ersion Ch a n ge L ist ( P . I. R . L ist )
V ersion Ch a nge L ist ( P . I . R . L ist )
V ersion Ch a nge L ist ( P . I . R . L ist )V ersion Ch a nge L ist ( P . I . R . L ist )
R e qu est
R e qu est
Ite m
Ite m Iss u e D esc rip tion
Ite mIte m
D D
P a ge # T it le
P a ge #P ag e#
Title
TitleTit le
1 HW
2
14 6/21/2011
HW
D at e
D at eD ate
6/21/2011
R e qu estRe q ue st
O w ner
O w ner
O w nerOw ne r
COMPAL36
COMPAL
4
Iss u e D esc rip tionD at e
Iss u e D esc rip tionIss u e D esc rip tion
SPI debug connector interfere power
CAP(PC208) change connector type.
3
U48 pin 10 & pin6 swap, and pin4 & pin5 swap.USB3.0 & E-SATA behavio error.
Change JSPI1 connector to SP01001DQ00.
2
So lu tion D es crip t io n
So lu tion D es crip t io n R e v.
So lu tion D es crip t io nS olu t io n D es c ript io n
1
R e v.P a ge #
R e v.R e v.
X01
X01
3
41 De-pop R1162.
4
5
6
7
C C
8
9
10
11
12
31
29
34 JMINI1 pin1 contact to PCIE_WAKE#.Modify WWAN circuit.
29
18
17
42
13
14
B B
15
16
32
11 De-pop RC140
HW
6/21/2011
6/21/2011HW11
HW
6/21/2011
HW 6/21/2011
HW 6/21/2011
HW
HW
HW
HW
HW
HW
HW
HW
6/27/2011 COMPAL Follow E4 VC +3.3V_SUS Source circuit . Reserve SIO_SLP_S4# contact to Q53 pin2.
7/18/2011
7/18/2011
7/18/2011
7/28/2011
7/28/2011
7/28/2011
7/28/2011
7/28/2011HW
Modify Touch Pad circuitCOMPAL
X01
INTEL Follow INTEL check list Rev1.5. RC99 ,RC100 change to 100 Ω. X01
INTEL
IDT
Follow INTEL ORB board. Add CC178,CC179,CC149,CC150 0.1uf 0402 caps from
+1.5V_CPU_VDDQ to 1.5V_MEM power rail.
PJP62 change to "JUMP_43X118".IDT request.
X01
X01
X01COMPAL
X0142
COMPAL
COMPAL
COMPAL
COMPAL
COMPAL
COMPAL
COMPAL
COMPAL
Leverage 14" schematic to modify
Codec circuit.
Leverage 14" schematic to modify PCH_GPIO16
pull-up resistor.
Leverage 14" schematic to modify
CAM_MIC_CBL_DET# pull-up resistor.
Load SW sources output rising time mismatch
and COS.cost concern.
Follow INTEL check list(Rev1.5) change PCH
GPIO52(PCIE_MCARD2_DET#) pull up resistor to 10KΩ.
INTEL power sequence fail on T13(+1.8V_RUN to
H_CPUPWRGD assert) due to USH move to sub-board but
"USH_PWR_STATE#" no PU/PD for default.
Follow INTEL check list Rev1.5 for
Remove R167 & R178 (0 Ω) .
Change RH272 from 100KΩ to 10KΩ.
Change RH331 from 8.2KΩ to 10KΩ.
Change back to E3 +3.3V/5V_RUN discrete solution
CH18,CH19 change to 10pF. bass on vender measure crystal EA by pass.15
Change R695 from 100K to 10Kohms.34
Add R1640, 1M ohms pull down for USH_PWR_STATE# at M/B side
X01
X01
X01
X01
X01
X01
X01
X01
"VCCIO_SEL" , series resistor no stuff .
17
HW
7/28/2011 COMPAL
Change CH94 and CH95 from SGA0000170L to SGA00004L0LCH94 and CH95 to D2 size for cost concern11
X01
18
22
HW
COMPAL7/28/2011
Change thermal sensor to EMC4021 for UMAThermal solution change to EMC4021 for
X01
cost concern.
19
20
A A
29 Pop R162~R166 and de-pop U73
40
20,43
HW
HW
HW
7/28/2011
7/28/2011
7/28/2011
HW22
5
COMPAL
COMPAL
COMPAL
Codec is change to 92HD93.
Change board ID to X01
Turn on +5V_ALW_PCH MOSFET Vgs less than
cut-in voltage in battery mode.
SMSC no support function for LPC_LDRQ0#.7/28/201114,40
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Add control circuit for +5V_ALW_PCH
Delete net, LPC_LDRQ0#. Leave LDRQ0# no connection
on both of 5048 and PCH side
3
2
X01
X01Change R875 to 130Kohms
X01COMPAL21
X01
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (1/3)
EE P.I.R (1/3)
EE P.I.R (1/3)
LA-7761P
LA-7761P
LA-7761P
55 59Wednesday, February 22, 2012
55 59Wednesday, February 22, 2012
55 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )V ersion Change L ist ( P . I. R . L ist )
R e qu est
R e qu est
Ite m
Ite m Iss u e D esc rip tion
Ite mIte m
P a ge # T it le
P a ge #P ag e#
Title
TitleTit le
D at e
D at eD ate
R e qu estRe q ue st
O w ner
O w ner
O w nerOw ne r
4
Iss u e D esc rip tionD at e
Iss u e D esc rip tionIss u e D esc rip tion
3
So lu tion D es crip t io n
So lu tion D es crip t io n R e v.
So lu tion D es crip t io nS olu t io n D es c ript io n
2
1
R e v.P a ge #
R e v.R e v.
23
D D
24 X01
25
26 X01
27
29
29
42
43 Follow INTEL Power down sequence Tc
23 HW 8/4/2011 TI CRT SW for TI 2nd source. U18.29 connect to +3.3V_RUN.
HW
HW
HW
HW
7/28/2011
7/28/2011
8/3/2011
8/3/2011
IDT
IDT
COMPAL
COMPAL
Pop R162~R166 and de-pop U73CODEC is change to 92HD93.
Co-lay 92HD93 circuit for I2S BUS control. Reserve 0 Ω to connect Codec(92HD93) Pin48 for EN_I2S_NB_CODEC#.
Modify +1.5V_RUN load switch circuit for
POWER team suggestion.
Add AND Gate(TC7SH08FU) input connect PM_APWROK & SIO_SLP_A# ,
timing fail(BITS:DF493966).
and output connector PM_APWROK_R.
HW4128 8/4/2011 Reset IC threshold voltage issueCOMPAL Change U4 to RT9801A (threshold adjustable)
X01
X01Change Q59 from NTGS4141NT1G to AO4728L.
X01
X01
29 17 HW 8/4/2011 COMPAL Intel Review Feedback for PCH_GPIO3. POP RH332. X01
C C
Modify codec schematics30 30 HW 8/4/2011 COMPAL X01Co-lay 92HD93 with ALC290
31 25 HW 8/8/2011 COMPAL Add HDMI repeater. Modify HDMI circuit. X01
32 HW 8/11/2011 COMPAL X01
33
17
43 HW 8/11/2011 COMPAL
RF request.
White light LED brightness is abnormal
1.CLK_PCI_MEC add By pass 10p after 22ohm(RH102)
2.CLK_PCI_LOOPBACK add By pass 10p after 22ohm(RH105)
.
change the resistor value: R934 change to 1K,R938 & R955 change to
1.8K,R939 change to 1.4K,R949 & R958 change to 620 and R957 change
X01
to 220.
34
S3 resume issue.COMPALHW11 8/12/2011
X01Pop RC79 and de-pop RC82
35 HW 8/29/2011 COMPAL USB3.0 Tx AC coupling follow CRBboard. X01change C412 & C413 to 0.1uF.36
36
B B
37
38
39
19
43 White light LED brightness is abnormal
29
40
HW
HW
HW
HW
8/29/2011 COMPAL
8/29/2011
9/28/2011
9/28/2011
COMPAL
COMPAL
COMPAL
change LH1 to 1uH inductor.CRT ripple garbage display issue.
change the resistor value from 2.2K to 1.2K for R949, R958, R957,
R955, R939, R938, R934
Audio no sound issue in Dalmore 15
UMA.(BITS:DF504001).
Add C-R snubber circuit,C973~C976(2200P),R1658~R1661(3.3Ω) X02
EC has internal pull up for volume signals. De-pop R1169, R1197, R1118.
X01
X01
X02
40
42
42
43 X02COMPAL10/12/2011HW
44 X02
A A
33 HW 10/12/2011 COMPAL EMI request to change SD CLK series R R676 is changed from 33ohms to 10ohms
HW
9/28/2011 +3.3V_RUN boot leakage issue. Pop Q69 & R929.
COMPAL
HW 9/29/2011 COMPAL
HW25 10/12/2011 COMPAL
SMSC change ECE5048 Pin A23 to GPIO0.39 Link ECE5048 symbol.
Remove HDMI level shifter and change to
HDMI EMI low cost solution.
Modify HDMI circuit,De-pop L19~L22. Add L100~107 (9nH) and
C1209~C1216 (3.3pF).
Change CH36 from 10uF(0603) to 22uF(0805).CRT ripple garbage display issue19
X02
X0241
X02
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (2/3)
EE P.I.R (2/3)
EE P.I.R (2/3)
LA-7761P
LA-7761P
LA-7761P
56 59Wednesday, February 22, 2012
56 59Wednesday, February 22, 2012
56 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )V ersion Change L ist ( P . I. R . L ist )
R e qu est
R e qu est
Ite m
Ite m Iss u e D esc rip tion
Ite mIte m
P a ge # T it le
P a ge #P ag e#
Title
TitleTit le
D at e
D at eD ate
R e qu estRe q ue st
O w ner
O w ner
O w nerOw ne r
4
Iss u e D esc rip tionD at e
Iss u e D esc rip tionIss u e D esc rip tion
3
So lu tion D es crip t io n
So lu tion D es crip t io n R e v.
So lu tion D es crip t io nS olu t io n D es c ript io n
2
1
R e v.P a ge #
R e v.R e v.
46 HW COMPAL X02
D D
48
43
ALL
41
HW
10/12/2011
10/12/2011
10/12/2011
COMPAL
DFX request to change CILP PAD. Change CLP1 PAD from "79X138" to "110X138" .
For cost saving Change 0 ohm resistor to short pad.
SMSC review feedback.
Reserve R1656 and R1657 100Kohms to GND for I2S disabled.
X0247 HW COMPAL
X02
Remove R1646, C1164, R1644, R1643, R1642, R171, C1204, C1205,
49
50
51
52
53
C C
54 HW
55
29
39
41
17
7
7
22
56
HW
HW COMPAL
HW
HW
HW
10/12/2011
10/13/2011 COMPALHW
10/19/2011
10/21/2011
10/21/2011
10/25/2011
COMPAL
COMPAL10/13/2011HW
COMPAL
COMPAL
COMPAL
COMPAL
Remove ALC290 co-lay circuit
When suspend/resume cycles, wireless SW
GPIO IRQs keeps giving
Change reset IC to RT9818A-44GU3
UMA PCI clock noise issue.
[BITS:DF511181]
ESD Request.
ESD Request. Reserve 8.2p cap on CLK_PCI_5048.
VSET Setting change Tp from
88 degree to 93 degree.
R1647, C1165, R1648 and R1645.
Add R771 pulling up to +3.3V_ALW for WIRELESS_ON#/OFF and de-pop R766.
Update U4 symbol and add R1629 for backup of inrush prevention.
Change RSMRST# pull up with 100Koms. Pop R1655 and de-pop R1623.
Pop CH20 & CH21 to 8.2pF.
Reserve 100p cap on PCH_PLTRST#_R , H_THERMTRIP#_R
,XDP_DBRESET#_R, VIDSCLK and VIDSOUT .
change R406 from 953Ω to 1.33KΩ
Add 33ohm on
DPD_DOCK_LANE_P0/N0,DPD_DOCK_LANE_P1/N1,DPD_DOCK_LANE_P2/N2,
X02
X02
X02
X02
X02
X02
X02
X0238 10/27/2011 EMI request to add 33Ω for DP port.
DPD_DOCK_LANE_P3/N3,DPC_DOCK_LANE_P0/N0, PC_DOCK_LANE_P1/N1,
DPC_DOCK_LANE_P2/N2, PC_DOCK_LANE_P3/N3.
57 HW 10/27/2011 COMPAL RC19.2 change to XDP_DBRESET#_R.
ESD Request.7
X02
RC29.2 change to XDP_TDI_R.
RC35.2 change to XDP_TDO_R.
58 HW 11/08/2011 COMPAL PCH GPIO52 changed to be free.
B B
59 ALL HW 11/08/2011 COMPAL For cost saving Change 1Kohms +-1% to +-5% except RC78, RC80, RC81 and RC84. X02
X02De-pop R725, remove R695 and add RH359.34
AO4728L leakage issue60 HW COMPAL11/14/2011 Change QC3 and Q59 to AO4304L (SB00000RV00). X0211,43
61 HW 11/14/2011 COMPAL X02Add D87, R1666 and R1665 for HW solution backup. +3.3V_RUN Giltch when AC plugin32
62 COMPAL
11,24,29. X02
HW
11/16/2011
Change RC value at Gate of MOS Load SW
to modify power rail soft start timing
RC72 from 100K to 330K; RC143 form 330K to 1M; CC136 form 0.1u to 0.022u
R412 from 100K to 470K; R1632 form 1M to 4.7M; C293 form 0.1u to 0.022u
R507 from 100K to 470K; R517 form 1M to 4.7M; C400 form 0.1u to 0.022u
R722 from 100K to 470K; R1625 form 1M to 4.7M; C644 form 4700p to 220p
R729 from 100K to 470K; R1628 form 1M to 4.7M; C650 form 4700p to 220p
R917 from 100K to 470K; R1617 form 1M to 4.7M; C770 form 4700p to 220p
R920 from 100K to 470K; R1610 form 470K to 2.2M; C771 form 4700p to 470p
R930 from 330K to 470K; R1611 form 470K to 1M; C773 form 2200p to 100p
R906 from 100K to 470K; C763 form 2200p to 220p
R912 from 100K to 470K; C766 form 470p to 220p
A A
64
4063
14~21 Change board ID to X02.
HW 11/16/2011 COMPAL
HW COMPAL11/16/2011 Change R875 to 62Kohms.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Change UH4 to SA00005BU1L.Change PCH to C1 version.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (3/3)
EE P.I.R (3/3)
EE P.I.R (3/3)
LA-7761P
LA-7761P
LA-7761P
1
X02
X02
1.0
1.0
57 59Wednesday, February 22, 2012
57 59Wednesday, February 22, 2012
57 59Wednesday, February 22, 2012
1.0
5
V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )V ersion Change L ist ( P . I. R . L ist )
R e qu est
R e qu est
Ite m
Ite m Iss u e D esc rip tion
Ite mIte m
D D
P a ge # T it le
P a ge #P ag e#
65
17,34,38. EMI request for USBP6 & USBP8.
Title
TitleTit le
D at e
D at eD ate
12/05/2011 COMPAL
R e qu estRe q ue st
O w ner
O w ner
O w nerOw ne r
4
Iss u e D esc rip tionD at e
Iss u e D esc rip tionIss u e D esc rip tion
[BITS:DF524330]
3
So lu tion D es crip t io n
So lu tion D es crip t io n R e v.
So lu tion D es crip t io nS olu t io n D es c ript io n
2
Swap USB Port6 and Port8 and reserve a choke at E-Docking conn. side:
Port6 from Mini3 Pink Panther card to E-docking
1
R e v.P a ge #
R e v.R e v.
X02
Port8 from E-Docking to Mini3 Pink Panther card
35
HW
EMI request to add 0.1u CAP for Express
Card.
Add 0.1u CAP on EXPRCRD_CPPE#, CARD_RESET#, CPUSB# traces.66 12/05/2011HWCOMPAL X02
EMI request for USBP12.[BITS:DF524330]12/06/2011 COMPALHW2467 X02Pop L10 and De-pop R427,R428.
C1209~C1216 CAP 3.3P Change to 1.8PF, OB 680 change to 604ohm.EMI final solution for HDMI.COMPAL12/06/2011HW68 25 X02
Change R875 to 33Kohms.69 40 HW COMPAL Change board ID to A00.02/01/2012 A00
70 17 HW 02/01/2012 COMPAL 33MHz PCI noise.
HW71
72
73
74
C C
75 A00
76 HW 02/20/2012 COMPAL
All
27 HW 02/20/2012 COMPAL For cost saving. HDD PWR De-pop :R1624, R500, R499, R504,R516,Q28, C393, C394.
14 HW 02/20/2012 COMPAL
7
HW 02/20/2012 COMPAL
36
02/20/2012
COMPAL
COMPALHW
ESD Request. De-pop RC30, RC31, RC33, RC34, RC36, RC37, RC38, RC39 .
System will reconnect USB 3.0 after
resume from S3 issue.[BITS:DF537410].
77
34 Not stuff R1157 and R1158.E4 no support WWAN SMBUS function .
35
79 36 HW 02/21/2012 COMPAL A00Add Q126 and remove R1613.
HW
HW COMPAL78 A00
02/21/2012
COMPAL
Fix EMI issue. Stuff CE16,CE17 & CE18.
Dell E4 NB USB1457 Sansung i9100 S0
issue.
Modify CLK_PCI_MEC and CLK_PCI_Loopback dampling(RH102 and RH105) from
22ohm to 33ohm.
SW1 change to SN11100580L.02/20/201242 ME Request.
Change 0 ohm resistor to short pad, total 15 pcs.For cost saving.
JBTB1 Pin 38 reserve R154 to +3.3V_ALW.
A00
A00
A00
A00
A00For cost saving. De-pop RH288,RH48,RH49,RH47.
A00
A0002/20/2012
B B
A A
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
EE P.I.R (4/4)
EE P.I.R (4/4)
EE P.I.R (4/4)
LA-7761P
LA-7761P
LA-7761P
58 59Wednesday, February 22, 2012
58 59Wednesday, February 22, 2012
58 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
5
R e qu est
R e qu est
Ite m
Ite m Iss u e D esc rip tion
Ite mIte m
D D
P a ge # T it le
P a ge #P ag e#
1 46
Title
TitleTit le
+1.5V_SUS
/+0.75V_DDR_VT
D at e
D at eD ate
6/25 Compal Follow VC X01Add Net SIO_SLP_S4#
R e qu estRe q ue st
O w ner
O w ner
O w nerOw ne r
4
V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )V ersion Change L ist ( P . I. R . L ist )
Iss u e D esc rip tionDa t e
Iss u e D esc rip tionIss u e D esc rip tion
3
Page 1
Page 1
Page 1P a ge 1
2
So lu tion D es crip t io n
So lu tion D es crip t io n R ev .
So lu tion D es crip t io nS olu t io n D es c ript io n
1
R e v.P a ge #
R e v.R e v.
X012 53 Selector 7/15 Compal Module bay can not discharge Delete connection between PR921 pin2 and PR916 pin1
+5V/+3.3V
4 45 7/21 Compal Change PC110 to SF000002Y00 (S_A-P_CAP 220U 6.3V M 6.3X4.2 R17M
5 45 7/26 Compal+5V/+3.3V Reserve PC120 PC121 0402 pad for improve jitter issue X01Jitter unstable
C C
7 51 VCORE_ISL95836 7/26 Compal Fine tune Vgfx OCP and load line Change PR711 to SD00000G780 (S RES 1/16W 422 +-1% 0402 )
8 51 VCORE_ISL95836 7/28 Compal EMI solution Add PL705 SM01000DJ00 (S SUPPRE_ FBMA-L11-453215-121LMA90T 1812 ) X01
9 44 +DCIN 8/3 Compal ME design change Change PJPDC1 DCIN Cable connector to 5 pin from 7 pin X01
B B
10 44 +DCIN 10/17 Compal HW add solution for S5 mode X02Add PR27 SD028000080 (S RES 1/16W 0 +-5% 0402)
7/26 Compal Jitter unstable Reserve PC214 0402 pad for improve jitter issue X016 48 +1.05V_M
DFX concern
COS concern
FDSD0630-H-2R2M=P3 8.3A) from SH00000FN0L
(S COIL 3.3U 20% FDVE1040-H-3R3M=P3 11.3A )
Change PL102 to SH00000OT00 (S COIL 3.3UH 20%
FDSD0630-H-3R3M=P3 6.6A ) from SH00000FN0L
(S COIL 3.3U 20% FDVE1040-H-3R3M=P3 11.3A )
VLPS ) from SGA00002M0L (S POLY C 220U 6.3V M V LESR25M PSL H1.9)
from SD034357080 (S RES 1/16W 357 +-1% 0402)
Change PR702 to SD034287180 (S RES 1/16W 2.87K +-1% 0402 )
from SD034255180 (S RES 1/16W 2.55K +-1% 0402 )
Change PR702 to SE071680J8L (S CER CAP 68P 50V J NPO 0402)
from SE071330J8L (S CER CAP 33P 50V +-5% NPO 0402 )
X013 45 7/21 Compal Change PL101 to SH00000M700 (S COIL 2.2UH 20%
X01+5V/+3.3V
X01
11 52 Charger 10/25 Compal Add PC1346 SE102104K8L (S CER CAP .1U 10V +-10% X7R 0402)
12 54 PWR_PROCESSOR
13 44 +DCIN 2/15 Compal ESD reserve PD7 for protect NB_PSID Add PD7 SC1A204U00L (S DIO DA204U (UMD3))
A A
DECOUPLING
12/6 Compal Change PC1076 PC1073 PC1074 PC1075 PC1072 to SGA0000420L
Change Vcore output bulk cap from
3pin to 2pin to fine tune transient_LL
Add PC1347 SE074102K8L (S CER CAP 1000P 50V +-10% X7R 0402)
Add PL1302 SM01000DJ00 (S SUPPRE_ FBMA-L11-453215-121LMA90T 1812)
Pop PC1317 SE074221K8L (S CER CAP 220P 50V K X7R 0402)
(S POLY C 470U 2V M D2 LESR4.5M SX H1.9) from SGA00004X0L
(S POLY C 470U 2V M D2 LESR4.5M LX H1.9)
X02EMI solution for reduce charger noise
X02
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
PWR_PIR 1
PWR_PIR 1
PWR_PIR 1
LA-7761P
LA-7761P
LA-7761P
59 59Wednesday, February 22, 2012
59 59Wednesday, February 22, 2012
59 59Wednesday, February 22, 2012
1
1.0
1.0
1.0
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